Aspire VX5 591g compal LA e361p rev 1 0 схема

A B C D E 1 Compal Confidential 2 C5PM2 MB Schematic Document LA-E361P 3 Rev:1.0 2016.10.27 4 Compal Secret Data Security Classification 2016/01/29 Issued Date Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Cover Sheet Size Document Number Custom B C D Rev 1.0 C5PM2_LA-E361P Date: A Compal Electronics, Inc Sheet Friday, October 28, 2016 E of 61 A B C D E HDMI Conn Fan Control*2 page 42 Interleaved Memory eDP 260 pin DDR4-SO-DIMM X1 Memory BUS HDMI PS8407A page 30 page 31 eDP HDMI x lanes DDI Kabylake H PROCESSOR BGA1440 (42X28) (SKL-H_4+2) Processor page 06~13 page 14 BANK 0, 1, 2, Dual Channel 260pin DDR4-SO-DIMM X1 1.2V DDR4 1333/1600 page 15 BANK 4, 5, 6, PEG x16 8GT/s Nvidia N17P-GX with gDDR5 x4 Card Reader page 23~29 NGFF page 37 page 34 WLAN PCIE 2.0 5GT/s PCIE 3.0 x4 8GT/s Port 9-12 USB port port X4 DMI USB 3.0 conn x2 USB 3.0 Type-C x1 CMOS Camera USB (port 1,2) USB/B (port 3) USB (port 9) Card Reader RTS5170 on SUB/B Flexible IO page 32 page 38 PCIE 2.0 5GT/s SATA3.0 USBx8 Skylake PCH - H FCBGA(23X23) POA USB (port 11) 6.0 Gb/s 48MHz LAN(GbE) SATA Re-Driver Realtek 8111H PARADE PS8527 page 33 page 31 port port USB2.0 USB (port 10) HD Audio 837pin FCBGA page 36 page 35 page 30 3.3V 24MHz page 16~22 RJ45 conn SATA HDD Conn HDA Codec ALC255 LPC/eSPI BUS page 40 3 CLK=24MHz ENE KB9022/9032 page 32 page 38 TPM page 39 page 41 Int Speaker SPI RTC CKT Sub Board page 40 page 21 LS-E361P FUN/B page Touch Pad PS2 / I2C page 33 Int.KBD SPI ROM x1 33 Power On/Off CKT page 41 UAJ on Sub/B Int DMIC on Sub/B page 33 page 17 LS-E362P LED/B page page 41 33 page 41 DC/DC Interface CKT page 43 Compal Electronics, Inc Compal Secret Data Security Classification Power Circuit DC/DC 2016/01/29 Issued Date Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC page 44~61 Title B C D Rev 1.0 C5PM2 M/B LA-E361P Date: A Block Diagrams Size Document Number Custom Sheet Friday, October 28, 2016 E of 61 A B C Board ID 1 10 11 12 13 14 15 16 17 18 19 3.3V +/- 5% 100K +/- 5% Rb 12K +/- 1% 15K +/- 1% 20K +/- 1% 27K +/- 1% 33K +/- 1% 43K +/- 1% 56K +/- 1% 75K +/- 1% 100K +/- 1% 130K +/- 1% 160K +/- 1% 200K +/- 1% 240K +/- 1% 270K +/- 1% 330K +/- 1% 430K +/- 1% 560K +/- 1% 750K +/- 1% NC V BID 0.347 0.423 0.541 0.691 0.807 0.978 1.169 1.398 1.634 1.849 2.015 2.185 2.316 2.395 2.521 2.667 2.791 2.905 3.000 V V V V V V V V V V V V V V V V V V V V BID typ 0.000 V 0.345 V 0.430 V 0.550 V 0.702 V 0.819 V 0.992 V 1.185 V 1.414 V 1.650 V 1.865 V 2.031 V 2.200 V 2.329 V 2.408 V 2.533 V 2.677 V 2.800 V 2.912 V 3.000 V V BID max 0.300 V 0.360 V 0.438 V 0.559 V 0.713 V 0.831 V 1.006 V 1.200 V 1.430 V 1.667 V 1.881 V 2.046 V 2.215 V 2.343 V 2.421 V 2.544 V 2.687 V 2.808 V 2.919 V EC 0x00 0x14 0x1F 0x26 0x31 0x3B 0x46 0x55 0x65 0x77 0x88 0x97 0xA5 0xB0 0xB8 0xC0 0xCA 0xD5 0xDE 0xF1 AD - 0x13 - 0x1E - 0x25 - 0x30 - 0x3A - 0x45 - 0x54 - 0x64 - 0x76 - 0x87 - 0x96 - 0xA4 - 0xAF - 0xB7 - 0xBF - 0xC9 - 0xD4 - 0xDD - 0xF0 - 0xFF I2C_0 (+3VS) I2C_1 (+3VS) PCH_SML1CLK (+3VS) Touch Panel TM-P2969-001 (Touch Pad) SB8787-1200 (Touch Pad) DIMM1 DIMM2 LIS3DHTR(G-sensor) N17P-GX (VGA) EC EC_SMB_CK1 (+3VLP) BQ24780 (Charger IC) BATTERY PACK PCH_SMBCLK (+3VS) Address(7 bit) Address(8bit) Write SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock S0 (Full ON) HIGH HIGH HIGH ON ON ON ON S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF BOM Structure Table I2C Address Table Device BOARD ID Table SIGNAL STATE BUS E Power State Board ID Table for AD channel Vcc Ra D Read reserved Board ID PCB Revision 0.1 0.2 0.3 1.0 Voltage Rails BOM Option Table Item BOM Structure Unpop @ Connector CONN@ EMC requirement EMC@ EMC requirement depop XEMC@ UMA@ UMA only TPM TPM@ CMC@ CMC LPC MODE for EC LPC@ BA Serial BA@ dGPU VGA@ G0@ N17P-G0 N17P-G1 G1@ X76@ VRAM BOM Select DMIC*1 DMIC@ IOAC@ For Acer IOAC NIOAC@ No Acer IOAC FP@ POA 0x30 0x9E 0x12 0x16 Power Plane Description S0 +RTCVCC RTC Battery Power ON S3 ON ON +19V_VIN Adapter power supply N/A N/A N/A N/A +12.6V_BATT Battery power supply N/A N/A N/A N/A N/A S4 S5 ON +19VB AC or battery power rail for power circuit N/A N/A N/A +3VLP +19VB to +3VLP power rail for suspend power ON ON ON ON +5VALW +5V Always power rail ON ON ON ON +3VALW System +3VALW always on power rail ON ON ON ON* +3VALW_DSW +3VALW power for PCH DSW rails ON ON ON ON +3VALW_PCH_PRIM +3VALW power for PCH power rails ON ON ON ON* +3VALW_SPI +3VALW_PRIM supply for the SPI IO ON ON ON ON +1.0VALW +1.0V Always power rail ON ON ON ON +1.2V_VDDQ DDR4 +1.2V power rail ON ON OFF OFF +1.0V_VCCST Sustain voltage for processor in Standby modes ON ON OFF OFF +5VS System +5V power rail ON OFF OFF OFF +3VS System +3V power rail ON OFF OFF OFF +1.0VS_VCCSTG +1.0VALW_PRIM Gated version of VCCST ON OFF OFF OFF +0.6VS_VTT DDR +0.6VS power rail for DDR terminator ON OFF OFF OFF +VCC_CORE Core voltage for CPU ON OFF OFF OFF +VCC_GT Sliced graphics power rail ON OFF OFF OFF +VCCIO CPU IO power rail ON OFF OFF OFF +VCC_SA System Agent power rail ON OFF OFF OFF +1.8VSDGPU_AON +1.8VS power rail for GPU(AON rails) ON OFF OFF OFF +1.8VSDGPU_MAIN +1.8VS power rail for GPU GC6 ON OFF OFF OFF +VGA_CORE Core voltage for VGA ON OFF OFF OFF +1.35VSDGPU +1.35VS power rail for GPU ON OFF OFF OFF +1.0VSDGPU +1.0VS power rail for GPU ON OFF OFF OFF +VGA_CORE_S Core voltage for VGA 3 Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF 43 level BOM table 43 Level BOM Structure Description 431A5HBOL14 431A5HBOL15 SMT MB AE361 C5PM2 I57300 G0 2G HDMI I573@/NIOAC@/VGA@/G0@/2G@ SMT MB AE361 C5PM2 I57300 G0 4G HDMI I573@/NIOAC@/VGA@/G0@/4G@ 431A5HBOL16 SMT MB AE361 C5PM2 I77700 G0 2G HDMI I777@/NIOAC@/VGA@/G0@/2G@ 431A5HBOL17 SMT MB AE361 C5PM2 I77700 G0 4G HDMI I777@/NIOAC@/VGA@/G0@/4G@ 431A5HBOL18 SMT MB AE361 C5PM2 I57300 G1 2G HDMI I573@/NIOAC@/VGA@/G1@/2G@ 431A5HBOL19 SMT MB AE361 C5PM2 I57300 G1 4G HDMI I573@/NIOAC@/VGA@/G1@/4G@ 431A5HBOL20 SMT MB AE361 C5PM2 I77700 G1 2G HDMI I777@/NIOAC@/VGA@/G1@/2G@ 431A5HBOL21 SMT MB AE361 C5PM2 I77700 G1 4G HDMI I777@/NIOAC@/VGA@/G1@/4G@ 4 Compal Secret Data Security Classification Issued Date 2016/01/29 Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Notes List Size Document Number Custom B C D Rev 1.0 C5PM2 M/B LA-E361P Date: A Compal Electronics, Inc Friday, October 28, 2016 Sheet E of 61 DC_IN PL101 PJP101 AC CONN D D +19V_VIN +1.8VSDGPU_AON UG12 UA1 +1.8VSDGPU_MAIN UG12 GPU CODEC +12.6V_BATT+ +12.6V_BATT BATTERY PL201,PL202 PU702 PJ7107 +1.8VS PU7102 PJ7103 +2.5V PU7103 PJ7104 +1.5VS DIMM1 PJP201 PU301 IMVP8 PL803,PL804,PL805 +19VB +VCCCORE CPU UQ1 PU801 CHARGER EN:VR_ON +VCCGT +3VALW_TPM +3VS_WLAN +3V_LAN RL1 PU808 PL809 +VCCSA U2 CPU UM1 +19VB CPU DDR4 UY2 HDMI REDRIVER +3VS J11 R4 PL806,PL807 DIMM2 +3VALW_DSW RH97 UA1 CODEC JHDD1 HDD SATA Re-driver UO1 TPM JNGFF1 WLAN CARD (IOAC) LGAU3 UL2 LAN RM8 PCH G-SENSOR +3VS_WLAN JNGFF1 +3VS_SSD_NGFF RM1 SSD U2 TPM EN:DRON RH99 PJ401 PU401 +3VALW +19VB +3VLP EN:3V_EN C +3VALW_PCH_PRIM +3VALW_HDA RH100 EC,LID FP UK3 +3V_FP FP PJ501 +1.2V_VDDQ RC41 PU501 RC42 PJ502 EN:SYSON +VCCSFR_OC_1 CPU +VCCSFR_OC_2 CPU +3VALW UK4 PJ601 +19VB +0.6VS_VTT +1.0VALW_PRIM RH96 +1.0VALW_PCH RH101 +1.0VALW RH103 EN:+3VALW LH1 RH104 LH2 LH3 +19VB PU7201 PJ7201 +1.0VS_VCCIO RH106 CPU RH107 EN:SUSP UC3 PU402 PJ402 +19VB +5VALW RS9 RC45 +5VALW_CC PU1501 PL1501,PL1502 JUSB1 US1 USB_CC JLED1 US1 POA RY1 GPU JSUB1 US1 UQ1 J12 PCH RH105 PCH +1.0V_VCCST CPU CPU US1 +USB3_VCCB US3 +19VB TP +1.0VS_VCCSTG +USB3_VCCA US2 +VGA_CORE +TP_PWR RX8 JTP1 +1.0VALW_DCPDSW +1.0VALW_VCCCLK +1.0VALW_VCCCLK5 +1.0VALW_MPHY +1.0VALW_AMPHYPLL +1.0VALW_AUSB_AZPLL +1.0VALW_PRIMAL22 +1.0VALW_PRIMAD15 JC1 UC4 B +3VS_TPM R5 UX1 RH98 PU601 SPI JEDP1 TP MIC1 DMIC SUB UY2 Card Reader SUB UY2 HDMI REDRIVER JEDP1 PANEL C +3VALW_CC RS10 +19VB UH3 PCH +3V_PTP UK1 +3VALW_SPI RH102 WLAN JSSD1 +USB_VCCA +USB3_VCCC +3VS_CARD J1 +3VS_ALS +LCDVDD +3VS_VCCATS PCH JFAN1 FAN1 JFAN2 FAN2 PCH B JUSB3 JUSB1 USB3.0 JUSB2 USB3.0 USB_CC SUB/B USB EN:VGA_CORE_EN +19VB PU1601 PL1601 +VGA_CORE_S +5VS FAN1 UF1 GPU FAN2 UF2 EN:VGA_CORE_S_EN +VDDA J18 +19VB PU1301 PJ1301 +1.35VSDGPU +5VS_BL U1 GPU EN:1.35VSDGPU_PWR_EN +5VS_HDD RO3 +HDMI_5V_OUT UY1 +19VB PU1401 PJ1401 UA1 CODEC JBL1 KB BackLight JHDD1 HDD JHDMI1 HDMI +1.0VSDGPU GPU EN:VGA_CORE_S_EN A A LX1 +19VB +INVPWR_B+ PANEL Compal Secret Data Security Classification Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title Si ze E Dat Date: e: Compal Electronics, Inc Power Map THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Document Number Rev 1.0 C5PM2 M/B LA-E361P Friday, October 28, 2016 Sheet of 61 A B C5PM2_DIS_EVT Power Sequence C D E AC mode BIOS ver: V0.01 EC: ver: V0.01 Power On Plug in S3 Power Off S3 Resume +3VLP 1 +3VLP → EC_ON 222.8us EC_ON → +5VALW 3.031ms +5VALW ON/OFFBTN# ON/OFFBTN# → 159ms → 158.7ms +3VALW +3VALW 3.920ms +1.0VALW +1.0VALW → 26.24ms 8.952S EC_RSMRST# EC_RSMRST# 20.3ms 5.64ms → ← → 8.952S PBTN_OUT# PBTN_OUT# 174.6ms → 3.07ms PM_SLP_S4# PM_SLP_S4# → 3.03ms 100.5us → 69.64us 99.75us PM_SLP_S3# PM_SLP_S3# SYSON SYSON → 691.5us 109.5us +1.0V_VCCST +1.0V_VCCST → 669us 579.5us → 1.84ms +1.2V_VDDQ +1.2V_VDDQ 1.26ms +2.5VS +2.5VS → 13.12ms → 175.9us → → 485.8us → 26.09ms 171.8us SUSP# SUSP# 13.76ms → 293.7us 28.27ms +1.0VS_VCCSTG +1.0VS_VCCSTG → → 14.13ms → 307.8us 27.11ms 481.7us +5VS +5VS → → 734.9us → 5.105ms → 759.9us 4.92ms +3VS +3VS → → 2.185ms → 99.51us → 2.205ms 42.26us +1.8VS +1.8VS → → 20.18ms → 21.26us 20.19ms 22.24us EC_VCCST_PG EC_VCCST_PG → 19.87ms 20.12us SM_PG_CTRL → → 19.88ms → 20.27ms ← → 1.452ms 20.52us SM_PG_CTRL → 20.27ms 384.9us +0.6VS_VTT +0.6VS_VTT → → 19.88ms → 360.2ns 8.193us 20.27ms VR_ON VR_ON → → 2.213ms → 350us → 2.204ms 153.8us +VCC_SA +VCC_SA → → 133.7ms → 350us → 126ms 153.8us +VCC_CORE +VCC_CORE → → 1.268S → 948ms → 726.4ms 7.982s +VCC_GT +VCC_GT → 9.806ms → → 121ms → 6.806us → 131ms → 524.8us 20.01us → → 20.01us → 7.205us 9.901ms PCH_PWROK → PCH_PWROK 121.4ms SYS_PWROK SYS_PWROK → 123.6ms 524.8us PLT_RST# PLT_RST# 4 Compal Secret Data Security Classification Issued Date 2016/01/29 Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size C Date: A B C D Compal Electronics, Inc Power Sequence Document Number Rev 1.0 C5PM2 M/B LA-E361P Friday, October 28, 2016 Sheet E of 61 A B C UC1D UC1 SR32S 2.5G I573@ SR32Q 2.8G I777@ HM175 SR30W-PCH SA0000AD850 SA0000AD750 SA0000ADB30 ZZZ UV1 UV1 K36 K37 J35 J34 H37 H36 J37 J38 D27 E27 LA-E361P N17P-G0-A1 G0@ N17P-G1-A1 G1@ DAZ1TY00100 SA0000A0510 SA0000A0610 H34 H33 F37 G38 F34 F35 E37 E36 CPU_DP2_P0 CPU_DP2_N0 CPU_DP2_P1 CPU_DP2_N1 CPU_DP2_P2 CPU_DP2_N2 CPU_DP2_P3 CPU_DP2_N3 F26 E26 C34 D34 B36 B34 F33 E33 C33 B33 A27 B27 E SKYLAKE_HALO UH1 UC1 D BGA1440 DDI1_TXP[0] DDI1_TXN[0] DDI1_TXP[1] DDI1_TXN[1] DDI1_TXP[2] DDI1_TXN[2] DDI1_TXP[3] DDI1_TXN[3] EDP_TXP[0] EDP_TXN[0] EDP_TXP[1] EDP_TXN[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3] DDI1_AUXP DDI1_AUXN EDP_AUXP EDP_AUXN DDI2_TXP[0] DDI2_TXN[0] DDI2_TXP[1] DDI2_TXN[1] DDI2_TXP[2] DDI2_TXN[2] DDI2_TXP[3] DDI2_TXN[3] EDP_DISP_UTIL EDP_RCOMP D29 E29 F28 E28 B29 A29 B28 C28 EDP_TXP0 EDP_TXN0 EDP_TXP1 EDP_TXN1 EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3 C26 B26 EDP_AUXP EDP_AUXN +1.0VS_VCCIO A33 D37 EDP_COMP 24.9_0402_1% RC1 CAD note: Trace width=20 mils,Spacing=25mil,Max length=100mils DDI2_AUXP DDI2_AUXN DDI3_TXP[0] DDI3_TXN[0] DDI3_TXP[1] DDI3_TXN[1] DDI3_TXP[2] DDI3_TXN[2] DDI3_TXP[3] DDI3_TXN[3] PROC_AUDIO_CLK PROC_AUDIO_SDI PROC_AUDIO_SDO DDI3_AUXP DDI3_AUXN G27 G25 G29 CPU_DISPA_SDI OF 14 SKL-H_BGA1440 @ REV = RC2 20_0402_1% CPU_DISPA_BCLK CPU_DISPA_SDO CPU_DISPA_SDI_R Close to CPU ? 2 CPU_XDP_TMS CPU_XDP_TDI CPU_XDP_TMS CPU_XDP_TDI CPU_XDP_TDO CPU_XDP_TCK0 PCH_JTAG_TCK1 CPU_XDP_TDO CPU_XDP_TCK0 PCH_JTAG_TCK1 3 +1.0VS_VCCSTG TMS/TDI pin CPU on-die termination RC5 CMC@ 51_0402_5% CPU_XDP_TMS RC6 CMC@ 51_0402_5% CPU_XDP_TDI Place to PCH side RC7 CMC@ 100_0402_1% RC14 @ CPU_XDP_TDO PCH_JTAG_TCK1 51_0402_5% If need debug from usb port this cmc@ need pop +1.0VS_VCCSTG RC8 CMC@ 100_0402_1% CPU_XDP_TDO Place to CPU side RC13 CMC@ 51_0402_1% CPU_XDP_TCK0 4 Compal Secret Data Security Classification Issued Date 2016/01/29 Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom Date: A B C D Compal Electronics, Inc SKL-H(1/9)DDI,EDP C5PM2 M/B LA-E361P Friday, October 28, 2016 Sheet E Rev 1.0 of 61 A B C D E Interleaved Memory UC1A DDR_A_D[0 15] DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_A_D[16 31] DDR_A_D[32 47] DDR_A_D[48 63] BA2 BA1 AY4 AY5 BA5 BA4 AY1 AY2 SKYLAKE_HALO BGA1440 BR6 BT6 BP3 BR3 BN5 BP6 BP2 BN3 BL4 BL5 BL2 BM1 BK4 BK5 BK1 BK2 BG4 BG5 BF4 BF5 BG2 BG1 BF1 BF2 BD2 BD1 BC4 BC5 BD5 BD4 BC1 BC2 AB1 AB2 AA4 AA5 AB5 AB4 AA2 AA1 V5 V2 U1 U2 V1 V4 U5 U4 R2 P5 R4 P4 R5 P2 R1 P1 M4 M1 L4 L2 M5 M2 L5 L1 DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15] DDR0_DQ[16]/DDR0_DQ[32] DDR0_DQ[17]/DDR0_DQ[33] DDR0_DQ[18]/DDR0_DQ[34] DDR0_DQ[19]/DDR0_DQ[35] DDR0_DQ[20]/DDR0_DQ[36] DDR0_DQ[21]/DDR0_DQ[37] DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQ[26]/DDR0_DQ[42] DDR0_DQ[27]/DDR0_DQ[43] DDR0_DQ[28]/DDR0_DQ[44] DDR0_DQ[29]/DDR0_DQ[45] DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQ[32]/DDR1_DQ[0] DDR0_DQ[33]/DDR1_DQ[1] DDR0_DQ[34]/DDR1_DQ[2] DDR0_DQ[35]/DDR1_DQ[3] DDR0_DQ[36]/DDR1_DQ[4] DDR0_DQ[37]/DDR1_DQ[5] DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQ[61]/DDR1_DQ[45] DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQ[63]/DDR1_DQ[47] DDR0_CKP[0] DDR0_CKN[0] DDR0_CKN[1] DDR0_CKP[1] DDR0_CLKP[2] DDR0_CLKN[2] DDR0_CLKP[3] DDR0_CLKN[3] DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3] DDR0_CS#[0] DDR0_CS#[1] DDR0_CS#[2] DDR0_CS#[3] DDR0_ODT[0] DDR0_ODT[1] DDR0_ODT[2] DDR0_ODT[3] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_MA[3] DDR0_MA[4] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_PAR DDR0_ALERT# DDR0_DQSN[0] DDR0_DQSN[1] DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSP[7]/DDR1_DQSP[5] DDR0_DQSP[0] DDR0_DQSP[1] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_ECC[0] DDR0_ECC[1] DDR0_ECC[2] DDR0_ECC[3] DDR0_ECC[4] DDR0_ECC[5] DDR0_ECC[6] DDR0_ECC[7] DDR0_DQSP[8] DDR0_DQSN[8] AG1 AG2 AK1 AK2 AL3 AK3 AL2 AL1 DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK#1 DDR_A_CLK1 AT1 AT2 AT3 AT5 DDR_A_CKE0 DDR_A_CKE1 AD5 AE2 AD2 AE5 DDR_A_CS#0 DDR_A_CS#1 AD3 AE4 AE1 AD4 DDR_A_ODT0 DDR_A_ODT1 AH5 AH1 AU1 DDR_A_BA0 DDR_A_BA1 DDR_A_BG0 AH4 AG4 AD1 DDR_A_MA16 DDR_A_MA14 DDR_A_MA15 AH3 AP4 AN4 AP5 AP2 AP1 AP3 AN1 AN3 AT4 AH2 AN2 AU4 AE3 AU2 AU3 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_BG1 DDR_A_ACT# AG3 AU5 DDR_A_PARITY DDR_A_ALERT# BR5 BL3 BG3 BD3 AB3 V3 R3 M3 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 BP5 BK3 BF3 BC3 AA3 U3 P3 L3 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 SKYLAKE_HALO UC1B DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK#1 DDR_A_CLK1 DDR_A_CKE0 DDR_A_CKE1 DDR_A_CS#0 DDR_A_CS#1 DDR_A_ODT0 DDR_A_ODT1 DDR_A_BA0 DDR_A_BA1 DDR_A_BG0 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 DDR_B_D[16 31] DDR_A_MA16 DDR_A_MA14 DDR_A_MA15 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_BG1 DDR_A_ACT# DDR_A_PARITY DDR_A_ALERT# DDR_B_D[0 15] DDR_B_D[32 47] DDR_B_D[48 63] DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 BGA1440 BT11 BR11 BT8 BR8 BP11 BN11 BP8 BN8 BL12 BL11 BL8 BJ8 BJ11 BJ10 BL7 BJ7 BG11 BG10 BG8 BF8 BF11 BF10 BG7 BF7 BB11 BC11 BB8 BC8 BC10 BB10 BC7 BB7 AA11 AA10 AC11 AC10 AA7 AA8 AC8 AC7 W8 W7 V10 V11 W11 W10 V7 V8 R11 P11 P7 R8 R10 P10 R7 P8 L11 M11 L7 M8 L10 M10 M7 L8 AW11 AY11 AY8 AW8 AY10 AW10 AY7 AW7 AY3 BA3 DDR1_DQ[0]/DDR0_DQ[16] DDR1_DQ[1]/DDR0_DQ[17] DDR1_DQ[2]/DDR0_DQ[18] DDR1_DQ[3]/DDR0_DQ[19] DDR1_DQ[4]/DDR0_DQ[20] DDR1_DQ[5]/DDR0_DQ[21] DDR1_DQ[6]/DDR0_DQ[22] DDR1_DQ[7]/DDR0_DQ[23] DDR1_DQ[8]/DDR0_DQ[24] DDR1_DQ[9]/DDR0_DQ[25] DDR1_DQ[10]/DDR0_DQ[26] DDR1_DQ[11]/DDR0_DQ[27] DDR1_DQ[12]/DDR0_DQ[28] DDR1_DQ[13]/DDR0_DQ[29] DDR1_DQ[14]/DDR0_DQ[30] DDR1_DQ[15]/DDR0_DQ[31] DDR1_DQ[16]/DDR0_DQ[48] DDR1_DQ[17]/DDR0_DQ[49] DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[23]/DDR0_DQ[55] DDR1_DQ[24]/DDR0_DQ[56] DDR1_DQ[25]/DDR0_DQ[57] DDR1_DQ[26]/DDR0_DQ[58] DDR1_DQ[27]/DDR0_DQ[59] DDR1_DQ[28]/DDR0_DQ[60] DDR1_DQ[29]/DDR0_DQ[61] DDR1_DQ[30]/DDR0_DQ[62] DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[32]/DDR1_DQ[16] DDR1_DQ[33]/DDR1_DQ[17] DDR1_DQ[34]/DDR1_DQ[18] DDR1_DQ[35]/DDR1_DQ[19] DDR1_DQ[36]/DDR1_DQ[20] DDR1_DQ[37]/DDR1_DQ[21] DDR1_DQ[38]/DDR1_DQ[22] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63] DDR1_CKP[0] DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[1] DDR1_CLKP[2] DDR1_CLKN[2] DDR1_CLKP[3] DDR1_CLKN[3] DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3] DDR1_CS#[0] DDR1_CS#[1] DDR1_CS#[2] DDR1_CS#[3] DDR1_ODT[0] DDR1_ODT[1] DDR1_ODT[2] DDR1_ODT[3] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR1_MA[3] DDR1_MA[4] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_PAR DDR1_ALERT# DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSN[6] DDR1_DQSN[7] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSP[5]/DDR1_DQSP[3] DDR1_DQSP[6] DDR1_DQSP[7] DDR1_ECC[0] DDR1_ECC[1] DDR1_ECC[2] DDR1_ECC[3] DDR1_ECC[4] DDR1_ECC[5] DDR1_ECC[6] DDR1_ECC[7] DDR1_DQSP[8] DDR1_DQSN[8] AM9 AN9 AM8 AM7 AM11 AM10 AJ10 AJ11 DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK#1 DDR_B_CLK1 AT8 AT10 AT7 AT11 DDR_B_CKE0 DDR_B_CKE1 AF11 AE7 AF10 AE10 DDR_B_CS#0 DDR_B_CS#1 AF7 AE8 AE9 AE11 DDR_B_ODT0 DDR_B_ODT1 AH10 AH11 AF8 DDR_B_MA16 DDR_B_MA14 DDR_B_MA15 AH8 AH9 AR9 DDR_B_BA0 DDR_B_BA1 DDR_B_BG0 AJ9 AK6 AK5 AL5 AL6 AM6 AN7 AN10 AN8 AR11 AH7 AN11 AR10 AF9 AR7 AT9 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_BG1 DDR_B_ACT# AJ7 AR8 DDR_B_PARITY DDR_B_ALERT# BP9 BL9 BG9 BC9 AC9 W9 R9 M9 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 BR9 BJ9 BF9 BB9 AA9 V9 P9 L9 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK#1 DDR_B_CLK1 DDR_B_CKE0 DDR_B_CKE1 DDR_B_CS#0 DDR_B_CS#1 DDR_B_ODT0 DDR_B_ODT1 DDR_B_MA16 DDR_B_MA14 DDR_B_MA15 DDR_B_BA0 DDR_B_BA1 DDR_B_BG0 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_BG1 DDR_B_ACT# DDR_B_PARITY DDR_B_ALERT# DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 AW9 AY9 DDR CHANNEL B DDR CHANNEL A 121_0402_1% 75_0402_1% 100_0402_1% OF 14 SKL-H_BGA1440 @ REV = 1 RC17 RC18 RC19 SM_RCOMP0 G1 SM_RCOMP1 H1 SM_RCOMP2 J2 OF 14 DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ SKL-H_BGA1440 @ REV = close to CPU ? DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2] BN13 BP13 BR13 +0.6V_VREFCA +0.6V_B_VREFDQ +0.6V_VREFCA +0.6V_B_VREFDQ ? 4 Compal Secret Data Security Classification Issued Date 2016/01/29 Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title SKL-H(2/9)DDRIII Size Document Number Custom B C D Rev 1.0 C5PM2 M/B LA-E361P Date: A Compal Electronics, Inc Friday, October 28, 2016 Sheet E of 61 A B C D E 1 UC1C SKYLAKE_HALO BGA1440 PEG_GTX_HRX_P15 PEG_GTX_HRX_N15 PEG_GTX_HRX_P14 PEG_GTX_HRX_N14 CC6 CC8 VGA@ VGA@ CC10 VGA@ CC12 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P15 PEG_GTX_C_HRX_N15 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P14 PEG_GTX_C_HRX_N14 E23 D23 E25 D25 E24 F24 PEG_GTX_HRX_P13 PEG_GTX_HRX_N13 CC14 VGA@ CC15 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P13 PEG_GTX_C_HRX_N13 PEG_GTX_HRX_P12 PEG_GTX_HRX_N12 CC3 VGA@ CC17 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P12 PEG_GTX_C_HRX_N12 E22 F22 PEG_GTX_HRX_P11 PEG_GTX_HRX_N11 CC19 VGA@ CC21 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P11 PEG_GTX_C_HRX_N11 E21 D21 PEG_GTX_HRX_P10 PEG_GTX_HRX_N10 CC5 VGA@ CC23 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P10 PEG_GTX_C_HRX_N10 E20 F20 PEG_GTX_HRX_P9 PEG_GTX_HRX_N9 CC25 VGA@ CC27 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P9 PEG_GTX_C_HRX_N9 E19 D19 PEG_GTX_HRX_P8 PEG_GTX_HRX_N8 CC29 VGA@ CC31 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P8 PEG_GTX_C_HRX_N8 E18 F18 PEG_GTX_HRX_P7 PEG_GTX_HRX_N7 CC33 VGA@ CC35 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_N7 D17 E17 PEG_GTX_HRX_P6 PEG_GTX_HRX_N6 CC37 VGA@ CC39 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6 F16 E16 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_N5 F14 E14 PEG_GTX_HRX_P5 PEG_GTX_HRX_N5 CC41 VGA@ CC43 VGA@ D15 E15 PEG_GTX_HRX_P4 PEG_GTX_HRX_N4 CC45 VGA@ CC47 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_N4 PEG_GTX_HRX_P3 PEG_GTX_HRX_N3 CC49 VGA@ CC51 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_N3 D13 E13 PEG_GTX_HRX_P2 PEG_GTX_HRX_N2 CC53 VGA@ CC55 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2 F12 E12 PEG_GTX_HRX_P1 PEG_GTX_HRX_N1 CC57 VGA@ CC59 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1 D11 E11 PEG_GTX_HRX_P0 PEG_GTX_HRX_N0 CC61 VGA@ CC63 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0 F10 E10 +1.0VS_VCCIO PEG_RCOMP G2 RC20 24.9_0402_1% CAD note: Trace width=12 mils,Spacing=15mil,Max length=400mils PEG_RXP[0] PEG_RXN[0] PEG_TXP[0] PEG_TXN[0] PEG_TXP[1] PEG_TXN[1] PEG_RXP[1] PEG_RXN[1] PEG_TXP[2] PEG_TXN[2] PEG_RXP[2] PEG_RXN[2] PEG_TXP[3] PEG_TXN[3] PEG_RXP[3] PEG_RXN[3] PEG_TXP[4] PEG_TXN[4] PEG_RXP[4] PEG_RXN[4] PEG_RXP[5] PEG_RXN[5] PEG_TXP[5] PEG_TXN[5] PEG_RXP[6] PEG_RXN[6] PEG_TXP[6] PEG_TXN[6] PEG_RXP[7] PEG_RXN[7] PEG_TXP[7] PEG_TXN[7] PEG_RXP[8] PEG_RXN[8] PEG_TXP[8] PEG_TXN[8] PEG_RXP[9] PEG_RXN[9] PEG_TXP[9] PEG_TXN[9] PEG_TXP[10] PEG_TXN[10] PEG_RXP[10] PEG_RXN[10] PEG_TXP[11] PEG_TXN[11] PEG_RXP[11] PEG_RXN[11] PEG_TXP[12] PEG_TXN[12] PEG_RXP[12] PEG_RXN[12] PEG_TXP[13] PEG_TXN[13] PEG_RXP[13] PEG_RXN[13] PEG_RXP[14] PEG_RXN[14] PEG_TXP[14] PEG_TXN[14] PEG_RXP[15] PEG_RXN[15] PEG_TXP[15] PEG_TXN[15] B25 A25 PEG_HTX_GRX_P15 0.22U_0201_6.3V6K PEG_HTX_GRX_N15 0.22U_0201_6.3V6K 2 1VGA@ CC7 1VGA@ CC9 B24 C24 PEG_HTX_GRX_P14 0.22U_0201_6.3V6K PEG_HTX_GRX_N14 0.22U_0201_6.3V6K 2 1VGA@ CC11 1VGA@ CC13 B23 A23 PEG_HTX_GRX_P13 0.22U_0201_6.3V6K PEG_HTX_GRX_N13 0.22U_0201_6.3V6K 2 1VGA@ CC1 1VGA@ CC2 B22 C22 PEG_HTX_GRX_P12 0.22U_0201_6.3V6K PEG_HTX_GRX_N12 0.22U_0201_6.3V6K 2 1VGA@ CC16 1VGA@ CC18 B21 A21 PEG_HTX_GRX_P11 0.22U_0201_6.3V6K PEG_HTX_GRX_N11 0.22U_0201_6.3V6K 2 1VGA@ CC20 1VGA@ CC4 B20 C20 PEG_HTX_GRX_P10 0.22U_0201_6.3V6K PEG_HTX_GRX_N10 0.22U_0201_6.3V6K 2 1VGA@ CC22 1VGA@ CC24 B19 A19 PEG_HTX_GRX_P9 PEG_HTX_GRX_N9 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC26 1VGA@ CC28 B18 C18 PEG_HTX_GRX_P8 PEG_HTX_GRX_N8 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC30 1VGA@ CC32 A17 B17 PEG_HTX_GRX_P7 PEG_HTX_GRX_N7 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC34 1VGA@ CC36 C16 B16 PEG_HTX_GRX_P6 PEG_HTX_GRX_N6 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC38 1VGA@ CC40 A15 B15 PEG_HTX_GRX_P5 PEG_HTX_GRX_N5 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC42 1VGA@ CC44 C14 B14 PEG_HTX_GRX_P4 PEG_HTX_GRX_N4 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC46 1VGA@ CC48 A13 B13 PEG_HTX_GRX_P3 PEG_HTX_GRX_N3 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC50 1VGA@ CC52 C12 B12 PEG_HTX_GRX_P2 PEG_HTX_GRX_N2 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC54 1VGA@ CC56 A11 B11 PEG_HTX_GRX_P1 PEG_HTX_GRX_N1 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC58 1VGA@ CC60 C10 B10 PEG_HTX_GRX_P0 PEG_HTX_GRX_N0 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC62 1VGA@ CC64 PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_N15 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_N7 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_RCOMP 3 DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 DMI_CRX_PTX_P1 DMI_CRX_PTX_N1 DMI_CRX_PTX_P2 DMI_CRX_PTX_N2 DMI_CRX_PTX_P3 DMI_CRX_PTX_N3 DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 D8 E8 DMI_CRX_PTX_P1 DMI_CRX_PTX_N1 E6 F6 DMI_CRX_PTX_P2 DMI_CRX_PTX_N2 D5 E5 DMI_CRX_PTX_P3 DMI_CRX_PTX_N3 J8 J9 DMI_RXP[0] DMI_RXN[0] DMI_TXP[0] DMI_TXN[0] DMI_RXP[1] DMI_RXN[1] DMI_TXP[1] DMI_TXN[1] DMI_RXP[2] DMI_RXN[2] DMI_TXP[2] DMI_TXN[2] DMI_RXP[3] DMI_RXN[3] DMI_TXP[3] DMI_TXN[3] B8 A8 DMI_CTX_PRX_P0 DMI_CTX_PRX_N0 C6 B6 DMI_CTX_PRX_P1 DMI_CTX_PRX_N1 B5 A5 DMI_CTX_PRX_P2 DMI_CTX_PRX_N2 D4 B4 DMI_CTX_PRX_P3 DMI_CTX_PRX_N3 DMI_CTX_PRX_P0 DMI_CTX_PRX_N0 DMI_CTX_PRX_P1 DMI_CTX_PRX_N1 DMI_CTX_PRX_P2 DMI_CTX_PRX_N2 DMI_CTX_PRX_P3 DMI_CTX_PRX_N3 OF 14 SKL-H_BGA1440 REV = @ ? 4 Compal Secret Data Security Classification 2016/01/29 Issued Date Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title SKL-H(3/9) PEG,DMI Size Document Number Custom B C D Rev 1.0 C5PM2 M/B LA-E361P Date: A Compal Electronics, Inc Sheet Friday, October 28, 2016 E of 61 CPU_BCLK CPU_BCLK# CPU_PCIBCLK D35 CPU_PCIBCLK# C36 CPU_PCIBCLK CPU_PCIBCLK# B31 A32 CPU_24M CPU_24M# CPU_24M CPU_24M# E31 D31 BGA1440 BCLKP BCLKN CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] PCI_BCLKP PCI_BCLKN CLK24P CLK24N CPU_SVID_ALERT# CPU_SVID_CLK CPU_SVID_DAT H_PROCHOT#_R CPU_SVID_CLK BH31 BH32 BH29 BR30 DDR_PG_CTRL BT13 VIDALERT# VIDSCK VIDSOUT PROCHOT# CFG[17] CFG[16] CFG[19] CFG[18] DDR_VTT_CNTL H_PECI EC_VCCST_PG CH65 1U_0402_16V7K XEMC@ H_PECI THERMTRIP# H_SKTOCC# @ RC21 1 RC22 @ H_SKTOCC# FLOAT FOR SKL GND FOR CNL H_CPUPW RGD PLTRST_CPU# H_PM_SYNC PM_DOW N H_PECI THERMTRIP# H_CPUPW RGD PLTRST_CPU# H_PM_SYNC 0_0402_5% H_SKTOCC#_R SKL_CNL_N 0_0402_5% H_CATERR# @ T3 H13 BT31 BP35 BM34 BP31 BT34 J31 BR33 BN1 BM30 Reference SKL EDS 0.85 Table 6-8 CFG signals internal PH default value = SKYLAKE_HALO UC1E CPU_BCLK CPU_BCLK# E D C B A BPM#[0] BPM#[1] BPM#[2] BPM#[3] VCCST_PWRGD PROCPWRGD RESET# PM_SYNC PM_DOWN PECI THERMTRIP# PROC_TDO PROC_TDI PROC_TMS PROC_TCK PROC_TRST# PROC_PREQ# PROC_PRDY# SKTOCC# PROC_SELECT# CATERR# CFG_RCOMP PAD BN25 BN27 BN26 BN28 BR20 BM20 BT20 BP20 BR23 BR22 BT23 BT22 BM19 BR19 BP19 BT19 CFG0 @ CFG2 PAD T36 Description CFG4 CFG5 @ CFG7 CFG[0] BN23 BP23 BP22 BN22 BT28 BL32 BP28 BR28 CFG[3] CPU_XDP_TDO CPU_XDP_TDI CPU_XDP_TMS CPU_XDP_TCK0 RC23 49.9_0402_1% CFG5 RC25 @ CFG2 PCIE pore assign 1K_0402_1% CFG4 CFG_RCOMP RC24 Reserved configuration lane CFG[8:19] RC26 1K_0402_1% 1K_0402_1% ? +1.0V_VCCST +1.0V_VCCST ESD Reserve ,pleace close to cpu RC28 RC27 1K_0402_5% From EC OD output EC_VCCST_PG_R THERMTRIP# 1K_0402_5% EC_VCCST_PG 60.4_0402_1% RC29 +1.0VS_VCCSTG H_CPUPW RGD CH1 XEMC@ 1U_0402_16V7K H_PROCHOT#_R CH2 XEMC@ 1U_0402_16V7K XEMC@ 1U_0402_16V7K THERMTRIP# CH3 1 20_0402_1% PM_DOW N From 1K_0402_5% @ RC32 H_PROCHOT# +1.0V_VCCST RC34 56_0402_5% RC33 Place the PU resistors close to CPU CFG[6] CFG[5] CFG[2] x 16 x 16 * reverse 1 1 x x reverse x + x 1x8+2x4 reverse 1 0 0 0 H_PROCHOT#_R 499_0402_1% +1.2V_VDDQ DDR_VTT_CNTL to DDR VTT supplied ramped X1 ,Change to common part 78.7K_0402_1% PR845 78.7K_0402_1% PR844 SL200002I00 SW1_3PH_B SW2_3PH_B PR833 20K_0402_1% 1 10_0402_1% PR842 10_0402_1% PR841 CSN1_3PH_B CSN2_3PH_B PC815 1U_0402_10V6K H42@ PR832 42.2K_0402_1% PWM1_3PH_B/ICCMAX3B PR839 PWM2_3PH_B/DOSC1 1.65K_0402_1% CSP1_3PH_B SW1_3PH_B Prevention current imbalance PWM3_3PH_A/VBOOT PC819 0.1U_0402_25V6 CSREF_3PH_B B PR821 1.65K_0402_1% PR838 1.65K_0402_1% CSP3_3PH_A PC812 @ PR877 1.65K_0402_1% 0.1U_0402_25V6 CSREF_3PH_A Prevention current imbalance PC818 0.1U_0402_25V6 2 SW2_3PH_B CSP2_3PH_B SW3_3PH_A 1 1 53 TAB PC820 1U_0402_16V7K @ PR878 1.65K_0402_1% PR851 16.2K_0402_1% PR848 PC811 0.1U_0402_25V6 49.9_0402_1% PC826 470P_0402_50V8J CSREF_3PH_A B VSSGT_SENSE CSP2_3PH_A PWM1_3PH_A/ICCMAX3A @ PR855 100_0402_1% 2 PSYS_MON DRON 0.1U_0402_25V6 PR850 1K_0402_1% CSP3_3PH_B PC816 0.1U_0402_25V6 TSENSE_3PH_B PC810 PR820 1.65K_0402_1% 1 SW2_3PH_A CSREF_3PH_A PR854 0_0402_5% PR852 23.2K_0402_1% 2 CSP1_3PH_A PC813 0.1U_0402_25V6 TSENSE_3PH_A 1 PR826 2.2_0402_1% VCCGT_SENSE 2200P_0402_50V7K @ PC827 2200P_0402_50V7K @ VR_HOT# DIFFOUT_3PH_B FB_3PH_B COMP_3PH_B ILIM_3PH_B CSCOMP_3PH_B CSSUM_3PH_B CSREF_3PH_B CSP1_3PH_B CSP2_3PH_B 2 SW1_3PH_A PR819 1.65K_0402_1% PR858 100_0402_1% 39 38 37 36 35 34 33 32 31 30 29 28 27 1 PR856 0_0402_5% PC828 1K_0402_1% PC814 0.01U_0402_50V7K +5VALW PR853 1K_0402_1% 1K_0402_1% VRHOT# VSP_3PH_B VSN_3PH_B IMON_3PH_B DIFFOUT_3PH_B FB_3PH_B COMP_3PH_B ILIM_3PH_B CSCOMP_3PH_B CSSUM_3PH_B CSREF_3PH_B CSP1_3PH_B CSP2_3PH_B PR831 97.6K_0402_1% PC807 820P_0402_50V7K @ PC808 220P_0402_25V8K 1 PR811 75K_0402_1% PR825 CSREF_3PH_A @ PR857 100_0402_1% @ PR859 PR830 97.6K_0402_1% 10_0402_1% SL200002I00 CPU_SVID_DAT PU801 NCP81205MNTXG_QFN52_6X6 10_0402_1% PR818 ,Change to common part PR817 SL200000500->X1 VR_ON +1.0V_VCCST PR829 24.9K_0402_1% CSN2_3PH_A CSN3_3PH_A 2016/03/13 10_0402_1% VRMP +19VB_CPU connect to 3A rail PR816 PC809 CSN1_3PH_A 113K_0402_1% 113K_0402_1% VSP_3PH_A VSN_3PH_A IMON_3PH_A DIFFOUT_3PH_A FB_3PH_A COMP_3PH_A ILIM_3PH_A CSCOMP_3PH_A CSSUM_3PH_A CSREF_3PH_A CSP1_3PH_A CSP2_3PH_A CSP3_3PH_A PR827 52.3K_0402_1% H42@ PR814 H42@ PR815 1 10 11 12 13 1U_0402_16V7K SW2_3PH_A SW3_3PH_A CSP1_3PH_A CSP2_3PH_A CSP3_3PH_A Place close to IA choke (phase 1) 113K_0402_1% H42@ PR813 SW1_3PH_A DIFFOUT_3PH_A FB_3PH_A COMP_3PH_A ILIM_3PH_A 13.7K_0402_1% H42@ PR810 CSCOMP_3PH_A CSSUM_3PH_A 2 PR812 165K_0402_1% PH801 220K_0402_5%_ERTJ0EV224J VSP_3PH_A VSN_3PH_A PC803 470P_0402_50V8J 1 0_0402_5% @ PR866 PR808 1K_0402_1% C H44e: PR160,PR162,PR165=127K H42: PR160,PR162,PR165=113K H44e: PR810=12.1K H42: PR810=13.7K H42@ PR806 22.6K_0402_1% 2 10_0402_1% PR860 14 15 16 17 18 19 20 21 22 23 24 25 26 PC806 PR809 3.3K_0402_1% 2200P_0402_50V7K 2 H44e: PR806=22.6K H42: PR806=22.6K PC804 470P_0402_50V8J CPU_SVID_ALERT#_R PR807 49.9_0402_1% COMP_1PH ILIM_1PH CSN_1PH CSP_1PH IMON_1PH VSN_1PH VSP_1PH CPU_SVID_CLK 0_0402_5% +VCC_GT PC835 15P_0402_50V8J PC802 2200P_0402_50V7K PC805 15P_0402_50V8J 1 52 51 50 49 48 47 46 45 44 43 42 41 40 VSN_3PH_A 81205_SCLK 81205_ALERT 81205_SDIO PR803 1K_0402_1% PR861 PR867 37.4K_0402_1% PC834 PR872 1.5K_0402_1% 0.015U_0402_25V7K PC801 1000P_0402_50V7K @ 81205_SDIO VR_PWRGD 49.9_0402_1% PR862 81205_ALERT PWM1_1PH/ICCMAX1 VSP_1PH VSN_1PH COMP_1PH ILIM_1PH CSN_1PH CSP_1PH IMON_1PH VR_RDY PWM_1PH/ICCMAX_1PH EN SCLK ALRT# SDIO 0_0402_5% TTSENSE_3PH_A VRMP VCC DRON PWM1_3PH_A/ICCMAX_3PH_A PWM2_3PH_A/ADDR PWM3_3PH_A/VBOOT PWM3_3PH_B/ROSC_3PH PWM2_3PH_B/ROSC_1PH PWM1_3PH_B/ICCMAX_3PH_B TTSENSE_1PH/PSYS TTSENSE_3PH_B CSP3_3PH_B @ 2 PR828 3.92K_0402_1% 1 @ PR805 100_0402_1% 1 0_0402_5% PR804 VSP_3PH_A @ 2 VCCSENSE VSSSENSE PC833 1000P_0402_50V7K PR801 @ PR802 100_0402_1% 10K_0402_5% PR868 25.5K_0402_1% PR871 12.4K_0402_1% PC830 470P_0402_50V7K CSN_1PH 2 81205_SCLK PR800 +VCC_CORE @ +3VS PC831 0.01U_0402_25V7K 2 PC838 1000P_0402_50V7K SW_1PH PR863 100_0402_1% 7.5K_0603_1% PR864 100_0402_1% PR869 14K_0402_1% PC832 4700P_0402_25V7K 1 PH805 100K_0402_1%_NCP15WF104F03RC VSP_1PH PR847 75K_0402_1% 1 PR846 165K_0402_1% @ PR876 100_0402_1% +VCC_SA @ PC821 220P_0402_25V8K VCCSA_SENSE +1.0V_VCCST Place close to SA choke D VSN_1PH PR875 1.5K_0402_1% PC822 1000P_0402_50V7K 1000P_0402_50V7K PC837 VSSSA_SENSE OCP Setting: VCC: 75A VCCGT: 61A VCCSA: 16.5A PC836 1000P_0402_50V7K @ PR874 100_0402_1% CSREF_3PH_B TSENSE_3PH_B @ PR823 0_0402_5% @ PR834 0_0402_5% +5VALW 1 TSENSE_3PH_A Place close to GT MOS PH802 PR824 1 1 Place close to IA MOS H42@ PR836 PR835 PH803 1K_0402_1% 61.9K_0402_1% 2 2 61.9K_0402_1% 100K_0402_1%_NCP15WF104F03RC 100K_0402_1%_NCP15WF104F03RC PHASE DETECTION CSP3_3PH_B (Common Part) SL200002H00 A A Function Field : Control PWM IC - 36.1 Drivers - 36.2 Rest of support elements - 36.3 Title CPU_IC Size D Document Number C5PM2 M/B LA-E361P Friday, October 28, 2016 Date: Rev 1.0 Sheet 52 of 61 1 2 2 D1 G1 S2 G2 S2 S2 0.15uH (DCR 0.9 +-5%) CSN1_3PH_B SNB1_GT 1 2 SNB2_VCORE 2 CSN2_3PH_A +19VB_CPU D1 PL807 0.15UH_MMD06CZER15MG_37A_20% 1 S2 S2 G2 S2 DRVL2_VCCGT CSN2_3PH_B SNB2_GT 2 SW2_3PH_B 0_0402_5% near choke B PL805 0.15UH_MMD06CZER15MG_37A_20% S2 7*7*3 (DCR 0.9 +-5%) EMI@0.15uH PR888 4.7_1206_5% CSN3_3PH_A PC886 +VCC_CORE Choke 0.15uH SH00000X700 S2 G2 EMI@ PC894 680P_0603_50V7K @ 2 D1 G1 S2 D2/S1 2.2U_0402_6.3V6M SNB3_VCORE 2 +5VALW PQ805 MDU5692SVRH_PDFN56-8-7 DRON SW2_3PH_B_R +19VB_CPU PC850 105 PWM3_3PH_A/VBOOT 10U_0805_25VAK PU804 NCP81151MNTBG_DFN8_2X2 FLAG BST DRVH3_VCORE PWM DRVH VSW3_VCORE SW EN GND VCC DRVL3_VCORE DRVL 105 PC887 0.22U_0603_25V7K 10U_0805_25VAK 0_0603_5% 10U_0805_25V6K DRVH3_VCORE-1 PR895 10U_0805_25V6K PR887 0_0603_5% 1 PC849 PC851 PC852 7*7*3 (DCR 0.9 +-5%) EMI@0.15uH PR894 4.7_1206_5% PC892 2.2U_0402_6.3V6M 2 EMI@ PC885 680P_0603_50V7K +VCC_GT Choke 0.15uH SH00000X700 1 SW2_3PH_A near choke C PQ809 MDU5692SVRH_PDFN56-8-7 D2/S1 0_0402_5% PR885 4.7_1206_5% 1 G1 +5VALW 1 2 S2 S2 S2 G2 PWM2_3PH_B/DOSC1 2 2 D1 G1 7*7*3 105 +VCC_CORE DRON DRVL2_VCORE 0_0603_5% SW1_3PH_B 10U_0805_25VAK (DCR 0.9 +-5%) EMI@0.15uH PC883 DRVH2_VCCGT-1 PR899 105 Choke 0.15uH SH00000X700 2.2U_0402_6.3V6M BOOT3_VCORE @ PC857 PC858 10U_0805_25VAK PL804 0.15UH_MMD06CZER15MG_37A_20% D2/S1 PC893 0.22U_0603_25V7K PU806 NCP81151MNTBG_DFN8_2X2 FLAG BST DRVH2_VCCGT PWM DRVH VSW2_VCCGT SW EN GND VCC DRVL 105 PR893 0_0603_5% PC859 10U_0805_25VAK PC860 105 PQ803 MDU5692SVRH_PDFN56-8-7 SW1_3PH_B_R EMI@ PC891 680P_0603_50V7K PR892 B D +VCC_GT 1 2.2U_0402_6.3V6M BOOT2_VCCGT 7*7*3 EMI@ PR891 4.7_1206_5% DRVL1_VCCGT PC889 10U_0805_25VAK 10U_0805_25VAK 105 10U_0805_25VAK VSW2_VCORE 105 PL806 0.15UH_MMD06CZER15MG_37A_20% D2/S1 +19VB_CPU PC845 PC846 10U_0805_25V6K PU803 NCP81151MNTBG_DFN8_2X2 FLAG BST DRVH2_VCORE PWM DRVH SW EN GND VCC DRVL SW1_3PH_A EMI@ PC882 680P_0603_50V7K PC847 105 2 S2 S2 G2 S2 1 2 D1 G1 1 DRVL Choke 0.15uH SH00000X700 footprint L_7X7X3_M PQ807 MDU5692SVRH_PDFN56-8-7 VSW1_VCCGT 10U_0805_25V6K +5VALW CSN1_3PH_A 0_0603_5% PC853 PC854 10U_0805_25V6K 7*7*3 0.15uH (DCR 0.9 +-5%) 10U_0805_25VAK 2DRVH2_VCORE-1 PR896 0_0603_5% C DRVH1_VCCGT-1 PR897 10U_0805_25V6K PWM1_3PH_B/ICCMAX3B 105 +VCC_CORE PC890 0.22U_0603_25V7K PU805 NCP81151MNTBG_DFN8_2X2 FLAG BST DRVH1_VCCGT PWM DRVH VSW1_VCCGT SW EN GND VCC 10U_0805_25VAK 100U_25V_M PC855 PR886 PC884 0.22U_0603_25V7K DRON BOOT1_VCCGT SNB1_VCORE PR884 0_0603_5% BOOT2_VCORE PR890 0_0603_5% (Common Part) SF000007100 100U 25V M 6.3X6 Choke 0.15uH SH00000X700 PC880 +5VALW EMI@ PR882 4.7_1206_5% DRVL1_VCORE 2.2U_0402_6.3V6M PWM2_3PH_A/ADDR EMI@ PL801 HCB2012KF-121T50_0805 @ DRON PC848 PC871 VSW1_VCORE +19VB_CPU PC856 +19VB + 100U_25V_M DRON +5VALW PC872 + + 100U_25V_M PWM1_3PH_A/ICCMAX3A PL803 0.15UH_MMD06CZER15MG_37A_20% D2/S1 PC841 10U_0805_25V6K PC842 10U_0805_25V6K PU802 NCP81151MNTBG_DFN8_2X2 FLAG BST DRVH1_VCORE PWM DRVH SW EN GND VCC DRVL D PQ801 MDU5692SVRH_PDFN56-8-7 10U_0805_25V6K PC881 0.22U_0603_25V7K 105 BOOT1_VCORE 10U_0805_25VAK PR898 0_0603_5% PC873 PC843 PC844 PR881 0_0603_5% EMI@ PL808 HCB2012KF-121T50_0805 1 +19VB_CPU EMI@ PC888 680P_0603_50V7K SW3_3PH_A Function Field : Drivers - 36.2 Rest of support elements - 36.3 Acoustic Noise B+ Bulk CAP - 37.2 A Compal Electronics, Inc Compal Secret Data Security Classification 2016/01/29 Issued Date Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title C5PM2 M/B LA-E361P Size Document Number Custom Re v 1.0 VCC/VCCGT Date: A Friday, October 28, 2016 Sheet 53 of 61 2 1 2 1 2 PC1074 1U_0201_6.3V6M 2 PC1063 1U_0201_6.3V6M PC1064 1U_0201_6.3V6M 2 2 2 1 2 2 2 2 PC1005 22U_0603_6.3V6M PC1006 22U_0603_6.3V6M PC1007 22U_0603_6.3V6M PC1008 22U_0603_6.3V6M PC1019 22U_0603_6.3V6M PC1018 22U_0603_6.3V6M PC1004 22U_0603_6.3V6M PC1017 22U_0603_6.3V6M PC1029 22U_0603_6.3V6M 2 PC1016 22U_0603_6.3V6M PC1028 22U_0603_6.3V6M PC1042 1U_0201_6.3V6M PC869 220U_D2_2V_Y PC1003 22U_0603_6.3V6M PC1015 22U_0603_6.3V6M PC1027 22U_0603_6.3V6M PC1041 1U_0201_6.3V6M PC1053 1U_0201_6.3V6M 2 1 PC1014 22U_0603_6.3V6M PC1026 22U_0603_6.3V6M PC1040 1U_0201_6.3V6M PC1052 1U_0201_6.3V6M 2 PC1025 22U_0603_6.3V6M PC1039 1U_0201_6.3V6M PC1051 1U_0201_6.3V6M 2 PC1038 1U_0201_6.3V6M PC1050 1U_0201_6.3V6M 2 PC1024 22U_0603_6.3V6M PC1002 22U_0603_6.3V6M PC1009 22U_0603_6.3V6M 1 PC1073 1U_0201_6.3V6M PC1062 1U_0201_6.3V6M PC1049 1U_0201_6.3V6M PC1037 1U_0201_6.3V6M PC1013 22U_0603_6.3V6M PC868 220U_D2_2V_Y PC1001 22U_0603_6.3V6M PC1012 22U_0603_6.3V6M @ PC1084 1U_0201_6.3V6M 2 PC1072 1U_0201_6.3V6M PC1061 1U_0201_6.3V6M PC1048 1U_0201_6.3V6M 2 PC1023 22U_0603_6.3V6M @ PC1094 1U_0201_6.3V6M PC1083 1U_0201_6.3V6M 2 PC1071 1U_0201_6.3V6M PC1036 1U_0201_6.3V6M @ PC1093 1U_0201_6.3V6M PC1082 1U_0201_6.3V6M 2 PC1060 1U_0201_6.3V6M PC1047 1U_0201_6.3V6M PC1022 22U_0603_6.3V6M PC1011 22U_0603_6.3V6M @ PC1092 1U_0201_6.3V6M PC1070 1U_0201_6.3V6M PC1059 1U_0201_6.3V6M 2 PC1035 1U_0201_6.3V6M @ PC1081 1U_0201_6.3V6M 2 @ PC1091 1U_0201_6.3V6M PC1080 1U_0201_6.3V6M PC1069 1U_0201_6.3V6M 1 PC1046 1U_0201_6.3V6M PC1090 1U_0201_6.3V6M PC1058 1U_0201_6.3V6M PC1021 22U_0603_6.3V6M +VCC_CORE PC1079 1U_0201_6.3V6M PC1034 1U_0201_6.3V6M 1 PC1068 1U_0201_6.3V6M PC1057 1U_0201_6.3V6M PC1045 1U_0201_6.3V6M @ PC1089 1U_0201_6.3V6M PC1078 1U_0201_6.3V6M PC1067 1U_0201_6.3V6M 2 PC1056 1U_0201_6.3V6M Total VCORE Output Capacitor: X 220uF 20 X 22uF_0603_X5R 63 X 1uF_0201 PC1088 1U_0201_6.3V6M PC1077 1U_0201_6.3V6M + PC1066 1U_0201_6.3V6M PC1087 1U_0201_6.3V6M @ PC1076 1U_0201_6.3V6M PC1033 1U_0201_6.3V6M + PC1086 1U_0201_6.3V6M PC1044 1U_0201_6.3V6M 2 +VCC_CORE D C B A PC1055 1U_0201_6.3V6M @ PC1075 1U_0201_6.3V6M PC1065 1U_0201_6.3V6M PC1054 1U_0201_6.3V6M PC1043 1U_0201_6.3V6M PC1030 22U_0603_6.3V6M PC1020 22U_0603_6.3V6M PC1010 22U_0603_6.3V6M +VCC_GT PC1085 1U_0201_6.3V6M @ PC1095 1U_0201_6.3V6M @ PC1173 1U_0201_6.3V6M PC1163 1U_0201_6.3V6M PC1153 1U_0201_6.3V6M 1 PC1143 1U_0201_6.3V6M PC1123 1U_0201_6.3V6M PC1133 1U_0201_6.3V6M 2 PC1111 22U_0603_6.3V6M PC1101 22U_0603_6.3V6M 1 2 PC1134 1U_0201_6.3V6M PC1124 1U_0201_6.3V6M PC1112 22U_0603_6.3V6M PC876 220U_D2_2V_Y PC1102 22U_0603_6.3V6M 1 PC1175 1U_0201_6.3V6M PC1165 1U_0201_6.3V6M PC1155 1U_0201_6.3V6M 1 PC1125 1U_0201_6.3V6M PC1135 1U_0201_6.3V6M PC1145 1U_0201_6.3V6M 1 PC1113 22U_0603_6.3V6M @ PC1103 22U_0603_6.3V6M 1 + PC1183 1U_0201_6.3V6M @ PC877 560U_D2_2VM_R4.5M +VCC_GT PC1144 1U_0201_6.3V6M 1 PC1154 1U_0201_6.3V6M + PC1164 1U_0201_6.3V6M @ PC1174 1U_0201_6.3V6M @ PC1184 1U_0201_6.3V6M 1 PC1177 1U_0201_6.3V6M 2 PC1167 1U_0201_6.3V6M PC1156 1U_0201_6.3V6M PC1157 1U_0201_6.3V6M 1 PC1136 1U_0201_6.3V6M PC1146 1U_0201_6.3V6M 2 PC1147 1U_0201_6.3V6M PC1126 1U_0201_6.3V6M PC1127 1U_0201_6.3V6M PC1137 1U_0201_6.3V6M 2 PC1114 22U_0603_6.3V6M PC1115 22U_0603_6.3V6M PC1104 22U_0603_6.3V6M PC1105 22U_0603_6.3V6M 1 @ PC1186 1U_0201_6.3V6M Security Classification Issued Date PC1188 1U_0201_6.3V6M 2 PC1179 1U_0201_6.3V6M PC1180 1U_0201_6.3V6M PC1168 1U_0201_6.3V6M PC1169 1U_0201_6.3V6M 2 PC1159 1U_0201_6.3V6M PC1170 1U_0201_6.3V6M PC1158 1U_0201_6.3V6M PC1160 1U_0201_6.3V6M 1 2 PC1149 1U_0201_6.3V6M 2 2 1 2 PC1106 22U_0603_6.3V6M 1 @ @ PC1117 22U_0603_6.3V6M PC1107 22U_0603_6.3V6M PC1130 1U_0201_6.3V6M PC1140 1U_0201_6.3V6M PC1116 22U_0603_6.3V6M PC1129 1U_0201_6.3V6M PC1139 1U_0201_6.3V6M PC1150 1U_0201_6.3V6M PC1128 1U_0201_6.3V6M PC1138 1U_0201_6.3V6M PC1148 1U_0201_6.3V6M PC1118 22U_0603_6.3V6M 2 PC1108 22U_0603_6.3V6M @ PC1189 1U_0201_6.3V6M PC1190 1U_0201_6.3V6M PC1181 1U_0201_6.3V6M PC1182 1U_0201_6.3V6M PC1171 1U_0201_6.3V6M PC1161 1U_0201_6.3V6M PC1172 1U_0201_6.3V6M PC1162 1U_0201_6.3V6M PC1141 1U_0201_6.3V6M PC1151 1U_0201_6.3V6M 2 PC1152 1U_0201_6.3V6M PC1131 1U_0201_6.3V6M 1 PC1132 1U_0201_6.3V6M PC1142 1U_0201_6.3V6M PC1119 22U_0603_6.3V6M PC1109 22U_0603_6.3V6M PC1120 22U_0603_6.3V6M PC1110 22U_0603_6.3V6M Compal Secret Data 2 +VCC_GT 2016/01/29 @ PC1649 22U_0603_6.3V6M PC1203 1U_0201_6.3V6M 2 PC1205 1U_0201_6.3V6M PC1206 1U_0201_6.3V6M Title PC1208 1U_0201_6.3V6M PC1209 1U_0201_6.3V6M PC1198 22U_0603_6.3V6M PC1199 22U_0603_6.3V6M PC1200 22U_0603_6.3V6M @ PC1201 22U_0603_6.3V6M @ PC1202 22U_0603_6.3V6M PC1192 22U_0603_6.3V6M PC1193 22U_0603_6.3V6M PC1194 22U_0603_6.3V6M PC1195 22U_0603_6.3V6M 2 PC1122 22U_0603_6.3V6M @ PC1651 22U_0603_6.3V6M PC1641 22U_0603_6.3V6M 1 PC1191 22U_0603_6.3V6M 2 @ @ PC1652 22U_0603_6.3V6M @ PC1653 22U_0603_6.3V6M 2 PC1644 22U_0603_6.3V6M @ PC1655 22U_0603_6.3V6M 2 PC1643 22U_0603_6.3V6M @ PC1654 22U_0603_6.3V6M PC1642 22U_0603_6.3V6M PC1645 22U_0603_6.3V6M @ @ PC1656 22U_0603_6.3V6M PC1646 22U_0603_6.3V6M @ PC1647 22U_0603_6.3V6M PC1196 22U_0603_6.3V6M @ PC1648 22U_0603_6.3V6M Sheet 54 of Compal Electronics, Inc C5PM2 M/B LA-E361P CPU CAP Friday, October 28, 2016 Size Document Number Custom Date: PC1207 1U_0201_6.3V6M PC1197 22U_0603_6.3V6M Total VCCSA Output Capacitor: 10(+2) X 22uF_0603 X 1uF_0201 2017/01/10 PC1204 1U_0201_6.3V6M @ PC1650 22U_0603_6.3V6M 2 PC1121 22U_0603_6.3V6M 2 +VCC_SA Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PC1187 1U_0201_6.3V6M PC1178 1U_0201_6.3V6M Common part SGA00009S00 2 PC1166 1U_0201_6.3V6M Total VCCGT Output Capacitor: X 220uF 18 X 22uF_0603_X5R 68 X 1uF_0201 PC1185 1U_0201_6.3V6M PC1176 1U_0201_6.3V6M 61 R ev 1.0 D C B A +19VB_CPU PC898 2 D1 D1 G1 5*5*3 SH000015M00->SH00001ED00 S2 S2 Common part PL809 0.47UH_MMD05CZR47M_12A_20% SW _+VCC_SA 10 +VCC_SA PQ811 AON7934_DFN3X3A8-10 @EMI@ PR900 4.7_1206_5% LG_+VCC_SA CSN_1PH SNB_SA 2.2U_0402_6.3V6M 0.47UH Rdc=4m~4.2mohm DRVL D1 10U_0805_25V6K D VCC D2/S1 PC866 2 GND +5VALW SW PWM EN G2 DRON SW _+VCC_SA S2 8 PW M1_1PH/ICCMAX1 DRVH BST PAD BST_+VCC_SA D1 PU808 NCP81253MNTBG_DFN8_2X2 HG_+VCC_SA D PC899 0.22U_0603_25V7K BST_R_+VCC_SA 105 PR901 0_0603_5% 10U_0805_25VAK PC865 @EMI@ PC900 680P_0603_50V7K SW_1PH C C B B Function Field : Drivers - 36.2 Rest of support elements - 36.3 A Compal Electronics, Inc Compal Secret Data Security Classification 2016/01/29 Issued Date Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title C5PM2 M/B LA-E361P Size Document Number Custom Rev 1.0 VCCSA Date: A Friday, October 28, 2016 Sheet 55 of 61 E D C B A +19VB PJ1301 PQ1301 AON6428_POW ERDFN56-8-5 PR1312 10K_0402_5% 1.35VS_DGPU_FB 2 PC1307VGA@ 1U_0603_6.3V6M PQ1303 AON6794_POW ERDFN56-8-5 + ->290KHz ->340KHz ->380KHz PR1314 100_0402_1% + 2 PC1308 680P_0603_50V7K @VGA_EMI@ PR1307 1 18.7K_0402_1% PR1308 20K_0402_1% 0_0402_5% PR1311 10K_0402_1% FB_VDDQ_SENSE PQ1302 2N7002KW _SOT323-3 G VRAM_VDD_CTL PR1305 4.7_1206_5% @VGA_EMI@ @VGA@ PR1313 0_0402_5% VGA@ D @VGA@ PC1309 0.1U_0402_16V7K PR1309 @ VGA@ +1.35VSDGPUP VGA@ PC1311 220U_D2 SX_2VY_R9M RT8237EZQW (2)_W DFN10_3X3 VGA@ PR1306 200K_0402_1% VGA@ Rrf=470K Rrf=200K Rrf=100K PR1310 90.9K_0402_1% LGATE_1.35VSDGPUP 11 SNB_1.35VSDGPUP +5VALW VGA@ PC1301 220U_D2 SX_2VY_R9M TP LGATE LX_1.35VSDGPUP 7*7*3 VGA@ PL1301 0.82UH PCMC063T-R82MN 13A_20% 2 RF VCC HGATE_1.35VSDGPUP PHASE FB UGATE EN 1 2 1M_0402_1% PR1304 VGA@ PC1306 0.1U_0402_16V7K @VGA@ CS 10 BOOT PC1305 0.1U_0603_25V7K 1 1.35VS_DGPU_EN 1.35VSDGPU_PW R_EN PGOOD 1 2 VGA@ PR1301 59K_0402_1% 2ILMT_1.35VSDGPUP PR1303 VGA@ 40.2K_0402_1% BST_1.35VSDGPUP JUMP_43X79 @ VGA@ @ PR1302 0_0603_5% PU1301 +3VS 10U_0805_25V6K PC1304 VGA@ 1.35VS_DGPU_PG @VGA_EMI@ PC1303 0.1U_0402_25V6 VGA_EMI@ PC1302 2200P_0402_50V7K 10U_0805_25V6K PC1310 VGA@ +19VB_1.35VSDGPUP VGA@ VFB=0.704V Vout=0.704V* (1+Rup/Rdown) S Vout=0.704V* (1+(18.7/20))=1.36 0.97% Vout=0.704V* (1+(18.7/(20//93.1)))=1.5 Vout=0.704V* (1+(18.7/(20//90.9)))=1.524 Vout=0.704V* (1+(18.7/(20//88.7)))=1.548 0.03% 1.62% 3.23% @ +1.35VSDGPUP PJ1302 2 +1.35VSDGPU JUMP_43X118 Rds on 2.8 / 3.5mohm Rlimt=59K Iocp=23.21~26.01A @ PJ1303 2 JUMP_43X118 4 Compal Secret Data Security Classification Issued Date 2016/01/29 Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size A3 Date: Compal Electronics, Inc VRAM Document Number Rev 1.0 C5PM2 M/B LA-E361P Friday, October 28, 2016 Sheet 56 of 61 E D C B A 1 Function Field : PWR.Plane.Regulator_1.05VDGPU - 43.7 Rest of support elements - 43.8 @ PJ1402 JUMP_43X39 2 PC1406 0.22U_0603_10V7K PR1402 0_0603_5% BST_1.05V BST_1.05V_R @EMI@ PR1403 4.7_1206_5% @EMI@ PC1407 680P_0402_50V7K SNB_1.05V PR1408 20K_0402_1% 11 PC1415 2.2U_0603_10V6K VFB=0.6V Vout=0.6V* (1+Rup/Rdown) =0.6V* (1+13.7/20) Vout=1.011V @ 2 PC1410 22U_0603_6.3V6M @ PC1414 22U_0603_6.3V6M 1 FB_1.05V PC1413 22U_0603_6.3V6M FB 2 PGOOD VCC PR1406 13.7K_0402_1% PC1412 BOOT SW1 +1.0VSDGPUP PC1411 22U_0603_6.3V6M SW2 +3VS 10K_0402_5% VCC_1.05V LX_1.05V @ cont i nuous 4A current limit 5A(min) PR1407 10 Confirm HW the pull high resistor VBYP PC1408 2.2U_0603_10V6K PGND 1VS_DGPU_PG PL1402 1UH_6.6A_20%_5X5X3_M SW3 5.1_0402_1% EN +1.0VSDGPU PR1405 1 +5VALW VIN 5*5*3 PU1401 RT6219AGQW_WDFN10_3X3 EN pin don't floating If have pull down resistor at HW side, pls delete PR4 (Common Part) @ PC1401 0.1U_0402_25V6 1M_0402_1% PR1404 @ PJ1401 JUMP_43X79 2 +1.0VSDGPUP SH00000Z200 PC1409 22U_0603_6.3V6M PC1404 10U_0805_25V6K EN_1.05V 22P_0402_50V8J VGA_CORE_S_EN EMI@PC1403 2200P_0402_50V7K PR1401 0_0402_5% High >1.45V PC1405 10U_0805_25V6K +19VB_1.05V @EMI@PC1402 0.1U_0402_25V6 +19VB_CPU Switching frequency is 500KHz 3 PR7(Rup) + PR8(Rdown) < 8Kohm, if your project has output voltage leakage concern when EN is low 4 Compal Secret Data Security Classification Issued Date 2016/01/29 Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size C Date: A B C D Compal Electronics, Inc 1.05VSDGPU Document Number Rev 1.0 C5PM2 M/B LA-E361P Friday, October 28, 2016 Sheet E 57 of 61 +19VB_GPU_NVVDD +19VB NCP81278_NVVDD_V1A.mdd for IC portion NCP81278_NVVDD_V1B.mdd for SW portion NVVDD_LG2 NVVDD_SW1 NVVDD_SW2 1 PC1511 0.22U_0603_25V7K PC1508 100U_25V_NC_6.3X6 PC1507 10U_0805_25VAK PC1506 10U_0805_25VAK PC1505 10U_0805_25VAK PC1504 10U_0805_25VAK 1 S2 AON6992_DFN5X6D-8-7 D1 G1 G2 S2 S2 @EMI@ PC1512 S2 AON6992_DFN5X6D-8-7 D1 S2 S2 G1 G2 2200P_0603_50V7K 2 1 49.9_0402_1% PC1523 10U_0805_25VAK PC1522 10U_0805_25VAK PC1521 10U_0805_25VAK PC1520 10U_0805_25VAK +VGA_CORE PC1526 Place close to GPU @EMI@ R1, R2, R3, R4, R5, C are based on VGA type to set @EMI@ PR1523 2.2_1206_1% SH00000NM00 AP PCMB104T-R22MS0R825 SH00000QZ00 AP MMD-10DZ-R22MEX2L S2 S2 S2 G2 D2/S1 2200P_0603_50V7K PL1502 0.22UH_MMD-10DZ-R22MES1L 35A_20% D1 G1 PQ1504 S2 NVVDD_SW2 AON6992_DFN5X6D-8-7 D1 D2/S1 S2 S2 VSSSENSE_VGA 100_0402_5% PQ1503 PR1524 VCCSENSE_VGA NVVDD_HG2 Avoid high dV/dt NVVDD_HG2 @ 100_0402_5% +VGA_CORE G1 PR1521 G2 @ PR1520 0_0402_5% 2 @ 1 1000P_0402_25V AON6992_DFN5X6D-8-7 PC1524 0.01U_0402_16V PC1515 47P_0402_50V8J PC1517 EMI@ PC1519 2200P_0402_50V7K 2 1 @EMI@ PC1518 0.1U_0402_25V6 2 NVVDD_FS PR1514 PR1513 10K_0402_5% Fs=400KHz 2 PC1525 4700P_0402_50V7K PC1514 100P_0402_50V8J +19VB_GPU_NVVDD PR1512 39.2K_0402_1% 4700P_0402_50V7K PC1516 PR1517 NVVDD_FBRTN 10 21 16.5K_0402_1% 1 PR1515 4.32K_0402_1% PR1516 6.19K_0402_1% 10P_0402_25V8J PC1513 20.5K_0402_1% NVVDD_LG1 NVVDD_LG1 @EMI@ PR1506 2.2_1206_1% 105 PR1522 D2/S1 105 C @ PR1508 75K_0402_1% NVVDD_FB PR1519 0_0402_5% R2 1 11 NVVDD_VREF PR1518 309_0402_1% NVVDD_COMP 12 D2/S1 105 R5 VGA_CORE_PG 13 R3 NVVDD_HG2 14 PQ1502 105 R4 PR1504 100K_0402_5% NVVDD_BST2 15 FB NVVDD_REFIN PQ1501 PR1511 82.5K_0402_1% VID FBRTN PGOOD COMP/OPT NVVDD_VIDBUF R1 NVVDD_HG1 NVVDD_HG1 PH2 18 16 17 LG2 EN PSI @ PR1510 0_0402_5% Avoid high dV/dt PVCC HG2 FS 19 20 PH1 NVVDD_VID_R DGPU_VID BST2 GND @ PR1509 10K_0402_1% PC1510 0.22U_0603_25V7K PR1503 2.2_0603_1% BST1 VREF NVVDD_PSI_R PL1501 0.22UH_MMD-10DZ-R22MES1L 35A_20% PU1501 NCP81278MNTXG_QFN20_3X3 HG1 REFIN NVVDD1_EN LG1 2 1 NVVDD_HG1 PR1507 0_0402_5% (Common Part) SF000007100 100U 25V M 6.3X6 2.2_0603_1% PR1502 NVVDD_BST1 @ +3VS +1.8VS @ PR1505 10K_0402_1% @ JUMP_43X118 @ NVVDD_SW1 2 @ PC1501 0.1U_0402_16V7K + +VGA_CORE 0_0402_5% EMI@ PC1503 2200P_0402_50V7K 1 PC1509 NVVDD_LG1 PR1501 @ DGPU_PSI 4.7U_0603_6.3V EN can't float VGA_CORE_EN VIDBUF 105 High: >1.5V Low: Module model information NVVDD_LG2 NVVDD_LG2 +NVVDD1 TDC 63A Peak Current 90A OCP >108A Please base on GPU spec to calculate Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2016/01/29 Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title VGA_CORE Size Document Number Rev 1.0 C5PM2 M/B LA-E361P Date: Friday, October 28, 2016 Sheet 58 of 61 Module model information NCP81278_NVVDDS_V1A.mdd for IC portion NCP81278_NVVDDS_V1B.mdd for SW portion +19VB_GPU_NVVDDS A +19VB A PJ1601 PC1606 10U_0805_25V6K PC1605 10U_0805_25V6K 1 S2 S2 AON6992_DFN5X6D-8-7 D1 G1 S2 G2 S2 S2 AON6992_DFN5X6D-8-7 D1 G1 S2 G2 +VGA_CORE_S PC1611 47P_0402_50V8J B 10*10*4 SH00000QZ00 PC1613 @EMI@ 2 PC1610 2 PR1611 @EMI@ PR1610 2.2_1206_1% 2200P_0603_50V7K 2 D2/S1 NVVDDS_LG1 @ PR1617 0_0402_5% 1 1000P_0402_25V @ PR1618 0_0402_5% 100_0402_5% +VGA_CORE_S Avoid high dV/dt PR1622 C PL1601 0.22UH_MMD-10DZ-R22MES1L 35A_20% PC1608 10P_0402_25V8J PC1609 100P_0402_50V8J PC1615 4700P_0402_50V7K C PR1606 75K_0402_1% PR1620 PR1621 20.5K_0402_1% D2/S1 @ 1 2 R2 1 11 PR1609 82.5K_0402_1% NVVDDS_COMP 12 Fs=400KHz PC1614 0.01U_0402_16V PR1619 309_0402_1% VGA_CORE_S_PG 13 PQ1602 49.9_0402_1% NVVDDS_VREF 4700P_0402_50V7K PC1612 PR1616 R5 NVVDDS_SW1 14 PR1613 10K_0402_5% PR1612 39.2K_0402_1% 2 R4 16.5K_0402_1% PR1615 4.32K_0402_1% PR1614 6.19K_0402_1% NVVDDS_REFIN PQ1601 15 NVVDDS_VIDBUF FBRTN FS 1NVVDDS_FS B R3 PH2 18 FB Avoid high dV/dt R1 16 17 LG2 VID 0_0402_5% VREF COMP/OPT PVCC 19 LG1 20 PSI DGPU_S_VID PGOOD GND HG2 HG1 EN 21 PR1608 10K_0402_1% @ PR1604 100K_0402_5% 10 @ PR1607 BST2 REFIN NVVDDS_HG1 PU1601 NCP81278MNTXG_QFN20_3X3 BST1 NVVDDS_BST1 NVVDD2_EN PR1605 0_0402_5% PH1 2.2_0603_1% @ PR1603 10K_0402_1% @ +3VS PR1602 VIDBUF @ PC1601 0.1U_0402_16V7K +1.8VS DGPU_PSI PR1601 0_0402_5% JUMP_43X118 @ PC1607 0.22U_0603_25V7K @ 1 VGA_CORE_S_EN EN can't float @ EMI@ PC1604 2200P_0402_50V7K @ NVVDDS_HG1 High: >1.5V Low: 50A Please base on GPU spec to calculate Place close to GPU R1, R2, R3, R4, R5, C are based on VGA type to set D D Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2016/01/29 Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title VGA_CORE_S Size Document Number Rev 1.0 C5PM2 M/B LA-E361P Date: Friday, October 28, 2016 Sheet 59 of 61 VGA@ PC1775 220U_D2 SX_2VY_R9M @ PC1774 220U_D2 SX_2VY_R9M VGA@ PC1773 220U_D2 SX_2VY_R9M VGA@ PC1772 220U_D2 SX_2VY_R9M VGA@ PC1771 220U_D2 SX_2VY_R9M VGA@ PC1770 220U_D2 SX_2VY_R9M VGA@ PC1778 220U_D2 SX_2VY_R9M VGA@ PC1777 220U_D2 SX_2VY_R9M VGA@ PC1776 220U_D2 SX_2VY_R9M VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 2 2 2 1 1 1 1 VGA@ VGA@ VGA@ 2 2 VGA@ VGA@ 1 1 VGA@ VGA@ PC1756 1U_0402_6.3V6K PC1755 1U_0402_6.3V6K VGA@ PC1754 1U_0402_6.3V6K PC1765 22U_0805_6.3V6M PC1764 22U_0805_6.3V6M PC1763 22U_0805_6.3V6M PC1762 22U_0805_6.3V6M PC1761 22U_0805_6.3V6M PC1760 22U_0805_6.3V6M PC1759 22U_0805_6.3V6M VGA@ PC1769 220U_D2 SX_2VY_R9M PC1753 1U_0402_6.3V6K VGA@ VGA@ VGA@ 2 2 2 2 1 1 1 1 @ @ @ VGA@ VGA@ PC1743 4.7U_0603_6.3V6K VGA@ PC1742 4.7U_0603_6.3V6K VGA@ PC1741 4.7U_0603_6.3V6K VGA@ PC1740 4.7U_0603_6.3V6K PC1752 1U_0402_6.3V6K PC1751 4.7U_0603_6.3V6K PC1750 4.7U_0603_6.3V6K PC1749 22U_0805_6.3V6M PC1748 22U_0805_6.3V6M PC1747 22U_0805_6.3V6M PC1746 10U_0603_6.3V6M PC1758 22U_0805_6.3V6M VGA@ @ @ PC1768 22U_0805_6.3V6M @ PC1767 22U_0805_6.3V6M VGA@ PC1766 22U_0805_6.3V6M VGA@ PC1726 10U_0603_6.3V6M PC1739 4.7U_0603_6.3V6K VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 2 2 2 2 1 1 1 1 VGA@ VGA@ PC1738 4.7U_0603_6.3V6K PC1737 4.7U_0603_6.3V6K PC1736 4.7U_0603_6.3V6K PC1735 4.7U_0603_6.3V6K PC1734 4.7U_0603_6.3V6K PC1733 4.7U_0603_6.3V6K PC1732 4.7U_0603_6.3V6K PC1731 4.7U_0603_6.3V6K PC1745 10U_0603_6.3V6M PC1757 22U_0805_6.3V6M VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 2 2 2 2 1 1 1 1 VGA@ VGA@ PC1714 22U_0805_6.3V6M VGA@ PC1713 22U_0805_6.3V6M VGA@ PC1712 22U_0805_6.3V6M VGA@ PC1711 22U_0805_6.3V6M PC1725 10U_0603_6.3V6M PC1724 4.7U_0603_6.3V6K PC1723 4.7U_0603_6.3V6K PC1722 4.7U_0603_6.3V6K PC1721 4.7U_0603_6.3V6K PC1720 4.7U_0603_6.3V6K PC1719 4.7U_0603_6.3V6K PC1718 4.7U_0603_6.3V6K PC1717 4.7U_0603_6.3V6K PC1730 4.7U_0603_6.3V6K Under GPU PC1744 10U_0603_6.3V6M 61 of 60 Sheet Friday, October 28, 2016 Date: C5PM2 M/B LA-E361P Rev 1.0 Document Number Size VGA DECOUPLING THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC C PC1729 4.7U_0603_6.3V6K 2 2 + + + Title 2017/01/10 Deciphered Date 2016/01/29 Issued Date 1 Compal Electronics, Inc Compal Secret Data Security Classification VGA@ PC1710 22U_0805_6.3V6M VGA@ PC1709 1U_0402_6.3V6K VGA@ PC1708 1U_0402_6.3V6K VGA@ PC1707 1U_0402_6.3V6K VGA@ PC1706 1U_0402_6.3V6K VGA@ PC1705 1U_0402_6.3V6K VGA@ PC1704 1U_0402_6.3V6K VGA@ PC1703 1U_0402_6.3V6K PC1716 4.7U_0603_6.3V6K PC1715 4.7U_0603_6.3V6K 2 2 2 VGA@ PC1702 1U_0402_6.3V6K PC1701 1U_0402_6.3V6K + + + + + + + 1 1 1 B B Under GPU Under GPU Under GPU C D +VGA_CORE_S 470uF X 22uF_0603_X5R X 10uF_0603 X 4.7uF_0603 X5 1uF_0402 X D Under GPU +VGA_CORE_S +VGA_CORE 470uF X 330uFX2 4.7uF_0603 X 22 22uF_0603 X 10uF_0603X 1uF_0402 X +VGA_CORE A A Version change list (P.I.R List) Item Fixed Issue Page of for PWR Reason for change Rev Modify List PG# D SPEC current down so change IC 0.1 P50 01 change common part 0.1 P47 P58 C CPU Transient Test improve VRAM 1.05VSDGPU Transient Test improve 0.1 0.1 P52 P54 P56 P57 P59 P60 B 0727 0727 EVT PR844 SD034750280-> SD034787280 S RES 1/16W 78.7K +-1% 0402 PR845 SD034750280-> SD034787280 S RES 1/16W 78.7K +-1% 0402 PR852 SD034226280-> SD034232280 S RES 1/16W 23.2K +-1% 0402 PR867 SD034348280-> SD034374280 S RES 1/16W 37.4K +-1% 0402 PR868 SD000003580-> SD034255280 S RES 1/16W 25.5K +-1% 0402 PR871 SD034137280-> SD00000AJ80 S RES 1/16W 12.4K +-1% 0402 PR875 SD034100180-> SD034150180 S RES 1/16W 1.5K +-1% 0402 PC807 SE074102K80-> SE000003W00 S CER CAP 820P 50V K X7R 0402 PC809 SE074103K80-> SE074104K80 S CER CAP 0.1U 50V K X7R 0402 PC820 SE074103K80-> SE074104K80 S CER CAP 0.1U 50V K X7R 0402 PC868 SGA20331E10->SGA20221D40 S POLY C 330U 2V Y D2 LESR9M EEFSX H1.9 PC876 SGA20331E10->SGA20221D40 S POLY C 220U 2V Y D2 SX LESR9M H1.9 PL809 SH000015M00-> SH00001ED00 S COIL 47UH 20% MMD-05CZ-R47MEV1L 12.2A PQ801 PQ803 PQ805 PQ807 PQ809 SB000017L00->SB000017400 S TR MDU5692SVRH 2N DUAL PDFN56-8 C Del: PC1013 PC1016 PC1020 PC1021 PC1025 PC1026 PC1027 PC1028 PC1029 PC1030 PC1103 PC1106 PC1107 PC1109 PC1111 PC1112 PC1114 PC1117 PC1122 PC1646 PC1647 PC1649 PC1651 SE00000M000 S CER CAP 22U 6.3V M X5R 0603 Add: PC869 SGA20221D40 S POLY C 220U 2V Y D2 SX LESR9M H1.9 0727 change: PC1301 SF000004J00 SGA20221D40 S POLY C 220U 2V Y D2 SX LESR9M H1.9 PR1306 SD034470380 SD034200380 S RES 1/16W 200K +-1% 0402 Del: PC1410 SE00000M000 S CER CAP 22U 6.3V M X5R 0603 PC1413 SE00000M000 S CER CAP 22U 6.3V M X5R 0603 PC1414 SE00000M000 S CER CAP 22U 6.3V M X5R 0603 Add: PC1311 SGA20221D40 S POLY C 220U 2V Y D2 SX LESR9M H1.9 EVT 0727 EVT S TR AON6992 2N DFN5X6D S RES 1/16W 10K +-1% 0402 S RES 1/16W 75K +-1% 0402 S ELE CAP 100U 25V M 6.3X6 S CER CAP 10U 25V K X5R 0805 H0.85 S CER CAP 10U 25V K X5R 0805 H0.85 Add: PC1769 PC1771 PC1773 PC1775 PC1776 PC1778 SGA20221D40 S POLY C 220U 2V Y D2 SX LESR9M H1.9 PR1608 SD034100280 S RES 1/16W 10K +-1% 0402 0727 EVT B PU301_SA00008OM00_BQ24780S -> SA0000A6B00_BQ24781 CPU NVVDD NVVDDS input Cap 85度->105 度 09/14 PC809,PC820 SE074104K80_0.1uF_0402_50V -> SE076104K80_0.1uF_0402_16V PC1505,PC1506,PC1507,PC1521,PC1522,PC1523,PC844,PC845,PC846,PC848,PC849,PC850,PC856,PC857,PC858,PC859,PC860,PC865 SE00000QK00_10uF_0805_25V X5R -> SE000010S00_10uF_0805_25V X6S PU7102,PU7103 SA00001HW80_G971ADJF11U_SO8 -> SA000034S00_APL5930KAI-TRG 0.2 0ohm >R-SHORT EVT Add: PC323 PC518 PC882 PC885 PC888 PC891 PC894 SE025681K80 S CER CAP 680P 50V K X7R 0603 PL302 PL303 PL501 PL801 PL808 SM01000P200 S SUPPRE_ TAI-TECH HCB2012KF-121T50 0805 PR319 PR504 PR7203 PR882 PR885 PR888 PR891 PR894 SD001470B80 S RES 1/4W 4.7 +-5% 1206 0.1 EMI request Phase D change: PL1501 SH00001EA00 -> SH00000QZ00 S COIL 22UH +-20% MMD-10DZ-R22MES1L 35A PL1502 SH00001EA00 -> SH00000QZ00 S COIL 22UH +-20% MMD-10DZ-R22MES1L 35A PL1601 SH00001EA00 -> SH00000QZ00 S COIL 22UH +-20% MMD-10DZ-R22MES1L 35A PL404 SH000016800 -> SH000016700 S COIL 1.5UH +-20% 9A 7X7X3 MOLDING Del: PQ1601 SB000017L00 PR1603 SD034100280 PR1606 SD034750280 PC1508 SF000007100 PC1616 SE00000QK00 PC1617 SE00000QK00 VGA Transient Test improve & SPEC CURRENT down 0.1 Date change: PC7108 SE00000M000 -> SE107475K80 S CER CAP 4.7U 6.3V K X5R 0603 PC7109 SE071680J80 -> SE075103K80 S CER CAP 01U 25V K X7R 0402 PC7202 SE00000G880 -> SE042104K80 S CER CAP 1U 25V K X7R 0603 PC7207 SE00000G880 -> SE074222K80 S CER CAP 2200P 50V K X7R 0402 PC7208 SE00000X200 -> SE00000QK00 S CER CAP 10U 25V K X5R 0805 H1.25 PR7115 SD034324280 -> SD034215280 S RES 1/16W 32.4K +-1% 0402 PR7118 SD028470280 -> SD028100480 S RES 1/16W 47K +-5% 0402 PR7201 SD034100480 -> SD028100480 S RES 1/16W 1M +-5% 0402 PR7202 SD00000J180 -> SD013000080 S RES 1/10W +-5% 0603 PR7208 SD028000080 -> SD028100180 S RES 1/16W 1K +-5% 0402 PU7102 SA00007QP00 -> SA00001HW80 S IC G971ADJF11U SO 8P PU7201 SA000085O00 -> SA00008I400 S IC SY8288RAC QFN 20P PWM Del: PC7111 SE00000M000 S CER CAP 22U 6.3V M X5R 0603 PL7102 SH00000YG00 S COIL 1UH +-30% 2.8A 4X4X2 FERRITE PR7109 SD028000080 S RES 1/16W +-5% 0402 PR7112 SD028100380 S RES 1/16W 100K +-5% 0402 PR7204 SD028000080 S RES 1/16W +-5% 0402 PR7205 SD034200280 S RES 1/16W 20K +-1% 0402 PR7206 SD034200280 S RES 1/16W 20K +-1% 0402 Add: PC7201 SE00000G880 S CER CAP 0.1U 25V K X5R 0402 PC7203 SE025681K80 S CER CAP 680P 50V K X7R 0603 PC7210 SE000000K80 S CER CAP 1U 6.3V K X5R 0402 PC7211 SE00000M000 S CER CAP 22U 6.3V M X5R 0603 PC7212 SE00000M000 S CER CAP 22U 6.3V M X5R 0603 PC7218 SE000008880 S CER CAP 2.2U 6.3V M X5R 0402 PR7211 SD034100080 S RES 1/16W 100 +-1% 0402 PR7212 SD034100A80 S RES 1/16W 10 +-1% 0402 PR7215 SD034205280 S RES 1/16W 20.5K +-1% 0402 PR7216 SD034100080 S RES 1/16W 100 +-1% 0402 PR7218 SD034120280 S RES 1/16W 12K +-1% 0402 DVT Del: PR801,PR804,PR823,PR834,PR856,PR854,PR866,PR861,PR886,PR892,PR607,PR7209, PR7210,PR1309,PR1501,PR1507,PR1510,PR1520,PR1519,PR1601,PR1607,PR1617,PR1618 SD028000080_0_0402_5% to unpop Add PC105_SE042104K80_0.1U 25V K X7R 0603(EMI) PC205 SE042104K80_0.1U_0603_25V7K PH202 PH203 SL200002H00_100K_0402_1%_NCP15WF104F03RC PR214 PR215 SD034215280_21.5K_0402_1% PR216 PR218 SD034100280_10K_0402_1% PR213 SD034100380_100K_0402_1% PU201 SA00003K300_G718TM1U_SOT23-8 Add thermal PH2 PH3 EMI request Remove thermal PH2 Setting PH1 95度 /P H3 85 度 Dell: PH202_100K_0402_NTC_SL200002H00 PR214_21.5K_0402_SD034215280 change: PQ201_BSS138LT1G_SB00000QO00 > LBSS139LT1G_SB00001GD00 PR204_18.7K_0402_SD034187280 >15.4K_0402_SD034154280 PR218_10K_0402_SD034100280 >14K_0402_SD034140280 PR215_21.5K_0402_SD034215280 >26.7K_SD034267280 0.2 A 09/23 2016/01/29 2017/01/10 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc PIR Size Document Number Custom R ev 1.0 C5PM2 M/B LA-E361P Date: DVT A Compal Secret Data Security Classification Issued Date PR216_10K_0402_SD034100280 Friday, October 28, 2016 Sheet 61 of 61 ... SM 01 0 00 P 200 ACES_ 502 99 -00 6 01 - 0 01 EMI@ PL 102 HCB2 01 2 KF -12 1T 50_ 0 805 3PIN'-' @ +19 V_VIN EMI@ PC 102 10 0P _06 03_50V8 3PIN'+' 2 01 6 0 216 E D C B A EMI@ PC 104 10 00P _06 03_50V7K PJP1 01 2 +3VLP @ PR1 01 0_ 0 402 _5%... D SB5 01 3 80 0 10 (BSS138LT1G Del) (Common Part) SL 200 002 H 00 PR 212 10 0K _04 02_5% ACES_ 504 58- 01 0 01 - P 01 _ 10P-T G 718 TM1U_SOT23-8 1 10 11 12 +3VLP VCC TMSNS1 PH 202 10 0K _04 02 _1% _NCP15WF 104 F03RC 10 GND... GND 14 1 14 2 14 7 14 8 15 3 15 4 15 9 16 0 16 3 +0. 6VS_VTT 258 +2.5V 257 259 99 10 2 10 3 10 6 10 7 16 7 16 8 17 1 17 2 17 5 17 6 18 0 18 1 18 4 18 5 18 8 18 9 19 2 19 3 19 6 19 7 2 01 202 205 206 209 2 10 213 214 217 218