Acer aspire ES1 532g compal LA d921p rev 1 0 схема

A B C D E Model Name : B5V1L File Name : LA-D921P 1 Compal Confidential Braswell M/B Schematics Document 2 Intel Braswell-M DIS B5V1L LA-D921P REV:1.0 2016-05-04 3 PCB@ ZZZ PCB B5V1L LA-D921P LS-D671P Part Number DAZ1QA00100 Description PCB B5V1L LA-D921P LS-D671P 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 2017/12/24 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Cover Page Size Document Number Custom Date: A B C D R ev 1.0 B5V1L_Braswell-M/B_LA-D921P Wednesday, May 11, 2016 Sheet E of 52 A B C D E Fan Control page 35 eDP HDMI Conn 204pin DDR3L-SO-DIMM X1 USB 2.0 conn x1 Port page 14 page 25 Memory BUS page 24 Port NGFF BT Single Channel PS8407A eDP 1.35V DDR3L 1333/1600 Card Reader RTS5170 SD only USB port on Sub/B page 25 DDI2 HDMI x lanes with active level shift Nvidia N16V-GMR1 with DDR3 x8 page 15~23 page 27 NGFF WLAN PCIe 1.0 2.5GT/s DDI Braswell-M USB 2.0 conn x1 CMOS Camera USB port USB port USB port SDIO eMMC page 32 Reserve Touch Screen SOC PCIe 2.0 x 5GT/s FCBGA 1170 Pin page 31 SATA3.0 USBx5 page 31 page 24 USB HUB I2C (PORT2) USB port port 0/1 port USB port page 24 page 29 48MHz 6.0 Gb/s PCIe 1.0 2.5GT/s SATA0 HD Audio page 06~13 port 24MHz SATA HDD Conn LAN(GbE) Realtek 8111H HDA Codec ALC233page 28 SPI page 26 USB 3.0 conn x1 LPC BUS RJ45 conn page 30 SPI ROM 64Mb page CLK=24MHz ENE KB9022 page 33 Sub Board LS-D671 IO/B Int.KBD TPM NPCT650LA0YX page QFN32 Int Speaker Int AMIC page 28 UAJ page 28 on Sub/B page 31 34 Touch Pad PS2 (from EC) / I2C (from SOC) page 31 page 34 page 34 DC/DC Interface page 36 4 Power Circuit DC/DC page 37~49 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title B C D Rev 1.0 B5V1L_Braswell-M/B_LA-D921P Date: A Block Diagrams Size Document Number Custom Wednesday, May 11, 2016 Sheet E of 52 A B C Voltage Rails E Board ID / SKU ID Table for AD channel Power Plane S0 S3 S4/S5 19V Adapter power supply ON ON ON BATT+ 12V Battery power supply ON ON ON +19VB AC or battery power rail for power circuit (19V/12V) ON ON ON +19V_VIN D Description BOARD ID Table_LA-D9211P Board ID 01 02 03 04 PCB Revision EVT_LA-D921PR01 PVT_LA-D921PR10 +RTCVCC RTC Battery Power ON ON ON +1.05VALW +1.05v Always power rail ON ON OFF +1.15VALW +1.15v Always power rail ON ON OFF +1.24VALW +1.24v Always power rail ON ON OFF +1.8VALW +1.8v Always power rail ON ON OFF +3VALW +3.3v Always power rail ON ON OFF +5VALW +5.0v Always power rail ON ON ON +1.35V +1.35V power rail for DDR3L ON ON OFF +3V_PTP +3.3V power rail for PTP ON ON OFF +SOC_VCC Core voltage for SOC ON OFF OFF +SOC_VGG GFX voltage for SOC ON OFF OFF +0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF +1.8VS +1.8v system power rail ON OFF OFF +3VS +3.3v system power rail ON OFF OFF +5VS +5.0v system power rail ON OFF OFF +1.05VSDGPU +1.05VS power rail for GPU ON OFF OFF +1.5VSDGPU +1.5VS power rail for GPU ON OFF OFF 43 Level +3VSDGPU_AON +3VS power rail for GPU(AON rails) ON OFF OFF 431A35BOL01 B5V1L QK0J VGMR1 2G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GMR1@/X7601@/GC6@/PCB@/QK0J@/DBG@ +3VSDGPU_MAIN +3VS power rail for GPU GC62.0 ON OFF OFF 431A35BOL02 B5V1L QK0K VGMR1 2G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GMR1@/X7601@/GC6@/PCB@/QK0K@/DBG@ +VGA_CORE Core power for descrete GPU ON OFF OFF 431A35BOL03 B5V1L QK0G VGMR1 2G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GMR1@/X7601@/GC6@/PCB@/QK0G@/DBG@ 431A35BOL04 B5V1L QK0G VGMR1 4G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GMR1@/X7603@/GC6@/DR@/PCB@/QK0G@/DBG@ 431A35BOL05 B5V1L QK0K SGTR 2G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GTR@/X7604@/GC6@/PCB@/QK0K@/DBG@ 431A35BOL06 B5V1L QK0K SGTR 4G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GTR@/X7605@/GC6@/DR@/PCB@/QK0K@/DBG@ 43 level BOM table Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF Description BOM Structure I2C Address Table BUS Device SOC_I2C0 SOC_I2C2 +3VALW SOC_I2C5 +3VALW PCU_SMB +3VLAW EC_SMB_CK2 +3VS EC_SMB_CK1 +3VALW_EC Address(7 bit) Reserved (Touch Pad) Reserved(Touch Screen) Touch Pad SA577C-1202 (ELAN) Touch Pad TM-P3218-001 (SYNAPTICS) DIMM1 0x15 0x2C 0xA0 N16V-GMR1 (VGA) 0x9E BQ24735R(Charger IC) BATTERY PACK 0x12 0x16 Address(8bit) Write Read BOM Option Table BOM Option Table Item BOM Structure Unpop @ Connector CONN@ EMC requirement EMC@ EMC requirement depop @EMC@ ALS@ HDMI act i ve LS Power But t on DBG@ TPM TPM@ VGA VGA@ Dual Rank DR@ Item BOM Structure HUB@ USB HUB with BYOC BYOC@ without BYOC NBYOC@ eMMC parts EMMC@ 8111GUS@ RTL8111GUS LAN RTL8111H LAN 8111H@ TSI@ Touch Screen GMR1@ N16V-GMR1 N16S-GTR GTR@ BOM Option Table Item CPU 3060 CPU 3160 CPU 3710 CPU N3060 CPU N3160 CPU N3710 BOM Structure QK0J@ QK0K@ QK0G@ SR2KN@ SR2KP@ SR2KL@ 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 2017/12/24 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title B C D R ev 1.0 B5V1L_Braswell-M/B_LA-D921P Date: A Notes List Size Document Number Custom Wednesday, May 11, 2016 Sheet E of 52 A B VR_ON NCP81201MNTXG (PU8101) NCP81201MNTXG (PU8201) C 7000mA 11000mA D E +SOC_VCC +SOC_VGG 1 SYSON RT8207PGQW (PU501) 5900mA SUSP# +1.35VP +0.675VSP ADAPTER PJ501 +19VB CHARGER 3V_EN SY8286BRAC (PU401) SUSP# +3VALWP +1.35V G971ADJF11U PU701 SUSP# +1.5VS EM5209VF (U11) 3335mA SY6288C20AAC (UL1) 1400mA ohm +3VS BATTERY LAN_PWR_EN EC_EN_1.05VALW +3V_LAN +3V_SOCP MOIC RT5041AGQW 5400mA +1.05VALWP (PU601) 1000mA +3VS_WLAN ENVDD SY6288C20AAC (UX1) +LCDVDD TP_PWR_EN SY6288C20AAC (UK1) +3V_PTP 3VSDGPU_MAIN_EN SY6288C20AAC (U14) DGPU_PWR_EN SY6288C20AAC 15mA (U2615) +1.8VALW_PMICP SUSP 110mA AO3413 (U2614) 200mA +3VSDGPU_MAIN +3VSDGPU_AON +1.8VS 550mA +1.24VALWP MOIC RT5041AGQW 700mA (PU601) 254mA +1.15VALWP +1.5VSP (No use) EC_ON SY8286CRAC (PU402) +5VALWP SUSP# EM5209VF (U11) 4868mA JPA1 +5VS ohm ohm USB_PWR_EN SY6288C20AAC (US21) ohm +USB3_VCCA +VDDA +5VS_HDD +VCC_FAN1 +TS_PWR AP2330W (UY1) Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 2017/12/24 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title B C D Power Rail Size Document Number Custom R ev 1.0 B5V1L_Braswell-M/B_LA-D921P Date: A +HDMI_5V_OUT Wednesday, May 11, 2016 Sheet E of 52 B5V1L AC Power UP Sequence 2016-02-19 Plug in EC V02BT07 SOC S5->S0 S3->S0 S0->S3 S0->S5 ACIN ACIN +3VLP EC_ON D 6.38us +3VLP 238us EC_ON > > 2.828ms +5VALW +5VALW D ON/OFF ON/OFF > 93.1ms 25.72ms > 3V_EN 3V_EN > > 763.3us 1.286ms +3VALW +3VALW > > 3.369ms 5.596ms EC_EN_1.05VALW EC_EN_1.05VALW +1.05VALW(VNN) +1.8VALW +1.15VALW > 634.8us > 155.2us > 2.12ms > 173.7us > 3.785ms > 57.1us +1.15VALW > 4.822ms > 88.89us +1.24VALW > 6.717ms > 64.49us +3V_SOC +1.05VALW(VNN) +1.8VALW +1.24VALW +3V_SOC 24.39ms EC_RSMRST# > EC_SLP_S3#_1P8 > -> > 111ms > PBTN_OUT# EC_SLP_S4# > -> > C 6.25ms 110.4ms > 23.43ms > 23.47ms 8.357S EC_RSMRST# > 3.39us PBTN_OUT# > 61.08us > 61us EC_SLP_S4# > 104.2us > 10.03ms EC_SLP_S3#_1P8 150.1ms > SYSON SYSON > 600.9us > 145.3us +1.35V +1.35V -19.75ns > 5.204ms DDR_PWROK > SUSP# 30.33ms 25.69ms > > 20.07ms > DDR_PWROK 29.38ms SUSP# > 3.344us > 950us > 4.112us > 934.0us +0.675VS > 395.3us > 1.522ms > 418.5us > 1.509ms +1.5VS > 348.1us > 1.014ms > 373us > 912.9us +3VS > 457.3us > 841.1us > 508us > 863.9us +5VS +0.675VS +1.5VS +3VS +5VS C B B > 40.15ms > 5.806ms 30.10ms > 9.281ms > VR_ON VR_ON > +SOC_VGG > +SOC_VCC > VGATE 1.544ms 3.233ms 3.397ms > 16.98ms > 1.545ms > > > 3.247ms > 44.39ms 401.2ns > 3.396ms 44.94ms +SOC_VGG 89.54ms +SOC_VCC > 400.1ns VGATE > 110.2ms -3.152us > 110.7ms -3.269us PMC_CORE_PWROK > 111.4ms -579.2ns > 111.9ms -365.2ns DDR_CORE_PWROK > 126.1ms PMC_CORE_PWROK DDR_CORE_PWROK PMC_PLTRST# > 124.4ms PMC_PLTRST# ON/OFF -> PMC_PLTRST# 410.8ms A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title B5V1L Power sequence Size C Date: Document Number Rev 1.0 B5V1L_Braswell-M/B_LA-D921P Wednesday, May 11, 2016 Sheet of 52 DDR_A_D[0 63] DDR_A_DQS[0 7] DDR_A_DQS#[0 7] USOC1A 14 DDR_A_MA[0 15] DDR_A_MA15 DDR_A_MA14 DDR_A_MA13 DDR_A_MA12 DDR_A_MA11 DDR_A_MA10 DDR_A_MA9 DDR_A_MA8 DDR_A_MA7 DDR_A_MA6 DDR_A_MA5 DDR_A_MA4 DDR_A_MA3 DDR_A_MA2 DDR_A_MA1 DDR_A_MA0 D 14 14 14 DDR_A_BS2 DDR_A_BS1 DDR_A_BS0 14 14 14 14 14 DDR_A_CAS# DDR_A_RAS# DDR_A_WE# DDR_A_CS1# DDR_A_CS0# 14 14 14 DDR_A_CLK1 DDR_A_CLK1# DDR_A_CKE1 14 14 14 BD49 BD47 BF44 BF48 BB49 BJ45 BE52 BD44 BE46 BB46 BH48 BD42 BH47 BJ48 BC42 BB47 BF52 AY40 BH46 BG45 BA40 BH44 AU38 AY38 BD38 BF38 AY42 BD40 BF40 BB44 DDR_A_CLK0 DDR_A_CLK0# DDR_A_CKE0 AT30 AU30 C 14 14 41 AV36 BA38 DDR_A_ODT0 DDR_A_ODT1 Remove VREFCA & VREFDQ (not for DDR3L design) AT28 AU28 14 BA42 AV28 DDR_A_RST# DDR_PWROK DDRA_RCOMP BA28 14 DDR_A_DM[0 7] DDR_A_DM7 DDR_A_DM6 DDR_A_DM5 DDR_A_DM4 DDR_A_DM3 DDR_A_DM2 DDR_A_DM1 DDR_A_DM0 BH30 BD32 AY36 BG41 BA53 AP44 AT48 AP52 DDR_A_DQS7 BH32 DDR_A_DQS#7 BG31 DDR_A_DQS6 BC30 DDR_A_DQS#6 BC32 DDR_A_DQS5 AT32 DDR_A_DQS#5 AT34 DDR_A_DQS4 BH40 DDR_A_DQS#4 BG39 DDR_A_DQS3 AY52 DDR_A_DQS#3 BA51 DDR_A_DQS2 AT42 DDR_A_DQS#2 AT41 DDR_A_DQS1 AV47 DDR_A_DQS#1 AV48 DDR_A_DQS0 AM52 DDR_A_DQS#0 AM51 B 14 14 14 CHV_MCP_EDS DDR3_M0_DQ_63 DDR3_M0_DQ_62 DDR3_M0_DQ_61 DDR3_M0_DQ_60 DDR3_M0_DQ_59 DDR3_M0_DQ_58 DDR3_M0_DQ_57 DDR3_M0_DQ_56 DDR3_M0_DQ_55 DDR3_M0_DQ_54 DDR3_M0_DQ_53 DDR3_M0_DQ_52 DDR3_M0_DQ_51 DDR3_M0_DQ_50 DDR3_M0_DQ_49 DDR3_M0_DQ_48 DDR3_M0_BS_2 DDR3_M0_BS_1 DDR3_M0_BS_0 DDR3_M0_DQ_47 DDR3_M0_DQ_46 DDR3_M0_DQ_45 DDR3_M0_DQ_44 DDR3_M0_DQ_43 DDR3_M0_DQ_42 DDR3_M0_DQ_41 DDR3_M0_DQ_40 DDR3_M0_CASB DDR3_M0_RASB DDR3_M0_WEB DDR3_M0_CSB_1 DDR3_M0_CSB_0 DDR3_M0_CK_1 DDR3_M0_CKB_1 DDR3_M0_CKE_1 DDR3_M0_DQ_39 DDR3_M0_DQ_38 DDR3_M0_DQ_37 DDR3_M0_DQ_36 DDR3_M0_DQ_35 DDR3_M0_DQ_34 DDR3_M0_DQ_33 DDR3_M0_DQ_32 DDR3_M0_CK_0 DDR3_M0_CKB_0 DDR3_M0_CKE_0 RSVD1 RSVD2 DDR3_M0_ODT_0 DDR3_M0_ODT_1 DDR3_M0_OCAVREF DDR3_M0_ODQVREF DDR3_M0_DRAMRSTB DDR3_DRAM_PWROK DDR3_M0_RCOMPPD DDR3_M0_DM_7 DDR3_M0_DM_6 DDR3_M0_DM_5 DDR3_M0_DM_4 DDR3_M0_DM_3 DDR3_M0_DM_2 DDR3_M0_DM_1 DDR3_M0_DM_0 DDR3_M0_DQ_31 DDR3_M0_DQ_30 DDR3_M0_DQ_29 DDR3_M0_DQ_28 DDR3_M0_DQ_27 DDR3_M0_DQ_26 DDR3_M0_DQ_25 DDR3_M0_DQ_24 DDR3_M0_DQ_23 DDR3_M0_DQ_22 DDR3_M0_DQ_21 DDR3_M0_DQ_20 DDR3_M0_DQ_19 DDR3_M0_DQ_18 DDR3_M0_DQ_17 DDR3_M0_DQ_16 DDR3_M0_DQ_15 DDR3_M0_DQ_14 DDR3_M0_DQ_13 DDR3_M0_DQ_12 DDR3_M0_DQ_11 DDR3_M0_DQ_10 DDR3_M0_DQ_9 DDR3_M0_DQ_8 DDR3_M0_DQS_7 DDR3_M0_DQSB_7 DDR3_M0_DQS_6 DDR3_M0_DQSB_6 DDR3_M0_DQS_5 DDR3_M0_DQSB_5 DDR3_M0_DQS_4 DDR3_M0_DQSB_4 DDR3_M0_DQS_3 DDR3_M0_DQSB_3 DDR3_M0_DQS_2 DDR3_M0_DQSB_2 DDR3_M0_DQS_1 DDR3_M0_DQSB_1 DDR3_M0_DQS_0 DDR3_M0_DQSB_0 CHV_MCP_EDS USOC1B BD5 BD7 BF10 BF6 BB5 BJ9 BE2 BD10 BE8 BB8 BH6 BD12 BH7 BJ6 BC12 BB7 DDR0 DDR3_M0_MA_15 DDR3_M0_MA_14 DDR3_M0_MA_13 DDR3_M0_MA_12 DDR3_M0_MA_11 DDR3_M0_MA_10 DDR3_M0_MA_9 DDR3_M0_MA_8 DDR3_M0_MA_7 DDR3_M0_MA_6 DDR3_M0_MA_5 DDR3_M0_MA_4 DDR3_M0_MA_3 DDR3_M0_MA_2 DDR3_M0_MA_1 DDR3_M0_MA_0 DDR3_M0_DQ_7 DDR3_M0_DQ_6 DDR3_M0_DQ_5 DDR3_M0_DQ_4 DDR3_M0_DQ_3 DDR3_M0_DQ_2 DDR3_M0_DQ_1 DDR3_M0_DQ_0 BG33 BH28 BJ29 BG28 BG32 BH34 BG29 BJ33 DDR_A_D63 DDR_A_D62 DDR_A_D61 DDR_A_D60 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56 BD28 BF30 BA34 BD34 BD30 BA32 BC34 BF34 DDR_A_D55 DDR_A_D54 DDR_A_D53 DDR_A_D52 DDR_A_D51 DDR_A_D50 DDR_A_D49 DDR_A_D48 AV32 AV34 BD36 BF36 AU32 AU34 BA36 BC36 DDR_A_D47 DDR_A_D46 DDR_A_D45 DDR_A_D44 DDR_A_D43 DDR_A_D42 DDR_A_D41 DDR_A_D40 BH38 BH36 BJ41 BH42 BJ37 BG37 BG43 BG42 DDR_A_D39 DDR_A_D38 DDR_A_D37 DDR_A_D36 DDR_A_D35 DDR_A_D34 DDR_A_D33 DDR_A_D32 BB51 AW53 BC52 AW51 AV51 BC53 AV52 BD52 DDR_A_D31 DDR_A_D30 DDR_A_D29 DDR_A_D28 DDR_A_D27 DDR_A_D26 DDR_A_D25 DDR_A_D24 AV42 AP41 AV41 AT44 AP40 AT38 AP42 AT40 DDR_A_D23 DDR_A_D22 DDR_A_D21 DDR_A_D20 DDR_A_D19 DDR_A_D18 DDR_A_D17 DDR_A_D16 AV45 AY50 AT50 AP47 AV50 AY48 AT47 AP48 DDR_A_D15 DDR_A_D14 DDR_A_D13 DDR_A_D12 DDR_A_D11 DDR_A_D10 DDR_A_D9 DDR_A_D8 AP51 AR53 AK52 AL53 AR51 AT52 AL51 AK51 DDR_A_D7 DDR_A_D6 DDR_A_D5 DDR_A_D4 DDR_A_D3 DDR_A_D2 DDR_A_D1 DDR_A_D0 DDR1 DDR3_M1_MA_15 DDR3_M1_MA_14 DDR3_M1_MA_13 DDR3_M1_MA_12 DDR3_M1_MA_11 DDR3_M1_MA_10 DDR3_M1_MA_9 DDR3_M1_MA_8 DDR3_M1_MA_7 DDR3_M1_MA_6 DDR3_M1_MA_5 DDR3_M1_MA_4 DDR3_M1_MA_3 DDR3_M1_MA_2 DDR3_M1_MA_1 DDR3_M1_MA_0 BF2 AY14 BH8 DDR3_M1_CK_1 DDR3_M1_CKB_1 DDR3_M1_CKE_1 BD14 BF14 BB10 RSVD1 RSVD2 AV18 BA16 DDR3_M1_OCAVREF DDR3_M1_ODQVREF DDR3_M1_DRAMRSTB DDR3_VCCA_PWROK DDR3_M1_DQ_23 DDR3_M1_DQ_22 DDR3_M1_DQ_21 DDR3_M1_DQ_20 DDR3_M1_DQ_19 DDR3_M1_DQ_18 DDR3_M1_DQ_17 DDR3_M1_DQ_16 DDR3_M1_RCOMPPD BH24 BD22 AY18 BG13 BA1 AP10 AT6 AP2 DDR3_M1_DM_7 DDR3_M1_DM_6 DDR3_M1_DM_5 DDR3_M1_DM_4 DDR3_M1_DM_3 DDR3_M1_DM_2 DDR3_M1_DM_1 DDR3_M1_DM_0 BH22 BG23 BC24 BC22 AT22 AT20 BH14 BG15 AY2 BA3 AT12 AT13 AV7 AV6 AM2 AM3 OF 13 BSW-MCP-EDS_FCBGA1170 DDR3_M1_DQ_31 DDR3_M1_DQ_30 DDR3_M1_DQ_29 DDR3_M1_DQ_28 DDR3_M1_DQ_27 DDR3_M1_DQ_26 DDR3_M1_DQ_25 DDR3_M1_DQ_24 DDR3_M1_ODT_0 DDR3_M1_ODT_1 AT26 AU26 BA26 DDR3_M1_DQ_39 DDR3_M1_DQ_38 DDR3_M1_DQ_37 DDR3_M1_DQ_36 DDR3_M1_DQ_35 DDR3_M1_DQ_34 DDR3_M1_DQ_33 DDR3_M1_DQ_32 DDR3_M1_CK_0 DDR3_M1_CKB_0 DDR3_M1_CKE_0 AT24 AU24 DDRB_RCOMP DDR3_M1_DQ_47 DDR3_M1_DQ_46 DDR3_M1_DQ_45 DDR3_M1_DQ_44 DDR3_M1_DQ_43 DDR3_M1_DQ_42 DDR3_M1_DQ_41 DDR3_M1_DQ_40 DDR3_M1_CASB DDR3_M1_RASB DDR3_M1_WEB DDR3_M1_CSB_1 DDR3_M1_CSB_0 BD16 BF16 AY12 DDR_CORE_PWROK DDR3_M1_DQ_55 DDR3_M1_DQ_54 DDR3_M1_DQ_53 DDR3_M1_DQ_52 DDR3_M1_DQ_51 DDR3_M1_DQ_50 DDR3_M1_DQ_49 DDR3_M1_DQ_48 DDR3_M1_BS_2 DDR3_M1_BS_1 DDR3_M1_BS_0 BG9 BA14 BH10 AU16 AY16 BA12 AV26 DDR3_M1_DQ_63 DDR3_M1_DQ_62 DDR3_M1_DQ_61 DDR3_M1_DQ_60 DDR3_M1_DQ_59 DDR3_M1_DQ_58 DDR3_M1_DQ_57 DDR3_M1_DQ_56 DDR3_M1_DQ_15 DDR3_M1_DQ_14 DDR3_M1_DQ_13 DDR3_M1_DQ_12 DDR3_M1_DQ_11 DDR3_M1_DQ_10 DDR3_M1_DQ_9 DDR3_M1_DQ_8 DDR3_M1_DQS_7 DDR3_M1_DQSB_7 DDR3_M1_DQS_6 DDR3_M1_DQSB_6 DDR3_M1_DQS_5 DDR3_M1_DQSB_5 DDR3_M1_DQS_4 DDR3_M1_DQSB_4 DDR3_M1_DQS_3 DDR3_M1_DQSB_3 DDR3_M1_DQS_2 DDR3_M1_DQSB_2 DDR3_M1_DQS_1 DDR3_M1_DQSB_1 DDR3_M1_DQS_0 DDR3_M1_DQSB_0 DDR3_M1_DQ_7 DDR3_M1_DQ_6 DDR3_M1_DQ_5 DDR3_M1_DQ_4 DDR3_M1_DQ_3 DDR3_M1_DQ_2 DDR3_M1_DQ_1 DDR3_M1_DQ_0 BG21 BH26 BJ25 BG26 BG22 BH20 BG25 BJ21 D BD26 BF24 BA20 BD20 BD24 BA22 BC20 BF20 AV22 AV20 BD18 BF18 AU22 AU20 BA18 BC18 BH16 BH18 BJ13 BH12 BJ17 BG17 BG11 BG12 C BB3 AW1 BC2 AW3 AV3 BC1 AV2 BD2 AV12 AP13 AV13 AT10 AP14 AT16 AP12 AT14 AV9 AY4 AT4 AP7 AV4 AY6 AT7 AP6 AP3 AR1 AK2 AL1 AR3 AT2 AL3 AK3 B OF 13 BSW-MCP-EDS_FCBGA1170 close to SOC pin R963 DDRA_RCOMP 182_0402_1% R964 DDRB_RCOMP EMC@ 1U_0402_16V7K C1160 EMC@ DDR_CORE_PWROK C1159 1U_0402_16V7K USOC1 SR2KN@ R3 +3V_SOC ESD request 0211 3.3V PMC_CORE_PWROK NC Y PMC_CORE_PWROK A 10,33 USOC1 QK0K@ R993 10K_0402_5% U55 P S IC FH8066501715929 SR2KN D1 1.6G ABO! SA00009IJ50 USOC1 SR2KP@ 1.35V DDR_CORE_PWROK G S IC FH8066501715929 QK0J D1 1.6G FCBGA SA00009IJ30 R1 USOC1 QK0J@ +1.35V_SOC 182_0402_1% NL17SZ07DFT2G_SC70-5 SA00004BV00 A A S IC FH8066501715928 QK0K D1 1.6G FCBGA SA00009IK20 USOC1 QK0G@ S IC FH8066501715928 SR2KP D1 1.6G ABO! SA00009IK40 USOC1 SR2KL@ S IC FH8066501715927 QK0G D1 1.6G FCBGA SA00009IE30 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification S IC FH8066501715927 SR2KL D1 1.6G ABO! SA00009IE50 2015/12/24 2017/12/24 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom R ev 1.0 B5V1L_Braswell-M/B_LA-D921P Date: BSW-M SOC Memory DDR3L Wednesday, May 11, 2016 Sheet of 52 +1.8VALW eDP NC A 24 24 EDP_TXP1 EDP_TXN1 J51 H51 K51 K52 L53 L51 M52 M51 eDP Panel 24 24 EDP_AUXP EDP_AUXN 29 EDP_HPD# 24 M42 K42 R51 DDI1_ENBKL DDI1_PWM ENVDD R986 DDI1_RCOMPP 402_0402_1% DDI1_RCOMPN ENVDD P51 P52 R53 F47 F49 F40 G40 J40 K40 F42 G42 D44 F44 B D48 C49 U51 T51 T52 B53 A52 E52 D52 B50 B49 E53 C53 A51 A49 G44 VGA GPIO reserve VGA_SELECT3 1.8V HV_DDI0_DDC_SCL HV_DDI0_DDC_SDA PANEL0_BKLTEN PANEL0_BKLTCTL PANEL0_VDDEN DDI0_PLLOBS_P DDI0_PLLOBS MCSI_2_DP_0 MCSI_2_DN_0 MCSI_2_DP_1 MCSI_2_DN_1 1.8V 1.8V 1.8V 1.8V 1.35V RSVD17 RSVD16 MCSI_COMP DDI1_TXP_0 DDI1_TXN_0 1.35V DDI1_TXP_1 DDI1_TXN_1 1.35V DDI1_TXP_2 DDI1_TXN_2 1.35V DDI1_TXP_3 DDI1_TXN_3 1.35V DDI1_AUXP DDI1_AUXN HV_DDI1_HPD DDI1 1.8V GP_CAMERASB09 GP_CAMERASB10 GP_CAMERASB11 1.35V DDI2_TXP_0 DDI2_TXN_0 1.35V DDI2_TXP_1 DDI2_TXN_1 1.35V DDI2_TXP_2 DDI2_TXN_2 1.35V DDI2_TXP_3 DDI2_TXN_3 1.35V DDI2_AUXP DDI2_AUXN 1.35V SDMMC1_CLK SDMMC1_CMD 1.8V SDMMC1 DDI2 SDMMC1_D0 SDMMC1_D1 SDMMC1_D2 SDMMC1_D3_CD_B MMC1_D4_SD_WE MMC1_D5 MMC1_D6 MMC1_D7 MMC1_RCLK SDMMC1_RCOMP SDMMC2_CLK SDMMC2_CMD 1.8V HV_DDI2_DDC_SCL HV_DDI2_DDC_SDA RSVD6 RSVD3 RSVD9 RSVD8 RSVD5 RSVD4 RSVD10 RSVD7 RSVD2 RSVD1 RSVD11 DDI1_PWM P44 R1003 AB41 AB45 AB44 AC53 AB51 AB52 AA51 AB40 Y44 INVT_PWM_SOC 1.8V SDMMC2 SDMMC2_D0 SDMMC2_D1 SDMMC2_D2 SDMMC2_D3_CD_B 1.8V 1.8V/3.3V SDMMC3_CLK SDMMC3_CMD SDMMC3_CD_B NC's 1.8V/3.3V SDMMC3 SDMMC3_D0 SDMMC3_D1 SDMMC3_D2 SDMMC3_D3 1.8V SDMMC3_1P8_EN 1.8V SDMMC3_PWR_EN_B 1.8V/3.3V SDMMC3_RCOMP 100K_0804_8P4R_5% 24 NL17SZ07DFT2G_SC70-5 SA00004BV00 EC_KBRST# C 33 DGPU_PRSNT# DGPU_HOLD_RST#_SOC1.8V VGA_SELECT1 VGA_SELECT2 VGA_SELECT3 GP_CAMERASB09 TP_INT_1# Y42 Y41 V40 DGPU_PRSNT# DGPU_HOLD_RST#_SOC1.8V TP_INT_1# 29 +1.8VALW UMA H DIS L* DGPU_PRSNT# EMMC_CLK EMMC_CMD M7 P6 M6 M4 P9 P7 T6 T7 T10 T12 T13 P13 K10 K9 EMMC_D0 EMMC_D1 EMMC_D2 EMMC_D3 EMMC_D4 EMMC_D5 EMMC_D6 EMMC_D7 EMMC_RCLK R970 100_0402_1% UMA@ R4905 10K_0402_5% 29 EMMC_CLK EMMC_CMD 32 32 EMMC_D0 EMMC_D1 EMMC_D2 EMMC_D3 EMMC_D4 EMMC_D5 EMMC_D6 EMMC_D7 EMMC_RCLK 32 32 32 32 32 32 32 32 VGA@ R1045 10K_0402_5% +1.8VALW R642 @ GP_CAMERASB09 210K_0402_5% 32 MMC1_RCOMP If unused, terminate 100 ? ± %r esi st or near t o SoC Braswell PDG_0p95 P.200 M12 M10 K7 K6 EC_LID_OUT# B 33 F2 D2 K3 J1 J3 H3 G2 VRAM RANK GPIO VGA type reserve VGA_SELECT2 K2 L3 P12 R969 80.6_0402_1% +1.8VALW Dual Rank H Single Rank L R992 1K_0402_5% DR@ VGA_SELECT2 V0.2 modify INVT_PWM_SOC 150_0402_1% Checklist R0.95 Page 194 RCOMP=80ohm_1% (not exist in ISPD) VGA_SELECT3 VGA_SELECT1 +1.8VALW N16S-GTR H N16V-GMR1 L R4902 1K_0402_5% @ VGA_SELECT1 R1008 20K_0402_5% @ Internal PD20K R1037 10K_0402_5% @ Internal PD20K A A BSW-MCP-EDS_FCBGA1170 R4903 1K_0402_5% @ T50 T48 OF 13 L Y A P47 P45 M48 M47 +1.8VALW H NC 1.8V PANEL1_BKLTEN 1.8V PANEL1_BKLTCTL 1.8V PANEL1_VDDEN 1.8V DDI1_PLLOBS_P 1.35V DDI1_PLLOBS HV_DDI2_HPD GP_CAMERASB00 GP_CAMERASB01 GP_CAMERASB02 GP_CAMERASB03 GP_CAMERASB04 GP_CAMERASB05 GP_CAMERASB06 GP_CAMERASB07 GP_CAMERASB08 P50 P48 EDP_TXP0 EDP_TXN0 MCSI_2_CLKP MCSI_2_CLKN 24 24 1.35V C HV_DDI0_HPD U64 RP41 R968 DDI0_RCOMPP 402_0402_1% DDI0_RCOMPN Y51 Y52 V52 V51 W53 F38 G38 DDI0_AUXP DDI0_AUXN DDI1_ENBKL ENVDD DDI1_PWM +1.8VALW HDMI_DDCCLK_SOC HDMI_DDCDATA_SOC W51 1.24V INVT_PWM_SOC 4.7K_0402_5% R1161 R4904 20K_0402_5% @ Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 2017/12/24 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title BSW-M SOC Display Size Document Number Custom R ev 1.0 B5V1L_Braswell-M/B_LA-D921P Date: D 0_0402_5% 25 25 HDMI_HPD_SOC# 1.35V 25 1.35V DDI0_TXP_3 DDI0_TXN_3 @ ENBKL @ 4.7K_0402_5% R1159 H47 H46 DDI0_TXP_2 DDI0_TXN_2 MCSI_1_DP_0 MCSI_1_DN_0 MCSI_1_DP_1 MCSI_1_DN_1 MCSI_1_DP_2 MCSI_1_DN_2 MCSI_1_DP_3 MCSI_1_DN_3 +3VS T44 T45 Y47 Y48 V45 V47 V50 V48 T41 T42 G53 G52 DDI0 MCSI_1_CLKP MCSI_1_CLKN R1142 P HDMI_CLK+ HDMI_CLK- 1.35V K48 K47 33 G HDMI_TX0+ HDMI_TX0- 25 25 F53 F52 DDI0_TXP_1 DDI0_TXN_1 RSVD14 RSVD13 25 25 H49 H50 1.35V ENBKL NL17SZ07DFT2G_SC70-5 SA00004BV00 @ HDMI_TX1+ HDMI_TX1- DDI0_TXP_0 DDI0_TXN_0 ENBKL 25 25 D50 C51 M44 K44 HDMI_TX2+ HDMI_TX2- MCSI and Camera interface HDMI 25 25 Y D RSVD15 RSVD12 U61 P DDI1_ENBKL G CHV_MCP_EDS USOC1C Wednesday, May 11, 2016 Sheet of 52 D D CHV_MCP_EDS USOC1D 15 15 15 15 dGPU 15 15 15 15 27 27 WLAN 26 26 PCIE LAN PEG_HTX_C_DRX_P0 PEG_HTX_C_DRX_N0 PEG_DTX_C_HRX_P0 PEG_DTX_C_HRX_N0 PEG_HTX_C_DRX_P1 PEG_HTX_C_DRX_N1 PEG_DTX_C_HRX_P1 PEG_DTX_C_HRX_N1 VGA@ VGA@ CC17 CC21 1U_0402_16V7K 1U_0402_16V7K PEG_HTX_DRX_P0 PEG_HTX_DRX_N0 PEG_DTX_C_HRX_P0 PEG_DTX_C_HRX_N0 C24 B24 G20 J20 VGA@ VGA@ CC18 CC19 1U_0402_16V7K 1U_0402_16V7K PEG_HTX_DRX_P1 PEG_HTX_DRX_N1 PEG_DTX_C_HRX_P1 PEG_DTX_C_HRX_N1 A25 C25 D20 F20 C1135 C1000 1U_0402_16V7K 1U_0402_16V7K PCIE_HTX_DRX_P2 PCIE_HTX_DRX_N2 PCIE_HRX_DTX_P2 PCIE_HRX_DTX_N2 B26 C26 D22 F22 PCIE_HTX_DRX_P3 PCIE_HTX_DRX_N3 PCIE_HRX_DTX_P3 PCIE_HRX_DTX_N3 A27 C27 G24 J24 PCIE_HTX_C_DRX_P2 PCIE_HTX_C_DRX_N2 27 PCIE_HRX_DTX_P2 27 PCIE_HRX_DTX_N2 C1133 C1134 PCIE_HTX_C_DRX_P3 PCIE_HTX_C_DRX_N3 26 PCIE_HRX_DTX_P3 26 PCIE_HRX_DTX_N3 C 29 — If no PCI Express* ports is implemented on the platform: 27 Pull-up PCIE_CLKREQ[3:0]_N to V1P8A with 10-KΩ resistor 26 WLAN LAN 1U_0402_16V7K 1U_0402_16V7K VGA_CLKREQ# PCIE_CLKREQ_1# WLAN_CLKREQ# LAN_CLKREQ# VGA_CLKREQ# WLAN_CLKREQ# LAN_CLKREQ# 15 15 CLK_PEG_VGA CLK_PEG_VGA# 27 27 26 26 CLK_PCIE_WLAN CLK_PCIE_WLAN# CLK_PCIE_LAN CLK_PCIE_LAN# PCIE_TXP0 PCIE_TXN0 PCIE_RXP0 PCIE_RXN0 PCIE_TXP1 PCIE_TXN1 PCIE_RXP1 PCIE_RXN1 PCIE_TXP2 PCIE_TXN2 PCIE_RXP2 PCIE_RXN2 1.05V SATA_LEDN SATA_GP0 SATA_GP1 1.8V SATA_GP2 SATA_GP3 SATA_OBSP SATA_OBSN FST_SPI_CLK PCIE_CLKREQ0B PCIE_CLKREQ1B PCIE_CLKREQ2B PCIE_CLKREQ3B A21 C21 C19 B20 C18 B18 C17 A17 C16 B16 R975 PCIE_RCOMPP 402_0402_1% PCIE_RCOMPN S ATA PCIe PCIE_TXP3 PCIE_TXN3 PCIE_RXP3 PCIE_RXN3 AM10 AM12 AK14 AM14 @ R979 CLK_P4 402_0402_1% CLK_N4 3.3V CLK_DIFF_P_0 CLK_DIFF_N_0 CLK_DIFF_P_1 CLK_DIFF_N_1 CLK_DIFF_P_2 CLK_DIFF_N_2 CLK_DIFF_P_3 CLK_DIFF_N_3 CLK_DIFF_P_4 CLK_DIFF_N_4 D26 F26 FST_SPI_CS0_B FST_SPI_CS1_B FST_SPI_CS2_B 1.8V FST_SPI_D0 FST_SPI_D1 FST_SPI_D2 FST_SPI_D3 FAST SPI 1.8V 1.05V MF_HDA_RSTB MF_HDA_SDI1 MF_HDA_CLK 1.8V/ MF_HDA_SDI0 MF_HDA_SYNC 1.5V MF_HDA_SDO MF_HDA_DOCKENB MF_HDA_DOCKRSTB PCIE_OBSP PCIE_OBSN AUDIO V14 Y13 Y12 V13 V12 SPI1_CLK SPI1_CS0_B SPI1_CS1_B SPI1_MISO SPI1_MOSI SATA_TXP0 SATA_TXN0 SATA_RXP0 SATA_RXN0 SATA_TXP1 SATA_TXN1 SATA_RXP1 SATA_RXN1 SPI 1.8V 1.8V 1.8V SPKR GP_SSP_2_CLK GP_SSP_2_FS GP_SSP_2_TXD GP_SSP_2_RXD C31 B30 N28 M28 C29 A29 J28 K28 AH3 AH2 AG3 AG1 AF3 N30 M30 SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 SATA_PRX_DTX_P0 SATA_PRX_DTX_N0 30 30 30 30 HDD TP_INT_2# DEVSLP0_SOC EMMC_RST# TP_INT_2# 29 TS_INT_R# 29 T188 @ EMMC_RST# 32 SATA_RCOMPP R972 SATA_RCOMPN 402_0402_1% W3 SOC_SPI_CLK V4 SOC_SPI_CS0# V6 SOC_SPI_CS1# V7 V2 V3 U1 U3 C T193@ +1.8VALW SOC_SPI_MOSI SOC_SPI_MISO SOC_SPI_WP# SOC_SPI_HOLD# AF13 AD6 AD9 AD7 AF12 AF14 AB9 AB7 HDA_RST# H4 SOC_SPKR HDA_BIT_CLK HDA_SDIN0 HDA_SYNC HDA_SDOUT RP40 VGA_CLKREQ# PCIE_CLKREQ_1# WLAN_CLKREQ# LAN_CLKREQ# 10K_0804_8P4R_5% T189 @ RP55 HDA_SDIN0 T191 28 HDA_SYNC HDA_SDOUT HDA_BIT_CLK HDA_RST# @ SOC_SPKR 28 HDA_SYNC_AUDIO HDA_SDOUT_AUDIO HDA_BITCLK_AUDIO HDA_RST_AUDIO# 28 28 28 28 75_0804_8P4R_1% AK9 AK10 AK12 AK13 OF 13 BSW-MCP-EDS_FCBGA1170 B B +BIOS_SPI Checklist suggest PU 100K Follow A4WAL +BIOS_SPI R999 3.3K_0402_5% SPI_CS0# R1001 20K_0402_5% SPI_WP# R1000 20K_0402_5% SPI_HOLD# +1.8VALW R1033 C1013 0_0402_5% @ 1U_0402_16V7K From CPU SOC_SPI_CS0# EMC@ SPI_CS0# R2581 33_0402_5% SOC_SPI_WP# EMC@ SPI_WP# R2580 10_0402_5% SOC_SPI_MISO SOC_SPI_HOLD# SOC_SPI_CLK SOC_SPI_MOSI A RP37 SPI ROM ( 8MByte ) 1.8V +BIOS_SPI U56 SPI_CS0# SPI_MISO SPI_WP# SPI_MISO SPI_HOLD# SPI_CLK SPI_MOSI CS# VCC DO(IO1) HOLD#(IO3) WP#(IO2) CLK GND DI(IO0) SPI_HOLD# SPI_CLK SPI_MOSI W25Q64DWSSIG_SO8 A 10_0804_8P4R_5% EMC@ Reserve for EMI(Near SPI ROM) SPI_CLK @EMC@ R1002 33_0402_5% @EMC@ C1014 10P_0402_50V8J Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 2017/12/24 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom R ev 1.0 B5V1L_Braswell-M/B_LA-D921P Date: BSW-M SOC SATA/PCI-E/HDA Wednesday, May 11, 2016 Sheet of 52 USOC1E GND GND 2 C1023 15P_0402_50V8J A9 C9 B8 B7 B5 B4 19.2MHZ_10PF_7M19200019 Change P/N to SJ10000N700 19.2MHz_12pF 2.49K_0402_1% ICLK_ICOMP 49.9_0402_1% ICLK_RCOMP R984 R985 SOC_GPIO_DFX5 SOC_GPIO_DFX6 49.9_1% for RCOMP 2.49K_1% for ICOMP +1.8VALW R1175 4.7K_0402_5% DDI0_ENABLE DDI1_ENABLE R1176 4.7K_0402_5% DDI0_ENABLE DDI1_ENABLE SOC_GPIO_SUS2 Must Drive high before RSMRST EC_SCI# SOC Internal PU 20K 33 R959 0_0402_5% EC_SCI# @ EC_SCI# 33 EC_SMI# SOC_GPIO_SUS4 SOC_GPIO_SUS5 SOC_GPIO_SUS6 EC_SMI# SOC_GPIO_SUS9 SOC_GPIO_SUS8 GPIO_RCOMP +1.8VALW C @ @ 29 TP_INT_3# TP_INT_3# R995 100_0402_1% 20K_0402_5% SOC_GPIO_DFX5 20K_0402_5% SOC_GPIO_DFX6 AM40 AM41 AM44 AM45 AM47 AK48 AM48 AK41 AK42 AD51 AD52 AH50 AH48 AH51 AH52 AG51 AG53 AF52 AF51 AE51 AC51 AH40 Y3 RSVD13 RSVD17 ICLKICOMP ICLKRCOMP RSVD18 RSVD14 RSVD16 RSVD1 MF_PLT_CLK0 MF_PLT_CLK1 MF_PLT_CLK2 MF_PLT_CLK3 MF_PLT_CLK4 MF_PLT_CLK5 GPIO_DFX0 GPIO_DFX1 GPIO_DFX2 GPIO_DFX3 GPIO_DFX4 GPIO_DFX5 GPIO_DFX6 GPIO_DFX7 GPIO_DFX8 iCLK 1.8V RESERVED RSVD5 RSVD7 RSVD4 RSVD6 RSVD11 RSVD10 RSVD12 RSVD15 I2C0_SCL I2C0_SDA I2C1_SCL I2C1_SDA 1.8V GPIO_SUS0 GPIO_SUS1 GPIO_SUS2 GPIO_SUS3 1.8V GPIO_SUS4 GPIO_SUS5 GPIO_SUS6 GPIO_SUS7 SEC_GPIO_SUS9 SEC_GPIO_SUS8 SEC_GPIO_SUS10 SEC_GPIO_SUS11 GPIO0_RCOMP GPIO_ALERT I2C2_SCL I2C2_SDA I2C 1.8V I2C3_SCL I2C3_SDA I2C4_SCL I2C4_SDA I2C5_SCL I2C5_SDA I2C6_SCL I2C6_SDA I2C_NFC_SCL I2C_NFC_SDA SMBUS 1.8V MF_SMB_CLK MF_SMB_DATA MF_SMB_ALERTB C11 B10 F12 F10 RSVD3 RSVD2 RSVD9 RSVD8 D12 E8 C7 D6 R641 10K_0402_5% EMMC@ EMMC_STRAP W EMMC H* WO EMMC L EMMC_STRAP D J12 F7 J14 L13 AK6 AH7 R991 100K_0402_5% @ SOC_I2C0_CLK SOC_I2C0_DATA Reserve for Touch Pad AF6 AH6 AF9 AF7 SOC_I2C2_CLK SOC_I2C2_DATA for Touch Screen AE4 AD2 EMMC_STRAP AC1 AD3 AB2 AC3 SOC_I2C5_CLK SOC_I2C5_DATA for Touch Pad AA1 AB3 SOC_I2C0_CLK AA3 Y2 I2C_NFC_SCL I2C_NFC_SDA T213@ T214@ AM6 AM7 AM9 PCU_SMB_CLK PCU_SMB_DATA PCU_SMB_ALERT# R1155 R1180 R1181 R1055 SOC_I2C0_DATA R1056 SOC_I2C5_CLK R1057 SOC_I2C5_DATA R1058 +1.8VALW @ @ @ 1K_0402_5% 1K_0402_5% 1K_0402_5% SOC_I2C5_CLK_R 0_0402_5% SOC_I2C5_DATA_R 0_0402_5% @ 0_0402_5% @ 0_0402_5% @ @ C OF 13 BSW-MCP-EDS_FCBGA1170 R1016 R1022 J26 N26 P20 N20 P26 K26 M26 AH45 +1.8VALW 1.05V ICLK_ICOMP ICLK_RCOMP 3 1 C1005 15P_0402_50V8J D OSCIN OSCOUT Y7 PLTFM CLK's XTAL_19.2M_IN P24 XTAL_19.2M_OUT M22 EMMC GPIO_DFX XTAL_19.2M_OUT 200K_0402_5% CHV_MCP_EDS GPIO_SUS XTAL_19.2M_IN1 R1004 For Touch Screen +1.8VALW component placed near JEDP1 +1.8VALW +1.8VALW TSI@ I2C2_SCL_PNL 2.2K_0402_5% R1147 TSI@ I2C2_SDA_PNL 2.2K_0402_5% R1150 Vgs= 1.1V D S G 10K_0402_5% 24 I2C2_SDA_PNL 24 B For Touch Pad BIOS/EFI Top Swap +1.8VALW component placed near JTP1 +1.8VALW SOC_GPIO_SUS5: Security Flash Descriptors = Override = Normal Operat i on (I nt er nal P U) 1K_0402_5% 1K_0402_5% @ @ R1153 SOC_I2C5_DATA_R R1152 SOC_I2C5_CLK_R +1.8VALW +3V_PTP G 1R2562 1R2561 +3VALW +1.8VALW Vgs= 1.1V +RTCVCC W=10mil W=20mils Issued Date C151 1U_0402_16V7K 2015/12/24 D 2017/12/24 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC DDR_SMB_DA 14 Title DDR BSW-M SOC CLK/PMU/SPI Size Document Number Custom R ev 1.0 B5V1L_Braswell-M/B_LA-D921P Date: 14 Compal Electronics, Inc Compal Secret Data Security Classification BAS40-04_SOT23-3 DDR_SMB_CK A S S G S DDR_SMB_CK DDR_SMB_DA Q2507A DMN63D8LDW-7_SOT363-6 SB000013K00 PCU_SMB_DATA_L Q2507B DMN63D8LDW-7_SOT363-6 SB000013K00 D +CHGRTC W=20mils 1R2570 1R2569 Vgs= 1.5V S 2.2K_0402_5%2 2.2K_0402_5%2 PCU_SMB_CLK_L G PCU_SMB_CLK Q2502A PJT138KA 2N SOT363-6 SB000016K00 PCU_SMB_DATA Q2502B PJT138KA 2N SOT363-6 SB000016K00 D A D22 34 +3VS G PCU_SMB_CLK_L PCU_SMB_DATA_L +3VS I2C5_SDA_TP G SOC_GPIO_SUS2: Top Swap( A16 Override ) = Change Boot Loader address = Normal Operat i on Reference checklist 0.92 P.37 +RTCBATT 34 33 Q62 L2N7002LT1G_SOT23-3 2.2K_0402_5%2 2.2K_0402_5%2 SOC_I2C5_CLK_L SOC_I2C5_DATA_L 1R2564 1R2563 D G TXE_DBG G S 4.7K_0402_5%2 4.7K_0402_5%2 I2C5_SCL_TP D S @ R1051 0_0402_5% D S 1 D I2C5_SCL_TP Q2508A DMN63D8LDW-7_SOT363-6 SB000013K00 SOC_I2C5_DATA_L I2C5_SDA_TP Q2508B DMN63D8LDW-7_SOT363-6 SB000013K00 S For BOM SOC_I2C5_CLK_L D SOC_I2C5_CLK_R4 Q2509A PJT138KA 2N SOT363-6 SB000016K00 SOC_I2C5_DATA_R Q2509B PJT138KA 2N SOT363-6 SB000016K00 S I2C5_SDA_TP +3VALW Vgs= 1.5V Vgs= 1.1V I2C5_SCL_TP G SOC_GPIO_SUS5 R1156 R1157 D EC programing : "High"for Flash BIOS R978 10K_0402_5% @ R1011 10K_0402_5% 2.2K_0402_5% 2.2K_0402_5% G R1006 10K_0402_5% +3V_PTP +1.8VALW I2C2_SCL_PNL SOC_GPIO_SUS9 B SOC_GPIO_SUS2 S @ @ @ D R1040 1 R1048 4.7K_0402_5% I2C2_SCL_PNL TSI@ Q2511A DMN63D8LDW-7_SOT363-6 SB000013K00 SOC_I2C2_DATA_L I2C2_SDA_PNL TSI@ Q2511B DMN63D8LDW-7_SOT363-6 SB000013K00 S 1R2567 1R2568 TSI@Q2512A PJT138KA 2N SOT363-6 SB000016K00 SOC_I2C2_DATA TSI@Q2512B PJT138KA 2N SOT363-6 SB000016K00 D +5VALW 2.2K_0402_5% 2.2K_0402_5% SOC_I2C2_CLK_L SOC_I2C2_DATA_L G 1R2566 1R2565 SOC_I2C2_CLK_L SOC_I2C2_CLK +3VALW 2.2K_0402_5% TSI@ 2.2K_0402_5% TSI@ Vgs= 1.5V G +1.8VALW SOC_GPIO_SUS8 +TS_PWR +TS_PWR SOC_GPIO_SUS8: ICLK, USB 2.0, DDI SFR supply select : = Supply is 1.25V = Supply is 1.35V SOC_GPIO_SUS6: Halt Boot Strap: 1= Normal Operat i on R1143 SOC_I2C2_DATA R1144 SOC_I2C2_CLK @ @ G 4.7K_0402_1% SOC_GPIO_SUS4: BIOS Boot Select i on = LPC = SPI (internal PU) 1K_0402_5% 1K_0402_5% D R981 SOC_GPIO_SUS6 2 100K_0402_5% SOC_GPIO_SUS4 S R977 Wednesday, May 11, 2016 Sheet of 52 USOC1F GPU_EVENT# 15 @ R1151 10K_0402_5% C35 A35 G34 J34 TO DGPU GPU_EVENT# R987 USB3_RCOMPP 402_0402_1% USB3_RCOMPN +1.8VALW GC6_FB_EN Y GC6_FB_EN_R G GC6_FB_EN NL17SZ07DFT2G_SC70-5 SA00004BV00 C38 B38 G36 J36 15 C37 A37 F36 D36 M34 M32 GC6@ R1009 10K_0402_5% P GC6@ U2515 NC A +3V_SOC D34 F34 N34 P34 USB_DP3 USB_DN3 USB3_TXP2 USB3_TXN2 USB3_RXP2 USB3_RXN2 1.05V 1.8V USB3_TXP3 USB3_TXN3 USB3_RXP3 USB3_RXN3 USB_DP4 USB_DN4 USB_OC1_B USB_OC0_B RSVD3 USB_VBUSSNS USB_RCOMP USB3_OBSP USB3_OBSN USB_HSIC_0_STROBE USB_HSIC_0_DATA RSVD4 RSVD1 RSVD7 RSVD6 RSVD11 RSVD10 1.24V USB_HSIC_1_STROBE USB_HSIC_1_DATA USB_HSIC_RCOMP RSVD5 RSVD2 RSVD8 RSVD9 UART1_TXD UART1_RXD UART1_CTS_B UART1_RTS_B 1.8V RSVD12 RSVD13 UART2_TXD UART2_RXD UART2_CTS_B UART2_RTS_B P16 P14 B46 B47 A48 24 24 USB20_P3 USB20_N3 24 24 Touch screen USB20_P4 USB20_N4 USB_OC1# USB_OC0# 29 29 USB2.0 Hub USB2_OBSP USB_VBUSSNS USB2_RCOMP M36 N36 1 PMC_PLTRST# Camera R982 4.7K_0402_5% U53 NC Y A 3.3V 1.8V R2024 @ 1K_0402_5% P USB2.0 Port 31 31 USB20_P2 USB20_N2 C45 A45 B40 C40 USB3.0 Port USB20_P1 USB20_N1 PLT_RST_BUF# 15,26,27,33,34 G C41 A41 31 31 C43 B44 USB20_P0 USB20_N0 NL17SZ07DFT2G_SC70-5 SA00004BV00 USB_DP2 USB_DN2 PLT_RST# Buf f er +3VS B48 C42 B42 D +1.8VALW USB_OC0# RP39 PMC_PCIE_WAKE# PMC_BATLOW# USB_OC0# USB_OC1# 31 R1032 0_0402_5% PMC_RSTBTN# R2025 Sch chelist PU 1k R988 113_0402_1% 10K_0804_8P4R_5% 1K_0402_5% K38 M38 N38 HSIC_RCOMP PMC_CORE_PWROK 100K_0402_5% @EMC@ 0.047U_0402_25V7K C1007 PMC_PLTRST# @EMC@ 22P_0402_50V8J C1006 R485 R1012 45.3_0402_1% AD10 DBG_UART_TXD AD12 DBG_UART_RXD AD13 AD14 PDG_2p1 page:238 If a HSIC Port is not implemented on the platform, data, strobe signals and USB_HSIC_RCOMP can be left unconnected USB2_OBSP GPU_EVENT# Y6 Y7 V9 V10 EC_RSMRST# C34 B34 G32 J32 D USB3_TXP1 USB3_TXN1 USB3_RXP1 USB3_RXN1 USB2.0 +1.8VALW USB_DP1 USB_DN1 USB3.0 A33 C33 F30 D30 USB3_TXP0 USB3_TXN0 USB3_RXP0 USB3_RXN0 UART USB3 Port PCH_USB3_TX0_P PCH_USB3_TX0_N PCH_USB3_RX0_P PCH_USB3_RX0_N +1.8VALW USB_OTG_ID USB_DP0 USB_DN0 RESERVED 31 31 31 31 B32 C32 F28 D28 CHV_MCP_EDS HSIC GC6_FB_EN_R DGPU_PWR_EN DGPU_PWR_EN R990 @ R1015 49.9_0402_1% 36 OF 13 100K_0402_5% @EMC@ 22P_0402_50V8J C1155 BSW-MCP-EDS_FCBGA1170 +1.8VALW C 33 34 34 33,34 33,34 33,34 33,34 33,34 0_0402_5%1 0_0402_5%1 LPC_CLK_EC LPC_CLK_TPM LPC_CLKRUN# LPC_FRAME# @ @ 0_0402_5%1 0_0402_5%1 0_0402_5%1 0_0402_5%1 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC-25MHz @ @ @ @ R1014 LPC_CLK_0 R1017 LPC_CLK_1 2 2 P2 R3 T3 P3 LPC_AD0_SOC LPC_AD1_SOC LPC_AD2_SOC LPC_AD3_SOC R1018 R1021 R1024 R1031 M3 M2 N3 N1 R1013 LPC_RCOMP SOC_SERIRQ 100_0402_1%1 ILB_RTC_X1 ILB_RTC_X2 T4 T2 H5 H7 R994 10M_0402_5% B 32.768KHZ_12.5PF_Q13FC135000040 Y8 1 +1.8VALW C1009 2 15P_0402_50V8J P28 P30 AF50 AF48 AF44 AF45 AD50 R1023 20K_0402_1% C1010 15,33 15P_0402_50V8J H_PROCHOT# @EMC@ C1002 10P_0402_50V8J Y8 change P/N to SJ10000LV00 for ESRH 17.16V 17.63V 18.12V H >L 16.76V 17.22V 17.70V VILIM = 20*ILIM*Rsr ILIM = 3.3*100/(100+316)/20/0.01 = 3.966 A ILIM*0.01*20(IC Current sense amplifier gain)= VPR311*20=+3VALW*100(PR317)/(100+316) Compal Electronics, Inc Compal Secret Data Security Classification Issued Date 2015/12/24 Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Charger Size Document Number Custom B5V1L_Braswell-M/B_LA-D921P Date: A B C W ednesday, May 11, 2016 D Sheet 39 of 54 R ev 1.0 A B C D E Module model information SY8208B_V2.mdd SY8208C_V2.mdd 1 PR402 499K_0402_1% PU401 SY8286BRAC_QFN20_3X3 3.3V LDO 150mA~300mA PC410 22U_0603_6.3V6M PC409 22U_0603_6.3V6M COMMON PART PC408 22U_0603_6.3V6M 1 PC407 22U_0603_6.3V6M PC411 4.7U_0603_6.3V6M +3VALWP @EMI@ PR405 4.7_1206_5% 1 NC 21 15 14 FF 12 11 +3VLP 16 Vout is 3.234V~3.366V Ipeak=7A Imax=4.9A Iocp=10A PC416 0.1U_0402_25V6 +3VALW 2 +5VALW JUMP_43X118 @ PR407 0_0603_5% 20 PL404 @EMI@ VL @ PC427 22U_0603_6.3V6M @ PC428 22U_0603_6.3V6M PC423 22U_0603_6.3V6M COMMON PART PC422 22U_0603_6.3V6M PR408 PC424 4.7U_0603_6.3V6M 5V LDO 150mA~300mA +5VALWP PC421 22U_0603_6.3V6M 4.7U_0603_6.3V6M 21 1.5UH_PCMB053T-1R5MS_6A_20% PC420 22U_0603_6.3V6M 16 @EMI@ 17 PC419 680P_0603_50V7K 4.7_1206_5% 18 LX_5V 19 PC425 5V_SN LDO NC GND 15 14 FF 13 Vout is 4.998V~5.202V Ipeak=7A Imax=4.9A Iocp=10A PR406 1K_0402_5% EC VDD0 is +3VL, PC426 UNPOP EC VDD0 is +3VALW, PC426 POP 2015/12/24 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2017/12/24 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title 3VALW/5VALW Size Document Number Custom B5V1L_Braswell-M/B_LA-D921P Date: A VCC OUT PG NC BS IN IN GND ENLDO_3V5V PC426 4.7U_0402_6.3V6M PR411 1M_0402_1% PC413 1000P_0402_25V8J 5V_FB 5V_EN IN IN 10 GND 11 @ PR413 0_0402_5% LX EN1 GND EN2 LX 12 PR409 2.2K_0402_5% @ PR410 0_0402_5% 2 5*5*3 LX 5V_EN LX_5V 1 JUMP_43X118 @ PJ402 PU402 SY8286CRAC_QFN20_3X3 SPOK +3VALWP +5VALWP BST_5V @EMI@ PC418 0.1U_0402_25V6 EMI@ PC417 2200P_0402_50V7K PC415 10U_0805_25V6K PC414 10U_0805_25V6K @ EC_ON 17 1.5UH_PCMB053T-1R5MS_6A_20% PC402 PR403 1000P_0402_25V8J 1K_0402_5% 3V_FB 2 3V_EN 33 18 GND +19VB_5V MAINPWON NC PL402 LX_3V 19 +19VB_5V 5A_Z120_25M_0805_2P 33,35,38 LDO NC 20 +19VB @ PJ401 +19VB EMI agree reserved @ PJ404 JUMP_43X79 2 IN PG SPOK 33 @EMI@ PL403 0.1U_0402_25V6 BS GND OUT GND Check pull up resistor of SPOK at HW side PR401 0_0603_5% PC403 @EMI@ PC412 680P_0603_50V7K 3V_SN 33 LX EN2 LX GND PR412 100K_0402_5% ENLDO_3V5V +3VALWP 5*5*3 LX 13 IN IN IN EN1 LX_3V 10 BST_3V1 @ PC405 10U_0805_25V6K EMI@ PC404 2200P_0402_50V7K @EMI@ PC401 0.1U_0402_25V6 +19VB_5V PR404 150K_0402_1% ENLDO_3V5V B C D Wednesday, May 11, 2016 Sheet E 40 of 54 R ev 1.0 D D Pin19 need pull separate from +1.35VP If you have +1.35V and +0.675V sequence question, you can change from +1.35VP to +1.35VS EMI agree reserved +19VB_1.35V PR501 2.2_0603_5% BST_1.35V @ PR509 0_0402_5% SYSON PC507 10U_0805_6.3V6K VTTREF_1.35V VTT PC506 10U_0805_6.3V6K 19 20 +1.35VP PC510 0.033U_0402_16V7K FB_1.35V S3 FB TON C PR506 8.2K_0402_1% +1.35VP B Output 1.35*1.01 more 1% PR508 10K_0402_1% @ PC514 0.1U_0402_16V7K 順 順 +19VB_1.35V >+19V B 29,33 PR507 470K_0402_1% 21 +19VB BOOT VDDQ S5 VDD DDR_PW ROK B VLDOIN 17 VTTREF 18 VDDP PR505 100K_0402_1% +1.35VP SI7716ADN-T1-GE3_POW ERPAK8-5 GND RT8207KGQW _W QFN20_3X3 S3_0.675VSP PC513 1U_0603_10V6K UGATE PHASE CS 11 VTTSNS @EMI@ PC512 680P_0402_50V7K +5VALW 12 VTTGND PGND PQ502 2 PR504 5.1_0603_5% 13 10 +5VALW @EMI@ PR503 4.7_1206_5% PR502 9.1K_0402_1% CS_1.35V PC508 1U_0603_10V6K 2 PR511 2.2_0402_5% VDD_1.35V AON7408L_DFN8-5 LGATE S5_1.35V 14 2 PC521 22U_0603_6.3V6M PC520 22U_0603_6.3V6M PC519 PC518 22U_0603_6.3V6M 22U_0603_6.3V6M PC517 22U_0603_6.3V6M PC516 22U_0603_6.3V6M 15 PGOOD 7*7*3 PAD PU501 LG_1.35V COMMON PART +0.675VSP LX_1.35V PC501 0.1U_0603_25V7K PQ501 PL502 1UH_PCMC063T-1R0MN_11A_20% +1.35VP UG_1.35V C +1.35VP 0.675Volt +/- 5% TDC 0.84A Peak Current 1.2A 1 PC505 10U_0805_25V6K PC504 10U_0805_25V6K EMI@ PC503 2200P_0402_50V7K @ PJ504 JUMP_43X79 2 @EMI@ PC502 0.1U_0402_25V6 BST_1.35V_R 16 +19VB TON_1.35V EMI@ PL501 5A_Z120_25M_0805_2P @ PR510 0_0402_5% 33,36,39,42,43 SUSP# @ PJ501 +1.35VP VTTREF_1.35V off on on 36 Note: S3 - sleep ; S5 - power off SUSP D S 2 +0.675VSP off off on Level L L H Mode S5 S3 S0 G @ PQ503 2N7002KW _SOT323-3 2 +1.35V JUMP_43X118 @ PC515 0.1U_0402_16V7K @ PJ503 +0.675VSP 2 +0.675VS JUMP_43X39 A Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 Issued Date Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title 1.35VP/0.675VSP Size Document Number Custom B5V1L_Braswell-M/B_LA-D921P Date: A W ednesday, May 11, 2016 Sheet 41 of 54 Rev 1.0 A B 26 EC_EN_1.05VALW _R 2 PC633 10U_0603_6.3V6M PC634 10U_0603_6.3V6M PC631 22U_0603_6.3V6M PC630 22U_0603_6.3V6M PC629 22U_0603_6.3V6M PC628 22U_0603_6.3V6M PC627 22U_0603_6.3V6M 1 PC626 22U_0603_6.3V6M 2 PC625 22U_0603_6.3V6M PC622 10U_0603_6.3V6M PC623 10U_0603_6.3V6M PC620 22U_0603_6.3V6M Output Current : 4.1A Frequency : 1.2MHz Current limit : 5A @ @ @ PJ607 JUMP_43X118 2 +1.8VALW_PMICP SLP_S0iX_B SLP_S3_B VCC SUSPWRDNACK RSMRST 29 PR602 100K_0402_1% GND PGND 11 12 15 @ +5VALW 2.2_0402_1% +1.8VALW PJ601 +1.8VALWP 2 +1.8VALW JUMP_43X39 @ PJ602 JUMP_43X118 2 +1.05VALWP +1.05VALW SA00007ZX00 @ EC_SLP_S3#_1P8 Enable Signal for V1P5S LDO PC619 22U_0603_6.3V6M @ PR604 0_0402_5% +1.8VALW_PMICP PC618 22U_0603_6.3V6M +1.8VALW _SENSE +3VALW PC617 22U_0603_6.3V6M O_1P15A 28 LX_1P8 PL602 1uH_MLV-FY12N1R0M-O1L PC616 22U_0603_6.3V6M IN_1P15A LX_1P8 27 O_1P24A MOIC_PG SLP_S0iX_B When SLP_S0iX_B = High, LDO_V1P15A_VOUT = 1.15V When SLP_S0iX_B = Low, LDO_V1P15A_VOUT = 0.75V @ 33 1 100K_0402_1% 13 33 EC_EN_1.05VALW IN_1P8 IN_1P24A 1 PR601 @ PR603 24 EC_SUSPWRDNACK Output Current : 4.4A Frequency : 1.2MHz Current limit : 5A @ PR608 0_0402_5% PC614 1U_0402_10V6K PC612 22U_0603_6.3V6M @ PC611 22U_0603_6.3V6M 1 1U_0402_16V7K SUSP# SUSP# @ PR605 0_0402_5% PC615 22U_0603_6.3V6M 1 EN_1P05A O_1P8 PC635 33,36,39,41,43 PC624 22U_0603_6.3V6M +1.05VALW _SENSE 19 O_1P5S LX_1P8 +1.05VALWP IN_1P5S IN_1P8 +3VALW 23 PC603 2.2U_0603_6.3V6K 2 10 22 PC621 10U_0603_6.3V6M PL601 0.47UH +-30% MLV-FY12NR47N-O1L 3.7A LX_1P05A SWO_1P8A O_1P05A PC608 10U_0603_6.3V6M 3.2*2.5*1.2 16 PC613 22U_0603_6.3V6M 21 33 LX_1P05A SWIN_1P8A +1.24VALWP PC607 10U_0603_6.3V6M 100K_0402_1% @ PR607 0_0402_5% PMC_SLP_S0# 20 O_3P3A LX_1P05A 25 10 IN_1P05A +1.15VLAWP @ PC610 10U_0603_6.3V6M PC609 10U_0603_6.3V6M 1.15V Output Current : 2.2A Current limit : 3.2A PR606 18 14 PC602 2.2U_0603_6.3V6K 2 +1.5VSP +1.8VALW_PMICP +3V_SOCP 1.24V Output Current : 0.9A Current limit : 1.4A IN_1P05A +1.8VALWP PC605 22U_0603_6.3V6M 2 PC604 2.2U_0603_6.3V6K 1.5V Output Current : 0.1A Current limit : 0.2A IN_3P3A +3V_SOCP PC606 22U_0603_6.3V6M PC601 2.2U_0603_6.3V6K 17 +1.8VALW_PMICP D PC632 10U_0603_6.3V6M +3VALW Regulator 35.5 Support 35.6 C PU601 RT5041AGQW _W QFN28_4X4 PGND_EX Function Field : PJ603 +1.15VLAWP 2 +1.15VALW JUMP_43X39 +3VALW @ SUSPWRDNACK HIGH:Disable Signal for All Power Rails PJ604 +1.24VALWP 2 +1.24VALW JUMP_43X39 @ +3V_SOCP PJ605 2 +3V_SOC JUMP_43X39 @ +1.5VSP PJ606 2 +1.5VS JUMP_43X39 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title PWR-MOIC SYSTEM Size A3 Date: A B C Document Number Rev 1.0 B5V1L_Braswell-M/B_LA-D921P Sheet W ednesday, May 11, 2016 D 42 of 54 A B C D E schematic from A4WAS IC change to G971 1 +3VALW +3VALW @ PJ701 2 JUMP_43X79 +1.5VS PR704 20K_0402_1% FB_1.5VS Rup +1.5VSP_LDO 1 G971ADJF11U_SO8 2 VO ADJ VEN @ PC703 0.1U_0402_16V7K VIN_1.5VP PC704 0.01U_0402_25V7K PR703 1M_0402_1% EN_1.5VP @ PR702 0_0402_5% 1 GND VO VIN TPAD POK VPP PU701 SUSP# @ PJ702 JUMP_43X79 2 1U_0402_6.3V6K +1.5VSP_LDO 33,36,39,41,42 PC702 4.7U_0603_6.3V6K VIN_1.5VP PC701 PC705 22U_0603_6.3V6M PR705 22.6K_0402_1% Rdown Vout=0.8V* (1+Rup/Rdown) Vout=0.8V* (1+(12.7/10)) = 1.816V Vout=0.8V* (1+(20/22.6)) = 1.507V 3 4 Compal Secret Data Security Classification Issued Date 2015/12/24 Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size C Date: A B C D Compal Electronics, Inc +1.5VSP Document Number Rev 1.0 B5V1L_Braswell-M/B_LA-D921P Wednesday, May 11, 2016 Sheet E 43 of 54 1 D PC8102 0.1U_0402_25V6 +1.8VALW VGATE @ PR8101 56.2_0402_1% EMI@ PC8107 2200P_0402_50V7K @EMI@ PC8106 0.1U_0402_25V6 PC8105 10U_0805_25V6K PC8104 10U_0805_25V6K 1 D1 D1 LX_VCC SWN1_VCC 3CSN1_VCC S2 0.36UH_PCMB063T-R36MS_24A_20% SNUB_VCC_1 2 @EMI@ PC8113 680P_0603_50V7K PR8120 10_0402_5% CSREF_VCC PR8119 78.7K_0603_1% 2 1 @EMI@ PR8114 4.7_1206_5% CSSUM_VCC AON7934_DFN3X3A8-10 S2 10 B 27.4K_0402_1% PC8118 1200PF_0402_50V7K 1 Close to choke PC8119 47P_0402_50V8J PR8129 PC8120 470P_0402_50V7K ILIM_VCC PH8102 220K_0402_5%_ERTJ0EV224J 2 PR8128 6.04K_0402_1% CSCOMP_VCC @ Close to IC side 2 0.015U_0402_25V7K PC8121 100P_0402_50V8J PR8130 1.3K_0402_1% D1 PR8123 165K_0402_1% PC8116 2.2U_0603_10V6K PR8125 31.6K_0402_1% PC8122 C +SOC_VCC 0.36uH (DCR 1.4)7*7*4 2 PC8117 470P_0402_50V7K PR8127 1K_0402_1% 2 FB_VCC PC8103 10U_0805_25V6K 2 2 PC8115 1000P_0402_50V7K PR8124 49.9_0402_1% +19VB @ PC8114 2200P_0402_50V7K +5VALW VSS_SENSE PR8122 0_0402_5% PR8118 13K_0402_1% D2/S1 10 @ CSCOMP_VCC CSSUM_VCC CSREF_VCC IMAX_VCC @ PR8121 0_0402_5% B PC8111 01U_0402_16V7K EMI@ PL8102 5A_Z120_25M_0805_2P PL8101 Close to MOSFET 21 20 19 18 17 16 15 ILIM_VCC PC8112 1000P_0402_50V7K PQ8101 @ PR8117 0_0402_5% PR8113 PC8109 2.2_0603_5% 0.22U_0603_25V7K BST_VCC BST_VCC_R UG_VCC LX_VCC 10 11 LG_VCC 12 TSNS_VCC 13 14 VBOOT/ADDR_VCC PR8116 16.2K_0402_1% BST HG SW PGND LG TSENSE VBOOT/ADDR @ D1 ENABLE VR_HOT SDIO ALERT SCLK VR_RDY VRMP VCC VSP VSN DIFFOUT FB COMP ROSC PR8111 0_0603_5% 2UG_VCC_R PR8126 75K_0402_1% @ PR8115 0_0402_5% VCC_SENSE AGND 28 27 26 25 24 23 22 PC8108 0.01U_0402_25V7K 1 PC8110 1U_0603_10V6K 10 VCC_VCC VSP_VCC VSN_VCC DIFFOUT_VCC FB_VCC COMP_VCC ROSC_VCC ILIM IOUT CSCOMP CSSUM CSREF IMAX PVCC 29 PR8112 2.2_0603_5% +5VALW 0_0402_5% PU8101 NCP81201MNTXG_QFN28_4X4 @ PR8109 ENABLE_VCC VGG_PWRGD PR8110 1K_0402_1% +19VB_VCC VRMP_VCC 45 @ PC8101 47P_0402_50V8J +1.8VALW C @ PJ801 JUMP_43X79 2 SDIO_VCC ALERT_VCC SCLK_VCC VR_HOT# 33,45 33 PR8108 10K_0402_1% G1 PR8107 200_0402_1% S2 VR_SVID_CLK G2 10,45 +19VB_VCC PR8106 49.9_0402_1% VR_SVID_ALERT# 10,45 PH8101 100K_0402_1%_TSM0B104F4251RZ PR8105 20_0402_1% 2 VR_SVID_DATA 10,45 PR8104 301_0402_1% D PR8103 200_0402_1% PR8102 200_0402_1% +1.05VALW A A Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 Issued Date Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +SOC_VCC Size Rev 1.0 B5V1L_Braswell-M/B_LA-D921P Date: Document Number Monday, April 25, 2016 Sheet 44 of 54 1 10,44 VR_SVID_DATA PR8204 20_0402_1% 10,44 VR_SVID_ALERT# PR8205 49.9_0402_1% VR_SVID_CLK PR8206 200_0402_1% 10,44 D 0.1U_0402_25V6 PC8202 D PR8203 301_0402_1% PR8202 200_0402_1% +1.05VALW +19VB_VGG +1.8VALW VGG_PWRGD +1.8VALW +19VB_VGG PR8229 1.3K_0402_1% EMI@ PC8208 2200P_0402_50V7K @EMI@ PC8207 0.1U_0402_25V6 PC8206 10U_0805_25V6K 2 D1 D1 D1 G1 +SOC_VGG 0.22UH_PCMB063T-R22MS_23A_20% LX_VGG 10 S2 1 CSREF_VGG PC8214@EMI@ 680P_0603_50V7K PR8218 10_0402_5% PR8217 78.7K_0603_1% CSSUM_VGG CSN1_VGG COMMON PART 1SNUB_VGG_12 S2 SWN1_VGG PR8213@EMI@ 4.7_1206_5% S2 G2 D1 B PC8221 2 1 PC8219 1000PF_0402_50V7K @ CSCOMP_VGG PR8228 PR8227 470P_0402_50V7K Close to choke PC8220 47P_0402_50V8J ILIM_VGG PH8202 220K_0402_5%_ERTJ0EV224J 2.2U_0603_10V6K PR8222 165K_0402_1% PC8217 2 C Height 4.5 mm 0.22uH (DCR 0.97 )7*7*4 PQ8201 AON7934_DFN3X3A8-10 1 + @ PC8203 33U_25V_M 7.5K_0402_1% Close to IC side 31.6K_0402_1% PC8223 PC8222 100P_0402_50V8J 1 D2/S1 PH8201 100K_0402_1%_TSM0B104F4251RZ Close to MOSFET PR8224 38.3K_0402_1% VGG_IMON FB_VGG +19VB PL8201 PR8225 75K_0402_1% PC8215 1000P_0402_50V7K 2 PC8218 470P_0402_50V7K PR8226 33 1K_0402_1% 2 +5VALW EMI@ PL8202 5A_Z120_25M_0805_2P 1 @ PC8216 2200P_0402_50V7K PR8223 49.9_0402_1% 2 21 20 19 18 17 16 15 PR8221 0_0402_5% VGG_SENSEN @ CSCOMP_VGG CSSUM_VGG CSREF_VGG IMAX_VGG 10 1000P_0402_50V7K ILIM_VGG @ PR8220 0_0402_5% B PC8213 1 PR8216 47K_0402_5% PR8219 13K_0402_1% PR8215 14.7K_0402_1% @ PR8214 0_0402_5% VGG_SENSEP BST HG SW PGND LG TSENSE VBOOT/ADDR PR8212 PC8210 2.2_0603_5% 0.22U_0603_25V7K BST_VGG BST_VGG_R UG_VGG LX_VGG 10 11 LG_VGG 12 TSENSE_VGG 13 14 VBOOT/ADDR_VGG 10 PC8211 1U_0603_10V6K VCC VSP VSN DIFFOUT FB COMP ROSC @ PC8209 0.01U_0402_25V7K PC8212 01U_0402_16V7K +5VALW AGND 28 27 26 25 24 23 22 PR8210 0_0603_5% 2UG_VGG_R 29 VCC_VGG VSP_VGG VSN_VGG DIFFOUT_VGG FB_VGG COMP_VGG ROSC_VGG ENABLE VR_HOT SDIO ALERT SCLK VR_RDY VRMP PU8201 NCP81201MNTXG_QFN28_4X4 PR8211 2.2_0603_5% PR8209 1K_0402_1% +19VB_VGG 0_0402_5% 2ENABLE_VGG VRMP_VGG @ PR8208 VR_ON ILIM IOUT CSCOMP CSSUM CSREF IMAX PVCC 33 @ PC8201 47P_0402_50V8J C SDIO_VGG ALERT_VGG SCLK_VGG VR_HOT# PC8205 10U_0805_25V6K 2 33,44 @ PJ8201 JUMP_43X79 2 PC8204 10U_0805_25V6K 1 PR8207 10K_0402_1% @ PR8201 56.2_0402_1% 44 0.015U_0402_25V7K A A Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 Issued Date Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +SOC_VGG Size Rev 1.0 B5V1L_Braswell-M/B_LA-D921P Date: Document Number Monday, April 25, 2016 Sheet 45 of 54 A 2 @ @ B 2 Issued Date C 2 2 Security Classification 2015/12/24 2 @ Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC D Compal Secret Data Date: 2 PC925 PC926 @ 22U_0603_6.3V6M PC924 22U_0603_6.3V6M PC923 PC919 PC920 PC917 PC915 PC916 PC961 PC965 PC946 PC960 D 22U_0603*6 PC951 1U_0402_6.3V6K 22U_0603_6.3V6M PC950 1U_0402_6.3V6K 2 PC922 @ 22U_0603_6.3V6M PC921 22U_0603_6.3V6M PC962 1U_0402 * 5+ PC949 1U_0402_6.3V6K 2 @ 22U_0603_6.3V6M PC934 22U_0603_6.3V6M PC933 22U_0603 * 24 + reserved PC948 1U_0402_6.3V6K 22U_0603_6.3V6M @ 22U_0603_6.3V6M PC927 1 @ @ 22U_0603_6.3V6M PC966 22U_0603_6.3V6M PC910 C PC947 1U_0402_6.3V6K 1 PC945 @ 22U_0603_6.3V6M 2 PC958 22U_0603_6.3V6M 22U_0603_6.3V6M PC941 22U_0603_6.3V6M 22U_0603_6.3V6M PC940 22U_0603_6.3V6M PC939 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M PC938 22U_0603_6.3V6M +SOC_VGG 22U_0603_6.3V6M 1 PC937 22U_0603_6.3V6M PC909 B 22U_0603_6.3V6M 22U_0603_6.3V6M PC936 22U_0603_6.3V6M PC904 +22U_0603 * 15 + reserved 22U_0603_6.3V6M PC928 1 @ 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 4.7U_0402_6.3V6M PC957 2 PC932 22U_0603_6.3V6M 22U_0603_6.3V6M PC906 4.7U_0402_6.3V6M PC956 22U_0603_6.3V6M PC903 4.7U_0402_6.3V6M PC955 2 PC902 22U_0603_6.3V6M PC901 +SOC_VCC 22U_0603_6.3V6M 4.7U_0402_6.3V6M PC954 22U_0603_6.3V6M 4.7U_0402 *6 4.7U_0402_6.3V6M PC953 4.7U_0402_6.3V6M PC952 A E reserved +1.05VALW 1 1 Wednesday, May 11, 2016 E 3 4 Title Compal Electronics, Inc Size Document Number Custom PROCESSOR DECOUPLING B5V1L_Braswell-M/B_LA-D921P Sheet 46 of R ev 1.0 54 D D EN pin don't floating If have pull down resistor at HW side, pls delete PR2 PAD 16 21 GM4G need 1.35V GT/GM2G need 1.5V SY8288RAC_QFN20_3X3 B 2 1 FB = 0.6V @ PR1007 0_0402_5% ILMT_1.5VSDGPUP VGA@ PC1017 22U_0603_6.3V6M 12 (R1) VGA@ PR1005 30.9K_0402_1% @VGA@ PC1016 22U_0603_6.3V6M NC VGA@ PC1014 2.2U_0402_6.3V6M NC BYP 10 PL1002 from SH00000PJ00 change to common part SH00000YE00 2013/10/23 VGA@ PC1013 22U_0603_6.3V6M ILMT PCMB063T-1R0MS 12A LDO_3V_1.5VSDGPUP NC FB_1.5VSDGPUP VGA@ PC1012 22U_0603_6.3V6M EN 14 17 C 2 VCC 1.018% +1.5VSDGPUP PL1002 VGA@ PC1011 22U_0603_6.3V6M FB GND VGA@ LX_1.5VSDGPUP 20 GND 19 @VGA@ PC1010 22U_0603_6.3V6M LX TDC 8A LDO_3V_1.5VSDGPUP 13 15 +3VALW VGA@ PC1015 1U_0402_6.3V6K VGA@ PC1002 0.1U_0402_16V7K 1M_0402_1% PR1003 1 VGA@ LX GND 1.527V 11 ILMT_1.5VSDGPUP IN @VGA_EMI@ @VGA_EMI@ PR1004 PC1006 4.7_1206_5% 680P_0603_50V7K SNB_1.5VSDGPUP 2 18 LX VGA@ PC1001 0.1U_0603_25V7K VGA@ PC1008 330P_0402_50V7K BS IN @VGA@ PR1001 0_0603_5% BST_1.5VSDGPUP IN PG The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high VFB=0.6V Vout=0.6V* Rup=25.5K Rup=30.9K 10U_0805_25V6K VGA@ PC1005 VGA@ IN VGA@ PR1006 20K_0402_1% (1+R1/R2) Vout=1.365V Vout=1.527V 1.5VS_DGPU_PWR_EN 15,36 VGA@ PR1002 40.2K_0402_1% @VGA_EMI@ PC1004 0.1U_0402_25V6 C PU1001 +19VB_1.5VSDGPUP PL1001 VGA_EMI@ 5A_Z120_25M_0805_2P VGA_EMI@ PC1003 2200P_0402_50V7K +19VB (R2) B @ @ PR1008 0_0402_5% +1.5VSDGPUP PJ1002 2 +1.5VSDGPU JUMP_43X118 Module model information SY8208D_V1.mdd A A Compal Secret Data Security Classification 2015/12/24 Issued Date Title Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number B5V1L_Braswell-M/B_LA-D921P Date: Compal Electronics, Inc 1.5VSDGPUP W ednesday, May 11, 2016 Sheet 47 of 54 Rev 1.0 A B C D E 1 Module model information SY8032_V2.mdd @ PJ1402 JUMP_43X79 2 +1.05VSDGPUP +1.05VSDGPU VIN_1.05VS VGA@ PC1402 22U_0603_6.3V6M EN LX_1.05VS 1SNUB_1.05VS @ PR1405 10K_0402_1% PR1401 1M_0402_1% @ PC1401 0.1U_0402_16V7K Rup FB_1.05VS PC1406 @VGA_EMI@ VGA@ +1.05VSDGPUP Imax= 0.7A, Ipeak= 1.1A Function Field : PWR.Plane.Regulator_1.05VDGPU - 43.7 Rest of support elements - 43.8 PR1406 680P_0402_50V7K Rdown 10K_0402_1% 2 VGA@ +3VSDGPU_AON VGA_PWROK EN_1.05VS 2 15,29,36,49 4.7_0603_5% @ PR1404 0_0402_5% PR1402 @VGA_EMI@ FB LX GND PG VGA@ PC1405 22U_0603_6.3V6M IN VGA@ PC1404 22U_0603_6.3V6M VIN_1.05VS PC1403 VGA@ 68P_0402_50V8J +3VS PL1401 VGA@ 1UH_2.8A_30%_4X4X2_F VGA@ PR1403 7.68K_0402_1% @ PJ1401 JUMP_43X79 2 1 (Common Part) SH00000YG00 4*4*2 VGA@ PU1401 SY8032ABC_SOT23-6 Note: When design Vin=5V, please stuff snubber to prevent Vin damage Vout=0.6V* (1+Rup/Rdown) =>0.6V*(1+(7.68/10)=1.061 =>0.6V*(1+(7.87/10)=1.072 (1.01%) (2.1%) 3 4 Compal Secret Data Security Classification Issued Date 2015/12/24 Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size C Date: A B C D Compal Electronics, Inc SY8032 Document Number Rev 1.0 B5V1L_Braswell-M/B_LA-D921P Wednesday, May 11, 2016 Sheet E 48 of 54 A B Vboot=Vvref*Rref2/(Rref1+Rref2+Rboot) Rt=Rrefadj // (Rboot+Rref2) Module model information: RT8813A_V1A for IC module RT8813A_V1B for SW module Vmax=Vvref*Rref2/[(Rref1//Rrefadj)+Rboot+Rref2] OCP=54A/2=27A per phase Ivalley=27A-7.811A/2=23.1A Vout=Vmin+N*Vstep Vstep=(Vmax-Vmin)/Nmax PWM-VID Spec and component Values PSI : phase with DEM phase with CCM phase with CCM Config B 0.6V Config C 0.65V Vmax 1.2V 1.15V 1.15V Vboot 0.9V 0.9V 25mV 1.028V 6.25mV 96 20 20 PR1209 20K 39K 27K PR1208 20K 30K 7.5K Voltage step N of Voltage level Rrefadj 0V to 0.8V 1.2V to 1.8V 2.4V to 5.5V Rref1 Config D 0.9V Choke: 0.22uH (Size:7*7*4) Rdc=0.97mohm +-5% Heat Rating Current=34A Saturation Current=25A 12.5mV C=3*330uF (9mohm)=990uF Vripple=Iripple*ESR(min)=7.811A*3mohm=23.4mV Rboot PR1211 2K 3K Rref2=PR1210 +PR1224 PR1210 18K 24K 6.2K PR1224 C PC1210 2.7nf 3K 1.8nf 1.74K 5.6nf N15S-GT N15V-GL EN High Threshold = 1.6V L-side MOS:AON6554 Rds(on): 3.2mohm@Vgs=10V 3~3.8mohm@Vgs=4.5V Id :85A@Ta=25 degC H-side MOS:AON6552 Rds(on): 5.6mohm@Vgs=10V 6.7mohm@Vgs=4.5V Id :20A@Ta=25 degC PWM-VID Spec Vmin D Different VGA Chip (different EDP-Peak Current) need select different solution I_ripple=(19-0.9)*0.9/ (304.89Khz*0.36u*19)=7.811A Vmin= Vvref*[Rref2/(Rref2+Rboot)]*[Rt/(Rref1+Rt)] C Current Limit threshold setting Rocset= (Ivalley * Rds(on) + 40 mV) / 10uA N15V-GM VGA Chip OpenVReg Configurations Rated TDP Power at Tj=102C Boosted GPU Total at Tj=102C EDP-Continuous at Tj=102C EDP-Peak at Tj=102C Istep max (Evaluation) OCP Setting Current Rocset N16S-GTR Recommendation 2phase 1H1L N14P-GE N14P-GS N14P-GT N15S-GT N15V-GM Config B 24W Config B 25W Config B 25.6W Config B 35.5W Config B 18W Config C 18.16W N/A 30W 40W 25W 24.72W 18.5A 29.62A 27A 38A 45A 31A 29.2A 51A 30A 40.97A 40A 60A 75A 60A 44.3A 36.36A 20A 33.31A 12A 31.5A 35A 48A 72A 90A 72A 54A 9.83K 8.3K 9.39K 13K 2phase 1H2L 6mohm * (L=0.22uH) 2phase 1H2L 4.5mohm * (L=0.15uH) N16S-GT Config B 23W Config B 23W 26A 26A 51A 38.5A N16V-GMR1 N16V-GM Config B 16W 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H1L Polymer Cap (330uF) 6mohm * Or OSCON (390uF) 10mohm *3 NULL 10.2K 2phase 1H1L NULL 2phase 1H1L GM@ GT@ N16S-GT N16V-GM N16V-GMR1 N16S-GTR +19VB_VGA VGA_EMI@ PL1201 5A_Z120_25M_0805_2P unmount PRV5 for phase select BOOT2 PHASE2 VGA@ PC1207 10U_0805_25V6K @VGA_EMI@ PC1205 0.1U_0402_25V6 VGA@ PC1204 10U_0805_25V6K @VGA@ PC1203 10U_0805_25V6K 1 @VGA@ PC1202 10U_0805_25V6K VGA@ PC1221 10U_0805_25V6K 1SNUB_VGA1 +3VS LG2_VGA VGA@ PQ1204 PL1203 VGA@ 0.36UH_PDME064T-R36MS1R405_24A_20% 2 LX2_VGA PR1222 @VGA_EMI@ 4.7_1206_5% VGA@ PR1223 10K_0402_5% 15,29,36,48 VGA_PWROK +VGA_CORE UG2_VGA_R UG2_VGA_R 1SNUB_VGA2 @VGA@ PR1219 0_0603_5% NVVDD_SENSE_R VGA@ PR1221 100_0402_1% VGA@ PQ1203 PC1219 @VGA_EMI@ 680P_0402_50V7K 1000P_0402_50V7K UG2_VGA 0.1U_0603_25V7K 2 @VGA@ PR1220 0_0402_5% @VGA@ PC1217 VGA@ PC1216 AON6794_DFN5X6-8-5 VCCSENSE_VGA 2014/10/09 Vout=1.35V Imax=35.7A Via=72 +19VB_VGA LX2_VGA AON6428L_DFN8-5 17 @VGA@ PR1217 0_0603_5% BST2_VGA_R BST2_VGA 1U_0402_16V7K VGA@ PC1220 10U_0805_25V6K 2 PR1214: OCP setting from 50A to 25A NVVDD_GND_SENSE_R @VGA@ PC1218 1U_0603_10V6K LG2_VGA +5VS VGA@ PC1214 16 @VGA@ PR1218 0_0402_5% 2 VSSSENSE_VGA 17 VGA@ PQ1202 15 UGATE2 14 PGOOD SS 11 21 VSNS RGND AON6428L_DFN8-5 17 +VGA_CORE PC1215 PR1212 @VGA_EMI@ @VGA_EMI@ 680P_0402_50V7K 4.7_1206_5% 1 LGATE2 13 10 VGA@ PR1216 100_0402_1% TON @VGA@ PR1213 0_0402_5% LG1_VGA PVCC_VGA LX1_VGA 19 18 +19VB 2014/10/09 Vout=14.8V Imax=4.071A Via=10 PL1202 VGA@ 0.36UH_PDME064T-R36MS1R405_24A_20% LX1_VGA 0.1U_0603_25V7K TON_VGA LGATE1 PU1201 PVCC VGA@ RT8812AGQW_WQFN20_3X3 VREF 12 VGA@ PR1215 499K_0402_1% +19VB_VGA EN REFIN 20 VGA@ PC1201 AON6794_DFN5X6-8-5 VGA@ PR1225 13K_0402_1% PHASE1 VGA@ PQ1201 15,36 UG1_VGA_R VREF_VGA REFADJ BOOT1 UGATE1 PSI REFADJ REFIN_VGA GND +19VB_VGA 3VSDGPU_MAIN_EN @VGA@ PR1201 0_0603_5% BST1_VGA BST1_VGA_R NVVDD_GND_SENSE_R PC1213 1U_0402_6.3V6K VGA@ PC1209 VGA@ 1U_0402_16V7K @VGA@ PR1205 10K_0402_5% PR1204 0_0402_5% 1 @VGA@ PR1224 0_0402_5% +3VSDGPU_AON GC6@ PR1206 20K_0402_1% @VGA@ PR1207 0_0603_5% UG1_VGA PC1210 2700P_0402_50V7K VGA@ NGC6@ PR1202 20K_0402_1% VGA_EN VID 2 PR1210 18K_0402_1% VGA@ @VGA@ @VGA@ PR1203 10K_0402_5% DGPU_VID VGA@ PR1209 20K_0402_1% 1 VGA@ PR1211 2K_0402_1% 15 +3VS VGA@ PR1208 20K_0402_1% 2 NGC6 for DIS GM GC6 for DIS GT 15 VGA_EMI@ PC1208 2200P_0402_50V7K PSI +VGA_CORE N16S-GT EDP continuous:26A peak: 51A L side Rds(on): 3mohm(Typ), 3.8mohm(Max) Idsm: 11A@Ta=25C, 14A@Ta=70C CHOKE:0.36uH, DCR 1.4m ohm, L/2 over 36A FSW = 304Khz (R=499K >304Khz) (R=620K >245Khz) Imax=35A Ipeak-51A OCP = 61A OVP=Vout*(145%~155%) Remove GPU OTP circuit for HW request Compal Secret Data Security Classification Issued Date 2015/12/24 Deciphered Date 2017/12/24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title RT8812 Size B C Document Number B5V1L_Braswell-M/B_LA-D921P Date: A Compal Electronics, Inc Wednesday, May 11, 2016 D Sheet 49 of 54 Rev 1.0 D D + VGA@ PC1212 560U_2.5V_M VGA@ PC1337 1U_0402_10V7 VGA@ PC1336 1U_0402_10V7 VGA@ PC1335 1U_0402_10V7 2 VGA@ PC1334 1U_0402_10V7 + N15x 2013/12/10 Under 4.7uF_0603_10pcs 1uF_0402_4pcs Near 47uF_0805_1pcs 22uF_0603_1pcs(2PCS 4.7uF_0805_5pcs VGA@ PC1211 560U_2.5V_M +VGA_CORE VGA@ PC1329 4.7U_0603_6.3V6M VGA@ PC1328 4.7U_0603_6.3V6M VGA@ PC1327 4.7U_0603_6.3V6M GB4-128 package VGA@ PC1326 4.7U_0603_6.3V6M VGA@ PC1325 4.7U_0603_6.3V6M VGA@ PC1324 4.7U_0603_6.3V6M GPU Core VGA@ PC1323 4.7U_0603_6.3V6M VGA@ PC1322 4.7U_0603_6.3V6M VGA@ PC1338 4.7U_0603_6.3V6M 2 VGA@ PC1320 4.7U_0603_6.3V6M +VGA_CORE Under N15x 2013/10/17 Under 4.7uF_0603_15pcs 1uF_0402_8pcs Near 47uF_0805_0pcs 22uF_0603_9pcs(2PCS 4.7uF_0805_5pcs C N15x 2013/10/07 Under 4.7uF_0603_15pcs 1uF_0402_8pcs Near 47uF_0805_0pcs 22uF_0805_9pcs(2PCS 4.7uF_0805_5pcs C unpop) unpop) N15x 2013/10/02 Under 4.7uF_0603_15pcs 1uF_0402_8pcs Near 47uF_0805_0pcs 22uF_0805_14pcs 4.7uF_0805_5pcs VGA@ PC1345 4.7U_0603_6.3V6M VGA@ PC1344 4.7U_0603_6.3V6M VGA@ PC1343 4.7U_0603_6.3V6M VGA@ PC1342 4.7U_0603_6.3V6M VGA@ PC1341 4.7U_0603_6.3V6M 1 VGA@ PC1340 4.7U_0603_6.3V6M 1 Near GPU Core VGA@ PC1339 47U_0805_6.3V6M ESD_VGA@ PC1349 0.1U_0402_25V6 ESD_VGA@ PC1348 0.1U_0402_25V6 1 2 ESD_VGA@ PC1347 0.1U_0402_25V6 ESD_VGA@ PC1346 0.1U_0402_25V6 @VGA@ PC1333 0.1U_0402_25V6 @VGA@ PC1332 0.1U_0402_25V6 2 @VGA@ PC1331 0.1U_0402_25V6 +VGA_CORE PC1321 VGA@ 22U_0603_6.3V6M @VGA@ PC1330 0.1U_0402_25V6 B +VGA_CORE unpop) B N14x Under 4.7uF_0603_10pcs 0.1uF_0402_4pcs Near 47uF_0805_1pcs 22uF_0805_1pcs 4.7uF_0805_5pcs B5V1L_Braswell-M/B_LA-D921P A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 Deciphered Date 2017/12/24 Title VGA_CORE CAP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number Custom B5V1L_Braswell-M/B_LA-D921P Date: Wednesday, May 11, 2016 Sheet 50 of 54 Rev 1.0 A B C D Version change list (P.I.R List) Item Page Title ESD request TOP red ink failed CPU core OCP setting E Page 1of for PWR Date Issue Description 3/2 3/2 Solution Description 3/7 DDR IC change TOP red ink failed 3/7 3/7 3D mark hang issue 4/25 Rev Phase add PC1346~1349 add PC1220,PC1221 location PR8129: 28.7k  27.4k PR8228: 30.9k  31.6k change 8207K SA000096O00 POP PC1220,PC1221, unpop PC1202,PC1203 PR507 change 887K to 470K A A A A A C 2 3 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 2017/12/24 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title PWR_PIR Size Document Number Custom Date: A B C D Rev 1.0 B5V1L_Braswell-M/B_LA-D921P Wednesday, May 11, 2016 Sheet E 51 of 52 Version change list (P.I.R List) Item D 10 11 12 13 14 Page 8,9,12,26,28 29,30,33,34 33 33 29 31 31 24,25,31 12 12 15 36 34 Title Other Date 02/26 Others EC USB HUB USB USB Others SOC SOC Others VGA LAN LED 02/26 02/26 02/26 03/02 03/02 03/07 03/08 03/09 03/09 03/09 03/09 03/15 TP 04/18 Page 1of for HW Phase Issue Description Change ohm to R-Short Solution Description 0_0402 to R-short: RL5,R1033,RA24,RA27,R1044,RG8,R1057,R1058,R4919 0_0603 to R-short: R1091,R1208 0_0805 to R-short: RL1,RL13,RO3 Board ID Change for PVT Change R507 from 12K to 15K For abnormal shutdown Add D2002 between SPOK and PMC_CORE_PWROK For USB2.0 eye Change R267 from 680 to 619 SMT require delete un-use ohm to avoid USB chock solder issue Del RS458,RS459,RS460,RS461 Follow B5W1S Sub/b cap PN Change CS25 P/N Change ohm to R-Short RS21,RS22,RS24,RS25,RX10,RX11,RY2,RY3,RY4,RY5,RY6,RY7,RY8,RY9 C1074 footprint to 0402 EMI reqirement Pop C1107,C1108,C1074 330P EMI reqirement Add CPU PN X2000 Drive level to high Add R4961 for 27M Change Material of tranfrom Change T2507 PN to MHPC Change RG4,RG11 from 910 to 1.24K Follow B5W1S LED test result Change RG6,RG10 from 680 to 820 Modify TP hold time Change R2563/R2564 from 2.2K to 4.7K Rev PVT 1.0 PVT PVT PVT PVT PVT PVT PVT PVT PVT PVT PVT 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 PVT 1.0 D C C B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/12/24 2017/12/24 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title HW_PIR Size Document Number Custom Date: R ev 1.0 B5V1L_Braswell-M/B_LA-D921P Wednesday, May 11, 2016 Sheet 52 of 52 ... DDR_A_CKE0 DDR_A_BS2 73 75 77 79 81 83 85 87 89 91 93 95 97 99 10 1 10 3 10 5 10 7 10 9 11 1 11 3 11 5 11 7 11 9 12 1 12 3 12 5 12 7 12 9 13 1 13 3 13 5 13 7 13 9 14 1 14 3 14 5 14 7 14 9 15 1 15 3 15 5 15 7 15 9 16 1 16 3 16 5 16 7 16 9... 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1 1 2 2 10 U _06 03_6.3V6M 10 U _06 03_6.3V6M 10 U _06 03_6.3V6M 10 U _06 03_6.3V6M 1 1 1 2 2 2 + 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K... P5 R 10 R12 R14 R16 R18 T 11 T13 T15 T17 U 10 U12 U14 U16 U18 U2 U23 U26 U5 V 11 V13 V15 V17 Y2 Y23 Y26 Y5 K 10 K12 K14 K16 K18 L 11 L13 L15 L17 M 10 M12 M14 M16 M18 N 11 N13 N15 N17 P 10 P12 VDD _0 01 VDD _00 2