A B C D E Model Name : A4WAL File Name : LA-C371P 1 Compal Confidential 2 A4WAL M/B Schematics Document Intel Braswell-M/D + N16X 2015-03-04 REV:1.0 3 4 PCB@ DAX PCB 1BW LA-C371P REV0 MB Part Number DA6001BJ000 Description PCB 1BW LA-C371P REV0 MB Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Cover Page Rev 1.0 A4WAL_Braswell-M/D_LA-C371P Date: A B C D Wednesday, March 04, 2015 Sheet E of 55 A B C D E CRT Conn P.27 eDP Conn Nvidia N16V-GL with DDR3 x8 port 0/1 port P.13 PCIe 2.0 x 5GT/s P.24 port 204pin DDR3L-SO-DIMM X1 page 15~23 DP to VGA Realtek RTD2168P.26 Memory BUS 204pin DDR3L-SO-DIMM X1 Dual Channel port P.14 1.35V DDR3L 1600 P.25 DDI x3 P.25 USB2.0 x4 port port port port HDMI Conn port RJ45 Conn port PCIE 2.0 x1 Braswell-M/D LAN(GbE) / Card Reader RTL8411B USB 3.0 Conn P.33 P.28 USB 3.0 Conn P.33 Touch Panel Conn HD Camera Conn P.24 USB HUB GL850G P.24 P.31 SOC Card Reader in 1(SD) P.29 Port1 USB Charger SLG55594 FCBGA 1170 Pin USB3.0 x2 port SATA 3.0 x2 P.32 port P.32 Port2 USB 2.0 Conn P.33 port NGFF WLAN/BT PCIE 2.0 x1 P.30 port page 05~12 HD Audio HDA Codec ALC283/255 P.36 I2C BUS LPC BUS SPI SATA ODD Conn 3 EC ENE KB9022 SATA HDD Conn RTC CKT SPI ROM 1.8V (8MB) Speaker Int MIC P.36 P.07 P.36 UAJ on Sub/B P.33 P.34 P.08 P.35 P.35 DC/DC Interface CKT P.38 Sub Board Power Circuit DC/DC P.39~P.52 LS_XXXXP USB/Audio P.33 Touch Pad PS2/I2C Int.KBD LED/Power On/Off P.35 Fan Control Issued Date Compal Electronics, Inc Compal Secret Data Security Classification P.37 2014/03/19 2015/03/18 Deciphered Date Title Block Diagrams THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A4WAL_Braswell-M/D_LA-C371P Date: A B C D Wednesday, March 04, 2015 Sheet E of 55 Rev 1.0 A B C Voltage Rails E Board ID / SKU ID Table for AD channel Power Plane D Description S0 S3 S4/S5 BOARD ID Table_LA-C371P +19V_VIN 19V Adapter power supply ON ON ON BATT+ 12V Battery power supply ON ON ON +19VB AC or battery power rail for power circuit (19V/12V) ON ON ON +RTCVCC RTC Battery Power ON ON ON +1.05VALW +1.05v Always power rail ON ON ON +1.15VALW +1.15v Always power rail ON ON ON +1.24VALW +1.24v Always power rail ON ON ON +1.8VALW +1.8v Always power rail ON ON ON +3VALW +3.3v Always power rail ON ON ON +5VALW +5.0v Always power rail ON ON ON +1.35V +1.35V power rail for DDR3L ON ON OFF +3V_PTP +3.3V power rail for PTP ON ON OFF +SOC_VCC Core voltage for SOC ON OFF OFF +SOC_VGG GFX voltage for SOC ON OFF OFF +0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF +1.8VS +1.8v system power rail ON OFF OFF +3VS +3.3v system power rail ON OFF OFF +5VS +5.0v system power rail ON OFF OFF +3VSDGPU +3.3V dGPU power rail ON** OFF OFF +VGA_CORE Core voltage for dGPU ON** OFF OFF +1.5VSDGPU +1.5V dGPU power rail ON** OFF OFF 4319X5BOL01 SMT MB AC371 A4WAL UMA HDMI 1DMIC@/255@/EMC@/HDD@/HUB@/NBYOC@/KB@/PCB@/LPC3V@/TSI@/UMA@/QHAX@ +1.05VSDGPU +1.05V dGPU power rail ON** OFF OFF 4319X5BOL02 SMT MB AC371 A4WAL DIS N16V-GM HDMI 1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/QHAW@ 4319X5BOL03 SMT MB AC371 A4WAL DIS N16S-GT HDMI 1DMIC@/255@/EMC@/GC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/SGT@/LPC3V@/TSI@/VGA@/QHAW@ 4319X5BOL04 SMT MB AC371 A4WAL DIS N16V-GM 4G HDMI 1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/DR@/QHAW@ Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF 4319X5BOL05 SMT MB AC371 A4WAL DIS N16S-GT 4G HDMI 1DMIC@/255@/EMC@/GC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/SGT@/LPC3V@/TSI@/VGA@/DR@/QHAW@ Note : ON** dGPU optimus on 4319X5BOL06 SMT MB AC371 A4WAL UMA QHAW HDMI 1DMIC@/255@/EMC@/HDD@/HUB@/NBYOC@/KB@/PCB@/LPC3V@/TSI@/UMA@/QHAW@ 4319X5BOL07 SMT MB AC371 A4WAL DIS GM2G QHAX HDMI 1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/QHAX@ 4319X5BOL08 SMT MB AC371 A4WAL DIS GM4G QHAX HDMI 1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/DR@/QHAX@ Board ID 01 02 03 PCB Revision EVT_LA-C371PR01 DVT_LA-C371PR02 PVT_LA-C371PR10 43 level BOM table 43 Level Description BOM Structure EC SMBUS Routing Table EC EC_SMB_CK1 EC_SMB_DA1 Power BAT CHGR SOC DGPU +3VALW V V X X EC_SMB_CK2 EC_SMB_DA2 +3VS X X V BOM Option Table V SOC SMBUS Routing Table Power SOC DIMM1 DIMM2 NGFF XDP EC DGPU RTD2168 X V V V SMB Address SOC_SMBCLK SOC_SMBDATA +1.8VALW to +3VS V V V I2C Map Power I2C Address +1.8VALW to +TS_PWR I2C Port2 I2C Port5 +1.8VALW to +3V_PTP Touch PAD 0xXX X V Touch Panel 0xXX Item BOM Structure Unpop @ CONN@ Connector EMC requirement EMC@ EMC requirement depop @EMC@ Touch Screen I2C TSI@ KB BL KB@ TPM TPM@ NTPM NTPM@ Power Button DBG@ dGPU VGA@ N16S-GT SKU SGT@ N16V-GM SKU VGM@ CODEC(ALC255) 255@ CODEC(ALC283) 283@ Non GPU CG6 Function NGC6@ GPU CG6 Function GC6@ BOM Option Table Item X76 VRAM with BYOC without BYOC EA Serial HDD BA Serial HDD non USB HUB USB HUB Dual Rank G-sensor CPU QHAX CPU QHAW BOM Structure X76@ BYOC@ NBYOC@ HDD@ BA@ NHUB@ HUB@ DR@ GSEN@ QHAX@ QHAW@ V X 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date Title Notes List THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A4WAL_Braswell-M/D_LA-C371P Date: A B C D Wednesday, March 04, 2015 Sheet E of 55 Rev 1.0 A B VR_ON NCP81201MNTXG 7000mA (PU901) NCP81201MNTXG (PU902) C EC_EN_1.05VALW 11000mA SY8288RAC (PU601) 5400mA RT8207MZQW (PU501) 5900mA D E +SOC_VCC +SOC_VGG +1.05VALWP VGA_PWROK EM5209VF (U60) 1060mA +1.05VSDGPU ADAPTER SYSON +1.35VP SUSP# PJ501 +19VB CHARGER 3V_EN SY8286BRAC (PU401) +0.675VSP +1.35V +3VALWP BATTERY SUSP# SY8003DFC (PU701) 700mA +1.24VALW_PWRGD SY8032ABC (PU702) 597mA +1.05VALW_PWRGD G971ADJF11U (PU801) 550mA +1.15VALWP PJ701 +1.15VALW 110mA EM5209VF (U59) +1.8VALWP +1.24VALWP PJ802 +1.8VS +1.24_1.35VALW ohm +1.24_1.35VALW_ICLK ohm +1.24_1.35VALW_USBVDDQ SUSP# EM5209VF (U11) 3135mA LAN_PWR_EN SY6288C20AAC (U67) 1400mA JP8 +3VS +3VS_WLAN ENVDD G5243AT11U (U8) +LCDVDD DGPU_PWR_EN G5243T11U (U12) +3VSDGPU_AON G5243T11U (U14) +3VSDGPU_MAIN +3V_LAN 3VSDGPU_MAIN_EN 3 EC_ON SY8286CRAC (PU402) +5VALWP SUSP# 4868mA EM5209VF (U11) J1 +5VS +VDDA ohm ODD_EN USB_PWR_EN +3VSDGPU_AON 1.5VS_DGPU_PWR_EN RT8812AGQW (PU1201) 26000mA SY8288RAC (PU1101) 10000mA +VGA_CORE SY6288C20AAC (U25) USB_CHARGE_2A +5VS_HDD G5243AT11U (U13) +5VS_ODD +USB3_VCCA SY6288C20AAC (U25) +USB3_VCCB +1.5VSDGPU Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date Title Power Rail THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.0 A4WAL_Braswell-M/D_LA-C371P Date: A B C D Wednesday, March 04, 2015 Sheet E of 55 DDR_A_D[0 63] DDR_A_DQS#[0 7] DDR_A_MA[0 15] DDR_A_MA15 DDR_A_MA14 DDR_A_MA13 DDR_A_MA12 DDR_A_MA11 DDR_A_MA10 DDR_A_MA9 DDR_A_MA8 DDR_A_MA7 DDR_A_MA6 DDR_A_MA5 DDR_A_MA4 DDR_A_MA3 DDR_A_MA2 DDR_A_MA1 DDR_A_MA0 D BD49 BD47 BF44 BF48 BB49 BJ45 BE52 BD44 BE46 BB46 BH48 BD42 BH47 BJ48 BC42 BB47 BF52 AY40 BH46 DDR_A_BS2 DDR_A_BS1 DDR_A_BS0 BG45 BA40 BH44 AU38 AY38 DDR_A_CAS# DDR_A_RAS# DDR_A_WE# DDR_A_CS1# DDR_A_CS0# BD38 BF38 AY42 DDR_A_CLK1 DDR_A_CLK1# DDR_A_CKE1 BD40 BF40 BB44 DDR_A_CLK0 DDR_A_CLK0# DDR_A_CKE0 AT30 AU30 C AV36 BA38 DDR_A_ODT0 DDR_A_ODT1 AT28 AU28 +DDRA_SOC_VREFCA +DDRA_SOC_VREFDQ BA42 AV28 DDR_A_RST# DDR_PWROK DDRA_RCOMP BA28 DDR_A_DM[0 7] DDR_A_DM7 DDR_A_DM6 DDR_A_DM5 DDR_A_DM4 DDR_A_DM3 DDR_A_DM2 DDR_A_DM1 DDR_A_DM0 BH30 BD32 AY36 BG41 BA53 AP44 AT48 AP52 DDR_A_DQS7 BH32 DDR_A_DQS#7 BG31 DDR_A_DQS6 BC30 DDR_A_DQS#6 BC32 DDR_A_DQS5 AT32 DDR_A_DQS#5 AT34 DDR_A_DQS4 BH40 DDR_A_DQS#4 BG39 DDR_A_DQS3 AY52 DDR_A_DQS#3 BA51 DDR_A_DQS2 AT42 DDR_A_DQS#2 AT41 DDR_A_DQS1 AV47 DDR_A_DQS#1 AV48 DDR_A_DQS0 AM52 DDR_A_DQS#0 AM51 B DDR_B_D[0 63] DDR_B_DQS[0 7] DDR_B_DQS#[0 7] CHV_MCP_EDS USOC1A DDR3_M0_DQ_63 DDR3_M0_DQ_62 DDR3_M0_DQ_61 DDR3_M0_DQ_60 DDR3_M0_DQ_59 DDR3_M0_DQ_58 DDR3_M0_DQ_57 DDR3_M0_DQ_56 DDR3_M0_DQ_55 DDR3_M0_DQ_54 DDR3_M0_DQ_53 DDR3_M0_DQ_52 DDR3_M0_DQ_51 DDR3_M0_DQ_50 DDR3_M0_DQ_49 DDR3_M0_DQ_48 DDR3_M0_BS_2 DDR3_M0_BS_1 DDR3_M0_BS_0 DDR3_M0_DQ_47 DDR3_M0_DQ_46 DDR3_M0_DQ_45 DDR3_M0_DQ_44 DDR3_M0_DQ_43 DDR3_M0_DQ_42 DDR3_M0_DQ_41 DDR3_M0_DQ_40 DDR3_M0_CASB DDR3_M0_RASB DDR3_M0_WEB DDR3_M0_CSB_1 DDR3_M0_CSB_0 DDR3_M0_CK_1 DDR3_M0_CKB_1 DDR3_M0_CKE_1 DDR3_M0_DQ_39 DDR3_M0_DQ_38 DDR3_M0_DQ_37 DDR3_M0_DQ_36 DDR3_M0_DQ_35 DDR3_M0_DQ_34 DDR3_M0_DQ_33 DDR3_M0_DQ_32 DDR3_M0_CK_0 DDR3_M0_CKB_0 DDR3_M0_CKE_0 RSVD1 RSVD2 DDR3_M0_ODT_0 DDR3_M0_ODT_1 DDR3_M0_OCAVREF DDR3_M0_ODQVREF DDR3_M0_DRAMRSTB DDR3_DRAM_PWROK DDR3_M0_RCOMPPD DDR3_M0_DM_7 DDR3_M0_DM_6 DDR3_M0_DM_5 DDR3_M0_DM_4 DDR3_M0_DM_3 DDR3_M0_DM_2 DDR3_M0_DM_1 DDR3_M0_DM_0 DDR3_M0_DQ_31 DDR3_M0_DQ_30 DDR3_M0_DQ_29 DDR3_M0_DQ_28 DDR3_M0_DQ_27 DDR3_M0_DQ_26 DDR3_M0_DQ_25 DDR3_M0_DQ_24 DDR3_M0_DQ_23 DDR3_M0_DQ_22 DDR3_M0_DQ_21 DDR3_M0_DQ_20 DDR3_M0_DQ_19 DDR3_M0_DQ_18 DDR3_M0_DQ_17 DDR3_M0_DQ_16 DDR3_M0_DQ_15 DDR3_M0_DQ_14 DDR3_M0_DQ_13 DDR3_M0_DQ_12 DDR3_M0_DQ_11 DDR3_M0_DQ_10 DDR3_M0_DQ_9 DDR3_M0_DQ_8 DDR3_M0_DQS_7 DDR3_M0_DQSB_7 DDR3_M0_DQS_6 DDR3_M0_DQSB_6 DDR3_M0_DQS_5 DDR3_M0_DQSB_5 DDR3_M0_DQS_4 DDR3_M0_DQSB_4 DDR3_M0_DQS_3 DDR3_M0_DQSB_3 DDR3_M0_DQS_2 DDR3_M0_DQSB_2 DDR3_M0_DQS_1 DDR3_M0_DQSB_1 DDR3_M0_DQS_0 DDR3_M0_DQSB_0 DDR3_M0_DQ_7 DDR3_M0_DQ_6 DDR3_M0_DQ_5 DDR3_M0_DQ_4 DDR3_M0_DQ_3 DDR3_M0_DQ_2 DDR3_M0_DQ_1 DDR3_M0_DQ_0 BG33 BH28 BJ29 BG28 BG32 BH34 BG29 BJ33 DDR_A_D63 DDR_A_D62 DDR_A_D61 DDR_A_D60 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56 BD28 BF30 BA34 BD34 BD30 BA32 BC34 BF34 DDR_A_D55 DDR_A_D54 DDR_A_D53 DDR_A_D52 DDR_A_D51 DDR_A_D50 DDR_A_D49 DDR_A_D48 AV32 AV34 BD36 BF36 AU32 AU34 BA36 BC36 DDR_A_D47 DDR_A_D46 DDR_A_D45 DDR_A_D44 DDR_A_D43 DDR_A_D42 DDR_A_D41 DDR_A_D40 BH38 BH36 BJ41 BH42 BJ37 BG37 BG43 BG42 DDR_A_D39 DDR_A_D38 DDR_A_D37 DDR_A_D36 DDR_A_D35 DDR_A_D34 DDR_A_D33 DDR_A_D32 BB51 AW53 BC52 AW51 AV51 BC53 AV52 BD52 DDR_A_D31 DDR_A_D30 DDR_A_D29 DDR_A_D28 DDR_A_D27 DDR_A_D26 DDR_A_D25 DDR_A_D24 AV42 AP41 AV41 AT44 AP40 AT38 AP42 AT40 DDR_A_D23 DDR_A_D22 DDR_A_D21 DDR_A_D20 DDR_A_D19 DDR_A_D18 DDR_A_D17 DDR_A_D16 AV45 AY50 AT50 AP47 AV50 AY48 AT47 AP48 DDR_A_D15 DDR_A_D14 DDR_A_D13 DDR_A_D12 DDR_A_D11 DDR_A_D10 DDR_A_D9 DDR_A_D8 AP51 AR53 AK52 AL53 AR51 AT52 AL51 AK51 DDR_A_D7 DDR_A_D6 DDR_A_D5 DDR_A_D4 DDR_A_D3 DDR_A_D2 DDR_A_D1 DDR_A_D0 DDR_B_MA[0 15] DDR_B_MA15 DDR_B_MA14 DDR_B_MA13 DDR_B_MA12 DDR_B_MA11 DDR_B_MA10 DDR_B_MA9 DDR_B_MA8 DDR_B_MA7 DDR_B_MA6 DDR_B_MA5 DDR_B_MA4 DDR_B_MA3 DDR_B_MA2 DDR_B_MA1 DDR_B_MA0 BD5 BD7 BF10 BF6 BB5 BJ9 BE2 BD10 BE8 BB8 BH6 BD12 BH7 BJ6 BC12 BB7 BF2 AY14 BH8 DDR_B_BS2 DDR_B_BS1 DDR_B_BS0 BG9 BA14 BH10 AU16 AY16 DDR_B_CAS# DDR_B_RAS# DDR_B_WE# DDR_B_CS1# DDR_B_CS0# BD16 BF16 AY12 DDR_B_CLK1 DDR_B_CLK1# DDR_B_CKE1 BD14 BF14 BB10 DDR_B_CLK0 DDR_B_CLK0# DDR_B_CKE0 AT24 AU24 AV18 BA16 DDR_B_ODT0 DDR_B_ODT1 AT26 AU26 +DDRB_SOC_VREFCA +DDRB_SOC_VREFDQ BA12 AV26 DDR_B_RST# DDR_CORE_PWROK DDRB_RCOMP BA26 DDR_B_DM[0 7] DDR_B_DM7 DDR_B_DM6 DDR_B_DM5 DDR_B_DM4 DDR_B_DM3 DDR_B_DM2 DDR_B_DM1 DDR_B_DM0 BH24 BD22 AY18 BG13 BA1 AP10 AT6 AP2 DDR_B_DQS7 BH22 DDR_B_DQS#7 BG23 DDR_B_DQS6 BC24 DDR_B_DQS#6 BC22 DDR_B_DQS5 AT22 DDR_B_DQS#5 AT20 DDR_B_DQS4 BH14 DDR_B_DQS#4 BG15 AY2 DDR_B_DQS3 DDR_B_DQS#3 BA3 DDR_B_DQS2 AT12 DDR_B_DQS#2 AT13 DDR_B_DQS1 AV7 DDR_B_DQS#1 AV6 DDR_B_DQS0 AM2 DDR_B_DQS#0 AM3 OF 13 BSW-MCP-EDS_FCBGA1170 CHV_MCP_EDS USOC1B DDR0 DDR3_M0_MA_15 DDR3_M0_MA_14 DDR3_M0_MA_13 DDR3_M0_MA_12 DDR3_M0_MA_11 DDR3_M0_MA_10 DDR3_M0_MA_9 DDR3_M0_MA_8 DDR3_M0_MA_7 DDR3_M0_MA_6 DDR3_M0_MA_5 DDR3_M0_MA_4 DDR3_M0_MA_3 DDR3_M0_MA_2 DDR3_M0_MA_1 DDR3_M0_MA_0 DDR_A_DQS[0 7] DDR3_M1_MA_15 DDR3_M1_MA_14 DDR3_M1_MA_13 DDR3_M1_MA_12 DDR3_M1_MA_11 DDR3_M1_MA_10 DDR3_M1_MA_9 DDR3_M1_MA_8 DDR3_M1_MA_7 DDR3_M1_MA_6 DDR3_M1_MA_5 DDR3_M1_MA_4 DDR3_M1_MA_3 DDR3_M1_MA_2 DDR3_M1_MA_1 DDR3_M1_MA_0 DDR1 DDR3_M1_DQ_63 DDR3_M1_DQ_62 DDR3_M1_DQ_61 DDR3_M1_DQ_60 DDR3_M1_DQ_59 DDR3_M1_DQ_58 DDR3_M1_DQ_57 DDR3_M1_DQ_56 DDR3_M1_DQ_55 DDR3_M1_DQ_54 DDR3_M1_DQ_53 DDR3_M1_DQ_52 DDR3_M1_DQ_51 DDR3_M1_DQ_50 DDR3_M1_DQ_49 DDR3_M1_DQ_48 DDR3_M1_BS_2 DDR3_M1_BS_1 DDR3_M1_BS_0 DDR3_M1_DQ_47 DDR3_M1_DQ_46 DDR3_M1_DQ_45 DDR3_M1_DQ_44 DDR3_M1_DQ_43 DDR3_M1_DQ_42 DDR3_M1_DQ_41 DDR3_M1_DQ_40 DDR3_M1_CASB DDR3_M1_RASB DDR3_M1_WEB DDR3_M1_CSB_1 DDR3_M1_CSB_0 DDR3_M1_CK_1 DDR3_M1_CKB_1 DDR3_M1_CKE_1 DDR3_M1_DQ_39 DDR3_M1_DQ_38 DDR3_M1_DQ_37 DDR3_M1_DQ_36 DDR3_M1_DQ_35 DDR3_M1_DQ_34 DDR3_M1_DQ_33 DDR3_M1_DQ_32 DDR3_M1_CK_0 DDR3_M1_CKB_0 DDR3_M1_CKE_0 RSVD1 RSVD2 DDR3_M1_DQ_31 DDR3_M1_DQ_30 DDR3_M1_DQ_29 DDR3_M1_DQ_28 DDR3_M1_DQ_27 DDR3_M1_DQ_26 DDR3_M1_DQ_25 DDR3_M1_DQ_24 DDR3_M1_ODT_0 DDR3_M1_ODT_1 DDR3_M1_OCAVREF DDR3_M1_ODQVREF DDR3_M1_DRAMRSTB DDR3_VCCA_PWROK DDR3_M1_DQ_23 DDR3_M1_DQ_22 DDR3_M1_DQ_21 DDR3_M1_DQ_20 DDR3_M1_DQ_19 DDR3_M1_DQ_18 DDR3_M1_DQ_17 DDR3_M1_DQ_16 DDR3_M1_RCOMPPD DDR3_M1_DM_7 DDR3_M1_DM_6 DDR3_M1_DM_5 DDR3_M1_DM_4 DDR3_M1_DM_3 DDR3_M1_DM_2 DDR3_M1_DM_1 DDR3_M1_DM_0 DDR3_M1_DQ_15 DDR3_M1_DQ_14 DDR3_M1_DQ_13 DDR3_M1_DQ_12 DDR3_M1_DQ_11 DDR3_M1_DQ_10 DDR3_M1_DQ_9 DDR3_M1_DQ_8 DDR3_M1_DQS_7 DDR3_M1_DQSB_7 DDR3_M1_DQS_6 DDR3_M1_DQSB_6 DDR3_M1_DQS_5 DDR3_M1_DQSB_5 DDR3_M1_DQS_4 DDR3_M1_DQSB_4 DDR3_M1_DQS_3 DDR3_M1_DQSB_3 DDR3_M1_DQS_2 DDR3_M1_DQSB_2 DDR3_M1_DQS_1 DDR3_M1_DQSB_1 DDR3_M1_DQS_0 DDR3_M1_DQSB_0 DDR3_M1_DQ_7 DDR3_M1_DQ_6 DDR3_M1_DQ_5 DDR3_M1_DQ_4 DDR3_M1_DQ_3 DDR3_M1_DQ_2 DDR3_M1_DQ_1 DDR3_M1_DQ_0 BG21 BH26 BJ25 BG26 BG22 BH20 BG25 BJ21 DDR_B_D63 DDR_B_D62 DDR_B_D61 DDR_B_D60 DDR_B_D59 DDR_B_D58 DDR_B_D57 DDR_B_D56 BD26 BF24 BA20 BD20 BD24 BA22 BC20 BF20 DDR_B_D55 DDR_B_D54 DDR_B_D53 DDR_B_D52 DDR_B_D51 DDR_B_D50 DDR_B_D49 DDR_B_D48 AV22 AV20 BD18 BF18 AU22 AU20 BA18 BC18 DDR_B_D47 DDR_B_D46 DDR_B_D45 DDR_B_D44 DDR_B_D43 DDR_B_D42 DDR_B_D41 DDR_B_D40 BH16 BH18 BJ13 BH12 BJ17 BG17 BG11 BG12 DDR_B_D39 DDR_B_D38 DDR_B_D37 DDR_B_D36 DDR_B_D35 DDR_B_D34 DDR_B_D33 DDR_B_D32 BB3 AW1 BC2 AW3 AV3 BC1 AV2 BD2 DDR_B_D31 DDR_B_D30 DDR_B_D29 DDR_B_D28 DDR_B_D27 DDR_B_D26 DDR_B_D25 DDR_B_D24 AV12 AP13 AV13 AT10 AP14 AT16 AP12 AT14 DDR_B_D23 DDR_B_D22 DDR_B_D21 DDR_B_D20 DDR_B_D19 DDR_B_D18 DDR_B_D17 DDR_B_D16 AV9 AY4 AT4 AP7 AV4 AY6 AT7 AP6 DDR_B_D15 DDR_B_D14 DDR_B_D13 DDR_B_D12 DDR_B_D11 DDR_B_D10 DDR_B_D9 DDR_B_D8 AP3 AR1 AK2 AL1 AR3 AT2 AL3 AK3 DDR_B_D7 DDR_B_D6 DDR_B_D5 DDR_B_D4 DDR_B_D3 DDR_B_D2 DDR_B_D1 DDR_B_D0 D C B OF 13 BSW-MCP-EDS_FCBGA1170 close to SOC pin Close To SOC Pin 182_0402_1% 182_0402_1% 1 R963 R964 Close To SOC Pin DDRA_RCOMP DDRB_RCOMP +1.35V_SOC EMC@ DDR_CORE_PWROK C1159 1U_0402_16V7K V0.2 modify @ R980 4.7K_0402_1% @ R974 4.7K_0402_1% +DDRA_SOC_VREFCA +1.35V_SOC V0.2 modify @ 1 @ C1136 1U_0402_16V7K +DDRB_SOC_VREFCA R1064 4.7K_0402_1% @ R979 4.7K_0402_1% @ C1138 1U_0402_16V7K ESD request 0211 +1.35V_SOC A S IC FH8066501715905 QHAX B1 1.36G FCBGA15 1380 SA00008GO00 USOC1 QHAW@ +DDRA_SOC_VREFDQ @ R965 4.7K_0402_1% 1 @ R966 4.7K_0402_1% USOC1 QHAX@ Issued Date +DDRB_SOC_VREFDQ @ R971 4.7K_0402_1% @ R967 4.7K_0402_1% @ C1132 1U_0402_16V7K 2014/03/19 @ C1137 1U_0402_16V7K A Compal Electronics, Inc Compal Secret Data Security Classification S IC FH8066501715905 QHAW B1 1.36G FCBGA15 1380 SA00008GO10 +1.35V_SOC 2015/03/18 Deciphered Date Title VLV-M SOC Memory DDR3L THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A4WAL_Braswell-M/D_LA-C371P Date: Wednesday, March 04, 2015 Sheet of 55 Rev 1.0 +1.8VALW eDP NC A M42 K42 EDP_AUXP EDP_AUXN R51 EDP_HPD# DDI1_ENBKL DDI1_PWM ENVDD R986 DDI1_RCOMPP 402_0402_1% DDI1_RCOMPN ENVDD F40 G40 SOC_DDI2_TXP0 SOC_DDI2_TXN0 J40 K40 SOC_DDI2_TXP1 SOC_DDI2_TXN1 F42 G42 DP to CRT Translater D44 F44 D48 C49 SOC_DDI2_AUXP SOC_DDI2_AUXN SOC_DDI2_HPD# U51 T51 T52 B53 A52 E52 D52 B50 B49 E53 C53 A51 A49 G44 VGA GPIO reserve VGA_SELECT3 RSVD17 RSVD16 MCSI_COMP DDI1_TXP_0 DDI1_TXN_0 1.35V DDI1_TXP_1 DDI1_TXN_1 1.35V DDI1_TXP_2 DDI1_TXN_2 1.35V DDI1_TXP_3 DDI1_TXN_3 1.35V DDI1_AUXP DDI1_AUXN HV_DDI1_HPD DDI1 1.8V GP_CAMERASB09 GP_CAMERASB10 GP_CAMERASB11 1.35V 1.35V DDI2_TXP_2 DDI2_TXN_2 1.35V DDI2_TXP_3 DDI2_TXN_3 1.35V DDI2_AUXP DDI2_AUXN 1.35V 1.8V SDMMC1 DDI2 SDMMC1_D0 SDMMC1_D1 SDMMC1_D2 SDMMC1_D3_CD_B MMC1_D4_SD_WE MMC1_D5 MMC1_D6 MMC1_D7 MMC1_RCLK SDMMC1_RCOMP SDMMC2_CLK SDMMC2_CMD 1.8V HV_DDI2_DDC_SCL HV_DDI2_DDC_SDA RSVD6 RSVD3 RSVD9 RSVD8 RSVD5 RSVD4 RSVD10 RSVD7 RSVD2 RSVD1 RSVD11 SDMMC1_CLK SDMMC1_CMD 1.35V DDI2_TXP_1 DDI2_TXN_1 HV_DDI2_HPD R1003 1.8V SDMMC2 SDMMC2_D0 SDMMC2_D1 SDMMC2_D2 SDMMC2_D3_CD_B 1.8V 1.8V/3.3V SDMMC3_CLK SDMMC3_CMD SDMMC3_CD_B NC's EC_KBRST# 1.8V/3.3V SDMMC3 SDMMC3_D0 SDMMC3_D1 SDMMC3_D2 SDMMC3_D3 1.8V SDMMC3_1P8_EN 1.8V SDMMC3_PWR_EN_B 1.8V/3.3V SDMMC3_RCOMP M6 M4 P9 P7 T6 T7 T10 T12 T13 P13 DGPU_PWR_EN1 DGPU_HOLD_RST#_SOC1.8V SOC_DDI2_HPD# D G Q79 L2N7002LT1G_SOT23-3 DDI2_HPD S TP_INT# K10 K9 +1.8VALW DGPU_PRSNT# V0.2 modify R641 R642 R970 @ @ 210K_0402_5% 210K_0402_5% GP_CAMERASB08 GP_CAMERASB09 UMA H DIS L* +1.8VALW UMA@ R1046 10K_0402_5% 100_0402_1% DGPU_PRSNT# MMC1_RCOMP If unused, terminate 100 ? ±1% resistor near to SoC Braswell PDG_0p95 P.200 M12 M10 K7 K6 G_INT_R B VGA@ R1045 10K_0402_5% EC_LID_OUT# F2 D2 K3 VRAM RANK GPIO J1 J3 H3 G2 N16S-GT GPIO VGA_SELECT2 K2 L3 P12 R969 80.6_0402_1% BSW-MCP-EDS_FCBGA1170 VGA_SELECT1 +1.8VALW Dual Rank H Single Rank L R992 1K_0402_5% DR@ VGA_SELECT2 +1.8VALW N16S-GT H N16V-GM L R1036 1K_0402_5% SGT@ VGA_SELECT1 V0.2 modify R1008 20K_0402_5% @ Checklist R0.95 Page 194 RCOMP=80ohm_1% (not exist in ISPD) V0.2 modify C R637 10K_0402_5% 2 150_0402_1% R1037 10K_0402_5% VGM@ VGA_SELECT3 NL17SZ07DFT2G_SC70-5 SA00004BV00 M7 P6 OF 13 R1033 1K_0402_5% @ L GP_CAMERASB09 TP_INT# +1.8VALW H 100K_0804_8P4R_5% DP to VGA AB41 AB45 AB44 DGPU_PRSNT# AC53 DGPU_PWR_EN1 AB51 DGPU_HOLD_RST#_SOC1.8V AB52 VGA_SELECT1 AA51 VGA_SELECT2 AB40 VGA_SELECT3 Y44 GP_CAMERASB08 Y42 Y41 V40 INVT_PWM_SOC +1.8VALW T50 T48 P44 INVT_PWM_SOC 1.8V PANEL1_BKLTEN 1.8V PANEL1_BKLTCTL 1.8V PANEL1_VDDEN 1.8V DDI1_PLLOBS_P 1.35V DDI1_PLLOBS DDI2_TXP_0 DDI2_TXN_0 GP_CAMERASB00 GP_CAMERASB01 GP_CAMERASB02 GP_CAMERASB03 GP_CAMERASB04 GP_CAMERASB05 GP_CAMERASB06 GP_CAMERASB07 GP_CAMERASB08 P47 P45 M48 M47 B P51 P52 R53 F47 F49 1.8V 1.8V 1.8V 1.35V Y A M52 M51 eDP Panel PANEL0_BKLTEN PANEL0_BKLTCTL PANEL0_VDDEN DDI0_PLLOBS_P DDI0_PLLOBS MCSI_2_DP_0 MCSI_2_DN_0 MCSI_2_DP_1 MCSI_2_DN_1 1.8V NC L53 L51 HV_DDI0_DDC_SCL HV_DDI0_DDC_SDA DDI1_PWM K51 K52 EDP_TXP1 EDP_TXN1 1.8V P50 P48 J51 H51 EDP_TXP0 EDP_TXN0 C MCSI_2_CLKP MCSI_2_CLKN U64 1 R968 DDI0_RCOMPP 402_0402_1% DDI0_RCOMPN Y51 Y52 V52 V51 W53 F38 G38 1.35V DDI1_ENBKL ENVDD DDI1_PWM HDMI_DDCCLK HDMI_DDCDATA HV_DDI0_HPD RP41 +1.8VALW DDI0_AUXP DDI0_AUXN 1.24V 0_0402_5% @ HDMI_HPD# 1.35V INVT_PWM_SOC 4.7K_0402_5% R1161 A A R1035 20K_0402_5% @ Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date Title VLV-M SOC Display THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A4WAL_Braswell-M/D_LA-C371P Date: D W51 1.35V DDI0_TXP_3 DDI0_TXN_3 H47 H46 DDI0_TXP_2 DDI0_TXN_2 ENBKL @ 4.7K_0402_5% R1159 G53 G52 MCSI_1_DP_0 MCSI_1_DN_0 MCSI_1_DP_1 MCSI_1_DN_1 MCSI_1_DP_2 MCSI_1_DN_2 MCSI_1_DP_3 MCSI_1_DN_3 +3VS T44 T45 Y47 Y48 V45 V47 V50 V48 T41 T42 HDMI_CLK+ HDMI_CLK- DDI0 R1142 P HDMI_TX0+ HDMI_TX0- MCSI_1_CLKP MCSI_1_CLKN G 1.35V K48 K47 F53 F52 DDI0_TXP_1 DDI0_TXN_1 RSVD14 RSVD13 ENBKL NL17SZ07DFT2G_SC70-5 SA00004BV00 @ H49 H50 1.35V HDMI_TX1+ HDMI_TX1- DDI0_TXP_0 DDI0_TXN_0 ENBKL D50 C51 M44 K44 HDMI_TX2+ HDMI_TX2- MCSI and Camera interface HDMI Y D RSVD15 RSVD12 U61 P DDI1_ENBKL G CHV_MCP_EDS USOC1C Wednesday, March 04, 2015 Sheet of 55 Rev 1.0 Follow DVR1044_ACER_HSIO Mapping Design Guide_V1p0 D D CHV_MCP_EDS USOC1D PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0 dGPU PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1 WLAN PCIE_PTX_C_DRX_P2 PCIE_PTX_C_DRX_N2 PCIE_PRX_DTX_P2 PCIE_PRX_DTX_N2 PCIE LAN PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_N3 PCIE_PRX_DTX_P3 PCIE_PRX_DTX_N3 VGA@ VGA@ CC17 CC21 1U_0402_16V7K 1U_0402_16V7K PEG_HTX_GRX_P0 PEG_HTX_GRX_N0 PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0 C24 B24 G20 J20 VGA@ VGA@ CC18 CC19 1U_0402_16V7K 1U_0402_16V7K PEG_HTX_GRX_P1 PEG_HTX_GRX_N1 PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1 A25 C25 D20 F20 C1135 C1000 1U_0402_16V7K 1U_0402_16V7K C1133 C1134 C 1U_0402_16V7K 1U_0402_16V7K VGA_CLKREQ# WLAN_CLKREQ# LAN_CLKREQ# dGPU WLAN LAN R991 @ PCIE_PTX_DRX_P2 PCIE_PTX_DRX_N2 PCIE_PRX_DTX_P2 PCIE_PRX_DTX_N2 PCIE_PTX_DRX_P3 A27 PCIE_PTX_DRX_N3 C27 PCIE_PRX_DTX_P3 G24 PCIE_PRX_DTX_N3 J24 VGA_CLKREQ# PCIE_CLKREQ_1# WLAN_CLKREQ# LAN_CLKREQ# AM10 AM12 AK14 AM14 CLK_DIFF_P_4 CLK_DIFF_N_4 A21 C21 C19 B20 C18 B18 C17 A17 C16 B16 CLK_PEG_VGA CLK_PEG_VGA# CLK_PCIE_WLAN CLK_PCIE_WLAN# CLK_PCIE_LAN CLK_PCIE_LAN# CLK_DIFF_P_4 402_0402_1% CLK_DIFF_N_4 B26 C26 D22 F22 R975 PCIE_RCOMPP 402_0402_1% PCIE_RCOMPN D26 F26 V14 Y13 Y12 V13 V12 PCIE_TXP0 PCIE_TXN0 PCIE_RXP0 PCIE_RXN0 3.3V PCIE_TXP1 PCIE_TXN1 PCIE_RXP1 PCIE_RXN1 PCIE_TXP2 PCIE_TXN2 PCIE_RXP2 PCIE_RXN2 SATA_LEDN SATA_GP0 SATA_GP1 1.8V SATA_GP2 SATA_GP3 SATA PCIe 1.05V PCIE_TXP3 PCIE_TXN3 PCIE_RXP3 PCIE_RXN3 SATA_OBSP SATA_OBSN FST_SPI_CLK PCIE_CLKREQ0B PCIE_CLKREQ1B PCIE_CLKREQ2B PCIE_CLKREQ3B CLK_DIFF_P_0 CLK_DIFF_N_0 CLK_DIFF_P_1 CLK_DIFF_N_1 CLK_DIFF_P_2 CLK_DIFF_N_2 CLK_DIFF_P_3 CLK_DIFF_N_3 CLK_DIFF_P_4 CLK_DIFF_N_4 FST_SPI_CS0_B FST_SPI_CS1_B FST_SPI_CS2_B 1.8V FST_SPI_D0 FST_SPI_D1 FST_SPI_D2 FST_SPI_D3 FAST SPI 1.8V 1.05V MF_HDA_RSTB MF_HDA_SDI1 MF_HDA_CLK 1.8V/ MF_HDA_SDI0 MF_HDA_SYNC 1.5V MF_HDA_SDO MF_HDA_DOCKENB MF_HDA_DOCKRSTB PCIE_OBSP PCIE_OBSN AUDIO SPI1_CLK SPI1_CS0_B SPI1_CS1_B SPI1_MISO SPI1_MOSI SATA_TXP0 SATA_TXN0 SATA_RXP0 SATA_RXN0 SATA_TXP1 SATA_TXN1 SATA_RXP1 SATA_RXN1 SPI 1.8V 1.8V 1.8V SPKR GP_SSP_2_CLK GP_SSP_2_FS GP_SSP_2_TXD GP_SSP_2_RXD C31 B30 N28 M28 C29 A29 J28 K28 AH3 AH2 AG3 AG1 AF3 N30 M30 SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 SATA_PRX_DTX_P0 SATA_PRX_DTX_N0 SATA_PTX_DRX_P1 SATA_PTX_DRX_N1 SATA_PRX_DTX_P1 SATA_PRX_DTX_N1 R639 DEVSLP0_SOC DEVSLP1_SOC @ HDD ODD 10K_0402_5% +1.8VS Checklist P.24 requset TS_INT_R# T188 @ T192 @ SATA_RCOMPP R972 SATA_RCOMPN 402_0402_1% W3 SOC_SPI_CLK V4 SOC_SPI_CS0# V6 SOC_SPI_CS1# V7 C T193@ +1.8VALW RP40 V2 V3 U1 U3 SOC_SPI_MOSI SOC_SPI_MISO SOC_SPI_WP# SOC_SPI_HOLD# AF13 AD6 AD9 AD7 AF12 AF14 AB9 AB7 HDA_RST# H4 SOC_SPKR HDA_BIT_CLK HDA_SDIN0 HDA_SYNC HDA_SDOUT VGA_CLKREQ# PCIE_CLKREQ_1# WLAN_CLKREQ# LAN_CLKREQ# 10K_0804_8P4R_5% T189 @ RP55 HDA_SDIN0 T191 HDA_SYNC HDA_SDOUT HDA_BIT_CLK HDA_RST# @ SOC_SPKR HDA_SYNC_AUDIO HDA_SDOUT_AUDIO HDA_BITCLK_AUDIO HDA_RST_AUDIO# 75_0804_8P4R_1% AK9 AK10 AK12 AK13 OF 13 BSW-MCP-EDS_FCBGA1170 B B Checklist suggest PU 100K Follow VC(V0.1) +BIOS_SPI +BIOS_SPI R999 3.3K_0402_5% SPI_CS0# R1001 20K_0402_5% SPI_WP# R1000 20K_0402_5% SPI_HOLD# +1.8VALW R998 C1013 0_0402_5% @ 1U_0402_16V7K From CPU SOC_SPI_CS0# EMC@ SPI_CS0# R2581 33_0402_5% SOC_SPI_WP# EMC@ SPI_WP# R2580 10_0402_5% RP37 SOC_SPI_HOLD# SOC_SPI_MOSI SOC_SPI_MISO SOC_SPI_CLK A SPI_HOLD# SPI_MOSI SPI_MISO SPI_CLK SPI ROMU56( 8MByte ) 1.8V SPI_CS0# SPI_MISO SPI_WP# CS# VCC DO(IO1) HOLD#(IO3) WP#(IO2) CLK GND DI(IO0) +BIOS_SPI SPI_HOLD# SPI_CLK SPI_MOSI W25Q64DWSSIG_SO8 U56 change to SA00006ZV10 for Quad-I/O A 10_0804_8P4R_5% EMC@ Reserve for EMI(Near SPI ROM) SPI_CLK @EMC@ R1002 33_0402_5% @EMC@ C1014 10P_0402_50V8J Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date Title VLV-M SOC SATA/PCI-E/HDA THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A4WAL_Braswell-M/D_LA-C371P Date: Wednesday, March 04, 2015 Sheet of 55 Rev 1.0 USOC1E V0.2 modify GND GND C1005 15P_0402_50V8J D ICLK_ICOMP ICLK_RCOMP C1023 15P_0402_50V8J J26 N26 P20 N20 P26 K26 M26 AH45 A9 C9 B8 B7 B5 B4 19.2MHZ_10PF_7M19200019 Change P/N to SJ10000N700 19.2MHz_12pF R984 R985 2.49K_0402_1% ICLK_ICOMP 49.9_0402_1% ICLK_RCOMP SOC_GPIO_DFX5 SOC_GPIO_DFX6 49.9_1% for RCOMP 2.49K_1% for ICOMP +1.8VALW R959 0_0402_5% EC_SCI# @ EC_SCI# EC_SMI# V0.2 modify +1.8VALW C R1016 R1022 R995 100_0402_1% 20K_0402_5% SOC_GPIO_DFX5 20K_0402_5% SOC_GPIO_DFX6 1.05V RSVD13 RSVD17 ICLKICOMP ICLKRCOMP RSVD18 RSVD14 RSVD16 RSVD1 MF_PLT_CLK0 MF_PLT_CLK1 MF_PLT_CLK2 MF_PLT_CLK3 MF_PLT_CLK4 MF_PLT_CLK5 GPIO_DFX0 GPIO_DFX1 GPIO_DFX2 GPIO_DFX3 GPIO_DFX4 GPIO_DFX5 GPIO_DFX6 GPIO_DFX7 GPIO_DFX8 RSVD3 RSVD2 RSVD9 RSVD8 RESERVED iCLK 1.8V RSVD5 RSVD7 RSVD4 RSVD6 RSVD11 RSVD10 RSVD12 RSVD15 I2C0_SCL I2C0_SDA I2C1_SCL I2C1_SDA 1.8V GPIO_SUS0 GPIO_SUS1 GPIO_SUS2 GPIO_SUS3 1.8V GPIO_SUS4 GPIO_SUS5 GPIO_SUS6 GPIO_SUS7 SEC_GPIO_SUS9 SEC_GPIO_SUS8 SEC_GPIO_SUS10 SEC_GPIO_SUS11 GPIO0_RCOMP GPIO_ALERT I2C2_SCL I2C2_SDA I2C 1.8V I2C3_SCL I2C3_SDA I2C4_SCL I2C4_SDA I2C5_SCL I2C5_SDA I2C6_SCL I2C6_SDA I2C_NFC_SCL I2C_NFC_SDA MF_SMB_CLK MF_SMB_DATA MF_SMB_ALERTB SMBUS 1.8V C11 B10 F12 F10 D12 E8 C7 D6 D J12 F7 J14 L13 AK6 AH7 AF6 AH6 AF9 AF7 SOC_I2C2_CLK SOC_I2C2_DATA AE4 AD2 AC1 AD3 AB2 AC3 SOC_I2C5_CLK SOC_I2C5_DATA AA1 AB3 AA3 Y2 I2C_NFC_SCL I2C_NFC_SDA T213@ T214@ AM6 AM7 AM9 PCU_SMB_CLK PCU_SMB_DATA PCU_SMB_ALERT# R1155 R1180 R1181 +1.8VALW @ @ @ 1K_0402_5% 1K_0402_5% 1K_0402_5% C V0.2 modify OF 13 BSW-MCP-EDS_FCBGA1170 @ @ AD51 AD52 AH50 AH48 SOC_GPIO_SUS4 AH51 SOC_GPIO_SUS5 AH52 SOC_GPIO_SUS6 AG51 AG53 EC_SMI# AF52 SOC_GPIO_SUS9 AF51 SOC_GPIO_SUS8 AE51 AC51 GPIO_RCOMP AH40 Y3 DDI0_ENABLE DDI1_ENABLE SOC_GPIO_SUS2 V1.0 modify R1175 4.7K_0402_5% DDI0_ENABLE DDI1_ENABLE R1176 4.7K_0402_5% AM40 AM41 AM44 AM45 AM47 AK48 AM48 AK41 AK42 OSCIN OSCOUT PLTFM CLK's Y7 GPIO_DFX P24 XTAL_19.2M_IN XTAL_19.2M_OUT M22 1 XTAL_19.2M_OUT 200K_0402_5% GPIO_SUS XTAL_19.2M_IN1 R1004 CHV_MCP_EDS SOC_GPIO_SUS4: BIOS Boot Selection = LPC = SPI (internal PU) For Touch Screen SOC_GPIO_SUS8: ICLK, USB 2.0, DDI SFR supply select : = Supply is 1.25V = Supply is 1.35V 5 G SOC_I2C2_CLK_L SOC_I2C2_DATA_L D 1R2566 1R2565 I2C2_SCL_PNL I2C2_SDA_PNL S 2.2K_0402_5% TSI@ 2.2K_0402_5% TSI@ I2C2_SCL_PNL TSI@ Q2511A DMN63D8LDW-7_SOT363-6 SB000013K00 SOC_I2C2_DATA_L I2C2_SDA_PNL TSI@ Q2511B DMN63D8LDW-7_SOT363-6 SB000013K00 SOC_I2C2_CLK_L D TSI@Q2512A PJT138KA 2N SOT363-6 SB000016K00 SOC_I2C2_DATA TSI@Q2512B PJT138KA 2N SOT363-6 SB000016K00 SOC_I2C2_CLK +3VALW V0.2 modify G SOC_GPIO_SUS6: Halt Boot Strap: 1= Normal Operation S R1048 4.7K_0402_5% SOC_GPIO_SUS8 SOC_GPIO_SUS9 V0.2 modify +TS_PWR D 10K_0402_5% TSI@ I2C2_SCL_PNL 2.2K_0402_5% R1147 TSI@ I2C2_SDA_PNL 2.2K_0402_5% R1150 G V1.0 modify @ +1.8VALW +TS_PWR G SOC_GPIO_SUS6 D SOC_GPIO_SUS4 4.7K_0402_1% 2 100K_0402_5% R981 (v0.1) R1143 SOC_I2C2_DATA R1144 SOC_I2C2_CLK @ @ S R977 1K_0402_5% 1K_0402_5% S +1.8VALW R1040 Spec & CRB is reserve VC pop +1.8VALW V0.2 modify For Touch Pad B B Spec & CRB is reserve VC pop (v0.1) SOC_GPIO_SUS5: Security Flash Descriptors = Override = Normal Operation (Internal PU) BIOS/EFI Top Swap +1.8VALW 1K_0402_5% 1K_0402_5% @ @ R1153 SOC_I2C5_DATA R1152 SOC_I2C5_CLK +1.8VALW +3V_PTP +1.8VALW SOC_I2C5_CLK_L SOC_I2C5_DATA_L G D S Issued Date C151 1U_0402_16V7K 2014/03/19 2015/03/18 Deciphered Date Title DDR_SMB_DA A DDR V0.2 modify VLV-M SOC CLK/PMU/SPI THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A4WAL_Braswell-M/D_LA-C371P Date: 2 S DDR_SMB_CK Compal Electronics, Inc Compal Secret Data Security Classification 3 Q2507A DMN63D8LDW-7_SOT363-6 SB000013K00 PCU_SMB_DATA_L Q2507B DMN63D8LDW-7_SOT363-6 SB000013K00 PCU_SMB_CLK_L S PCU_SMB_CLK Q2502A PJT138KA 2N SOT363-6 SB000016K00 PCU_SMB_DATA Q2502B PJT138KA 2N SOT363-6 SB000016K00 D W=20mils DDR_SMB_CK DDR_SMB_DA S 1R2570 1R2569 D 2.2K_0402_5%2 2.2K_0402_5%2 +3VS G V0.2 modify W=10mil BAS40-04_SOT23-3 G W=20mils I2C5_SDA_TP PCU_SMB_CLK_L PCU_SMB_DATA_L 1R2562 1R2561 +RTCVCC +1.8VALW +3VS D22 I2C5_SCL_TP V0.2 modify A D G 1R2564 1R2563 +3VALW 2.2K_0402_5%2 2.2K_0402_5%2 +CHGRTC G S 2.2K_0402_5%2 2.2K_0402_5%2 TXE_DBG SOC_GPIO_SUS2: Top Swap( A16 Override ) = Change Boot Loader address = Normal Operation Reference checklist 0.92 P.37 +RTCBATT D S +3VALW I2C5_SCL_TP Q2508A DMN63D8LDW-7_SOT363-6 SB000013K00 SOC_I2C5_DATA_L I2C5_SDA_TP Q2508B DMN63D8LDW-7_SOT363-6 SB000013K00 SOC_I2C5_CLK_L G R1051 0_0402_5% G Q62 L2N7002LT1G_SOT23-3 SOC_I2C5_CLK Q2509A PJT138KA 2N SOT363-6 SB000016K00 SOC_I2C5_DATA Q2509B PJT138KA 2N SOT363-6 SB000016K00 D 2 V1.0 modify For BOM S S I2C5_SDA_TP D D I2C5_SCL_TP S SOC_GPIO_SUS5 @ R1011 10K_0402_5% @ R1156 R1157 G SOC_GPIO_SUS2 2.2K_0402_5% 2.2K_0402_5% EC programing : "High"for Flash BIOS R978 10K_0402_5% D R1006 10K_0402_5% G +3V_PTP +1.8VALW Wednesday, March 04, 2015 Sheet of 55 Rev 1.0 USOC1F 1.24V USB_HSIC_1_STROBE USB_HSIC_1_DATA USB_HSIC_RCOMP RSVD5 RSVD2 RSVD8 RSVD9 UART1_TXD UART1_RXD UART1_CTS_B UART1_RTS_B 1.8V RSVD12 RSVD13 UART2_TXD UART2_RXD UART2_CTS_B UART2_RTS_B P16 P14 B46 B47 A48 USB20_P3 USB20_N3 Touch screen USB20_P4 USB20_N4 USB2.0 Hub USB_OC1# USB_OC0# USB2_OBSP USB_VBUSSNS USB2_RCOMP R988 113_0402_1% M36 N36 R1032 0_0402_5% RP39 Y6 Y7 V9 V10 PMC_CORE_PWROK 10K_0804_8P4R_5% 1K_0402_5% R485 100K_0402_5% @EMC@ 0.047U_0402_25V7K C1007 DDR_CORE_PWROK EMC@ 1U_0402_16V7K C1158 PMC_PLTRST# @EMC@ 22P_0402_50V8J C1006 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 R1014 LPC_CLK_0 R1017 LPC_CLK_1 @ @ P2 R3 T3 P3 M3 M2 N3 N1 R1013 LPC_RCOMP SOC_SERIRQ 100_0402_1%1 T4 T2 GPU_EVENT# GC6_FB_EN_R DGPU_PWR_EN2 DGPU_PWR_EN2 R990 EC_RSMRST# @ R1015 49.9_0402_1% V0.2 modify 2 15P_0402_50V8J +1.8VALW R1023 20K_0402_1% C1010 15P_0402_50V8J H_PROCHOT# RSVD6 RSVD7 RSVD4 RSVD3 RSVD1 RSVD2 PROCHOT_B 1.8V Internal PD 2K @EMC@ C1002 10P_0402_50V8J Y8 change P/N to SJ10000LV00 for ESRH 17.16V 17.63V 18.12V H >L 16.76V 17.22V 17.70V VILIM = 20*ILIM*Rsr ILIM = 3.3*100/(100+316)/20/0.01 = 3.966 A ILIM*0.01*20(IC Current sense amplifier gain)= VPR311*20=+3VALW*100(PR317)/(100+316) @ PC323 100P_0402_50V8J Close EC chip Compal Electronics, Inc Compal Secret Data Security Classification Issued Date 2014/03/19 Deciphered Date 2015/03/18 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Charger A4WAL_Braswell-M/D_LA-C371P Date: A B C W ednesday, March 04, 2015 D Sheet 41 of 55 Rev 1.0 A B C D E Module model information SY8208B_V2.mdd SY8208C_V2.mdd 1 +19VB PR402 499K_0402_1% ENLDO_3V5V PU401 SY8286BRAC_QFN20_3X3 BST_3V1 +19VB_3V PC403 SPOK Check pull up resistor of SPOK at HW side Vout is 3.234V~3.366V PC402 PR403 1000P_0402_25V8J 1K_0402_5% 2 3V_FB 3V_EN PR407 0_0603_5% PC416 0.1U_0402_25V6 +3VALW 2 +5VALW JUMP_43X118 BS VL @ PC427 22U_0603_6.3V6M @ PC428 22U_0603_6.3V6M 1 PC423 22U_0603_6.3V6M PC421 22U_0603_6.3V6M 21 +5VALWP PC420 22U_0603_6.3V6M 16 1.5UH_PCMB053T-1R5MS_6A_20% 17 PR408 @EMI@ @EMI@ PC419 680P_0603_50V7K 4.7_1206_5% 18 5V LDO 150mA~300mA LDO 15 LX_5V PC424 4.7U_0603_6.3V6M PL404 19 4.7U_0603_6.3V6M NC GND 14 NC OUT VCC 5*5*3 20 PC425 5V_SN 2 IN IN PG ENLDO_3V5V PR409 2.2K_0402_5% @ PR410 0_0402_5% GND FF 10 LX GND 11 @ PR413 0_0402_5% GND 13 IN IN SPOK LX EN1 LX EN2 12 LX_5V MAINPWON PU402 SY8286CRAC_QFN20_3X3 5V_EN @ BST_5V @EMI@ PC418 0.1U_0402_25V6 PC415 10U_0805_25V6K EMI@ PC417 2200P_0402_50V7K +19VB_5V PC414 10U_0805_25V6K EMI@ PL403 @ PJ402 +5VALWP @ JUMP_43X118 +19VB_5V 5A_Z120_25M_0805_2P +3VALWP PC422 22U_0603_6.3V6M +19VB EC_ON Ipeak=7A Imax=4.9A Iocp=10A @ PJ401 PC410 22U_0603_6.3V6M 15 3.3V LDO 150mA~300mA PC409 22U_0603_6.3V6M NC 21 PC411 4.7U_0603_6.3V6M +3VALWP PC408 22U_0603_6.3V6M +3VLP 16 1.5UH_PCMB053T-1R5MS_6A_20% 17 GND 14 FF 12 11 PR412 100K_0402_5% 18 NC @EMI@ PR405 4.7_1206_5% LDO NC LX_3V PG +19VB PL402 19 GND 20 PC407 22U_0603_6.3V6M 2 IN BS GND OUT LX ENLDO_3V5V +3VALWP LX GND EN2 LX 13 IN IN IN EN1 LX_3V 10 0.1U_0402_25V6 PC405 10U_0805_25V6K @EMI@ PC401 0.1U_0402_25V6 EMI@ PC404 2200P_0402_50V7K EMI@ PL401 PR401 @ 0_0603_5% @EMI@ PC412 680P_0603_50V7K 3V_SN 2 PR404 150K_0402_1% 5A_Z120_25M_0805_2P Vout is 4.998V~5.202V Ipeak=7A Imax=4.9A Iocp=10A PR411 1M_0402_1% PC426 4.7U_0402_6.3V6M 5V_EN PC413 1000P_0402_25V8J 5V_FB PR406 1K_0402_5% EC VDD0 is +3VL, PC426 UNPOP EC VDD0 is +3VALW, PC426 POP 2014/03/19 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/03/18 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC 3VALW/5VALW A4WAL_Braswell-M/D_LA-C371P Date: A B C D Wednesday, March 04, 2015 Sheet E 42 of 55 Rev 1.0 D D Pin19 need pull separate from +1.35VP If you have +1.35V and +0.675V sequence question, you can change from +1.35VP to +1.35VS 5A_Z120_25M_0805_2P +19VB_1.35V PR501 2.2_0603_5% BST_1.35V @ PR509 0_0402_5% SYSON PC507 10U_0805_6.3V6K 2 PC506 10U_0805_6.3V6K 20 VTTREF_1.35V VTT 18 19 VLDOIN C +1.35VP S3 FB PC510 0.033U_0402_16V7K PR506 8.2K_0402_1% +1.35VP B Output 1.35*1.01 more 1% PR508 10K_0402_1% 2 1 PR507 887K_0402_1% +19VB_1.35V 21 FB_1.35V DDR_PW ROK B BOOT VDDQ S5 VDD VTTREF UGATE PHASE VDDP PR505 100K_0402_1% +1.35VP SI7716ADN-T1-GE3_POW ERPAK8-5 GND RT8207MZQW _W QFN20_3X3 TON 11 PAD VTTSNS S3_0.675VSP PC513 1U_0603_10V6K @EMI@ PC512 680P_0402_50V7K 12 CS +5VALW PR504 5.1_0603_5% 13 PU501 VTTGND PGND PQ502 + +5VALW @EMI@ PR503 4.7_1206_5% PC509 330U_2.5V_ESR17M_6.3X4.5 PR502 9.1K_0402_1% CS_1.35V PC508 1U_0603_10V6K 2 PR511 2.2_0402_5% VDD_1.35V LGATE 14 PGOOD 15 10 LG_1.35V 17 LX_1.35V 16 PC501 0.1U_0603_25V7K PQ501 AON7408L_DFN8-5 +1.35VP +0.675VSP UG_1.35V C PL502 1.5UH_PCMC063T-1R5MN_9A_20% +1.35VP 1 PC505 10U_0805_25V6K PC504 10U_0805_25V6K EMI@ PC503 2200P_0402_50V7K @EMI@ PC502 0.1U_0402_25V6 BST_1.35V_R S5_1.35V EMI@ PL501 TON_1.35V @ PC514 0.1U_0402_16V7K +19VB 0.675Volt +/- 5% TDC 0.84A Peak Current 1.2A SUSP# PR510 0_0402_5% @ PJ501 +1.35VP VTTREF_1.35V off on on SUSP D S G +0.675VSP off off on Level L L H Mode S5 S3 S0 2 +1.35V JUMP_43X118 @ PJ502 2 @ PC515 0.1U_0402_16V7K JUMP_43X118 Note: S3 - sleep ; S5 - power off @ PQ503 2N7002KW _SOT323-3 @ PJ503 +0.675VSP 2 +0.675VS JUMP_43X39 A Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 Issued Date Deciphered Date 2015/03/18 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title 1.35VP/0.675VSP Size Document Number Custom A4WAL_Braswell-M/D_LA-C371P Date: A W ednesday, March 04, 2015 Sheet 43 of 55 Rev 1.0 D D @ PR611 +3VALW 10K_0402_5% EN pin don't floating If have pull down resistor at HW side, pls delete PR2 +1.05VALW_PWRGD PU601 @ PC601 0.22U_0402_10V6K 15 +3VALW PC614 1U_0402_6.3V6K NC PAD 12 (R1) PR606 15.4K_0402_1% 16 21 1 PC613 2.2U_0402_6.3V6M 10 +1.05VALWP PL602 from SH00000PJ00 change to common part SH00000YE00 2013/10/23 FB = 0.6V LDO_3V 1.01% @ PC616 22U_0603_6.3V6M NC BYP 17 PCMB063T-1R0MS 12A PC615 22U_0603_6.3V6M ILMT FB_1.05V PC612 22U_0603_6.3V6M NC LX_1.05V 14 VCC EN 20 GND FB 1.062V PL601 PC611 22U_0603_6.3V6M 13 GND TDC 8A 19 @ PC609, PC610 from 47U_0603_6.3V6M change to 22U_0603_6.3V6M 2013/10/23 SY8288RAC_QFN20_3X3 2 PR602 1M_0402_1% 1 ILMT_1.05V LX @EMI@ PR603 @EMI@ PC602 4.7_1206_5% 680P_0603_50V7K 2SNB_1.05V PC610 22U_0603_6.3V6M 11 PR601(PVT R-short) GND 2 PR604 @ 0_0603_5% 0.1U_0402_25V6 SPOK LX PC609 22U_0603_6.3V6M 18 @ PR601 1_0402_5% LX IN BST_1.05V IN BS PC608 330P_0402_50V7K 10U_0805_25V6K PC607 PG IN @ PR610 0_0402_5% IN PC605 EC_EN_1.05VALW @EMI@ PC604 0.1U_0402_25V6 EMI@ PL602 +19VB_1.05V 2 EMI@ PC603 2200P_0402_50V7K 1 5A_Z120_25M_0805_2P +19VB C VNN_SENSE C @ PR609 10_0402_5% PR608 20K_0402_1% VFB=0.6V Vout=0.6V* (1+R1/R2) Vout=1.062V (R2) @ PJ601 +1.05VALWP LDO_3V 1 +1.05VALW @ PJ602 +1.05VALWP @ PR605 0_0402_5% ILMT_1.05V 1 2 +1.05VALW JUMP_43X118 PR606 part count reduce 2 JUMP_43X118 @ PR607 0_0402_5% Module model information SY8208D_V1.mdd The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/12/26 Deciphered Date 2014/12/26 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +1.05VALW Size C Date: Document Number Rev 1.0 A4WAL_Braswell-M/D_LA-C371P Wednesday, March 04, 2015 Sheet 44 of 55 5A_Z120_25M_0805_2P 2 +1.8VALW D 2 PC715 0.1U_0402_10V7K @ PJ704 JUMP_43X79 VIN_1.15VALW PL701 @ PC701 22U_0603_6.3V6M +3VALW @ @ PJ701 2 SY8003DFC_DFN8_2X2 FB_1.15VALW VFB=0.6V Vout=0.6V* (1+Rup/Rdown) PR706 42.2K_0402_1% Rdown C 2 PR712 0_0402_5% PR712(PVT R-short) Rup EN_1.15VALW PC706 0.1U_0402_10V7K 1K_0402_5% 2 SUSP# PR704 1 C SPOK PR705 1M_0402_5% @ PR703 39.2K_0402_1% D +1.15VALW +1.15VALWP EN_1.15VALW PC705 22U_0603_6.3V6M SGND PGND LX_1.15VALW FB EN PC704 22U_0603_6.3V6M LX PG PC702 68P_0402_50V8J 1 NC IN JUMP_43X118 PGND PL702 1UH_2.8A_30%_4X4X2_F 2 @PR717 10K_0402_5% +1.15VALW_PWRGD +1.15VALWP @EMI@ PC703 @EMI@ PR702 680P_0402_50V7K 4.7_0603_5% PU701 @ @ 5A_Z120_25M_0805_2P VIN_1.8VALW @ PJ703 @ EN_1.8VALW @ PR711 1M_0402_1% PR710 0_0402_5% @ SPOK PC712 0.22U_0402_10V6K +1.8VALW B PR709 10K_0402_1% PR714 0_0402_5% Rdown 1 @EMI@ PC713 680P_0402_50V7K FB_1.8VALW +1.24VALW_PWRGD PC711 22U_0603_6.3V6M Rup 1 SY8032ABC_SOT23-6 EN B +1.8VALWP PC710 22U_0603_6.3V6M FB GND LX PG PC709 68P_0402_50V8J FB_1.8VALW IN PL703 1UH_2.8A_30%_4X4X2_F LX_1.8VALW PR708 20K_0402_1% +1.8VALW_PWRGD JUMP_43X79 PU702 PR715 100K_0402_5% +1.8VALWP 1 +3VALW PL704 2 @ PJ702 JUMP_43X79 @EMI@ PR716 4.7_0603_5% @ +3VALW PC708 22U_0603_6.3V6M @ VFB=0.6V Vout=0.6V* (1+Rup/Rdown) A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC +1.15VALW/1.8VALW A4WAL_Braswell-M/D_LA-C371P Date: Wednesday, March 04, 2015 Sheet 45 of 55 Rev 1.0 D D +3VALW 2 Rup 2 FB_1.24VALW G971ADJF11U_SO8 +1.24VALWP ADJ VO PC805 22U_0603_6.3V6M @ VEN PC803 0.01U_0402_25V7K C PR803 1M_0402_5% +3VALW C EN_1.24VALW PC802 4.7U_0603_6.3V6K VO GND SPOK VIN TPAD PR801 @ 100K_0402_5% POK 5VIN_1.24VALW PR802 11K_0402_1% PR809 0_0402_5% 1 PR810 100K_0402_5% +1.05VALW_PWRGD PC804 0.1U_0402_16V7K @ +1.24VALW_PWRGD PJ801 @ JUMP_43X79 VPP PU801 PC801 1U_0402_6.3V6K 1 +3VALW PR804 20K_0402_1% Rdown Vout=0.8V* (1+Rup/Rdown) @ PJ802 +1.24VALWP 1 2 +1.24VALW JUMP_43X79 B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 Deciphered Date 2015/03/18 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title 1.24VALW Size C Date: Document Number Rev 1.0 A4WAL_Braswell-M/D_LA-C371P Wednesday, March 04, 2015 Sheet 46 of 55 1 PR904 301_0402_1% D PR903 200_0402_1% PR902 200_0402_1% +1.05VALW D PC901 0.1U_0402_25V6 VR_SVID_DATA PR955 20_0402_1% VR_SVID_ALERT# PR956 49.9_0402_1% VR_SVID_CLK PR957 200_0402_1% +19VB_VCC +1.8VALW PR905 10K_0402_1% EMI@ PC907 2200P_0402_50V7K @EMI@ PC906 0.1U_0402_25V6 PC905 10U_0805_25V6K PC904 10U_0805_25V6K 1 0.36UH_PDME064T-R36MS_24A_20% CSN1_VCC 2 CSREF_VCC @EMI@ PC914 680P_0603_50V7K PR917 10_0402_5% CSSUM_VCC AON6554_DFN5X6-8-5 1SNUB_VCC_12 PR916 78.7K_0603_1% B PC921 470P_0402_50V7K ILIM_VCC PR926 43.2K_0402_1% Close to choke 1 PH901 220K_0402_5%_ERTJ0EV224J PC919 820PF_0402_50V7K @ PR925 6.04K_0402_1% CSCOMP_VCC 2 PR922 21.5K_0402_1% PC920 47P_0402_50V8J PR920 165K_0402_1% PC917 2.2U_0603_10V6K Close to IC side 2 0.015U_0402_25V7K PQ905 2 PC918 470P_0402_50V7K PR924 1K_0402_1% 2 PC922 100P_0402_50V8J PR927 1.3K_0402_1% 2 @EMI@ PR911 4.7_1206_5% 1 PC916 1000P_0402_50V7K PC923 PC903 10U_0805_25V6K 2 PR915 13K_0402_1% +5VALW FB_VCC SWN1_VCC @ PC915 2200P_0402_50V7K PR921 49.9_0402_1% 2 2 PR919 0_0402_5% C AON7518_DFN8-5 VSS_SENSE PC912 01U_0402_16V7K +19VB +SOC_VCC @ CSCOMP_VCC CSSUM_VCC CSREF_VCC IMAX_VCC @ PR918 0_0402_5% B 21 20 19 18 17 16 15 ILIM_VCC PC913 1000P_0402_50V7K Close to MOSFET PH902 100K_0402_1%_TSM0B104F4251RZ PR914 0_0402_5% EMI@ PL901 5A_Z120_25M_0805_2P PL902 ENABLE VR_HOT SDIO ALERT SCLK VR_RDY VRMP PR910 PC910 2.2_0603_5% 0.22U_0603_25V7K BST_VCC_R BST_VCC UG_VCC 10 LX_VCC 11 12 LG_VCC 13 TSNS_VCC 14 VBOOT/ADDR_VCC 1 PR913 16.2K_0402_1% BST HG SW PGND LG TSENSE VBOOT/ADDR PR923 75K_0402_1% VCC_SENSE VCC VSP VSN DIFFOUT FB COMP ROSC PQ904 @ PR912 0_0402_5% AGND 28 27 26 25 24 23 22 PR908 0_0603_5% 2UG_VCC_R 1 PC911 1U_0603_10V6K VCC_VCC VSP_VCC VSN_VCC DIFFOUT_VCC FB_VCC COMP_VCC ROSC_VCC ILIM IOUT CSCOMP CSSUM CSREF IMAX PVCC 29 PR909 2.2_0603_5% +5VALW PC909 0.01U_0402_25V7K 0_0402_5% PU901 NCP81201MNTXG_QFN28_4X4 PR907 1K_0402_1% +19VB_VCC ENABLE_VCC @ PR906 VGG_PWRGD @ PC902 47P_0402_50V8J C +1.8VALW VRMP_VCC VR_HOT# @EMI@ PL905 5A_Z120_25M_0805_2P +19VB_VCC SDIO_VCC ALERT_VCC SCLK_VCC @ PR901 56.2_0402_1% VGATE A A Compal Electronics, Inc Compal Secret Data Security Classification 2012/04/03 Issued Date Deciphered Date 2014/12/31 Title +SOC_VCC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Document Number Rev 1.0 A4WAL_Braswell-M/D_LA-C371P Wednesday, March 04, 2015 Sheet 47 of 55 VR_SVID_DATA VR_SVID_ALERT# VR_SVID_CLK D 0.1U_0402_25V6 PC924 D PR930 301_0402_1% PR961 200_0402_1% +1.05VALW PR958 20_0402_1% PR959 49.9_0402_1% PR960 200_0402_1% +1.8VALW VGG_PWRGD PR932 10K_0402_1% @ PR931 56.2_0402_1% +19VB_VGG 5A_Z120_25M_0805_2P +1.8VALW EMI@ PC930 2200P_0402_50V7K @EMI@ PC929 0.1U_0402_25V6 PC928 10U_0805_25V6K 2 AON6552_DFN5X6-8-5 PL904 S COIL 0.22UH +-20% 24A 7X7X4 MOLDING 1 SWN1_VGG CSN1_VGG 1 2 CSREF_VGG PC937 @EMI@ 680P_0603_50V7K PR944 10_0402_5% CSSUM_VGG 1SNUB_VGG_12 AON6554_DFN5X6-8-5 PR943 54.9K_0603_1% PC944 470P_0402_50V7K B 29.4K_0402_1% PC942 820PF_0402_50V7K 1 Close to choke PC943 47P_0402_50V8J ILIM_VGG PR953 PH904 220K_0402_5%_ERTJ0EV224J PR952 10K_0402_1% CSCOMP_VGG PR954 1.3K_0402_1% Height 4.5 mm 0.22uH (DCR 0.98 +-5%) +SOC_VGG 2 2.2U_0603_10V6K 2 C @ Close to IC side +19VB PR947 165K_0402_1% PR949 53.6K_0402_1% VGG_IMON PC946 PC945 100P_0402_50V8J PC940 PR950 75K_0402_1% PC939 1000P_0402_50V7K FB_VGG 2 +5VALW 2 PC941 470P_0402_50V7K PR951 1K_0402_1% PR942 13K_0402_1% + EMI@ PL903 @ PC931 33U_25V_M @ PC938 2200P_0402_50V7K PR948 49.9_0402_1% 2 21 20 19 18 17 16 15 PR946 0_0402_5% VGG_SENSEN @ PC935 01U_0402_16V7K PR938 @EMI@ 4.7_1206_5% PQ903 Close to MOSFET PR941 47K_0402_5% CSCOMP_VGG CSSUM_VGG CSREF_VGG IMAX_VGG 1000P_0402_50V7K ILIM_VGG @ PR945 0_0402_5% B PC936 1 10 11 12 LG_VGG 13 TSENSE_VGG 14 VBOOT/ADDR_VGG PR940 14.7K_0402_1% BST HG SW PGND LG TSENSE VBOOT/ADDR PH903 100K_0402_1%_TSM0B104F4251RZ VCC VSP VSN DIFFOUT FB COMP ROSC @ PR939 0_0402_5% VGG_SENSEP 28 27 26 25 24 23 22 PR937 PC933 2.2_0603_5% 0.22U_0603_25V7K BST_VGG_R BST_VGG UG_VGG LX_VGG PC934 1U_0603_10V6K VCC_VGG VSP_VGG VSN_VGG DIFFOUT_VGG FB_VGG COMP_VGG ROSC_VGG +5VALW AGND PR935 0_0603_5% 2UG_VGG_R PC932 0.01U_0402_25V7K 29 PQ902 PU902 NCP81201MNTXG_QFN28_4X4 PR936 2.2_0603_5% 2 +1.15VALW_PWRGD PR934 1K_0402_1% +19VB_VGG VRMP_VGG PR933 0_0402_5% ENABLE_VGG @ PR962 0_0402_5% ENABLE VR_HOT SDIO ALERT SCLK VR_RDY VRMP VR_ON ILIM IOUT CSCOMP CSSUM CSREF IMAX PVCC @ PC925 47P_0402_50V8J C SDIO_VGG ALERT_VGG SCLK_VGG VR_HOT# PC927 10U_0805_25V6K 2 PC926 10U_0805_25V6K +19VB_VGG 0.015U_0402_25V7K A A Compal Electronics, Inc Compal Secret Data Security Classification 2012/04/03 Issued Date Deciphered Date 2014/12/31 Title +SOC_VGG THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Document Number Rev 1.0 A4WAL_Braswell-M/D_LA-C371P Wednesday, March 04, 2015 Sheet 48 of 55 A 22U_0603_6.3V6M B Issued Date C 2 PC1044 22U_0603_6.3V6M 22U_0603_6.3V6M 2 2 Security Classification 2011/07/08 2 22U_0603_6.3V6M 22U_0603_6.3V6M @ 22U_0603_6.3V6M 22U_0603_6.3V6M @ 22U_0603_6.3V6M @ 22U_0603_6.3V6M @ 22U_0603_6.3V6M 22U_0603_6.3V6M Deciphered Date 2015/07/08 D Compal Secret Data Date: 2 PC1065 PC1060 @ 22U_0603_6.3V6M PC1046 @ 22U_0603_6.3V6M PC1010 PC1061 @ 22U_0603_6.3V6M PC1009 PC1047 @ 22U_0603_6.3V6M PC1008 PC1062 @ 22U_0603_6.3V6M PC1007 PC1011 PC1076 PC1016 PC1017 PC1018 PC1019 PC1077 PC1015 PC1020 PC1045 D 22U_0603*6 PC1071 1U_0402_6.3V6K @ 22U_0603_6.3V6M PC1006 PC1072 1U_0402_6.3V6K 22U_0603_6.3V6M PC1005 1U_0402 * 5+ PC1075 1U_0402_6.3V6K 22U_0603_6.3V6M PC1027 22U_0603 * 24 + reserved PC1074 1U_0402_6.3V6K PC1040 1 PC1039 2 PC1038 22U_0603_6.3V6M PC1028 C PC1073 1U_0402_6.3V6K PC1037 @ 22U_0603_6.3V6M PC1036 22U_0603_6.3V6M PC1035 22U_0603_6.3V6M 22U_0603_6.3V6M PC1034 1 22U_0603_6.3V6M PC1033 22U_0603_6.3V6M 22U_0603_6.3V6M PC1032 22U_0603_6.3V6M PC1031 22U_0603_6.3V6M PC1058 PC1043 PC1057 1 22U_0603_6.3V6M 1 22U_0603_6.3V6M 2 22U_0603_6.3V6M 1 22U_0603_6.3V6M 22U_0603_6.3V6M PC1056 2 22U_0603_6.3V6M 2 22U_0603_6.3V6M PC1022 22U_0603_6.3V6M PC1055 PC1021 1 @ 22U_0603_6.3V6M 22U_0603_6.3V6M @ 22U_0603_6.3V6M 22U_0603_6.3V6M PC1002 +SOC_VGG PC1042 PC1003 PC1041 PC1004 @ 22U_0603_6.3V6M PC1026 22U_0603_6.3V6M PC1001 +22U_0603 * 16 + reserved 22U_0603_6.3V6M 22U_0603_6.3V6M PC1025 22U_0603_6.3V6M 2 @ 22U_0603_6.3V6M PC1024 22U_0603_6.3V6M 22U_0603_6.3V6M B 22U_0603_6.3V6M PC1059 2 4.7U_0402_6.3V6M PC1054 2 22U_0603_6.3V6M 4.7U_0402_6.3V6M PC1053 2 4.7U_0402_6.3V6M PC1052 1 PC1023 22U_0603_6.3V6M PC1030 22U_0603_6.3V6M PC1029 +SOC_VCC 22U_0603_6.3V6M 4.7U_0402_6.3V6M PC1051 22U_0603_6.3V6M 4.7U_0402 *5 4.7U_0402_6.3V6M PC1050 4.7U_0402_6.3V6M PC1049 A E reserved +1.05VALW 1 1 @ Wednesday, March 04, 2015 E 2 4 Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PROCESSOR DECOUPLING A4WAL_Braswell-M/D_LA-C371P Sheet 49 of Rev 1.0 55 EN pin don't floating If have pull down resistor at HW side, pls delete PR2 D D 21 GM4G need 1.35V GT/GM2G need 1.5V SY8288RAC_QFN20_3X3 1 1 GT@ PR1106 30.9K_0402_1% (R1) GM2G@ PR1106 30.9K_0402_1% 16 FB = 0.6V VFB=0.6V Vout=0.6V* (1+R1/R2) Rup=25.5K Vout=1.365V Rup=30.9K Vout=1.527V @VGA@ PR1101 0_0402_5% ILMT_1.5VSDGPUP C PJ1101 VGA@ PR1108 20K_0402_1% +1.5VSDGPUP 2 +1.5VSDGPU JUMP_43X118 PJ1102 2 (R2) JUMP_43X118 GM4G@ PR1106 25.5K_0402_1% @VGA@ PC1116 22U_0603_6.3V6M NC PAD VGA@ PC1113 2.2U_0402_6.3V6M @VGA@ PC1115 22U_0603_6.3V6M BYP NC 12 +1.5VSDGPUP 1.018% VGA@ PC1112 22U_0603_6.3V6M ILMT 10 PL1002 from SH00000PJ00 change to common part SH00000YE00 2013/10/23 NC PCMB063T-1R0MS 12A LDO_3V_1.5VSDGPUP VGA@ PC1111 22U_0603_6.3V6M VCC FB_1.5VSDGPUP 1.527V 2 EN LX_1.5VSDGPUP 17 PL1102 VGA@ PC1110 22U_0603_6.3V6M GND 20 14 TDC 8A VGA@ VGA@ PC1109 22U_0603_6.3V6M FB 19 @ GND PC1105 0.1U_0402_25V6 VGA@ C LDO_3V_1.5VSDGPUP LX @ +3VALW VGA@ PC1114 1U_0402_6.3V6K VGA@ PC1102 0.1U_0402_16V7K 13 15 1M_0402_1% PR1103 @VGA@ ILMT_1.5VSDGPUP GND 11 LX BST_1.5VSDGPUP 1.5VS_DGPU_PWR_EN IN VGA@ PC1108 330P_0402_50V7K 18 VGA@ PR1102 15K_0402_5% LX BS IN @VGA_EMI@ @VGA_EMI@ PR1104 PC1103 4.7_1206_5% 680P_0603_50V7K SNB_1.5VSDGPUP @VGA@ PR1105 0_0603_5% IN PG 10U_0805_25V6K VGA@ PC1106 @VGA_EMI@ PC1104 0.1U_0402_25V6 VGA@ IN PU1101 +19VB_1.5VSDGPUP VGA_EMI@ PL1101 5A_Z120_25M_0805_2P VGA_EMI@ PC1101 2200P_0402_50V7K +19VB @VGA@ PR1107 0_0402_5% Module model information SY8208D_V1.mdd The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high B B A A Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 Issued Date Deciphered Date 2015/03/18 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC 1.5VSDGPUP A4WAL_Braswell-M/D_LA-C371P Date: Sheet Wednesday, March 04, 2015 50 of 55 Rev 1.0 A C D +19VB_GPU unmount PRV5 for phase select VGA@ PC1216 0.1U_0603_25V7K NVVDD_SENSE_R +3VS Config C Config D Vmin 0.6V 0.65V 0.9V Vmax 1.2V 1.15V 1.15V Vboot 0.9V 0.9V 1.028V 6.25mV 25mV 12.5mV N of Voltage level 2200P_0402_50V7K VGA_EMI@ PC1208 VGA@ PC1207 10U_0805_25V6K @VGA_EMI@ PC1205 0.1U_0402_25V6 VGA@ PC1204 10U_0805_25V6K 1 + VGA@ PC1212 560U_2.5V_M VGA@ PC1211 560U_2.5V_M 1SNUB_VGA1 PC1215 PR1212 @VGA_EMI@ @VGA_EMI@ 680P_0402_50V7K 4.7_1206_5% + 2 LG2_VGA +VGA_CORE +VGA_CORE H/L side Rds(on): 12.2mohm(Typ), 15mohm(Max) Idsm: 11A@Ta=25C, 14A@Ta=70C CHOKE:0.36uH, DCR 1.4m ohm, L/2 over 36A FSW = 245.55KHz Iripple = 12.74A OCP = 50A OVP=Vout*(145%~155%) Remove GPU OTP circuit for HW request Config B Voltage step 1 VGA@ PL1203 0.36UH_PDME064T-R36MS1R405_24A_20% LX2_VGA PWM-VID Spec and component Values PWM-VID Spec VGA@ PC1203 10U_0805_25V6K 2 AON6552_DFN5X6-8-5 VGA@ PQ1201 UG2_VGA_R PR1214: OCP setting from 50A to 25A @VGA@ PR1219 0_0603_5% UG2_VGA_R UG2_VGA VGA_PWROK VGA@ PC1202 10U_0805_25V6K 1 @VGA@ PR1217 0_0603_5% BST2_VGA_R BST2_VGA VGA@ PR1223 10K_0402_5% +19VB BOOT2 LX2_VGA @VGA@ PC1218 1U_0402_16V7K 1000P_0402_50V7K VGA@ PR1221 100_0402_1% +VGA_CORE +19VB_GPU 16 VCCSENSE_VGA @VGA@ PC1217 +5VS NVVDD_GND_SENSE_R @VGA@ PR1220 0_0402_5% 1U_0603_10V6K 15 PGOOD VSNS SS UGATE2 14 21 @VGA@ PR1218 0_0402_5% VSSSENSE_VGA VGA@ PC1214 LG2_VGA @VGA_EMI@ PR1222 17 AON6554_DFN5X6-8-5 VGA@ PQ1202 PVCC_VGA 18 @VGA@ PR1213 0_0402_5% PC1219 @VGA_EMI@ 680P_0402_50V7K PHASE2 LG1_VGA 1 2 BOOT1 EN UGATE1 PSI RGND GND 499K_0402_1% 1U_0402_16V7K @VGA@ PC1209 LGATE2 VGA@ PR1216 100_0402_1% 2 PVCC VGA@ PU1201 RT8812AGQW_WQFN20_3X3 TON LX1_VGA 19 10 VGA@ VREF 20 0.1U_0603_25V7K LGATE1 VGA_EMI@ PL1201 5A_Z120_25M_0805_2P VGA@ PL1202 0.36UH_PDME064T-R36MS1R405_24A_20% LX1_VGA VGA@ PC1201 1U_0402_6.3V6K TON_VGA 0_0603_5% @VGA@ PHASE1 REFIN 13 +19VB_GPU VREF_VGA REFADJ 12 +19VB_GPU UG1_VGA_R PR1215 VGA@ PR1214 13K_0402_1% NVVDD_GND_SENSE_R PR1207 PC1213 3VSDGPU_MAIN_EN VGA@ 11 REFIN_VGA VID PR1224 0_0402_5% @VGA@ GC6 for GT NGC6 for GM 0_0603_5% @VGA@ PR1201 BST1_VGA_R BST1_VGA1 PC1210 VGA@ 2700P_0402_50V7K PR1210 VGA@ 18K_0402_1% GC6@ PR1206 30K_0402_1% UG1_VGA 1 VGA@ PR1209 20K_0402_1% 1REFADJ NGC6@ PR1202 10K_0402_1% VGA_EN @VGA@ PR1205 10K_0402_5% 20K_0402_1% VREF_VGA2 VGA@ PR1211 2K_0402_1% @VGA@ PR1204 0_0402_5% VGA@ PR1208 +3VS @VGA@ PR1203 10K_0402_5% +19VB_GPU AON6552_DFN5X6-8-5 DGPU_VID +3VSDGPU_AON 4.7_1206_5% 1SNUB_VGA2 VGA@ PQ1203 PSI EN High Threshold = 1.6V E 0V to 0.8V 1.2V to 1.8V 2.4V to 5.5V AON6554_DFN5X6-8-5 VGA@ PQ1204 PSI : phase with DCM phase with CCM phase with CCM B 96 20 20 Rrefadj PR 20K 39K 27K Rref1 PR 20K 30K 7.5K Rboot PR 2K 3K Rref2=PR1209 +PR1212 PR 18K 24K 6.2K PR 3K C PC 2.7nf 1.8nf N16S-GT N16V-GM N15V-GL 1.74K 5.6nf N15V-GM 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 Deciphered Date 2015/03/18 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size R&D Document Number DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC +VGA_CORE A4WAL_Braswell-M/D_LA-C371P Date: A B C D Wednesday, March 04, 2015 E Sheet 51 of 55 Rev 1.0 VGA@ PC1337 1U_0402_10V7 VGA@ PC1336 1U_0402_10V7 VGA@ PC1335 1U_0402_10V7 VGA@ PC1334 1U_0402_10V7 2 VGA@ PC1329 4.7U_0603_6.3V6M VGA@ PC1328 4.7U_0603_6.3V6M VGA@ PC1327 4.7U_0603_6.3V6M VGA@ PC1326 4.7U_0603_6.3V6M 2 Issued Date Security Classification 2014/03/19 Deciphered Date 2 2015/03/18 Compal Secret Data Date: VGA@ PC1345 4.7U_0603_6.3V6M VGA@ PC1344 4.7U_0603_6.3V6M VGA@ PC1343 4.7U_0603_6.3V6M VGA@ PC1342 4.7U_0603_6.3V6M VGA@ PC1341 4.7U_0603_6.3V6M VGA@ PC1340 4.7U_0603_6.3V6M VGA@ PC1339 47U_0805_6.3V6M +VGA_CORE VGA@ 22U_0603_6.3V6M PC1338 @VGA_EMI@ PC1333 0.1U_0402_25V6 @VGA_EMI@ PC1332 0.1U_0402_25V6 @VGA_EMI@ PC1331 0.1U_0402_25V6 Under GPU Core @VGA_EMI@ PC1330 0.1U_0402_25V6 C VGA@ PC1325 4.7U_0603_6.3V6M VGA@ PC1324 4.7U_0603_6.3V6M VGA@ PC1323 4.7U_0603_6.3V6M VGA@ PC1322 4.7U_0603_6.3V6M VGA@ PC1321 4.7U_0603_6.3V6M VGA@ PC1320 4.7U_0603_6.3V6M D D +VGA_CORE +VGA_CORE Near GPU Core C B B A A Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC VGA_CORE CAP A4WAL_Braswell-M/D_LA-C371P Wednesday, March 04, 2015 Sheet 52 of 55 Rev 1.0 Version change list (P.I.R List) Item Fixed Issue C N16-GM A & N16-GT circuit Rev PG# Modify List SE075562K80 SD034270280 SD034750180 SD034000080 SD00000GM80 SD034174180 SD034113280 P.51 change change change change change change change Date SE074272K00 SD034200280 SD034200280 SD034200180 SD000000580 SD028000080 SD034130280 PC1210 PR1209 PR1208 PR1211 PR1210 PR1224 PR1214 D Design update Design update Design update Design update Design update Design update Design update Design update Design update ADD PR610 for EC controll Design update 8207P have spike on S5, so change use ic return to 8207M 11 Design update common part change 12 Design update 13 Design update 14 Design update P.46 PR809 change to R-short 1.24V Enable pin need bigger voltage PC804 change to "@" PR803 change to 1M and "@" Combine +1.05VALW and +SOC_VNN to +1.05VALWP.44 & P.49 All SOC_VNN change to 1.05VALW 1.05VALW PG enable 1.24V HW sequency change no pull high P.44 Let efficiency better PU801 pin6 connect 3VALW P.46 15 Design update HW sequency change P.45 16 17 Design update PJP201 PCB pad is too short P.40 Design update Let spok signal has rail to discharge P.44 Reduce DIS use 0hm pcs need to use Config B 18 Design update 19 Design update 20 Design update 21 Design update 22 23 Design update Design update 24 Design update 25 26 Design update Design update 27 Design update 28 Design update 3.3V/5V Circuit modify for IC update Phase 11/20 DVT 10 B Page of for PWR Reason for change D P.42 ADD SE00000M000 PC427 PC428 & PU401,PU402 11/28 DVT P.41 ADD PL301, Remove PJ301 12/04 DVT 1.05V Circuit modify for IC change P.44 12/04 DVT VRAM Circuit modify for IC change P.50 12/04 DVT 1.24V IC Change P.46 PU801 SA000034S00 change to SA00001HW80 12/04 DVT SOC_VCC output MLCC adjust P.49 PC1023 BOM structure change to @ 12/15 DVT Prefer for EC_EN_1.05VALW (turn on SOC suspend) P.44 ADD EC_EN_1.05VALW Link to circuit 12/15 DVT P.44 ADD PR610 12/15 DVT remove PC509.PC511.PC516~PC519, ADDPC509 P.43 change RT8207P to RT8207M 12/16 DVT change PR507 to 887K ohm for frequency all bead change to SM01000P200 12/16 DVT Part number change to SP020017H00 12/27 DVT PR602 Delete"@" 12/27 DVT 0.1U_0603_25V7K P.41 Add PR321 (BOM Structure :@) link to +3VLP P.43 Change PQ502 to AON7702 Follow HW command Follow HW command-1.24V P.46 Change for 1.35V Power budget current limit P.43 12/26 DVT 12/26 DVT 12/26 DVT PR1224,PR1204,PR1207,PR1201,PR1217,PR1219 change to R-short PR601,PR712,PR329 change to 1ohm Reduce UMA use 0hm pcs,PVT back to R-short PR933,PR906 change to R-short Follow HW command P.50 PR1102 change to 10K PC403,PC416,PC605,PC1105 change to Design for HW sequency need Design for sourcer need 12/25 DVT +1.15VALW EN change to SUP#, P.51 Follow FAE command C PR610 instead PR601 PR509 PR510 change to ohm PC515 change to @ PR1102 change to 15k POP PR803 Change PR502 to 9.1K B 12/27 DVT 12/27 DVT 12/29 DVT 12/31 DVT 1/7 PVT 1/8 DVT 1/8 DVT 1/12 2/3 DVT PVT A Change all ohm to ohm for PVT Follow HW command P.47 P.44 Change PR329.PR509.PR510.PR610.PR712 to ohm 2/6 PVT PR901 unplug & 1.05V PG pull high resistor"@" 2/10 3V & 5V IC Pin 16 connect Pin17 PVT Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PWR_PIR Rev 1.0 A4WAL_Braswell-M/D_LA-C371P Date: Wednesday, March 04, 2015 Sheet 53 of 55 Version change list (P.I.R List) Item Fixed Issue Page of for PWR Reason for change Rev PG# D Design update Design update Design update Design update Design update Design update Design update Design update Design update C 10 B A Follow HW command P.42 Modify List 改改 然將然然然 的 多多串多串多串 然然 串接 的 同同將 Date 改 的 1.PR5090,PR610 R short 2.1.15VALW PG pin ,net name +1.15VALW_PWRGD, PU 10K ohm 1.8VALW +1.15VALW_PWRGD 0ohm @, VGG ENABLE, PR933 R short 改改改改 Phase 2/12 PVT D C Design update 11 Design update 12 Design update 13 Design update 14 Design update 15 Design update 16 17 Design update 18 Design update 19 Design update 20 Design update 21 Design update 22 23 Design update Design update 24 Design update 25 26 Design update Design update 27 Design update 28 Design update Design update B Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title PWR_PIR Size Document Number Custom A4WAL_Braswell-M/D_LA-C371P Date: A PVT Wednesday, March 04, 2015 Sheet 54 of 55 Rev 1.0 A4WAL Power UP Sequence 2015-02-06 Plug EC V011T05 SOC S5->S0 in S3->S0 S0->S3 S0->S5 DC mode ACIN ACIN +3VLP 201.8us EC_ON -> 2.016ms +5VALW EC_ON D +5VALW 3V_EN +3VALW SPOK +3VLP 0ms -> -> 59.97ms D +3V_EN 8.648s -> 60.68s -> 772.8us +3VALW -> 61.47ms -> 19.82us SPOK 32.33us EC_EN_1.05VALW +1.05VALW(VNN) +1.24VALW +1.8VALW +3V_SOC -> -> 610.9us -> -> 1.408ms 2.679ms -> 3.264ms EC_EN_1.05VALW -> 1.040ms -> 974.5us -> 1.192ms -> 709.7us +1.05VALW(VNN) +1.24VALW +1.8VALW +3V_SOC 192.2ms ON/OFF ON/OFF EC_RSMRST# PBTN_OUT# EC_SLP_S4# EC_SLP_S3#_1P8 -> 25.3ms -> C -> 110.4ms -> 2.727ms -> -> +SOC_VCC0/1 -> -> SUSP# -> -> -> -> 3.27ms 3.448ms -> -> 1.180ms +3VS +5VS -> +0.675VS 38.77ms 0s -> -> 414.3us -> -> 379.7us -> -> 561.9us -> 6.619us -> -> 3.25ms -> -> 3.40ms -> 1.062ms -> 1.165ms VR_ON VGATE SUSP# 26.72ms -> +1.15VALW 1.028ms -> 654.9us -> 357.6us -> 611us -> 584.8us -> 837.9us +3VS +5VS +0.675VS 1.309ms KBRST# -> 292.26ms KBRST# -> -> 382.9ms PMC_CORE_PWROK 10.77ms 136.7ms -> PMC_CORE_PWROK 6.850ms DDR_CORE_PWROK -> 120.9ms -> 397.8ms -> -> 31.88ms 134.7ms -> PMC_PLTRST# 25.71ms DGPU_PWR_EN DGPU_PWR_EN +3VSDGPU +3VSDGPU VGA_CORE VGA_CORE VGA_PWROK VGA_PWROK A +1.05VSDGPU +1.05VSDGPU +1.5VSDGPU +1.5VSDGPU PLTRST_VGA# PLTRST_VGA# Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/08/21 Deciphered Date 2015/08/21 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Power Sequence Size C Date: B +1.8VS 1.685ms -> -> 5.090us +SOC_VCC0/2 24.91ms -> 385.7us 1.305ms +SOC_VGG 0s 1.768ms 845.9us DDR_PWROK 0s 24.35ms -> 13.32ms SYSON 6.852ms -> 1.55ms -> 30.80ms -> 23.44ms -> 30.56ms -> 261.9ms -> 10.77ms -> 1.56ms +1.15VALW +1.8VS C +1.35V 2.88ms -> 272ms -> VGATE VGA not ready PBTN_OUT# 152.9ms -> 3.939ms VR_ON A 5.34ms EC_SLP_S3# -> 241.3ms +SOC_VGG VGA -> EC_SLP_S4# -> 531.5us +1.35V 0.2 modify EC_RSMRST# -> 22.9ms DDR_PWROK 0.2 modify 5.34ms -> 22.9ms SYSON B -> Document Number A4WAL_Braswell-M/D_LA-C371P Sheet Wednesday, March 04, 2015 55 of 55 Rev 1.0 ... 90 92 94 96 98 10 0 10 2 10 4 10 6 10 8 11 0 11 2 11 4 11 6 11 8 12 0 12 2 12 4 12 6 12 8 13 0 13 2 13 4 13 6 13 8 14 0 14 2 14 4 14 6 14 8 15 0 15 2 15 4 15 6 15 8 16 0 16 2 16 4 16 6 16 8 17 0 17 2 17 4 17 6 17 8 18 0 18 2 18 4 18 6 18 8... 10 U _06 03_6.3V6M C 1 10 C 109 C 108 C 107 C 115 C 116 C 117 1 1 1 2 2 2 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K + @ C185 330U_2.5V_M SF 000 002 Z 00. .. 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K 1U _04 02 _16 V7K C 111 C 112 C 113 C 114 1 1 2 2 10 U _06 03_6.3V6M 10 U _06 03_6.3V6M 10 U _06 03_6.3V6M 10 U _06 03_6.3V6M