Compal D4PB1 D5PB1 LA f241p rev 1 0 схема

A B C D E Compal Confidential Model Name : D4PB1/D5PB1 File Name : TBD BOM P/N:43 ZZZ UC1 UC1 LA-F241P MB REV1 DAA000EV010 DA2@ FJ8067702739739 SR342 H0 2.5G CPU_SR342@ S IC FJ8067702739738 SR2ZW H0 2.4G ABO! CPU_3860@ Compal Confidential ZZZ1 LS-D303P FUN/B DA400299000 DAS@ SA0000A37N0 SA0000A3860 UC1 UC1 S IC FJ8067702739740 SR341 H0 2.7G ABO CPU_SR341@ S IC FJ8067702739738 QLDP H0 2.4G BGA CPU_3820@ SA0000A34L0 SA0000A3820 UC1 UC1 S IC FJ8067703281813 QN5C Y0 1.8G CPU_QN5C@ S IC FJ8067702739739 SR2ZU H0 2.5G ABO! CPU_3760@ ZZZ2 D4PB1/D5PB1 M/B Schematics Document LS-D302P USB/B DA6001HX000 DAS@ ZZZ3 SA0000AQZ10 SA0000A3760 UC1 UC1 LS-A133P DA600101010 DAS@ S IC FJ8067702739738 SR343 H0 2.4G ABO! CPU_SR343@ SKL U22/KBL U22 U42 Processor + DDR4 ZZZ4 SA0000A38M0 S IC FJ8067702739739 QLDM H0 2.5G BGA CPU_3720@ SA0000A3720 UC1 LS-D301P LID/B DA400272000 DAS@ S IC FJ8066201924931 SR2F0 D1 2.4G ABO! CPU_2T80@ ZZZ5 SA000092T80 UC1 2017-02-22 LS-B734P DA6001B8010 DAS@ S IC FJ8067702739741 QLDU H0 2.6G BGA CPU_3L20@ ZZZ5 SA0000A3L20 Rev:1.0 HDMI LOGO RO0000003HM HDMI@ UC1 ZZZ S IC FJ8067702739740 SR2ZV H0 2.7G ABO! CPU_3450@ SA0000A3450 UC1 LS-B732P DA4001YF010 DAS@ ZZZ S IC FJ8067702739633 QLYG H0 2.6G BGA CPU_DO10@ KBL-R U42 SA0000ADO10 UC1 DAZ PCB DAZ1IB00100 DAZ@ UC1 4 S IC FJ8067703281813 QN5C Y0 1.8G CPU_QN5C@ X4EA99BOL01 includes EMC@, EMI@ and ESD@ S IC FJ8067702739628 QLYF H0 2.8G BGA CPU_DP10@ SA0000AQZ10 SA0000ADP10 ZZZ Issued Date SMT EMC EE AF241 D4PB1 X4E@EMC Compal Electronics, Inc Compal Secret Data Security Classification 2017/02/22 2018/02/22 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC X4EA99BOL01 Title Cover Page Size Document Number Custom Date: A B C D R ev 0.1 LA-F241P Wednesday, June 14, 2017 Sheet E of 54 A B C D E Compal Confidential 260pin DDR4-SO-DIMM X1 page 18 Touch Screen Conn Memory BUS(DDR4) USB2.0 Dual Channel page 21 Intel Skylake U/Kabylake U eDP Conn page 21 CRT Conn DOCK CONN page 23 CRT SW PI3V713 DP to VGA RTD2168 page page 23 HDMI/DP HDMI CONN eDP Skylake U/Kabylake U PCH-LP(MCP) SKL-U_2+2, KBL-U2+2, KBL-U4+2 DDI1 22 DP SW PS 8338 page page 37 USB port Processor MIDI CHC MIDI CHB RJ45 Conn 33~34 TYPE-C CONN page 29 page 35 LAN SW HD Audio page 28 port 6,8 LAN(GbE) Intel I219 NGFF Card WLAN+BT+Wigig (Combo) page 28 page 31 GEN3 GEN3 port 11,12 port PCIE/SATA SSD NGFFpage Card 27 LTE Card Finger Print USB port SPI ROM (16M) HDA Codec ALC3225 page CLK=33MHz page 38 3.3V 24MHz USB port page 38 page 6~17 LPC BUS Card reader RTS5229 Conn page 21 page 31 SATA x (GEN2 3.0GT/S ,GEN3 6GT/S) port USB port page 31 15W 1356pin BGA CLK=100MHz port USB port page 32 SPI CLK=100MHz MIDI USB port 1,2,4 USBx8 Power delivery PCI-Express x (PCIE2.0 5GT/s) CMOS Camera 3.3V 48MHz port 9,10 page 35 WLAN Module for BT page 37 Dual Core + GT2 PCIE USB 3.0 conn x3 DOCK CONN DDI2 24 page 19 ,20 page 25 Thunderbolt AR4C page DDR4-ON BOARD 4G 8Gbx16 8G 16Gbx16 1.2V DDR4 1866/2133 page 30 Combo Jack (CTIA) HP MIC LINE IN page 30 SM BUS SATA HDD Conn TPM NPCT650 page 26 NFC Module page 38 Int Speaker page 27 page 30 3 DOCK CONN LS-A131P Fan G-Sensor LIS3DHTR ENE KB9022 FUN/B page 38 page 37 page 26 page 39 page 36 LS-D302 USB/B page 32 LS-A133P LS-B732P CardReader/B TP/B page 38 page 38 Touch Pad RTC CKT Int.KBD page 38 page 38 page 14 LS-D301P LID/B LS-A136P page 38 Docking1/B page 37 LS-B734P FP/B DC/DC Interface CKT page 40 LS-A137P Docking2/B page 38 Power Circuit DC/DC page 41~50 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2017/02/22 2018/02/22 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Block Diagrams Size Document Number Custom Date: A B C D Rev 0.1 LA-F241P Friday, June 09, 2017 Sheet E of 54 A B C D Board ID Table for AD channel Vcc Ra Board ID 1 3.3V +/- 5% 100K +/- 5% Rb 12K +/- 1% 15K +/- 1% 20K +/- 1% 27K +/- 1% 33K +/- 1% 43K +/- 1% 56K +/- 1% BOARD ID Table Power State V BID 0.347 0.423 0.541 0.691 0.807 0.978 1.169 V V V V V V V V V BID typ V 0.345 V 0.430 V 0.550 V 0.702 V 0.819 V 0.992 V 1.185 V V BID max 0.300 V 0.360 V 0.438 V 0.559 V 0.713 V 0.831 V 1.006 V 1.200 V EC 0x00 0x0C 0x1D 0x27 0x31 0x3C 0x47 0x55 AD3 - 0x0B - 0x1C - 0x26 - 0x30 - 0x3B - 0x46 - 0x54 - 0x64 SIGNAL STATE E SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock S0 (Full ON) HIGH HIGH HIGH ON ON ON ON S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF B oard ID Res V b rd EV T 0K 0v P V T 12k 0.345V P reM P 15k 0.430V P CB versio n 0.1 0.2 P ro ject No te New P6 BOM Structure Table BOM Option Table Item BOM Structure Unpop @ Connector CONN@ EMC requirement EMC@ EMC requirement unpop @EMC@ EMI requirement @EMI@/EMI@ Thunderbolt Funct i on TBT@ RF requirement @RF@/RF@ LTE Funct i on 3G@ UMA@ UMA only VPRO Funct i on VPRO@/NOVPRO@ VGA EMI Requirement @VGA_EMI@/VGA_EMI@ VGA UNPOP @VGA@ VGA RF Requirement @RF@_VGA@ VGA Power 22@/23E@ GC6@/NOGC6@/NGC6 GC6 Funct i on INTEL CMC CMC@ ESPI ESPI @ BOM Option Table Item BOM Structure dGPU VGA@ ON Board DDR4 X76OBRAM@ N16S-GT SGT@ Without WiGi Funct i on NOWG@ HDD Redriver X76TI@/X76PAR@ VGM@ N16V-GM X76@ VRAM BOM Select SR@/DR@ (DR@ is not been used in this project) PD Funct i on PD@ CPU Code QH7Y@ ESD requirement ESD@ TS@ Touch screen reserve U42@ KBL-R U42 U22@ KBL U22 Single/Dual Rank I2C Address Table BUS SOC_SMBCLK_1 +3VS SOC_SMBCLK_1 +3VS SOC_SML0CLK +3VS SOC_SML0CLK +3V_LAN SOC_SML1CLK_1 +3VSDGPU_MAIN SOC_SML1CLK_1 +3VS SOC_SML1CLK_1 +3VS EC_SMB_CK1 +3VLP_EC EC_SMB_CK1 +3VLP_EC EC_SMB_CK1 +3VLP_EC Device 8Bit Read/W rite JDIMM1 A4/A5 Gsensor U26 30/31 JNFC1 52/53 LAN UL1 C8/C9 UGPU1 9E/9F Thermal Sensor UU24 98/99 PCH_LP 90/91 PD U5007 70/71 Battery PJP201 16/17 Charger PU301 12/13 Voltage Rails Power Plane Description S0 S3 +19V_VIN Adapter power supply N/A N/A S4/S5 N/A +17.4V_BATT Battery power supply N/A N/A N/A +19VB AC or battery power rail for power circuit N/A N/A N/A +VCC_CORE Processor IA Cores Power Rail ON OFF OFF +VCC_GT Processor Graphics Power Rails ON OFF OFF +VCC_SA System Agent power rail ON OFF OFF +0.6VS_VTT DDR +0.6VS power rail for DDR terminator ON OFF OFF +1.0VALW_PRIM +1.0V Always power rail ON ON ON*1 +1.0V_VCCSTU Sustain voltage for processor in Standby modes ON ON OFF +VCCIO CPU IO power rail ON OFF OFF +1.0VS_VCCSTG +1.0VALW_PRIM Gated version of VCCST ON OFF OFF +1.2V_VDDQ DDR4 +1.2V Power Rail ON ON OFF +1.8VALW_PRIM +1.8V Always power rail ON ON ON*1 +1.8VS System +1.8V power rail ON OFF OFF +3VLP +19VB to +3VLP power rail for suspend power ON ON ON +3VALW System +3VALW always on power rail ON ON ON*1 +3VS System +3V power rail ON OFF OFF +5VALW +5V Always power rail ON ON ON +5VS System +5V power rail ON OFF OFF +RTCVCC RTC Battery Power ON ON ON +1.05VSDGPU +1.05VS power rail for GPU ON OFF OFF +1.5VSDGPU +1.5VS power rail for GPU ON OFF OFF +3VSDGPU_AON +3VS power rail for GPU(AON rails) ON OFF OFF +3VSDGPU_MAIN +3VS power rail for GPU GC62.0 ON OFF OFF +VGA_CORE Core power for descrete GPU ON OFF OFF +2.5V DDR4 +2.5V Power Rail ON ON OFF Note : ON*1 means power plane is ON only when WOL enable and RTC wake at BIOS setting, otherwise it is OFF 43 level BOM table 43 Level Description BOM Structure 431A0NBOL01 SMT MB AD301 B4DBG QJFC 2.3G UMA HDMI 3G@/CMC@/DA2@/SR@/EMC@/EMI@/ESD@/HDMI@/NOVPRO@/PD@/TBT@/UMA@/X76PAR@/X76SAM@/RF@ 431A0NBOL02 SMT MB AD301 B4DBG QJ8M 2.4G UMA HDMI 3G@/CMC@/DA2@/SR@/EMC@/EMI@/ESD@/HDMI@/NOVPRO@/PD@/TBT@/UMA@/X76PAR@/X76SAM@/RF@ 431A0NBOL03 SMT MB AD301 B4DBG QJKP 2.3G DIS HDMI 3G@/CMC@/DA2@/SR@/EMC@/EMI@/ESD@/GC6@/HDMI@/PD@/SGT@/TBT@/VGA@/VGA_EMI@/VPRO@/X76PAR@/X76SAM@/RF@ 431A0NBOL04 SMT MB AD301 B4DBG QJKK 2.5G DIS HDMI 3G@/CMC@/DA2@/SR@/EMC@/EMI@/ESD@/GC6@/HDMI@/PD@/SGT@/TBT@/VGA@/VGA_EMI@/VPRO@/X76PAR@/X76SAM@/RF@ 4 Compal Secret Data Security Classification Issued Date 2017/02/22 Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Notes List Size Document Number Custom B C D Rev 0.1 LA-F241P Date: A Compal Electronics, Inc Wednesday, June 14, 2017 Sheet E of 54 D D C C B B A A Compal Secret Data Security Classification Issued Date 2017/02/22 Deciphered Date 2018/02/22 Title Si ze E Date: Dat e: Compal Electronics, Inc Power Map THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Document Number Rev 0.1 LA-F241P Friday, June 09, 2017 Sheet of 54 A B C D E C4PB1/C5PB1 Power OFF sequence SPOK 6.94us PBTN_OUT# +RTCVCC SOC_RTCRST# +1.8VALW_PG 4.108ms 4.108ms +VCCPRIM_CORE +3VLP 190.0us EC_ON +3VALW 19ms 98ms 98ms +1.8VALW_PRIM 70.8us +1.8VALW_PG EC_RSMRST# 802.8us PM_SLP_S5# 29us 78us 29us +VCC_SA 26.8us VR_PWRGD 26.8us 29.2us 89.6us PLT_RST# 9.72ms SUSP# 5s H_CPUPWRGD 9.080ms 465.6us +VCC_CORE 1.62ms +5VS/+3VS/+1.8VS 31.98us PCH_PWROK 360us +1.0V_VCCSTU +1.0VS_VCCSTG 23.84us +0.6VS_VTT 281.7us ESPI_RST# 465.6us SUSP# SM_PG_CTRL 720us +1.2V_VDDQ +1.0VS_VCCSTG VR_ON 10.12ms SYSON 23.84us +1.5VS 218.7ms 41.06 PM_SLP_S3# 130us +1.0V_VCCSTU EC_VCCST_PG 38us PM_SLP_S4# +1.2V_VDDQ +5VS/+3VS/+1.8VS 635.7ms +VCCPRIM_CORE 68.48us SYSON 131ms 298ms 39.12us PM_SLP_S3# 880.0us ON/OFF PBTN_OUT# 71.68us PM_SLP_S4# 910us SPOK 8.904s PM_SLP_S5# 2.56ms +5VALW 6.160ms +1.5VS EC_VCCST_PG 6.040us VR_ON 12.4ms C4PB1/C5PB1 S3 sequence OFF 12.8us +0.6VS_VTT +1.8VALW_PRIM EC_RSMRST# +19VB 4.294ms +3VALW C4PB1/C5PB1 Power on sequence 20.8us SM_PG_CTRL 2.224ms +VCC_SA 5.26us VR_PWRGD 9.052ms H_CPUPWRGD 13.46us +1.0VS_VCCSTG 39.86us SUSP# 13.46us EC_VCCST_PG 35.68us VR_ON 33.04us +0.6VS_VTT 32.4us SM_PG_CTRL 32.4us +VCC_SA 32.4us VR_PWRGD 20.8us PCH_PWROK 28.2us H_CPUPWRGD 376.8us PLT_RST# +VCC_CORE 23.61ms 245.3us 1.632ms 428.3ms +1.5VS 653.0us +VCC_CORE 245.3us 68.8us +5VS/+3VS/+1.8VS 2.167ms PLT_RST# +1.0V_VCCSTU 8028ms PCH_PWROK Resum PM_SLP_S3# 36.6ms 20.424ms 20.424ms 20.09ms 20.09ms 2.205ms 22.04ms 30.44ms 133.6ms 475.2us 143.5ms 653.6us Compal Secret Data Security Classification Issued Date 2017/02/22 Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Power Sequence B C D Rev 0.1 LA-F241P Date: A Compal Electronics, Inc Size Document Number Custom Friday, June 09, 2017 E Sheet of 54 A B C UC1A Functional Strap Definitions DDPB_CTRLDATA/ GPP_E19 (Internal Pull Down): DDPC_CTRLDATA/ GPP_E21 (Internal Pull Down): DDPD_CTRLDATA/ GPP_E23 (Internal Pull Down): (Sampled:Rising edge of PCH_PWROK) Display Port B/C/D Detected =Port is not detected =Port is detected < PS8338 > Docking HDMI+TBT SOC_DP1_N0 SOC_DP1_P0 SOC_DP1_N1 SOC_DP1_P1 CPU_DP2_N0 CPU_DP2_P0 CPU_DP2_N1 CPU_DP2_P1 CPU_DP2_N2 CPU_DP2_P2 CPU_DP2_N3 CPU_DP2_P3 E55 F55 E58 F58 F53 G53 F56 G56 C50 D50 C52 D52 A50 B50 D51 C51 2 2.2K_0402_5% R4955 EDP_COMP 24.9_0402_1% PS8338 HDMI DDC #54 016 PDG0.9 P.186 Trace width= mils,Spacing= 5mil,Max length=100mils SOC_DP1_CTRL_DATA DDI2_CTRL_CK DDI2_CTRL_DATA DDI2_CTRL_CK DDI2_CTRL_DATA TBT_DP1_CTRL_CLK TBT_DP1_CTRL_DATA TBT_DP1_CTRL_CLK TBT_DP1_CTRL_DATA DDI EDP_AUXN EDP_AUXP EDP EDP_DISP_UTIL DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP DDI3_AUXN DDI3_AUXP N7 N8 @ 0_0402_5% @ RC238 0_0402_5% RC245 EDP_COMP GPP_E22/DDPD_CTRLCLK GPP_E23/DDPD_CTRLDATA EDP_BKLTEN EDP_BKLTCTL EDP_VDDEN OF 20 EDP_RCOMP UC1D H_PROCHOT# RC4 @ T167 H_PECI 499_0402_1% CATERR# H_PECI H_PROCHOT#_R H_THERMTRIP# D63 A54 C65 C63 A65 XDP_BPM#0 XDP_BPM#1 C55 D55 B54 C56 I2C_TS_INT# A6 A7 BA5 AY5 @ T170 CC52 @EMC@ 1U_0402_16V7K H_PECI DET_SIG#_R RC5 RC6 RC7 RC8 PDG0.9 P.771 PROC_POPIRCOMP/PCH_OPIRCOMP PD 50ohm CC53 ESD@ 1U_0402_16V7K H_PROCHOT#_R ESD E52 GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3 GPP_E17/EDP_HPD GPP_E20/DDPC_CTRLCLK GPP_E21/DDPC_CTRLDATA E45 F45 EDP_AUXN EDP_AUXP 2 2 1 1 49.9_0402_1% 49.9_0402_1% 49.9_0402_1% 49.9_0402_1% CPU_POPIRCOMP AT16 PCH_OPIRCOMP AU16 EDRAM_OPIO_RCOMP H66 EOPIO_RCOMP H65 #544669 CRB RVP7 1.0 EDRAM_OPIO_RCOMP/EOPIO_RCOMP PD50ohm 2014/9/17 G50 F50 E48 F48 G46 F46 SOC_DP1_AUXN SOC_DP1_AUXP SOC_DP2_AUXN SOC_DP2_AUXP L9 L7 L6 N9 L10 SOC_DP1_HPD CPU_HDMI_HPD R12 R11 U13 ENBKL SOC_BKL_PWM SOC_ENVDD SOC_DP1_AUXN SOC_DP1_AUXP DDI2_AUX_DN DDI2_AUX_DP DP Aux (Port B for VGA) +3VS RC212 10K_0402_5% @ PS8338 EC_SCI# SOC_DP1_HPD CPU_HDMI_HPD EC_SCI# CPU_EDP_HPD EC_SCI# CPU_EDP_HPD From VGA Trans From DP MUX EC_SCI# SOC internal PU From eDP ENBKL SOC_BKL_PWM SOC_ENVDD #545659 PCH EDS 0.7 P.108 SCI capability is available on all GPIOs, while NMI and SMI capability is available on selected GPIOs only Below are the PCH GPIOs that can be routed to generate SMI# or NMI: GPP B14, GPP B 0, GPP B GPP C : GPP D 4: GPP E 8: , GPP E 16: ‧‧ ‧‧ Rev_0.53 CATERR# PECI PROCHOT# THERMTRIP# SKTOCC# B52 SKL-U follow INTEL check list to reserve D63 test point @ T160 @ T161 for N11 N12 GPP_E18/DDPB_CTRLCLK GPP_E19/DDPB_CTRLDATA EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3 SKL-U_BGA1356 @ RC3 1K_0402_5% Reserved L13 L12 +1.0VS_VCCSTG 1 H_THERMTRIP# 1K_0402_5% DDI2_TXN[0] DDI2_TXP[0] DDI2_TXN[1] DDI2_TXP[1] DDI2_TXN[2] DDI2_TXP[2] DDI2_TXN[3] DDI2_TXP[3] C47 C46 D46 C45 A45 B45 A47 B47 RC2 AR HDMI DDC #54 016 PDG0.9 P.75 PH 1K to VCCST CPU over degree will output low force S0->S5 +1.0V_VCCST EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3] DISPLAY SIDEBANDS +VCCIO SKL-U DDI1_TXN[0] DDI1_TXP[0] DDI1_TXN[1] DDI1_TXP[1] DDI1_TXN[2] DDI1_TXP[2] DDI1_TXN[3] DDI1_TXP[3] +3VS COMPENSATION PU FOR eDP RC1 E Rev_0.53 #543016 PDG0.9 P.775 D JTAG PROC_TCK PROC_TDI PROC_TDO PROC_TMS PROC_TRST# CPU MISC BPM#[0] BPM#[1] BPM#[2] BPM#[3] PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS PCH_TRST# JTAGX GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3 B61 D60 A61 C60 B59 CPU_XDP_TCK0 SOC_XDP_TDI SOC_XDP_TDO SOC_XDP_TMS SOC_XDP_TRST# B56 D59 A56 C59 C61 A59 PCH_JTAG_TCK1 SOC_XDP_TDI SOC_XDP_TDO SOC_XDP_TMS SOC_XDP_TRST# CPU_XDP_TCK0 T3848@ PROC_POPIRCOMP PCH_OPIRCOMP OPCE_RCOMP OPC_RCOMP OF 20 SKL-U_BGA1356 @ +1.0VS_VCCSTG Place to CPU side SOC_XDP_TMS RC11 CMC@ 51_0402_5% RC13 CMC@ 51_0402_5% SOC_XDP_TDI RC15 CMC@ 51_0402_5% SOC_XDP_TDO 3 APS CONN +3VALW +3VALW_PRIM JAPS1 PM_SLP_S3# PM_SLP_S5# PM_SLP_S4# PM_SLP_A# 10 11 12 13 14 15 16 17 18 19 20 SOC_RTCRST# PBTN_OUT#_R2 SYS_RESET# PM_SLP_S0# 10 11 12 13 14 15 16 17 18 GND GND RC35 CMC@ 51_0402_1% Place to CPU side RC37 @ 51_0402_5% CPU_XDP_TCK0 PCH_JTAG_TCK1 Follow 544924_Skylake_EDS_Vol_1_Rev_0.93 ACES_50506-01841-P01 CONN@ 4 PBTN_OUT# ON/OFF# RC53 @ 0_0402_5% RC54 @ 0_0402_5% Compal Secret Data Security Classification PBTN_OUT#_R2 Issued Date 2017/02/22 Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC use for iAMT Test Title Size Document Number Custom Date: A B C D Compal Electronics, Inc SKL-U(1/12)DDI,MSIC,XDP,EDP LA-F241P Friday, June 09, 2017 E Sheet of Rev 0.1 54 A B C D E Interleaved Memory 1 SKL-U UC1B UC1C SKL-U Rev_0.53 DDR_A_D[0 15] DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_A_D[16 31] DDR_A_D[32 47] DDR_A_D[48 63] AL71 AL68 AN68 AN69 AL70 AL69 AN70 AN71 AR70 AR68 AU71 AU68 AR71 AR69 AU70 AU69 BB65 AW65 AW63 AY63 BA65 AY65 BA63 BB63 BA61 AW61 BB59 AW59 BB61 AY61 BA59 AY59 AY39 AW39 AY37 AW37 BB39 BA39 BA37 BB37 AY35 AW35 AY33 AW33 BB35 BA35 BA33 BB33 AY31 AW31 AY29 AW29 BB31 BA31 BA29 BB29 AY27 AW27 AY25 AW25 BB27 BA27 BA25 BB25 DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15] DDR0_DQ[16]/DDR0_DQ[32] DDR0_DQ[17]/DDR0_DQ[33] DDR0_DQ[18]/DDR0_DQ[34] DDR0_DQ[19]/DDR0_DQ[35] DDR0_DQ[20]/DDR0_DQ[36] DDR0_DQ[21]/DDR0_DQ[37] DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQ[26]/DDR0_DQ[42] DDR0_DQ[27]/DDR0_DQ[43] DDR0_DQ[28]/DDR0_DQ[44] DDR0_DQ[29]/DDR0_DQ[45] DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQ[32]/DDR1_DQ[0] DDR0_DQ[33]/DDR1_DQ[1] DDR0_DQ[34]/DDR1_DQ[2] DDR0_DQ[35]/DDR1_DQ[3] DDR0_DQ[36]/DDR1_DQ[4] DDR0_DQ[37]/DDR1_DQ[5] DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQ[61]/DDR1_DQ[45] DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQ[63]/DDR1_DQ[47] DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1] DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3] DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_MA[3] DDR0_MA[4] DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1] DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5] DDR0_ALERT# DDR0_PAR DDR CH - A DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ DDR_VTT_CNTL Rev_0.53 AU53 AT53 AU55 AT55 DDR_A_CLK#0 DDR_A_CLK0 DDR_A_CLK#1 DDR_A_CLK1 BA56 BB56 AW56 AY56 DDR_A_CKE0 DDR_A_CKE1 AU45 AU43 AT45 AT43 DDR_A_CS#0 DDR_A_CS#1 DDR_A_ODT0 DDR_A_ODT1 BA51 BB54 BA52 AY52 AW52 AY55 AW54 BA54 BA55 AY54 DDR_A_MA5 DDR_A_MA9 DDR_A_MA6 DDR_A_MA8 DDR_A_MA7 DDR_A_BG0 DDR_A_MA12 DDR_A_MA11 M_A_ACT# DDR_A_BG1 AU46 AU48 AT46 AU50 AU52 AY51 AT48 AT50 BB50 AY50 BA50 BB52 DDR_A_MA13 DDR_A_MA15 DDR_A_MA14 DDR_A_MA16 DDR_A_BA0 DDR_A_MA2 DDR_A_BA1 DDR_A_MA10 DDR_A_MA1 DDR_A_MA0 DDR_A_MA3 DDR_A_MA4 AM70 AM69 AT69 AT70 BA64 AY64 AY60 BA60 BA38 AY38 AY34 BA34 BA30 AY30 AY26 BA26 DDR_A_DQS#0 DDR_A_DQS0 DDR_A_DQS#1 DDR_A_DQS1 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_DQS#3 DDR_A_DQS3 DDR_A_DQS#4 DDR_A_DQS4 DDR_A_DQS#5 DDR_A_DQS5 DDR_A_DQS#6 DDR_A_DQS6 DDR_A_DQS#7 DDR_A_DQS7 AW50 AT52 DDR_A_CLK#0 DDR_A_CLK0 @ T20 @ T19 @ @ @ DDR_A_CKE0 T21 DDR_A_CS#0 T23 DDR_A_ODT0 T22 DDR_A_MA5 DDR_A_MA9 DDR_A_MA6 DDR_A_MA8 DDR_A_MA7 DDR_A_BG0 DDR_A_MA12 DDR_A_MA11 M_A_ACT# DDR_A_BG1 DDR_A_MA13 DDR_A_MA15 DDR_A_MA14 DDR_A_MA16 DDR_A_BA0 DDR_A_MA2 DDR_A_BA1 DDR_A_MA10 DDR_A_MA1 DDR_A_MA0 DDR_A_MA3 DDR_A_MA4 +0.6V_VREFCA AW67 DDR_PG_CTRL @ T25 +0.6V_B_VREFDQ DDR_B_D[0 15] DDR_A_DQS#0 DDR_A_DQS0 DDR_A_DQS#1 DDR_A_DQS1 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_DQS#3 DDR_A_DQS3 DDR_A_DQS#4 DDR_A_DQS4 DDR_A_DQS#5 DDR_A_DQS5 DDR_A_DQS#6 DDR_A_DQS6 DDR_A_DQS#7 DDR_A_DQS7 DDR_A_ALERT# DDR_A_PARITY AY67 AY68 BA67 +0.6V_VREFCA +0.6V_B_VREFDQ DDR_B_D[16 31] DDR_B_D[32 47] DDR_B_D[48 63] Trace width/Spacing >= 20mils Place componment near SODIMM #543016 PDG0.9 P.163 RC place near SODIMM DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69 AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60 AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30 AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21 OF 20 SKL-U_BGA1356 @ DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1] DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3] DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0] DDR1_ODT[1] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR1_MA[3] DDR1_MA[4] DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSP[5]/DDR1_DQSP[3] DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7] DDR1_ALERT# DDR1_PAR DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2] DDR CH - B AN45 AN46 AP45 AP46 DDR_B_CLK#0 DDR_B_CLK#1 DDR_B_CLK0 DDR_B_CLK1 AN56 AP55 AN55 AP53 DDR_B_CKE0 DDR_B_CKE1 BB42 AY42 BA42 AW42 DDR_B_CS#0 DDR_B_CS#1 DDR_B_ODT0 DDR_B_ODT1 AY48 AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52 DDR_B_MA5 DDR_B_MA9 DDR_B_MA6 DDR_B_MA8 DDR_B_MA7 DDR_B_BG0 DDR_B_MA12 DDR_B_MA11 M_B_ACT# DDR_B_BG1 BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47 DDR_B_MA13 DDR_B_MA15 DDR_B_MA14 DDR_B_MA16 DDR_B_BA0 DDR_B_MA2 DDR_B_BA1 DDR_B_MA10 DDR_B_MA1 DDR_B_MA0 DDR_B_MA3 DDR_B_MA4 AH66 AH65 AG69 AG70 AR66 AR65 AR61 AR60 AT38 AR38 AT32 AR32 AR25 AR27 AR22 AR21 DDR_B_DQS#0 DDR_B_DQS0 DDR_B_DQS#1 DDR_B_DQS1 DDR_B_DQS#2 DDR_B_DQS2 DDR_B_DQS#3 DDR_B_DQS3 DDR_B_DQS#4 DDR_B_DQS4 DDR_B_DQS#5 DDR_B_DQS5 DDR_B_DQS#6 DDR_B_DQS6 DDR_B_DQS#7 DDR_B_DQS7 AN43 AP43 AT13 AR18 AT18 AU18 DDR_B_ALERT# DDR_B_PARITY DDR_DRAMRST# DDR_B_CKE0 DDR_B_CKE1 DDR_B_CS#0 DDR_B_CS#1 DDR_B_ODT0 DDR_B_ODT1 DDR_B_MA5 DDR_B_MA9 DDR_B_MA6 DDR_B_MA8 DDR_B_MA7 DDR_B_BG0 DDR_B_MA12 DDR_B_MA11 M_B_ACT# DDR_B_BG1 DDR_B_MA13 DDR_B_MA15 DDR_B_MA14 DDR_B_MA16 DDR_B_BA0 DDR_B_MA2 DDR_B_BA1 DDR_B_MA10 DDR_B_MA1 DDR_B_MA0 DDR_B_MA3 DDR_B_MA4 DDR_B_DQS#0 DDR_B_DQS0 DDR_B_DQS#1 DDR_B_DQS1 DDR_B_DQS#2 DDR_B_DQS2 DDR_B_DQS#3 DDR_B_DQS3 DDR_B_DQS#4 DDR_B_DQS4 DDR_B_DQS#5 DDR_B_DQS5 DDR_B_DQS#6 DDR_B_DQS6 DDR_B_DQS#7 DDR_B_DQS7 DDR_B_ALERT# DDR_B_PARITY DDR_DRAMRST# follow INTEL review feedback change to 200ohm SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 RC38 RC39 RC40 121_0402_1% 80.6_0402_1% 100_0402_1% #543016 PDG0.9 P.117 W=12-15 Space= 20/25 L=500mil +3VS SM_PG_CTRL RC16 2M_0402_5% G @ +1.2V_VDDQ RC10 220K_0402_5% 74AUP1G07GW_TSSOP5 UC1 +1.2V_VDDQ 1U_0402_16V7K CC57 UC7 NC VCC DDR_PG_CTRL A Y GND ES Sample DDR_B_CLK#0 DDR_B_CLK#1 DDR_B_CLK0 DDR_B_CLK1 OF 20 SKL-U_BGA1356 @ DDR_VTT_CNTL to DDR VTT supplied ramped AAX05 Use = Enable TOP Swap Mode BA22 AY22 BB22 BA21 AY21 AW22 J5 AY20 AW20 PCH_DMIC_CLK PCH_DMIC_DATA PCH_DMIC_CLK PCH_DMIC_DATA H5 D7 D8 C8 BEEP# BEEP# AW5 HDA_SYNC/I2S0_SFRM HDA_BLK/I2S0_SCLK HDA_SDO/I2S0_TXD HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_RST#/I2S1_SCLK GPP_D23/I2S_MCLK I2S1_SFRM I2S1_TXD #54 016 PDG0.9 P Terminat i ng Unus ed S DI O/S DXC Si gnal s SDIO signals are mult i pl exed w i t h GPI Os and default to GPIO funct i onali t y ( as i nput) If SDIO interface is not used, the signals can be used as GPIOs instead If the GPIO funct i onali t y i s al s o not us ed, t he si gnal s can bel e ft as no- c onnect SDIO/SDXC GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3 GPP_G5/SD_CD# GPP_G6/SD_CLK GPP_G7/SD_WP GPP_F1/I2S2_SFRM GPP_F0/I2S2_SCLK GPP_F2/I2S2_TXD GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 GPP_A16/SD_1P8_SEL GPP_D19/DMIC_CLK0 GPP_D20/DMIC_DATA0 SD_RCOMP GPP_D17/DMIC_CLK1 GPP_D18/DMIC_DATA1 GPP_F23 AB11 AB13 AB12 W12 W11 W10 W8 W7 BA9 BB9 SD_RCOMP AB7 200_0402_1% RC76 AF13 GPP_B14/SPKR OF 20 SKL-U_BGA1356 @ HDA for AUDIO HDA_BIT_CLK_R RF@ 0_0402_5% R5253 RPC9 HDA_SYNC HDA_SDOUT HDA_BIT_CLK HDA_RST# 33_0804_8P4R_5% 2 HDA_SYNC_R HDA_SDOUT_R HDA_BIT_CLK_R HDA_RST#_R RF@ C5228 22P_0402_50V8J HDA_SDOUT @ RC77 0_0402_5% HDA_SDIN0 ME_EN HDA_SDIN0 SKL_ULT UC1I Rev_0.53 CSI-2 A29 B29 C28 D28 A27 B27 C27 D27 CSI2_COMP GPP_D4/FLASHTRIG CSI2_DN4 CSI2_DP4 CSI2_DN5 CSI2_DP5 CSI2_DN6 CSI2_DP6 CSI2_DN7 CSI2_DP7 +3VALW _1.8VALW _PGPPD C37 D37 C32 D32 C29 D29 B26 A26 E13 CSI2_COMP RC80 DGPU_PRSNT# B7 DGPU_PRSNT# 100_0402_1% EMMC GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F17/EMMC_DATA4 GPP_F18/EMMC_DATA5 GPP_F19/EMMC_DATA6 GPP_F20/EMMC_DATA7 CSI2_DN8 CSI2_DP8 CSI2_DN9 CSI2_DP9 CSI2_DN10 CSI2_DP10 CSI2_DN11 CSI2_DP11 GPP_F21/EMMC_RCLK GPP_F22/EMMC_CLK GPP_F12/EMMC_CMD OF 20 RC133 10K_0402_5% UMA@ CSI2_CLKN0 CSI2_CLKP0 CSI2_CLKN1 CSI2_CLKP1 CSI2_CLKN2 CSI2_CLKP2 CSI2_CLKN3 CSI2_CLKP3 C31 D31 C33 D33 A31 B31 A33 B33 CSI2_DN0 CSI2_DP0 CSI2_DN1 CSI2_DP1 CSI2_DN2 CSI2_DP2 CSI2_DN3 CSI2_DP3 EMMC_RCOMP AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1 GPIO67 AM2 AM3 AP4 AT1 RC134 10K_0402_5% VGA@ A36 B36 C38 D38 C36 D36 A38 B38 DGPU_PRSNT# EMMC_RCOMP DIS,Optimus UMA RC89 200_0402_1% SKL-U_BGA1356 @ 4 Compal Secret Data Security Classification 2017/02/22 Issued Date Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title SKL-U(4/12)HDA,EMMC,SDIO,CSI2 Size Document Number Custom B C D Rev 0.1 LA-F241P Date: A Compal Electronics, Inc Friday, June 09, 2017 Sheet E of 54 A B C D SKL_ULT UC1J +RTCVCC E Rev_0.53 CLOCK SIGNALS SSD Remove CLR ME NGFF WL+BT(KEY E) 1U_0402_6.3V6K 0_0603_5% CLR CMOS Place at RAM DOOR 1M_0402_5% SM_INTRUDER# CLKREQ_PCIE#4 10K_0402_5% CLKREQ_PCIE#5 10K_0402_5% CLKREQ_PCIE#0 10K_0402_5% CLKREQ_PCIE#1 10K_0402_5% CLKREQ_PCIE#2 10K_0402_5% CLKREQ_PCIE#3 10K_0402_5% RC105 RC259 RC121 RC123 D41 C41 AT8 CLK_PCIE_N3 CLK_PCIE_P3 CLKREQ_PCIE#3 B40 A40 AU8 CLK_PCIE_N5 CLK_PCIE_P5 CLKREQ_PCIE#5 E40 E38 AU7 CLK_PCIE_N5 CLK_PCIE_P5 CLKREQ_PCIE#5 CLKOUT_PCIE_N2 CLKOUT_PCIE_P2 GPP_B7/SRCCLKREQ2# D40 C40 AT10 CLK_PCIE_CARD CLK_PCIE_CARD# CLKREQ_PCIE#4 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P GPD8/SUSCLK XTAL24_IN XTAL24_OUT CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 GPP_B8/SRCCLKREQ3# XCLK_BIASREF RTCX1 RTCX2 CLKOUT_PCIE_N4 CLKOUT_PCIE_P4 GPP_B9/SRCCLKREQ4# SRTCRST# RTCRST# RC104 1K_0402_5% @ RC106 AC_PRESENT 10K_0402_5% SOC_VRALERT# PLT_RST# SYS_RESET# EC_RSMRST# AN10 B5 AY17 H_CPUPW RGD EC_VCCST_PG A68 B65 T89 @ SYS_PW ROK PCH_PW ROK SYS_PW ROK PCH_PW ROK PCH_DPW ROK B6 BA20 BB20 SUSPW RDNACK SUSPW RDNACK AR13 AP11 SUSACK# T95 WAKE# (DSX wake event) @ T92 10 KΩ pull- up t o Vcc DS W The pull-up is required even if PCIe* interface PCH_PCIE_W is not AKE# LAN_PME# used on the plat f or m +3VALW _DSW LAN_DISABLE_N PCH_PCIE_W AKE#BB15 LAN_PME# AM15 LAN_DISABLE_N AW17 AT15 LAN WAKE: LAN Wake Indicator from the GbE PHY @ P GPP_B12/SLP_S0# GPD4/SLP_S3# GPD5/SLP_S4# GPD10/SLP_S5# SLP_SUS# SLP_LAN# GPD9/SLP_WLAN# GPD6/SLP_A# PROCPWRGD VCCST_PWRGD SYS_PWROK PCH_PWROK DSW_PWROK GPD3/PWRBTN# GPD1/ACPRESENT GPD0/BATLOW# GPP_A13/SUSWARN#/SUSPWRDNACK GPP_A15/SUSACK# GPP_A11/PME# INTRUDER# WAKE# GPD2/LAN_WAKE# GPD11/LANPHYPC GPD7/RSVD GPP_B11/EXT_PWR_GATE# GPP_B2/VRALERT# 11 OF 20 U22@ SOC_XTAL24_IN_R RC92 1M_0402_5% SOC_XTAL24_OUT_R YC1 24MHZ_12PF_7V24000020 U22@ SKL-U GPP_B13/PLTRST# SYS_RESET# RSMRST# U22@ 0_0201_5% RC251 0_0201_5% RC252 R157 100K_0402_5% @ @ Rev_0.53 @ #543016 PDG0.9 P.526 PROCPWRGD is used only for power sequence debug and is not required to be connected to anything on the platform +3VALW _PRIM RC111 @ PLT_RST_BUF# SYSTEM POWER MANAGEMENT @ SOC_RTCRST# 0_0402_5% UC1K PLT_RST# SYS_RESET# EC_RSMRST# PCH_PCIE_W AKE# 10K_0402_5% RC115 SOC_SRTCRST# SOC_RTCRST# +1.0VALW _CLK5_F24NS +3VM PLT_RST_BUF# PM_BATLOW # 10K_0402_5% AN18 AM16 2.7K_0402_1% RC96 1 @ RC136 60.4_0402_1% T84 T85 AT11 AP15 BA16 AY16 PM_SLP_S0# PM_SLP_S3# PM_SLP_S4# PM_SLP_S5# AN15 AW15 BB17 AN16 SLP_SUS# SLP_LAN# SLP_W LAN# PM_SLP_A# BA15 AY15 AU13 PBTN_OUT#_R AC_PRESENT PM_BATLOW # AU11 AP16 SM_INTRUDER# @ T91 AM10 AM11 EXT_PW R_GATE# SOC_VRALERT# @ T93 PM_SLP_S0# PM_SLP_S3# PM_SLP_S4# PM_SLP_S5# @ T86 @ T90 SLP_LAN# SLP_W LAN# PM_SLP_A# AC_PRESENT GND GND U22@ 2 U22@ CC13 15P_0402_50V8J SOC_RTCX1 SOC_RTCX2 U22@ UC3 MC74VHC1G08DFT2G_SC70-5 Note for PCH_PWROK PDG1.0 Figure43-4 note20: PCH_PWROK does not glitch when RSMRST# is de-asserted +3VALW _DSW XCLK_BIASREF XCLK_BIASREF T:50ohm S:12/15 L:1000 Via:2 RC249 0_0402_5% RC125 543016_SKL_U_Y_PDG_0_9 E42 AM18 AM20 Follow 2014MOW48 Skylake U PU 2.7k ohm to 1V U PD 60.4 ohm Cannonlake CC12 15P_0402_50V8J PCH_PW ROK EC_RSMRST# SYS_RESET# LAN_PME# SOC_XTAL24_IN SOC_XTAL24_OUT SUSCLK SOC_XTAL24_IN +3VS G RPC11 RC103 E37 E35 T164 @ T165 @ RC248 0_0402_5% @ 2 B Y A 10K_0804_8P4R_5% Follow SUSCLK SOC_XTAL24_OUT PCH PLTRST Buffer PLT_RST# BA17 10 OF 20 +3VALW _PRIM CLK_CPU_ITP# CLK_CPU_ITP SKL-U_BGA1356 @ +3VALW _DSW F43 E43 CLKOUT_PCIE_N5 CLKOUT_PCIE_P5 GPP_B10/SRCCLKREQ5# RC124 CLK_PCIE_N2 CLK_PCIE_P2 CLKREQ_PCIE#2 CLKOUT_PCIE_N1 CLKOUT_PCIE_P1 GPP_B6/SRCCLKREQ1# 1 CLK_PCIE_N3 CLK_PCIE_P3 CLKREQ_PCIE#3 WIGIG CLK_PCIE_CARD CLK_PCIE_CARD# CLKREQ_PCIE#4 CR +3VS RC165 CLK_PCIE_N2 CLK_PCIE_P2 CLKREQ_PCIE#2 B42 A42 AT7 RC94 AR CLK_PCIE_N1 CLK_PCIE_P1 CLKREQ_PCIE#1 2 @ CLK_PCIE_N1 CLK_PCIE_P1 CLKREQ_PCIE#1 CLKOUT_PCIE_N0 CLKOUT_PCIE_P0 GPP_B5/SRCCLKREQ0# CC11 JCMOS1 SOC_RTCRST# CLK_PCIE_N0 D42 CLK_PCIE_P0 C42 CLKREQ_PCIE#0 AR10 1 20K_0402_5% CLK_PCIE_N0 CLK_PCIE_P0 CLKREQ_PCIE#0 RC93 GLAN SOC_SRTCRST# 1U_0402_6.3V6K 2 2 20K_0402_5% CC10 RC91 2014MOW48: Skylake U use 24M 50 ohm ESR Cannonlake U use 38.4M 30 ohm ESR SOC_RTCX2 SKL-U_BGA1356 @ 100K_0402_5% PBTN_OUT#_R SOC_RTCX1 +1.0V_VCCST EC_VCCST_PG_R PBTN_OUT# RC116 @ RC109 RC98 PBTN_OUT#_R 0_0402_5% EC_RSMRST# PCH_DPW ROK @ 0_0402_5% RC114 RC113 1K_0402_5% EC(open-drain) From Note for VCCST_PWRGD 1.0V tolerance PDG1.0 Figure43-4 note17: when failure events, VCCST_PWRGD and PCH_PWROK de-assert at the same time 60.4_0402_1% YC2 EC_VCCST_PG Change PN to @ PCH_PW ROK 0_0402_5% CC15 8.2P_0402_50V8D SYS_PW ROK EC_VCCST_PG CC436 1U_0402_16V7K ESD@ RC110 2017/02/22 Issued Date Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Reserved for ESD 2014/9/17 Title C D Compal Electronics, Inc SKL-U(5/12)CLK,GPIO Size Document Number Custom Rev 0.1 LA-F241P Date: B SJ10000PW00 CC16 8.2P_0402_50V8D 10K_0402_5% Compal Secret Data Security Classification 2017/4/18 for MB Field lesson learnt ESD request Close to UC1 CC51 @EMC@ 1U_0402_16V7K SYS_RESET# CC50 @EMC@ 1U_0402_16V7K H_CPUPW RGD A 32.768KHZ_9PF_X1A000141000200 SYS_PW ROK RC122 10M_0402_5% Sheet Friday, June 09, 2017 E 10 of 54 A B C D For Power Of f Sequence DC & VGA Interface +3VALW CT2 VIN2 VIN2 VOUT2 VOUT2 10 1000P_0402_50V7K +1.2V_VDDQ_R GPAD EM5209VF_DFN14_2X3 1000P_0402_50V7K @ J37 +5VS_OUT 15 SYSON# SYSON# Q40A ME2N7002D1KW-G 2N SOT363-6 SB00000SA00 @ SYSON SYSON Q40B ME2N7002D1KW-G 2N SOT363-6 @ SB00000SA00 SB00000SA00 use SB00000DH00 +3VS VIN2 VIN2 VOUT2 VOUT2 GPAD +0.675VS_VTT_R 15 SUSP# +3VALW R555 10K_0402_5% @ +3VALWP R5260 240_0402_1% EC_nDS@ SUSP# +3VALW Q2016B SB00000SA00 ME2N7002D1KW-G 2N SOT363-6 R1002 100K_0402_5% Q2006A @ SB00000SA00 SUSP Q2006B @ SB00000SA00 ME2N7002D1KW-G 2N SOT363-6 PM_SLP_S4 SYSON For tPLT15 1us(max) Q2016A ME2N7002D1KW-G 2N SOT363-6 SB00000SA00 PM_SLP_S4# ME2N7002D1KW-G 2N SOT363-6 R5261 100K_0402_5% EC_nDS@ 3VALW_R 3VALW_ON# 3VALW_ON# Q2022A ME2N7002D1KW-G 2N SOT363-6 EC_nDS@ SB00000SA00 +1.8VALW_PRIM 3V_EN Q2022B ME2N7002D1KW-G 2N SOT363-6 EC_nDS@ SB00000SA00 +3VALWP 2 SUSP# SUSP# Q2021A ME2N7002D1KW-G 2N SOT363-6 @ SB00000SA00 1 3VS_ON# Q2021B ME2N7002D1KW-G 2N SOT363-6 SB00000SA00 @ 3VS_R R566 470_0603_5% 3VS_ON# R5258 100K_0402_5% @ @ SUSP 10 EM5209VF_DFN14_2X3 EC_nDS@ R5259 60.4_0603_5% @ @ 11 For tCPU18 1us(max) CT2 R552 100K_0402_5% symbol GND ON2 EC_nDS@ C5248 1000P_0402_50V7K SB00000DH00 Q2013A ME2N7002D1KW-G 2N SOT363-6 SB00000SA00 VBIAS +5VALW 2 CT1 1us(max) Only use in the power of AR is +3VS ON1 14 13 12 VOUT1 VOUT1 VIN1 VIN1 use +0.6VS_VTT C5246 +3VALWP EC_nDS@.1U_0402_16V7K 3V_EN_R1 3V_EN +3VALWP R5257 0_0402_5% EC_nDS@ C5250 4.7U_0603_6.3V6K EC_nDS@ +5VALW U5009 VR_ON Q2013B For tCPU17 ME2N7002D1KW-G 2N SOT363-6 SB00000SA00 symbol ME2N7002D1KW PM_SLP_S3# ME2N7002D1KW +3VALW +5VS JUMP_43X118 PM_SLP_S3 Q2014A ME2N7002D1KW-G 2N SOT363-6 For tCPU28 1us(max) C967 R554 100K_0402_5% @ R573 470_0603_5% @ +3VS 2 11 GND ON2 2 C976 +5VALW VBIAS JUMP_43X118 12 CT1 VOUT1 VOUT1 ON1 +5VALW 5VS_ON VIN1 VIN1 Q2014B ME2N7002D1KW-G 2N SOT363-6 SB00000SA00 EC_VCCST_PG_R R1000 100K_0402_5% 1U_0402_16V7K C979 @ 3VS_ON 0_0402_5% C980 @ 1U_0402_16V7K @ 0_0402_5% R926 @ +3VS_OUT 14 13 @ J36 +3VALW R927 +5VALW +1.2V_VDDQ U5008 SUSP# E R5279 100K_0402_5% R5278 240_0402_1% EN_1.8VALW# 1.8VALW_PRIM_R EN_1.8VALW# Q2024B ME2N7002D1KW-G 2N SOT363-6 SB00000SA00 EN_1.8VALW EN_1.8VALW Q2024A ME2N7002D1KW-G 2N SOT363-6 SB00000SA00 +3VALW to +3VM for Intel AMT 20mil(68mA) +3VM +3VALW R645 @ 0_0603_5% C811 VPRO@ 4.7U_0603_6.3V6K 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2017/02/22 2018/02/22 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title DC Interface Size Document Number Custom A B C D Rev 0.1 LA-F241P Date: Friday, June 09, 2017 Sheet E 40 of 54 A B C D E 2015/7/8 PD101 and PD102 SCS00002F00 change to SCS00002M00 +19V_VIN PD101 @ PJP101 ACES_87302-0401-003 GND GND 4 3 2 1 5A_100V 15UA_0.88V_TO227-3 PD102 DC_IN_S2 EMI@ PL101 FBMA-L11-322513-151LMA50T_1210 DC_IN_S1 1 MB_VIN DC_IN_S2 1 5A_100V 15UA_0.88V_TO227-3 2 EMI@ PC101 1000P_0603_50V7K EMI@ PC102 1000P_0603_50V7K EMI 2 +TBTA_VBUS +19V_VIN PD103 @ @ PR108 1M_0201_5% 1 1 @ PR109 0_0402_5% 2 @ PR110 0_0402_5% 1 @ @ PR107 0_0201_5% 0.01_1206_1% PC107 0.1U_0402_25V6 5A_100V 15UA_0.88V_TO227-3 PC106 1000P_0402_50V7K 2 PC105 10U_0603_25V6M @ PR106 0_0201_5% PR104 PC104 10U_0603_25V6M @ PR105 1M_0201_5% 2 PC103 1U_0402_25V6 PQ102 SI7716ADN-T1-GE3_POWERPAK8-5 2 PQ101 SI7716ADN-T1-GE3_POWERPAK8-5 @ TBTA_HV_GATE2 TBTA_HV_GATE1 TBTA_PD_SENSEP Keep these two signals as pair routing TBTA_HV_GATE2 TBTA_HV_GATE1 PR101 +3VLP TBTA_PD_SENSEN +CHGRTC 0_0402_5% 4 @ PBJ101 ML1220T13RE + +RTC PR102 560_0603_5% +RTC_R PR103 560_0603_5% +RTCBATT Compal Secret Data Security Classification Issued Date 2017/02/22 2018/02/22 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title PWR DCIN / Pre-charge Size Document Number Custom B C D R ev 0.1 LA-F241P Date: A Compal Electronics, Inc Friday, June 09, 2017 Sheet E 41 of 54 A B C D E @ PJP201 ACES_50290-0100N +3VLP PR221 0_0402_5% G718_OT1# MAINPWON MAINPWON Adp_det VCC TMSNS1 GND RHYST1 OT1 TMSNS2 OT2 RHYST2 G718_TMSNS1 G718_RHYST1 G718_TMSNS2 G718_RHYST2 G718TM1U_SOT23-8 BI 2 @ PR216 16.2K_0402_1% PR220 105K_0402_1% EMI MB_VIN DC_IN_S2 @ PR214 30.1K_0402_1% @ PH202 100K_0402_1%_NCP15WF104F03RC 2 @ 1 2 EMI@ PC206 0.01U_0402_25V7K BATT_TEMP @ PR201 0_0402_5% PU201 EMI@ PL201 FBMA-L11-322513-151LMA50T_1210 EMI@ PC201 1000P_0402_50V7K +3VLP PR219 +VMB BATT+ PC205 0.1U_0603_25V7K EC_SMB_CK1 PR217 200K_0402_1% 1 PR203 100_0402_1% 2 EC_SMB_DA1 PR213 @ 100K_0402_1% PR202 100_0402_1% 100K_0402_1% EC_SMDA EC_SMCA TH BI+ PR212 1K_0402_1% 1 10 PR215 PD201 S SCH DIO BAS40CW SOT-323 Adp_Vin PR218 5.11K_0402_1% 100K_0402_1% (Common Part) SL200002H00 PH1 under CPU botten side : CPU thermal protection at 93 +-3 degree C Recovery at 56 +-3 degree C +3VLP_ECA 2015/07/09 update Recovery PR204 16.5K_0402_1% 84.5W,0.61V PR206 19.1K_0402_1% 84.5W,0.61V ADP_I VCIN0_PH (Common Part) SL200002H00 58.5W,0.40V PH201 100K_0402_1%_NCP15WF104F03RC 58.5W,0.40V VCIN1_ADP_PROCHOT PR208 PC203 0.022U_0402_16V7K 45W For PD IN PC203 must close to EC pin 65W For AC IN Active For KB9022 sense 20mΩ T202@ 10K_0402_1% T201@ ECAGND T202 T201 must close to PH201 4 Compal Secret Data Security Classification Issued Date 2017/02/22 2018/02/22 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title PWR-BATTERY CONN/OTP Size Document Number Custom B C D R ev 0.1 LA-F241P Date: A Compal Electronics, Inc Friday, June 09, 2017 Sheet E 42 of 54 C +19V_CHG PC309 10U_0805_25V6K PC308 10U_0805_25V6K EMI@ PC307 2200P_0402_50V7K @EMI@ PC306 68P_0402_50V8J 0.01U_0402_25V7K 2 PC311 0.1U_0402_25V6 @PC305 10U_0805_25V6K PC312 PC310 0.1U_0603_25V7K PC302 0.022U_0603_25V7K 1 3ACN PR307 ACP 10_0402_1% BATT+_CHG @ PJ301 JUMP_43X79 2 1 PC303 0.047U_0603_25V7M PC301 1000P_0603_50V7 PR304 0.02_1206_1% RBFET_GATE ACFET_GATE PR301 4.7_0603_1% +19V_VIN +19V_P2 PQ304 AON7506_DFN33-8-5 +19VB 2014/9/25 PR304 10m ohm chang >20m ohm SD00000S120 +19V_P1 PQ303 MDU1512RH_POW ERDFN56-8-5 E PQ302 AON7506_DFN33-8-5 PQ301 2N7002KW _SOT323-3 G PR303 S 3M_0402_5% D @ PC304 10U_0805_25V6K D PR306 4.02K_0402_1% BATFET_GATE B PR302 1M_0402_1% 1Inverse_GATE A BATDRV_CHGR 2014/9/30 PC301 change to SE025102K80 PR308 4.02K_0402_1% ACDRV_CHGR PR305 4.02K_0402_1% CMSRC_CHGR 2014/9/30 PC301 change to SE025102K81 BATSRC_CHGR +6V_CHG_REGN 100P_0603_50V8 10 0_0402_5% 0.1U_0402_25V6 PR321 0_0402_5% 2PROCHOT#_CHGR H_PROCHOT# 13 14 ACOK PHASE 15 BATT_TEMP IDCHG LODRV 29 0_0603_5% 27 LX_CHGR 23 LG_CHGR PR320 @ PMON /PROCHOT GND CMPIN ILIM CMPOUT /BATPRES SRN 16 26 UG_CHGR (Common Part) Choke 2.2uH SH00000YV00 /TB_STAT PWPD BATDRV BATSRC 22 PR332 316K_0402_1% 316K_0402_1% PR322 21 ILIM_CHGR +5VALW +3VLP 100K_0402_1% PR323 10_0402_1% 20 SRP_CHGR 19 SRN_CHGR 18 BATDRV_CHGR PR324 10_0402_1% 17 BATSRC_CHGR BATT+ PR318 PL301 0.01_1206_1% 2.2UH_PCMB063T-2R2MS_8A_20% IADP SRP HIDRV @ PC327 SCL PC324 0.1U_0402_25V6 2 SRP SRN PC321 10U_0805_25V6K PC319 @ @ PSYS_MON ADPI_CHGR PR333 499_0402_1% IDCHG_CHGR PR331 2PMON_CHGR 0_0603_5% SDA PC320 10U_0805_25V6K 2.2U_0603_6.3V7K 2 2DH_CHGR_R PC318 BTST PR314 @EMI@ PR319 4.7_1206_5% EC_SMB_CK1_CHGR 12 25 BST_CHGR PC317 0.047U_0603_25V7M 2BST_CHGR_R 1SNUB_CHGR EC_SMB_DA1_CHGR 11 ACPRN_CHGR ADP_I 0_0402_5% PR316 @ PR315 @ @EMI@ PC323 680P_0603_50V7K EC_SMB_CK1 ACDET 24 PQ305 MDV1528URH_PDFN33-8-5 PQ306 MDV1527URH_POWERDFN33-8-5 EC_SMB_DA1 @ REGN 0_0402_5% CMSRC VCC 28 CMSRC_CHGR PC315 2200P_0402_25V7K PR313 66.5K_0402_1% VCC_CHGR 2.2U_0603_16V6K ACN PU301 PC316 ACDET @ PR317 2015/7/27 PC316 change to SE000006S80 ACDRV_CHGR +19VB @ PC313 1000P_0402_50V7K ACP PD301 S SCH DIO BAS40CW SOT-323 PR312 10_1206_5% VCC_CHGR_R 2 PC314 1U_0603_25V6K +19V_VIN ACDRV PR311 422K_0402_1% +19V_VIN PC326 0.1U_0402_25V6 PC325 0.1U_0402_25V6 BQ24780RUYR_W QFN28_4X4 +6V_CHG_REGN AC_IN ACPRN_CHGR PR325 10K_0402_1% PR326 10K_0402_1% PR327 12K_0402_1% 4 Compal Secret Data Security Classification 2017/02/22 Issued Date Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom B C D R ev 0.1 LA-F241P Date: A Compal Electronics, Inc BQ24780 Friday, June 09, 2017 Sheet E 43 of 54 B C D PR402 499K_0402_1% EN1 and EN2 dont't floating PU401 SY8286BRAC_QFN20_3X3 3.3V LDO 150mA~300mA 2 @ 5V_EN 0_0402_5% PC402 PR403 1000P_0402_25V8J 1K_0402_5% 3V_FB 3V_FB_C +3VALWP_EN PC410 22U_0603_6.3V6M PC409 22U_0603_6.3V6M 21 PC411 4.7U_0603_6.3V6M +3VLP 16 +3VALWP PC408 22U_0603_6.3V6M NC 15 FF 14 12 11 GND 17 @EMI@ PR405 4.7_1206_5% NC 3V_SN NC 18 LDO @ PR414 SH000016800 @EMI@ PC412 680P_0603_50V7K GND PG 19 SPOK 3V_EN Common part PL402 1.5UH_PCMB053T-1R5MS_6A_20% LX_3V 20 GND OUT LX ENLDO_3V5V BS IN GND EN2 10 LX PR406 100K_0402_5% 2BST_3V_R 0_0603_5% LX 13 IN IN IN LX_3V6 +19VB PC401 0.1U_0603_25V7K PR401 5*5*3 +3VALWP Check pull up resistor of SPOK at HW side @ BST_3V EN1 EMI@ PC404 2200P_0402_50V7K @EMI@ PC403 0.1U_0402_25V6 +19VB +19VB_3V @ PJ403 JUMP_43X79 2 PC405 10U_0805_25V6K 1 E PR404 150K_0402_1% ENLDO_3V5V PC407 22U_0603_6.3V6M A Vout is 3.234V~3.366V Ipeak=7A Imax=4.9A Iocp=10A PR415 0_0402_5% +19VB +19VB_5V @ PJ404 JUMP_43X79 2 @ +19VB_5V PR408 BST_5V1 PC418 0.1U_0603_25V7K BST_5V_R SH000016800 PL404 1.5UH_9A_20%_7X7X3_M VL PC427 4.7U_0603_6.3V6M 5V LDO 150mA~300mA PR416 0_0402_5% 2 PC425 22U_0603_6.3V6M @ PC424 22U_0603_6.3V6M PC423 22U_0603_6.3V6M PC422 22U_0603_6.3V6M 21 PC421 22U_0603_6.3V6M 2 16 +5VALWP 4.7U_0603_6.3V6M PC420 22U_0603_6.3V6M 17 PC419 VCC_5V 1 18 @EMI@ PR409 4.7_1206_5% LX_5V 19 5V_SN LDO 15 14 FF GND 20 @EMI@ PC426 680P_0603_50V7K BS NC 5V_EN IN VCC NC OUT PG OUT_5V ENLDO_3V5V GND EN1 LX GND @ PR413 0_0402_5% SPOK IN LX 13 10 Common part SY8288CRAC_QFN20_3X3 GND 11 5*5*3 LX 12 IN IN EN2 0.1U_0402_25V6 LX_5V PG_5V @EMI@ PC417 @ EMI@ PC416 2200P_0402_50V7K PC415 10U_0805_25V6K PC414 10U_0805_25V6K 0_0603_5% PU402 @ Vout is 4.998V~5.202V Ipeak=7A Imax=4.9A Iocp=10A PC413 PR407 1000P_0402_25V8J 1K_0402_5% 5V_FB 5V_FB_C1 @ PJ401 EC_ON @ MAINPWON PR411 0_0402_5% 2 +3VALW 1 2 +5VALW JUMP_43X118 PC428 4.7U_0402_6.3V6M 1 PR412 1M_0402_1% 5V_EN Compal Secret Data Security Classification 2017/02/22 Issued Date 2018/02/22 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title B C D Compal Electronics, Inc PWR-3.3VALWP/5VALWP Size Document Number Custom R ev 0.1 LA-F241P Date: A @ PJ402 +5VALWP 1 JUMP_43X118 +3VALWP PR410 2.2K_0402_5% Friday, June 09, 2017 Sheet E 44 of 54 A B C D E Module model information RT8207M_V1.mdd RT8207M_V2.mdd For Single layer For Dual layer 1 Pin19 need pull separate from +1.2VP If you have +1.2V and +0.6V sequence question, you can change from +1.2VP to +1.2VS +19VB_1.2VP PC508 10U_0603_6.3V6M 20 VTT FB FB_1.2VP @ PR501 0_0402_5% +1.2VP Vout=0.75V* (1+Rup/Rdown) =0.75*(1+(6.19/10)) =1.2V PR508 10K_0402_1% 2 @ PC501 0.1U_0402_10V7K 0.033U_0402_16V7K PR506 6.19K_0402_1% SYSON PC516 S3 +1.2VP PC507 10U_0603_6.3V6M 18 VLDOIN BOOT S5 TON 887K_0402_1% VTTREF_1.2VP VDDQ +5VALW PR507 +19VB_1.2VP 19 17 16 UGATE PHASE VDD EN_0.6VSP change PQ502 form 7506 to 7716, 20150108 VTTREF PGOOD PQ502 SI7716ADN-T1-GE3_POWERPAK8-5 GND RT8207MZQW_WQFN20_3X3 VDDP 11 VTTSNS CS EN_1.2VP VDD_1.2VP PC517 1U_0402_10V6K +5VALW 21 PAD VTTGND PGND 10 1SNB_1.2VP @EMI@ PC518 680P_0402_50V7K PR505 5.1_0603_5% 2 PC510 330U_2.5V_M 14 PR503 17.8K_0402_1% CS_1.2VP 13 PC509 1U_0402_10V6K 2VDDP_1.2VP 12 + LGATE PQ503 MDV1528URH_PDFN33-8-5 LX_1.2VP 15 PR511 2.2_0402_1% 1 LG_1.2VP @EMI@ PR504 4.7_1206_5% +0.6VSP PC506 0.1U_0603_25V7K PU501 Change PR503 to 17.8K ohm OCP setting 9.6A PL502 1.5UH_PCMC063T-1R5MN_9A_20% +1.2VP LX_1.2VP +1.2VP BST_1.2VP UG_1.2VP Choke 1.5uH SH000016700 Common Part 7*7*3 Update Pc510 change to Common Part SF000006S00 20141227 PR502 2.2_0603_5% BST_1.2VP_R PC505 10U_0805_25V6K PC504 10U_0805_25V6K EMI@ PC503 2200P_0402_50V7K @EMI@ PC502 0.1U_0402_25V6 +19VB_1.2VP TON_1.2VP @ PJ506 JUMP_43X79 2 +19VB 0.6Volt +/- 5% TDC 0.7A Peak Current 1A @ PR509 0_0402_5% SUSP# @ 15mohm(Max) SNUB_2.5VP 5/29 add PC526 In order to avoid capacitor decay +2.5VP PR515 36.5K_0402_1% FB_2.5VP Rup SY8003ADFC DFN 8P SA00007QP00 SH00000YG00 3.8x3.8xH1.8 DCR: 20~25mohm Idc / Isat: 3.8A NC PL503 1UH_PH041H-1R0MS_3.8A_20% LX_2.5VP PC522 68P_0402_50V8J LX PGND SYSON PR513 1M_0402_5% Iocp : 3.7A FSW : 1MHz Rdown @ PJ504 IN EN @EMI@ PR514 4.7_0603_5% PGND SGND PG @EMI@ PC525 680P_0402_50V7K PC521 22U_0805_6.3VAM FB 0_0402_5% PC524 22U_0603_6.3V6M VIN_2.5VP +0.6VS_VTT PR512 PC523 22U_0603_6.3V6M PC526 22U_0805_6.3VAM +3VALW +1.2V_VDDQ @ PJ502 JUMP_43X39 2 PU502 @ PJ503 JUMP_43X79 2 @ EN_2.5VP Switching Frequency: 285kHz Ipeak=8A Iocp~9.6A OVP: 110%~120% VFB=0.75V, Vout=1.2V MOSFET footprint: SIS412DN +1.2VP +0.6VSP L/S Rds(on): 13.5mohm(Typ), 16.5mohm(Max) Idsm: 12A@Ta=25C, 9.5A@Ta=70C Choke: 7x7x3 Rdc=14mohm(Typ), Note: S3 - sleep ; S5 - power off @ PC519 0.1U_0402_10V7K VTTREF_1.35V off on on +1.2V_VDDQ @ PJ505 JUMP_43X118 2 0_0402_5% +0.675VSP off off on @ PJ501 JUMP_43X118 2 +2.5VP PR516 11.5K_0402_1% 1 2 +2.5V JUMP_43X79 Level L L H SM_PG_CTRL PC520 0.1U_0402_16V7K Mode S5 S3 S0 MOSFET: 3x3 DFN H/S Rds(on): 23.2mohm(Typ), 27.8mohm(Max) Idsm: 10.1A@Ta=25C, 8.1A@Ta=70C +1.2VP PR510 Vout=0.6V* (1+Rup/Rdown) 2.504V= 0.6V*(1+36.5K/11.5K) 4 Compal Secret Data Security Classification Issued Date 2017/02/22 Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +1.2VP/+0.6VSP/+2.5VP B C D Re v 0.1 LA-F241P Date: A Compal Electronics, Inc Size Document Number Custom Friday, June 09, 2017 Sheet E 45 of 54 A B C D E EN pin don't floating +19VB 1VALW @EMI@ PR605 4.7_1206_5% @ PR609 0_0402_5% EN_1VALW 11 ILMT_1VALW 13 15 +3VALW NC ILMT NC BYP NC PAD 10 12 FB = 0.6V PC613 2.2U_0402_6.3V6M 16 Pin BYP is for CS Common NB can delete @ PR602 0_0402_5% PC615 330U_2.5V_M 1 Vout=0.6V* (1+Rup/Rdown) =0.6*(1+(14/20)) Vout=1.02V 2% Ipeak=9.8A Imax=6.86A Iocp=12A @ +3VALW @ PC601 0.22U_0402_10V6K 2 PR601 1M_0402_1% 1 EN_1VALW PR603 10K_0402_1% +1.8VALW_PG + +3VALW and PC15 @ PR610 20K_0402_1% Rdown 21 SY8288RAC_QFN20_3X3 Rup LDO_3V_1VALW FB_1VALW 17 PC614 1U_0402_6.3V6K The current limit is set to 8A ,12A ,16A, when this pin is pull low, floating or pull high 14 +1.0VALW_PRIM +1.0VALWP 20 PC612 22U_0603_6.3V6M VCC EN 19 PC611 22U_0603_6.3V6M GND +1.0VALWP PL602 1UH_11A_20%_7X7X3_M PC610 22U_0603_6.3V6M FB (Common Part) SH00000YE00 LX GND LX_1VALW PC603 0.1U_0603_25V7K BST_1VALW_R1 PC609 22U_0603_6.3V6M GND PR606 10_0603_5% LX BST_1VALW LX IN @ 18 IN PC608 330P_0402_50V7K BS PR608 14K_0402_1% PG IN IN @ PJ601 JUMP_43X118 2 ILMT_1VALW @ PR607 0_0402_5% 1 LDO_3V_1VALW PU601 +19VB_1VALW PC606 10U_0805_25V6K 2 @EMI@ PC605 0.1U_0402_25V6 1 JUMP_43X79 EMI@ PC604 2200P_0402_50V7K 1 @ PJ602 +19VB @EMI@ PC602 680P_0603_50V7K SNB_1VALW 1 3 4 Compal Secret Data Security Classification Issued Date 2017/02/22 Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size C Date: A B C D Compal Electronics, Inc +1.0VALWP Document Number Rev 0.1 LA-F241P Friday, June 09, 2017 Sheet E 46 of 54 A B C D E 1 Module model information SY8032_V2.mdd @ PJ702 JUMP_43X79 2 +1.8VALWP +1.8VALW_PRIM VIN_1.8VALW PC702 22U_0603_6.3V6M FB=0.6V 2 @ PC701 0.1U_0402_16V7K Note: When design Vin=5V, please stuff snubber to prevent Vin damage PC705 22U_0603_6.3V6M PC704 22U_0603_6.3V6M PC703 68P_0402_50V8J PR704 20K_0402_1% Rup +1.8VALWP: Imax=0.19A IOCP=3.9A Ipeak=0.27A FB_1.8VALW EN_1.8VALW PR701 1M_0402_1% +1.8VALWP PR707 10K_0402_1% 1 PR709 @ 0_0402_5% LX_1.8VALW +3VALW PR708 @ 0_0402_5% EN EN_1.8VALW PR705 0_0402_5% FB LX GND 3V_EN PG SPOK IN PR702 100K_0402_1% +3VALW VIN_1.8VALW +1.8VALW_PG PL701 1UH_2.8A_30%_4X4X2_F @EMI@ PR703 4.7_0603_5% @ PJ701 JUMP_43X79 2 PU701 SY8032ABC_SOT23-6 SNB_1.8VALW +3VALW @EMI@ PC706 680P_0402_50V7K Rdown Vout=0.6V* Vout=0.6V* (1+Rup/Rdown) (1+(20/10))=1.8V 3 4 Compal Secret Data Security Classification Issued Date 2017/02/22 Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size C Date: A B C D Compal Electronics, Inc SY8032 Document Number Rev 0.1 LA-F241P Friday, June 09, 2017 Sheet E 47 of 54 A B PR803 +VCC_SA C PC803 1000P_0402_50V7K 100_0402_1% D PC802 8200P_0402_25V7K COMP_1b RDRPSP E PR802 1.5K_0402_1% 1 PR808 change 19.6K in all platform @ PR804 0_0402_5% 2VSPP_1b PR805 1.69K_0402_1% 2VSP_1b VCCSA_SENSE PR819=57.6K iin all platform PC804 15P_0402_50V8J PC805 1000P_0402_50V7K 1 PR867 3.09K_0402_1% VCCGT_SENSE PR858 19.1K_0402_1% 1 PR857 97.6K_0402_1% KB_U22@ PR856 51.1K_0402_1% 1 1 PC834 0.022U_0402_25V7K PC820 8200P_0402_25V7K PC837 2200P_0402_50V7K 2 CSN_GT1 PC826 1000P_0402_50V7K place close to GTchock PR851 100_0402_1% +VCC_GT PR852 PH805 100K_0402_1%_NCP15WF104F03RC 0_0402_5% place close to GT high side PR857=97.6K in all platform VBOOT PR858=19.1K in all platform KB_U42@ PR856 100K_0402_1% PWM2_2ph_IA PWM1_2ph_IA Issued Date Compal Secret Data Security Classification 2017/02/22 Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size C Date: B PR876 10_0402_1% OCP for GT PR855 61.9K_0402_1% FSW FOR SA PWM_1a_GT SK_U22@ PR856 45.3K_0402_1% A PH804 100K_0402_1%_NCP15WF104F03RC PR848 2.49K_0402_1% PR847 0_0402_5% @ PC825 1500P_0402_50V7K 2 @ VSSGT_SENSE SWN_GT1 PR835 12K_0402_1% 2 PC815 0.1U_0402_16V7K 100_0402_1% 110_0402_1% PR866 PR826 45.3_0402_1% PR828 110_0402_1% PC829 15P_0402_50V8J PR836 69.8K_0402_1% 1 3.09K_0402_1% 2 PR840 100_0402_1% 2 PC831 1U_0603_10V6K PC830 1000P_0402_50V7K 1 PR870 2_0402_1% SOC_SVID_DAT 0_0402_5% PC828 1000P_0402_50V7K PR846 @ PR865 PR829 7.5K_0603_1% PR842 36.5K_0402_1% VSN_1a VSP_1a +5VALW ILIM_1a COMP_1a PC824 3300P_0402_50V7-K 2 VR_HOT# PC819 470P_0402_50V7K SOC_SVID_ALERT#_R 100_0402_1% PC832 1000P_0402_50V7K +5VS PR824 PR843 499_0402_1% @ PR850 2_0402_1% SOC_SVID_CLK PR862 PR869 PR836=69.8K in all platform @ 110_0402_1%2 IOUT_1a CSP_1a close to the longer distance phase(81208 or 81210) Alert,Data,Clk @ 1@ 0_0402_5% SCLK ALERT# SDIO +1.0V_VCCST 48 47 46 45 44 43 42 41 40 39 38 37 49 TAB VSN_2ph VSP_2ph PSYS VSP_1b VSN_1b COMP_1b ILIM_1b CSN_1b CSP_1b IOUT_1b VR_RDY EN VCC ROSC_COREGT RSOC_SAUS PWM1_2ph PWM2_2ph ICCMAX_2ph ICCMAX_1a ICCMAX_1b ADDR_VBOOT PWM_1a TSENSE_1ph VSP_1a PC801 0.01U_0402_50V7K PWM_1b DRVON SCLK ALERT# SDIO VR_HOT# IOUT_1a CSP_1a CSN_1a ILIM_1a COMP_1a VSN_1a PR821 10K_0402_1% SW_1b PR834 49.9_0402_1% PR860 36 35 34 33 32 31 30 29 28 27 26 25 +3VS PR818 7.5K_0603_1% NCP81218MNTXG_QFN48_6X6 13 14 15 16 17 18 19 20 21 22 23 24 PC813 470P_0402_50V7K 2 KB_U22@ PR822 26.1K_0402_1% 1 2 1 IOUT_2ph DIFFOUT_2ph FB_2ph COMP_2ph ILIM_2ph CSCOMP_2ph CSSUM_2ph CSREF_2ph CSP2_2ph CSP1_2ph TSENSE_2ph VRMP PR854 24K_0402_1% U22@ PR868 0_0402_5% place close to IA MOS +5VS 度 PR801 +19VB_CPU 1K_0402_1% PC827 1000P_0402_50V7K PU801 FSW FOR GT AND IA U42@ PR871 2.15K_0402_1% 1 SW_2a PR864 0_0402_5% VR_ON DRVON IOUT_2ph 10 11 12 place close to SA chock PR816 12K_0402_1% PWM_1b_SA PR853 33.2K_0402_1% 100 PC816 2200P_0402_50V7K CSN_1b PH802 100K_0402_1%_NCP15WF104F03RC VR_PWRGD PR863 @ 0_0402_5% SK_U22@ PR822 28.7K_0402_1% 2 PR845 2.15K_0402_1% SW_1a U22@ PR833 9.76K_0402_1%1 @ @ PH801 100K_0402_1%_NCP15WF104F03RC U42@ PR872 10_0402_1% 2 U42@ PC835 0.1U_0402_16V7K 1 CSN_2a PR873 10_0402_1% PC822 0.1U_0402_16V7K CSN_1a PC821 0.22U_0402_16V7K 2 PC817 1000P_0402_50V7K U42@ PR833 16.9K_0402_1% PR831 75K_0402_1% PR819 57.6K_0402_1% PC811 470P_0402_50V7K 2 KB_U42@ PC810 PR822 3300P_0402_50V7-K 23.2K_0402_1% 1 PC814 15P_0402_50V8J 2 1 SW_2a U42@ PR825 97.6K_0603_1% PR830 165K_0402_1% PC818 1000P_0402_50V7K PR874 97.6K_0603_1% PC812 470P_0402_50V7K SW_1a close to IA chock PR844 61.9K_0402_1% PH803 place THERM_ 220K 5% 0402 2 PR823 4.75K_0402_1% PR820 604_0402_1% PR815 PR817 100_0402_1% 49.9_0402_1% Iout_1b PC808 PR814 806_0402_1% 1000P_0402_50V7K VSNN_2ph VSN_2ph VSSSENSE 1 VSP_2ph @ PR813 0_0402_5% 2 2 ILIM_1b PC809 0.01U_0402_25V7K PR812 @ 0_0402_5% VCCSENSE PR875 10_0402_1% PR859 35.7K_0402_1% PR811 20K_0402_1% 2 +VCC_CORE PSYS_MON 100_0402_1% PC807 2200P_0402_50V7K PC806 1000P_0402_50V7K 1 PR810 PC836 2200P_0402_50V7K 2 100_0402_1% 1 PR809 PR807 1K_0402_1% VSNN_1b PC833 1200P_0402_50V7K VSSSA_SENSE PR808 19.6K_0402_1% PR806 @ 0_0402_5% C D Compal Electronics, Inc IMVP8, NCP81206 Document Number Rev 0.1 LA-F241P Friday, June 09, 2017 Sheet E 48 of 54 A B C D E change PL9002, PL9003 SM01000C000 to comm part SM01000P200 +19VB @ PJ901 JUMP_43X79 2 SW_1a Ipeak=32A Iocp=70A Ipeak=31A Iocp=39A PWM_1a_GT Iocp=9.5A DRVON PWM SW EN VCC GND DRVL S2 S2 HG1_GT SW1_GT PR915 0_0603_5% @ + U42@ PC902 10U_0603_25V6M @U42_EMI@ PC904 0.1U_0402_25V6 0.22UH_24A_20%_ 7X7X4_M CSN_2a SW_2a InputCapacitor: 10uF_0805_X5R_25V PL906 0.22UH_24A_20%_ 7X7X4_M 3 1 @EMI@ PR909 4.7_1206_5% 2 +VCC_GT CSN_GT1 SWN_GT1 2017/06/02 PL906 change common part SH000011H00 7*7*6 @EMI@ PC933 680P_0603_50V7K PQ904 AON6314_N_DFN56-8-5 LG1_GT +VCC_GT PC932 4.7U_0402_6.3V6M DCR=0.98m ohm +-5% Common part SH000011H00 EMI@ PC937 2200P_0402_50V7K @EMI@ PC936 0.1U_0402_25V6 PR910 PC938 2.2_0603_5% 0.22U_0603_16V7K 2 DCR=0.98m ohm +-5% Common part SH000011H00 +19VB_CPU PC935 10U_0603_25V6M PC934 10U_0603_25V6M InputCapacitor: 10uF_0805_X5R_25V U42_EMI@ PC907 2200P_0402_50V7K U42@ PC909 10U_0603_25V6M 2 D1 1 +5VS DRVH Ipeak=5A BST PAD VCCSA: Imax=4A PU903 NCP81253MNTBG_DFN8_2X2 PQ902 AON6380_DFN5X6-8-5 Ipeak=64A VCCGT: Imax=18A PL903 +19VB_CPU Iocp=40A U42 VCC: Imax=42A G1 PR907 PC922 2.2_0603_5% 0.22U_0603_16V7K 2 U22 VCC: Imax=21A S2 NCP81151MNTBG_DFN8_2X2 DCR=0.98m ohm +-5% Common part SH000011H00 2017/06/02 PL904 change common part SH000011H00 7*7*5 LG_VCORE_IA PC927 10U_0603_25V6M DRVL G2 PQ903 AON6992_DFN5X6D-8-7 PC901 33U_25V_NC_6.3X4.5 @EMI@ PC914 0.1U_0402_25V6 CSN_1a SW GND +VCC_CORE PC926 10U_0603_25V6M VCC (Common Part) U42@ SH000011H00 7*7*4 EMI@ PC925 2200P_0402_50V7K EN SW_VCORE_IA D2/S1 @U42_EMI@ PC921 @U42_EMI@ PR906 680P_0603_50V7K 4.7_1206_5% 2 +5VS DRVH HG_VCORE_IA LG_VCORE EMI@ PC913 2200P_0402_50V7K 2 PC918 4.7U_0402_6.3V6M PL904 0.22UH_24A_20%_ 7X7X4_M PWM PC908 10U_0603_25V6M S2 S2 G2 6 1 GND DRVL SW_VCORE DRVON FLAG VCC HG_VCORE PWM2_2ph_IA +VCC_CORE BST @EMI@ PC924 0.1U_0402_25V6 SW U42@ PU902 DRVH EN + (Common Part) SH000011H00 7*7*4 0_0603_5% +5VS PWM U42@ PR902 U42@ PC906 2.2_0603_5% 0.22U_0603_16V7K 2 PR904 U42@ PC919 4.7U_0402_6.3V6M DRVON @EMI@ PR905 4.7_1206_5% PWM1_2ph_IA FLAG @EMI@ PC920 680P_0603_50V7K BST S2 D2/S1 PU901 NCP81151MNTBG_DFN8_2X2 PC910 10U_0603_25V6M D1 G1 PC905 0.22U_0603_16V7K 2 PQ901 AON6992_DFN5X6D-8-7 PR903 2.2_0603_5% InputCapacitor: 10uF_0805_X5R_25V 0_0603_5% @ InputCapacitor: 10uF_0805_X5R_25V PC903 33U_25V_NC_6.3X4.5 PR901 1 +19VB_CPU +19VB_CPU HG_SA SW_SA G2 2 PC939 4.7U_0402_6.3V6M SW_SA LG_SA +VCC_SA PL907 @EMI@ PR911 4.7_1206_5% D2/S1 ohm DCR=6.2m ohm +-5% Common part SH00001ED00 4 0.47UH_NA 12.2A_20% CSN_1b @EMI@ PC940 680P_0603_50V7K G1 D1 D1 D1 D1 PQ907 AON7934_DFN3X3A8-10 DRVL 10 S2 GND VCC 7 EN S2 SW S2 +5VS DRVH PWM DRVON BST PWM_1b_SA PAD AON7934 Rds(on)=12.4~15.8m PU904 NCP81253MNTBG_DFN8_2X2 SW_1b Compal Secret Data Security Classification Issued Date 2017/02/22 Deciphered Date 2018/02/22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size C Date: A B C D Compal Electronics, Inc Power Train Document Number Rev 0.1 LA-F241P Friday, June 09, 2017 Sheet E 49 of 54 +VCC_GT_VCORE PC9158 1U_0201_4V6M SOLDER_PREFORMS_0402 PC9157 1U_0201_4V6M 2 PC9153 1U_0201_4V6M PC9152 1U_0201_4V6M PC9151 1U_0201_4V6M PC9150 1U_0201_4V6M PC9149 1U_0201_4V6M PC9148 1U_0201_4V6M PC9147 1U_0201_4V6M PC9146 1U_0201_4V6M PC9145 1U_0201_4V6M PC9144 1U_0201_4V6M PC9143 1U_0201_4V6M PC9142 1U_0201_4V6M PC9141 1U_0201_4V6M 2 2 2 2 2 PC9129 0.47U_0201_4V6M PC9128 1U_0201_4V6M PC9127 0.47U_0201_4V6M PC9126 0.47U_0201_4V6M PC9125 1U_0201_4V6M PC9124 1U_0201_4V6M PC9123 1U_0201_4V6M PC9122 1U_0201_4V6M PC9121 1U_0201_4V6M PC9120 0.47U_0201_4V6M PC9139 1U_0201_4V6M PC9138 1U_0201_4V6M PC9137 1U_0201_4V6M PC9136 1U_0201_4V6M PC9135 1U_0201_4V6M PC9134 1U_0201_4V6M PC9133 1U_0201_4V6M PC9132 1U_0201_4V6M PC9131 1U_0201_4V6M PC9140 1U_0201_4V6M PC9130 1U_0201_4V6M 1 PC9119 1U_0201_4V6M PC9118 1U_0201_4V6M PC9117 1U_0201_4V6M PC9116 1U_0201_4V6M PC9115 1U_0201_4V6M PC9114 1U_0201_4V6M PC9113 1U_0201_4V6M PC9112 1U_0201_4V6M PC9111 1U_0201_4V6M PC9110 1U_0201_4V6M 2 PC9109 22U_0603_6.3V6M PC9108 22U_0603_6.3V6M PC9107 22U_0603_6.3V6M PC9106 22U_0603_6.3V6M SGA20221D40 PC9105 220U_D2 SX_2VY_R9M 2 1 U42@ PC9102 220U_D2 SX_2VY_R9M U42@ PC9101 220U_D2 SX_2VY_R9M U42@ PC9100 220U_D2 SX_2VY_R9M 2 2 2 2 2 2 2 2 2 1 1 1 1 1 2 2 1 1 1 1 1 PC9079 1U_0201_4V6M PC9078 1U_0201_4V6M PC9077 1U_0201_4V6M PC9076 1U_0201_4V6M PC9075 1U_0201_4V6M PC9074 1U_0201_4V6M PC9073 1U_0201_4V6M PC9095 22U_0603_6.3V6M PC9094 22U_0603_6.3V6M PC9093 22U_0603_6.3V6M PC9092 22U_0603_6.3V6M PC9091 22U_0603_6.3V6M PC9090 22U_0603_6.3V6M PC9104 22U_0603_6.3V6M PC9103 22U_0603_6.3V6M 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 PC9052 22U_0603_6.3V6M PC9051 22U_0603_6.3V6M PC9050 22U_0603_6.3V6M PC9049 22U_0603_6.3V6M PC9048 22U_0603_6.3V6M PC9047 22U_0603_6.3V6M PC9072 22U_0603_6.3V6M PC9071 22U_0603_6.3V6M PC9070 22U_0603_6.3V6M PC9069 22U_0603_6.3V6M PC9063 22U_0603_6.3V6M PC9062 22U_0603_6.3V6M PC9089 22U_0603_6.3V6M PC9088 22U_0603_6.3V6M PC9087 22U_0603_6.3V6M PC9086 22U_0603_6.3V6M PC9099 22U_0603_6.3V6M PC9098 22U_0603_6.3V6M PC9080 22U_0603_6.3V6M PC9097 22U_0603_6.3V6M U42@ PC9084 22U_0603_6.3V6M U42@ PC9083 22U_0603_6.3V6M U42@ PC9082 22U_0603_6.3V6M U42@ PC9081 22U_0603_6.3V6M 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 PC9159 22U_0603_6.3V6M PC9022 22U_0603_6.3V6M PC9021 22U_0603_6.3V6M PC9046 22U_0603_6.3V6M PC9045 22U_0603_6.3V6M PC9044 22U_0603_6.3V6M PC9043 22U_0603_6.3V6M PC9042 22U_0603_6.3V6M PC9041 22U_0603_6.3V6M PC9061 22U_0603_6.3V6M PC9060 22U_0603_6.3V6M PC9059 22U_0603_6.3V6M PC9058 22U_0603_6.3V6M PC9068 22U_0603_6.3V6M PC9067 22U_0603_6.3V6M PC9066 22U_0603_6.3V6M PC9065 22U_0603_6.3V6M PC9064 22U_0603_6.3V6M PC9057 22U_0603_6.3V6M PC9056 22U_0603_6.3V6M PC9055 22U_0603_6.3V6M PC9054 22U_0603_6.3V6M PC9053 22U_0603_6.3V6M 54 of 50 Sheet Friday, June 09, 2017 Date: Rev 0.1 Document Number LA-F241P Size C Power Train THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC E D 2018/02/22 Title Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2017/02/22 Issued Date PC9020 22U_0603_6.3V6M PC9019 22U_0603_6.3V6M PC9018 22U_0603_6.3V6M PC9017 22U_0603_6.3V6M PC9016 22U_0603_6.3V6M PC9015 22U_0603_6.3V6M PC9040 22U_0603_6.3V6M PC9039 22U_0603_6.3V6M PC9038 22U_0603_6.3V6M PC9037 22U_0603_6.3V6M PC9036 22U_0603_6.3V6M PC9035 22U_0603_6.3V6M PC9034 22U_0603_6.3V6M PC9033 22U_0603_6.3V6M PC9032 22U_0603_6.3V6M PC9031 22U_0603_6.3V6M PC9030 22U_0603_6.3V6M PC9029 22U_0603_6.3V6M PC9028 22U_0603_6.3V6M PC9027 22U_0603_6.3V6M U42@ PC9096 22U_0603_6.3V6M U42@ PC9085 22U_0603_6.3V6M +VCC_GTX_VCORE @ @ @ PC9014 22U_0603_6.3V6M PC9013 22U_0603_6.3V6M PC9012 22U_0603_6.3V6M PC9011 22U_0603_6.3V6M PC9001 22U_0603_6.3V6M PC9010 22U_0603_6.3V6M PC9009 22U_0603_6.3V6M PC9008 22U_0603_6.3V6M PC9007 22U_0603_6.3V6M PC9006 22U_0603_6.3V6M PC9005 22U_0603_6.3V6M PC9004 22U_0603_6.3V6M PC9003 22U_0603_6.3V6M PC9002 22U_0603_6.3V6M PC9156 1U_0201_4V6M 2 PC9155 1U_0201_4V6M 2 U42@ PR9001 1 2 1 @ @ @ @ PC9154 1U_0201_4V6M +VCC_CORE C B A SOLDER_PREFORMS_0402 2016/10/26 VCORE Output Capacitor: U22 22uF_0603*33 1uF_0201*35 UNPOP 22_0603*9 220uF *3 2016/10/26 VCORE Output Capacitor: U42 22uF_0603*39 1uF_0201*35 220uF *3 UNPOP 22_0603*3 U22@ PR9003 +VCC_GT U42@ PR9002 +VCC_CORE + 2 @ @ @ @ @ @ 220uF*1 22uF*36 1uF*9 0.47uF*4 unpop: 22uF *8 1uF*1 + + + @ SA pop: 22uF_0603*9 1uF_0201*7 unpop: 22uF_0603*3 1 +VCC_GTX_VCORE @ @ @ @ @ @ @ @ @ @ +VCC_SA +VCC_GT 1 +VCC_SA +VCC_GT +VCC_CORE E D C B A +VCC_GT_VCORE SOLDER_PREFORMS_0402 Version change list (P.I.R List) Item Fixed Issue Page of for PWR Reason for change Rev Modify List PG# Date Phase 9/21 PVT 9/30 PVT 1/4 Pre-MP 1/4 Pre-MP 01 D 02 Design Change 03 ON FAE suggest to modify Parts for Kaby lake CPU setting 0.2 PC818 change PC834 Change PC820 Change PR857 Change PR836 Change 55 to 33 pF to 8200pF to 0.033 uF to 73.2K ohm to 61.9K ohm D 04 05 06 For material issue, Changer main source part Design Change For material issue, Changer main source part 1.0 10 11 12 Design Change For PD power function, add ohm 1.0 to SH00000PK00 (0.47uH) 48 PD101, PD102 change 52 PQ502 change 50, 52 56, 60 56, 60 50 50 09 C PL9006 change 0.2 07 08 PC9004,PC9079 change to SF000007700 (33 uF) 56 Design Change to SCS00005X00 to SB000010A00 PQ305, PQ503 change to SB00000H800 PQ1201,PQ1203,PQ9002,PQ9005 change to SB00000JZ00 PQ1202,PQ1204,PQ9003,PQ9007 change to SB000017Q00 PQ303 change to SB000017B00 PQ306 change to SB00000H700 Add PR416 (0 ohm) 51 C 13 14 B B 14 A A Compal Secret Data Security Classification Issued Date 2017/02/22 2018/02/22 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title PIR Size Document Number Custom R ev 0.1 LA-F241P Date: Compal Electronics, Inc Friday, June 09, 2017 Sheet 51 of 54 A B C D E 1K +3VS 1K Skylake SOC BH10 SOC_SMBCLK BG12 SOC_SMBDATA SO-DIMM SO-DIMM SOC_SML0CLK 499 SOC_SML0DATA 499 XDP +3VS 1K +3VS 1K SOC_SML1CLK SOC_SML0DATA 2 2.2K 2.2K 77 EC_SMB_CK1 78 EC_SMB_DA1 SCL1 SDA1 +3VLP_EC 100 ohm 100 ohm ohm ohm KBC SCL2 79 SOC_SML1CLK SDA2 80 SOC_SML0DATA EC_SMB_CK1_CHGR EC_SMB_DA1_CHGR BATTERY CONN 12 11 Charger KB9022 1.8K 1.8K +3VSDGPU_AON I2CS_SCL 2N7002DW I2CS_SDA VGA 4 Compal Secret Data Security Classification 2014/11/10 Issued Date Deciphered Date 2016/11/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title SMBUS_Routing_Table Size Document Number Custom B C D Rev 0.1 C4PB1/C5PB1 LA-591 Date: A Compal Electronics, Inc Friday, June 09, 2017 Sheet E 61 of 64 P6->P6 U42 EVT_R0.1 D C PVT_R1.0 4/24 ADD TS conn JTS1 Add USB PORT 10 for TS function Reserve USB PORT test point(T3821,T3822) for NFC Remove GPU circuit Support PD charger in ADD U5010 circuit for TS function Add 24M XTAL(YC3) for KBL U42 +VCC_GTX_CORE contact to CPU (UC1.M) +VCC_GT_CORE contact to CPU (UC1.M) 10 Add RC256 11 Del UC9 circuit 12 DEL RC58 (direct contact U11, U12) 13 Add TBTA_HV_GATE1/2 for PD in 14 Add TBTA_PD_SENSEP/N for PD in 15 DEL H23,H24 16 DEL RC204, RC195 17 Reserve test point T3812~3815 for GPU 18 update PARADE X76, X76525BOL05 19 Change RC38 to 121ohm 20 DEL XDP circuit 21 change RC182 to 0ohm@ 22 Add R5274 for ME906 23 ADD HYNIX 8G SA0000ARA10 on board ram 24 ADD T3849 25 ADD SATAXPCIE2 26 ADD R5276,R5275@, Q2023@ for PCIE SSD 27 Change Card reader to PCIE port4 28 ADD PCIE port 10 for PCIE_SSD 29 ADD CLK port for PCIE_SSD 30 ADD D2018,D2019,D2020,D2021,D2022,D2023 for ESD 31 ADD CC435,CC436 32 ADD RC258 5/10 Swap JSSD1 PIN41,43 net 6/3 R401 chager to 47K for RF request(ME906) Add RC 259 for CLKREQ_PCIE#0 pull up +3VS change R5196,R4960 to @ change R5205 to 100Kohm TBT@ change R659 to mount change UC2 PN to SA00005VV20 swap JSSD PCIE port 11,12 SSD_DET# connect to SATAXPCIE1 change R4903 to 12K Add C5265 for PCIE SSD power Add Adp_det change R4938 to 0ohm VCOUT1_PROCHOT connect to HPROCHOT# remove J13 for C5265 D 6/8 Add R5277 for +5VS_CRT_SW Add L4905 for +3VS_CRT_SW SW_PROCHOT# connect to H_PROCHOT# Change R4960 to mount Change R523,R4938,R5276 to short pad Change R5260 to 0ohm Add Q2024,R5279,R5278 for +1.8VALW_PRIM discharge circuit Change UU24, CU181, RU165 to @ C 6/8A remove RC151 6/9 change R5193 to 0ohm_0402 4/25 Q40,Q51,Q52,Q53,Q2006,Q2010,Q2013,Q2014,Q2016, Q2017,Q2018,Q2019,Q2020,Q2021,QL2, change PN to SB00000SA00 Change U67 PN to SA00007IOA0 NPCT650ABCWX 4/26 Change U67 to SA00007IOA0 4/27 change R5207,R5208 to TBT@ and R5266,R5267 to @ for support dead battery B B 5/4 modify yellow BOM structure to meet white item CC53,D17,D18,D19,D20,D21,D23,D24,R5196,R5204,R5207,R5208 A A Compal Secret Data Security Classification Issued Date 2016/07/29 2016/07/29 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title HW PIR Size Document Number Custom R ev 1.0 C4PB1/C5PB1 LA-E591P Date: Compal Electronics, Inc Friday, June 09, 2017 Sheet 63 of 64 DDR4 On Board RAM X76713BOL03 Hynix X76713BOL01 micron 4G D4 512M16 H5AN8G6NAFR SA0000A1H20 D 10K +-5% 0402 SD028100280 U2 X76OBHY@ RU173 X76OBHY@ D4 512M16 H5AN8G6NAFR SA0000A1H20 10K +-5% 0402 SD028100280 U3 X76OBHY@ RU169 X76OBHY@ D4 512M16 H5AN8G6NAFR D4 512M16 MT40A512M16JY SA00009V220 U2 X76OBMACRON4@ SD028100280 RU170 X76OBMACRON4@ D4 512M16 MT40A512M16JY SA00009V220 U3 X76OBMACRON4@ X76713BOL02 micron 8G 10K +-5% 0402 10K +-5% 0402 SD028100280 RU172 X76OBMACRON4@ D4 512M16 MT40A512M16JY SA0000A1H20 D4 512M16 H5AN8G6NAFR SA0000A3120 U3 X76OBMACRON8@ SA0000ARA10 10K +-5% 0402 SD028100280 SA0000ARA10 D 10K +-5% 0402 SD028100280 U3 X76OBHYNIX8@ RU172 X76OBHYNIX8@ D4 16G/2400 H5ANAG6NAMR SA0000ARA10 U4 X76OBHYNIX8@ D4 16G MT40A1G16WBU SA00009V220 D4 16G/2400 H5ANAG6NAMR SA0000A3120 U5 X76OBMACRON4@ RU173 X76OBHYNIX8@ D4 16G/2400 H5ANAG6NAMR RU170 X76OBMACRON8@ 10K +-5% 0402 SD028100280 U2 X76OBHYNIX8@ U4 X76OBMACRON8@ D4 512M16 MT40A512M16JY SA0000A1H20 D4 16G MT40A1G16WBU D4 16G/2400 H5ANAG6NAMR SD028100280 RU169 X76OBMACRON8@ SA0000A3120 U4 X76OBMACRON4@ U5 X76OBHY@ SA0000A3120 U2 X76OBMACRON8@ X76713BOL06 HYNIX 8G 10K +-5% 0402 D4 16G MT40A1G16WBU SA00009V220 U4 X76OBHY@ D4 16G MT40A1G16WBU SA0000ARA10 U5 X76OBMACRON8@ U5 X76OBHYNIX8@ VRAM C X76614BOL54 Hynix X76614BOL58 SANSUNG X76713BOL04 Hynix E-die D3 256M16 H5TC4G63CFR 30K +-1% 0402 D3 256M16 K4W4G1646E 24.9K +-1% 0402 SA00008DN10 SD034300280 SA000076PB0 SD034249280 U2004 X76VHY@ D3 256M16 H5TC4G63CFR SA00008DN10 U2005 X76VHY@ D3 256M16 H5TC4G63CFR SA00008DN10 U2006 X76VHY@ D3 256M16 H5TC4G63CFR SA00008DN10 U2007 X76VHY@ R2044 X76VHY@ U2004 X76VSAM@ R2044 X76VSAM@ D3 256M16 K4W4G1646E SA000076PB0 C S IC D3 256M16 H5TC4G63EFR-N0C SA00008DN80 10K_0402_1% SD034100280 U2004 X76VHY_E@ R2035 X76VHY_E@ S IC D3 256M16 H5TC4G63EFR-N0C SA00008DN80 U2005 X76VSAM@ U2005 X76VHY_E@ D3 256M16 K4W4G1646E SA000076PB0 S IC D3 256M16 H5TC4G63EFR-N0C SA00008DN80 U2006 X76VSAM@ U2006 X76VHY_E@ D3 256M16 K4W4G1646E SA000076PB0 S IC D3 256M16 H5TC4G63EFR-N0C SA00008DN80 U2007 X76VSAM@ U2007 X76VHY_E@ SATA Redriver X76525BOL51 TI SN75LVCP601RTJR B SA00003ZX00 U1 X76SATATI@ 4.99K +-1% 0402 SD034499180 R11 X76SATATI@ X76713BOL05 Parade PS8527CTQFN20GTR2-A2 SA00007JU10 X76525BOL52 Parade PS8527CTQFN20GTR2-A1 B SA00007JU00 U1 X76SATAPAR@ U1 X76SATAPARa@ 4.7K +-5% 0402 4.7K +-5% 0402 SD028470180 SD028470180 R18 X76SATAPAR@ R18 X76SATAPARa@ 7.5K +-5% 0402 7.5K +-5% 0402 SD028100280 SD028100280 R11 X76SATAPAR@ R11 X76SATAPARa@ A A Compal Secret Data Security Classification Issued Date 2014/11/10 2016/11/10 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title X76 Level Note Size Document Number Custom R ev 1.0 C4PB1/C5PB1 LA-E591P Date: Compal Electronics, Inc Friday, June 09, 2017 Sheet 64 of 64 ... SCS 000 05X 00 to SB 000 01 0 A 00 PQ 305 , PQ 503 change to SB 000 00H 800 PQ12 01 , PQ1 203 ,PQ 900 2,PQ 900 5 change to SB 000 00JZ 00 PQ1 202 ,PQ1 204 ,PQ 900 3,PQ 900 7 change to SB 000 01 7 Q 00 PQ 303 change to SB 000 01 7 B 00 PQ 306 ... +19 V_VIN PD 103 @ @ PR 108 1M _02 01 _ 5% 1 1 @ PR 109 0_ 0 402 _5% 2 @ PR 1 10 0_ 0 402 _5% 1 @ @ PR 107 0_ 02 01 _ 5% 0. 01 _ 1 206 _1% PC 107 0. 1U _04 02_25V6 5A _ 10 0V 15 UA _0. 88V_TO227-3 PC 106 10 00P _04 02_50V7K 2 PC 105 ... 86 88 90 92 94 96 98 10 0 10 2 10 4 10 6 10 8 11 0 11 2 11 4 11 6 11 8 12 0 12 2 12 4 12 6 12 8 13 0 13 2 13 4 13 6 13 8 14 0 14 2 14 4 14 9 15 0 15 1 15 2 15 9 16 0 16 1 16 2 16 3 16 4 SYS_IN# R547 +3V_LAN width = 10 mil LAN_ACTIVITY#_DOCK