1 A A Compal Confidential EA50_HWS M/B Schematics Document Intel Shark Bay SV (Haswell+ Lynx point) B B Nvidia N15S-GT / N15V-GM C C 2014-05-27 REV:1.0 DAX D Part Number DAZ17F00100 Description D PCB Z5WAW LA-B702P LS-B161P/B162P Compal Secret Data Security Classification Issued Date 2013/12/26 Deciphered Date 2014/12/26 Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Cover Sheet Rev Z5WAW M/B LA-B702 Tuesday, May 27, 2014 Sheet of 56 0.2 A B eDP LVDS C D LVDS-Translator RTD2132R page 30 Fan Control page 42 page 31 Nvidia N15x with DDR3 x4 page 23~29 eDP Intel Processor Haswell SV 1.35V DDR3L 1333/1600 HDMI x lanes DDI rPGA946 37.5mm x 37.5mm P.4~10 FDII x2 USB port page 36 page 33 PCIe 2.0 5GT/s port Flexible IO PCIe 2.0 5GT/s SATA3.0 port 6.0 Gb/s port Realtek 8411B SATA HDD Conn 100MHz 2.7GT/s port SATA CDROM Conn Intel PCH Lynx Point in (SD) USB/B (port 1,2) CMOS Camera USB port TP Bridge Touch screen page 38 page 38 Port HD Audio page 40 page 31 USBx8 LPC BUS CLK=24MHz ENE KB9012/9022 page 39 page 35 RTC CKT page 12 Port Touch Pad 3.3V 24MHz PS2 / I2C HDA Codec page 37 page 35 USB port 48MHz FCBGA 695Balls 20mm x 20mm RJ45 conn page 37 USB 2.0 conn x2 page 31 P.13~22 Card Reader USB 3.0 conn x1 100MHz 5GB/s page 34 204pin DDR3L-SO-DIMM X1 DMI x4 SATA3.0 6.0 Gb/s LAN(GbE)/ Card Reader page 11 BANK 4, 5, 6, VGA WLAN BANK 0, 1, 2, Dual Channel page 32 PEG MINI Card 204pin DDR3L-SO-DIMM X1 Memory BUS HDMI Conn PCIe 3.0 x4 (x8) 8GT/s E ALC283 SPI page 40 page 41 SPI ROM x2 Combo Jack Int Speaker page 17 Int MIC page 41 page 41 page 41 Sub Board page 13 Power On/Off CKT Int.KBD LSB161 PWR/B page 38 page 40 page 40 LSB162 DC/DC Interface CKT page 43 USB/B (port 1,2) page 38 Compal Electronics, Inc Compal Secret Data Security Classification Power Circuit DC/DC 2013/12/26 Issued Date Deciphered Date 2014/12/26 Title Date: A Block Diagrams THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC page 44~56 B C D Z5WAW M/B LA-B702 Tuesday, May 27, 2014 Sheet E Rev 0.2 of 56 A B C Voltage Rails STATE Power Plane D SIGNAL Description S1 S3 S5 N/A N/A N/A VIN Adapter power supply (19V) BATT+ Battery power supply (12.6V) N/A N/A N/A B+ AC or battery power rail for power circuit N/A N/A N/A +CPU_CORE Core voltage for CPU ON OFF OFF +VGA_CORE Core voltage for GPU ON OFF OFF +0.675VS +0.675VS power rail for DDR3L terminator ON OFF OFF HIGH HIGH ON ON ON ON HIGH HIGH HIGH ON ON ON LOW S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF ON OFF OFF ON OFF OFF +1.35V +1.35V power rail for DDR3L ON ON OFF +1.5VSDGPU +1.5VSDGPU power rail for GPU ON OFF OFF Vcc Ra +1.5VS +1.5V power rail for CPU ON OFF OFF Board ID +3VALW +3VALW always on power rail ON ON ON* +3VLP B+ to +3VLP power rail for suspend power ON ON ON +3VS +3VALW to +3VS power rail ON OFF OFF +3VSDGPU +3VS to +3VSDGPU power rail for GPU ON OFF OFF +5VALW +5VALWP to +5VALW power rail ON ON ON* +5VS +5VALW to +5VS power rail ON OFF OFF +RTCVCC RTC power ON ON ON 10 11 12 13 14 15 16 17 18 19 Address Smart Battery 0001 011X EC SM Bus2 address Device On Board Thermal Senser Address 0100 110x VGA Internal Thermal Senser 0100 000x Clock HIGH +1.05V power rail for CPU Device +VS LOW +1.05VSDGPU switched power rail for GPU EC SM Bus1 address +V HIGH Full ON +1.05VSDGPU Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF +VALW S1(Power On Suspend) +1.05VS SLP_S1# SLP_S3# SLP_S4# SLP_S5# E Board ID / SKU ID Table for AD channel 3.3V 100K +/- 1% Rb 12K +/- 1% 15K +/- 1% 20K +/- 1% 27K +/- 1% 33K +/- 1% 43K +/- 1% 56K +/- 1% 75K +/- 1% 100K +/- 1% 130K +/- 1% 160K +/- 1% 200K +/- 1% 240K +/- 1% 270K +/- 1% 330K +/- 1% 430K +/- 1% 560K +/- 1% 750K +/- 1% NC V AD_BID V 0.347 V 0.423 V 0.541 V 0.691 V 0.807 V 0.978 V 1.169 V 1.398 V 1.634 V 1.849 V 2.015 V 2.185 V 2.316 V 2.395 V 2.521 V 2.667 V 2.791 V 2.905 V 3.000 V V AD_BID typ V 0.354 V 0.430 V 0.550 V 0.702 V 0.819 V 0.992 V 1.185 V 1.414 V 1.650 V 1.865 V 2.031 V 2.200 V 2.329 V 2.408 V 2.533 V 2.677 V 2.800 V 2.912 V 3.300 V EC AD 0x00-0x0B 0x0C-0x1C 0x1D-0x26 0x27-0x30 0x31-0x3B 0x3C-0x46 0x47-0x54 0x55-0x64 0x65-0x76 0x77-0x87 0x88-0x96 0x97-0xA3 0xA4-0xAD 0xAE-0xB7 0xB8-0xC0 0xC1-0xC9 0xCA-0xD3 0xD4-0xDC 0xDD-0xE6 0xE7-0xFF V AD_BID max V 0.360 V 0.438 V 0.559 V 0.713 V 0.831 V 1.006 V 1.200 V 1.430 V 1.667 V 1.881 V 2.046 V 2.215 V 2.343 V 2.421 V 2.544 V 2.687 V 2.808 V 2.919 V PCH SM Bus address Device Address ChannelA DIMM0 1010 0000 JDIMM1 ChannelB DIMM1 1010 0010 JDIMM2 Board ID USB Port Table USB 2.0 Port Port EHCI1 USB 3.0 XHCI BTO Option Table BOARD ID Table External USB Port USB Port(Left 3.0) USB Port(Right 2.0) USB Port(Right 2.0) Finger Printer Touch Screen USB/I2C Bridge WLAN Webcam BTO Item BOM Structure Unpop @ Connector CONN@ EC 9022 9022@ EC 9012 9012@ UMAO@ UMA Component VGA@ GPU EDP panel EDP@ eDP to LVDS LVDS@ EMC Component EMC@ EMC Reserve XEMC@ VGM@, SGT@ DGPU_IDEN VGM-820M;SGT-840M GC6 2.0 GC6@ non GC6 NGC6@ VRAM Selection X76@ Digital MIC 1Dmic@/2Dmic@ USB/I2C BRI TPBRI@ Touch Screen TS@ PCB Revision 0.1 0.2 0.3 1.0 USB Port(Left 3.0) 2013/12/26 Issued Date 2014/12/26 Deciphered Date Notes List Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C Compal Electronics, Inc Compal Secret Data Security Classification D Z5WAW M/B LA-B702 Sheet Wednesday, May 28, 2014 E Rev 0.2 of 56 PEG_GTX_HRX_N[0 7] PEG_GTX_HRX_P[0 7] PEG_HTX_C_GRX_N[0 7] PEG_HTX_C_GRX_P[0 7] +VCOMP_OUT PEG_RCOMP 24.9_0402_1% D R1 D Note: Trace width=12 mils ,Spacing=15mils Max length= 400 mils Haswell rPGA EDS JCPU1A DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 D21 C21 B21 A21 DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 D20 C20 B20 A20 DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 D18 C17 B17 A17 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 D17 C18 B18 A18 DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3 PEG DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI C DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3 Design Guide show: have to routed H29 J29 FDI_CSYNC FDI_INT FDI_CSYNC FDI_INT FDI_CSYNC DISP_INT FDI B INTEL_HASWELL_HASWELL CONN@ PEG_RCOMP PEG_RXN_0 PEG_RXN_1 PEG_RXN_2 PEG_RXN_3 PEG_RXN_4 PEG_RXN_5 PEG_RXN_6 PEG_RXN_7 PEG_RXN_8 PEG_RXN_9 PEG_RXN_10 PEG_RXN_11 PEG_RXN_12 PEG_RXN_13 PEG_RXN_14 PEG_RXN_15 PEG_RXP_0 PEG_RXP_1 PEG_RXP_2 PEG_RXP_3 PEG_RXP_4 PEG_RXP_5 PEG_RXP_6 PEG_RXP_7 PEG_RXP_8 PEG_RXP_9 PEG_RXP_10 PEG_RXP_11 PEG_RXP_12 PEG_RXP_13 PEG_RXP_14 PEG_RXP_15 PEG_TXN_0 PEG_TXN_1 PEG_TXN_2 PEG_TXN_3 PEG_TXN_4 PEG_TXN_5 PEG_TXN_6 PEG_TXN_7 PEG_TXN_8 PEG_TXN_9 PEG_TXN_10 PEG_TXN_11 PEG_TXN_12 PEG_TXN_13 PEG_TXN_14 PEG_TXN_15 PEG_TXP_0 PEG_TXP_1 PEG_TXP_2 PEG_TXP_3 PEG_TXP_4 PEG_TXP_5 PEG_TXP_6 PEG_TXP_7 PEG_TXP_8 PEG_TXP_9 PEG_TXP_10 PEG_TXP_11 PEG_TXP_12 PEG_TXP_13 PEG_TXP_14 PEG_TXP_15 E23 PEG_RCOMP M29 K28 M31 L30 M33 L32 M35 L34 E29 PEG_GTX_C_HRX_N7 D28PEG_GTX_C_HRX_N6 E31 PEG_GTX_C_HRX_N5 D30PEG_GTX_C_HRX_N4 E35 PEG_GTX_C_HRX_N3 D34PEG_GTX_C_HRX_N2 E33 PEG_GTX_C_HRX_N1 E32 PEG_GTX_C_HRX_N0 L29 L28 L31 K30 L33 K32 L35 K34 F29 PEG_GTX_C_HRX_P7 E28 PEG_GTX_C_HRX_P6 F31 PEG_GTX_C_HRX_P5 E30 PEG_GTX_C_HRX_P4 F35 PEG_GTX_C_HRX_P3 E34 PEG_GTX_C_HRX_P2 F33 PEG_GTX_C_HRX_P1 D32 PEG_GTX_C_HRX_P0 H35 H34 J33 H32 J31 G30 C33 B32 B31 PEG_HTX_GRX_N7 A30 PEG_HTX_GRX_N6 B29 PEG_HTX_GRX_N5 A28 PEG_HTX_GRX_N4 B27 PEG_HTX_GRX_N3 A26 PEG_HTX_GRX_N2 B25 PEG_HTX_GRX_N1 A24 PEG_HTX_GRX_N0 J35 G34 H33 G32 H31 H30 B33 A32 C31 PEG_HTX_GRX_P7 B30 PEG_HTX_GRX_P6 C29 PEG_HTX_GRX_P5 B28 PEG_HTX_GRX_P4 C27 PEG_HTX_GRX_P3 B26 PEG_HTX_GRX_P2 C25 PEG_HTX_GRX_P1 B24 PEG_HTX_GRX_P0 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K VGM@ VGM@ VGM@ VGM@ VGA@ VGA@ VGA@ VGA@ 2 2 2 2 1 1 1 1 C34 C35 C36 C38 C42 C43 C44 C46 PEG_GTX_HRX_N7 PEG_GTX_HRX_N6 PEG_GTX_HRX_N5 PEG_GTX_HRX_N4 PEG_GTX_HRX_N3 PEG_GTX_HRX_N2 PEG_GTX_HRX_N1 PEG_GTX_HRX_N0 C 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K VGM@ VGM@ VGM@ VGM@ VGA@ VGA@ VGA@ VGA@ 2 2 2 2 1 1 1 1 C41 C47 C48 C50 C51 C52 C116 C118 PEG_GTX_HRX_P7 PEG_GTX_HRX_P6 PEG_GTX_HRX_P5 PEG_GTX_HRX_P4 PEG_GTX_HRX_P3 PEG_GTX_HRX_P2 PEG_GTX_HRX_P1 PEG_GTX_HRX_P0 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K VGM@ VGM@ VGM@ VGM@ VGA@ VGA@ VGA@ VGA@ 2 2 2 2 1 1 1 1 C45 C119 C120 C122 C124 C125 C126 C127 PEG_HTX_C_GRX_N7 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_N0 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K 0.22U_0402_10V6K VGM@ VGM@ VGM@ VGM@ VGA@ VGA@ VGA@ VGA@ 2 2 2 2 1 1 1 1 C49 C128 C133 C151 C160 C161 C164 C187 B PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_P0 OF A A Compal Secret Data Security Classification Issued Date 2013/12/26 Deciphered Date 2014/12/26 Title PROCESSOR(1/7) DMI,FDI,PEG THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Z5WAW M/B LA-B702 Date: Tuesday, May 27, 2014 Sheet of 56 Rev 0.2 D D Place near SODIMM side, H_DRAMRST# R46 1K_0402_5% 2014.05.06 Change to Pop For Z5WAW ESD DDR3_DRAMRST# 0.1U_0402_16V7K~N C591 EMC@ DDR3 COMPENSATION SIGNALS +VCCIO_OUT SM_RCOMP0 R5 SM_RCOMP1 R6 SM_RCOMP2 R7 R9 56_0402_5% H_PROCHOT# H_PROCHOT# T31 H_PECI T32 AN32 AR27 AK31 AM30 AM35 H_CATERR# H_PECI +VCCST H_PROCHOT#_R H_THRMTRIP# SKTOCC MISC CATERR PECI FC_AK31 PROCHOT THERMTRIP THERMAL SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 SM_DRAMRST H_CPUPWRGD PM_DRAM_PWRGD R15 10K_0402_5% CPU_PLTRST# CPU_PLTRST# G28 H28 F27 E27 D26 E26 CLK_CPU_DPLL# CLK_CPU_DPLL CLK_CPU_SSC_DPLL# CLK_CPU_SSC_DPLL CLK_CPU_DMI# CLK_CPU_DMI INTEL_HASWELL_HASWELL H_PECI H_CPUPWRGD PM_DRAM_PWRGD +VCCIO_OUT 2014.05.06 Change to POP For Z5WAW ESD C592 @ 0.1U_0402_16V7K~N C589 @ 0.1U_0402_16V7K~N 0.1U_0402_16V7K~N DPLL_REF_CLKN DPLL_REF_CLKP SSC_DPLL_REF_CLKN SSC_DPLL_REF_CLKP BCLKN BCLKP C588 EMC@ CLK_CPU_SSC_DPLL @ CLK_CPU_SSC_DPLL# @ PRDY PREQ TCK TMS TRST TDI TDO DBR BPM_N_0 BPM_N_1 BPM_N_2 BPM_N_3 BPM_N_4 BPM_N_5 BPM_N_6 BPM_N_7 CLOCK PM_SYNC PWRGOOD SM_DRAMPWROK PLTRSTIN PWR AT28 AL34 AC10 AT26 H_PM_SYNC H_CPUPWRGD H_PM_SYNC JTAG C 100_0402_1% 75_0402_1% 100_0402_1% Haswell rPGA EDS JCPU1B AP32 DDR3 Note: PECI/THERMTRIP: Trace width=4 mils ,Spacing=18mil Zo=50 ohm R8 62_0402_5% 1 AP3 AR3 AP2 AN3 SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 H_DRAMRST# AR29 AT29 AM34 AN33 AM33 AM31 AL33 AP33 XDP_TCLK XDP_TMS XDP_TRST# XDP_TDI XDP_TDO XDP_DBRESET# 2014.05.06 Change to Pop For Z5WAW ESD Note: Trace width=12~15 mil, Spcing=20 mils Max trace length= 500 mils PU/PD for JTAG signals C611 0.1U_0402_16V7K~N EMC@ C +3VS T100 XDP_DBRESET# R11 1K_0402_5% T101 AR30 AN31 AN29 AP31 AP30 AN28 AP29 AP28 +1.05VS C186 0.1U_0402_16V7K~N @ XDP_TDO XDP_TRST# XDP_TCLK For ESD Near Chip 51_0804_8P4R_5% RP19 OF CONN@ R26 10K_0402_5% R27 10K_0402_5% SSC CLOCK TERMINATION, IF NOT USED, stuff R26,R27 For ESD Near Chip B B SM_DRAMPWROK with DDR Power Gating Topology +1.35V_CPU_VDDQ R30 1.8K_0402_1% PM_DRAM_PWRGD PM_DRAM_PWRGD R36 3.3K_0402_1% A A Compal Secret Data Security Classification Issued Date 2013/12/26 2014/12/26 Deciphered Date Title Compal Electronics, Inc PROCESSOR(2/7) PM,XDP,CLK THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAW M/B LA-B702 Date: Sheet Tuesday, May 27, 2014 of 56 JCPU1C DDR_A_D[0 63] DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 D C +VREF_CA_R +VREF_DQ_DIMMA_R +VREF_DQ_DIMMB_R +VREF_CA_R +VREF_DQ_DIMMA_R +VREF_DQ_DIMMB_R AR15 AT14 AM14 AN14 AT15 AR14 AN15 AM15 AM9 AN9 AM8 AN8 AR9 AT9 AR8 AT8 AJ9 AK9 AJ6 AK6 AJ10 AK10 AJ7 AK7 AF4 AF5 AF1 AF2 AG4 AG5 AG1 AG2 J1 J2 J5 H5 H2 H1 J4 H4 F2 F1 D2 D3 D1 F3 C3 B3 B5 E6 A5 D6 D5 E5 B6 A6 E12 D12 B11 A11 E11 D11 B12 A12 AM3 F16 F13 Haswell rPGA EDS SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 SM_VREF SA_DIMM_VREFDQ SB_DIMM_VREFDQ INTEL_HASWELL_HASWELL CONN@ RSVD SA_CK_N_0 SA_CK_P_0 SA_CKE_0 SA_CK_N_1 SA_CK_P_1 SA_CKE_1 SA_CK_N_2 SA_CK_P_2 SA_CKE_2 SA_CK_N_3 SA_CK_P_3 SA_CKE_3 SA_CS_N_0 SA_CS_N_1 SA_CS_N_2 SA_CS_N_3 SA_ODT_0 SA_ODT_1 SA_ODT_2 SA_ODT_3 SA_BS_0 SA_BS_1 SA_BS_2 VSS SA_RAS SA_WE SA_CAS SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 SA_MA_15 SA_DQS_N_0 SA_DQS_N_1 SA_DQS_N_2 SA_DQS_N_3 SA_DQS_N_4 SA_DQS_N_5 SA_DQS_N_6 SA_DQS_N_7 SA_DQS_P_0 SA_DQS_P_1 SA_DQS_P_2 SA_DQS_P_3 SA_DQS_P_4 SA_DQS_P_5 SA_DQS_P_6 SA_DQS_P_7 AC7 U4 V4 AD9 U3 V3 AC9 U2 V2 AD8 U1 V1 AC8 M7 L9 M9 M10 M8 L7 L8 L10 V5 U5 AD1 T12 M_CLK_DDR#0 M_CLK_DDR0 DDR_CKE0_DIMMA M_CLK_DDR#1 M_CLK_DDR1 DDR_CKE1_DIMMA DDR_CS0_DIMMA# DDR_CS1_DIMMA# M_ODT0 M_ODT1 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 V10 U6 U7 U8 DDR_A_RAS# DDR_A_WE# DDR_A_CAS# V8 AC6 V9 U9 AC5 AC4 AD6 AC3 AD5 AC2 V6 AC1 AD4 V7 AD3 AD2 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 AP15 AP8 AJ8 AF3 J3 E2 C5 C11 AP14 AP9 AK8 AG3 H3 E3 C6 C12 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 M_CLK_DDR#0 M_CLK_DDR0 DDR_CKE0_DIMMA M_CLK_DDR#1 M_CLK_DDR1 DDR_CKE1_DIMMA DDR_CS0_DIMMA# DDR_CS1_DIMMA# M_ODT0 M_ODT1 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 DDR_A_RAS# DDR_A_WE# DDR_A_CAS# DDR_A_MA[0 15] DDR_A_DQS#[0 7] DDR_A_DQS[0 7] Haswell rPGA EDS JCPU1D DDR_B_D[0 63] OF AR18 AT18 AM17 AM18 AR17 AT17 AN17 AN18 AT12 AR12 AN12 AM11 AT11 AR11 AM12 AN11 AR5 AR6 AM5 AM6 AT5 AT6 AN5 AN6 AJ4 AK4 AJ1 AJ2 AM1 AN1 AK2 AK1 L2 M2 L4 M4 L1 M1 L5 M5 G7 J8 G8 G9 J7 J9 G10 J10 A8 B8 A9 B9 D8 E8 D9 E9 E15 D15 A15 B15 E14 D14 A14 B14 SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63 RSVD SB_CKN0 SB_CK0 SB_CKE_0 SB_CKN1 SB_CK1 SB_CKE_1 SB_CKN2 SB_CK2 SB_CKE_2 SB_CKN3 SB_CK3 SB_CKE_3 SB_CS_N_0 SB_CS_N_1 SB_CS_N_2 SB_CS_N_3 SB_ODT_0 SB_ODT_1 SB_ODT_2 SB_ODT_3 SB_BS_0 SB_BS_1 SB_BS_2 VSS SB_RAS SB_WE SB_CAS SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 SB_MA_15 SB_DQS_N_0 SB_DQS_N_1 SB_DQS_N_2 SB_DQS_N_3 SB_DQS_N_4 SB_DQS_N_5 SB_DQS_N_6 SB_DQS_N_7 SB_DQS_P_0 SB_DQS_P_1 SB_DQS_P_2 SB_DQS_P_3 SB_DQS_P_4 SB_DQS_P_5 SB_DQS_P_6 SB_DQS_P_7 AG8 Y4 M_CLK_DDR#2 AA4 M_CLK_DDR2 AF10 DDR_CKE2_DIMMB Y3 M_CLK_DDR#3 AA3 M_CLK_DDR3 AG10 DDR_CKE3_DIMMB Y2 AA2 AG9 Y1 AA1 AF9 P4 R2 P3 P1 T13 DDR_CS2_DIMMB# DDR_CS3_DIMMB# R4 M_ODT2 R3 M_ODT3 R1 P2 R7 DDR_B_BS0 P8 DDR_B_BS1 AA9 DDR_B_BS2 R10 R6 DDR_B_RAS# P6 DDR_B_WE# P7 DDR_B_CAS# R8 Y5 Y10 AA5 Y7 AA6 Y6 AA7 Y8 AA10 R9 Y9 AF7 P9 AA8 AG7 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 AP18 AP11 AP5 AJ3 L3 H9 C8 C14 AP17 AP12 AP6 AK3 M3 H8 C9 C15 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 M_CLK_DDR#2 M_CLK_DDR2 DDR_CKE2_DIMMB M_CLK_DDR#3 M_CLK_DDR3 DDR_CKE3_DIMMB D DDR_CS2_DIMMB# DDR_CS3_DIMMB# M_ODT2 M_ODT3 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 DDR_B_RAS# DDR_B_WE# DDR_B_CAS# DDR_B_MA[0 15] C DDR_B_DQS#[0 7] DDR_B_DQS[0 7] INTEL_HASWELL_HASWELL OF CONN@ B B A A Compal Secret Data Security Classification Issued Date 2013/12/26 2014/12/26 Deciphered Date Title PROCESSOR(3/7) DDRIII THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAW M/B LA-B702 Date: Sheet Tuesday, May 27, 2014 of 56 D D COMPENSATION PU FOR eDP +VCOMP_OUT EDP_COMP 24.9_0402_1% R60 Note: Trace width=20 mils ,Spacing=25mil, Max length=100 mils Haswell rPGA EDS HDMI D2 HDMI D1 HDMI D0 C HDMI HDMI CLK HDMI_TX2HDMI_TX2+ HDMI_TX1HDMI_TX1+ HDMI_TX0HDMI_TX0+ HDMI_CLKHDMI_CLK+ HDMI_TX2HDMI_TX2+ HDMI_TX1HDMI_TX1+ HDMI_TX0HDMI_TX0+ HDMI_CLKHDMI_CLK+ 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 1 1 1 1 2 2 2 2 C410 C400 C395 C409 C408 C406 C412 C411 CPU_DP2_N0 CPU_DP2_P0 CPU_DP2_N1 CPU_DP2_P1 CPU_DP2_N2 CPU_DP2_P2 CPU_DP2_N3 CPU_DP2_P3 T28 U28 T30 U30 U29 V29 U31 V31 T34 U34 U35 V35 U32 T32 U33 V33 P29 R29 N28 P28 P31 R31 N30 P30 DDIB_TXBN_0 DDIB_TXBP_0 DDIB_TXBN_1 DDIB_TXBP_1 DDIB_TXBN_2 DDIB_TXBP_2 DDIB_TXBN_3 DDIB_TXBP_3 JCPU1H EDP_AUXN EDP_AUXP EDP_HPD EDP_RCOMP EDP_DISP_UT IL eDP EDP_TXN_0 EDP_TXP_0 EDP_TXN_1 EDP_TXP_1 FDI_TXN_0 FDI_TXP_0 FDI_TXN_1 FDI_TXP_1 DDIC_TXCN_0 DDIC_TXCP_0 DDIC_TXCN_1 DDIC_TXCP_1 DDIC_TXCN_2 DDIC_TXCP_2 DDIC_TXCN_3 DDIC_TXCP_3 DDID_TXDN_0 DDID_TXDP_0 DDID_TXDN_1 DDID_TXDP_1 DDID_TXDN_2 DDID_TXDP_2 DDID_TXDN_3 DDID_TXDP_3 M27 N27 P27 E24 R27 EDP_AUXN EDP_AUXP EDP_HPD# EDP_COMP EDP P35 R35 N34 P34 P33 R33 N32 P32 EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 FDI_CTX_PRX_N0 FDI_CTX_PRX_P0 FDI_CTX_PRX_N1 FDI_CTX_PRX_P1 C FDI DDI INTEL_HASWELL_HASWELL OF +VCCIO_OUT R347 10K_0402_5% HPD INVERSION FOR EDP CONN@ B B S R65 1K_0402_1% @ R334 100K_0402_5% D G EDP_HPD Q6 2N7002K_SOT23-3 EDP_HPD# HPD is a active high signal from device The HPD processor input is a low voltage active signal A A Compal Secret Data Security Classification Issued Date 2013/12/26 2014/12/26 Deciphered Date Title Compal Electronics, Inc PROCESSOR(4/7) PM,XDP,CLK THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAW M/B LA-B702 Date: Sheet Tuesday, May 27, 2014 of 56 CFG Straps for Processor CFG2 R62 1K_0402_1% VGA@ D D PEG Static Lane Reversal - CFG2 is for the 16x 1: Normal Operation; Lane # socket pin map definition CFG2 0:Lane Reversed * Haswell rPGA EDS definition matches CFG4 JCPU1I R64 R309 R66 2 H_CPU_TESTLO 49.9_0402_1% CFG_RCOMP 49.9_0402_1% H_CPU_RSVD 49.9_0402_1% +CPU_CORE C35 B35 AL25 W30 W31 W34 H_CPU_TESTLO T16 T17 T18 AT20 AR20 AP20 AP22 AT22 AN22 AT25 AN23 AR24 AT23 AN20 AP24 AP26 AN25 AN26 AP25 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 RSVD_TP RSVD_TP RSVD_TP RSVD_TP RSVD_TP TESTLO CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 INTEL_HASWELL_HASWELL B CFG_RCOMP CFG_16 CFG_18 CFG_17 CFG_19 RSVD FC_G6 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD NC RSVD RSVD_TP RSVD_TP RSVD_TP RSVD RSVD VSS VSS AT31 AR21 AR23 AP21 AP23 R63 1K_0402_1% CFG_RCOMP CFG16 T19 Embedded Display Port Presence Strap : Disabled; No Physical Display Port attached to Embedded Display Port CFG4 AR33 G6 AM27 AM26 F5 AM2 K6 * E18 CFG6 U10 P10 CFG5 @ R67 1K_0402_1% B1 A2 AR1 C : Enabled; An external Display Port device is connected to the Embedded Display Port E21 E20 C RSVD_TP RSVD_TP TESTLO_G26 RSVD RSVD RSVD VCC C23 B23 D24 D23 H_CPU_RSVD RSVD_TP RSVD_TP RSVD_TP RSVD_TP RSVD_TP RSVD_TP @ R68 1K_0402_1% A34 A35 W29 W28 G26 W33 AL30 AL29 F25 RSVD_TP RSVD_TP RSVD AT1 AT2 AD10 AP27 AR26 AL31 AL32 PCIE Port Bifurcation Straps 11: (Default) x16 - Device functions and disabled OF CFG[6:5] CONN@ *10: x8, x8 - Device function enabled ; function B disabled 01: Reserved - (Device function disabled ; function enabled) 00: x8,x4,x4 - Device functions and enabled PEG DEFER TRAINING CFG7 * 1: (Default) PEG Train immediately following xxRESETB de assertion 0: PEG Wait for BIOS for training A Compal Secret Data Security Classification Issued Date 2013/12/26 2014/12/26 Deciphered Date Title A Compal Electronics, Inc PROCESSOR(5/7) RSVD,CFG THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAW M/B LA-B702 Date: Sheet Tuesday, May 27, 2014 of 56 +CPU_CORE Haswell rPGA EDS JCPU1E K27 L27 T27 V27 +1.35V_CPU_VDDQ Source +1.35V_CPU_VDDQ VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC RSVD RSVD RSVD RSVD D +1.35V +1.35V_CPU_VDDQ J1 VDDQ MAX 2.1 A PAD-OPEN 43x118m @ VCC_SENSE VSSSENSE PAD-OPEN 43x118m @ +VCCIO_OUT N26 K26 AL27 AK27 VCCSENSE +CPU_CORE VSSSENSE VCCSENSE +VCCIO_OUT Note: Place the UP resistor close to CPU +VCCIO_OUT +VCOMP_OUT 2 43_0402_5% H_CPU_SVIDALRT# R88 150_0402_1% 2 AL35 E17 AN35 A23 F22 W32 AL16 J27 AL13 AM28 AM29 AL28 AP35 H27 AP34 AT35 AR35 AR32 AL26 AT34 AL22 AT33 AM21 AM25 AM22 AM20 AM24 AL19 AM23 AT32 +1.05VS R87 130_0402_1% R89 10K_0402_5% @ C274 22U_0603_6.3V6M 1 +VCCIO_OUT C264 22U_0603_6.3V6M 2 C261 22U_0603_6.3V6M 1 R83 Note: Place the UP resistor close to CPU C93 10U_0603_6.3V6M~N 2 C260 22U_0603_6.3V6M 1 C257 10U_0603_6.3V6M~N 2 C259 22U_0603_6.3V6M 1 C142 10U_0603_6.3V6M~N A 2 C258 22U_0603_6.3V6M Place to TOP CPU socket cavity 1 C141 10U_0603_6.3V6M~N 2 C148 10U_0603_6.3V6M~N 1 C64 22U_0603_6.3V6M C63 22U_0603_6.3V6M C58 10U_0603_6.3V6M~N C62 22U_0603_6.3V6M C57 10U_0603_6.3V6M~N C590 330U_2.5V_M C61 22U_0603_6.3V6M + C56 10U_0603_6.3V6M~N C60 22U_0603_6.3V6M B C55 10U_0603_6.3V6M~N C54 10U_0603_6.3V6M~N Place to TOP CPU socket cavity VR_SVID_ALRT# VR_SVID_CLK VR_SVID_DAT Place to BOT CPU socket cavity 10u *10 22u*11 330u*1 VDDQ DECOUPLING R81 75_0402_1% +1.35V_CPU_VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ RSVD VCC RSVD RSVD @ R84 100_0402_1% C C53 4.7U_0603_6.3V6~N VCCSENSE R79 100_0402_1% +CPU_CORE J2 AB11 AB2 AB5 AB8 AE11 AE2 AE5 AE8 AH11 K11 N11 N8 T11 T2 T5 T8 W11 W2 W5 W8 VCC_SENSE RSVD VCCIO_OUT RSVD VCOMP_OUT RSVD RSVD RSVD RSVD VIDALERT VIDSCLK VIDSOUT VSS PWR_DEBUG VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS +CPU_CORE Y25 Y26 Y27 Y28 Y29 Y30 Y31 Y32 Y33 Y34 Y35 Place to BOT CPU socket cavity VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC D C B U25 U26 V25 V26 VCC VCC VCC VCC W26 W27 VCC VCC INTEL_HASWELL_HASWELL CONN@ SF000006S00 330U 2.5V H4.2 17mohm OSCON AA26 AA28 AA34 AA30 AA32 AB26 AB29 AB25 AB27 AB28 AB30 AB31 AB33 AB34 AB32 AC26 AB35 AC28 AD25 AC30 AD28 AC32 AD31 AC34 AD34 AD26 AD27 AD29 AD30 AD32 AD33 AD35 AE26 AE32 AE28 AE30 AG28 AG34 AE34 AF25 AF26 AF27 AF28 AF29 AF30 AF31 AF32 AF33 AF34 AF35 AG26 AH26 AH29 AG30 AG32 AH32 AH35 AH25 AH27 AH28 AH30 AH31 AH33 AH34 AJ25 AJ26 AJ27 AJ28 AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25 OF A Compal Secret Data Security Classification Issued Date 2013/12/26 2014/12/26 Deciphered Date Title PROCESSOR(6/7) PWR THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAW M/B LA-B702 Date: Tuesday, May 27, 2014 Sheet of 56 Haswell rPGA EDS A10 A13 A16 A19 A22 A25 A27 A29 A3 A31 A33 A4 A7 AA11 AA25 AA27 AA31 AA29 AB1 AB10 AA33 AA35 AB3 AC25 AC27 AB4 AB6 AB7 AB9 AC11 AD11 AC29 AC31 AC33 AC35 AD7 AE1 AE10 AE25 AE29 AE3 AE27 AE35 AE4 AE6 AE7 AE9 AF11 AF6 AF8 AG11 AG25 AE31 AG31 AE33 AG6 AH1 AH10 AH2 AG27 AG29 AH3 AG33 AG35 AH4 AH5 AH6 AH7 AH8 AH9 AJ11 AJ5 AK11 AK25 AK26 AK28 AK29 AK30 AK32 E19 D C B Haswell rPGA EDS JCPU1F VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS INTEL_HASWELL_HASWELL CONN@ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AK34 AK5 AL1 AL10 AL11 AL12 AL14 AL15 AL17 AL18 AL2 AL20 AL21 AL23 E22 AL3 AL4 AL5 AL6 AL7 AL8 AL9 AM10 AM13 AM16 AM19 E25 AM32 AM4 AM7 AN10 AN13 AN16 AN19 AN2 AN21 AN24 AN27 AN30 AN34 AN4 AN7 AP1 AP10 AP13 AP16 AP19 AP4 AP7 W25 AR10 AR13 AR16 AR19 AR2 AR22 AR25 AR28 AR31 AR34 AR4 AR7 AT10 AT13 AT16 AT19 AT21 AT24 AT27 AT3 AT30 AT4 AT7 B10 B13 B16 B19 B2 B22 B34 B4 B7 C1 C10 C13 C16 C19 C2 C22 C24 C26 C28 C30 C32 C34 C4 C7 D10 D13 D16 D19 D22 D25 D27 D29 D31 D33 D35 D4 D7 E1 E10 E13 E16 E4 E7 F10 F11 F12 F14 F15 F17 F18 F20 F21 F23 F24 F26 F28 F30 F32 F34 F4 F6 F7 F8 F9 G1 G11 G2 G27 G29 G3 G31 G33 G35 G4 G5 H10 H26 H6 H7 J11 J26 J28 J30 J32 J34 J6 K1 OF JCPU1G VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS_SENSE RSVD K10 K2 K29 K3 K31 K33 K35 K4 K5 K7 K8 K9 L11 L26 L6 M11 M26 M28 M30 M32 M34 M6 N1 N10 N2 N29 N3 N31 N33 N35 N4 N5 N6 N7 N9 P11 P26 P5 R11 R26 R28 R30 R32 R34 R5 T1 T10 T29 T3 T31 T33 T35 T4 T6 T7 T9 U11 U27 V11 V28 V30 V32 V34 W1 W10 W3 W35 W4 W6 W7 W9 Y11 H11 AL24 F19 T26 AK35 AK33 D C B VSSSENSE T15 INTEL_HASWELL_HASWELL OF CONN@ A A Compal Secret Data Security Classification Issued Date 2013/12/26 2014/12/26 Deciphered Date Title Compal Electronics, Inc PROCESSOR(7/7) VSS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAW M/B LA-B702 Date: Sheet Tuesday, May 27, 2014 10 of 56 TPM Board for 2015 U2600 15 GPIO3/BADD with Internal PH (default) +3VALW +3VALW_TPM R2600 0_0603_5% TPM@ 0_0402_5% near pin5 2 2 @ PM_CLKRUN# CLKRUN PH 10K to +3VS at PCH side C2605 TPM@ 0.1U_0402_16V4Z C2604 TPM@ 0.1U_0402_16V4Z R2601 0_0603_5% TPM@ C2603 TPM@ 0.1U_0402_16V4Z +3VS_TPM C2602 TPM@ 10U_0603_6.3V6M C2601 TPM@ 0.1U_0402_16V4Z C2600 TPM@ 10U_0603_6.3V6M +3VS LPCPD# had internal PH near pin10, 19, 24 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 CLK_PCI_TPM LPC_FRAME# PLT_RST# SERIRQ R2602 TPM_BADD PM_CLKRUN# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 26 23 20 17 CLK_PCI_TPM LPC_FRAME# PLT_RST# SERIRQ 28 21 22 16 27 SERIRQ PH 10K to +3VS at PCH side 10 19 24 VSB VDD VDD VDD GPIO0/XOR_OUT GPIO1 GPIO2/GPX GPIO3/BADD GPIO4/CLKRUN# TEST LAD0/MISO LAD1/MOSI LAD2/SPI_IRQ# LAD3 12 13 14 NC NC NC NC LPCPD# LCLK/SCLK LRFAME#/SCS# LRSET#/SPI_RST# SERIRQ PP +3VALW_TPM +3VS_TPM 11 18 25 GND GND GND GND NPCT650AA0WX_TSSOP28 SA00007IO00 BADD G‐Sensor for BA50 TPM@ SELECTION EEh ‐ EFh * 7Eh ‐ 7Fh R2603 33_0402_5% XEMC@ CLK_PCI_TPM C2606 XEMC@ 22P_0402_50V8J Screw Hole +3VS +3VS 12 FD1 LIS3DH SA0 ->0, Address is 0011 000 (0x30h) SA0 ->1, Address is 0011 001 (0x32h) @ @ @ @ @ @ H13 H14 H15 H16 H20 H_3P7 H_3P7 H_3P7 H_4P0 H_4P0 @ @ @ FD2 @ FIDUCIAL_C40M80 FIDUCIAL_C40M80 FD3 FD4 H18 H_3P0 @ 1 1 C632 4.7U_0603_10V6K +5VS FIDUCIAL_C40M80 FAN1 Conn @ @ @ @ @ @ @ 1 H12 H21 H17 H_3P0 H_3P0 H_6P5 H3 H4 H5 H6 H9 H10 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 LIS3DHTR_LGA16_3X3 BA@ GND GND G_SEN_INT 10 NC NC G_SEN_INT RES 11 ADC1 ADC2 ADC3 BA@ 10U_0603_6.3V6M BA@ 0.1U_0402_16V4Z 16 15 13 Vdd INT1 INT2 C628 1 10K_0402_5% 10K_0402_5% C633 14 SMB_CLK_S3 SMB_DATA_S3 R519 @ R520 BA@ 1 +3VS Vdd_IO CS SCLSPC SDA/SDI/SDO SDO/SA0 R521 10K_0402_5% BA@ U2 @ FIDUCIAL_C40M80 H27 H_3P7 +5VS R515 0_0402_5% U31 EN VIN VOUT VSET GND GND GND GND C626 0.1U_0402_16V4Z @ DVT modify 12/04 ESD request add 0.1u to 5VS 40mil @ @C631 @ C631 1000P_0402_50V7K R516 10K_0402_5% +VCC_FAN1 FAN_SPEED1 @ H25 H_3P0N C627 4.7U_0603_10V6K +3VS H23 H_3P5X3P0N NCT3942S SOP 8P @ C413 0.1U_0402_16V4Z EMC@ EN_DFAN1 +VCC_FAN1 @ C630 1000P_0402_50V7K XEMC@ JFAN1 GND GND ACES_88231-03041 CONN@ Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/12/26 Deciphered Date 2014/12/26 Title FAN & Screw Hole & G-Sensor THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAW M/B LA-B702 Date: Tuesday, May 27, 2014 Sheet 42 of 56 A B C D E DC & VGA Interface +5VALW SUSP# +3VALW 0.1U_0402_16V7K VBIAS +3VALW GND ON2 CT2 VIN2 VIN2 VOUT2 VOUT2 GPAD 12 2 @J10 @ J10 2 For ESD +5VS +5VS JUMP_43X118 +3V_PCH 11 10 EMC@ 330P_0402_50V7K C346 @ J11 @J11 +3VS_OUT 15 +3VS JUMP_43X118 TPS22966DPUR_SON14_2X3 EMC@ C979 @ CT1 +5VS_OUT C342 330P_0402_50V7K 2 C114 10U_0603_6.3V6M EMC@ +5VALW C980 0.1U_0402_16V7K 47K_0402_5% 3VS_ON ON1 14 13 C112 22U_0603_6.3V6M R933 5VS_ON VOUT1 VOUT1 C111 22U_0603_6.3V6M @ VIN1 VIN1 EMC@ R439 +3V_PCH J22 JUMP_43X79 2 0_0402_5% U11 SA00006FD00 +3VALW to +3V_PCH Transfer +5VALW +3V_PCH +1.35V +0.675VS @ G G Q36 L2N7002LT1G_SOT23-3 @ S S SYSON# D SUSP Q29 L2N7002LT1G_SOT23-3 1 D R554 100K_0402_5% @ 2 SUSP SYSON# G Q40A DMN66D0LDW-7_SOT363-6 Q37 @ L2N7002LT1G_SOT23-3 @ SYSON Q40B DMN66D0LDW-7_SOT363-6 @ SYSON R555 10K_0402_5% @ S +1.35V_R +1.05VS_R SUSP# +0.675VS_R R537 10K_0402_5% @ D AOZ1320CI-04 @ PCH_PWR_EN PCH_PWR_EN 2 SUSP 3 EN GND NC R573 470_0603_5% @ R567 470_0603_5% @ GND R566 470_0603_5% @ OUT IN R552 100K_0402_5% @ U77 +5VALW +1.05VS 2 +3VALW +1.05VS to +1.05VSDGPU 60mil IN EN B+ R469 VGA@ Q1007A DMN66D0LDW-7_SOT363-6 VGA@ IN EN 2 C625 GC6@ 4.7U_0603_6.3V6K D S S G5243T11U_SOT23-5 GC6@ 2 1 Q34 VGA@ L2N7002LT1G_SOT23-3 VGA_PWROK G @ R996 100K_0402_5% 1.5VS_DGPU_PWR_EN VGA@ R997 100K_0402_5% 1.5VS_DGPU_PWR_EN @ R999 100K_0402_5% +1.5VSDGPU_R D 1.5VS_DGPU_PWR_EN# VGA_PWROK# 2 DGPU_PWR_EN R571 47_0603_5% @ Q45B DMN66D0LDW-7_SOT363-6 @ VGA@ R995 100K_0402_5% 60mil(1.5A) +1.5VSDGPU @ R998 100K_0402_5% 1.5VS_DGPU_PWR_EN# Q45A DMN66D0LDW-7_SOT363-6 @ GND OUT Issued Date 3VSDGPU_MAIN_EN Compal Electronics, Inc Compal Secret Data 2013/12/26 Deciphered Date 2014/12/26 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC 3VSDGPU_MAIN_EN From GPU DC Interface Rev 0.2 Z5WAW M/B LA-B702 Date: A VGA_PWROK# Q1007B DMN66D0LDW-7_SOT363-6 VGA@ DVT modify 11/20 +5VALW change to +3VLP Security Classification S Q35 C624 GC6@ 1U_0402_6.3V6K IN U14 Q33 @ L2N7002LT1G_SOT23-3 G +3VSDGPU_MAIN DGPU_PWR_EN# +3VS +3VS to +3VSDGPU_MAIN for GC6‐2.0 +3VLP +5VALW @ R994 100K_0402_5% +1.05VSDGPU_R +5VALW 2 1 @J14 @ J14 JUMP_43X79 C622 0.1U_0402_16V7K VGA@ +VGA_CORE_R D +3VSDGPU_MAIN L2N7002LT1G_SOT23-3 @ DGPU_PWR_EN# G +3VSDGPU_AON VGA_PWROK# DGPU_PWR_EN R514 51.1_0402_1% VGA@ 47K_0402_5% 1.05VSDGPU_GATE G5243T11U_SOT23-5 1 10mil VGA@ 10mil R572 47_0603_5% @ C621 VGA@ 4.7U_0603_6.3V6K VGA@ 2 2 VGA@ GND 60mil(1.5A) OUT IN 1 C683 VGA@ 0.1U_0402_16V7K +3VSDGPU_AON U12 C620 4.7U_0603_6.3V6K VGA@ VGA@ 10U_0603_6.3V6M C617 +3VS C613 10U_0603_6.3V6M +3VS to +3VSDGPU_AON for GPU +VGA_CORE +1.05VSDGPU U40 AO4478L_SO8 +1.05VS B C D Tuesday, May 27, 2014 Sheet E 43 of 56 A B C D +5VS VIN 1 9012@ PR101 1.5M_0402_5% - BATT_TEMP 9012@ PC105 100P_0402_50V8J 9012@ PR104 100K_0402_1% 2 9012@PD101 9012@ PD101 LL4148_LL34-2 + O 1 S 9012@ PU101A 9012@PU101A LM393DR_SO8 1 2 G P D PQ101A DMN66D0LDW-7_SOT363-6 9012@ PR103 10K_0402_1% G 9012@ 9012@ PC104 0.022U_0402_16V7K EMI@ PC103 1000P_0603_50V7K EMI@ PC102 100P_0603_50V8 9012@ PR102 47K_0402_1% H_PROCHOT# 2 +3VALW DC_IN_S1 GND GND EMI@ PL101 HCB2012KF-121T50_0805 @ PJP101 ACES_50305-00441-001_4P P - O ACIN + 4 9012@ PD104 9012@PD104 LL4148_LL34-2 9012@ PR106 9012@PR106 1.5M_0402_5% S G PQ101B DMN66D0LDW-7_SOT363-6 9012@ PU101B 9012@PU101B LM393DR_SO8 G 9012@ PC106 0.022U_0402_16V7K D 9012@ 9012@ PR105 9012@PR105 47K_0402_1% H_PROCHOT# 3 @ PR111 @PR111 0_0402_5% +3VLP - PBJ101 @ + PR112 560_0603_5% +CHGRTC PR113 560_0603_5% +RTCBATT ML1220T13RE 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/12/26 Deciphered Date 2014/12/26 Title DCIN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C Rev 0.1 Sheet Tuesday, May 27, 2014 D 44 of 56 A B C D +3VLP PR201 6.49K_0402_1% PR210 1K_0402_1% +3VLP BATT_TEMP MAINPWON @ PU201 VCC TMSNS1 GND RHYST1 OT1 TMSNS2 OT2 RHYST2 2 @ PR206 100K_0402_1% EMI@ PC201 1000P_0402_50V7K @ PR205 10K_0402_1% 1 EC_SMB_CK1 EC_SMB_DA1 BI 100_0402_1% 100_0402_1% 1K_0402_1% 1PR211 BI+ TH EC_SMCK 1PR208 EC_SMDA 1PR209 @ PR204 10K_0402_1% BATT+ BATT_S1 @ PR207 47K_0402_1% @ PH201 100K_0402_1%_B25/50 4250K G718TM1U_SOT23-8 1 2 3 4 5 6 7 8 GND 10 GND SUYIN_200275GR008G13GZR @ PJP201 EMI@ PL201 HCB2012KF-121T50_0805 @ PC202 0.1U_0603_25V7K 1 VGA_EMI@ PL202 HCB2012KF-121T50_0805 2 PR213 1K_0402_5% 2 2013/10/02 Add for ENE9022 Battery Voltage drop detection B+ Connect to ENE9022 pin64 AD1 @9022@ PR231 80.6K_0402_1% PR229 @9022@ 0_0402_5% 2 Battery is 3-cell design B+=9V Active Recovery 65W 85W, 1.2V 65W, 0.913V 90W 117W, 1.2V 90W, 0.915V 120W 156W, 1.2V 120W, 0.919V For KB9012 sense 20mΩ VCIN1_BATT_DROP PH202 under CPU botton side : CPU thermal protection at 92 degree C ( shutdown ) Recovery at 56 degree C @9022@ PR230 ADP_I 10K_0402_1% 9022@ PR216 26.1K_0402_1% 9012@ PR216 12.4K_0402_1% 120W@ PR214 3.74K_0402_1% 65W@ PR214 4.99K_0402_1% 90W@ PR214 10.7K_0402_1% 0.1U_0402_25V6 @9022@ PC203 +EC_VCCA VCIN0_PH @9012@ PR227 26.1_0402_1% MAINPWON @9022@ PR227 30.9K_0402_1% @65W@ PR224 54.9K_0402_1% VCIN1_PROCHOT H_PROCHOT#_EC 2013/10/28 update PH202 chang Common part SL200002H00 @90W@ PR224 105K_0402_1% PH202 100K_0402_1%_NCP15WF104F03RC PR203 10K_0402_1% 2 B value:4250K±1% 4 Compal Electronics, Inc Compal Secret Data Security Classification Issued Date ECAGND 2013/12/26 Deciphered Date 2014/12/26 Title BATTERY CONN / OTP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C Tuesday, May 27, 2014 D Sheet 45 Rev 0.1 of 56 A B C D PQ301 2N7002KW_SOT323-3 G Protection for reverse input Vgs = 20V Vds = 60V Id = 250mA Min 17.52V 16.97V Typ 18.01V 17.59V 11 B 1 PC315 10U_0805_25V6K PC314 10U_0805_25V6K CSON1 PC317 0.1U_0402_25V6 CSOP1 PC316 0.1U_0402_25V6 PQ306 AON7408L_DFN8-5 PQ305 AON7408L_DFN8-5 1 PC319 0.1U_0603_16V7K BATT+ PL302 PR311 10UH_3.5A_20%_7X7X3_M 0.01_1206_1% CHG1 Compal Secret Data 2013/12/26 Deciphered Date 2014/12/26 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A PC307 0.01U_0402_50V7K BQ24725A_BATDRV Security Classification Issued Date 2 @EMI@ PC306 0.1U_0402_25V6 2 PC304 10U_0805_25V6K PR313 10_0603_1% CSOP1 SRP1 PR314 6.8_0603_1% CSON1 SRN1 Max 18.50V 18.24V VILIM = 20*ILIM*Rsr ILIM = 3.3*100/(100+316)/20/0.02 = 4.006 A Support max charge 3.5A Power loss: 0.245W CSR rating: 1W VSRP-VSRN spec < 81.28mV 7X7X3 Isat: 3.8A @EMI@ PC318 @EMI@ PR312 680P_0402_50V7K 4.7_1206_5% 12 2BQ24725A_BATDRV_1 PR305 4.12K_0603_1% PC320 0.01U_0402_25V7K ILIM 10 1 Vin Dectector PR317 100K_0402_1% BQ24725A_ACDET SCL @ PR320 @PR320 0_0402_5% DL_CHG 14 13 **Design Notes** #For 65 /90W system, 3S1P/3S2P battery Maximum Charging current 3.5A Battery discharge power 55W +3VALW #Register Setting 0X12 bit8 set (default 1) to disable IFAULT HI if add ISN choke BQ24725A_ILIM 0X12 bit3 set (default 0) to enable turbo boost function PR316 316K_0402_1% Disable turbo when AC only #Circuit Design ACOK,ILIM pull high voltage need base on 3/5V enable control Use 10X10 choke and 3X3 H/L side MOSFET Charge current 3.5A Power loss : 1.82W Power density : 0.81 (15X15) If use 4S per cell 4.35V battery, need additional circuit for ACDET(PR218/PR220/PR222 change to 0.1%, parallel resistors with PR222 for ACDET setting) EC_SMB_CK1 PC223 2200p is for quick response when AC plug out For hybrid design, need double check PQ202,PQ203,PQ204,PQ205 component rating #Protect function EC_SMB_DA1 1 ACOVP : ACDET voltage > 3.14V Charger timeout : No communication within 175s(default) ACOC : 3.33 X Input current DAC setting(default) CHGOCP : 3/4.5/6A based on current current setting ADP_I BATOVP : 103-106% BATLOWV : 2.5V @PC323 @ PC323 TSHUT : 155C 100P_0402_50V8J IFAULT HI : 750mV (default) Close EC chip IFAULT LOW : 110mV (default) BATDRV BQ24725A_BATDRV 2 SRN L >H H >L EMI@ PC305 2200P_0402_25V7K 2 BQ24725A_REGN 16 REGN PR307 2.2_0603_5% BQ24725A_BST2 17 DH_CHG 18 HIDRV BTST PR306 10_1206_1% BQ24725A_LX ACDRV PC322 100P_0402_50V8J PR319 64.9K_0402_1% 1 PC321 2200P_0402_50V7K 19 SRP PR318 422K_0402_1% VIN PHASE 1 CMSRC BQ24735A_V2.mdd 15 PQ304 AO4406AL_SO8 BQ24725A_LX GND ACOK PR308 0_0402_5% PC313 1U_0603_25V6K BQ24735RGRR_QFN20_3P5X3P5 ACIN ACP BQ24735A_V1.mdd DH_CHG Rds(on) = 30mohm max Vgs = 20V Vds = 30V ID = 7A (Ta=70C) PD302 RB751V-40_SOD323-2 LODRV SDA Module model information VF = 0.37V ACN +3VLP PC311 0.047U_0402_25V7K IOUT BQ24725A_ACDRV PR315 100K_0402_1% PAD BQ24725A_CMSRC 20 PU301 VCC 2 1U_0603_25V6K 1 BQ24725A_VCC2 1 PC312 21 VF = 0.5V PD301 BAS40CW_SOT323-3 ACDET PC309 0.1U_0402_25V6 PR310 4.12K_0603_1% BQ24725A_ACN BQ24725A_ACP PR309 4.12K_0603_1% PC308 0.1U_0402_25V6 BQ24725A_ACDRV_1 VIN PQ303 AO4406AL_SO8 PC303 10U_0805_25V6K Isat: 4A DCR: 27mohm CHG_B+ EMI@ PL301 1UH_NRS4018T1R0NDGJ_3.2A_30% PC302 0.1U_0402_25V6 @ PR304 0_0402_5% PQ302 AON6414AL_DFN8-5 65_90W@ PR303 0.02_1206_1% P2 BQ24725A_IOUT P1 Rds(on) = 35mohm max Vgs = 20V Vds = 30V ID = 7.7A (Ta=70C) max Power loss 0.22W for 90W;0.12W for 65W system CSR rating: 1W VACP-VACN spec < 80.64mV Rds(on) typ = 35mohm max Vgs = 20V Vds = 30V ID = 7.7A (Ta=70C) PC310 0.1U_0402_25V6 VIN B+ S 3M_0402_5% Need check the SOA for inrush PC301 2200P_0402_50V7K 120W@ PR303 0.01_1206_1% PR302 PR301 1M_0402_5% D C Compal Electronics, Inc Document Number CHARGER Rev 0.1 Common Circuit Tuesday, May 27, 2014 Sheet D 46 of 56 A B C D E Module model information SY8208B_V2.mdd SY8208C_V2.mdd 1 EN1 and EN2 dont't floating PG LDO 3.3V LDO 150mA~300mA +3VLP PC411 4.7U_0603_6.3V6K PR412 100K_0402_5% Check pull up resistor of SPOK at HW side PC403 0.1U_0603_25V7K SY8208BQNC_QFN10_3X3 PR404 150K_0402_1% LX_3V B+ SPOK PL402 +3VALWP 1.5UH_PCMB053T-1R5MS_6A_20% PC410 22U_0603_6.3V6M OUT 10 PR401 2.2_0603_5% PC409 22U_0603_6.3V6M GND BST_3V PC408 22U_0603_6.3V6M 3V_FB PR403 1K_0402_5% LX PC402 0.01U_0402_25V7K 2 EN2 3V5V_EN PC407 22U_0603_6.3V6M EN1 IN BS +3VALWP IN @EMI@ PC412 @EMI@ PR405 680P_0603_50V7K 4.7_1206_5% 13V_SN @ PU401 PC406 10U_0805_25V6K 3V_VIN PC405 10U_0805_25V6K EMI@ PC404 2200P_0402_50V7K EMI@ PL401 HCB2012KF-121T50_0805 @EMI@ PC401 0.1U_0402_25V6 B+ PR402 499K_0402_1% ENLDO_3V5V Vout is 3.234V~3.366V TDC=6A +3VALWP @ PJ401 2 +3VALW JUMP_43X118 PR409 2.2K_0402_5% MAINPWON SPOK VCC OUT PG LDO 10 BST_5V PC416 VL SY8208CQNC_QFN10_3X3 2 +5VALW 5*5*3 0.1U_0603_25V7K LX_5V @ PJ402 PL404 +5VALWP 1.5UH_PCMB053T-1R5MS_6A_20% PC423 22U_0603_6.3V6M LX PC413 PR406 6800P_0402_25V7K 1K_0402_5% 2 PR407 2.2_0603_5% PC422 22U_0603_6.3V6M VCC_3V GND 5V_FB 3V5V_EN JUMP_43X118 PC421 22U_0603_6.3V6M BS PC420 22U_0603_6.3V6M EN2 EN1 +5VALWP TDC=6A IN @EMI@ PC425 @EMI@ PR408 680P_0603_50V7K 4.7_1206_5% 15V_SN EC_ON PC424 4.7U_0603_6.3V6K 5V_VIN PU402 @EMI@ PC418 0.1U_0402_25V6 1 PC419 4.7U_0603_6.3V6K @ EMI@ PC417 2200P_0402_50V7K PC415 10U_0805_25V6K Vout is 4.998V~5.202V EMI@ PL403 HCB2012KF-121T50_0805 PC414 10U_0805_25V6K B+ 5V LDO 150mA~300mA @ PR410 0_0402_5% PC426 4.7U_0402_6.3V6M PR411 1M_0402_1% 3V5V_EN EC VDD0 is +3VL, PC426 UNPOP EC VDD0 is +3VALW, PC426 POP 4 Compal Secret Data Security Classification 2013/12/26 Issued Date 2014/12/26 Deciphered Date Title Compal Electronics, Inc +3VALW/+5VALW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D Rev 0.1 Sheet Tuesday, May 27, 2014 E 47 of 56 Module model information RT8207M_V1.mdd RT8207M_V2.mdd For Single layer For Dual layer D D BOOT_1.35V Note: S3 - sleep ; S5 - power off PC507 10U_0805_6.3V6K VTTREF_1.35V FB +1.35VP VTT PC510 0.033U_0402_16V7K FB_1.35V S3 PR506 8.2K_0402_1% +1.35VP B EN_0.675VSP S5 TON PR507 887K_0402_1% 1.35V_B+ 20 19 VLDOIN 18 BOOT UGATE VDDQ EN_1.35V +5VALW MOSFET: 3x3 DFN H/S Rds(on): 27mohm(Typ), 34mohm(Max) Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C L/S Rds(on): 9.9mohm(Typ), 13mohm(Max) Idsm: 13.5A@Ta=25C, 11A@Ta=70C SYSON @ PR509 0_0402_5% @ PC514 0.1U_0402_10V7K Choke: 7x7x3 Rdc=8.3mohm(Typ), 10mohm(Max) Switching Frequency: 285kHz Ipeak=10A Iocp~13A OVP: 110%~120% VFB=0.75V, Vout=1.515V MOSFET footprint: SIS412DN VDD VTTREF SUSP# @ PR510 0_0402_5% PR508 10K_0402_1% VTTREF_1.5V off on on VDDP C 1 +1.35VP +0.75VSP off off on PC513 1U_0603_10V6K GND RT8207MZQW_WQFN20_3X3 Level L L H 11 CS VTTSNS 21 Co-Lay 12 PAD B Mode S5 S3 S0 VDD_1.35V 13 PU501 VTTGND PGND 10 2@ @EMI@ PC512 680P_0402_50V7K +5VALW PQ502 AON7506_DFN33-8-5 PR504 5.1_0603_5% 2 + + @EMI@ PR503 4.7_1206_5% PC511 330U_D2_2V_Y ESR=9m ohm ESR=15m ohm PC509 330U_2.5V_ESR17M_6.3X4.5 1 PR502 13.7K_0402_1% CS_1.35V PC508 1U_0603_10V6K LGATE TON_1.35V 15 17 16 DL_1.35V PHASE 14 H=4.5 SF000002Z00 +0.675VSP PC506 10U_0805_6.3V6K PQ501 AON7408L_DFN8-5 +1.35VP +1.35VP SW_1.35V PC501 0.1U_0603_25V7K 1.1% PL502 1UH_11A_20%_7X7X3_M 0.75Volt +/- 5% TDC 0.7A Peak Current 1A DH_1.35V C 1.364V PR501 2.2_0603_5% PGOOD BST_1.35V PC505 10U_0805_25V6K PC504 10U_0805_25V6K 2 EMI@ PC503 2200P_0402_50V7K 1.35V_B+ @EMI@ PC502 0.1U_0402_25V6 B+ Pin19 need pull separate from +1.5VP If you have +1.5V and +0.75V sequence question, you can change from +1.5VP to +1.5VS EMI@ PL501 HCB2012KF-121T50_0805 @ PJ501 2 +1.35V JUMP_43X118 @ PJ502 2 @ PC515 0.1U_0402_10V7K JUMP_43X118 +0.675VSP @ PJ503 2 +0.675VS JUMP_43X39 A Compal Secret Data Security Classification Issued Date 2013/12/26 Deciphered Date 2014/12/26 Title Compal Electronics, Inc +1.35VP/+0.675VSP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Tuesday, May 27, 2014 Date: A Sheet 48 Rev 0.1 of 56 D D Module model information SY8208D_V1.mdd EN pin don't floating If have pull down resistor at HW side, pls delete PR603 @ PR602 0_0402_5% SUSP# C C @ PC602 0.22U_0402_10V6K 2 @ PR603 1M_0402_1% TDC 8A 1.062V PL602 1UH_11A_20%_7X7X3_M SY8208DQNC_QFN10_3X3 FB = 0.6V Rdown 2 PC611 22U_0603_6.3V6M PC610 47U_0805_6.3V6M PR609 20K_0402_1% 2 @ PR607 0_0402_5% Rup +3VALW +1.05VSP LDO_3V 1.1% LDO PG BYP PC614 4.7U_0603_6.3V6K ILMT PC613 4.7U_0603_6.3V6K FB ILMT_1.05V3 ILMT_1.05V 10 LX_1.05V PC612 22U_0603_6.3V6M PC601 0.1U_0603_25V7K PC609 47U_0805_6.3V6M LX @ PR601 0_0603_5% BST_1.05V GND EN PC608 330P_0402_50V7K IN PR606 15.4K_0402_1% PC607 10U_0805_25V6K PC604 10U_0805_25V6K PU601 BS @ PR605 0_0402_5% B+_1.05V @EMI@ PC606 0.1U_0402_25V6 1 LDO_3V EMI@ PC605 2200P_0402_50V7K B+ @EMI@ PR604 @EMI@ PC603 4.7_1206_5% 680P_0603_50V7K 2SNB_1.05V EMI@ PL601 HCB2012KF-121T50_0805 B Pin BYP is for CS Common NB can delete The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high +1.05VSP +3VALW and PC614 @ PJ601 2 +1.05VS B JUMP_43X118 VFB=0.6V Vout=0.6V* (1+Rup/Rdown) Vout=1.05V A A Compal Secret Data Security Classification Issued Date 2013/12/26 Deciphered Date 2014/12/26 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc Document Number +1.05VSP Sheet Tuesday, May 27, 2014 Rev 0.1 49 of 56 Ultra Low Dropout 0.23V(typical) at 3A Output Current D PC702 1U_0402_6.3V6K 2 1 D @ PJ701 JUMP_43X79 +5VALW +3VS +1.5VSP PC704 0.01U_0402_25V7K @ PJ702 2 +1.5VS JUMP_43X79 PC705 22U_0603_6.3V6M 1 0.53% +1.5VSP Rup FB=0.8V PR703 20K_0402_1% FB 2 GND EN POK 1 1.507V Rdown PR705 22.6K_0402_1% 2 PR704 47K_0402_5% PC701 0.1U_0402_16V7K SUSP# PR701 100K_0402_5% PU701 APL5930KAI-TRG_SO8 VCNTL VOUT VIN VIN VOUT PC703 4.7U_0603_6.3V6K C C Vout=0.8V* (1+Rup/Rdown) Ultra Low Dropout 0.23V(typical) at 3A Output Current B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/12/26 2014/12/26 Deciphered Date Title +1.5VSP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Rev 0.1 Tuesday, May 27, 2014 Sheet 50 of 56 PR822 6.04K_0402_1% VRHOT Assert Threshold : 0.92V TSENSE Bias Current : 60uA PH801=17.926K, 100C active Reset Threshold: 0.96V, 94C active 100C Assert Threshold: PR821=27.4K 110C Assert Threshold: PR821=66.5K +5VS 37W: 47W: PC822=0.10U PC822=0.15U PR838 0_0402_5% PC831 0.022U_0402_25V7K 37W@ PC822 0.1U_0402_10V7K UGATE1 PQ801 PC824 0.1U_0603_25V7K PR839 0_0603_5% VCCSENSE PC838 0.01U_0402_25V7K Place close to phase inductor ISUMN VSSSENSE Local sense put on HW site 0.22U_0603_25V7K 2.61K_0402_1% LGATE1 ISUMP AON6554_DFN5X6-8-5 Module model information 47W@ PC805 10U_0805_25V6K 47W@ PC804 10U_0805_25V6K 2 47W@ PR811 ISUMP 3.65K_0603_1% ISUMN ISUMP 680P_0603_50V7K B Max Height: PC823:8mm + P1_SW +CPU_CORE P1_VO PR843 PR844 3.65K_0603_1% 100K_0603_1% 2 SNB_CPU_P1 ISEN1 @ PR846 P2_VO 100K_0402_1% PR847 10_0402_1% @47W@ PR848 P3_VO 100K_0402_1% A ISL95812_V1A.mdd for IC portion Compal Electronics, Inc ISL95812_V1B.mdd for SW portion @EMI@ PR842 4.7_1206_5% PR845 PH802 10K_0402_5%_ERTJ0ER103J PQ808 ISUMP @ PC837 330P_0402_50V7K PR840 2.2_0603_5% PC835 2 BOOT1 2 0.082U_0402_16V7K PC836 0.1U_0402_16V7K 1 @47W@ PR837 P3_VO 100K_0402_1% PL801 0.22UH 20% PCME064T-R22MS0R985 28A @EMI@ PC839 680P_0603_50V7K PR841 11K_0402_1% @ PC834 PR835 10_0402_1% @ PR836 100K_0402_1% PHASE1 ISUMN 47W@ PC833 0.022U_0402_25V7K P1_VO @ PC830 0.033U_0603_16V7K +CPU_CORE P2_VO CPU_B+ ISEN2 ISEN1 @EMI@ PR827 4.7_1206_5% AON6554_DFN5X6-8-5 ISEN2 PC827 10U_0805_25V6K PC821 330P_0402_50V7K PR822 set 6.04K ohm to slope PR830 set 665 ohm to OCP 102A PR829 set 2.55K ohm to LL 1.5m 37W@ PR830 470_0402_1% LGATE2 PR828 P2_SW2 3.65K_0603_1% PR831 100K_0603_1% SNB_CPU_P2 PC826 10U_0805_25V6K PR830=470 PR830=511 PQ806 @EMI@ PC818 PC817 PR826 2.2_0603_5% 0.22U_0603_25V7K 2 BOOT2 PC825 10U_0805_25V6K 2 37W: 47W: 47W@ PC822 0.15U_0402_10V 680P_0603_50V7K PHASE2 PC814 1U_0603_10V6K B+ @EMI@ PL805 HCB2012KF-121T50_0805 PL804 0.22UH 20% PCME064T-R22MS0R985 28A 2 2 56P_0402_50V8J PC820 8200P_0402_25V7K ISEN3 A PR823 0_0603_5% UGATE2 37W@ PR829 1.65K_0402_1% 2 PR834 1.5K_0402_1% 1 2 PR833 2K_0402_1% PC819 47W@ PR830 511_0402_1% 47W@ PR829 2.55K_0402_1% 1 PR829=1.65K PR829=2.55K PC816 2200P_0402_25V7K PC815 220P_0402_50V7K FB_PR1040 PR825 1K_0402_1% PR832 1.82K_0402_1% PC832 0.022U_0402_25V7K EMI@ PL803 HCB2012KF-121T50_0805 CPU_B+ PR824 1_0402_5% 37W: 47W: B CPU_B+ PC823 100U_25V_M C 0.22UH 20% PCME064T-R22MS0R985 28A DCR=0.98m ohm SH00000OY00_7*7*4_600KHz 27.4K_0402_1% PU801 ISL95812HRZ-T_QFN32_4x4 66A Power Dissipation: H/S 1.0974W L/S 0.4311W with one L/S 1.586W AON6552_DFN5X6-8-5 10 11 12 13 14 15 16 PR821 102A -1.5 mV/A PC809 47P_0402_50V8J @ PR820 0_0402_5% 55A ALERT# SDA SLOPE/PROG1 PROG3 PROG2 BOOT2 UGATE2 PHASE2 PAD 85A 26A Max Current in Turbo Mode ISUMN 33 5.62K_0402_1% 33A 21A @47W@ PR814 P2_VO 100K_0402_1% PR819 37W 0_0402_5% 47W@ PR812 10_0402_1% @47W@ PR813 P1_VO 100K_0402_1% ISUMN 2NTC_PH2 470K_0402_5%_B25/50 4700K PWM3 LGATE1 PHASE1 UGATE1 BOOT1 TDC 27A 47W EMI@ PC829 2200P_0402_50V7K 1 NTC COMP FB 37W@ PR817 100K_0603_1% ISEN3 @EMI@ PC828 0.1U_0402_25V6 PH801 LGATE2 +CPU_CORE P3_VO R_DC_LL OCP IccMax TDC at PL2 for 40 seconds starting from idle state PC813 10U_0805_25V6K VR_HOT# Place close to phase MOSFET 24 23 22 21 20 19 18 17 IccTDC INSTALL @ VR_HOT# LGATE2 VDDP PWM3 LGATE1 PHASE1 UGATE1 BOOT1 VIN SCLK VR_ON PGOOD IMON VR_HOT# NTC COMP FB FB2/VSEN ISEN3 ISEN2 ISEN1 RTN ISUMN ISUMP VDD C SCLK VR_EN PGOOD IMON PR818 97.6K_0402_1% 37W: 47W: SNB_CPU_P3 Vboot=1.7V FSW: 400KHz @ PR816 PC807 0_0402_5% 1U_0603_10V6K P3_SW 47W@PR807 47W@ PR807 PC812 10U_0805_25V6K SDA ALERT# PC808 680P_0402_50V7K 47W@ PQ804 AON6554_DFN5X6-8-5 BOOT2 UGATE2 PHASE2 1.91K_0402_1% +3VS VGATE LGATE3 +5VS 32 31 30 29 28 27 26 25 PR810 102K_0402_1% 2 CPU_PHASE3 PC810 0.22U_0603_25V7K PR815 VCORE_VDDP VR_ON LGATE ISL6208BCRZ-T_QFN8_2X2 PR808 3.24K_0402_1% @ PR809 0_0402_5% GND TP D 47W@ PL802 0.22UH 20% PCME064T-R22MS0R985 28A BOOT3 @EMI@ PC806 VR_SVID_CLK PWM PHASE PC811 10U_0805_25V6K VR_SVID_ALRT# UGATE FCCM BOOT PWM3 PR805 49.9K_0402_1% VR_SVID_DAT VCC 1U_0402_6.3V6K 47W@ PU802 @EMI@ PR806 4.7_1206_5% 54.9_0402_1% PR804 CPU_B+ 47W@ PR803 0_0603_5% UGATE3 AON6552_DFN5X6-8-5 47W@ PR802 2.2_0603_5% +5VS PC801 47W@ PC803 1U_0603_10V6K PQ805 D PR801 130_0402_1% +VCCIO_OUT 1 PROG1(PR810) set 102K ohm to IccMAX phase 84A/ phase 56A PROG2(PR805) set 49.9K ohm to Vboot 1.7V / 600KHz PROG3(PR808) set 3.24K ohm to 12mV/us (2-ch CCM) AON6552_DFN5X6-8-5 Module design of ISL95812 VR For 47W/37W processor 47W@ PQ802 47W@ PC802 0.22U_0603_25V7K Title CPU_CORE/GFX_CORE Size Document Number Date: Tuesday, May 27, 2014 Sheet 51 of Rev 0.1 56 3 X 330u/9m(47W) X 330u/9m(37W) 24 pcs 22uF and reserve pcs 2013/08/16 PWR Rule 需確認最新SPEC Modify 8/6 X 330u/9m(47W) 26 pcs 22uF 2013/08/28 D +CPU_CORE D +CPU_CORE +CPU_CORE 2 2 2 2 2 2 2 2 2 2 2 2 2 2 330U_D2_2.5VY_R9M + PC912 330U_D2_2.5VY_R9M 47W@ PC913 330U_D2_2.5VY_R9M C @ PC933 22U_0603_6.3V6M 2 + PC911 PC923 22U_0603_6.3V6M PC932 22U_0603_6.3V6M PC931 22U_0603_6.3V6M PC930 22U_0603_6.3V6M PC929 22U_0603_6.3V6M PC928 22U_0603_6.3V6M PC927 22U_0603_6.3V6M PC926 22U_0603_6.3V6M PC924 22U_0603_6.3V6M PC925 22U_0603_6.3V6M @ PC910 22U_0603_6.3V6M PC922 22U_0603_6.3V6M PC921 22U_0603_6.3V6M PC920 22U_0603_6.3V6M PC919 22U_0603_6.3V6M PC918 22U_0603_6.3V6M PC917 22U_0603_6.3V6M PC916 22U_0603_6.3V6M PC915 22U_0603_6.3V6M PC914 22U_0603_6.3V6M @ PC909 22U_0603_6.3V6M PC908 22U_0603_6.3V6M PC907 22U_0603_6.3V6M PC906 22U_0603_6.3V6M PC905 22U_0603_6.3V6M PC904 22U_0603_6.3V6M PC903 22U_0603_6.3V6M PC902 22U_0603_6.3V6M PC901 22U_0603_6.3V6M @ + 1 C B B A A 2013/12/26 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2014/12/26 Title CPU_CORE_CAP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Tuesday, May 27, 2014 Sheet Rev 0.1 52 of 56 D D Module model information SY8208D_V1.mdd EN pin don't floating If have pull down resistor at HW side, pls delete PR1002 @ PR1001 0_0402_5% EN_+1.5VSDGPUP 1.5VS_DGPU_PWR_EN C C VGA@ PC1001 0.22U_0402_10V6K 2 @ PR1002 1M_0402_1% TDC 8A 1.062V VGA@ PL1002 1UH_11A_20%_7X7X3_M 2 Pin BYP is for CS Common NB can delete 2 2 VGA@ PC1013 22U_0603_6.3V6M FB = 0.6V VGA@ PC1012 47U_0805_6.3V6M SY8208DQNC_QFN10_3X3 The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high Rup +3VALW LDO_3V_+1.5VSDGPUP VGA@ PC1011 47U_0805_6.3V6M +1.5VSDGPUP 1.1% Rdown VGA@ PR1006 24K_0402_1% LDO PG BYP 2 VGA@ PC1008 4.7U_0603_6.3V6K FB ILMT_1.5VSDGPUP ILMT 10 SW_+1.5VSDGPUP VGA@ PC1014 22U_0603_6.3V6M VGA@ PC1003 0.1U_0603_25V7K 2 @ PR1003 0_0603_5% BST_+1.5VSDGPUP VGA@ PC1010 330P_0402_50V7K LX GND VGA@ PR1005 30.1K_0402_1% EN VGA@ PC1007 10U_0805_25V6K VGA@ PC1006 10U_0805_25V6K @ PR1008 0_0402_5% B IN VGA@ PC1009 4.7U_0603_6.3V6K ILMT_1.5VSDGPUP VGA@ PU1001 BS @ PR1007 0_0402_5% +1.5VSDGPUP_B+ @VGA_EMI@ PC1005 0.1U_0402_25V6 1 LDO_3V_+1.5VSDGPUP VGA_EMI@ PC1004 2200P_0402_50V7K B+ @VGA_EMI@ PR1004 @VGA_EMI@ PC1002 4.7_1206_5% 680P_0603_50V7K 2 VGA_EMI@ PL1001 HCB2012KF-121T50_0805 +1.5VSDGPUP +3VALW and PC614 @ PJ1001 2 +1.5VSDGPU B JUMP_43X118 VFB=0.6V Vout=0.6V* (1+Rup/Rdown) Vout=1.05V A A Compal Secret Data Security Classification Issued Date 2013/12/26 Deciphered Date 2014/12/26 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc Document Number +1.5VSDGPUP Sheet Tuesday, May 27, 2014 53 of Rev 0.1 56 B Current Limit threshold setting Rocset= (Ivalley * Rds(on) + 40 mV) / 10uA Different VGA Chip (different EDP-Peak Current) need select different solution I_ripple=(19-0.9)*0.9/ (304.89Khz*0.36u*19)=7.811A OCP=54A/2=27A per phase Ivalley=27A-7.811A/2=23.1A Vstep=(Vmax-Vmin)/Nmax PWM-VID Spec and component Values 1.2V 1.2V 1.15V 1.15V 0.875V 0.9V 0.9V 1.028V 6.25mV 6.25mV 25mV 12.5mV N of Voltage level 96 96 20 20 PWM Frequency 1.125 1.125 0.676 0.676 Rrefadj PR1206 39K 20K 39K 27K Rref1 PR1204 39K 20K 30K 7.5K Rboot PR1205 1.5K 2K 3K Rref2=PR1209 +PR1212 PR1209 30K 18K 24K 6.2K PR1212 1.5K 3K 1.74K C PC1209 1.5nf 2.7nf 1.8nf 5.6nf C=3*330uF (9mohm)=990uF Vripple=Iripple*ESR(min)=7.811A*3mohm=23.4mV @VGA@ PR1202 1K_0402_5% Rref1 GT@PR1205 GT@PR1205 2K_0402_1% @VGA@ PR1207 32A 26A 22A 25A 27A 38A 45A 31A 29.2A EDP-Peak at Tj=102C 35A 55A 45A 35A 35A 40A 60A 75A 60A 44.3A Istep max (Evaluation) 15A 27A 25A 20A 14A 12A 31.5A 35A OCP Setting Current 42A 66A 54A 42A 42A 48A 72A 90A 72A 54A Rocset 8.96K 12.45K 10.7K 8.96K 8.96K 9.83K 8.3K 9.39K 13K 10.2K Recommendation 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H2L 2phase 1H2L 2phase 1H1L 2phase 1H1L Polymer Cap (330uF) 6mohm * 9mohm * 9mohm * 6mohm * 6mohm * 6mohm * 6mohm * (L=0.22uH) 4.5mohm * (L=0.15uH) Or OSCON (390uF) 10mohm * 10mohm * 10mohm * 10mohm * 10mohm * 10mohm * 2.4V to 5.5V +3VS PSI VGA@ PR1208 2.2_0603_5% U2_BOOT1 @ PR1210 1K_0402_5% VGA@ PR1226 10K_0402_1% Pull high on HW side 3VSDGPU_MAIN_EN Dgpu_Pwr_En VGA@ PC1207 0.22U_0603_25V7K VGA@ PR1211 0_0603_5% U2_UGATE1 Reserve Location VGA@ VGA@ PC1210 1U_0402_6.3V6K U2_BOOT1 U2_UGATE1 GPU_EN BOOT2 GT@ NULL GM@ B+ @VGA_EMI@ PL1204 HCB2012KF-121T50_0805 +VGA_CORE EDP-Continuous 31A EDP-Peak 60A OCP 72A PL1202 0.22UH 20% FDUE0640J -H 25A U2_PWM3 U2_PWM3 20 U2_LGATE2 19 U2_PHASE2 GM@ PR1216 9.31K_0402_1% @VGA_EMI@ PC1211 680P_0603_50V7K Rocset 21 GT@ PR1216 9.31K_0402_1% U2_LGATE1 U2_LGATE1 22 0.36uH_SH00000L400_10*10*4 (common: SH000011O00) @VGA_EMI@ PR1213 4.7_1206_5% 23 AON6554_DFN5X6-8-5 U2_PHASE1 VGA@ PQ1202 24 +VGA_CORE 3 RT8813AGQW_WQFN24_4X4 18 UGATE2 17 U2_UGATE2 PGOOD PHASE2 GPU_B+ PR1219 2.2_0603_5% U2_BOOT2 AON6552_DFN5X6-8-5 VGA@ PC1214 0.22U_0603_25V7K VGA@ PR1220 0_0603_5% VGA@ +3VS @VGA_EMI@ PC1215 0.1U_0402_25V6 VGA@ PQ1203 U2_BOOT2 VGA@ U2_LGATE2 VGA@ PR1224 2.2_0603_5% VGA@ PQ1206 +5VS VGA_PWROK +VGA_CORE VGA@ PQ1204 VGA@ PR1222 10K_0402_1% PL1203 0.22UH 20% FDUE0640J -H 25A U2_PHASE2 VGA@ PR1225 100K_0402_1% @VGA_EMI@ PR1223 4.7_1206_5% @VGA_EMI@ PC1220 680P_0603_50V7K VGA@ PC1221 1U_0402_6.3V6K Compal Secret Data Security Classification Issued Date 2013/12/26 Deciphered Date 2014/12/26 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A NULL VGA_EMI@ PL1201 HCB2012KF-121T50_0805 BOOT1 UGATE1 EN PSI VID REFADJ GPU_TSNS/ISEN3 LAGTE2 16 SS PVCC VCC/ISNE1 VSNS 1 113.4C 24A 110C 24.72W EDP-Continuous at Tj=102C AON6554_DFN5X6-8-5 106.38C 25W PR1221=13K 40W 103.1C 1.2V to 1.8V Active phase with CCM T_max 100C 30W U2_UGATE2 VGA@ PH1201 470K_0402_5%_TSM0B474J4702RE T_typical 96.73C 2013/10/28 update PH1201 chang Common part SL200002E00 T_min PR1221=18.7K N/A GPU_VREF VSNS Soft-Start time (Internal) is 0.7ms (PC1213 un-pop) Tss=(Css*Vrefin)/Iss+2.3ms =0.01U*0.9V/5uA+2.3ms=4.1ms (PC1213 pop) GND/PWM3 RGND VGA_PWROK @VGA@ PC1213 0.01U_0402_16V7K LGATE1 15 Css 12 PHASE1 TON GND GPU_FB 2 Switching frequency setting: Fsw=(Vin-0.5)/(2*Vin*Rton*3.2p)=304.89Khz 23W VGA@ PQ1205 VREF GPU_DSBL/ISEN1 GPU_COMP 11 @VGA@ PC1212 47P_0402_50V8J VGA@ PR1218 100_0402_1% Thermal monitoring: (VGPU_VREF-VTSNS)/PR23=VTSNS/Rth 10 REFIN TALERT/ISEN2 TSNS/ISEN3 GPU_TON 14 GPU_VREF @VGA@ PC1201 0.01UF_0402_25V7K 0_0402_5% +VGA_CORE 25 VCCSENSE_VGA GPU_REFIN @VGA@ PR1217 VGA@ PU1201 GPU_FBRTN VGA@ PR1215 100_0402_1% 20W U2_PHASE1 VGA@ PR1201 499K_0402_1% 2 25W 0V to 0.8V phase with CCM GPU_FBRTN 13 @VGA@ PR1214 0_0402_5% GPU_PSI C GPU_VID GPU_REFADJ 2 GT@ PC1209 2700P_0402_50V7K VGA@ PR1221 18.7K_0402_1% VSSSENSE_VGA 32W VGA@ PQ1201 VGA@ PC1219 1U_0402_6.3V6K 25W Config D PSI Voltage setting PSI Pull high on HW side GM@ PC1209 5600P_0402_50V7K @VGA@ PC1208 0.01U_0402_16V7K GT@ PR1209 18K_0402_1% GT@ PR1212 0_0402_5% GM@ PR1212 1.74K_0402_1% Rton 18.16W Boosted GPU Total at Tj=102C 0_0402_5% Rref2 GPU_B+ 18W GM@ PR1209 6.2K_0402_1% phase with DEM GT@PR1206 GT@PR1206 20K_0402_1% 35.5W N15V-GM Config B GPU_B+ Rrefadj Rboot 25.6W N15S-GT Config B Operation phase Number GT@ PR1204 20K_0402_1% GPU_HOT# 1 VGA@ PC1202 1U_0402_6.3V6K GM@ PR1205 0_0402_5% DGPU_VID @VGA@ PR1203 0_0402_5% GM@ PR1206 27K_0402_1% 25W N14P-GT Config B +3VS GM@ PR1204 7.5K_0402_1% 18.9W AON6554_DFN5X6-8-5 PWM VID and Output voltage control 1.Boot mode 2.Standby mode (don't support) 3.Normal mode Choke: 0.36uH (Size:10*10*4) Rdc=0.82mohm +-5% Heat Rating Current=37A Saturation Current=40A 13W AON6554_DFN5X6-8-5 Vboot 18W Vmax Voltage step 25W N14P-GS VGA@ PC1218 10U_0805_25V6K 0.9V 18W Config B 0.65V Rated TDP Power at Tj=102C N14P-GE 0.6V L-side MOS:AON6554 Rds(on): 3.2mohm@Vgs=10V 3~3.8mohm@Vgs=4.5V Id :85A@Ta=25 degC Config B VGA@ PC1217 10U_0805_25V6K 0.6V Vmin H-side MOS:AON6552 Rds(on): 5.6mohm@Vgs=10V 6.7mohm@Vgs=4.5V Id :20A@Ta=25 degC Config D Config B VGA_EMI@ PC1216 2200P_0402_50V7K Config C N14P-LP Config B AON6552_DFN5X6-8-5 Config B N14M-LP Config B N14P-GV2 Config A N14M-GS Config B PWM-VID Spec N14P-GV OpenVReg Configurations Vout=Vmin+N*Vstep VGA Chip Vmax=Vvref*Rref2/[(Rref1//Rrefadj)+Rboot+Rref2] VGA@ PC1206 10U_0805_25V6K Vmin= Vvref*[Rref2/(Rref2+Rboot)]*[Rt/(Rref1+Rt)] VGA@ PC1205 10U_0805_25V6K Rt=Rrefadj // (Rboot+Rref2) D VGA_EMI@ PC1204 2200P_0402_50V7K Vboot=Vvref*Rref2/(Rref1+Rref2+Rboot) C @VGA_EMI@ PC1203 0.1U_0402_25V6 A Module model information: RT8813A_V1A for IC module RT8813A_V1B for SW module B C Compal Electronics, Inc RT8813 Document Number Tuesday, May 27, 2014 D Sheet Rev 0.1 54 of 56 Issued Date B Security Classification 2013/12/26 2 Deciphered Date VGA@ PC1326 22U_0603_6.3V6M 2 VGA@ PC1328 22U_0603_6.3V6M 2014/12/26 2 Compal Secret Data Title Date: 2 @ PC1349 22U_0603_6.3V6M THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC @ PC1350 22U_0603_6.3V6M Tuesday, May 27, 2014 @ PC1351 22U_0603_6.3V6M @ PC1352 22U_0603_6.3V6M Sheet 55 @ PC1354 22U_0603_6.3V6M VGA@ PC1304 390U_2.5V_ESR10M_6.3X6 @ PC1353 22U_0603_6.3V6M Co-Lay @ PC1348 22U_0603_6.3V6M @ PC1303 330U_D2_2V_Y Under VGA Core VGA@ PC1330 22U_0603_6.3V6M VGA@ PC1314 4.7U_0603_6.3V6K VGA@ PC1313 4.7U_0603_6.3V6K VGA@ PC1312 4.7U_0603_6.3V6K VGA@ PC1311 4.7U_0603_6.3V6K VGA@ PC1310 4.7U_0603_6.3V6K VGA@ PC1309 4.7U_0603_6.3V6K VGA@ PC1308 4.7U_0603_6.3V6K VGA@ PC1307 4.7U_0603_6.3V6K VGA@ PC1329 22U_0603_6.3V6M VGA@ PC1306 4.7U_0603_6.3V6K VGA@ PC1302 560U_2.5V_M VGA@ PC1327 22U_0603_6.3V6M Co-Lay + VGA@ PC1347 4.7U_0603_6.3V6K 2 VGA@ PC1346 4.7U_0603_6.3V6K 1 + VGA@ PC1325 22U_0603_6.3V6M VGA@ PC1305 4.7U_0603_6.3V6K @ PC1301 560U_D2_2VM_R4.5M VGA@ PC1345 4.7U_0603_6.3V6K 2 + VGA@ PC1344 4.7U_0603_6.3V6K 1 VGA@ PC1324 22U_0603_6.3V6M C VGA@ PC1323 22U_0603_6.3V6M @ PC1321 4.7U_0603_6.3V6K @ PC1320 4.7U_0603_6.3V6K VGA@ PC1319 4.7U_0603_6.3V6K VGA@ PC1318 4.7U_0603_6.3V6K VGA@ PC1317 4.7U_0603_6.3V6K VGA@ PC1316 4.7U_0603_6.3V6K 2 VGA@ PC1322 22U_0603_6.3V6M + VGA@ PC1343 4.7U_0603_6.3V6K @ PC1340 1U_0402_6.3V6K @ PC1339 1U_0402_6.3V6K VGA@ PC1338 1U_0402_6.3V6K VGA@ PC1337 1U_0402_6.3V6K VGA@ PC1336 1U_0402_6.3V6K VGA@ PC1335 1U_0402_6.3V6K VGA@ PC1334 1U_0402_6.3V6K VGA@ PC1333 1U_0402_6.3V6K VGA@ PC1332 1U_0402_6.3V6K 2 VGA@ PC1315 4.7U_0603_6.3V6K 1 VGA@ PC1342 4.7U_0603_6.3V6K 1 +VGA_CORE VGA@ PC1341 4.7U_0603_6.3V6K 2 D VGA@ PC1331 1U_0402_6.3V6K +VGA_CORE D N15x Under 4.7uF_0603_15pcs stuff 1uF_0402_8pcs stuff Near 47uF_0805_0pcs 22uF_0805_14pcs stuff 4.7uF_0805_5pcs stuff +VGA_CORE Near VGA Core C N14x Under 4.7uF_0603_10pcs 0.1uF_0402_4pcs Near 47uF_0805_1pcs 22uF_0805_1pcs 4.7uF_0805_5pcs of B A A Compal Electronics, Inc VGA_CORE CAP Rev 0.1 56 Version change list (P.I.R List) Item D Fixed Issue Reason for change HW request Reduce ohm count Change VRAM voltage to raise VRAM sequence Improve CPU transient Reduce ohm count Component PN from M0 to 80 PG# Modify List 51 Change Change Change Change Change 53 51 Page of for PWR PR510, PR602, PR607, PR809, PR816, PR820 to R-short PR1006 to SD034240280 PR818 to SD034976280 PR601, PR1001, PR1003, PR1008 to R-short PC820 PN from SE0000006M0 to SE000000680 Date Phase 4/1 4/1 4/1 5/2 5/5 DVT DVT DVT PVT PVT D CPU low-side MOS selete 51 PQ804, PQ806, PQ808 from AON6414 change to AON6508 5/5 PVT CPU TAT show VR thermal Alrt 51 change PR819 from 3.42K to 5.62K (active from 96'C to 106'C) 5/12 PVT slewrate from ULV change to SV 51 PR808 from 16.9K to 3.24K (from 53mV/us to 12mV/us) 5/12 PVT CPU low-side MOS selete 51 PQ804, PQ806, PQ808 from AON6508 change to AON6554 5/15 PVT MEMO 10 Thermal team change PH1 setting 45 PR216 from 16.9K to 26.1K (92'C active change to 85'C active) 5/15 PVT MEMO C B C B 12 13 14 15 16 A 17 A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/12/26 2014/12/26 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: PIR (PWR) Rev 0.1 Sheet Tuesday, May 27, 2014 56 of 56 ... 91 93 95 97 99 10 1 10 3 10 5 10 7 10 9 11 1 11 3 11 5 11 7 11 9 12 1 12 3 12 5 12 7 12 9 13 1 13 3 13 5 13 7 13 9 14 1 14 3 14 5 14 7 14 9 15 1 15 3 15 5 15 7 15 9 16 1 16 3 16 5 16 7 16 9 17 1 17 3 17 5 17 7 17 9 18 1 18 3 18 5 18 7 18 9... 80 82 84 86 88 90 92 94 96 98 10 0 10 2 10 4 10 6 10 8 11 0 11 2 11 4 11 6 11 8 12 0 12 2 12 4 12 6 12 8 13 0 13 2 13 4 13 6 13 8 14 0 14 2 14 4 14 6 14 8 15 0 15 2 15 4 15 6 15 8 16 0 16 2 16 4 16 6 16 8 17 0 17 2 17 4 17 6 17 8 18 0. .. 81 83 85 87 89 91 93 95 97 99 10 1 10 3 10 5 10 7 10 9 11 1 11 3 11 5 11 7 11 9 12 1 12 3 12 5 12 7 12 9 13 1 13 3 13 5 13 7 13 9 14 1 14 3 14 5 14 7 14 9 15 1 15 3 15 5 15 7 15 9 16 1 16 3 16 5 16 7 16 9 17 1 17 3 17 5 17 7 17 9 18 1