acer aspire one aod255 aod255e aod260 aohappy compal la 6421p pav70 ddr3 rev 1 0 sch x 234

A B C D E 1 Compal Confidential 2 PAV70 DDR3 Schematics Document Intel Pineview Processor with Tigerpoint + DDRIII 2010-06-25 3 REV: 1.0 4 2006/08/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/8/18 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title Cover Page Size B Date: Document Number Rev 0.1 LA-6421P Friday, June 25, 2010 Sheet E of 39 A B C D Clock Generator CK505 page Compal Confidential Model Name : PAV50 File Name : LA-6421P E CRT Conn page 10 1 ZZZ RGB DA60000I610 LVDS LCD Conn page 1.5V DDRIII 667 22x22mm page Thermal Sensor Memory BUS(DDRIII) DDRIII-SO-DIMM Pineview FCBGA 559 PCB page 4,5,6 EMC1402 page DMI X2 mode GEN1 PCI-Express USB HDA Tigerpoint PCBGA360 MINI Card x1 3G page 15 WLAN BlueTooth page 15 17x17mm page 27 page 11,12,13,14 10/100 Ethernet page 20 SATA LPC BUS TPM USB Port x2(L) CMOS CAM HDD AR8152 page 26 page page 16 page 25 3G page 15 LPC BUS Transfermer USB Port x1(R) RJ45 ALC272 Power ON/OFF page 20 Aralia Codec page 22 Card Reader ENE6252 DC/DC Interface page 29 page 18 Int.KBD 3VALW/5VALW page 33 DC IN ENE KBC KB926page page 19 page 30 page 25 SPI 17 1.5VP/VCCP AMP & INT Speaker page 34 BATT IN page 31 SPI ROM 0.89VP/1.8VP 0.75VS CHARGER page 32 Light Sensor page 35 Touch Pad INT MIC HeadPhone & MIC Jack SD/MMC/MS CONN page 17 page19 page27 CPU_CORE page 36 2006/08/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/8/18 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title Block Diagrams Size B Date: Document Number Rev 0.1 LA-6421P Friday, June 25, 2010 Sheet E of 39 A B C D E 1 Voltage Rails External PCI Devices Power Plane Description S1 S3 S5 VIN Adapter power supply (19V) N/A N/A N/A B+ AC or battery power rail for power circuit N/A N/A N/A +CPU_CORE Core voltage for CPU ON OFF OFF DEVICE +0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF +VCCP VCCP switched power rail ON OFF OFF OFF +1.5VS 1.5V switched power rail ON OFF +1.5V 1.5V power rail for DDR ON ON OFF +0.89V Graphic core power rail ON OFF OFF +3VALW 3.3V always on power rail ON ON ON* +3VS 3.3V switched power rail ON OFF OFF +5VALW 5V always on power rail ON ON ON* +5VS 5V switched power rail ON OFF OFF +VSB VSB always on power rail ON ON ON* +RTCVCC RTC power ON ON ON IDSEL # REQ/GNT # PIRQ No PCI Device EC SM Bus1 address Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF EC SM Bus2 address Device Address Device Address Smart Battery 0001 011X b EMC1402 100_1100 SIGNAL SLP_S3# SLP_S4# SLP_S5# STATE +VALW +V +VS Clock HIGH ON ON ON ON HIGH HIGH ON ON ON LOW HIGH HIGH ON ON OFF OFF Full ON HIGH HIGH S1(Power On Suspend) HIGH LOW S3 (Suspend to RAM) S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF ICH7M SM Bus address BOARD ID Table(Page 17) VCC Ra 3.3V 100K ID BRD ID PAV50 R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP) R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP) Rb Vab-Min Vab-Typ Vab-Max 8.2K 18K 33K 56K 100K 200K NC 0V 0.216V 0.436V 0.712V 1.036V 1.453V 1.935V 2.500V 0V 0.250V 0.503V 0.819V 1.185V 1.650V 2.200V 3.3V 0V 0.289V 0.538V 0.875V 1.264V 1.759V 2.341V 3.3V Device Address Clock Generator (SLG8SP556VTR) 1101 001Xb DDR DIMMA 1010 000Xb 4 2006/08/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/8/18 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title Notes List Size B Date: Document Number Rev 0.1 LA-6421P Monday, May 03, 2010 Sheet E of 39 (7) DDR_A_DQS#[0 7] PINEVIEW_M U71 PINEVIEW_M (7) DDR_A_D[0 63] N475@ N475@ U71B U71A REV = 1.1 (7) DDR_A_DM[0 7] REV = 1.1 DMI_RX0_R DMI_RX#0_R DMI_RX1_R DMI_RX#1_R F3 F2 H4 G3 DMI_RXP_0 DMI_RXN_0 DMI_RXP_1 DMI_RXN_1 N7 N6 EXP_CLKINN EXP_CLKINP DMI_TXP_0 DMI_TXN_0 DMI_TXP_1 DMI_TXN_1 G2 G1 H3 J2 (7) DDR_A_DQS[0 7] DMI_TX0 (13) DMI_TX#0 (13) DMI_TX1 (13) DMI_TX#1 (13) (7) DDR_A_MA[0 14] DMI N455@ DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 D (8) CLK_CPU_EXP# (8) CLK_CPU_EXP R10 R9 N10 N9 EXP_RCOMPO EXP_ICOMPI EXP_RBIAS L10 L9 L8 RSVD_TP RSVD_TP N11 P11 EXP_TCLKINN EXP_TCLKINP RSVD RSVD R162 R203 49.9_0402_1% 750_0402_1% T38 T39 Must be placed within 500 mils from Pineview-M pins (7) DDR_A_WE# (7) DDR_A_CAS# (7) DDR_A_RAS# U71 K2 J1 M4 L3 RSVD RSVD RSVD RSVD N550@ RSVD RSVD RSVD RSVD K3 L2 M2 N2 (7) DDR_A_BS0 (7) DDR_A_BS1 (7) DDR_A_BS2 (7) DDR_CS#0 (7) DDR_CS#1 JP16 (5) (5) DMI_RX#0 DMI_RX0_R 0.1U_0402_10V7K DMI_RX#0_R 0.1U_0402_10V7K DMI_RX1_R 0.1U_0402_10V7K C (13) (13) C437 DMI_RX1 C438 DMI_RX#1 XDP_BPM#3 XDP_BPM#2 (5) (5) XDP_BPM#1 XDP_BPM#0 XDP_BPM#1 XDP_BPM#0 (8) (8) +VCCP (5,13,15,17,25,26,27) R354 R347 CPU_ITP CPU_ITP# @2 1K_0402_5% @2 1K_0402_5% PLTRST# R348 @2 1K_0402_1% PLTRST# (5) (5) (5) (5) Close to CPU XDP_PREQ# XDP_PRDY# XDP_BPM#3 XDP_BPM#2 (5,13) H_PWRGD (13) SLPIOVR# DMI_RX#1_R 0.1U_0402_10V7K XDP_TDO XDP_TRST# XDP_TDI XDP_TMS (5) XDP_TCK XDP_TDO XDP_TRST# XDP_TDI XDP_TMS XDP_TCK 2010-1-18 modify 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 (7) DDR_CKE0 (7) DDR_CKE1 (7) M_ODT0 (7) M_ODT1 (7) (7) (7) (7) DDR_CS#0 DDR_CS#1 AH22 AK25 AJ21 AJ25 DDR_A_CS#_0 DDR_A_CS#_1 DDR_A_CS#_2 DDR_A_CS#_3 DDR_CKE0 DDR_CKE1 AH10 AH9 AK10 AJ8 DDR_A_CKE_0 DDR_A_CKE_1 DDR_A_CKE_2 DDR_A_CKE_3 M_ODT0 M_ODT1 AK24 AH26 AH24 AK27 DDR_A_ODT_0 DDR_A_ODT_1 DDR_A_ODT_2 DDR_A_ODT_3 DRAMRST# (7) DRAM_PWROK 51 +-1% 0402 XDP_TMS R342 51 +-1% 0402 XDP_TDO R343 51 +-1% 0402 XDP_PREQ# R344 51 +-1% 0402 +1.5V R50 1K_0402_1% XDP_TRST# R345 51 +-1% 0402 XDP_TCK R346 51 +-1% 0402 R142 Modify D38 D39 D40 Pin define R256 10K_0402_5% +VCC_FAN1 (17) FAN_SPEED1 C311 3G@ 100P_0402_50V8J JP12 3 40mil R370 0_0402_5% @ T40 T41 AB11 AB13 AL28 AK28 AJ26 AK29 DDR_VREF DDR_RPD DDR_RPU RSVD AC4 AC1 AF4 AG2 AB2 AB3 AE2 AE3 DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_DQS_1 DDR_A_DQS#_1 DDR_A_DM_1 AB8 AD7 AA9 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DM1 DDR_A_DQ_8 DDR_A_DQ_9 DDR_A_DQ_10 DDR_A_DQ_11 DDR_A_DQ_12 DDR_A_DQ_13 DDR_A_DQ_14 DDR_A_DQ_15 AB6 AB7 AE5 AG5 AA5 AB5 AB9 AD6 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_DQS_2 DDR_A_DQS#_2 DDR_A_DM_2 AD8 AD10 AE8 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DM2 DDR_A_DQ_16 DDR_A_DQ_17 DDR_A_DQ_18 DDR_A_DQ_19 DDR_A_DQ_20 DDR_A_DQ_21 DDR_A_DQ_22 DDR_A_DQ_23 AG8 AG7 AF10 AG11 AF7 AF8 AD11 AE10 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_DQS_3 DDR_A_DQS#_3 DDR_A_DM_3 AK5 AK3 AJ3 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DM3 DDR_A_DQ_24 DDR_A_DQ_25 DDR_A_DQ_26 DDR_A_DQ_27 DDR_A_DQ_28 DDR_A_DQ_29 DDR_A_DQ_30 DDR_A_DQ_31 AH1 AJ2 AK6 AJ7 AF3 AH2 AL5 AJ6 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 AG22 AG21 AD19 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DM4 AE19 AG19 AF22 AD22 AG17 AF19 AE21 AD21 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 AE26 AG27 AJ27 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DM5 AE24 AG25 AD25 AD24 AC22 AG24 AD27 AE27 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 AE30 AF29 AF30 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DM6 AG31 AG30 AD30 AD29 AJ30 AJ29 AE29 AD28 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 AB27 AA27 AB26 DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DM7 AA24 AB25 W24 W22 AB24 AB23 AA23 W27 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_A_DQS_6 DDR_A_DQS#_6 DDR_A_DM_6 C440 0.01U_0402_16V7K DDR_A DDR_A_DQ_48 DDR_A_DQ_49 DDR_A_DQ_50 DDR_A_DQ_51 DDR_A_DQ_52 DDR_A_DQ_53 DDR_A_DQ_54 DDR_A_DQ_55 08/13 DDR_A_DQS_7 DDR_A_DQS#_7 DDR_A_DM_7 G1 G2 ACES_85204-03001 CONN@ DDR_A_DQ_56 DDR_A_DQ_57 DDR_A_DQ_58 DDR_A_DQ_59 DDR_A_DQ_60 DDR_A_DQ_61 DDR_A_DQ_62 DDR_A_DQ_63 D C B A OF PINEVIEW-M_FCBGA8559 Add 2009-6-17 2006/08/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/8/18 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC DDR_A_DQ_0 DDR_A_DQ_1 DDR_A_DQ_2 DDR_A_DQ_3 DDR_A_DQ_4 DDR_A_DQ_5 DDR_A_DQ_6 DDR_A_DQ_7 DDR_A_DQ_40 DDR_A_DQ_41 DDR_A_DQ_42 DDR_A_DQ_43 DDR_A_DQ_44 DDR_A_DQ_45 DDR_A_DQ_46 DDR_A_DQ_47 RSVD_TP RSVD_TP PJDLC05C_SOT23-3 D40 C1150 1000P_0402_50V7K A 4.7U_0603_6.3V6K C1151 +3VS 0.01U_0402_16V7K XDP_TRST# XDP_TDI PJDLC05C_SOT23-3 4.7U_0603_6.3V6K C313 1 DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DM0 DDR_A_DQS_5 DDR_A_DQS#_5 DDR_A_DM_5 D39 APL5607KI-TRG_SO8 RSVD RSVD D38 C314 PJDLC05C_SOT23-3 +VCC_FAN1 R47 330_0402_5% DRAM_PWROK AB4 DRAMRST#_R AK8 XDP_PREQ# XDP_TDO U12 AD3 AD2 AD4 DDR_A_DQ_32 DDR_A_DQ_33 DDR_A_DQ_34 DDR_A_DQ_35 DDR_A_DQ_36 DDR_A_DQ_37 DDR_A_DQ_38 DDR_A_DQ_39 XDP_TMS XDP_TCK D19@ DAN217_SC59 GND GND GND GND DDR_A_DQS_0 DDR_A_DQS#_0 DDR_A_DM_0 DDR_A_DQS_4 DDR_A_DQS#_4 DDR_A_DM_4 2.2U_0603_10V6K +5VS EN VIN VOUT VSET DDR_A_CK_3 DDR_A_CK_3# DDR_A_CK_4 DDR_A_CK_4# RSVD RSVD RSVD RSVD 1 AC15 AD15 AF13 AG13 AD17 AC17 AB15 AB17 R243 R242 80.6_0402_1% 80.6_0402_1% C439 1K_0402_1% Modify follow KAV60 schematic 06/12 C312 DDR_A_CK_0 DDR_A_CK_0# DDR_A_CK_1 DDR_A_CK_1# +1.5V 2 +5VS FAN1 Conn DDR_A_WE# DDR_A_CAS# DDR_A_RAS# AG15 AF15 AD13 AC13 R341 B EN_FAN1 DDR_A_BS_0 DDR_A_BS_1 DDR_A_BS_2 ''5DGG +VCCP XDP_TDI 0_0402_5% (17) AJ20 AH20 AK11 M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1 M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1 (7) DRAM_PWROK DRAMRST# DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 CONN@ 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 G1 G2 XDP Reserve R1412 10K_0402_5% R1413 DRAMRST#_R AK22 AJ22 AK21 ACES_87151-24051 +1.5V @ DDR_A_WE# DDR_A_CAS# DDR_A_RAS# C436 XDP_PREQ# XDP_PRDY# (5) (5) 0.1U_0402_10V7K (13) C435 DMI_RX0 DDR_A_MA_0 DDR_A_MA_1 DDR_A_MA_2 DDR_A_MA_3 DDR_A_MA_4 DDR_A_MA_5 DDR_A_MA_6 DDR_A_MA_7 DDR_A_MA_8 DDR_A_MA_9 DDR_A_MA_10 DDR_A_MA_11 DDR_A_MA_12 DDR_A_MA_13 DDR_A_MA_14 OF PINEVIEW-M_FCBGA8559 (13) AH19 AJ18 AK18 AK16 AJ14 AH14 AK14 AJ12 AH13 AK12 AK20 AH12 AJ11 AJ24 AJ10 Title Pineview(1/3) Size Document Number Custom Date: Rev 0.1 LA-6421P Monday, June 28, 2010 Sheet of 39 Add 470PF on H_SMI# for known issue 07/08 N475@ PINEVIEW_M U71C CRT_HSYNC CRT_VSYNC M30 GMCH_CRT_HSYNC_R M29 GMCH_CRT_VSYNC_R CRT_RED CRT_GREEN CRT_BLUE CRT_IRTN N31 P30 P29 N30 CRT_DDC_DATA CRT_DDC_CLK L31 L30 DAC_IREF P28 Y30 Y29 AA30 AA31 REFCLKINP REFCLKINN REFSSCLKINP REFSSCLKINN K29 J30 L5 AA3 W8 W9 HPL_CLKINN HPL_CLKINP C T22 T23 T24 T25 AA21 W21 T21 V21 RSVD_TP RSVD_TP RSVD_TP RSVD_TP GMCH_CRT_HSYNC GMCH_CRT_VSYNC CPU_DREFCLK CPU_DREFCLK# CPU_SSCDREFCLK CPU_SSCDREFCLK# PM_EXTTS#1 PM_EXTTS#0 H_PW ROK PLTRST# (10) (10) (9) (9) (9) (9) (9) (9) (9) (9) LVDS_ACLK# LVDS_ACLK LVDS_A0# LVDS_A0 LVDS_A1# LVDS_A1 LVDS_A2# LVDS_A2 R151 2.37K_0402_1% CPU_DREFCLK (8) CPU_DREFCLK# (8) CPU_SSCDREFCLK (8) CPU_SSCDREFCLK# (8) GMCH_ENBKL (17) GMCH_ENBKL (9,17) INVT_PW M Add INVT_PWM (9) 0_0402_5% R200 N475@ PINEVIEW_M U71D 0_0402_5% R213 @ 05/11 LVDS_SCL (9) LVDS_SDA (9) GMCH_ENVDD PM_DPRSLPVR (13) U25 U26 R23 R24 N26 N27 R26 R27 LA_CLKN LA_CLKP LA_DATAN_0 LA_DATAP_0 LA_DATAN_1 LA_DATAP_1 LA_DATAN_2 LA_DATAP_2 R22 J28 N22 N23 L27 L26 L23 K25 K23 K24 H26 LIBG LVBG LVREFH LVREFL LBKLT_EN LBKLT_CTL LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN PM_EXTTS#0 (7) C1171 470P_0402_50V7K REV = 1.1 GMCH_CRT_R (10) GMCH_CRT_G (10) GMCH_CRT_B (10) GMCH_CRT_DATA (10) GMCH_CRT_CLK (10) R201 665_0402_1% SMI# A20M# FERR# LINT0 LINT1 IGNNE# STPCLK# E7 H7 H6 F10 F11 E5 F8 H_SMI# H_A20M# H_FERR# H_INTR H_NMI H_IGNNE# H_STPCLK# DPRSTP# DPSLP# INIT# PRDY# PREQ# G6 G10 G8 E11 F15 H_DPRSTP# H_DPSLP# H_INIT# XDP_PRDY# XDP_PREQ# THERMTRIP# E13 H_THERMTRIP# PROCHOT# CPUPWRGOOD C18 W1 H_PROCHOT# H_PW RGD GTLREF VSS A13 H27 H_GTLREF RSVD RSVD L6 E17 BCLKN BCLKP H10 J10 BSEL_0 BSEL_1 BSEL_2 K5 H5 K6 CPU_BSEL0 CPU_BSEL1 CPU_BSEL2 VID_0 VID_1 VID_2 VID_3 VID_4 VID_5 VID_6 H30 H29 H28 G30 G29 F29 E29 CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 RSVD RSVD RSVD RSVD L7 D20 H13 D18 RSVD_TP RSVD_TP EXTBGREF K9 D19 K7 D H_SMI# (12) H_A20M# (12) H_FERR# (12) H_INTR (12) H_NMI (12) H_IGNNE# (12) H_STPCLK# (12) H_DPRSTP# (13) H_DPSLP# (13) H_INIT# (12) XDP_PRDY# (4) XDP_PREQ# (4) H_THERMTRIP# (12) H_PW RGD (4,13) PLTRST# (4,13,15,17,25,26,27) CLK_CPU_HPLCLK# CLK_CPU_HPLCLK CLK_CPU_HPLCLK# (8) CLK_CPU_HPLCLK (8) Del R323 05/11 C Modify 08/04 MISC AA7 AA6 R5 R6 GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B @ 15_0402_5% 2 15_0402_5% RSVD PM_EXTTS#_1/DPRSLPVR PM_EXTTS#_0 PWROK RSTIN# T18 T19 T20 T21 R249 1 R247 ICH R1378 REV = 1.1 RSVD_TP RSVD_TP RSVD_TP RSVD_TP H_PW ROK R305 @ VGATE 0_0402_5% R306 (4) (4) (4) (4) (8,13,17,36) G11 E15 G13 F13 XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 T48 T49 T50 T51 PCH_POK (13,17) 0_0402_5% (4) (4) (4) (4) (4) XDP_TDI XDP_TDO XDP_TCK XDP_TMS XDP_TRST# T55 XDP_TDI XDP_TDO XDP_TCK XDP_TMS XDP_TRST# H_THERMDA H_THERMDC B Place closed to chipset OF GMCH_CRT_R PINEVIEW-M_FCBGA8559 GMCH_CRT_G GMCH_CRT_B GMCH_ENBKL R307 150_0402_1% R308 150_0402_1% R309 150_0402_1% R34 100K_0402_5% T58 XDP_TCK T59 XDP_TDI T60 XDP_TDO T61 XDP_TMS T62 XDP_TRST# T63 H_PW RGD BPM_1_0# BPM_1_1# BPM_1_2# BPM_1_3# B18 B20 C20 B21 BPM_2_0#/RSVD BPM_2_1#/RSVD BPM_2_2#/RSVD BPM_2_3#/RSVD G5 D14 D13 B14 C14 C16 RSVD TDI TDO TCK TMS TRST# D30 E30 THRMDA_1 THRMDC_1 C30 D31 CPU L11 D XDP_RSVD_00 XDP_RSVD_01 XDP_RSVD_02 XDP_RSVD_03 XDP_RSVD_04 XDP_RSVD_05 XDP_RSVD_06 XDP_RSVD_07 XDP_RSVD_08 XDP_RSVD_09 XDP_RSVD_10 XDP_RSVD_11 XDP_RSVD_12 XDP_RSVD_13 XDP_RSVD_14 XDP_RSVD_15 XDP_RSVD_16 XDP_RSVD_17 LVDS T37 T2 T12 T3 T4 T13 T5 T6 T7 T14 VGA T8 1K_0402_5% T15 T9 T16 T10 T17 T11 T28 D12 A7 D6 C5 C7 C6 D8 B7 A9 D9 C8 B8 C10 D10 B11 B10 B12 C11 CLK_CPU_BCLK# CLK_CPU_BCLK CLK_CPU_BCLK# (8) CLK_CPU_BCLK (8) CPU_BSEL0 (8) CPU_BSEL1 (8) CPU_BSEL2 (8) CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 (36) (36) (36) (36) (36) (36) (36) T26 T27 H_EXTBGREF B THRMDA_2/RSVD THRMDC_2/RSVD OF PINEVIEW-M_FCBGA8559 +VCCP +VCCP H_THERMDA, H_THERMDC routing together Trace width / Spacing = 10 / 10 mil A VDD H_THERMDA DP H_THERMDC 2200P_0402_50V7K DN THERM# EC_SMB_CK2 SMDATA EC_SMB_DA2 ALERT# GND SMCLK Close to Processor pin EC_SMB_CK2 (17,27) Close to Processor pin EC_SMB_DA2 (17,27) R58 10K_0402_5% 2006/08/18 Deciphered Date R156 3.3K_0402_1% Compal Electronics, Inc 2007/8/18 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC placed within 0.5" of processor pin placed within 0.5" of processor pin Compal Secret Data Security Classification R155 2K_0402_1% +3VS Issued Date Address:100_1100 @ C940 PM_EXTTS#0 EMC1402-1-ACZL-TR MSOP 8P SENSOR H_PROCHOT# 1U_0603_10V6K U2 @ C939 C80 1U_0603_10V6K H_GTLREF R202 68_0402_5% R143 10K_0402_5% C79 H_EXTBGREF CPU THERMAL SENSOR 0.1U_0402_16V4Z +3VS R244 976_0402_1% R144 1K_0402_1% +VCCP +3VS Title Pineview(2/3) Size B Date: Document Number Rev 0.1 LA-6421P Thursday, June 03, 2010 Sheet of 39 A U71F N475@ +CPU_CORE U71E GFX supply current: 2.64A PINEVIEW_M +0.89V VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC REV = 1.1 VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX CPU T13 T14 T16 T18 T19 V13 V19 W14 W16 W18 W19 GFX/MCH D DDR supply current 2.27A +1.5V 2 2 AK13 AK19 AK9 AL11 AL16 AL21 AL25 1U_0402_6.3V6K C85 1U_0402_6.3V6K C84 AK7 AL7 +VCCP VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCCK_DDR VCCCK_DDR C428 2 C243 C236 2 AA10 AA11 VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR C1154 C1152 1 C1153 2 2 VCCSENSE VSSSENSE VCCA VCCP VCCP C29 B29 Y2 + C278 C275 330U 2.5V Y 2 330U 2.5V Y 1U_0402_6.3V6K 22UF 6.3V M X5R 0805 1U_0402_6.3V6K PLACE IN CAVITY +VCCP C1161 1 C1160 0.1U_0402_10V6K C86 1U_0402_6.3V6K 0.1U_0402_10V6K 2 Close U71.D4 R20 +RING_EAST 0_0603_5% +CPU_CORE VCCSENSE VSSSENSE R32 100_0402_1% VCCSENSE VSSSENSE R21 R31 100_0402_1% +RING_WEST 0_0603_5% VCCSENSE (36) VSSSENSE (36) +1.5VS +VCCPProcessor C242 1U_0603_10V6K R28 0_0805_5% VCCACK_DDR VCCACK_DDR + 22UF 6.3V M X5R 0805 C64 1U_0603_10V6K VCCP AA19 C431 x 330uF(9mohm/2) POWER 1U_0603_10V6K C55 1 C430 22UF 6.3V M X5R 0805 DDR @ 4.7U_0603_6.3V6K 22UF 6.3V M X5R 0805 C238 U10 U5 U6 U7 U8 U9 V2 V3 V4 W10 W11 1U_0402_6.3V6K C429 DDR analog supply current: 1.32A 1U_0402_6.3V6K 22UF 6.3V M X5R 0805 C267 C83 1U_0402_6.3V6K +1.5V C 1U_0402_6.3V6K 22UF 6.3V M X5R 0805 C268 C82 1 +CPU_CORE 1U_0402_6.3V6K A23 A25 A27 B23 B24 B25 B26 B27 C24 C26 D23 D24 D26 D28 E22 E24 E27 F21 F22 F25 G19 G21 G24 H17 H19 H22 H24 J17 J19 J21 J22 K15 K17 K21 L14 L16 L19 L21 N14 N16 N19 N21 A11 A16 A19 A29 A3 A30 A4 AA13 AA14 AA16 AA18 AA2 AA22 AA25 AA26 AA29 AA8 AB19 AB21 AB28 AB29 AB30 AC10 AC11 AC19 AC2 AC21 AC28 AC30 AD26 AD5 AE1 AE11 AE13 AE15 AE17 AE22 AE31 AF11 AF17 AF21 AF24 AF28 AG10 AG3 AH18 AH23 AH28 AH4 AH6 AH8 AJ1 AJ16 AJ31 AK1 AK2 AK23 AK30 AK31 AL13 AL19 AL2 AL23 AL29 AL3 AL30 AL9 B13 B16 B19 B22 B30 B31 B5 B9 C1 C12 C21 C22 C25 C31 D22 E1 E10 E19 E21 E25 E8 F17 F19 2 C241 1U_0603_10V6K +VCC_DMI 1 1U_0603_10V6K C68 C237 1U_0603_10V6K 2 Core analog supply current: 0.08A C391 0.01U_0402_16V7K D4 B4 B3 Legacy I/O supply current: 0.42A VCCD_AB_DPL B +1.8VS V11 AC31 VCCALVDS VCCDLVDS +VCC_CRT_DAC T30 DAC & GIO & LGI supply current: 0.19A +RING_EAST +RING_WEST +VCCP T31 J31 C3 B2 C2 A21 VCCACRTDAC VCC_GIO VCCRING_EAST VCCRING_WEST VCCRING_WEST VCCRING_WEST VCC_LGI VCCA_DMI VCCA_DMI VCCA_DMI RSVD VCCSFR_DMIHMPLL VCCP P2 AA1 DMI analog & PLL supply current: 0.54A +DMI_HMPLL +DMI_HMPLL R18 0_0603_5% T56 Display PLL & DMIHMPLL supply current: 0.18A E2 +VCCP C1162 R26 100NH +-5% LL1608-FSLR10J 0.1U_0402_10V6K C239 10U_0805_10V4Z C69 1U_0603_10V6K C56 1 1 Modify to 2.2U 05/11 2 2 2 2 Close Chipset pin VSS F24 F28 F4 G15 G17 G22 G27 G31 H11 H15 H2 H21 H25 H8 J11 J13 J15 J4 K11 K13 K19 K26 K27 K28 K30 K4 K8 L1 L13 L18 L22 L24 L25 L29 M28 M3 N1 N13 N18 N24 N25 N28 N4 N5 N8 P13 P14 P16 P18 P19 P21 P3 P4 R25 R7 R8 T11 U22 U23 U24 U27 V14 V16 V18 V28 V29 W13 W2 W23 W25 W26 W28 W30 W4 W5 W6 W7 Y28 Y3 Y4 D C B T29 OF PINEVIEW-M_FCBGA8559 del C1218 2010/04/14 Add C1217 2010/03/25 C235 1U_0603_10V6K Compal Electronics, Inc Compal Secret Data Security Classification 2006/08/18 Issued Date A +VCC_DLVD 2007/8/18 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS Follow Intel check list change to 22uF 06/06 R27 0_0603_5% VSS VSS VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS C1155 1U_0603_10V6K C1217 0.1U_0402_10V6K C400 10U_0603_6.3V6M 1U_0402_6.3V6K C77 1U_0402_6.3V6K C78 1U_0402_6.3V6K C75 1U_0402_6.3V6K C76 1U_0402_6.3V6K C70 1U_0402_6.3V6K C71 1U_0402_6.3V6K C81 REV = 1.1 +VCC_ALVD 1 H1.25 22UF 6.3V M X5R 0805 C74 2.2U_0603_10V6K +VCC_DMI T1 T2 T3 OF PINEVIEW-M_FCBGA8559 +0.89V +1.8VS CRT DAC & LVDS supply current: 0.15A R25 +VCC_CRT_DAC MBK1608601YZF_2P LGI &DPLL supply current: 0.06A A +VCC_ALVD +VCC_DLVD V30 W31 LVDS VCCSFR_AB_DPL DMI +3VS C189 1U_0603_10V6K 1U_0603_10V6K C192 EXP\CRT\PLL R321 0_0603_5% VCCD_HMPLL N475@ PINEVIEW_M GND Title Pineview(3/3) Size Document Number Custom Date: Rev 0.1 LA-6421P Tuesday, June 22, 2010 Sheet of 39 +1.5V +1.5V (4) DDR_A_DQS#[0 7] (4) DDR_A_D[0 63] JDIM1 +DDR_VREF_DQ ''5PRGLI\ DDR_A_D0 DDR_A_D1 C112 1 C Q39 Q38 B 1K_0402_1% MMBT3904_SOT23 @ DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2 R1418 0_0402_5% B E (13,17) PM_SLP_S4# C C1191 0_0402_5% 1U_0402_6.3V4Z @ DDR_A_DQS#1 DDR_A_DQS1 DDR_A_D10 DDR_A_D11 R1417 1K_0402_1% R1421 DDR_A_D8 DDR_A_D9 R1416 DDR_A_D2 DDR_A_D3 C1192 0.1U_0402_10V7K DRAM_PWROK (4) DRAM_PWROK DDR_A_DM0 2 R1415 10K_0402_5% 0.1U_0402_16V4Z D C111 2.2U_0402_6.3VM +1.5V +5VALW DDR_A_D18 DDR_A_D19 +1.5V_PG DDR_A_D24 DDR_A_D25 +1.5V_PG (34) E DDR_A_DM3 MMBT3904_SOT23 DDR_A_D26 DDR_A_D27 R1422 (17,29,34) SYSON 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 205 G1 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 (4) DDR_A_DM[0 7] DDR_A_D4 DDR_A_D5 (4) DDR_A_DQS[0 7] (4) DDR_A_MA[0 14] DDR_A_DQS#0 DDR_A_DQS0 DDR_A_D6 DDR_A_D7 D DDR_A_D12 DDR_A_D13 DDR_A_DM1 DRAMRST# DRAMRST# (4) DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D21 DDR_A_DM2 DDR_A_D22 DDR_A_D23 DDR_A_D28 DDR_A_D29 DDR_A_DQS#3 DDR_A_DQS3 DDR_A_D30 DDR_A_D31 1K_0402_1% (4) DDR_CKE0 DDR_CKE0 DDR_A_BS2 DDR_A_BS2 C (4) DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 Layout Note: Place near JDIMM1 +1.5V (4) DDR_A_BS0 DDR_A_MA10 DDR_A_BS0 (4) DDR_A_WE# (4) DDR_A_CAS# DDR_A_WE# DDR_A_CAS# (4) DDR_A_MA13 DDR_CS#1 DDR_CS#1 C1197 C1196 0.1U_0402_16V4Z 0.1U_0402_16V4Z C107 C108 0.1U_0402_16V4Z C105 0.1U_0402_16V4Z C106 C1195 0.1U_0402_16V4Z 0.1U_0402_16V4Z C130 C109 2.2U_0603_6.3V6K~D 2.2U_0603_6.3V6K~D C110 2.2U_0603_6.3V6K~D C129 C128 2.2U_0603_6.3V6K~D 2.2U_0603_6.3V6K~D 2.2U_0603_6.3V6K~D + C1194 330U 2.5V Y M_CLK_DDR0 M_CLK_DDR#0 (4) M_CLK_DDR0 (4) M_CLK_DDR#0 DDR_A_D32 DDR_A_D33 DDR_A_DQS#4 DDR_A_DQS4 DDR_A_D40 DDR_A_D41 DDR_A_DM5 +1.5V R1424 R1425 C115 1K_0402_1% DDR_A_D50 DDR_A_D51 Layout Note: Place near JDIMM1.1 DDR_A_D56 DDR_A_D57 DDR_A_DM7 Change C116,C141 to SE076104K80 2010/04/06 +1.5V +3VS C116 +DDR_VREF_CA 1K_0402_1% R1427 C117 1K_0402_1% 0.1U_0402_16V4Z 10K_0402_5% 1 Layout Note: Place near JDIMM1.126 G2 206 2006/08/18 C DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 M_CLK_DDR1 M_CLK_DDR#1 M_CLK_DDR1 (4) M_CLK_DDR#1 (4) DDR_A_BS1 DDR_A_RAS# DDR_A_BS1 (4) DDR_A_RAS# (4) DDR_CS#0 M_ODT0 DDR_CS#0 (4) M_ODT0 (4) M_ODT1 M_ODT1 (4) +DDR_VREF_CA DDR_A_D36 DDR_A_D37 DDR_A_DM4 C1199 DDR_A_D38 DDR_A_D39 DDR_A_D44 DDR_A_D45 DDR_A_DQS#5 DDR_A_DQS5 C1198 2 B DDR_A_D46 DDR_A_D47 DDR_A_D52 DDR_A_D53 DDR_A_DM6 DDR_A_D54 DDR_A_D55 DDR_A_D60 DDR_A_D61 DDR_A_DQS#7 DDR_A_DQS7 DDR_A_D62 DDR_A_D63 PM_EXTTS#0 CLK_SMBDATA CLK_SMBCLK FOX_AS0A626-U4RN-7F PM_EXTTS#0 (5) CLK_SMBDATA (8,15,27) CLK_SMBCLK (8,15,27) +0.75VS A DIMM_A(REV) 4H Compal Electronics, Inc 2007/8/18 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC DDR_CKE1 (4) DDR_A_MA14 Compal Secret Data Security Classification Issued Date R66 10K_0402_5% R1426 A DDR_A_D58 DDR_A_D59 R65 1U_0402_16V7K C1204 0.1U_0402_16V4Z C1203 0.1U_0402_16V4Z C1202 0.1U_0402_16V4Z C1201 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_A_DQS#6 DDR_A_DQS6 +0.75VS DDR_A_D48 DDR_A_D49 +DDR_VREF_DQ 1K_0402_1% 1U_0402_16V7K C141 Layout Note: Place near JDIMM1.203 & JDIMM1.204 DDR_A_D42 DDR_A_D43 DDR_CKE1 2.2U_0402_6.3VM DDR_A_D34 DDR_A_D35 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 0.1U_0402_16V4Z B CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 Title DDR3-SODIMMA Size B Date: Document Number Rev 0.1 LA-6421P Tuesday, June 22, 2010 Sheet of 39 Change C174 C175 to 10U_0603 05/14 FSB FSA CLKSEL2 CLKSEL1 CLKSEL0 CPU MHz SRC MHz PCI MHz REF MHz DOT_96 USB MHz MHz R137 0_0603_5% +3VS C1145 0 266 100 33.3 14.318 96.0 48.0 0 133 100 33.3 14.318 96.0 48.0 200 100 33.3 14.318 96.0 48.0 +3VS 1 47P_0402_50V8J C174 C172 10U_0603_6.3V6M 0.1U_0402_16V4Z 2 C138 0.1U_0402_16V4Z C148 R72 0.1U_0402_16V4Z +1.05VM_CK505 1 166 100 33.3 14.318 96.0 C1146 48.0 1 D 0 333 100 33.3 14.318 96.0 47P_0402_50V8J 48.0 1 100 100 33.3 14.318 96.0 48.0 1 400 100 33.3 14.318 96.0 48.0 1 0.1U_0402_16V4Z 10U_0603_6.3V6M R1348 @ +3VM_CK505 R1349 +1.5VS 1 CLK_EN 55 47P_0402_50V8J 0.1U_0402_16V4Z 1 C140 C160 C1119 C169 12 C1147 Q31 10U_0603_6.3V6M 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 72 19 27 R1350 DTC115EUA_SC70-3 +VCCP 0_0402_5% @ +1.05VM_CK505 66 31 R1351 +1.5VS +VCCP 0_0402_5% 62 1 &KDQJH&&WRW\SH C173 52 0.1U_0402_16V4Z 23 R68 @ CPU_BSEL0 R69 0_0402_5% GHO&5 C1221 10P_0402_50V8J FSA R75 33_0402_5% FSB (13) CLK_PCH_48M (5) 38 470_0402_5% R104 33_0402_5% (13) CLK_PCH_14M R73 2 C137 0.1U_0402_16V4Z C390 1K_0402_5% @ (5,13,17,36) FSC 10P_0402_50V8J @ (13) 2 R119 0_0402_5% VGATE CLK_SMBDATA CLK_SMBCLK 71 CLK_CPU_BCLK 70 CLK_CPU_BCLK# 68 CLK_CPU_HPLCLK 67 CLK_CPU_HPLCLK# 24 CLK_CPU_DREFCLK 25 CLK_CPU_DREFCLK# LCDCLK/27M 28 CPU_SSCDREFCLK LCDCLK#/27M_SS 29 CPU_SSCDREFCLK# VDD_PCI CPU_0 VDD_CPU CPU_0# VDD_48 CPU_1 VDD_PLL3 CPU_1# VDD_CPU_IO SRC_0/DOT_96 VDD_PLL3_IO SRC_0#/DOT_96# VDD_SRC_IO VDD_SRC_IO 54 (27) CLK_PCI_TPM (17) CLK_PCI_LPC CPU_BSEL2 R84 0_0402_5% 470_0402_5% : : : : DOT96 / DOT96# LCDCLK / LCDCLK# SRC_0 / SRC_0# 27M/27M_SS 10P_0402_50V8J For PCI4_SEL, = Pin24/25 Pin28/29 = Pin24/25 Pin28/29 15P 50V J NPO 0402 (5) R98 10K_0402_5% C389 For ITP_EN, =SRC8/SRC8#; = ITP/ITP# R80 PCI2_TME 14 22_0402_5% 33_0402_5% 33_0402_5% 15 PCI4_SEL 16 ITP_EN 17 VDD_SRC_IO SRC_2 USB_0/FS_A 22 CLK_XTAL_IN 57 CLK_PCIE_SATA 56 CLK_PCIE_SATA# 61 CLK_PCIE_PCH SRC_7# 60 CLK_PCIE_PCH# SRC_8/CPU_ITP 64 CPU_ITP SRC_8#/CPU_ITP# 63 CPU_ITP# (4) 33P 50V J NPO 0402 Y1 R71 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% ITP_EN NC SRC_6 (26) CLK_PCIE_WLAN# (26) SRC_7 PCI_STOP# XTAL_IN XTAL_OUT PCI_1 SRC_9 PCI_2 SRC_9# PCI_3 SRC_10 PCI_4/SEL_LCDCL SRC_10# 44 CLK_CPU_EXP 45 CLK_CPU_EXP# 50 CLK_PCIE_LAN 51 CLK_PCIE_LAN# 48 CLK_PCIE_WWAN 47 CLK_PCIE_WWAN# CLK_PCIE_SATA (12) CLK_PCIE_SATA# CLK_PCIE_PCH (12) Modify CLK SRC Port list 05/12 (13) CLK_PCIE_PCH# (13) B (4) +3VS CLK_CPU_EXP (4) Add R107 05/04 CLK_CPU_EXP# (4) CLK_PCIE_LAN (25) CLK_PCIE_LAN# (25) WLAN_CLKREQ# R121 10K_0402_5% LAN_CLKREQ# R1430 4.7K_0402_5% WWAN_CLKREQ# R107 10K_0402_5% PCIF_5/ITP_EN VSS_PCI SRC_11# CLK_PCIE_WWAN REQ PORT LIST (15) CLK_PCIE_WWAN# (15) PORT VSS_REF VSS_48 CLKREQ_3# 37 58 VSS_PLL3 CLKREQ_7# VSS_SRC CLKREQ_9# VSS_SRC SLKREQ_10# VSS_SRC CLKREQ_11# VSS USB_1/CLKREQ_A# Add WWAN_CLKREQ# WLAN_CLKREQ# WLAN_CLKREQ# (26) 65 43 49 LAN_CLKREQ# 46 WWAN_CLKREQ# LAN_CLKREQ# (25) WWAN_CLKREQ# DEVICE REQ_3# REQ_4# PCIE_WLAN REQ_6# REQ_7# REQ_9# REQ_10# PCIE_WWAN REQ_11# REQ_A# 05/04 (15) 21 A SLG8SP556VTR_QFN72_10X10 PCI2_TME @ R77 10K_0402_5% 10K_0402_5% 10K_0402_5% Issued Date Compal Electronics, Inc Compal Secret Data Security Classification R90 33P 50V J NPO 0402 R89 2007/10/15 Deciphered Date 2008/10/15 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Routing the trace at least 10mil CPU_STOP# CLKREQ_6# 73 PCI4_SEL 2 CLK_XTAL_OUT 14.31818MHZ L5020-14.31818-20 C164 R95 CLK_PCIE_WLAN C PCIE_WLAN PCIE_SATA PCIE_PCH CPU_ITP CLK_CPU_EXP PCIE_LAN PCIE_WWAN C161 R85 1 Follow Intel check list change to 27P 06/05 Follow Vendor check change to 22P 10/16 Follow Vendor check change to 33P 05/24 (5) CPU_SSCDREFCLK CKPWRGD/PD# CLKREQ_4# 42 (5) CPU_SSCDREFCLK# CLK_PCIE_WLAN# VSS_CPU 59 (5) CPU_SSCDREFCLK CLK_PCIE_WLAN VSS_IO 30 +3VS 2 +3VS (5) (5) CPU_DREFCLK# 39 69 34 +3VS SRC1 SRC2 SRC3 SRC4 SRC6 SRC7 SRC8 SRC9 SRC10 SRC11 (5) CLK_CPU_HPLCLK# CPU_DREFCLK DEVICE PORT (5) CLK_CPU_HPLCLK 40 SRC_4 SRC_4# 41 0_0402_5% A 35 36 26 R87 @ (5) CLK_CPU_BCLK# 33 SRC_3# SRC_11 18 CLK_CPU_BCLK 32 SRC_3 FS_B/TEST_MODE C388 For PCI2_TME:0=Overclocking of CPU and SRC allowed (ICS only) 1=Overclocking of CPU and SRC NOT allowed FSC R86 (11) CLK_PCI_PCH R92 @ CLK_XTAL_OUT 13 $GG5IRU730 +VCCP CLK_XTAL_IN SRC PORT LIST CLK_SMBCLK (7,15,27) VDD_IO REF_1 11 H_STP_PCI# TPM@ R1443 CLK_SMBCLK D CLK_SMBDATA (7,15,27) VDD_REF 53 TPM@ R110 @ 0_0402_5% +3VS 0.1U_0402_16V4Z 10 SCL REF_0/FS_C/TEST_ (13) H_STP_CPU# R86 CPU_BSEL1 C165 SDA VDD_SRC CLK_EN R371 0_0402_5% 470_0402_5% (5) Change Q10 to SB00000DH00 2010/04/06 SRC_6# R113 R52 1K_0402_1% FSB 0.1U_0402_16V4Z SRC_2# 20 @ B C146 (13) ICH_SMBCLK +VCCP Add 1K follow Intel check list 05/11 U4 +1.5VM_CK505 0_0603_5% 10K_0402_5% R76 2.2K_0402_5% FSA 0.1U_0402_16V4Z CLK_SMBDATA Realtek: SA00003H730 0_0603_5% R435 Rename 06/06 C167 IDT: SA00003H610 Change co-lay net name to +1.5VM_CK505 07/03 C Q10B 2N7002DW-T/R7_SOT363-6 Reserved +3VS (36) CLK_ENABLE# C139 C175 Add C1145 C1146 C1147 for EMI 06/12 +3VS (13) ICH_SMBDATA 2.2K_0402_5% R138 0_0603_5% +VCCP R91 2.2K_0402_5% 2N7002DW-T/R7_SOT363-6 Q10A FSC +3VM_CK505 Title Clock Generator CK505 Size Document Number Rev 0.1 LA-6421P Date: Thursday, June 03, 2010 Sheet of 39 LCD POWER CIRCUIT Change R577 to 0402 SIZE 06/16 J1 +LCDVDD D W=20mils +3VS R577 S Q3 Q4 R578 C1108 100K_0402_5% 0.047U_0402_16V4Z D G 2N7002W-T/R7_SOT323-3 2 G C1106 4.7U_0603_6.3V6K +LCDVDD_R 2 C1105 0.1U_0402_16V4Z +CAM_VCC D 1 C1107 4.7U_0603_6.3V6K C1113 0.1U_0402_16V4Z 2 PJUSB208_SOT23-6 R579 4.7K_0402_5% S @ 470_0402_5% JUMP_43X39 @ W=20mils D +3VS +3VS NTR4101PT1G 1P SOT-23-3 +LCDVDD Change C1106 to 4.7U_0603 USB20_N3_1 05/14 CH3 +CAM_VCC Vp CH2 Vn CH4 CH1 Q5 DTC115EUA_SC70-3 USB20_P3_1 D6 @ (5) GMCH_ENVDD 05/14 Add D6 C C R174 100K_0402_5% 0_0402_5% Modify 05/11 R1182 @ USB20_N3_1 USB20_P3_1 +3VS CMIC@ R1445 camera LVDS_ACLK LVDS_ACLK# WCM2012F2S-900T04_0805 0_0402_5% USB20_N3 USB20_P3 USB20_N3 (13) USB20_P3 (13) 2 R1183 LVDS_SCL (5) LVDS_SDA B LVDS_SDA (5) LVDS_ACLK (5) LVDS_ACLK# (5) LVDS_A2 LVDS_A2# LVDS_A2 (5) LVDS_A2# (5) LVDS_A1 LVDS_A1# INVT_PWM LVDS_A1 (5) LVDS_A1# (5) LVDS_A0 LVDS_A0# BKOFF# C1156 220P_0402_50V7K 3G@ BKOFF# (17) INVT_PWM (5,17) LVDS_A0 (5) LVDS_A0# (5) LVDS_SDA LVDS_SCL BKOFF# INVT_PWM +LCDVDD_L Add for RF 07/02 LVDS_SCL +CAM_VCC DMIC_CLK (22) DMIC_DATA (22) C1109 1000P 50V K X7R 0402 3G@ )RU5) +3VS L2 FBMA-L11-201209-221LMA30T_0805 +LEDVDD +LCDVDD L1 2 ACES_88341-3000B001 CONN@ +3VS B 0_0402_5% USB20_P3_1 USB20_N3_1 1 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 3628 3329 3230 MIC@ R1444 JLVDS1 2 R1180 2.2K_0402_5% $GG55 0_0402_5% R1181 2.2K_0402_5% Modify JLVDS1 08/04 C1168 10P_0402_50V8J @ CMOS & LCD/PANEL BD Conn 10P_0402_50V8J @ C1167 L3 (20 MIL) B+ FBMA-L11-201209-221LMA30T_0805 C1111 330P_0402_50V7K 3G@ C1112 100P_0402_50V8J 3G@ A A 2006/08/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/8/18 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title LVDS /INVERTER Size B Date: Document Number Rev 0.1 LA-6421P Friday, June 25, 2010 Sheet of 39 A B C D E D18 3 Close to CRT CONN for ESD D17 @ @ Change L12 L14, L15 to SM01000C600 2010/04/06 L15 (5) GMCH_CRT_R L14 (5) GMCH_CRT_G (5) GMCH_CRT_B 1 C308 CHENG-HANN MBK1005470YZF 0402 GREEN CHENG-HANN MBK1005470YZF 0402 BLUE 1 C307 10P_0402_50V8J 2 C306 10P_0402_50V8J C304 10P_0402_50V8J JVGA_HS 0.1U_0402_16V4Z P 2 U11 CRT_HSYNC_1 Y G A OE# JVGA_VS (5) GMCH_CRT_HSYNC RED CHENG-HANN MBK1005470YZF 0402 C303 10P_0402_50V8J +5VS C301 10P_0402_50V8J C310 10P_0402_50V8J R250 150_0402_1% R253 150_0402_1% R255 150_0402_1% L12 1 PJDLC05C_SOT23-3 0615 PJDLC05C_SOT23-3 Modify C31- C308 C303 C307 C306 C304 BOM Structure SN74AHCT1G125DCKR_SC70-5 +3VS (13) CRT_VSYNC_1 CRT_DET CRT_DET SN74AHCT1G125DCKR_SC70-5 CRT_DET# Y High: CRT Plugged G A R149 10K_0402_5% @ U10 D P (5) GMCH_CRT_VSYNC OE# 0.1U_0402_16V4Z +5VS C298 S G Q11 2N7002W-T/R7_SOT323-3 @ CRT PORT +CRT_VCC 12/29 +5VS 0.1U_0402_16V4Z D3 +3VS W=40mils RB491D_SC59-3 JCRT1 11 12 13 14 10 15 1 RED 2.2K_0402_5% R248 VGA_DDC_DAT GREEN 2 +3VS R245 R246 R251 JVGA_HS BLUE 2.2K_0402_5% JVGA_VS 2.2K_0402_5% VGA_DDC_CLK (5) GMCH_CRT_DATA (5) GMCH_CRT_CLK Change JCRT1 P/N to SP010906182 06/22 1.1A_6VDC_FUSE +CRT_VCC 2.2K_0402_5% C142 F1 VGA_DDC_DAT CONN@ 16 17 SUYIN_070546FR015M21RZR Q24B 2N7002DW-T/R7_SOT363-6 VGA_DDC_CLK CRT_DET# Q24A 2N7002DW-T/R7_SOT363-6 R1103 100K_0402_5% Change Q24 to SB00000DH00 2010/04/06 4 +CRT_VCC 2006/08/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/8/18 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title CRT PORT Size B Date: Document Number Rev 0.1 LA-6421P Tuesday, June 22, 2010 Sheet E 10 of 39 Change LAN chip to AR8152-L for NAV70/80 DDR3 2010/01/22 U14 PCIE_C_RXP1 0.1U_0402_16V7K PCIE_CRXN1 0.1U_0402_16V7K 30 29 (13) PCIE_ITX_C_DRX_P1 35 (13) PCIE_ITX_C_DRX_N1 36 CLK_PCIE_LAN CLK_PCIE_LAN# (8) CLK_PCIE_LAN (8) CLK_PCIE_LAN# D R1428 (8) LAN_CLKREQ# (4,5,13,15,17,26,27) 33 32 0_0402_5% LAN_CLKREQ#_R 23 PLTRST# PLTRST# LAN_WAKE# (17) LAN_WAKE# 25 26 Change Y5 to SJ100003300 2010/04/06 28 27 41 Y5 LAN_X1 LAN_X2 LAN_X1 LAN_X2 25MHZ_20PF_7A25000012 C852 27P_0402_50V8J 16 17 18 19 20 21 13 C853 27P_0402_50V8J TX_P LED_ACT# TX_N LED_LINK10_100# RX_P TRXP0 TRXN0 TRXP1 TRXN1 RX_N REFCLK_P REFCLK_N RBIAS CLKREQ# VDD33 PERST# LX 38 LAN_ACTIVITY# 39 LAN_SK_LAN_LINK# 11 12 14 15 LAN_MDI0+ R629 LAN_MDI0R630 LAN_MDI1+ R631 LAN_MDI1R632 R635 2.37K_0402_1% 10 1 1 2 2 49.9_0402_1% 49.9_0402_1% 49.9_0402_1% 49.9_0402_1% TEST_RST TESTMODE GND W=40mils If SWR mode applied, W=40mils Mount L10, C881, C861, C393, C860, C877 No mount R680, C876 DVDDL DVDDL_REG 24 37 +DVDDL W=30mils 22 +AVDDH W=30mils 31 34 +AVDDL W=30mils AVDDL AVDDL AVDDL_REG D +3V_LAN LX 40 VDDCT VDDCT_REG AVDDH AVDDH_REG NC NC NC NC NC NC NC C839 0.1U_0402_16V4Z 5NHHSDZD\RWKHUVLQJDOPLO W=40mils XTLO XTLI C838 0.1U_0402_16V4Z close to Lan chip WAKE# SMCLK SMDATA VDDCT_REG If LDO mode applied, Mount C881, C393, R680, C876, C877 No mount L10, C861, C860 LX +VDDCT L10 4.7UH_1008HC-472EJFS-A_5%_1008 SWR@ AR8152-AL1E AR8152L Place L10 close to Pin40 +VDDCT 1000P_0402_50V7K 10U_0603_6.3V6M 0.1U_0402_16V4Z 1 1 C861 C881 C399 C860 2 SWR@ 2 VDDCT_REG R680 0_0603_5% LDO@ C876 SWR@ LDO@ PN:SA00003JW10 close to Lan pin5 C close to Lan pin40 C877 0.1U_0402_16V4Z 1U_0402_6.3V6K 0.1U_0402_16V4Z C845 C851 (13) PCIE_DTX_C_IRX_P1 (13) PCIE_DTX_C_IRX_N1 C close to Lan pin4 LAN Power circuit refer NAU00 Change C865,C870,C873,C876 to SE000000K80 2010/04/06 W=40mils +AVDDL +AVDDH +DVDDL 2 close to Lan pin6 close to Lan pin31 C872 close to Lan pin9 C865 1 C866 2 C867 close to Lan pin37 0.1U_0402_16V4Z C871 0.1U_0402_16V4Z 0.1U_0402_16V4Z C863 0.1U_0402_16V4Z 0.1U_0402_16V4Z C868 0.1U_0402_16V4Z C856 1U_0402_6.3V6K C1205 1U_0402_6.3V6K 0.1U_0402_16V4Z C340 10U_0603_6.3V6M~D 10U_0603_6.3V6M~D C847 1000P_0402_50V7K 1 C841 C848 0.1U_0402_16V4Z C870 1U_0402_6.3V6K +3VALW C873 1A 0_0603_5% 1U_0402_6.3V6K +3V_LAN R1429 close to Lan pin24 close to Lan pin22 close to Lan pin34 close to Pin FORVHWR-5- Change C847 to SE000000K80 2010/04/06 @ C879 470P_0402_50V7K B B JRJ45 LAN_ACTIVITY# R644 511_0402_1% T1 LAN_MDI1+ LAN_MDI1- C1207 @ 2 LAN_MDI0+ LAN_MDI0- RD+ RDCT NC NC CT TD+ TD- 12 RX+ RXCT NC NC CT TX+ TX- 350uH_NS0013LF 0.1U_0402_16V4Z 1000P_0402_50V7K C880 @ 0.1U_0402_16V4Z 1000P_0402_50V7K C882 C875 1U_0402_6.3V6K close to L2 C1206 L32 +VDDCT MURATA_BLM18AG601SN1D_0603 11 16 15 14 13 12 11 10 RJ45_MIDI1+ RJ45_MIDI1RJ45_CT0 RJ45_CT1 RJ45_MIDI0+ RJ45_MIDI0- R640 75_0402_5% R639 75_0402_5% R645 5.1K_0402_5% RJ45_MIDI1- C862 1000P_1206_2KV7K For EMI @ C883 470P_0402_50V7K +3V_LAN RJ45_MIDI1+ RJ45_MIDI0- RJ45_MIDI0+ 1 R643 511_0402_1% LAN_SK_LAN_LINK# 10 @ C884 470P_0402_50V7K close to T1 Yellow LED+ Yellow LEDSHLD1 PR4DETECT PIN1 15 13 PR4+ PR2PR3PR3+ PR2+ PR1PR1+ SHLD1 14 Green LED+ Green LEDSANTA_130452-3 Change C875 to SE000000K80 2010/04/06 A A Issued Date 2009/7/7 2010/7/7 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Compal Electronics, Inc Compal Secret Data Security Classification Title LAN AR8152 Size Document Number Custom LA-6421P Date: Rev 0.1 Thursday, June 03, 2010 Sheet 25 of 39 Mini-Express Card for WWAN D (17) EC_TX_P80_DATA (17) EC_RX_P80_CLK EC_TX_P80_DATA EC_RX_P80_CLK R402 0_0402_5% EC_TX_P80_DATA_R EC_TX_P80_CLK_R R403 0_0402_5% D Mini-Express Card for WLAN +3VS_WLAN +1.5VS C195 4.7U_0603_6.3V6K C1189 0.1U_0402_16V4Z C1043 47P_0402_50V8J C1069 4.7U_0603_6.3V6K C1070 0.1U_0402_16V4Z C1071 47P_0402_50V8J C C R1453 @ 0_0402_5% (15,17) BT_ON# (8) WLAN_CLKREQ# (8) CLK_PCIE_WLAN# (8) CLK_PCIE_WLAN (13) PCIE_DTX_C_IRX_N2 (13) PCIE_DTX_C_IRX_P2 (13) PCIE_ITX_C_DRX_N2 (13) PCIE_ITX_C_DRX_P2 +3VS_WLAN B EC_TX_P80_DATA_R EC_TX_P80_CLK_R C1072 10U_0603_6.3V6M 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 54 11 13 15 10 12 14 16 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 G1 G2 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 G3 G4 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 55 56 +3VS +1.5VS WL_OFF# (17) PLTRST# (4,5,13,15,17,25,27) MINI_SMBCLK (15) MINI_SMBDATA (15) USB20_N7_R USB20_P7_R 0_0402_5%1 R326 0_0402_5%1 R325 NON3G@ NON3G@ R1356 0_0402_5% R1362 USB20_N7 (13) USB20_P7 (13) B WWAN_LED# (15,16) @ 12/09 0_0402_5% (9~16mA) BELLW_80052-1021 CONN@ WLAN_LED# (15,16) R1325 100K_0402_5% 11 13 15 J9 JUMP_43X79 @ 1 2 (13,15) ICH_PCIE_WAKE# +3VS_WLAN JMINI2 5/12 6/1 6/12 6/26 7/01 Ε Ε Ε Ε Update WLAN connector(the same as KAV60) Revised 37 39 41 42 43 to NC Update connector to DC040006S00 Update JMINI1 footprint update pin 23,25,31,33 A A Compal Electronics, Inc Title Size Document Number CustomLA-6421P Date: WLAN Rev 0.1 LA-6222P Sheet Monday, June 07, 2010 26 of 39 730RQERDUG R1457 Change Y7 to SJ132P7KW10 2010/04/06 TPM_XTALO Place closed to EC TPM@ R1432 4.7K_0402_5% +3VS (13,17) LPC_AD0 (13,17) LPC_AD1 (13,17) LPC_AD2 (13,17) LPC_AD3 (13,17) LPC_FRAME# (4,5,13,15,17,25,26) PLTRST# 8/31 HP R1450 R1451 R1448 R1449 R1452 C1214 2 2 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% LPC_PD# (12,17) SERIRQ (8) CLK_PCI_TPM @ 10P_0402_50V8J +3VS C TPM@1 TPM@ TPM@1 TPM@1 TPM@1 TPM@1 CLK_PCI_TPM R1435 10_0402_5% U81 TPM@ 26 23 20 17 22 16 28 27 21 LAD0 LAD1 LAD2 LAD3 LFRAME# LRESET# LPCPD# SERIRQ LCLK 15 CLKRUN# GPIO GPIO2 ˦˟˕ʳˌˉˆˈʳ˧˧ʳ˄ˁ˅ $/6$PELHQW/LJKW6HQVRU TPM@ TEST1 TESTB1/BADD TPM_GPIO TPM_GPIO2 R1436 4.7K_0402_5% @ R1437 4.7K_0402_5% TPM_XTALO 14 TPM_XTALI 13 GND1 GND2 C ACES_88266-05001 TPM@ TPM@ PP NC NC NC XTALO 12 XTALI/32K IN GND GND GND GND @ +3VS (5,17) EC_SMB_CK2 (5,17) EC_SMB_DA2 (17) LIGHT_SENSOR_INT# R1433 4.7K_0402_5% R1434 0_0402_5% JP22 +3VS TPC12 T86 TPC12 T87 Base I/O Address = 02Eh =* 04Eh @ 1 22P_0402_50V8J 2 32.768KHZ_12.5PF_Q13MC14610002 C1213 TPM@ TPM@ VSB 10M_0402_5% 24 19 10 R1431 C1212 0.1U_0402_16V4Z OSC C1211 TPM@ 0.1U_0402_16V4Z C1210 TPM@ 0.1U_0402_16V4Z NC OSC VDD VDD VDD TPM@ NC C1209 TPM@ 0.1U_0402_16V4Z TPM_XTALI 22P_0402_50V8J Y7 D +3VALW TPM@ C1208 D 0_0603_5% TPM@ +3VS SLB 9635 TT 1.2_TSSOP28 25 18 11 R1438 0_0402_5% 6/30 HP R1438 mount 2010/05/06 67/,6'(*6HQVRU B B C1215 0.1U_0402_16V4Z GSEN@ 10U_0603_6.3V6M GSEN@ C1216 R1458 GSEN@ R1439 3.4K_0402_1% I2C_DATA_GS GSEN@ 0_0402_5% I2C_CLK_GS R1441 GSEN@ 0_0402_5% (7,8,15) CLK_SMBDATA R1440 (7,8,15) CLK_SMBCLK Add R1440, R1441 1/13 10 15 A +3VS U82 GSEN@ 14 GSEN@ +3VS 0_0603_5% VDD INT_1 VDD_IO INT_2 11 G_SENSOR_INT# G_SENSOR_INT (11) CS SDA/SDI/SDO SDO/SA0 SCL/SPC NC_1 NC_2 RSVD_1 RSVD_2 GND_1 GND_2 GND_3 GND_4 12 13 16 A LIS331DLTR_LGA16_3X3 316$97 Compal Secret Data Security Classification 2008/09/15 Issued Date 2009/12/31 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc TPM/G-Sensor/Light sensor Size Document Number Rev 0.1 LA-6421P Date: Thursday, June 03, 2010 Sheet 27 of 39 Modify Hole location by (ME Drawing 06/12) 0615 H8 H H2 H_2P8 H23 H_2P8 H4 H_2P8 1 H16 H H9 H @ H_3P2N H5 H_3P2N 1 @ @ H1 H H_2P6 H_2P8 @ H_3P2X3P7N H7 H H17 H @ 1 @ H22 H_3P2x3P5N H_3P2X3P5N 09/03 Del H12 H18 H H_3P2 H19 H @ 1 @ H24 H_3P4X3P2N H_3P4X3P2N H3 H H_3P2 @ 1 FM3 @ FM1 @ @ FIDUCIAL_C40M80 FM4 @ FM2 H11 H H_3P3N @ H20 H H_3P4X3P2N Issued Date Compal Electronics, Inc Compal Secret Data Security Classification @ 2006/08/18 Deciphered Date 2007/8/18 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Screw Size B Date: Document Number Rev 0.1 LA-6421P Thursday, March 25, 2010 Sheet 28 of 39 A B C D E Change R51 R57 R70 R63 R317 R114 R190 to 0402 SIZE 04/30 Change C221 C218 C223 C 191 C201 C170 C392 C393 C394 to 0603 SIZE 04/30 +5VALW TO +5VS +3VALW TO +3VS 1 C170 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 2 +VSB R114 Q12B 2N7002DW-T/R7_SOT363-6 R139 33K +-5% 0402 @ C208 SUSP 470_0402_5% 1 C176 C201 0.1U 25V K X5R 0402 Q12A SUSP 2N7002DW-T/R7_SOT363-6 SUSP C179 0.1U 25V K X5R 0402 +5VALW 1 2N7002DW-T/R7_SOT363-6 R109 @ C191 R190 300K_0402_5% R111 Q17A C219 Q17B 2N7002DW-T/R7_SOT363-6 300K_0402_5% SUSP 470_0402_5% 5VS_GATE 2 R187 22K +-5% 0402 C223 10U_0603_6.3V6M 2 10U_0603_6.3V6M +VSB Q15 10U_0603_6.3V6M SI4800BDY-T1-E3_SO8 2 1 Q19 +3VS C218 +3VALW 1U_0603_10V6K SI4800BDY-T1-E3_SO8 C221 +5VS 1U_0603_10V6K +5VALW R141 100K_0402_5% Change Q12,Q14,Q17,Q28 to SB00000DH00 2010/04/06 2 +1.5V to +1.5VS +1.5V Change C176,C219,C395 to SE080105K80 2010/04/06 +1.5VS 470_0402_5% ADD +5VS +VCCP +0.89V Cap for EMI R317 Q14A 0.1U 25V K X5R 0402 C1173 @ C1174 @ C1175 @ 2 0.01U_0402_25V7K @ C1172 0.01U_0402_25V7K C396 1 C1176 +0.75VS 0.01U_0402_25V7K SUSP @ 2N7002DW-T/R7_SOT363-6 +1.5V +1.5V 0.01U_0402_25V7K +0.89V +VCCP R112 300K_0402_5% Q28A @ SUSP 2N7002DW-T/R7_SOT363-6 SYSON (7,17,34) SYSON +5VS Q28B 2N7002DW-T/R7_SOT363-6 R318 47K +-5% 0402 C395 0.01U_0402_25V7K 10U_0603_6.3V6M C394 +VSB 1 1U_0603_10V6K C393 10U_0603_6.3V6M 10U_0603_6.3V6M C392 Q27 SYSON# SI4800BDY-T1-E3_SO8 3 +3VLP 2 VL +VCCP +0.75VS +1.5V SUSP SUSP 2 2 (35) +1.8VS R173 100K_0402_5% R172 100K_0402_5% @ 470_0402_5% R70 R63 Q14B (17,34,35) SUSP# 2N7002DW-T/R7_SOT363-6 Q8B SUSP SUSP 2N7002DW-T/R7_SOT363-6 4 @ Q6A @ @ Q8A SUSP @ 2N7002DW-T/R7_SOT363-6 Q6B 2N7002DW-T/R7_SOT363-6 1 470_0402_5% R57 470_0402_5% R51 470_0402_5% SYSON# 2N7002DW-T/R7_SOT363-6 Change Q6,Q8 to SB00000DH00 2010/04/06 2006/08/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/8/18 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title DC INTERFACE Size B Date: Document Number Rev 0.1 LA-6421P Thursday, June 03, 2010 Sheet E 29 of 39 A B C D 1 VIN PL1 HCB2012KF-121T50_0805 DC_IN_S1 1 PC4 100P_0402_50V8J PC5 100P_0402_50V8J PC3 1000P_0402_50V7K 2 GND GND 2 PJP1 SP02000GC00 PC6 1000P_0402_50V7K ACES 88266-04001 CONN@ 2 - + PBJ1 +RTCBATT +RTCBATT ML1220T13RE 45@ PJ2 +VCCPP JUMP_43X118 VS 1 PC14 0.1U_0402_25V6 +3VLP @ PJ9 +0.89V +1.8VP 2 JUMP_43X79 +1.8VS JUMP_43X79 1 2 PR17 560_0603_5% 2 PC197 1U_0402_16V7K + 330U_B2_2.5VM_R15M PC276 +CHGRTC +VCCP PJ5 +0.89VP PR16 560_0603_5% 1 JUMP_43X118 TP0610K-T1-E3_SOT23-3 PC198 1U_0402_16V7K (18) 51ON# PR14 22K_0402_1% PC13 0.22U_0603_25V7K PR13 100K_0402_1% +1.5V 1 2 2 N1 +1.5VP PJ4 PC195 1U_0402_16V7K BATT+ +5VALW PR11 68_1206_5% PJ3 PQ1 1 PR10 68_1206_5% PD3 RLS4148_LL34-2 JUMP_43X118 PC196 1U_0402_16V7K 1 PD2 RLS4148_LL34-2 +5VALWP JUMP_43X118 +3VALW 1 2 PC194 1U_0402_16V7K +3VALWP PC193 1U_0402_16V7K PJ1 VIN 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/09/20 Deciphered Date 2008/09/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C Title DCIN & DETECTOR Size Document Number Custom Date: Rev 0.1 LA-6421P Sheet Tuesday, June 22, 2010 D 30 of 39 A B C D PH1 under CPU botten side : CPU thermal protection at 92 degree C Recovery at 72 degree C VMB VL @ PR23 100K_0402_1% (33) MAINPWON PR22 100_0402_1% PU3 VCC TMSNS1 GND RHYST1 OT1 TMSNS2 PR31 15K_0402_1% OT2 RHYST2 G718TM1U_SOT23-8 PR25 6.49K_0402_1% PR220 1K_0402_5% 1 @ PR169 47K_0402_1% +3VALW P 1 PR21 100_0402_1% PR29 22.1K_0402_1% 1 2 SUYIN_200275MR008G15QZR PR28 10K_0402_1% VL PC23 0.1U_0603_25V7K PC22 0.01U_0402_25V7K PC21 1000P_0402_50V7K TS EC_SMCA EC_SMDA BATT+ BATT_S1 B/I PL2 HCB2012KF-121T50_0805 2 PH2 @ PH1 100K_0402_1%_NCP15W F104F03RC 100K_0402_1%_NCP15W F104F03RC 2 PR27 1K_0402_1% 2 10 1 GND GND PJP2 2 BATT_TEMP (17) EC_SMB_CK1 (17) EC_SMB_DA1 (17) @ PR236 0_0805_5% PQ3 +VSB PR30 100K_0402_1% PR32 22K_0402_1% D S (33) SPOK PR34 100K_0402_1% 3 PC200 0.1U_0402_25V6 VL 2 TP0610K-T1-E3_SOT23-3 1 B+ PQ4 2N7002W -T/R7_SOT323-3 G 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/09/20 Deciphered Date 2008/09/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C Title BATTERY CONN / OTP Size Document Number Custom Date: Rev 0.1 LA-6421P Sheet Tuesday, June 22, 2010 D 31 of 39 A B C D B+ ICOMP CSIN 20 VCOMP CSIP 19 ICM PHASE 18 PL5 8.2UH_FDV0630-8R2M=P3_3.7A_20% CHG CHLIM BOOT 16 10 ACLIM VDDP 15 11 VADJ LGATE 14 GND PGND 13 PR78 0_0603_5% BST_CHG PC65 0.1U_0603_25V7K BST_CHGA PD14 RB751V-40TE17_SOD323-2 6251VDDP 12 PR81 20K_0402_1% DL_CHG 26251VDD DH_CHG 17 PQ19 AON7408L_DFN8-5 PQ21 AON7408L_DFN8-5 UGATE VREF PC54 2200P_0402_25V7K 1 2 PR223 14.3K_0402_1% PC209 1000P_0402_25V8J 2 1U_0402_16V7K PR79 38.3K_0402_1% 6251VREF 6251aclim PACIN G @ PQ18 2N7002W -T/R7_SOT323-3 PR82 4.7_0603_5% PC70 4.7U_0603_6.3V6K BATT+ PR74 0.05_1206_1% PC68 10U_1206_25V6M CSOP S 21 PR84 0_0402_5% D PC67 10U_1206_25V6M CSOP PC58 0.1U_0603_25V7K CELLS Vin1 CSON PR76 4.7_1206_5% 22 @ CSON EN 3 23 VIN @ PD13 1SS355TE-17_SOD323-2 2 PC57 ACPRN 0.22U_0603_25V7K PR68 20_0402_5% PC59 0.047U_0402_16V7K PR69 20_0402_5% PR70 20_0402_5% PC62 0.1U_0603_25V7K PR72 2_0402_5% LX_CHG ACSET ACPRN PC53 4.7U_0805_25V6-K 1 PR221 191K_0402_1% 2 PR64 @ 200K_0402_1% PC66 680P_0402_50V7K 6251VREF PC64 PR80 100K_0402_1% DCIN 24 IREF ADP_I DCIN ACOFF PR73 100_0402_1% 2 PC63 @ 100P_0402_50V8J PR77 62K_0402_1% 1 ACOFF 6.81K_0402_1% VDD 0.01U_0402_25V7K (17) 6800P_0402_25V7K S (17) (17) PR71 6251_EN PQ22 DTC115EUA_SC70-3 PC61 2N7002W -T/R7_SOT323-3 PR75 22K_0402_5% PACIN PACIN PC60 D PC69 0.01U_0402_25V7K 1 PQ20 G 2 PR66 150K_0402_1% 1 VIN @ PD10 1SS355TE-17_SOD323-2 ACOFF PQ16 DTC115EUA_SC70-3 @ PC56 1U_0402_16V7K PQ17 2N7002W -T/R7_SOT323-3 PU5 1 PR67 D PR65 10K_0402_5% (17) FSTCHG G S PC55 2.2U_0603_6.3V6K PR58 47K_0402_1% PR62 10K_0402_1% ACSETIN 1 @ PD12 1SS355TE-17_SOD323-2 Vin1 PD1 RB751V-40_SOD323-2 PR222 10_1206_5% 1 VIN 6251VDD CSIN CSIP ACSETIN PQ15 DTC115EUA_SC70-3 1 JUMP_43X118 2 PR60 200K_0402_1% 100K_0402_1% PR59 47K_0402_1% PQ12 DTA144EUA_SC70-3 PC51 0.1U_0603_25V7K SI7121DN-T1-GE3_POW ERPAK8-5 PQ11 PJ8 PC50 4.7U_0805_25V6-K CHG_B+ PR57 0.05_1206_1% PC165 0.1U_0603_25V7K 1 B340A_SMA2 B+ P3 SI7121DN-T1-GE3_POW ERPAK8-5 PQ10 1 PC52 5600P_0402_25V7K 2 P2 PD9 VIN ISL6251AHAZ-T_QSOP24 Iada=0~1.58A(30W) CP = 85%*Iada ; CP = 1.343A CP mode Vaclim=2.39*(20K/(20K+38.3K))=0.8199V (17) CALIBRATE# PR83 15.4K_0402_1% Vth,rise(typical) = ((191K/14.3K)+1)*1.26 = 18.89V PR85 31.6K_0402_1% Vth,fall(typical) = ((191K/14.3K)+1)*1.26 -3.4uA*191K = 17.43V Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05) where Vaclm=0.8199V, Iinput=1.343A CC=0.3~1.76A IREF=1.62*Icharge IREF=0.486V~2.85V 3.24V==>2A PR225 100K_0402_1% (13,17) D S PQ32 ACPRN CV mode Charging Voltage (0x15) ACIN PR226 10K_0402_1% PACIN BATT Type PR224 10K_0402_1% 1 6251VDD G PR227 20K_0402_1% SSM3K7002FU_SC70-3 Normal 3S LI-ON Cells 12600mV 12.60V VADJ >VREF >4.41V Issued Date Vcell=(0.175*VADJ+3.99) A Compal Electronics, Inc Compal Secret Data Security Classification VADJ ->Ground ->3.99V 2007/09/20 Deciphered Date 2008/09/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC B C Title CHARGER Size Document Number Custom Date: Rev 0.1 LA-6421P Sheet Tuesday, June 22, 2010 D 32 of 39 PC202 0.22U_0603_10V7K 2VREF_51125 10 DRVH2 DRVH1 21 UG_5V LX_3V 11 LL2 LL1 20 LX_5V LG_3V 12 DRVL2 DRVL1 19 LG_5V PC164 0.1U_0603_25V7K 2 B++ PC44 150U_B2_6.3VM_R45M 2 PC205 4.7U_0805_10V6K VL PC204 1U_0603_10V6K 2 PR231 @ 0_0402_5% PC43 680P_0402_50V7K 1 PR38 4.7_1206_5% VCLK 18 VIN GND SKIPSEL VREG5 17 16 13 PQ8 AON7702L_DFN8-5 B+ +5VALWP + B +5VALWP Ipeak=7.0A Imax=4.9A Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical) Vtrip=(10E-06 * 147K)/9-24mV=151mV Ilimit=151mV/17.9m ~151mV/14.5m x 1.2 =8.467A ~ 8.710A Iocp=Ilimit+Delta I/2 =9.384A ~ 9.627A Delta I=1.834A (Freq=245KHz) A PR235 40.2K_0402_1% PR234 100K_0402_1% 2 TPS51125RGER_QFN24_4X4 +3.3VALWP Ipeak=5.731A Imax=4.012A Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical) Vtrip=(10E-06 * 130K)/9-24mV=134.9mV Ilimit=134.9mV/17.9m ~134.9mV/14.5m x 1.2 =7.536A ~ 7.752A Iocp=Ilimit+Delta I/2 =8.081A ~ 8.297A Delta I=1.090A (Freq=305KHz) @ PC207 0.01U_0402_16V7K PL4 8.2UH_FDV0630-8R2M=P3_3.7A_20% 2N7002W -T/R7_SOT323-3 (31) MAINPWON VS PQ6 AON7408L_DFN8-5 UG_3V PQ34 PR233 100K_0402_1% A PC34 2200P_0402_50V7K PR40 PC41 0_0603_5% 1U_0402_16V7K BST_5V 2 1 VL S G S G 2N7002W -T/R7_SOT323-3 PC33 4.7U_0805_25V6-K 22 2VREF_51125 D PC32 4.7U_0805_25V6-K @ ENTRIP1 23 VBST1 ENTRIP2 PQ33 D VFB1 VREF VFB2 PGOOD VBST2 VFB=2.0V C (31) VREG3 PC206 0.1U_0603_25V7K ENTRIP1 SPOK PR230 499K_0402_1% PR232 100K_0402_1% B 24 EN0 PQ7 AON7702L_DFN8-5 VO1 B++ BST_3V 2 PC42 680P_0402_50V7K + PC39 150U_B2_6.3VM_R45M PC40 1U_0402_16V7K PR37 4.7_1206_5% PL3 8.2UH_FDV0630-8R2M=P3_3.7A_20% PR39 2 0_0603_5% VO2 15 PR229 158K_0402_1% ENTRIP1 +3VALWP P PAD TONSEL PU4 25 PR228 143K_0402_1% 2 PC203 4.7U_0805_10V6K PC30 @ 4.7U_0805_25V6-K PC31 2200P_0402_50V7K PQ5 AON7408L_DFN8-5 PR44 19.6K_0402_1% ENTRIP2 PR43 20K_0402_1% +3VLP PC29 4.7U_0805_25V6-K C PR42 30K_0402_1% 14 PL11 HCB2012KF-121T50_0805 PC163 0.1U_0603_25V7K B+ PR41 13K_0402_1% ENTRIP2 B++ D D PQ35 DTC115EUA_SC70-3 Compal Electronics, Inc Compal Secret Data Security Classification 2007/11/12 Issued Date Deciphered Date 2008/11/12 +5V/+3V THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom Date: Rev 0.1 LA-6421P Tuesday, June 22, 2010 Sheet 33 of 39 A B C D PL12 HCB2012KF-121T50_0805 PC166 0.1U_0603_25V7K B+ PQ23 AON7408L_DFN8-5 PR91 0_0603_5% BST_1.5V 2 PC82 4.7U_0805_10V6K + +1.5V 2 PR97 3.48K_0402_1% PL13 HCB2012KF-121T50_0805 PC167 0.1U_0603_25V7K PC85 @ 4.7U_0805_25V6-K B+ PQ25 AON7408L_DFN8-5 PR100 0_0603_5% BST_1.05V 2 PR104 14K_0402_1% NC LGATE DL_1.05V +5VALW PGND RT8209BGQW _W QFN14_3P5X3P5 GND PC89 4.7U_0603_6.3V6K PC92 4.7U_0805_10V6K + PC88 220U_B2_2.5VM_R15M 10 14 11 PR102 4.7_1206_5% PGOOD CS VDDP +VCCPP LX_1.05V FB 12 VDD PHASE PC90 680P_0603_50V7K DH_1.05V PQ26 AON7702L_DFN8-5 VOUT 13 3 UGATE PL7 1UH_FDV0630-1R0M-P3_10.3A_20% TON +5VALW PR103 100_0603_1% 2 PC87 0.1U_0603_25V7K BST_1.05V-1 BOOT PU7 EN/DEM PC86 1U_0402_6.3V6K 2 PR101 100K_0402_5% 15 1 PR99 4.7K_0402_1% PC84 4.7U_0805_25V6-K PC83 2200P_0402_50V7K +VCCP_B+ PR98 300K_0402_5% 17,22,36 SUSP# +1.5VP PC78 220U_B2_2.5VM_R35 DL_1.5V NC PGND LGATE RT8209BGQW _W QFN14_3P5X3P5 GND PR216 PR96 3.48K_0402_1% Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m Ipeak=4.97A, Imax=3.479A, Iocp=5.964A Delta I=((19-1.8)*(1.8/19))/(2.2u*328K)=2.259A =>1/2DeltaI=1.129A Vtrip=Rtrip*10uA=8.66K*10uA=0.0866V Iocpmin=Vtrip/(Rdsonmax)+1.129 =0.0866/(0.0179)+1.129=5.967A Iocpmax=(0.0866/(0.0145*1.2))+1.129A=6.106A Iocp=5.967A~6.106A PGOOD 10K_0402_5% VFB=0.75V Vo=VFB*(1+PR96/PR97)=0.75*(1+3.48K/3.48K)=1.5V Fsw=328KHz (7) +1.5V_PG PC79 4.7U_0603_6.3V6K +5VALW 10 PR95 8.66K_0402_1% PR93 4.7_1206_5% VDDP LX_1.5V 1 15 14 11 FB 12 CS PC80 680P_0603_50V7K PHASE 0.1U_0603_25V7K PQ24 AON7702L_DFN8-5 VDD DH_1.5V 13 VOUT BOOT UGATE PL6 2.2U_FDV0630-2R2M-P3_7.2A_20% PC76 PR94 100_0603_1% TON BST_1.5V-1 +5VALW PU6 EN/DEM PC77 1U_0402_6.3V6K 2 PR92 30K_0402_5% 1 (7,17,29) SYSON PR90 1K_0402_1% PC75 @ 4.7U_0805_25V6-K PC73 2200P_0402_50V7K PR89 300K_0402_5% PC74 4.7U_0805_25V6-K 1.5V_B+ PR105 3.48K_0402_1% PR106 8.25K_0402_1% VFB=0.75V Vo=VFB*(1+PR105/PR106)=0.75*(1+3.48K/8.25K)=1.05V Fsw=280KHz Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m Ipeak=3.124A, Imax=2.187A, Iocp=3.749A Delta I=((19-1.05)*(1.05/19))/(1.5u*280K)=3.549A =>1/2DeltaI=1.774A Vtrip=Rtrip*10uA=14K*10uA=0.14V Iocpmin=Vtrip/(Rdsonmax)+1.774 =0.14/(0.0179)+1.774=9.596A Iocpmax=(0.14/(0.0145*1.2))+1.774A=9.820A Iocp=9.596A~9.820A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/09/20 Deciphered Date 2008/09/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC B C Title 1.5VP / +VCCPP Size Document Number Custom Date: Rev 0.1 LA-6421P Tuesday, June 22, 2010 Sheet D 34 of 39 (17) +0.89V_PG +3VALW @ PR215 100K_0402_1% LX_SY8033B PR115 61.9K_0402_1% 2 SY8033BDBC_DFN10_3X3 Ipeak=2.64A, Imax=1.848A PC208 22U_0805_6.3VAM @ FB_SY8033B PR114 30.1K_0402_1% PC98 22U_0805_6.3VAM +0.89VP PC100 68P_0402_50V8J NC TP PR125 @ 47K_0402_5% 11 EN_SY8033B PC96 0.1U_0402_10V7K PR108 200K_0402_5% (17,29,34) SUSP# FB EN LX_SY8033B VFB=0.6V Vo=VFB*(1+PR114/PR115)=0.6*(1+30.1K/61.9)=0.89V SVIN LX LX PR107 4.7_1206_5% PVIN PVIN PC99 22U_0805_6.3VAM 10 1 PC81 680P_0603_50V7K JUMP_43X79 NC PL8 1UH_FDV0630-1R0M-P3_10.3A_20% +5VALW D PU8 PJ6 PG D C C SY8033BDBC_DFN10_3X3 PR120 61.9K_0402_1% 1 PR119 @ 47K_0402_5% Ipeak=0.318A, Imax=0.223A FB_1.8V VFB=0.6V Vo=VFB*(1+PR118/PR120)=0.6*(1+124K/61.9)=1.8V PC210 22U_0805_6.3VAM @ PR118 124K_0402_1% +1.8VP PC108 22U_0805_6.3VAM NC TP PR117 158K_0402_1% 11 EN_1.8V PC109 0.1U_0402_10V7K (17,29,34) SUSP# FB LX_1.8V PC107 22P_0402_50V8J EN SVIN LX LX PVIN PR110 4.7_1206_5% PVIN PC106 22U_0805_6.3VAM 10 PC91 680P_0603_50V7K NC JUMP_43X79 PL14 1.1UH_LFA915AY-H-1R1M=P3_4.07A_20% 2 PG +3VALW PU10 PJ7 +1.5V B B VCNTL NC +3VALW GND VREF NC VOUT NC TP PC111 1U_0603_6.3V6M 2 PR121 1K_0402_1% PC110 4.7U_0805_6.3V6K VIN 2 PU11 1 PC199 1U_0402_16V7K +0.75VS PC114 10U_0805_6.3V6M PR123 1K_0402_1% S 2N7002W -T/R7_SOT323-3 PC112 1U_0402_16V7K D PC113 1U_0402_16V7K PQ29 G PR122 0_0402_5% (29) SUSP APL5336KAI-TRL SOP Ipeak=1A, Imax=0.7A A A 2007/09/20 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2008/09/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +0.89VP/+1.8VP/+0.75VS Size Document Number Custom Date: Rev 0.1 LA-6421P Sheet Tuesday, June 22, 2010 35 of 39 A B C D E F G H (5) (5) (5) (5) (5) CPU_VID6 CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 VR_ON (17) CPU_VID0 (5) (5) 1 +3VS 2 PC147 2200P_0402_50V7K PC116 4.7U_0805_25V6-K PC148 0.1U_0402_25V6 +CPU_COREP +CPU_CORE 3211_DRVL PR124 4.7_1206_5% LL=5.9m ohm OCP=7.85A VID:0.75V~1.1V Io(max)=6.04A PC186 2.2U_0603_10V6K 18 17 33 PQ31 AON7702L_DFN8-5 PC115 680P_0603_50V7K PH4 100K_0402_1%_NCP15WF104F03RC Place RTH1 close to inductor on the same layer PC190 220P_0402_50V7K PR217 75K_0402_1% 2 PC189 1000P_0402_50V7K 1 PR214 499K_0402_1% PL10 2.2U_FDV0630-2R2M-P3_7.2A_20% 2 AGND 19 PR213 35.7K_0402_1% 1 PR218 309K_0402_1% PC191 1000P_0402_50V7K PQ30 AON7408L_DFN8-5 +5VS Connect to input caps CSCOMP AGND 20 B+ 3211_SW 16 CSFB 15 21 PR206 PC183 0_0603_5% 0.22U_0603_25V7K 2CPU_BOOST-1 PC121 4.7U_0805_25V6-K 1 25 VID6 26 VID5 27 VID4 CSREF 14 VID6 3211_VCC VID5 PR204 VID4 PR203 VID3 28 VID3 LLINE 13 22 3211_DRVH 3211_RAMP-1 PR219 1K_0402_1% 2 (6)VCCSENSE PR202 VID2 1 +CPU_B+ (6) VSSSENSE PR201 VID1 29 RAMP RT 12 IREF PR158 0_0402_5% PR150 0_0402_5% PR210 80.6K_0402_1% 3211_IREF 2 3.57K_0402_1% 24 23 CPU_BOOST 3211_CSCOMP Avoid high dV/dt 3211_CSFB N550@ PR209 3211_CSCOMP 3211_CSCOMP N4XX@ PR209 2.37K_0402_1% ILIM PR207 28K_0402_1% PC188 470P_0402_50V8J 30 PGND GPU 3211_ILIM PR208 1K_0402_1% VID2 DRVL COMP 11 PVCC FB 3211_RT 3211_COMP ADP3211AMNR2G_QFN32_5X5 3211_RAMP 23211_COMP-1 FBRTN PC187 47P_0402_50V8J VID1 SW PC182 1U_0805_25V6K PR199 CLKEN# PR211 200K_0402_1% 3211_RPM 31 32 EN DRVH RPM 3211_FB VID0 1 BST IMON PL9 HCB2012KF-121T50_0805 PR200 10_0603_1% PWRGD (8) CLK_ENABLE# PC185 390P_0402_50V7K +CPU_B+ VCC +5VS PU12 PR205 10K_0402_1% PC184 1000P_0402_50V7K PR198 VID0 PR196 +3VS 3211_EN 10 VGATE PR212 274K_0402_1% (5,8,13,17) PR195 0_0402_5% 13211_PWRGD PR197 2 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% PR194 4.7K_0402_1% PC192 1000P_0402_50V7K Shortest the net trace 4 2007/09/20 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2008/09/20 Title +CPU_CORE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size C Date: A B C D E F G Document Number Rev 0.1 LA-6421P Tuesday, June 22, 2010 Sheet 36 H of 39 ... 81 83 85 87 89 91 93 95 97 99 10 1 10 3 10 5 10 7 10 9 11 1 11 3 11 5 11 7 11 9 12 1 12 3 12 5 12 7 12 9 13 1 13 3 13 5 13 7 13 9 14 1 14 3 14 5 14 7 14 9 15 1 15 3 15 5 15 7 15 9 16 1 16 3 16 5 16 7 16 9 17 1 17 3 17 5 17 7 17 9 18 1... C99 10 0P _04 02_50V8J KSI6 C127 10 0P _04 02_50V8J KSO 10 C98 10 0P _04 02_50V8J KSI7 C126 10 0P _04 02_50V8J KSO 11 C97 10 0P _04 02_50V8J KSO0 C125 10 0P _04 02_50V8J KSO12 C96 10 0P _04 02_50V8J KSO1 C124 10 0P _04 02_50V8J... 10 0P _04 02_50V8J C134 10 0P _04 02_50V8J KSO6 C 102 10 0P _04 02_50V8J KSI3 C133 10 0P _04 02_50V8J KSO7 C1 01 100 P _04 02_50V8J KSI4 C132 10 0P _04 02_50V8J KSO8 C 100 10 0P _04 02_50V8J KSI5 C1 31 100 P _04 02_50V8J KSO9