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NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.. NEITHER THIS SHEET NOR THE IN

Trang 1

D D

VCC_AXG_SENSE

VCCSM_LF4

VCCSM_LF7

VCCSM_LF2 VCCSM_LF5 VCCSM_LF3

VCCSM_LF6 VCCSM_LF1

VCC_SM_BD16 VCC_SM_BA36

VCC_SM_BB24 VCC_SM_AW16 VCC_SM_BD16 VCC_SM_BA36

VCC_SM_AT13

VCC_SM_AT13

VCC_SM_BB24 VCC_SM_AW16

+1.05VS

+VGFX_CORE

+1.8V

+1.05VS

+1.05VS

+1.05VS

+1.8V

+VGFX_CORE

+VGFX_CORE

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

VCC_AXG: 6326.84mA (330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)

2600mA

VCC: 1930.4mA (GMCH), 1210.34mA (MCH) (270UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)

Pins BA36, BB24, BD16,

BB21, AW16, AW13, AT13

could be left NC for DDR2

board

Reference PILLAR_ROCK CRB Rev1.0

Place close to the GMCH

Place on the edge

VCC_SM: 2600mA (330UF*1, 22UF*2, 0.1UF*1)

Reference PILLAR_ROCK CRB Rev1.0

Cavity Capacitors

Cavity Capacitors

Place close to the GMCH

C144

1U_0402_6.3V6K C144

1U_0402_6.3V6K 1

2

C1489

0.1U_0402_16V7K

@

C1489

0.1U_0402_16V7K

@

1

2

J1 JUMP_43X79

@

J1 JUMP_43X79

@

1

C140

0.1U_0402_16V7K C140

0.1U_0402_16V7K 1

2

@

@

@

@

C1482

10U_0805_10V4Z

GM@

C1482

10U_0805_10V4Z

GM@

1

2

C125 0.1U_0402_16V4Z C125 0.1U_0402_16V4Z 1

2

C1487

0.1U_0402_16V7K

@

C1487

0.1U_0402_16V7K

@

1

2

C132 0.22U_0402_6.3V6K C132 0.22U_0402_6.3V6K

C142

0.22U_0402_6.3V6K C142

0.22U_0402_6.3V6K 1

2 C139

0.1U_0402_16V7K C139 0.1U_0402_16V7K 1

2

+ C131

220U_D2_4VM_R15

+ C131

220U_D2_4VM_R15 1

2

C145 1U_0402_6.3V6K C145 1U_0402_6.3V6K 1

2

C1481

1U_0402_6.3V6K

GM@

C1481

1U_0402_6.3V6K

GM@

1

2

C1484

0.1U_0402_16V4Z

GM@

C1484

0.1U_0402_16V4Z

GM@

1

2

U2F

CANTIGA ES_FCBGA1329 GM@

U2F

CANTIGA ES_FCBGA1329 GM@

VCC_AXG_NTCF_1 W28 VCC_AXG_NCTF_2 V28 VCC_AXG_NCTF_3 W26 VCC_AXG_NCTF_4 V26 VCC_AXG_NCTF_5 W25 VCC_AXG_NCTF_6 V25 VCC_AXG_NCTF_7 W24 VCC_AXG_NCTF_8 V24 VCC_AXG_NCTF_9 W23 VCC_AXG_NCTF_10 V23 VCC_AXG_NCTF_11 AM21 VCC_AXG_NCTF_12 AL21 VCC_AXG_NCTF_13 AK21 VCC_AXG_NCTF_14 W21 VCC_AXG_NCTF_15 V21 VCC_AXG_NCTF_16 U21 VCC_AXG_NCTF_17 AM20 VCC_AXG_NCTF_18 AK20 VCC_AXG_NCTF_19 W20 VCC_AXG_NCTF_20 U20 VCC_AXG_NCTF_21 AM19 VCC_AXG_NCTF_22 AL19 VCC_AXG_NCTF_23 AK19 VCC_AXG_NCTF_24 AJ19 VCC_AXG_NCTF_25 AH19 VCC_AXG_NCTF_26 AG19 VCC_AXG_NCTF_27 AF19 VCC_AXG_NCTF_28 AE19 VCC_AXG_NCTF_29 AB19 VCC_AXG_NCTF_30 AA19 VCC_AXG_NCTF_31 Y19 VCC_AXG_NCTF_32 W19 VCC_AXG_NCTF_33 V19 VCC_AXG_NCTF_34 U19 VCC_AXG_NCTF_35 AM17 VCC_AXG_NCTF_36 AK17 VCC_AXG_NCTF_37 AH17 VCC_AXG_NCTF_38 AG17 VCC_AXG_NCTF_39 AF17 VCC_AXG_NCTF_40 AE17 VCC_AXG_NCTF_41 AC17 VCC_AXG_NCTF_42 AB17 VCC_AXG_NCTF_43 Y17 VCC_AXG_NCTF_44 W17 VCC_AXG_NCTF_45 V17 VCC_AXG_NCTF_46 AM16 VCC_AXG_NCTF_47 AL16 VCC_AXG_NCTF_48 AK16 VCC_AXG_NCTF_49 AJ16 VCC_AXG_NCTF_50 AH16 VCC_AXG_NCTF_51 AG16 VCC_AXG_NCTF_52 AF16 VCC_AXG_NCTF_53 AE16 VCC_AXG_NCTF_54 AC16 VCC_AXG_NCTF_55 AB16 VCC_AXG_NCTF_56 AA16 VCC_AXG_NCTF_57 Y16 VCC_AXG_NCTF_58 W16 VCC_AXG_NCTF_59 V16 VCC_AXG_NCTF_60 U16

VCC_SM_LF1 AV44 VCC_SM_LF2 BA37 VCC_SM_LF3 AM40 VCC_SM_LF4 AV21 VCC_SM_LF5 AY5 VCC_SM_LF6 AM10 VCC_SM_LF7 BB13

VCC_SM_1 AP33 VCC_SM_2 AN33 VCC_SM_3 BH32 VCC_SM_4 BG32 VCC_SM_5 BF32 VCC_SM_6 BD32 VCC_SM_7 BC32 VCC_SM_8 BB32 VCC_SM_9 BA32 VCC_SM_10 AY32 VCC_SM_11 AW32 VCC_SM_12 AV32 VCC_SM_13 AU32 VCC_SM_14 AT32 VCC_SM_15 AR32 VCC_SM_16 AP32 VCC_SM_17 AN32 VCC_SM_18 BH31 VCC_SM_19 BG31 VCC_SM_20 BF31 VCC_SM_21 BG30 VCC_SM_22 BH29 VCC_SM_23 BG29 VCC_SM_24 BF29 VCC_SM_25 BD29 VCC_SM_26 BC29 VCC_SM_27 BB29 VCC_SM_28 BA29 VCC_SM_29 AY29 VCC_SM_30 AW29 VCC_SM_31 AV29 VCC_SM_32 AU29 VCC_SM_33 AT29 VCC_SM_34 AR29 VCC_SM_35 AP29

VCC_SM_36/NC BA36

VCC_SM_37/NC BB24

VCC_SM_38/NC BD16

VCC_SM_39/NC BB21

VCC_SM_40/NC AW16

VCC_SM_41/NC AW13

VCC_SM_42/NC AT13

VCC_AXG_1 Y26 VCC_AXG_2 AE25 VCC_AXG_3 AB25 VCC_AXG_4 AA25 VCC_AXG_5 AE24 VCC_AXG_6 AC24 VCC_AXG_7 AA24 VCC_AXG_8 Y24 VCC_AXG_9 AE23 VCC_AXG_10 AC23 VCC_AXG_11 AB23 VCC_AXG_12 AA23 VCC_AXG_13 AJ21 VCC_AXG_14 AG21 VCC_AXG_15 AE21 VCC_AXG_16 AC21 VCC_AXG_17 AA21 VCC_AXG_18 Y21 VCC_AXG_19 AH20 VCC_AXG_20 AF20 VCC_AXG_21 AE20 VCC_AXG_22 AC20 VCC_AXG_23 AB20 VCC_AXG_24 AA20 VCC_AXG_25 T17 VCC_AXG_26 T16 VCC_AXG_27 AM15 VCC_AXG_28 AL15 VCC_AXG_29 AE15 VCC_AXG_30 AJ15 VCC_AXG_31 AH15 VCC_AXG_32 AG15 VCC_AXG_33 AF15 VCC_AXG_34 AB15 VCC_AXG_35 AA15 VCC_AXG_36 Y15 VCC_AXG_37 V15 VCC_AXG_38 U15 VCC_AXG_39 AN14 VCC_AXG_40 AM14 VCC_AXG_41 U14 VCC_AXG_42 T14

VCC_AXG_SENSE AJ14

VSS_AXG_SENSE AH14

+

C126

330U_D2E_2.5VM_R15

+

C126

330U_D2E_2.5VM_R15 1

2

C1490 0.1U_0402_16V7K

@

C1490 0.1U_0402_16V7K

@

1

2

C123

0.1U_0402_16V4Z C123

0.1U_0402_16V4Z 1

2

C141 0.22U_0402_6.3V6K C141 0.22U_0402_6.3V6K 1

2

J2 JUMP_43X79

@

J2 JUMP_43X79

@

1

C133

0.22U_0402_6.3V6K C133

0.22U_0402_6.3V6K C124

10U_0805_10V4Z C124

10U_0805_10V4Z

1

2

C1480

0.1U_0402_16V4Z

GM@

C1480

0.1U_0402_16V4Z

GM@

1

2

+

C1485

330U_D2E_2.5VM_R15 GM@

+

C1485

330U_D2E_2.5VM_R15 GM@

1

2

C130 10U_0805_10V4Z C130 10U_0805_10V4Z 1

2

R1175 0_0402_5%

PM@

R1175 0_0402_5%

PM@

GM@

GM@

10U_0805_10V4Z

GM@

C1483

10U_0805_10V4Z

GM@

1

2

U2G

CANTIGA ES_FCBGA1329 GM@

U2G

CANTIGA ES_FCBGA1329 GM@

VCC_1 AG34 VCC_2 AC34 VCC_3 AB34 VCC_4 AA34 VCC_5 Y34 VCC_6 V34 VCC_7 U34 VCC_8 AM33 VCC_9 AK33 VCC_10 AJ33 VCC_11 AG33 VCC_12 AF33

VCC_13 AE33 VCC_14 AC33 VCC_15 AA33 VCC_16 Y33 VCC_17 W33 VCC_18 V33 VCC_19 U33 VCC_20 AH28 VCC_21 AF28 VCC_22 AC28 VCC_23 AA28 VCC_24 AJ26 VCC_25 AG26 VCC_26 AE26 VCC_27 AC26 VCC_28 AH25 VCC_29 AG25 VCC_30 AF25 VCC_31 AG24 VCC_32 AJ23 VCC_33 AH23 VCC_34 AF23 VCC_35 T32

VCC_NCTF_1 AM32 VCC_NCTF_2 AL32 VCC_NCTF_3 AK32 VCC_NCTF_4 AJ32 VCC_NCTF_5 AH32 VCC_NCTF_6 AG32 VCC_NCTF_7 AE32 VCC_NCTF_8 AC32 VCC_NCTF_9 AA32 VCC_NCTF_10 Y32 VCC_NCTF_11 W32 VCC_NCTF_12 U32 VCC_NCTF_13 AM30 VCC_NCTF_14 AL30 VCC_NCTF_15 AK30 VCC_NCTF_16 AH30 VCC_NCTF_17 AG30 VCC_NCTF_18 AF30 VCC_NCTF_19 AE30 VCC_NCTF_20 AC30 VCC_NCTF_21 AB30 VCC_NCTF_22 AA30 VCC_NCTF_23 Y30 VCC_NCTF_24 W30 VCC_NCTF_25 V30 VCC_NCTF_26 U30 VCC_NCTF_27 AL29 VCC_NCTF_28 AK29 VCC_NCTF_29 AJ29 VCC_NCTF_30 AH29 VCC_NCTF_31 AG29 VCC_NCTF_32 AE29 VCC_NCTF_33 AC29 VCC_NCTF_34 AA29 VCC_NCTF_35 Y29 VCC_NCTF_36 W29 VCC_NCTF_37 V29 VCC_NCTF_38 AL28 VCC_NCTF_39 AK28 VCC_NCTF_40 AL26 VCC_NCTF_41 AK26 VCC_NCTF_42 AK25 VCC_NCTF_43 AK24 VCC_NCTF_44 AK23

C1486 0.1U_0402_16V7K

@

C1486 0.1U_0402_16V7K

@

1

2

C1488 0.1U_0402_16V7K

@

C1488 0.1U_0402_16V7K

@

1

2

C122

10U_0805_10V4Z C122

10U_0805_10V4Z 1

2

C1479

0.47U_0603_16V4Z

GM@

C1479

0.47U_0603_16V4Z

GM@

C143 0.47U_0603_16V4Z C143 0.47U_0603_16V4Z 1

2

Trang 2

D D

+1.05VS_PEGPLL

+1.05VS_PEGPLL

VTTLF_CAP1 VTTLF_CAP3 +1.5VS_HDA

+1.8V_LVDS

+1.05VS_DMI

+1.05VS_AXF

+1.05VS

+1.8V_SM_CK

+1.8V

+3VS_CRTDAC

+1.05VS

+1.05VS_A_SM_CK +1.05VS

+1.05VS

+1.8V_TX_LVDS

+1.05VS_DPLLA +1.05VS_DPLLB +1.05VS_HPLL

+1.05VS

+1.05VS_DPLLA

+1.05VS_DPLLB

+1.05VS_HPLL

+1.05VS_MPLL +1.05VS

+1.8V

+3VS_CRTDAC

+3VS_DACBG

+3VS_DACBG

+1.05VS

+1.05VS_PEG

+1.05VS

+3VS

+1.8V +1.8V_TX_LVDS

+1.05VS_MPLL

+1.5VS

+VCCA_PEG_BG

+1.05VS_A_SM

+1.5VS_QDAC

+1.5VS

+1.5VS_QDAC

+1.5VS_TVDAC

+1.5VS

+1.5VS_TVDAC +3VS_TVDAC

+3VS

+3VS

+1.5VS

+3VS

+3VS

+3VS_TVDAC

+1.05VS_HPLL

+1.05VS

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

VCC_AXF: 321.35mA (10UF*1, 1UF*1)

VCC_SM_CK: 119.85mA (10UF*1, 0.1UF*1)

+1.8V_TX_LVDS: 118.8mA (22UF*1, 1000PF*1)

VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)

VCCA_DAC_BG: 2.6833333mA

(0.1UF*1, 0.01UF*1)

VCCA_SM:

(22UF*2, 4.7UF*1, 1UF*1)

VCCA_SM_CK: 24mA (22UF*1, 2.2UF*1, 0.1UF*1)

VCCA_DPLLA VCCA_DPLLB: 64.8mA (220UF*1, 0.1UF*1)

VCCA_HPLL: 24mA

(4.7UF*1, 0.1UF*1)

VCCD_HPLL: 157.2mA (0.1UF*1)

VCCA_MPLL: 139.2mA

(22UF*1, 0.1UF*1)

VCCA_PEG_PLL: 50mA (0.1UF*1)

VCCA_PEG_BG: 0.414mA (0.1UF*1)

VCCA_LVDS: 13.2mA (1000PF*1)

VCCD_LVDS: 60.311111mA (1UF*1)

VCCD_TVDAC: 58.696mA (0.1UF*1, 0.01UF*1)

VTT: 852mA (270UF*1, 4.7UF*2, 2.2UF*1, 0.47UF*1)

VCC_DMI: 456mA (0.1UF*1)

+1.05VS_PEG: 1782mA (220UF*1, 22UF*1, 4.7UF*1) VCC_HV: 105.3mA

VCCD_PEG_PLL: 50mA (0.1UF*1)

VCCD_QDAC: 48.363mA (0.1UF*1, 0.01UF*1)

VCCD_HDA: 50mA (0.1UF*1)

NO_STUFF

VCCA_TV_DAC: 40mA (0.1UF*1, 0.01UF*1 for each DAC)

No CIS Symbol

Close to Ball A26, B27

Close to Ball A25

180Ohm@100MHz

Please check Power

source if want

source if want support IAMT

Please check Power source if want support IAMT

Please check Power source if want support IAMT

Please check Power source if want support IAMT

Please check Power source if want support IAMT

Please check Power source if want support IAMT

Please check Power source if want support IAMT

1uH 30%

0.1uH 20%

Also power for internal Thermal Sensor

180Ohm@100MHz

120Ohm@100MHz

Close to A32

852mA

1782mA

456mA

0.414mA 73mA

48.363mA

105.3mA

58.696mA 87.79mA 2.69mA

60.31mA

118.8mA

13.2mA 24mA

157.2mA

64.8mA

139.2mA

50mA

50mA

50mA

480mA

24mA C103

22U_0805_6.3V6M C103

22U_0805_6.3V6M

1

2

C89 0.1U_0402_16V4Z C89 0.1U_0402_16V4Z 1

2

L17 0_1210_5%

GM@

L17 0_1210_5%

GM@

L18 0_1210_5%

GM@

L18 0_1210_5%

GM@

C1498 22U_0805_6.3V6M C1498 22U_0805_6.3V6M 1

2

L22 MBK1608121YZF_0603 L22

MBK1608121YZF_0603

R97 0_0402_5%

R97 0_0402_5%

C96 4.7U_0805_10V4Z C96 4.7U_0805_10V4Z 1

2

C102 2.2U_0603_6.3V6K

@

C102 2.2U_0603_6.3V6K

@

1

2

C1496 10U_0805_10V4Z GM@

C1496 10U_0805_10V4Z GM@

1

2

C1512 1000P_0402_50V7K GM@

C1512 1000P_0402_50V7K GM@

1

2

C1517 0.1U_0402_16V4Z GM@

C1517 0.1U_0402_16V4Z GM@

1

2

POWER

U2H

CANTIGA ES_FCBGA1329 GM@

POWER

U2H

CANTIGA ES_FCBGA1329 GM@

VTT_1 U13 VTT_2 T13 VTT_3 U12 VTT_4 T12 VTT_5 U11 VTT_6 T11 VTT_7 U10 VTT_8 T10 VTT_9 U9 VTT_10 T9 VTT_11 U8 VTT_12 T8 VTT_13 U7 VTT_14 T7 VTT_15 U6 VTT_16 T6 VTT_17 U5 VTT_18 T5 VTT_19 V3 VTT_20 U3 VTT_21 V2 VTT_22 U2 VTT_23 T2 VTT_24 V1 VTT_25 U1

VCC_AXF_1 B22 VCC_AXF_2 B21 VCC_AXF_3 A21

VCC_SM_CK_1 BF21 VCC_SM_CK_2 BH20 VCC_SM_CK_3 BG20 VCC_SM_CK_4 BF20

VCC_TX_LVDS K47

VCC_HV_1 C35 VCC_HV_2 B35 VCC_HV_3 A35

VCC_PEG_1 V48 VCC_PEG_2 U48 VCC_PEG_3 V47 VCC_PEG_4 U47 VCC_PEG_5 U46

VCC_DMI_1 AH48 VCC_DMI_2 AF48 VCC_DMI_3 AH47 VCC_DMI_4 AG47

VTTLF1 A8 VTTLF2 L1 VTTLF3 AB2

VCCA_CRT_DAC_1 B27

VCCA_CRT_DAC_2 A26

VCCA_DAC_BG A25

VSSA_DAC_BG B25

VCCA_DPLLA F47 VCCA_DPLLB L48 VCCA_HPLL AD1 VCCA_MPLL AE1

VCCA_LVDS J48 VSSA_LVDS J47

VCCA_PEG_BG AD48

VCCA_PEG_PLL AA48

VCCA_SM_1 AR20 VCCA_SM_2 AP20 VCCA_SM_3 AN20 VCCA_SM_4 AR17 VCCA_SM_5 AP17 VCCA_SM_6 AN17 VCCA_SM_7 AT16 VCCA_SM_8 AR16 VCCA_SM_9 AP16

VCCA_SM_CK_1 AP28

VCCA_SM_CK_2 AN28

VCCA_SM_CK_3 AP25

VCCA_SM_CK_4 AN25

VCCA_SM_CK_5 AN24

VCCA_SM_CK_NCTF_1 AM28

VCCA_SM_CK_NCTF_2 AM26

VCCA_SM_CK_NCTF_3 AM25

VCCA_SM_CK_NCTF_4 AL25

VCCA_SM_CK_NCTF_5 AM24

VCCA_SM_CK_NCTF_6 AL24

VCCA_SM_CK_NCTF_7 AM23

VCCA_SM_CK_NCTF_8 AL23

VCCA_TV_DAC_1 B24

VCCA_TV_DAC_2 A24

VCC_HDA A32

VCCD_TVDAC M25 VCCD_QDAC L28

VCCD_HPLL AF1 VCCD_PEG_PLL AA47

VCCD_LVDS_1 M38

VCCD_LVDS_2 L37

C80 4.7U_0805_10V4Z C80 4.7U_0805_10V4Z 1

2 C72

4.7U_0805_10V4Z C72

4.7U_0805_10V4Z

1

2

C107 0.1U_0402_16V4Z C107 0.1U_0402_16V4Z 1

2

C1520 0.1U_0402_16V4Z C1520 0.1U_0402_16V4Z 1

2

R103 0_0603_5%

R103 0_0603_5%

C1525

0.01U_0402_16V7K C1525

0.01U_0402_16V7K

1

2

+ C1515

220U_D2_4VM_R15

+ C1515

220U_D2_4VM_R15 1

2

R1190 0_0805_5%

R1190 0_0805_5%

R1192 0_0402_5%

PM@

R1192 0_0402_5%

PM@

R1188 0_0402_5%

@

R1188 0_0402_5%

@

C1511 10U_0805_6.3V6M

@

C1511 10U_0805_6.3V6M

@

1

2

R1182 1_0402_1%

R1182 1_0402_1%

L21 MBK1608221YZF_0603 L21

MBK1608221YZF_06031 2

C1508 10U_0805_6.3V6M C1508 10U_0805_6.3V6M

C112 0.47U_0603_16V4Z C112 0.47U_0603_16V4Z 1

2

R1184 0_0402_5%

PM@

R1184 0_0402_5%

PM@

C1495

0.1U_0402_16V4Z C1495

0.1U_0402_16V4Z

1

2

+

C1501

220U_D2_4VM_R15

GM@

+

C1501

220U_D2_4VM_R15

GM@

1

2

L19 MBK1608121YZF_0603 L19

MBK1608121YZF_06031 2

R96 0_0402_5%

@

R96 0_0402_5%

@

C1502

0.01U_0402_16V7K GM@

C1502

0.01U_0402_16V7K GM@

1

2

R1186 0_0805_5%

R1186 0_0805_5%

C1491 4.7U_0805_10V4Z C1491 4.7U_0805_10V4Z 1

2

C1505 10U_0805_6.3V6M

@

C1505 10U_0805_6.3V6M

@

1

2

C1497

0.1U_0402_16V4Z GM@

C1497

0.1U_0402_16V4Z GM@

1

2

L24 MBK1608221YZF_0603 GM@

L24 MBK1608221YZF_0603 GM@

+

C71 220U_D2_4VM_R15

+

C71 220U_D2_4VM_R15 1

2

R1177 0.5_0603_1%

R1177 0.5_0603_1%

C82

2.2U_0603_6.3V6K C82

2.2U_0603_6.3V6K

1

2

C1494

0.1U_0402_16V4Z GM@

C1494

0.1U_0402_16V4Z GM@

1

2

C105 0.1U_0402_16V4Z C105 0.1U_0402_16V4Z 1

2

R1189 0_0402_5%R1189 0_0402_5%

C1500 0.1U_0402_16V4Z GM@

C1500 0.1U_0402_16V4Z GM@

1

2

C1506 1U_0402_6.3V6K C1506 1U_0402_6.3V6K 1

2

+

C1493 220U_D2_4VM_R15 GM@

+

C1493 220U_D2_4VM_R15 GM@

1

2

C97 1U_0402_6.3V6K C97 1U_0402_6.3V6K

1

2

C1510

0.01U_0402_16V7K GM@

C1510

0.01U_0402_16V7K GM@

1

2

R1181 1_0402_1%

R1181 1_0402_1%

C111

0.47U_0603_16V4Z C111

0.47U_0603_16V4Z 1

2

C1499 1000P_0402_50V7K GM@

C1499 1000P_0402_50V7K GM@

1

2

+

C94 220U_D2_4VM_R15

@

+

C94 220U_D2_4VM_R15

@

1

2

C1518 0.1U_0402_16V4Z

GM@

C1518 0.1U_0402_16V4Z

GM@

1

2

C1524 0.1U_0402_16V4Z C1524 0.1U_0402_16V4Z 1

2

R1187 0_0402_5%

PM@

R1187 0_0402_5%

PM@

L16 MBK1608121YZF_0603 L16

MBK1608121YZF_06031 2

C1519 0.1U_0402_16V4Z C1519 0.1U_0402_16V4Z 1

2

C1522 10U_0805_6.3V6M

GM@

C1522 10U_0805_6.3V6M

GM@

1

2

L20 MBK1608301YZF_0603 GM@

L20 MBK1608301YZF_0603 GM@

L23

MBK1608221YZF_0603

GM@

L23

MBK1608221YZF_0603

GM@

R1176 0_0402_5%

PM@

R1176 0_0402_5%

PM@

C1509 0.1U_0402_16V4Z GM@

C1509 0.1U_0402_16V4Z GM@

1

2

R1195 0_0402_5%

@

R1195 0_0402_5%

@

C1514 10U_0805_10V4Z C1514 10U_0805_10V4Z 1

2

R1178 0_0402_5%

PM@

R1178 0_0402_5%

PM@

C1504 0.1U_0402_16V4Z C1504 0.1U_0402_16V4Z 1

2

R100 0_0805_5%

R100 0_0805_5%

R1179 0_0402_5%

PM@

R1179 0_0402_5%

PM@

C1523 1U_0402_6.3V6K

GM@

C1523 1U_0402_6.3V6K

GM@

1

2

R1194

10_0603_5%

R1194

10_0603_5%

R1183 0_0603_5%

GM@

R1183 0_0603_5%

GM@

L25 MBK1608221YZF_0603

L25 MBK1608221YZF_0603

D8

CH751H-40PT_SOD323-2 D8

CH751H-40PT_SOD323-2

C1513 10U_0805_10V4Z GM@

C1513 10U_0805_10V4Z GM@

1

2

C1516

0.01U_0402_16V7K GM@

C1516

0.01U_0402_16V7K GM@

1

2

R1193 100_0603_1%

R1193 100_0603_1%

C1492

0.1U_0402_16V4Z C1492

0.1U_0402_16V4Z

1

2

R1191 0_0603_5%

GM@

R1191 0_0603_5%

GM@

C1507 0.1U_0402_16V4Z C1507 0.1U_0402_16V4Z 1

2

C110 0.47U_0603_16V4Z C110 0.47U_0603_16V4Z 1

2

R1180 0_0603_5%

R1180 0_0603_5%

C81 0.47U_0603_16V4Z C81 0.47U_0603_16V4Z 1

2

C1521

0.022U_0402_16V7K C1521

0.022U_0402_16V7K

1

2

C95

22U_0805_6.3V6M C95

22U_0805_6.3V6M

1

2

C1503 10U_0805_6.3V6M C1503 10U_0805_6.3V6M 1 2

R1185 0_0402_5%

PM@

R1185 0_0402_5%

PM@

Trang 3

D D

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

VSS

U2J

CANTIGA ES_FCBGA1329 GM@

VSS

U2J

CANTIGA ES_FCBGA1329 GM@

VSS_297 AH8 VSS_298 Y8 VSS_299 L8 VSS_300 E8 VSS_301 B8 VSS_302 AY7 VSS_303 AU7 VSS_304 AN7 VSS_305 AJ7 VSS_306 AE7 VSS_307 AA7 VSS_308 N7 VSS_309 J7 VSS_310 BG6 VSS_311 BD6 VSS_312 AV6 VSS_313 AT6 VSS_314 AM6 VSS_315 M6 VSS_316 C6 VSS_317 BA5 VSS_318 AH5 VSS_319 AD5 VSS_320 Y5 VSS_321 L5 VSS_322 J5 VSS_323 H5 VSS_324 F5 VSS_325 BE4 VSS_327 BC3 VSS_328 AV3 VSS_329 AL3 VSS_330 R3 VSS_331 P3 VSS_332 F3 VSS_333 BA2 VSS_334 AW2 VSS_335 AU2 VSS_336 AR2 VSS_337 AP2 VSS_338 AJ2 VSS_339 AH2 VSS_340 AF2 VSS_341 AE2 VSS_342 AD2 VSS_343 AC2 VSS_344 Y2 VSS_345 M2 VSS_346 K2 VSS_347 AM1 VSS_348 AA1 VSS_349 P1 VSS_350 H1 VSS_351 U24 VSS_352 U28 VSS_353 U25 VSS_354 U29 VSS_NCTF_1 AF32 VSS_NCTF_2 AB32 VSS_NCTF_3 V32 VSS_NCTF_4 AJ30 VSS_NCTF_5 AM29 VSS_NCTF_6 AF29 VSS_NCTF_7 AB29 VSS_NCTF_8 U26 VSS_NCTF_9 U23 VSS_NCTF_10 AL20 VSS_NCTF_11 V20 VSS_NCTF_12 AC19 VSS_NCTF_13 AL17 VSS_NCTF_14 AJ17 VSS_NCTF_15 AA17 VSS_NCTF_16 U17 VSS_SCB_1 BH48 VSS_SCB_2 BH1 VSS_SCB_3 A48 VSS_SCB_4 C1

NC_26 E1 NC_27 D2 NC_28 C3 NC_29 B4 NC_30 A5 NC_31 A6 NC_32 A43 NC_33 A44 NC_34 B45 NC_35 C46 NC_36 D47 NC_37 B47 NC_38 A46 NC_39 F48 NC_40 E48 NC_41 C48 NC_42 B48

VSS_199 BG21 VSS_200 L12 VSS_201 AW21 VSS_202 AU21 VSS_203 AP21 VSS_204 AN21 VSS_205 AH21 VSS_206 AF21 VSS_207 AB21 VSS_208 R21 VSS_209 M21 VSS_210 J21 VSS_211 G21 VSS_212 BC20 VSS_213 BA20 VSS_214 AW20 VSS_215 AT20 VSS_216 AJ20 VSS_217 AG20 VSS_218 Y20 VSS_219 N20 VSS_220 K20 VSS_221 F20 VSS_222 C20 VSS_223 A20 VSS_224 BG19 VSS_225 A18 VSS_226 BG17 VSS_227 BC17 VSS_228 AW17 VSS_229 AT17 VSS_230 R17 VSS_231 M17 VSS_232 H17 VSS_233 C17 VSS_235 BA16 VSS_237 AU16 VSS_238 AN16 VSS_239 N16 VSS_240 K16 VSS_241 G16 VSS_242 E16 VSS_243 BG15 VSS_244 AC15 VSS_245 W15 VSS_246 A15 VSS_247 BG14 VSS_248 AA14 VSS_249 C14 VSS_250 BG13 VSS_251 BC13 VSS_252 BA13

VSS_255 AN13 VSS_256 AJ13 VSS_257 AE13 VSS_258 N13 VSS_259 L13 VSS_260 G13 VSS_261 E13 VSS_263 AV12 VSS_264 AT12 VSS_265 AM12 VSS_266 AA12 VSS_267 J12 VSS_268 A12 VSS_269 BD11 VSS_270 BB11 VSS_271 AY11 VSS_272 AN11 VSS_273 AH11 VSS_275 Y11 VSS_276 N11 VSS_277 G11 VSS_278 C11 VSS_279 BG10 VSS_280 AV10 VSS_281 AT10 VSS_282 AJ10 VSS_283 AE10 VSS_284 AA10 VSS_285 M10 VSS_286 BF9 VSS_287 BC9 VSS_288 AN9 VSS_289 AM9 VSS_290 AD9 VSS_291 G9 VSS_292 B9 VSS_293 BH8 VSS_294 BB8 VSS_295 AV8 VSS_296 AT8

VSS_262 BF12

VSS_SCB_5 A3

VSS

U2I

CANTIGA ES_FCBGA1329 GM@

VSS

U2I

CANTIGA ES_FCBGA1329 GM@

VSS_100 AM36 VSS_101 AE36 VSS_102 P36 VSS_103 L36 VSS_104 J36 VSS_105 F36 VSS_106 B36 VSS_107 AH35 VSS_108 AA35 VSS_109 Y35 VSS_110 U35 VSS_111 T35 VSS_112 BF34 VSS_113 AM34 VSS_114 AJ34 VSS_115 AF34 VSS_116 AE34 VSS_117 W34 VSS_118 B34 VSS_119 A34 VSS_120 BG33 VSS_121 BC33 VSS_122 BA33 VSS_123 AV33 VSS_124 AR33 VSS_125 AL33 VSS_126 AH33 VSS_127 AB33 VSS_128 P33 VSS_129 L33 VSS_130 H33 VSS_131 N32 VSS_132 K32 VSS_133 F32 VSS_134 C32 VSS_135 A31 VSS_136 AN29 VSS_137 T29 VSS_138 N29 VSS_139 K29 VSS_140 H29 VSS_141 F29 VSS_142 A29 VSS_143 BG28 VSS_144 BD28 VSS_145 BA28 VSS_146 AV28 VSS_147 AT28 VSS_148 AR28 VSS_149 AJ28 VSS_150 AG28 VSS_151 AE28 VSS_152 AB28 VSS_153 Y28 VSS_154 P28 VSS_155 K28 VSS_156 H28 VSS_157 F28 VSS_158 C28 VSS_159 BF26 VSS_160 AH26 VSS_161 AF26 VSS_162 AB26 VSS_163 AA26 VSS_164 C26 VSS_165 B26 VSS_166 BH25 VSS_167 BD25 VSS_168 BB25 VSS_169 AV25 VSS_170 AR25 VSS_171 AJ25 VSS_172 AC25 VSS_173 Y25 VSS_174 N25 VSS_175 L25 VSS_176 J25 VSS_177 G25 VSS_178 E25 VSS_179 BF24 VSS_180 AD12 VSS_181 AY24 VSS_182 AT24 VSS_183 AJ24 VSS_184 AH24 VSS_185 AF24 VSS_186 AB24 VSS_187 R24 VSS_188 L24 VSS_189 K24 VSS_190 J24 VSS_191 G24 VSS_192 F24 VSS_193 E24 VSS_194 BH23 VSS_195 AG23 VSS_196 Y23 VSS_197 B23 VSS_198 A23

VSS_1 AU48 VSS_2 AR48 VSS_3 AL48 VSS_4 BB47 VSS_5 AW47 VSS_6 AN47 VSS_7 AJ47 VSS_8 AF47 VSS_9 AD47 VSS_10 AB47 VSS_11 Y47 VSS_12 T47 VSS_13 N47 VSS_14 L47 VSS_15 G47 VSS_16 BD46 VSS_17 BA46 VSS_18 AY46 VSS_19 AV46 VSS_20 AR46 VSS_21 AM46 VSS_22 V46 VSS_23 R46 VSS_24 P46 VSS_25 H46 VSS_26 F46 VSS_27 BF44 VSS_28 AH44 VSS_29 AD44 VSS_30 AA44 VSS_31 Y44 VSS_32 U44 VSS_33 T44 VSS_34 M44 VSS_35 F44 VSS_36 BC43 VSS_37 AV43 VSS_38 AU43 VSS_39 AM43 VSS_40 J43 VSS_41 C43 VSS_42 BG42 VSS_43 AY42 VSS_44 AT42 VSS_45 AN42 VSS_46 AJ42 VSS_47 AE42 VSS_48 N42 VSS_49 L42 VSS_50 BD41 VSS_51 AU41 VSS_52 AM41 VSS_53 AH41 VSS_54 AD41 VSS_55 AA41 VSS_56 Y41 VSS_57 U41 VSS_58 T41 VSS_59 M41 VSS_60 G41 VSS_61 B41 VSS_62 BG40 VSS_63 BB40 VSS_64 AV40 VSS_65 AN40 VSS_66 H40 VSS_67 E40 VSS_68 AT39 VSS_69 AM39 VSS_70 AJ39 VSS_71 AE39 VSS_72 N39 VSS_73 L39 VSS_74 B39 VSS_75 BH38 VSS_76 BC38 VSS_77 BA38 VSS_78 AU38 VSS_79 AH38 VSS_80 AD38 VSS_81 AA38 VSS_82 Y38 VSS_83 U38 VSS_84 T38 VSS_85 J38 VSS_86 F38 VSS_87 C38 VSS_88 BF37 VSS_89 BB37 VSS_90 AW37 VSS_91 AT37 VSS_92 AN37 VSS_93 AJ37 VSS_94 H37 VSS_95 C37 VSS_96 BG36 VSS_97 BD36 VSS_98 AK15 VSS_99 AU36

VSS_199 AJ6

Trang 4

D D

DDRA_SDQ27 DDRA_SDQ17

DDRA_SDQ7

DDRA_SDM6

DDRA_SDM1

DDRA_SDQ40 DDRA_SDQS4

DDRA_SDQS2 DDRA_SDQS1

DDRA_SDQS6 DDRA_SDQS4#

DDRA_SDQS1#

DDRA_SDQS6#

DDRA_SDQ21 DDRA_SDQ1

DDRA_SCAS#

DDRA_SRAS#

DDRA_SWE#

DDRA_SMA3

DDRA_SMA7

DDRA_SMA2 DDRA_SMA6

DDRA_SMA1 DDRA_SMA10

DDRA_SMA12

DDRA_SMA5 DDRA_SMA9

DDRA_SMA4 DDRA_SMA11

DDRA_SCS0#

DDRA_SCS1#

DDRA_CKE1 DDRA_CKE0

DDRA_SBS0#

DDRA_SBS1#

DDRA_SMA13 DDRA_SDM3

DDRA_SDQS5

DDRA_SDQ55

DDRA_SDQS5#

DDRA_SDM5

DDRA_SDQS7 DDRA_SDM0

DDRA_SDQS7#

DDRA_SDQ28 DDRA_SDQ18

DDRA_SDQ8

DDRA_SDQ62 DDRA_SDM7

DDRA_ODT1

DDRA_ODT0 DDRA_SDM2

DDRA_SDQ52

DDRA_SDQS0 DDRA_SDQS0#

DDRA_SDQ2

DDRA_SDQS3 DDRA_SDQ3

DDRA_SDQS3#

DDRA_SDM4

DDRA_SMA[0 14]

DDRA_SDM[0 7]

DDRA_SDQ[0 63]

D_CK_SCLK D_CK_SDATA

DDRA_SBS2#

DDRA_SDQ6

DDRA_SDQ15 DDRA_SDQ12

DDRA_SDQ10 DDRA_SDQ9

DDRA_SDQ11

DDRA_SDQ22

DDRA_SDQ24

DDRA_SDQ30

DDRA_SDQ32

DDRA_SDQ34

DDRA_SDQ36

DDRA_SDQ38

DDRA_SDQ41

DDRA_SDQ47 DDRA_SDQ42

DDRA_SDQ44

DDRA_SDQ46

DDRA_SDQ49

DDRA_SDQ54

DDRA_SDQ61 DDRA_SDQ56

DDRA_SDQ59 DDRA_SDQ51

DDRA_SMA14 DDRA_SDQS2#

DDRA_SMA13 DDRA_ODT0

DDRA_SCS0#

DDRA_SRAS#

DDRA_SMA0 DDRA_SBS1#

DDRA_SMA6 DDRA_SMA4 DDRA_SMA7

DDRA_SMA2 DDRA_SMA11

DDRA_CKE1

DDRA_ODT1 DDRA_SWE#

DDRA_SBS0#

DDRA_SCAS#

DDRA_SCS1#

DDRA_SBS2#

DDRA_CKE0

DDRA_SMA3

DDRA_SMA10

DDRA_SMA12

DDRA_SMA5 DDRA_SMA9 DDRA_SMA8

DDRA_SCAS#

<9>

DDRA_SWE#

<9>

DDRA_SCS1#

<8>

DDRA_CKE0

<8>

DDRA_SBS0#

<9>

DDRA_CLK0# <8>

DDRA_CLK0 <8>

DDRA_CLK1# <8>

DDRA_CLK1 <8>

DDRA_SCS0# <8>

DDRA_SRAS# <9>

DDRA_SBS1# <9>

DDRA_SDQS1

<9>

DDRA_SDQS2

<9>

DDRA_SDQS3 <9>

DDRA_SDQS4

<9>

DDRA_SDQS5# <9>

DDRA_SDQS6

<9>

DDRA_SDQS0

<9>

DDRA_SDQS1#

<9>

DDRA_SDQS2#

<9>

DDRA_SDQS4#

<9>

DDRA_SDQS6#

<9>

DDRA_SDQS0#

<9>

DDRA_SDQS3# <9>

DDRA_SDQS5 <9>

DDRA_SDQS7# <9>

DDRA_SDQS7 <9>

DDRA_ODT1

<8>

DDRA_ODT0 <8>

DDRA_CKE1 <8>

DDRA_SDQ[0 63]

<9>

DDRA_SDM[0 7]

<9>

DDRA_SMA[0 14]

<9>

D_CK_SDATA

<15,16>

D_CK_SCLK

<15,16>

DDRA_SBS2#

<9>

PM_EXTTS#0 <8>

+3VS

+DIMM_VREF

+0.9VS

+1.8V

+1.8V

+0.9VS

+0.9VS

+0.9VS

+3VS

+DIMM_VREF

+1.8V

+DIMM_VREF

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

B

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

B

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

B

Thursday, October 30, 2008

Compal Electronics, Inc.

DIMM0 REV H:10.1mm (BOT)

20mils

20mils

To SODIMM and GMCH

C172 0.1U_0402_16V4Z

C172 0.1U_0402_16V4Z

1

2

C149 0.1U_0402_16V4Z C149 0.1U_0402_16V4Z 1

2

C164

0.1U_0402_16V4Z C164

0.1U_0402_16V4Z

1

2

C152 2.2U_0603_6.3V6K C152 2.2U_0603_6.3V6K 1

2

C167 0.1U_0402_16V4Z C167 0.1U_0402_16V4Z 1

2

C148

0.1U_0402_16V4Z C148

0.1U_0402_16V4Z

1

2

C168 0.1U_0402_16V4Z C168 0.1U_0402_16V4Z 1

2

C151 0.1U_0402_16V4Z C151 0.1U_0402_16V4Z 1

2

C153 2.2U_0603_6.3V6K C153 2.2U_0603_6.3V6K 1

2 C147

2.2U_0603_6.3V6K C147

2.2U_0603_6.3V6K

1

2

C166

0.1U_0402_16V4Z C166

0.1U_0402_16V4Z

1

2

C159

0.1U_0402_16V4Z C159

0.1U_0402_16V4Z 1

2

C157

0.1U_0402_16V4Z C157

0.1U_0402_16V4Z

1

2 C156

0.1U_0402_16V4Z C156 0.1U_0402_16V4Z 1

2

C169

0.1U_0402_16V4Z C169

0.1U_0402_16V4Z

1

2

C171

2.2U_0603_6.3V6K

C171

2.2U_0603_6.3V6K

1

2

JDIMM1

FOX_ASOA426-M4R-TR CONN@

JDIMM1

FOX_ASOA426-M4R-TR CONN@

VREF 1 VSS 3 DQ0 5 DQ1 7 VSS 9 DQS0#

11 DQS0 13 VSS 15 DQ2 17 DQ3 19 VSS 21 DQ8 23 DQ9 25 VSS 27 DQS1#

29 DQS1 31 VSS 33 DQ10 35 DQ11 37 VSS 39

VSS 41 DQ16 43 DQ17 45 VSS 47 DQS2#

49 DQS2 51 VSS 53 DQ18 55 DQ19 57 VSS 59 DQ24 61 DQ25 63 VSS 65 DM3 67 NC 69 VSS 71 DQ26 73 DQ27 75 VSS 77 CKE0 79 VDD 81 NC 83 BA2 85 VDD 87 A12 89 A9 91 A8 93 VDD 95 A5 97 A3 99 A1 101 VDD 103 A10/AP 105 BA0 107 WE#

109 VDD 111 CAS#

113 NC/S1#

115 VDD 117 NC/ODT1 119 VSS 121 DQ32 123 DQ33 125 VSS 127 DQS4#

129 DQS4 131 VSS 133 DQ34 135 DQ35 137 VSS 139 DQ40 141 DQ41 143

VSS 2 DQ4 4 DQ5 6 VSS 8 DM0 10 VSS 12 DQ6 14 DQ7 16 VSS 18 DQ12 20 DQ13 22 VSS 24 DM1 26 VSS 28 CK0 30 CK0# 32 VSS 34 DQ14 36 DQ15 38 VSS 40

VSS 42 DQ20 44 DQ21 46 VSS 48

NC 50 DM2 52 VSS 54 DQ22 56 DQ23 58 VSS 60 DQ28 62 DQ29 64 VSS 66 DQS3# 68 DQS3 70 VSS 72 DQ30 74 DQ31 76 VSS 78 NC/CKE1 80 VDD 82 NC/A15 84 NC/A14 86 VDD 88 A11 90 A7 92 A6 94 VDD 96 A4 98 A2 100 A0 102 VDD 104 BA1 106 RAS# 108 S0# 110 VDD 112 ODT0 114 NC/A13 116 VDD 118

NC 120 VSS 122 DQ36 124 DQ37 126 VSS 128 DM4 130 VSS 132 DQ38 134 DQ39 136 VSS 138 DQ44 140 DQ45 142 VSS 144 VSS

145 DM5 147 VSS 149 DQ42 151 DQ43 153 VSS 155 DQ48 157 DQ49 159 VSS 161 NC,TEST 163 VSS 165 DQS6#

167 DQS6 169 VSS 171 DQ50 173 DQ51 175 VSS 177 DQ56 179 DQ57 181 VSS 183 DM7 185 VSS 187 DQ58 189 DQ59 191 VSS 193 SDA 195 SCL 197 VDDSPD 199

DQS5# 146 DQS5 148 VSS 150 DQ46 152 DQ47 154 VSS 156 DQ52 158 DQ53 160 VSS 162 CK1 164 CK1# 166 VSS 168 DM6 170 VSS 172 DQ54 174 DQ55 176 VSS 178 DQ60 180 DQ61 182 VSS 184 DQS7# 186 DQS7 188 VSS 190 DQ62 192 DQ63 194 VSS 196 SAO 198 SA1 200

C165 0.1U_0402_16V4Z C165 0.1U_0402_16V4Z 1

2

C170 0.1U_0402_16V4Z C170 0.1U_0402_16V4Z 1

2

C163 0.1U_0402_16V4Z C163 0.1U_0402_16V4Z 1

2

C155 2.2U_0603_6.3V6K C155 2.2U_0603_6.3V6K 1

2

R1196 1K_0402_1%

R1196 1K_0402_1%

R1197 1K_0402_1%

R1197 1K_0402_1%

C161

0.1U_0402_16V4Z C161

0.1U_0402_16V4Z 1

2

C162 0.1U_0402_16V4Z C162 0.1U_0402_16V4Z 1

2 C160

0.1U_0402_16V4Z C160 0.1U_0402_16V4Z 1

2

C154

2.2U_0603_6.3V6K C154

2.2U_0603_6.3V6K

1

2

C158 0.1U_0402_16V4Z C158 0.1U_0402_16V4Z 1

2

Trang 5

1 1

DDRB_SDQS1

DDRB_SDQS2

DDRB_SDQ40 DDRB_SDQS4

DDRB_SDQS6 DDRB_SDQS4#

DDRB_SDQS1#

DDRB_SDQS2#

DDRB_SDQ41

DDRB_SDQS6#

DDRB_SDQ11 DDRB_SDQ5

DDRB_SMA3

DDRB_SWE#

DDRB_SCAS#

DDRB_SMA9 DDRB_SMA5 DDRB_SMA12

DDRB_SMA10 DDRB_SMA1 DDRB_CKE0

DDRB_SCS1#

DDRB_SMA8 DDRB_SDM3

DDRB_SBS0#

DDRB_SDQ25

DDRB_SDQ35

DDRB_SDM5 DDRB_SDQ18

DDRB_SDQ49

DDRB_SDQ9

DDRB_SDQ19

DDRB_SDM7 DDRB_SDQ43 DDRB_ODT1

DDRB_SDQ42

DDRB_SDQS0#

DDRB_SDQS0 DDRB_SDQ2

DDRB_SDQ33

DDRB_SDQ56

DDRB_SDQ3

DDRB_SDQ37 DDRB_SDQ7

DDRB_SDM6

DDRB_SDM1

DDRB_SRAS#

DDRB_SMA7

DDRB_SMA2 DDRB_SMA6 DDRB_SMA4 DDRB_SMA11

DDRB_SCS0#

DDRB_CKE1

DDRB_SBS1#

DDRB_SMA13

DDRB_SDQ54 DDRB_SDQS5

DDRB_SDQ55

DDRB_SDQ44 DDRB_SDQS5#

DDRB_SDQ45 DDRB_SDQ14

DDRB_SDQS7 DDRB_SDM0

DDRB_SDQS7#

DDRB_SDQ62

DDRB_ODT0 DDRB_SDM2

DDRB_SDQ60 DDRB_SDQ52

DDRB_SDQ22 DDRB_SDQ12

DDRB_SDQS3 DDRB_SDQS3#

DDRB_SDM4

DDRB_SDQ46 DDRB_SDQ36

DDRB_SDQ[0 63]

DDRB_SMA[0 14]

DDRB_SDM[0 7]

D_CK_SCLK D_CK_SDATA

DDRB_SRAS#

DDRB_SCS0#

DDRB_SMA0

DDRB_SMA6

DDRB_SMA4 DDRB_SBS1#

DDRB_SMA7

DDRB_SMA2

DDRB_ODT0 DDRB_SMA13

DDRB_SBS2#

DDRB_SBS2#

DDRB_CKE0

DDRB_SCS1#

DDRB_SCAS#

DDRB_ODT1

DDRB_SMA1

DDRB_SBS0#

DDRB_SMA9

DDRB_SMA8

DDRB_SWE#

DDRB_SMA10 DDRB_SMA3

DDRB_SMA12

DDRB_SMA5

DDRB_SDQ1

DDRB_SDQ16

DDRB_SDQ21 DDRB_SDQ17

DDRB_SDQ20

DDRB_SDQ29 DDRB_SDQ24

DDRB_SDQ31 DDRB_SDQ28

DDRB_SDQ27

DDRB_SDQ30

DDRB_SDQ39

DDRB_SDQ51

DDRB_SDQ61 DDRB_SDQ57

DDRB_SDQ58

DDRB_SMA14

DDRB_CKE1

DDRB_SMA11

DDRB_SCS0# <8>

DDRB_SCS1#

<8>

DDRB_SCAS#

<9>

DDRB_SWE#

<9>

DDRB_CKE0

<8>

DDRB_SBS0#

<9>

DDRB_SDQS1

<9>

DDRB_SDQS2

<9>

DDRB_SDQS0

<9>

DDRB_SDQS1#

<9>

DDRB_SDQS2#

<9>

DDRB_SDQS0#

<9>

DDRB_SDQS4

<9>

DDRB_SDQS6

<9>

DDRB_SDQS4#

<9>

DDRB_ODT1

<8>

DDRB_SDQS6#

<9>

DDRB_SDQS5# <9>

DDRB_SDQS5 <9>

DDRB_ODT0 <8>

DDRB_SDQS7# <9>

DDRB_SDQS7 <9>

DDRB_SRAS# <9>

DDRB_SBS1# <9>

DDRB_SDQS3 <9>

DDRB_SDQS3# <9>

DDRB_CKE1 <8>

DDRB_SMA[0 14]

<9>

DDRB_SDM[0 7]

<9>

DDRB_SDQ[0 63]

<9>

D_CK_SDATA

<14,16>

D_CK_SCLK

<14,16>

DDRB_SBS2#

<9>

DDRB_CLK1# <8>

DDRB_CLK1 <8>

DDRB_CLK0# <8>

DDRB_CLK0 <8>

PM_EXTTS#1 <8>

+3VS

+DIMM_VREF

+0.9VS

+1.8V +DIMM_VREF

+1.8V

+1.8V

+0.9VS

+0.9VS

+0.9VS

+3VS

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

B

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

B

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

B

Thursday, October 30, 2008

Compal Electronics, Inc.

DIMM1 REV H:5.6mm (BOT)

R11991 56_0402_5%2

C189 0.1U_0402_16V4Z C189 0.1U_0402_16V4Z 1

2

C182

0.1U_0402_16V4Z C182

0.1U_0402_16V4Z 1

2

C192 0.1U_0402_16V4Z C192 0.1U_0402_16V4Z 1

2

C183

2.2U_0603_6.3V6K C183

2.2U_0603_6.3V6K 1

2 JDIMM2

FOX_AS0A426-N8RN-7F CONN@

JDIMM2

FOX_AS0A426-N8RN-7F CONN@

VREF 1 VSS 3 DQ0 5 DQ1 7 VSS 9 DQS0#

11 DQS0 13 VSS 15 DQ2 17 DQ3 19 VSS 21 DQ8 23 DQ9 25 VSS 27 DQS1#

29 DQS1 31 VSS 33 DQ10 35 DQ11 37 VSS 39

VSS 41 DQ16 43 DQ17 45 VSS 47 DQS2#

49 DQS2 51 VSS 53 DQ18 55 DQ19 57 VSS 59 DQ24 61 DQ25 63 VSS 65 DM3 67 NC 69 VSS 71 DQ26 73 DQ27 75 VSS 77 CKE0 79 VDD 81 NC 83 BA2 85 VDD 87 A12 89 A9 91 A8 93 VDD 95 A5 97 A3 99 A1 101 VDD 103 A10/AP 105 BA0 107 WE#

109 VDD 111 CAS#

113 NC/S1#

115 VDD 117 NC/ODT1 119 VSS 121 DQ32 123 DQ33 125 VSS 127 DQS4#

129 DQS4 131 VSS 133 DQ34 135 DQ35 137 VSS 139 DQ40 141 DQ41 143 VSS 145 DM5 147 VSS 149 DQ42 151 DQ43 153 VSS 155 DQ48 157 DQ49 159 VSS 161 NC,TEST 163 VSS 165 DQS6#

167 DQS6 169 VSS 171 DQ50 173 DQ51 175 VSS 177 DQ56 179 DQ57 181 VSS 183 DM7 185 VSS 187 DQ58 189 DQ59 191 VSS 193 SDA 195 SCL 197 VDDSPD 199

VSS 2 DQ4 4 DQ5 6 VSS 8 DM0 10 VSS 12 DQ6 14 DQ7 16 VSS 18 DQ12 20 DQ13 22 VSS 24 DM1 26 VSS 28 CK0 30 CK0# 32 VSS 34 DQ14 36 DQ15 38 VSS 40

VSS 42 DQ20 44 DQ21 46 VSS 48

NC 50 DM2 52 VSS 54 DQ22 56 DQ23 58 VSS 60 DQ28 62 DQ29 64 VSS 66 DQS3# 68 DQS3 70 VSS 72 DQ30 74 DQ31 76 VSS 78 NC/CKE1 80 VDD 82 NC/A15 84 NC/A14 86 VDD 88 A11 90 A7 92 A6 94 VDD 96 A4 98 A2 100 A0 102 VDD 104 BA1 106 RAS# 108 S0# 110 VDD 112 ODT0 114 NC/A13 116 VDD 118

NC 120 VSS 122 DQ36 124 DQ37 126 VSS 128 DM4 130 VSS 132 DQ38 134 DQ39 136 VSS 138 DQ44 140 DQ45 142 VSS 144 DQS5# 146 DQS5 148 VSS 150 DQ46 152 DQ47 154 VSS 156 DQ52 158 DQ53 160 VSS 162 CK1 164 CK1# 166 VSS 168 DM6 170 VSS 172 DQ54 174 DQ55 176 VSS 178 DQ60 180 DQ61 182 VSS 184 DQS7# 186 DQS7 188 VSS 190 DQ62 192 DQ63 194 VSS 196 SA0 198 SA1 200

C181 0.1U_0402_16V4Z C181 0.1U_0402_16V4Z 1

2

C175

2.2U_0603_6.3V6K C175

2.2U_0603_6.3V6K 1

2

C179 0.1U_0402_16V4Z C179 0.1U_0402_16V4Z 1

2

330U_D2E_2.5VM_R15

@

330U_D2E_2.5VM_R15

@

1

2

330U_D2E_2.5VM_R15

330U_D2E_2.5VM_R15

1

2

C185 0.1U_0402_16V4Z C185 0.1U_0402_16V4Z 1

2

C194 0.1U_0402_16V4Z C194 0.1U_0402_16V4Z 1

2

C186

0.1U_0402_16V4Z C186

0.1U_0402_16V4Z 1

2

C174 2.2U_0603_6.3V6K C174 2.2U_0603_6.3V6K 1

2

C196 0.1U_0402_16V4Z C196 0.1U_0402_16V4Z 1

2

C191 0.1U_0402_16V4Z C191 0.1U_0402_16V4Z 1

2

C176 2.2U_0603_6.3V6K C176 2.2U_0603_6.3V6K 1

2

C177 2.2U_0603_6.3V6K C177 2.2U_0603_6.3V6K 1

2

C178 0.1U_0402_16V4Z C178 0.1U_0402_16V4Z 1

2

C173 2.2U_0603_6.3V6K C173 2.2U_0603_6.3V6K 1

2

C188

0.1U_0402_16V4Z C188

0.1U_0402_16V4Z 1

2

C190 0.1U_0402_16V4Z C190 0.1U_0402_16V4Z 1

2

C180 0.1U_0402_16V4Z C180 0.1U_0402_16V4Z 1

2

C184

0.1U_0402_16V4Z C184

0.1U_0402_16V4Z 1

2

C187 0.1U_0402_16V4Z C187 0.1U_0402_16V4Z 1

2

C193 0.1U_0402_16V4Z C193 0.1U_0402_16V4Z 1

2

C195 0.1U_0402_16V4Z C195 0.1U_0402_16V4Z 1

2

Trang 6

1 1

CLK_PCI2

CK_PWRGD

CLK_PCI5

CLK_PCI4

CLK_XTALIN CLK_XTALOUT

CLK_CPU_BCLK CLK_CPU_BCLK#

D_CK_SCLK

CLKSEL1 CLK_ICH_48M

CLKSEL2 CLK_ICH_14M

CK505_PWRGD

CLK_PCI4 CLK_PCI2

H_STP_PCI#

H_STP_CPU#

D_CK_SDATA

CLK_MCH_BCLK#

CLK_MCH_BCLK

CLK_DREF_96M CLK_DREF_96M#

CLK_DREF_SSC#_1 CLK_DREF_SSC_1

CLK_PCIE_MINI2#

CLK_PCIE_MINI2

CLK_PCIE_SATA CLK_PCIE_SATA#

CLK_PCIE_ICH#

CLK_PCIE_ICH

CLK_PCIE_CARD CLK_PCIE_CARD#

CLK_PCIE_LAN CLK_PCIE_LAN#

CLK_MCH_3GPLL#

CLK_MCH_3GPLL

CLK_PCIE_VGA CLK_PCIE_VGA#

CLK_PCIE_MINI1 CLK_PCIE_MINI1#

CK505_PWRGD

D_CK_SCLK D_CK_SDATA

CLKSEL0

CLK_PCIE_READER#

CLK_PCIE_READER

CLK_PCI_LPC CLK_PCI_ICH

CLKSEL2

CLKSEL1

CLKSEL0

CLK_DREF_SSC

CLK_DREF_SSC#

CLK_DREF_SSC_1

CLK_DREF_SSC#_1

CLK_PCI4

CLK_CPU_BCLK <4>

CLK_CPU_BCLK# <4>

D_CK_SCLK <14,15>

CLK_ICH_48M

<27>

CLK_ICH_14M

<27>

CK_PWRGD

<27>

VGATE

<8,27,49>

CLK_PCI_ICH

<25>

CLK_PCI_LPC

<35>

H_STP_PCI#

<27>

H_STP_CPU#

<27>

D_CK_SDATA <14,15>

CLK_MCH_BCLK# <7>

CLK_MCH_BCLK <7>

CLK_DREF_96M <8>

CLK_DREF_96M# <8>

CLK_PCIE_VGA <17>

CLK_PCIE_VGA# <17>

CLK_PCIE_MINI2 <33>

CLK_PCIE_MINI2# <33>

CLK_PCIE_SATA# <26>

CLK_PCIE_SATA <26>

CLK_PCIE_ICH <27>

CLK_PCIE_ICH# <27>

MINI1_CLKREQ# <33>

MINI2_CLKREQ# <33>

CLK_PCIE_CARD# <34>

CLK_PCIE_CARD <34>

CLK_PCIE_LAN# <31>

CLK_PCIE_LAN <31>

CLK_MCH_3GPLL# <8>

CLK_MCH_3GPLL <8>

CLK_PCIE_MINI1# <33>

CLK_PCIE_MINI1 <33>

CLK_ENABLE# <49>

MCH_CLKREQ# <8>

EXP_CLKREQ# <34>

ICH_SMBDATA

<27,31,33,34>

ICH_SMBCLK

<27,31,33,34>

CLK_PCIE_READER# <30>

CLK_PCIE_READER <30>

SATA_CLKREQ# <27>

MCH_CLKSEL1 <8>

CPU_BSEL1 <5>

MCH_CLKSEL2 <8>

CPU_BSEL2 <5>

MCH_CLKSEL0 <8>

CPU_BSEL0 <5>

CLK_DREF_SSC <8>

CLK_DREF_SSC# <8>

27M_CLK <18>

27M_SSC <18>

+3VS

+CLK_VDD

+3VS

+CLK_VDD +1.05VS

+CLK_VDDSRC

+CLK_VDDSRC

+3VS +3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS +1.05VS

+1.05VS +1.05VS

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

SCHEMATIC,A4491

Custom

Thursday, October 30, 2008

Compal Electronics, Inc.

Clock Generator

CLKSEL2 CLKSEL1 CLKSEL0

33.3 100 166 0

Table : ICS9LPRS387

MHz

SRC MHz

PCI MHz

200 100 33.3 1

1

0

CLK_PCI5=0, Pin63,64 is SRC_CLK

CLK_PCI5=1, Pin63,64 is ITP_CLK

CLK_PCI2=1, Trusted Mode Enable(No overclocking allowed)

CLK_PCI4=0, Pin28, 29 is SRC_CLK

Pin24, 25 is DOT96_CLK

PCIEX1

Control

PCIEX6 PCIEX4 PCIEX9

CLK_REQ#

CR#_6(MCH)

CR#_4(NEW CARD)

CR#_9(MINI CARDII)

Free-Run

mount to Enable ITP_CLK

CR#_10(WLAN) PCIEX10 PCIEX0

SRC7(VGA_CLK): Discrete VGA[Enable] UMA[Disable]

UMA: disable this pair by BIOS

(Pull High to +3VS at GMCH side)

VGA: disable this pair by BIOS

VGA: disable this pair by BIOS

(Pull High to +3VS at ICH side)

For EMI 10/9

ICS9LPRS387, PN:SA000020H10 SLG8SP556V, PN:SA000020K00

Must Close to CLKGEN PIN 28,29

@

@

R1591

C1888

0.1U_0402_16V4Z C1888

0.1U_0402_16V4Z

1

2

R1600 1K_0402_5%

@

R1600 1K_0402_5%

@

L57

KC FBM-L11-201209-221LMAT_0805 L57

KC FBM-L11-201209-221LMAT_0805

1 2

C1891

10U_0805_10V4Z C1891

10U_0805_10V4Z

1

2

R1594

2.2K_0402_5%

R1594

2.2K_0402_5%

R1605 0_0402_5%

R1605 0_0402_5%

C1883 10U_0805_10V4Z C1883 10U_0805_10V4Z 1

2

C1892 0.1U_0402_16V4Z C1892 0.1U_0402_16V4Z 1

2

U43

ICS9LPRS387BKLFT_MLF72_10x10 U43

ICS9LPRS387BKLFT_MLF72_10x10

CK_PWRGD/PD#

1

FSLB/TEST_MODE 2

GNDREF 3

X2 4 X1 5

VDDREF 6

FSLC/TEST_SEL/REF0 7

REF1 8

SDATA 9 SCLK 10

NC 11

VDDPCI 12

PCI1 13 PCI2/TME 14 PCI3 15 PCI4/27_SELECT 16

PCI_F5/ITP_EN 17

GNDPCI 18

VDD48 19

USB_48MHz/FSLA 20

CR#A 21

GND48 22

VDD96_IO 23

SRCT0_LPR/DOTT_96_LPR 24 SRCC0_LPR/DOTC_96_LPR 25

GND 26

VDDPLL3 27

27MHz_NonSS/SRCT1_LPR/SE1 28 27MHz_SS/SRCC1_LPR/SE2 29

GND 30

VDDPLL3_IO 31

SRCT2_LPR/SATAT_LPR 32 SRCC2_LPR/SATAC_LPR 33

GNDSRC 34

SRCT3_LPR 35 SRCC3_LPR 36

VDDCPU

CPUC0_LPR_F 70

GNDCPU 69

CPUT1_LPR_F 68 CPUC1_LPR_F 67

VDDCPU_IO 66

CR7# 65

CPUT2_ITP_LPR/SRCT8_LPR 64 CPUC2_ITP_LPR/SRCC8_LPR 63

VDDSRC_IO 62

SRCT7_LPR 61 SRCC7_LPR 60

GNDSRC 59

CR#6 58

SRCT6_LPR 57 SRCC6_LPR 56

VDDSRC 55

PCI_STOP#

54 CPU_STOP#

53

VDDSRC_IO 52

SRCC10_LPR 51 SRCT10_LPR 50

CR10# 49

SRCT11_LPR 48 SRCC11_LPR 47

CR#11 46

SRCC9_LPR 45 SRCT9_LPR 44

CR#9 43

GNDSRC 42

CR#4 41

SRCC4_LPR 40 SRCT4_LPR 39

VDDSRC_IO 38

CR#3 37

GND_THERMAL_PAD 73

R1601 1K_0402_5%

R1601 1K_0402_5%

R1602 4.7K_0402_5%

R1602 4.7K_0402_5%

R1827 0_0402_5%

GM@

R1827 0_0402_5%

GM@

1 2

R1609 1K_0402_5%

@

R1609 1K_0402_5%

@

C1884

0.1U_0402_16V4Z C1884

0.1U_0402_16V4Z

1

2

R1583 10K_0402_5%

@

R1583 10K_0402_5%

@

Q108 2N7002_SOT23

Q108 2N7002_SOT23

@

@

@

@

L56

KC FBM-L11-201209-221LMAT_0805 L56

KC FBM-L11-201209-221LMAT_0805

1 2

@

@

C1896 0.1U_0402_16V4Z C1896 0.1U_0402_16V4Z 1

2 C1886

0.1U_0402_16V4Z C1886

0.1U_0402_16V4Z

1

2

R1611 1K_0402_5%

R1611 1K_0402_5%

C1887 0.1U_0402_16V4Z C1887 0.1U_0402_16V4Z 1

2

C1889 0.1U_0402_16V4Z C1889 0.1U_0402_16V4Z 1

2

R1613 0_0402_5%

R1613 0_0402_5%

R1598 0_0402_5%

R1598 0_0402_5%

PM@

PM@

G D

2N7002_SOT23

@ G D

2N7002_SOT23

@

2

Y1 14.31818MHz_20P_FSX8L14.318181M20FDB Y1

14.31818MHz_20P_FSX8L14.318181M20FDB

R1610

10K_0402_5%

R1610

10K_0402_5%

C1895

0.1U_0402_16V4Z C1895

0.1U_0402_16V4Z

1

2 C1893

0.1U_0402_16V4Z C1893

0.1U_0402_16V4Z

1

2

R16071 10K_0402_5%2 R1608

4.7K_0402_5%

R1608 4.7K_0402_5%

GM@

GM@

R1597

1K_0402_5%

@

R1597

1K_0402_5%

@

C1882 10U_0805_10V4Z C1882 10U_0805_10V4Z 1

2

R1756 0_0402_5%

PM@

R1756 0_0402_5%

PM@

1 2

C1897

0.1U_0402_16V4Z C1897

0.1U_0402_16V4Z

1

2

R1604

0_0402_5%

@

R1604

0_0402_5%

@

R1828 0_0402_5%

PM@

R1828 0_0402_5%

PM@

1 2

R16061 10K_0402_5%2

R1593 56_0402_5%

@

R1593 56_0402_5%

@

C1900

27P_0402_50V8J C1900

27P_0402_50V8J

C1894 0.1U_0402_16V4Z C1894 0.1U_0402_16V4Z 1

2

Q107 2N7002_SOT23

Q107 2N7002_SOT23

R1592 0_0402_5%

@ R1592 0_0402_5%

@ 1 2

C1901 27P_0402_50V8J C1901 27P_0402_50V8J

C1890 10U_0805_10V4Z C1890 10U_0805_10V4Z 1

2 C1885

0.1U_0402_16V4Z C1885 0.1U_0402_16V4Z 1

2

R1612

0_0402_5%

@

R1612

0_0402_5%

@

R1755 0_0402_5%

GM@

R1755 0_0402_5%

GM@

1 2

R1595 1K_0402_5%

R1595 1K_0402_5%

Trang 7

A B C D E

VDD33

PEX_REFCLKP PEX_RST#

PEX_TXP0

PEX_TXP1

PEX_TXP10

PEX_TXP11

PEX_TXP12

PEX_TXP13

PEX_TXP14

PEX_TXP15

PEX_TXP2

PEX_TXP3

PEX_TXN4

PEX_TXP5 PEX_TXP4

PEX_TXP6

PEX_TXP7

PEX_TXP8

PEX_TXP9

PEX_PLLDVDD

IFPB_IOVDD IFPAB_PLLVDD

DACB_VDD

DACA_VDD DACA_VREF

IFPAB_RSET

IFPA_IOVDD

PCIE_GTX_C_MRX_N2

<10>

PCIE_GTX_C_MRX_N3

<10>

PCIE_GTX_C_MRX_N4

<10>

PCIE_GTX_C_MRX_N6

<10>

PCIE_GTX_C_MRX_N7

<10>

PCIE_GTX_C_MRX_N5

<10>

PCIE_GTX_C_MRX_N12

<10>

PCIE_GTX_C_MRX_N14

<10>

PCIE_GTX_C_MRX_N15

<10>

PCIE_GTX_C_MRX_N13

<10>

PCIE_GTX_C_MRX_N8

<10>

PCIE_GTX_C_MRX_N10

<10>

PCIE_GTX_C_MRX_N11

<10>

PCIE_GTX_C_MRX_N9

<10>

PCIE_GTX_C_MRX_P4

<10>

PCIE_GTX_C_MRX_P6

<10>

PCIE_GTX_C_MRX_P7

<10>

PCIE_GTX_C_MRX_P5

<10>

PCIE_GTX_C_MRX_P0

<10>

PCIE_GTX_C_MRX_P2

<10>

PCIE_GTX_C_MRX_P3

<10>

PCIE_GTX_C_MRX_P12

<10>

PCIE_GTX_C_MRX_P14

<10>

PCIE_GTX_C_MRX_P15

<10>

PCIE_GTX_C_MRX_P13

<10>

PCIE_GTX_C_MRX_P8

<10>

PCIE_GTX_C_MRX_P10

<10>

PCIE_GTX_C_MRX_P11

<10>

PCIE_GTX_C_MRX_P9

<10>

PCIE_GTX_C_MRX_P1

<10>

PCIE_GTX_C_MRX_N1

<10>

PCIE_GTX_C_MRX_N0

<10>

PCIE_MTX_C_GRX_N0

<10>

PCIE_MTX_C_GRX_N1

<10>

PCIE_MTX_C_GRX_N2

<10>

PCIE_MTX_C_GRX_N3

<10>

PCIE_MTX_C_GRX_P0

<10>

PCIE_MTX_C_GRX_P1

<10>

PCIE_MTX_C_GRX_P3

<10>

PCIE_MTX_C_GRX_P2

<10>

PCIE_MTX_C_GRX_N4

<10>

PCIE_MTX_C_GRX_N5

<10>

PCIE_MTX_C_GRX_N7

<10>

PCIE_MTX_C_GRX_N8

<10>

PCIE_MTX_C_GRX_N9

<10>

PCIE_MTX_C_GRX_N10

<10>

PCIE_MTX_C_GRX_N11

<10>

PCIE_MTX_C_GRX_N13

<10>

PCIE_MTX_C_GRX_N14

<10>

PCIE_MTX_C_GRX_N15

<10>

PCIE_MTX_C_GRX_P4

<10>

PCIE_MTX_C_GRX_P5

<10>

PCIE_MTX_C_GRX_P7

<10>

PCIE_MTX_C_GRX_P8

<10>

PCIE_MTX_C_GRX_P9

<10>

PCIE_MTX_C_GRX_P10

<10>

PCIE_MTX_C_GRX_P11

<10>

PCIE_MTX_C_GRX_P13

<10>

PCIE_MTX_C_GRX_P14

<10>

PCIE_MTX_C_GRX_P15

<10>

PCIE_MTX_C_GRX_N12

<10>

PCIE_MTX_C_GRX_P12

<10>

PCIE_MTX_C_GRX_N6

<10>

PCIE_MTX_C_GRX_P6

<10>

VGA_CRT_VSYNC <23>

VGA_CRT_B <23>

VGA_CRT_HSYNC <23>

VGA_CRT_R <23>

CLK_PCIE_VGA

<16>

CLK_PCIE_VGA#

<16>

VGA_TXOUT2- <22>

VGA_TXOUT2+ <22>

VGA_TXOUT0- <22>

VGA_TXOUT0+ <22>

VGA_TXOUT1+ <22>

VGA_TXOUT1- <22>

PLT_RST#

<8,25,27,30,31,35>

VGA_TXCLK- <22>

VGA_TXCLK+ <22>

+1.1VS

+1.1VS

+1.1VS

+VGA_CORE

+3VS

+VDD_MEM18

+VDD_MEM18

+3VS

+NVVDD_SENSE

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

S C H E M A T I C , A 4 4 9 1

Custom

Friday, October 31, 2008

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

S C H E M A T I C , A 4 4 9 1

Custom

Friday, October 31, 2008

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

S C H E M A T I C , A 4 4 9 1

Custom

Friday, October 31, 2008

1.920 Amps

120mA

600 mA

110 mA

100mA

LVDS & DAC Interface

100 mA

DAC C

150 mA

PEG Interface

22u X 3 0.47u X 7 0.1u X 7

DAC A

DAC B

CRT

TV-OUT

#SI Remove TV out

#SI Remove TV out

#SI Change to +VDDMEM18

#SI Change to +VDDMEM18

C304 0.1U_0402_16V4Z PM@

C304 0.1U_0402_16V4Z PM@

1 2

R207

124_0402_1%

PM@

R207

124_0402_1%

PM@

C268 0.1U_0402_16V4Z PM@

C268 0.1U_0402_16V4Z PM@

1 2 C251

4.7U_0603_6.3V6M

PM@

C251

4.7U_0603_6.3V6M

PM@

1

2

C294 0.1U_0402_16V4Z PM@

C294 0.1U_0402_16V4Z PM@

1 2

C266 4700P_0402_25V7K

PM@

C266 4700P_0402_25V7K

PM@

1

2

C255 0.47U_0402_6.3V6K

PM@

C255 0.47U_0402_6.3V6K

PM@

1

2

C298

0.47U_0402_6.3V6K

PM@

C298

0.47U_0402_6.3V6K

PM@

1

2

C324 0.1U_0402_16V4Z PM@

C324 0.1U_0402_16V4Z PM@

1 2

1/13 PCI_EXPRESS U17A NB9M-GS_BGA_533P COMMON

PM@

1/13 PCI_EXPRESS U17A NB9M-GS_BGA_533P COMMON

PM@

AE9 RFU

AG10 PEX_TERMP AG9 RFU AE10 PEX_TSTCLK_OUT AF10 PEX_TSTCLK_OUT

AF9 PEX_PLLVDD

F12 VDD33 E12 VDD33 D12 VDD33 C12 VDD33 B12 VDD33 A12 VDD33

W16 GND_SENSE W15 VDD_SENSE W9 VDD W19 VDD W18 VDD W13 VDD W12 VDD W10 VDD U9 VDD U19 VDD T9 VDD T17 VDD T11 VDD R9 VDD R17 VDD R16 VDD R15 VDD R14 VDD R13 VDD R12 VDD R11 VDD P17 VDD P16 VDD P15 VDD P14 VDD P13 VDD P12 VDD P11 VDD N9 VDD N19 VDD N17 VDD N16 VDD N15 VDD N14 VDD N13 VDD N12 VDD N11 VDD M9 VDD M17 VDD M11 VDD L9 VDD J9 VDD J13 VDD J12 VDD J10 VDD

AG6 PEX_IOVDDQ AF6 PEX_IOVDDQ AE6 PEX_IOVDDQ AD6 PEX_IOVDDQ AC7 PEX_IOVDDQ AC13 PEX_IOVDDQ AB9 PEX_IOVDDQ AB8 PEX_IOVDDQ AB7 PEX_IOVDDQ AB17 PEX_IOVDDQ AB16 PEX_IOVDDQ AB13 PEX_IOVDDQ AG7 PEX_IOVDD AF7 PEX_IOVDD AE7 PEX_IOVDD AD8 PEX_IOVDD AD7 PEX_IOVDD AC9 PEX_IOVDD

C257

4.7U_0603_6.3V6M

PM@

C257

4.7U_0603_6.3V6M

PM@

1

2

C271 0.1U_0402_16V4Z PM@

C271 0.1U_0402_16V4Z PM@

1 2

R197

PM@

R197

PM@

C306 0.1U_0402_16V4Z PM@

C306 0.1U_0402_16V4Z PM@

1 2

C248

470P_0402_50V7K PM@

C248

470P_0402_50V7K PM@

1 2

B

B

A

A CLOCK

DATA

6/13 IFPAB U17F NB9M-GS_BGA_533P COMMON

PM@

B

B

A

A CLOCK

DATA

6/13 IFPAB U17F NB9M-GS_BGA_533P COMMON

PM@

AB3 IFPB_TXC AB2 IFPB_TXC AC4 IFPA_TXC AD4 IFPA_TXC AB1 IFPB_TXD7 AA1 IFPB_TXD7 AA2 IFPB_TXD6 AA3 IFPB_TXD6 W3 IFPB_TXD5 W2 IFPB_TXD5 W1 IFPB_TXD4 V1 IFPB_TXD4 AB4 IFPA_TXD3 AB5 IFPA_TXD3 W4 IFPA_TXD2 Y4 IFPA_TXD2 AA5 IFPA_TXD1 AA4 IFPA_TXD1 V5 IFPA_TXD0 V4 IFPA_TXD0

C282 0.1U_0402_16V4Z PM@

C282 0.1U_0402_16V4Z PM@

1 2

C317

1U_0402_6.3V6K

PM@

C317

1U_0402_6.3V6K

PM@

1

2

C245 0.47U_0402_6.3V6K

PM@

C245 0.47U_0402_6.3V6K

PM@

1

2

L10 BLM18PG181SN1D_0603 PM@

L10 BLM18PG181SN1D_0603 PM@

1 2

C297 0.47U_0402_6.3V6K

PM@

C297 0.47U_0402_6.3V6K

PM@

1

2 C295

0.47U_0402_6.3V6K

PM@

C295 0.47U_0402_6.3V6K

PM@

1

2

C249 0.47U_0402_6.3V6K

PM@

C249 0.47U_0402_6.3V6K

PM@

1

2

C307 0.1U_0402_16V4Z PM@

C307 0.1U_0402_16V4Z PM@

1 2

C258

0.1U_0402_16V4Z PM@

C258

0.1U_0402_16V4Z PM@

1

2

C308 0.1U_0402_16V4Z PM@

C308 0.1U_0402_16V4Z PM@

1 2

R209 2.49K_0402_1%

PM@

R209 2.49K_0402_1%

PM@

C276

0.1U_0402_16V4Z PM@

C276

0.1U_0402_16V4Z PM@

1

2 C273

0.1U_0402_16V4Z

PM@

C273 0.1U_0402_16V4Z

PM@

1

2

C259

1U_0603_10V4Z PM@

C259

1U_0603_10V4Z PM@

1 2 C247

4700P_0402_25V7K

PM@

C247 4700P_0402_25V7K

PM@

1

2

C289

22U_0805_6.3V6M

PM@

C289

22U_0805_6.3V6M

PM@

1

2 C285

0.1U_0402_16V4Z

PM@

C285 0.1U_0402_16V4Z

PM@

1

2

R196

PM@

R196

PM@

C278

0.1U_0402_16V4Z PM@

C278

0.1U_0402_16V4Z PM@

1

2

C291 0.1U_0402_16V4Z PM@

C291 0.1U_0402_16V4Z PM@

1 2

C330 0.1U_0402_16V4Z PM@

C330 0.1U_0402_16V4Z PM@

1 2

C301 0.1U_0402_16V4Z PM@

C301 0.1U_0402_16V4Z PM@

1 2

R205 1K_0402_1%

@

R205 1K_0402_1%

@

C296

0.47U_0402_6.3V6K

PM@

C296

0.47U_0402_6.3V6K

PM@

1

2

C311

PM@

C311

PM@

1

2

R392 0_0402_5%

PM@

R392 0_0402_5%

PM@

L8

BLM18PG181SN1D_0603

PM@

L8

BLM18PG181SN1D_0603

PM@

1

2

C321

0.1U_0402_16V4Z

PM@

C321

0.1U_0402_16V4Z

PM@

1

2

C315 0.1U_0402_16V4Z PM@

C315 0.1U_0402_16V4Z PM@

1 2

C328 0.1U_0402_16V4Z PM@

C328 0.1U_0402_16V4Z PM@

1 2

5/13 DACC U17D NB9M-GS_BGA_533P COMMON

PM@

5/13 DACC U17D NB9M-GS_BGA_533P COMMON

PM@

R4 DACC_BLUE T4 DACC_GREEN T5 DACC_RED U4 DACC_VSYNC U6 DACC_HSYNC

C252 0.1U_0402_16V4Z

PM@

C252 0.1U_0402_16V4Z

PM@

1

2

C281 0.1U_0402_16V4Z PM@

C281 0.1U_0402_16V4Z PM@

1 2

C314

PM@

C314

PM@

1

2

C286

0.47U_0402_6.3V6K

PM@

C286

0.47U_0402_6.3V6K

PM@

1

2

C288 22U_0805_6.3V6M

PM@

C288 22U_0805_6.3V6M

PM@

1

2

C326 0.1U_0402_16V4Z PM@

C326 0.1U_0402_16V4Z PM@

1 2

C331 0.1U_0402_16V4Z PM@

C331 0.1U_0402_16V4Z PM@

1 2

C292 0.1U_0402_16V4Z PM@

C292 0.1U_0402_16V4Z PM@

1 2

C325 4.7U_0603_6.3V6M

PM@

C325 4.7U_0603_6.3V6M

PM@

1

2

R195

PM@

R195

PM@

C299 0.47U_0402_6.3V6K

PM@

C299 0.47U_0402_6.3V6K

PM@

1

2

C264 10U_0805_6.3V6M

PM@

C264 10U_0805_6.3V6M

PM@

1

2

C316 0.1U_0402_16V4Z PM@

C316 0.1U_0402_16V4Z PM@

1 2

C246

4.7U_0603_6.3V6M

PM@

C246

4.7U_0603_6.3V6M

PM@

1

2

C305 0.1U_0402_16V4Z PM@

C305 0.1U_0402_16V4Z PM@

1 2

C270 0.1U_0402_16V4Z PM@

C270 0.1U_0402_16V4Z PM@

1 2

L7

BLM18PG181SN1D_0603

PM@

L7

BLM18PG181SN1D_0603

PM@

1

2

C447

1U_0402_6.3V6K

PM@

C447

1U_0402_6.3V6K

PM@

1

2

C329 0.1U_0402_16V4Z PM@

C329 0.1U_0402_16V4Z PM@

1 2

C323 0.1U_0402_16V4Z PM@

C323 0.1U_0402_16V4Z PM@

1 2

4/13 DACB U17E NB9M-GS_BGA_533P COMMON

PM@

4/13 DACB U17E NB9M-GS_BGA_533P COMMON

PM@

E6 DACB_BLUE E7 DACB_GREEN F7 DACB_RED D6 DACB_CSYNC

C265 0.1U_0402_16V4Z PM@

C265 0.1U_0402_16V4Z PM@

1 2

C310 0.1U_0402_16V4Z PM@

C310 0.1U_0402_16V4Z PM@

1 2

C263

4.7U_0603_6.3V6M PM@

C263

4.7U_0603_6.3V6M PM@

1

2

C274

0.1U_0402_16V4Z PM@

C274

0.1U_0402_16V4Z PM@

1

2

C287

22U_0805_6.3V6M

PM@

C287

22U_0805_6.3V6M

PM@

1

2

C322 0.1U_0402_16V4Z PM@

C322 0.1U_0402_16V4Z PM@

1 2

C293 0.1U_0402_16V4Z PM@

C293 0.1U_0402_16V4Z PM@

1 2

C277 0.1U_0402_16V4Z

PM@

C277 0.1U_0402_16V4Z

PM@

1

2

C254

4.7U_0603_6.3V6M

PM@

C254

4.7U_0603_6.3V6M

PM@

1

2

C327

0.1U_0402_16V4Z

PM@

C327

0.1U_0402_16V4Z

PM@

1

2

C262

1U_0603_10V4Z PM@

C262

1U_0603_10V4Z PM@

1 2

L9

BLM18PG181SN1D_0603

PM@

L9

BLM18PG181SN1D_0603

PM@

1

2

R204 0_0402_5%

PM@

R204 0_0402_5%

PM@

C319

4700P_0402_25V7K

PM@

C319

4700P_0402_25V7K

PM@

1

2

C253

1U_0603_10V4Z

PM@

C253

1U_0603_10V4Z

PM@

1 2

C283 0.1U_0402_16V4Z PM@

C283 0.1U_0402_16V4Z PM@

1 2

C446

0.01U_0402_25V7K

PM@

C446

0.01U_0402_25V7K

PM@

1

2

C275 0.1U_0402_16V4Z

PM@

C275 0.1U_0402_16V4Z

PM@

1

2

C300

0.47U_0402_6.3V6K

PM@

C300

0.47U_0402_6.3V6K

PM@

1

2

C244

0.1U_0402_16V4Z

PM@

C244

0.1U_0402_16V4Z

PM@

1

2

R206

10K_0402_5%

PM@

R206

10K_0402_5%

PM@

C284 0.1U_0402_16V4Z PM@

C284 0.1U_0402_16V4Z PM@

1 2

C320 470P_0402_50V7K

PM@

C320 470P_0402_50V7K

PM@

1

2

C279 4700P_0402_25V7K

PM@

C279 4700P_0402_25V7K

PM@

1

2

R210

10K_0402_5%

PM@

R210

10K_0402_5%

PM@

C309 0.1U_0402_16V4Z PM@

C309 0.1U_0402_16V4Z PM@

1 2

C303 0.1U_0402_16V4Z PM@

C303 0.1U_0402_16V4Z PM@

1 2

C280 470P_0402_50V7K

PM@

C280 470P_0402_50V7K

PM@

1 2

R208 200_0402_1%

@ R208 200_0402_1%

@

3/13 DACA U17C COMMON NB9M-GS_BGA_533P

PM@

3/13 DACA U17C COMMON NB9M-GS_BGA_533P

PM@

AD3 DACA_BLUE AE3 DACA_GREEN AE2 DACA_RED AD1 DACA_VSYNC AD2 DACA_HSYNC

C1476

PM@

C1476

PM@

1

2

C302 0.1U_0402_16V4Z PM@

C302 0.1U_0402_16V4Z PM@

1 2

C267 470P_0402_50V7K

PM@

C267 470P_0402_50V7K

PM@

1 2

Trang 8

5 4 3 2 1

GPU_PLLVDD

ROM_SCLK

ROM_SI

STRAP0

ROM_SO

STRAP2

VGA_THERMDA

THERM#_VGA

VGA_SM_CLK VGA_SM_DA THERM_SCI#

XTALIN

HDCP_WP HDCP_WP HDCP_SCL HDCP_SDA

HDCP_SCL

STRAP2

HDCP_SDA HDCP_SCL

ROM_SO ROM_SCLK ROM_SI ROM_CS#

SPDIF_IN

IFPC_IOVDD

IFPC_PLLVDD IFPC_RSET

VGA_DDC_DATA VGA_DDC_CLK

DDC2_CLK DDC2_DATA

THERMAL ALERT SINN_GPIO9 VGA_THERMDA

THERM#_VGA

VGA_THERMDC

VGA_SM_DA

DDC2_DATA DDC2_CLK

THERM_SCI#

HDMI_C_CLK-HDMI_C_CLK+

HDMI_C_TX0+

HDMI_C_TX0-HDMI_C_TX1+

HDMI_C_TX1-HDMI_C_TX2+

HDMI_C_TX2-I2CE_SDA I2CE_SCL

HDA_SDIN2_R

I2CB_SDA I2CB_SCL

VGA_HDMI_TXC-VGA_HDMI_TXC+

VGA_HDMI_TXD0+

VGA_HDMI_TXD0-VGA_HDMI_TXD2+

VGA_HDMI_TXD2-VGA_HDMI_TXD1+

VGA_HDMI_TXD1-JTAG_TCK

JTAG_TDO JTAG_TRST JTAG_TDI

DDC2_DATA DDC2_CLK

VGA_SM_DA

VGA_SM_CLK

VGA_DDC_CLK VGA_DDC_DATA THERM_SCI#

27M_SSC

<16>

27M_CLK

<16>

SPDIF_HDMI

<38>

ENBKL <10,35>

HDMI_DET <24>

ENVDD <22>

VGA_DDC_DATA <23>

VGA_DDC_CLK <23>

I2CC_SCL <22>

I2CC_SDA <22>

HDA_SDOUT_VGA <26>

HDA_BITCLK_VGA <26>

HDA_SDIN3 <26>

HDA_SYNC_VGA <26>

HDA_RST_VGA# <26>

VGA_HDMI_TXC+ <24> VGA_HDMI_TXC- <24>

VGA_HDMI_TXD0+ <24> VGA_HDMI_TXD0- <24>

VGA_HDMI_TXD1- <24> VGA_HDMI_TXD1+ <24> VGA_HDMI_TXD2- <24> VGA_HDMI_TXD2+ <24>

GPU_VID0 <50>

GPU_VID1 <50>

VGA_HDMI_SCLK <24>

VGA_HDMI_SDATA <24>

EC_SMB_CK2

<4,35>

EC_SMB_DA2

<4,35>

+1.1VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS +3VS

+VDD_MEM18

+1.1VS

+3VS

+3VS

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC,A4491

Custom

Friday, October 31, 2008

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC,A4491

Custom

Friday, October 31, 2008

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC,A4491

Custom

Friday, October 31, 2008

36 mA

HDCP ROM

45 Kohms 16MX16 Hynix

Value DDR2

Straps

MULTI LEVEL STRAPS

Resistor

30 Kohms

20 Kohms

VGA Thermal Sensor ADM1032ARMZ Closed to VGA

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14

IN IN OUT OUT OUT OUT OUT OUT IN OUT OUT OUT IN OUT OUT

Primary DVI Hot-plug

Panel Back-Light PWM Panel Power Enable Panel Back-Light Enable NVVDD VID0 NVVDD VID1 FBVDD VID0 Thermal Alert FAN PWM FBVref Select SLI SYNCO

AC Detect

PS Control or HDMI_CEC

PS Control

N/A N/A H H H N/A N/A N/A L L N/A N/A N/A L H

2nd DVI Hot-plug GPIO I/O ACTIVE USAGE

160 mA

385 mA

LVDS CRT

HD AUDIO SPDIF

9/21 R329 near GPU 9/21 R237, R238, R240, R241 near ICH

16MX16 Samsung 32MX16 Hynix 32MX16 Samsung

R248 Locating

GPU_VID1 GPU_VID0 +VGA_CORE 0

0 1

0 1 0

0.9V 1.17V unused

HDMI

#SI Change to +VDDMEM18

#SI Add GPU_VID1

#SI2 add 2N7002 to GND

#SI2 change to pull hi

#PV2 change R213,R215 form 10K to 2.2K.

Must near connector for eye pattern

64MX16 Samsung 10 Kohms 64MX16 Hynix 5.1 Kohms

C340

4700P_0402_25V7K

PM@

C340

4700P_0402_25V7K

PM@

1

2

10/13 HDAUDIO U17I NB9M-GS_BGA_533P COMMON

PM@

10/13 HDAUDIO U17I NB9M-GS_BGA_533P COMMON

PM@

B6 HDA_SDO A6 HDA_SDI B7 HDA_SYNC A7 HDA_BCLK

C6 HDA_RST

C1469 0.1U_0402_16V4Z PM@

C1469 0.1U_0402_16V4Z PM@

1 2 C1474 0.1U_0402_16V4Z PM@

C1474 0.1U_0402_16V4Z PM@

1 2

L13 BLM18PG181SN1D_0603

PM@

L13 BLM18PG181SN1D_0603

PM@

1 2

R221 10K_0402_5%

@ R221 10K_0402_5%

@

R230 2K_0402_5%

PM@

R230 2K_0402_5%

PM@

T6 PAD

@ T6 PAD

@

R239 0_0402_5%

PM@

R239 0_0402_5%

PM@

R220 36K_0402_5%

PM@

R220 36K_0402_5%

PM@

11/13 MISC U17L NB9M-GS_BGA_533P COMMON

PM@

11/13 MISC U17L NB9M-GS_BGA_533P COMMON

PM@

D15 RFU C15 RFU

AC6 RFU_GND AD25 TESTMODE F6 RFU J5 RFU N5 BUFRST

A4 I2CH_SDA A3 I2CH_SCL C9 ROM_SCLK C10 ROM_SO A10 ROM_SI B10 ROM_CS

R243 45.3K_0402_1%

PM@

R243 45.3K_0402_1%

PM@

T10 PAD

@ T10 PAD

@

C343

4.7U_0603_6.3V6M

PM@

C343

4.7U_0603_6.3V6M

PM@

1

2

R247 10K_0402_5%

PM@

R247 10K_0402_5%

PM@

DP 8/13 IFPE

DVI MXM

E

TXC TXD2 TXD1 TXD2 TXD0

TXC TXD1 TXD2 TXD1 TXD0

U17G NB9M-GS_BGA_533P COMMON

PM@

DP 8/13 IFPE

DVI MXM

E

TXC TXD2 TXD1 TXD2 TXD0

TXC TXD1 TXD2 TXD1 TXD0

U17G NB9M-GS_BGA_533P COMMON

PM@

F5 IFPE_L0 F4 IFPE_L0 E4 IFPE_L1 D5 IFPE_L1 C3 IFPE_L2 C4 IFPE_L2 B3 IFPE_L3 B4 IFPE_L3 D3 IFPE_AUX D4 IFPE_AUX

C356 18P_0402_50V8J

@

C356 18P_0402_50V8J

@

1

2

C1473 0.1U_0402_16V4Z PM@

C1473 0.1U_0402_16V4Z PM@

1 2

R967

499_0402_1%

PM@

R967

499_0402_1%

PM@

R961

499_0402_1%

PM@

R961

499_0402_1%

PM@

R246

5.1K_0402_5%

@

R246

5.1K_0402_5%

@

T7 PAD

@ T7 PAD

@

12/13 XTAL_PLL U17K NB9M-GS_BGA_533P COMMON

PM@

12/13 XTAL_PLL U17K NB9M-GS_BGA_533P COMMON

PM@

E10 XTAL_OUT E9 XTAL_OUTBUFF

C1470 0.1U_0402_16V4Z PM@

C1470 0.1U_0402_16V4Z PM@

1 2

C342 1U_0402_6.3V6K PM@

C342 1U_0402_6.3V6K PM@

1

2

T36 PAD

@ T36 PAD

@

C1468 0.1U_0402_16V4Z PM@

C1468 0.1U_0402_16V4Z PM@

1 2

C338 4.7U_0603_6.3V6M PM@

C338 4.7U_0603_6.3V6M PM@

1

2

C1528

22U_0805_6.3V6M

PM@

C1528

22U_0805_6.3V6M

PM@

1

2

R399 33_0402_5%

PM@

R399 33_0402_5%

PM@

R213 2.2K_0402_5%

PM@

R213 2.2K_0402_5%

PM@

R219 10K_0402_5%

PM@

R219 10K_0402_5%

PM@

C1471 0.1U_0402_16V4Z PM@

C1471 0.1U_0402_16V4Z PM@

1 2

R249 5.1K_0402_5%

@ R249 5.1K_0402_5%

@

R211 10K_0402_5%

@

R211 10K_0402_5%

@

R228 10K_0402_5%

PM@

R228 10K_0402_5%

PM@

U6

ADM1032ARMZ REEL_MSOP8

@ U6

ADM1032ARMZ REEL_MSOP8

@

VDD 1

ALERT# 6 THERM#

D+

2 D-3 SCLK 8 SDATA7

C341 470P_0402_50V7K

PM@

C341 470P_0402_50V7K

PM@

1

2

R229 10K_0402_5%

PM@

R229 10K_0402_5%

PM@

R223 10K_0402_5%

PM@

R223 10K_0402_5%

PM@

R222

10K_0402_5%

@ R222

10K_0402_5%

@

C337 1U_0402_6.3V6K PM@

C337 1U_0402_6.3V6K PM@

1

2

C347 470P_0402_50V7K

PM@

C347 470P_0402_50V7K

PM@

1

2

R225 0_0402_5%

@ R225 0_0402_5%

@ 1 2

C351 0.1U_0402_16V4Z

PM@

C351 0.1U_0402_16V4Z

PM@

1 2

R395 0_0402_5%

PM@

R395 0_0402_5%

PM@

R235 10K_0402_5%

@

R235 10K_0402_5%

@

R245 5.1K_0402_5%

@ R245 5.1K_0402_5%

@

R232 2K_0402_5%

PM@

R232 2K_0402_5%

PM@

R215 2.2K_0402_5%

PM@

R215 2.2K_0402_5%

PM@

1 2

R244

10K_0402_1%

PM@

R244

10K_0402_1%

PM@

499_0402_1%

PM@

R964

499_0402_1%

PM@

C1472 0.1U_0402_16V4Z PM@

C1472 0.1U_0402_16V4Z PM@

1 2

R396 0_0402_5%

PM@

R396 0_0402_5%

PM@

R237 10K_0402_5%

@ R237 10K_0402_5%

@

T44 PAD

@ T44 PAD

@

R216 40.2K_0402_1%

PM@

R216 40.2K_0402_1%

PM@

C497

4.7U_0603_6.3V6M

PM@

C497

4.7U_0603_6.3V6M

PM@

1

2

T43 PAD

@ T43 PAD

@

C348 0.1U_0402_16V4Z

@

C348 0.1U_0402_16V4Z

@ 1 2

R253 5.1K_0402_5%

@ R253 5.1K_0402_5%

@

C357 18P_0402_50V8J

@

C357 18P_0402_50V8J

@ 1

2

C1475 0.1U_0402_16V4Z PM@

C1475 0.1U_0402_16V4Z PM@

1 2

R250

5.1K_0402_5%

@

R250

5.1K_0402_5%

@

C350

2200P_0402_50V7K

@ C350

2200P_0402_50V7K

@

1 2

T37 PAD

@ T37 PAD

@

C355

0.1U_0402_16V4Z PM@

C355

0.1U_0402_16V4Z PM@

1

2

R234 1K_0402_5%

PM@

R234 1K_0402_5%

PM@

R238 0_0402_5%

PM@

R238 0_0402_5%

PM@

R212 1K_0402_1%

PM@

R212 1K_0402_1%

PM@

C

7/13 IFPC

TXC TXD2 TXD1

TXD2 TXD1 TXD0

TXC TXD1 TXD2

TXD1 TXD0

U17H NB9M-GS_BGA_533P COMMON

PM@

C

7/13 IFPC

TXC TXD2 TXD1

TXD2 TXD1 TXD0

TXC TXD1 TXD2

TXD1 TXD0

U17H NB9M-GS_BGA_533P COMMON

PM@

P4 IFPC_L0 N4 IFPC_L0 M5 IFPC_L1 M4 IFPC_L1 L4 IFPC_L2 K4 IFPC_L2 H4 IFPC_L3 J4 IFPC_L3 G4 IFPC_AUX G5 IFPC_AUX

9/13 I2C_GPIO_THERM_JTAG U17M NB9M-GS_BGA_533P COMMON

PM@

9/13 I2C_GPIO_THERM_JTAG U17M NB9M-GS_BGA_533P COMMON

PM@

F2 GPIO19 F1 GPIO18 G2 GPIO17 G3 GPIO16 F3 GPIO15 K1 GPIO14 J1 GPIO13 J3 GPIO12 D1 GPIO11 D2 GPIO10 M1 GPIO9 C2 GPIO8 J2 GPIO7 K2 GPIO6 K3 GPIO5 M3 GPIO4 M2 GPIO3 C1 GPIO2 G1 GPIO1 N1 GPIO0 W6 I2CE_SDA Y6 I2CE_SCL N3 I2CD_SDA N2 I2CD_SCL B1 I2CC_SDA A2 I2CC_SCL R3 I2CB_SDA R2 I2CB_SCL T3 I2CA_SDA R1 I2CA_SCL

R242

5.1K_0402_5%

@

R242

5.1K_0402_5%

@

G D

S Q74 2N7002_SOT23-3 G

D

S Q74 2N7002_SOT23-3 2

C346 4700P_0402_25V7K

PM@

C346 4700P_0402_25V7K

PM@

1

2

R252

15K_0402_5%

PM@

R252

15K_0402_5%

PM@

R217 10K_0402_5%

@ R217 10K_0402_5%

@

R236 1K_0402_5%

PM@

R236 1K_0402_5%

PM@

R227 2K_0402_5%

PM@

R227 2K_0402_5%

PM@

L14

BLM18PG181SN1D_0603

PM@

L14

BLM18PG181SN1D_0603

PM@

1

2

C349

0.01U_0402_25V7K

@

C349

0.01U_0402_25V7K

@

1 2

U7

AT24C16BN PM@

U7

AT24C16BN PM@

A0 1 A1 2 SDASCL5 6 VCC 8 A2 3 GND 4

WP 7

C352

1U_0402_6.3V6K PM@

C352

1U_0402_6.3V6K PM@

1

2

R224 10K_0402_5%

@ R224 10K_0402_5%

@

R248

5.1K_0402_5%

PM512M@

R248

5.1K_0402_5%

PM512M@

R218 10K_0402_5%

PM@

R218 10K_0402_5%

PM@

R214 40.2K_0402_1%

PM@

R214 40.2K_0402_1%

PM@

T9 PAD

@ T9 PAD

@

R231 2K_0402_5%

PM@

R231 2K_0402_5%

PM@

T8 PAD

@ T8 PAD

@

R966

499_0402_1%

PM@

R966

499_0402_1%

PM@

L12 BLM18PG181SN1D_0603

PM@

L12 BLM18PG181SN1D_0603

PM@

1 2

R963

499_0402_1%

PM@

R963

499_0402_1%

PM@

R960 499_0402_1%

PM@

R960 499_0402_1%

PM@

R251 5.1K_0402_5%

PM@

R251 5.1K_0402_5%

PM@

C354 0.1U_0402_16V4Z

PM@

C354 0.1U_0402_16V4Z

PM@

1

2

R226 0_0402_5%

@ R226 0_0402_5%

@ 1 2

R962

499_0402_1%

PM@

R962

499_0402_1%

PM@

C353 0.1U_0402_16V4Z

PM@

C353 0.1U_0402_16V4Z

PM@

1

2

R965

499_0402_1%

PM@

R965

499_0402_1%

PM@

Trang 9

QSA3

QSA#0 QSA1

QSA#3

QSA0

QSA4

QSA7

QSA#4 QSA#6

DQMA0

DQMA3 DQMA5 DQMA7

MDA[63 48]

MDA[15 0]

MDA56

MDA62 MDA59 MDA45

MDA57

MDA44 MDA40

MDA47 MDA41

MDA46 MDA42

MDA33 MDA35

MDA43

MDA28

MDA38 MDA34

MDA39 MDA36

MDA20

MDA23

MDA30

MDA21

MDA25 MDA22

MDA26

MDA29

MDA2

MDA15 MDA13

MDA27

MDA0

MDA18

MDA9

MDA12

MDA1 MDA3

MDA16 MDA11

MDA5 MDA7

MDA14

MDA19 MDA6

MDA17 MDA4

MDA50

MDA54 MDA48

MDA52

MDA[31 16]

MDA[47 32]

CMDA15

CMDA2

CMDA9

CMDA22 CMDA16 CMDA3

CMDA28

CMDA10

CMDA23 CMDA17

CMDA4

CMDA11

CMDA24

CMDA29

CMDA5

CMDA18

CMDA0

CMDA12

CMDA25

CMDA6

CMDA19

CMDA30

CMDA13

CMDA26

CMDA7

CMDA20 CMDA14 CMDA1

CMDA27

CMDA8

CMDA21

CMDA11 CMDA12

FB_PLLAVDD

CLKA0 <20>

CLKA0# <20>

CLKA1 <21>

CLKA1# <21>

QSA#[3 0]

<20>

QSA[3 0]

<20>

QSA#[7 4]

<21>

QSA[7 4]

<21>

DQMA[3 0]

<20>

DQMA[7 4]

<21>

MDA[15 0]

<20>

MDA[63 48]

<21>

MDA[47 32]

<21>

MDA[31 16]

<20>

CMDA[30 0] <20,21>

+VDD_MEM18

+VDD_MEM18

+VDD_MEM18

+VDD_MEM18

+1.1VS

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC,A4491

Custom

Friday, October 31, 2008

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC,A4491

Custom

Friday, October 31, 2008

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC,A4491

Custom

Friday, October 31, 2008

VRAM Interface

Rt

Rb

9/18 add R for nvidia

#SI2 change to short pad

C368 4.7U_0603_6.3V6M

PM@

C368 4.7U_0603_6.3V6M

PM@

1

2 C359

0.022U_0402_16V7K PM@

C359

0.022U_0402_16V7K PM@

1

2

C367

4.7U_0603_6.3V6M PM@

C367

4.7U_0603_6.3V6M PM@

1

2

C371 4700P_0402_25V7K

PM@

C371 4700P_0402_25V7K

PM@

1

2 C372

0.1U_0402_16V4Z PM@

C372

0.1U_0402_16V4Z PM@

1

2

C366 0.022U_0402_16V7K

PM@

C366 0.022U_0402_16V7K

PM@

1

2

C378

0.1U_0402_16V4Z

@

C378

0.1U_0402_16V4Z

@

1

2

L15 BLM18PG181SN1D_0603 PM@

L15 BLM18PG181SN1D_0603 PM@

1 2

R257

10K_0402_5%

@ R257

10K_0402_5%

@

C376

0.1U_0402_16V4Z PM@

C376

0.1U_0402_16V4Z PM@

1

2

C364

0.1U_0402_16V4Z

PM@

C364

0.1U_0402_16V4Z

PM@

1

2

R1132 10K_0402_5%

PM@

R1132 10K_0402_5%

PM@

R255 30_0402_1%

PM@

R255 30_0402_1%

PM@

C394

4.7U_0603_6.3V6M

PM@

C394

4.7U_0603_6.3V6M

PM@

1

2

C374

1U_0402_6.3V6K PM@

C374

1U_0402_6.3V6K PM@

1

2

PJP1

PAD-OPEN 3x3m

@

PJP1

PAD-OPEN 3x3m

@

C363 0.022U_0402_16V7K

PM@

C363 0.022U_0402_16V7K

PM@

1

2

2/13 FRAME_BUFFER U17B NB9M-GS_BGA_533P COMMON

PM@

2/13 FRAME_BUFFER U17B NB9M-GS_BGA_533P COMMON

PM@

T19 FB_DLLAVDD R19 FB_PLLAVDD

M22 FBA_DEBUG

B16 FB_CAL_TERM_GND A15 FB_CAL_PU_GND B15 FB_CAL_PD_VDDQ

N23 FBA_CLK1 N24 FBA_CLK1 F23 FBA_CLK0 F24 FBA_CLK0

L22 RFU J22 RFU K22 FBA_CMD28 M24 FBA_CMD27 G27 FBA_CMD26 G24 FBA_CMD25 J26 FBA_CMD24 F27 FBA_CMD23 H24 FBA_CMD22 M26 FBA_CMD21 H22 FBA_CMD20 K25 FBA_CMD19 G22 FBA_CMD18 K24 FBA_CMD17 K23 FBA_CMD16 L24 FBA_CMD15 G25 FBA_CMD14 K27 FBA_CMD13 M25 FBA_CMD12 J23 FBA_CMD11 G26 FBA_CMD10 G23 FBA_CMD9 J27 FBA_CMD8 J25 FBA_CMD7 K26 FBA_CMD6 M27 FBA_CMD5 N27 FBA_CMD4 M23 FBA_CMD3 F25 FBA_CMD2 J24 FBA_CMD1 F26 FBA_CMD0

Y22 FBVDDQ U22 FBVDDQ N22 FBVDDQ M19 FBVDDQ L26 FBVDDQ L23 FBVDDQ L19 FBVDDQ J19 FBVDDQ J18 FBVDDQ J16 FBVDDQ J15 FBVDDQ H26 FBVDDQ H23 FBVDDQ F22 FBVDDQ F19 FBVDDQ F17 FBVDDQ F16 FBVDDQ F15 FBVDDQ F14 FBVDDQ F13 FBVDDQ E13 FBVDDQ D14 FBVDDQ D13 FBVDDQ C13 FBVDDQ B13 FBVDDQ A13 FBVDDQ

C369 4700P_0402_25V7K

PM@

C369 4700P_0402_25V7K

PM@

1

2

C375 0.022U_0402_16V7K

PM@

C375 0.022U_0402_16V7K

PM@

1

2

C365 0.1U_0402_16V4Z

PM@

C365 0.1U_0402_16V4Z

PM@

1

2

C373 1U_0402_6.3V6K

PM@

C373 1U_0402_6.3V6K

PM@

1

2

R259 1K_0402_1%

@

R259 1K_0402_1%

@

C379 0.01U_0402_25V7K

PM@

C379 0.01U_0402_25V7K

PM@

1

2 C377

1U_0402_6.3V6K

PM@

C377

1U_0402_6.3V6K

PM@

1

2

R254 30_0402_1%

PM@

R254 30_0402_1%

PM@

C358

0.022U_0402_16V7K PM@

C358

0.022U_0402_16V7K PM@

1

2

C362

4700P_0402_25V7K

PM@

C362

4700P_0402_25V7K

PM@

1

2

R258 1K_0402_1%

@

R258 1K_0402_1%

@

R256 40.2_0402_1%

@ R256 40.2_0402_1%

@

C360 0.1U_0402_16V4Z

PM@

C360 0.1U_0402_16V4Z

PM@

1

2

13/13 GND_NC U17J NB9M-GS_BGA_533P COMMON

PM@

13/13 GND_NC U17J NB9M-GS_BGA_533P COMMON

PM@

Y5 GND Y26 GND Y23 GND Y2 GND W17 GND W14 GND W11 GND V9 GND V19 GND U5 GND U26 GND U23 GND U2 GND U17 GND U16 GND U15 GND U14 GND U13 GND U12 GND U11 GND T16 GND T15 GND T14 GND T13 GND T12 GND P9 GND P5 GND P26 GND P23 GND P2 GND P19 GND M16 GND M15 GND M14 GND M13 GND M12 GND L5 GND L2 GND L17 GND L16 GND L15 GND L14 GND L13 GND L12 GND L11 GND K9 GND K19 GND J17 GND J14 GND J11 GND H5 GND H2 GND E8 GND E5 GND E26 GND E23 GND E20 GND E2 GND E17 GND E14 GND E11 GND B8 GND B5 GND B26 GND B23 GND B20 GND B2 GND B17 GND B14 GND B11 GND AF8 GND AF5 GND AF26 GND AF23 GND AF20 GND AF2 GND AF17 GND AF14 GND AF11 GND AC8 GND AC5 GND AC26 GND AC23 GND AC20 GND AC2 GND AC17 GND AC14 GND AC11 GND

T6 NC E15 NC AC19 NC AA6 NC

R1131 10K_0402_5%

PM@

R1131 10K_0402_5%

PM@

C370

4700P_0402_25V7K PM@

C370

4700P_0402_25V7K PM@

1

2

C361

4700P_0402_25V7K

PM@

C361

4700P_0402_25V7K

PM@

1

2

Trang 10

D D

MDA[63 0]

DQMA[7 0]

DQMA3

QSA#1

CLKA0 CLKA0#

QSA[7 0]

QSA3 QSA1

QSA#[7 0]

DQMA1

MDA30 MDA29

MDA12 MDA15 MDA31

MDA8 MDA13

MDA25 MDA24

MDA26 MDA27

MDA11 MDA28

MDA14 MDA9

MDA10

QSA#3 CMDA[30 0]

MEM_VREF0

CMDA16

CMDA2 CMDA1 CMDA0 CMDA24 CMDA19 CMDA18

CMDA21

CMDA8

CMDA25

CMDA9 CMDA15 CMDA11

CMDA12

QSA#0

MDA18

CMDA11

CMDA23 CMDA20

MDA19 CMDA1

MDA5

CMDA21 CMDA19

MDA0

CMDA9

CMDA2

MDA22 MDA17 MDA1

QSA0

MDA6

DQMA0

MDA7

CMDA14

CMDA25

CMDA12

MEM_VREF0

CMDA10

MDA21 MDA23 MDA2

QSA#2

CMDA16

MDA4

CMDA0 CMDA24

CLKA0 QSA2

CMDA8

CMDA15

CMDA17 CMDA18

CLKA0#

CLKA0#

CLKA0

MDA3

QSA[7 0]

<19,21>

QSA#[7 0]

<19,21>

CLKA0

<19>

CLKA0#

<19>

DQMA[7 0]

<19,21>

MDA[63 0]

<19,21>

CMDA[30 0]

<19,21>

+VDD_MEM18

+VDD_MEM18 +VDD_MEM18

+VDD_MEM18

+VDD_MEM18

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

Thursday, October 30, 2008

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

Thursday, October 30, 2008

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

Thursday, October 30, 2008

20

DDR BGA MEMORY

SCHEMATIC,A4491

C

52

401597

VRAM DDR2 chips (256MB & 512MB)

32Mx16 DDR2 400MHz *4==>256MB

64Mx16 DDR2 400MHz*4==>512MB

CMD22

A5 A6 A9 A8 BA1 A10 A11 RAS#

A6

A7

A9 A8 BA1

BA2 A13 CAS#

A10 A11

CMD30

CMD24 CMD25 CMD26 CMD27 CMD28 CMD29

RAS#

BA2 A13 CAS#

CMD15

A4

DATA Bus Address

A12

32 63 A3

A0 A2 0 31

A1

CS#

WE#

BA0

A0 CMD0

CKE

A1 CMD1

ODT

CMD2 CMD3

A12

A3 A4 CMD4

CMD5 CMD6 CMD7

A5

CS# CMD8

CMD9 CMD10 CMD11 CMD12 CMD13 CMD14

WE# BA0 CKE ODT

CMD16 CMD17 CMD18 CMD19 CMD20 CMD21

(SSTL-1.8) VREF = 5*VDDQ

DDR2 BGA MEMORY

#PV reserve CMD27 to suport 64M x 16

C401 0.1U_0402_16V4Z

PM@

C401 0.1U_0402_16V4Z

PM@

1

2 C396

0.01U_0402_16V7K PM@

C396

0.01U_0402_16V7K PM@

1

2

C383 0.1U_0402_16V4Z

PM@

C383 0.1U_0402_16V4Z

PM@

1

2

C382 4.7U_0603_6.3V6M

PM@

C382 4.7U_0603_6.3V6M

PM@

1

2

R262

1K_0402_1%

PM@

R262

1K_0402_1%

PM@

U9

HY5PS1G1631CFR-25 FBGA 84P PM512M@

U9

HY5PS1G1631CFR-25 FBGA 84P PM512M@

VREF J2

LDM F3 UDM B3

DQ14 B1 DQ13 D9 DQ12 D1 DQ11 D3 DQ10 D7 DQ9 C2 DQ8 C8 DQ7 F9 DQ6 F1 DQ5 H9 DQ4 H1 DQ3 H3 DQ2 H7 DQ1 G2 DQ0 G8

BA1

L2

A11 P7 A10/AP M2 A9 P3 A8 P8 A7 P2 A6 N7 A5 N3 A4 N8 A3 N2

A0

M7

RAS K7

CKE K2

ODT K9

CS L8

CAS L7

CK

K8

WE

VDDQ A9 VDDQ C1 VDDQ C3 VDDQ C7 VDDQ C9 VDDQ E9 VDDQ G1

VSSQ A7 VSSQ B2 VSSQ B8 VSSQ D2 VSSQ D8 VSSQ E7 VSSQ F2 VSSQ F8 VSSQ H2 VSSQ H8 VSS A3 VSS E3 VSS J3 VSS N1 VSS P9

UDQS

B7

LDQS

F7

VDDQ G3 VDDQ G7

VDD A1 VDD E1 VDD J9 VDD M9 VDD R1

A12 R2

DQ15 B9

VDDL J1 VSSDL J7

NC R8

NC A2 NC L1 NC R3 NC R7 NC E2

C388 0.01U_0402_16V7K

PM@

C388 0.01U_0402_16V7K

PM@

1

2

R261 475_0402_1%

PM@

R261 475_0402_1%

PM@

C385 0.1U_0402_16V4Z PM@

C385 0.1U_0402_16V4Z PM@

1

2

C387

0.01U_0402_16V7K PM@

C387

0.01U_0402_16V7K PM@

1

2

C381 0.1U_0402_16V4Z

PM@

C381 0.1U_0402_16V4Z

PM@

1

2

C391

0.1U_0402_16V4Z PM@

C391

0.1U_0402_16V4Z PM@

1

2 C398

0.1U_0402_16V4Z PM@

C398

0.1U_0402_16V4Z PM@

1

2

C392 0.01U_0402_16V7K

PM@

C392 0.01U_0402_16V7K

PM@

1

2

U8

HY5PS1G1631CFR-25 FBGA 84P PM512M@

U8

HY5PS1G1631CFR-25 FBGA 84P PM512M@

VREF J2

LDM F3 UDM B3

DQ14 B1 DQ13 D9 DQ12 D1 DQ11 D3 DQ10 D7 DQ9 C2 DQ8 C8 DQ7 F9 DQ6 F1 DQ5 H9 DQ4 H1 DQ3 H3 DQ2 H7 DQ1 G2 DQ0 G8

BA1

L2

A11 P7 A10/AP M2 A9 P3 A8 P8 A7 P2 A6 N7 A5 N3 A4 N8 A3 N2

A0

M7

RAS K7

CKE K2

ODT K9

CS L8

CAS L7

CK

K8

WE

VDDQ A9 VDDQ C1 VDDQ C3 VDDQ C7 VDDQ C9 VDDQ E9 VDDQ G1

VSSQ A7 VSSQ B2 VSSQ B8 VSSQ D2 VSSQ D8 VSSQ E7 VSSQ F2 VSSQ F8 VSSQ H2 VSSQ H8 VSS A3 VSS E3 VSS J3 VSS N1 VSS P9

UDQS

B7

LDQS

F7

VDDQ G3 VDDQ G7

VDD A1 VDD E1 VDD J9 VDD M9 VDD R1

A12 R2

DQ15 B9

VDDL J1 VSSDL J7

NC R8

NC A2 NC L1 NC R3 NC R7 NC E2

C395

1000P_0402_50V7K

PM@

C395

1000P_0402_50V7K

PM@

1

2

C402

0.01U_0402_16V7K PM@

C402

0.01U_0402_16V7K PM@

1

2

C386 1000P_0402_50V7K

PM@

C386 1000P_0402_50V7K

PM@

1

2

R260

1K_0402_1%

PM@

R260

1K_0402_1%

PM@

C400

0.1U_0402_16V4Z PM@

C400

0.1U_0402_16V4Z PM@

1

2

C389

0.1U_0402_16V4Z PM@

C389

0.1U_0402_16V4Z PM@

1

2 C399

4.7U_0603_6.3V6M

PM@

C399 4.7U_0603_6.3V6M

PM@

1

2

C390 4.7U_0603_6.3V6M

PM@

C390 4.7U_0603_6.3V6M

PM@

1

2

C393

0.01U_0402_16V7K PM@

C393

0.01U_0402_16V7K PM@

1

2 C397

0.01U_0402_16V7K

PM@

C397 0.01U_0402_16V7K

PM@

1

2

C384 4.7U_0603_6.3V6M

PM@

C384 4.7U_0603_6.3V6M

PM@

1

2

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