THÔNG TIN TÀI LIỆU
A B C D E 1 Compal Confidential 2 NAL00 Schematics Document AMD L310/L110 Processor with RS780MN/SB710/M92-S2/S3 LP 2009-04-24 3 4 2008/10/06 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/10/06 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATICS,MB A5401 Document Number Rev A 401728 Sheet Monday, May 04, 2009 E of 49 hexainf@hotmail.com REV:0.2 A B C D E Compal Confidential Model Name : NAL00 VRAM 512MB 64M16 x Fan Control AMD S1G1 Processor Memory BUS(DDRII) page uPGA-638 Package page 18 page 21 ATI M92-S2 LP uFCBGA-631 CRT Conn Page 14,15,16,17,19 page 23 PCI-Express 8x Gen1 BANK 0, 1, 2, page 8,9 1.8V DDRII 667/800 page 4,5,6,7 DDR3 LVDS Conn 200pin DDRII-SO-DIMM X2 Dual Channel Hyper Transport Link 16 x 16 in socket Thermal Sensor ADM1032 ATI RS780MN page 30 Clock Generator SLG8SP626VTR page page 20 uFCBGA-528 Card Reader RTS5159 HDMI Conn page 30 page 22 PCI-Express 1x Port MINI Card WWANpage 31 MINI Card WLANpage 31 Port To IO board LAN(GbE) Realtek RTL8111CA page 31 page 31 page 32 page 10,11,12,13 Port USB conn X2 A link Express2 page 31 page 32 To IO Board USB conn X BT Conn page 31 USB 3.3V 48MHz uFCBGA-528 HD Audio Port Port Port Port Camera Port Port Mini Card (WLAN) page 21 ATI SB710 Mini Card (WWAN) Port 12 Port Port 3.3V 24.576MHz/48Mhz S-ATA port page 24,25,26,27,28 IO Board page 31 SATA HDD Conn.page 29 PWR Board page 35 HDA Codec ALC269X-GR port CDROM Conn page 29 Digital MIC page 37 page 36 Phone Jack x2 LPC BUS page 37 TP Board page 34 LID SW/Cap sensor Board page 33 ENE KB926 LED page 33 page 35 Power On/Off CKT page 35 Int.KB page 34 RTC CKT BIOS page 34 page 24 DC/DC Interface CKT page 38 Power Circuit page 39,40,41,42,43,44,4546,47 4 2008/10/06 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/10/06 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATICS,MB A5401 Document Number Rev A 401728 Sheet Monday, May 04, 2009 E of 49 A B C D SIGNAL STATE Voltage Rails SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock HIGH HIGH HIGH HIGH ON ON ON ON Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF B+ AC or battery power rail for power circuit N/A N/A N/A +CPU_CORE Core voltage for CPU (0.7-1.2V) ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF Full ON +NB_CORE 1.0V switched power rail ON OFF +0.9V 0.9V switched power rail for DDR terminator ON ON OFF +1.1VS 1.1V switched power rail for NB VDDC & VGA ON OFF OFF +1.2V_HT 1.2V switched power rail ON OFF OFF +VGA_CORE 0.90-0.95V switched power rail ON OFF OFF Vcc Ra/Rc/Re +1.5VS 1.5V power rail for PCIE Card ON OFF OFF Board ID +1.8V 1.8V power rail for CPU VDDIO and DDR ON ON OFF +1.8VS 1.8V switched power rail ON OFF OFF +2.5VS 2.5V for CPU_VDDA ON OFF OFF +3VALW 3.3V always on power rail ON ON ON* +3V_LAN 3.3V power rail for LAN ON ON ON +3VS 3.3V switched power rail ON OFF OFF +5VALW 5V always on power rail ON ON ON* +5VS 5V switched power rail ON OFF OFF +VSB VSB always on power rail ON ON ON* +RTCVCC RTC power ON ON ON OFF Board ID / SKU ID Table for AD channel REQ#/GNT# EC SM Bus1 address V AD_BID V 0.216 V 0.436 V 0.712 V 1.036 V 1.453 V 1.935 V 2.500 V V AD_BID typ V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V BOARD ID Table Board ID External PCI Devices IDSEL# 3.3V +/- 5% 100K +/- 5% Rb / Rd / Rf 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% NC V AD_BID max V 0.289 V 0.538 V 0.875 V 1.264 V 1.759 V 2.341 V 3.300 V Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF Device Interrupts BTO Option Table PCB Revision 0.1 0.2 0.3 1.0 BTO Item Discrete UMA UMA_HDMI Side port JM51 HM52 BOM Structure VGA@ UMA@ UMA_H@ SP@ JM@ HM@ EC SM Bus2 address 3 Device Address HEX Smart Battery 0001 011X b 16H Device ADI ADM1032 (CPU) Address HEX 1001 100X b 98H SB-Temp Sensor SB710 SM Bus address Function Description 9CH SB700 SB700 RS780MN PX_GPIO0 PX_GPIO1 PX_GPIO2 dGPU_Reset dGPU_PWR_Enable IGP only mode X X PowerXpress mode H : Enable H : Enable SB700 SM Bus address Device Address HEX Clock Generator (SILEGO SLG8SP626) 1101 001Xb D2 DDR DIMM1 1001 000Xb 90 DDR DIMM2 1001 010Xb 94 Device Address New card DISPLAY OUTPUT PX Mode Switch X L : iGPU(DC) / H : dGPU(AC) LVDS / CRT KB926 Function Description PX_GPIO1 PX_GPIO2 Enable +1.1VS_PX PX MODE SWITCH PX_+1.8VS PX_+3VS Enable +3VS_DELAY Enable +1.8VS_PX PX_+VGA_CORE Trigger from SB IGP only mode X X X X X X PowerXpress mode H : Enable Reserved H : Enable H : Enable H : Enable Reserved KB926 PX_GPIO1_SB Mini card Function Description Trigger from SB to Enable (PX_GPIO1/PX_+3VS/PX_+1.8VS/PX_+VGA_CORE) IGP only mode X PowerXpress mode H : Enable 2008/10/06 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/10/06 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A PX_GPIO2_NB Enable +VGA_CORE B C D SCHEMATICS,MB A5401 Document Number Rev A 401728 Sheet Monday, May 04, 2009 E of 49 hexainf@hotmail.com E D H_CADIP[0 15] H_CADIN[0 15] H_CADIP[0 15] H_CADOP[0 15] H_CADIN[0 15] H_CADON[0 15] H_CADOP[0 15] H_CADON[0 15] D +1.2V_HT JCPU1A H_CTLIP1 H_CTLIN1 0_0402_5% 0_0402_5% H_CTLIP0 H_CTLIN0 H_CTLIP0 H_CTLIN0 N1 P1 L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0 T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1 C904 4.7U_0805_10V4Z H_CADOP15 H_CADON15 H_CADOP14 H_CADON14 H_CADOP13 H_CADON13 H_CADOP12 H_CADON12 H_CADOP11 H_CADON11 H_CADOP10 H_CADON10 H_CADOP9 H_CADON9 H_CADOP8 H_CADON8 H_CADOP7 H_CADON7 H_CADOP6 H_CADON6 H_CADOP5 H_CADON5 H_CADOP4 H_CADON4 H_CADOP3 H_CADON3 H_CADOP2 H_CADON2 H_CADOP1 H_CADON1 H_CADOP0 H_CADON0 FAN1 Conn +5VS C108 +5VS 10U_0805_10V4Z U10 EN_DFAN1 R62 2 +VCC_FAN1 300_0402_5% EN VIN VOUT VSET GND GND GND GND D11 1SS355_SOD323-2 @ C D12 APL5607KI-TRG_SO8 @ BAS16_SOT23-3 C121 10U_0805_10V4Z C105 0.1U_0402_16V4Z +3VS C119 1000P_0402_50V7K R298 10K_0402_5% 40mil L0_CLKOUT_H1 L0_CLKOUT_L1 L0_CLKOUT_H0 L0_CLKOUT_L0 Y4 Y3 Y1 W1 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLOUT_H1 L0_CTLOUT_L1 T5 R5 H_CTLOP1_R H_CTLON1_R L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLOUT_H0 L0_CTLOUT_L0 R2 R3 H_CTLOP0 H_CTLON0 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0 H_CTLIP1_R P3 H_CTLIN1_R P4 AE5 AE4 AE3 AE2 L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0 J5 K5 J3 J2 H_CLKIP1 H_CLKIN1 H_CLKIP0 H_CLKIN0 R225 R226 N5 P5 M3 M4 L5 M5 K3 K4 H3 H4 G5 H5 F3 F4 E5 F5 N3 N2 L1 M1 L3 L2 J1 K1 G1 H1 G3 G2 E1 F1 E3 E2 VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0 C VLDT_A3 VLDT_A2 VLDT_A1 VLDT_A0 H_CADIP15 H_CADIN15 H_CADIP14 H_CADIN14 H_CADIP13 H_CADIN13 H_CADIP12 H_CADIN12 H_CADIP11 H_CADIN11 H_CADIP10 H_CADIN10 H_CADIP9 H_CADIN9 H_CADIP8 H_CADIN8 H_CADIP7 H_CADIN7 H_CADIP6 H_CADIN6 H_CADIP5 H_CADIN5 H_CADIP4 H_CADIN4 H_CADIP3 H_CADIN3 H_CADIP2 H_CADIN2 H_CADIP1 H_CADIN1 H_CADIP0 H_CADIN0 D4 D3 D2 D1 VLDT=500mA H_CLKOP1 H_CLKON1 H_CLKOP0 H_CLKON0 R227 R250 JP13 +VCC_FAN1 FAN_SPEED1 0_0402_5% 0_0402_5% C670 1000P_0402_50V7K ACES_85205-03001 CONN@ H_CTLOP1 H_CTLON1 H_CTLOP0 H_CTLON0 FOX_PZ63823-284S-41F CONN@ Athlon 64 S1 Processor Socket B B +1.2V_HT R829 R814 1@ 51_0402_1% 1@ 51_0402_1% H_CTLIP1_R H_CTLIN1_R AMD : 49.9 1% ATI : 51 1% +1.2V_HT VLDT CAP 250 mil C910 4.7U_0805_10V4Z C911 4.7U_0805_10V4Z 2 C912 0.22U_0603_16V4Z C913 0.22U_0603_16V4Z C914 180P_0402_50V8J C915 180P_0402_50V8J Near CPU Socket A A 2007/5/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/06/11 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATICS,MB A5401 Rev A 401728 Date: Sheet Monday, May 04, 2009 of 49 A B C D E Processor DDR2 Memory Interface DDR_B_D[63 0] +1.8V R801 1K_0402_1% +CPU_M_VREF JCPU1B W17 VTT_SENSE TP1 +1.8V R802 R803 2 39.2_0402_1% 39.2_0402_1% DDR_CS3_DIMMA# DDR_CS2_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMA# DDR_CS3_DIMMB# DDR_CS2_DIMMB# DDR_CS1_DIMMB# DDR_CS0_DIMMB# DDR_CKE1_DIMMB DDR_CKE0_DIMMB DDR_CKE1_DIMMA DDR_CKE0_DIMMA DDR_A_MA[15 0] Y10 M_ZN AE10 M_ZP AF10 DDR_CS3_DIMMA# DDR_CS2_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMA# V19 J22 V22 T19 +0.9V VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10 MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1 Y16 AA16 E16 F16 DDR_A_CLK2 DDR_A_CLK#2 DDR_A_CLK1 DDR_A_CLK#1 AF18 AF17 A17 A18 DDR_B_CLK2 DDR_B_CLK#2 DDR_B_CLK1 DDR_B_CLK#1 M_VREF VTT_SENSE M_ZN M_ZP MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0 DDR_A_CLK2 DDR_A_CLK#2 DDR_A_CLK1 DDR_A_CLK#1 DDR_B_CLK2 DDR_B_CLK#2 DDR_B_CLK1 DDR_B_CLK#1 DDR_CS3_DIMMB# DDR_CS2_DIMMB# DDR_CS1_DIMMB# DDR_CS0_DIMMB# Y26 J24 W24 U23 MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0 DDR_CKE1_DIMMB DDR_CKE0_DIMMB DDR_CKE1_DIMMA DDR_CKE0_DIMMA H26 J23 J20 J21 MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0 MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0 W23 W26 V20 U19 DDR_B_ODT1 DDR_B_ODT0 DDR_A_ODT1 DDR_A_ODT0 DDR_A_MA15 DDR_A_MA14 DDR_A_MA13 DDR_A_MA12 DDR_A_MA11 DDR_A_MA10 DDR_A_MA9 DDR_A_MA8 DDR_A_MA7 DDR_A_MA6 DDR_A_MA5 DDR_A_MA4 DDR_A_MA3 DDR_A_MA2 DDR_A_MA1 DDR_A_MA0 K19 K20 V24 K24 L20 R19 L19 L22 L21 M19 M20 M24 M22 N22 N21 R21 MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0 MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10 MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0 J25 J26 W25 L23 L25 U25 L24 M26 L26 N23 N24 N25 N26 P24 P26 T24 DDR_B_MA15 DDR_B_MA14 DDR_B_MA13 DDR_B_MA12 DDR_B_MA11 DDR_B_MA10 DDR_B_MA9 DDR_B_MA8 DDR_B_MA7 DDR_B_MA6 DDR_B_MA5 DDR_B_MA4 DDR_B_MA3 DDR_B_MA2 DDR_B_MA1 DDR_B_MA0 DDR_A_BS#2 DDR_A_BS#1 DDR_A_BS#0 K22 R20 T22 MA_BANK2 MA_BANK1 MA_BANK0 MB_BANK2 MB_BANK1 MB_BANK0 K26 DDR_B_BS#2 T26 DDR_B_BS#1 U26 DDR_B_BS#0 DDR_B_BS#2 DDR_B_BS#1 DDR_B_BS#0 DDR_A_RAS# DDR_A_CAS# DDR_A_WE# T20 U20 U21 MA_RAS_L MA_CAS_L MA_WE_L MB_RAS_L MB_CAS_L MB_WE_L U24 DDR_B_RAS# V26 DDR_B_CAS# U22 DDR_B_WE# DDR_B_RAS# DDR_B_CAS# DDR_B_WE# DDR_A_BS#2 DDR_A_BS#1 DDR_A_BS#0 DDR_A_RAS# DDR_A_CAS# DDR_A_WE# MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1 DDR_B_ODT1 DDR_B_ODT0 DDR_A_ODT1 DDR_A_ODT0 DDR_B_MA[15 0] DDR_B_DM[7 0] CONN@ FOX_PZ63823-284S-41F Athlon 64 S1 Processor Socket PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH DDR_A_CLK2 DDR_B_CLK2 DDR_A_CLK#2 C918 1.5P_0402_50V8C DDR_B_CLK#2 DDR_A_CLK1 DDR_A_CLK#1 MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0 DDR_B_DM7 DDR_B_DM6 DDR_B_DM5 DDR_B_DM4 DDR_B_DM3 DDR_B_DM2 DDR_B_DM1 DDR_B_DM0 AD12 AC16 AE22 AB26 E25 A22 B16 A12 MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0 DDR_B_DQS7 DDR_B_DQS#7 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS0 DDR_B_DQS#0 AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26 F26 E26 A24 A23 D16 C16 C12 B12 MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0 MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10 MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0 AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12 DDR_A_D63 DDR_A_D62 DDR_A_D61 DDR_A_D60 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56 DDR_A_D55 DDR_A_D54 DDR_A_D53 DDR_A_D52 DDR_A_D51 DDR_A_D50 DDR_A_D49 DDR_A_D48 DDR_A_D47 DDR_A_D46 DDR_A_D45 DDR_A_D44 DDR_A_D43 DDR_A_D42 DDR_A_D41 DDR_A_D40 DDR_A_D39 DDR_A_D38 DDR_A_D37 DDR_A_D36 DDR_A_D35 DDR_A_D34 DDR_A_D33 DDR_A_D32 DDR_A_D31 DDR_A_D30 DDR_A_D29 DDR_A_D28 DDR_A_D27 DDR_A_D26 DDR_A_D25 DDR_A_D24 DDR_A_D23 DDR_A_D22 DDR_A_D21 DDR_A_D20 DDR_A_D19 DDR_A_D18 DDR_A_D17 DDR_A_D16 DDR_A_D15 DDR_A_D14 DDR_A_D13 DDR_A_D12 DDR_A_D11 DDR_A_D10 DDR_A_D9 DDR_A_D8 DDR_A_D7 DDR_A_D6 DDR_A_D5 DDR_A_D4 DDR_A_D3 DDR_A_D2 DDR_A_D1 DDR_A_D0 MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0 Y13 AB16 Y19 AC24 F24 E19 C15 E12 DDR_A_DM7 DDR_A_DM6 DDR_A_DM5 DDR_A_DM4 DDR_A_DM3 DDR_A_DM2 DDR_A_DM1 DDR_A_DM0 MA_DQS_H7 MA_DQS_L7 MA_DQS_H6 MA_DQS_L6 MA_DQS_H5 MA_DQS_L5 MA_DQS_H4 MA_DQS_L4 MA_DQS_H3 MA_DQS_L3 MA_DQS_H2 MA_DQS_L2 MA_DQS_H1 MA_DQS_L1 MA_DQS_H0 MA_DQS_L0 W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13 DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS0 DDR_A_DQS#0 DDR_A_D[63 0] DDR_A_DM[7 0] DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS0 DDR_A_DQS#0 Athlon 64 S1 Processor Socket C920 1.5P_0402_50V8C DDR_B_CLK#1 C921 1.5P_0402_50V8C Compal Secret Data Security Classification 2007/5/18 Issued Date 2009/06/11 Deciphered Date Title Compal Electronics, Inc SCHEMATICS,MB A5401 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 401728 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A CONN@ FOX_PZ63823-284S-41F DDR_B_CLK1 1 C919 1.5P_0402_50V8C DDR_B_DQS7 DDR_B_DQS#7 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS0 DDR_B_DQS#0 AD11 AF11 AF14 AE14 Y11 AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24 G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11 B C D Rev A Sheet Monday, May 04, 2009 E of 49 hexainf@hotmail.com C917 1000P_0402_50V7K R800 1K_0402_1% C916 0.1U_0402_16V4Z +CPU_M_VREF JCPU1C DDR_B_D63 DDR_B_D62 DDR_B_D61 DDR_B_D60 DDR_B_D59 DDR_B_D58 DDR_B_D57 DDR_B_D56 DDR_B_D55 DDR_B_D54 DDR_B_D53 DDR_B_D52 DDR_B_D51 DDR_B_D50 DDR_B_D49 DDR_B_D48 DDR_B_D47 DDR_B_D46 DDR_B_D45 DDR_B_D44 DDR_B_D43 DDR_B_D42 DDR_B_D41 DDR_B_D40 DDR_B_D39 DDR_B_D38 DDR_B_D37 DDR_B_D36 DDR_B_D35 DDR_B_D34 DDR_B_D33 DDR_B_D32 DDR_B_D31 DDR_B_D30 DDR_B_D29 DDR_B_D28 DDR_B_D27 DDR_B_D26 DDR_B_D25 DDR_B_D24 DDR_B_D23 DDR_B_D22 DDR_B_D21 DDR_B_D20 DDR_B_D19 DDR_B_D18 DDR_B_D17 DDR_B_D16 DDR_B_D15 DDR_B_D14 DDR_B_D13 DDR_B_D12 DDR_B_D11 DDR_B_D10 DDR_B_D9 DDR_B_D8 DDR_B_D7 DDR_B_D6 DDR_B_D5 DDR_B_D4 DDR_B_D3 DDR_B_D2 DDR_B_D1 DDR_B_D0 +1.8VS 3900P_0402_50V7K 1 C926 +1.8VS 2 CPU_CLKIN_SC_P CPU_CLKIN_SC_N R816 169_0402_1% CLK_CPU_BCLK# R337 300_0402_5% C927 3900P_0402_50V7K A9 A8 C719 0.01U_0402_25V4Z @ C928 0.1U_0402_16V4Z 2200P_0402_50V7K VDD CPU_THERMDA CPU_THERMDC D- THERM# D+ SDATA ALERT# GND PSI_L TEST29_H TEST29_L TEST24 TEST23 TEST22 TEST21 TEST20 AE7 AD7 AE8 AB8 AF7 C3 AA6 W7 W8 Y6 AB6 TEST7 TEST6 THERMDC THERMDA TEST3 TEST2 TEST28_H TEST28_L TEST27 TEST26 TEST10 TEST8 J7 H8 AF8 AE6 K8 C4 P20 P19 N20 N19 RSVD0 RSVD1 RSVD2 RSVD3 EC_SMB_DA2 ADM1032ARMZ-2REEL_MSOP8 R26 R25 P22 R22 SMBus Address: 1001110X (b) CPU_TEST21_SCANEN PSI_L RSVD4 RSVD5 RSVD6 RSVD7 300_0402_5% 1K_0402_5% 300_0402_5% R809 300_0402_5% VID1: For compatibility with future processors D +1.8V CLKIN_H CLKIN_L TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12 F75383M_MSOP8 CPU_PRESENT# VDDIO_FB_H VDDIO_FB_L E9 E8 G9 H10 AA7 C2 D7 E7 F7 C7 AC8 B H_PROCHOT_R# R805 R806 R807 AC6 CPU_PRESENT# TMS TCK TRST_L TDI EC_SMB_CK2 CPU_VID1 R372 0_0402_5% CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0 A3 AA9 AC9 AD9 AF9 CPU_THERMDC CPU_THERMDA SCLK CPU_PRESENT_L VDD_FB_H VDD_FB_L CPU_TMS CPU_TCK CPU_TRST# CPU_TDI U55 HTREF1 HTREF0 DBRDY +3VS C929 SIC SID A5 C6 A6 A4 C5 B5 G10 TP4 TP6 TP8 TP10 TP11 CPU_THERMTRIP#_R CPU_PROCHOT#_1.8 CPU_TEST26_BURNIN# VID5 VID4 VID3 VID2 VID1 VID0 CPU_DBRDY CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1 LDT_STOP# W9 Y9 TP3 AF6 AC7 DBREQ_L E10 CPU_DBREQ# TDO AE9 CPU_TDO C9 C8 CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N R813 CPU_TEST25_H_BYPASSCLK_H 510_0402_5% R815 R817 R818 CPU_TEST25_L_BYPASSCLK_L 510_0402_5% CPU_TEST19_PLLTEST0 300_0402_5% CPU_TEST18_PLLTEST1 300_0402_5% R819 80.6_0402_1% C ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1" RSVD8 RSVD9 H16 B18 RSVD10 RSVD11 B3 C1 RSVD12 RSVD13 RSVD14 H6 G6 D5 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 R24 W18 R23 AA8 H18 H19 TP5 TP7 TP9 CPU_TEST21_SCANEN TP12 CPU_TEST26_BURNIN# +1.8V +3VALW +1.8V +3VALW TP2 CLK_CPU_BCLK F6 E6 THERMTRIP_L PROCHOT_L RESET_L PWROK LDTSTOP_L R61&R16 close to CPU within 1" CPU_VCC_SENSE CPU_VSS_SENSE C720 0.01U_0402_25V4Z @ LDT_STOP# AF4 AF5 44.2_0402_1% CPU_HTREF1 P6 44.2_0402_1% CPU_HTREF0 R6 VDDA2 VDDA1 R820 1K_0402_5% R822 300_0402_5% R821 @ 1K_0402_5% B @ Q70 MMBT3904_NL_SOT23-3 MAINPWON C Q69 1H_THERMTRIP# C 2 CPU_THERMTRIP#_R E E FOX_PZ63823-284S-41F CONN@ B 10K_0402_5% B R823 2 +1.2V_HT H_PWRGD C R811 R812 B7 A7 F10 CPU_SIC 300_0402_5% R808 1 LDT_RST# H_PWRGD LDT_STOP# R338 300_0402_5% +1.8V JCPU1D F8 F9 +1.8VS H_PWRGD R830 300_0402_5% 2 D C721 0.01U_0402_25V4Z @ + +1.8V LDT_RST# LDT_RST# +2.5VDDA VDDA=300mA L91 3300P_0402_50V7K FCM2012CF-800T06_2P 1 C391 C923 C924 C925 150U_B2_6.3VM 0.22U_0603_16V4Z 2 4.7U_0805_10V4Z 1 +2.5VS 2 A:Need to re-Link "SGN00000200" R339 300_0402_5% MMBT3904_NL_SOT23-3 H_THERMTRIP# NOTE: HDT TERMINATION IS REQUIRED FOR REV Ax SILICON ONLY +3VS 10 12 14 16 18 20 22 24 26 P 11 13 15 17 19 21 23 HDT_RST# @ SAMTEC_ASP-68200-07 B A Y G A HDT Connector JP18 CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO AMD: suggest DBREQ need pull high @ 220_0402_5%R824 @ 220_0402_5%R825 @ 220_0402_5%R826 @ 220_0402_5%R827 220_0402_5%R828 +1.8V A LDT_RST# SB_PWRGD @ U56 @U56 NC7SZ08P5X_NL_SC70-5 2007/5/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/06/11 Deciphered Date Title SCHEMATICS,MB A5401 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401728 Date: Sheet Monday, May 04, 2009 of 49 JCPU1F +CPU_CORE JCPU1E VDD(+CPU_CORE) decoupling AC4 AD2 G4 H2 J9 J11 J13 K6 K10 K12 K14 L4 L7 L9 L11 L13 M2 M6 M8 M10 N7 N9 N11 P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 V6 V8 V10 +CPU_CORE D 1 + C931 330U_D2E_2.5VM_R9M 1 + C934 330U_D2E_2.5VM_R9M C930 330U_D2E_2.5VM_R9M + C935 330U_D2E_2.5VM_R9M Near CPU Socket +CPU_CORE C936 22U_0805_6.3V6M C937 22U_0805_6.3V6M 22U_0805_6.3V6M +CPU_CORE 1 C938 C939 22U_0805_6.3V6M +CPU_CORE C945 0.22U_0603_16V4Z 1 C946 0.22U_0603_16V4Z C940 22U_0805_6.3V6M C941 22U_0805_6.3V6M C942 22U_0805_6.3V6M C943 22U_0805_6.3V6M C944 22U_0805_6.3V6M +CPU_CORE C947 0.01U_0402_25V7K C948 180P_0402_50V8J C 2 2 Under CPU Socket VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25 +1.8V FOX_PZ63823-284S-41F CONN@ VDDIO decoupling Athlon 64 S1 Processor Socket +1.8V +1.8V C949 22U_0805_6.3V6M 1 C950 22U_0805_6.3V6M C951 0.22U_0603_16V4Z C952 0.22U_0603_16V4Z + +1.8V C B C: Change to NBO CAP C392 150U_B2_6.3VM C954 0.22U_0603_16V4Z C955 0.22U_0603_16V4Z C956 0.22U_0603_16V4Z +1.8V C957 0.22U_0603_16V4Z +0.9V +1.8V 180PF Qt'y follow the distance between CPU socket and DIMM0 C958 4.7U_0805_10V4Z C966 0.01U_0402_25V7K 1 C967 0.01U_0402_25V7K C968 180P_0402_50V8J C969 180P_0402_50V8J C970 180P_0402_50V8J 2 +1.8V 1 C980 4.7U_0805_10V4Z C981 4.7U_0805_10V4Z C982 4.7U_0805_10V4Z + C983 4.7U_0805_10V4Z C959 4.7U_0805_10V4Z C971 180P_0402_50V8J C960 0.22U_0603_16V4Z C961 0.22U_0603_16V4Z C962 1000P_0402_50V7K C963 1000P_0402_50V7K C964 180P_0402_50V8J C965 180P_0402_50V8J Near CPU Socket Right side +0.9V 1 D Near Power Supply Between CPU Socket and DIMM A J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 Athlon 64 S1 Processor Socket +0.9V VTT decoupling B VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 FOX_PZ63823-284S-41F CONN@ Under CPU Socket VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 C972 4.7U_0805_10V4Z C973 4.7U_0805_10V4Z 2 C974 0.22U_0603_16V4Z C975 0.22U_0603_16V4Z C976 1000P_0402_50V7K C977 1000P_0402_50V7K C978 180P_0402_50V8J C979 180P_0402_50V8J C536 220U_B2_2.5VM_R35 A Near CPU Socket Left side 2007/5/18 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/06/11 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATICS,MB A5401 Rev A 401728 Date: Sheet Monday, May 04, 2009 of 49 hexainf@hotmail.com + AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 +CPU_CORE DDR_A_D2 DDR_A_D3 DDR_A_D8 DDR_A_D9 DDR_A_DQS#1 DDR_A_DQS1 DDR_A_D10 DDR_A_D11 DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_D18 DDR_A_D19 DDR_A_D24 DDR_A_D25 C DDR_A_DM3 DDR_A_D26 DDR_A_D27 DDR_CKE0_DIMMA DDR_CS2_DIMMA# DDR_A_BS#2 DDR_CKE0_DIMMA DDR_CS2_DIMMA# DDR_A_BS#2 DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 DDR_A_MA10 DDR_A_BS#0 DDR_A_WE# DDR_A_BS#0 DDR_A_WE# DDR_A_CAS# DDR_CS1_DIMMA# DDR_A_CAS# DDR_CS1_DIMMA# DDR_A_ODT1 DDR_A_ODT1 DDR_A_D32 DDR_A_D33 B DDR_A_DQS#4 DDR_A_DQS4 DDR_A_D34 DDR_A_D35 DDR_A_D40 DDR_A_D41 DDR_A_DM5 DDR_A_D42 DDR_A_D43 DDR_A_D48 DDR_A_D49 DDR_A_DQS#6 DDR_A_DQS6 DDR_A_D50 DDR_A_D51 DDR_A_D56 DDR_A_D57 DDR_A_DM7 A DDR_A_D58 DDR_A_D59 SB_CK_SDAT SB_CK_SCLK SB_CK_SDAT SB_CK_SCLK +3VS C1003 0.1U_0402_16V4Z 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 203 VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 NC VSS DQ26 DQ27 VSS CKE0 VDD NC BA2 VDD A12 A9 A8 VDD A5 A3 A1 VDD A10/AP BA0 WE# VDD CAS# NC/S1# VDD NC/ODT1 VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS NC,TEST VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SDA SCL VDDSPD GND 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 204 VSS DQ20 DQ21 VSS NC DM2 VSS DQ22 DQ23 VSS DQ28 DQ29 VSS DQS3# DQS3 VSS DQ30 DQ31 VSS NC/CKE1 VDD NC/A15 NC/A14 VDD A11 A7 A6 VDD A4 A2 A0 VDD BA1 RAS# S0# VDD ODT0 NC/A13 VDD NC VSS DQ36 DQ37 VSS DM4 VSS DQ38 DQ39 VSS DQ44 DQ45 VSS DQS5# DQS5 VSS DQ46 DQ47 VSS DQ52 DQ53 VSS CK1 CK1# VSS DM6 VSS DQ54 DQ55 VSS DQ60 DQ61 VSS DQS7# DQS7 VSS DQ62 DQ63 VSS SAO SA1 GND DDR_A_D4 DDR_A_D5 DDR_A_DM0 DDR_A_D6 DDR_A_D7 DDR_A_D12 DDR_A_D13 DDR_A_CLK1 DDR_A_CLK#1 DDR_A_DM2 DDR_A_D[0 63] DDR_A_DQS[0 7] DDR_A_DQS[0 7] DDR_A_MA[0 15] DDR_A_D30 DDR_A_D31 DDR_CKE1_DIMMA DDR_A_MA15 DDR_A_MA14 DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 DDR_CS3_DIMMA# 47_0804_8P4R_5% RP25 47_0804_8P4R_5% RP26 C985 C988 0.1U_0402_16V4Z 0.1U_0402_16V4Z C989 C990 0.1U_0402_16V4Z 0.1U_0402_16V4Z D C991 C992 0.1U_0402_16V4Z 0.1U_0402_16V4Z C993 C994 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_A_BS#0 DDR_A_MA10 DDR_A_MA1 DDR_A_MA3 47_0804_8P4R_5% RP28 C995 C996 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_A_ODT1 DDR_CS1_DIMMA# DDR_A_CAS# DDR_A_WE# 47_0804_8P4R_5% RP29 C998 C997 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_A_RAS# DDR_A_ODT0 DDR_A_MA13 DDR_CS3_DIMMA# 47_0804_8P4R_5% RP30 C999 C1000 0.1U_0402_16V4Z 0.1U_0402_16V4Z 47_0804_8P4R_5% RP31 DDR_CKE1_DIMMA DDR_A_MA15 DDR_A_MA14 C1002 C1001 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_A_DQS#[0 7] DDR_A_DQS#3 DDR_A_DQS3 47_0804_8P4R_5% RP27 DDR_A_DM[0 7] DDR_A_DM[0 7] DDR_A_DQS#[0 7] DDR_A_ODT0 DDR_A_MA13 DDR_A_MA12 DDR_A_BS#2 DDR_CS2_DIMMA# DDR_CKE0_DIMMA DDR_A_D[0 63] DDR_A_D28 DDR_A_D29 DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA# DDR_A_MA5 DDR_A_MA8 DDR_A_MA9 DDR_A_MA[0 15] DDR_CKE1_DIMMA DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 DDR_A_BS#1 DDR_CS0_DIMMA# C 47_0804_8P4R_5% DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA# DDR_A_ODT0 DDR_CS3_DIMMA# DDR_A_D36 DDR_A_D37 B DDR_A_DM4 DDR_A_D38 DDR_A_D39 DDR_A_D44 DDR_A_D45 DDR_A_DQS#5 DDR_A_DQS5 DDR_A_D46 DDR_A_D47 DDR_A_D52 DDR_A_D53 DDR_A_CLK2 DDR_A_CLK#2 DDR_A_CLK2 DDR_A_CLK#2 DDR_A_DM6 DDR_A_D54 DDR_A_D55 DDR_A_D60 DDR_A_D61 DDR_A_DQS#7 DDR_A_DQS7 A DDR_A_D62 DDR_A_D63 R834 R835 1 10K_0402_5% 10K_0402_5% Compal Electronics, Inc Compal Secret Data Security Classification Issued Date R833 DDR_A_CLK1 DDR_A_CLK#1 DDR_A_D22 DDR_A_D23 FOX_AS0A426-M2RN-7F CONN@ JAWD0 used 1K_0402_1% DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D21 +1.8V +0.9V 1K_0402_1% DDR_A_DM1 DIMM1 REV H:5.2mm (BOT) R832 RP24 DDR_A_DQS#0 DDR_A_DQS0 VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS DQ12 DQ13 VSS DM1 VSS CK0 CK0# VSS DQ14 DQ15 VSS 4.7U_0805_10V4Z D VREF VSS DQ0 DQ1 VSS DQS0# DQS0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS C987 DDR_A_D0 DDR_A_D1 C986 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 0.1U_0402_16V4Z +1.8V JDIMM1 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 +1.8V +DIMM_VREF +1.8V 2 2007/5/18 2009/06/11 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATICS,MB A5401 Rev A 401728 Date: Sheet Monday, May 04, 2009 of 49 +1.8V +DIMM_VREF +1.8V +0.9V RP32 DDR_B_D8 DDR_B_D9 DDR_B_DQS#1 DDR_B_DQS1 DDR_B_D10 DDR_B_D11 VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS DQ12 DQ13 VSS DM1 VSS CK0 CK0# VSS DQ14 DQ15 VSS 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 DDR_B_D4 DDR_B_D5 DDR_B_DM0 DDR_B_D6 DDR_B_D7 DDR_CS0_DIMMB# DDR_B_BS#1 DDR_B_MA2 DDR_B_MA0 C1007 DDR_B_D2 DDR_B_D3 VREF VSS DQ0 DQ1 VSS DQS0# DQS0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS C1006 DDR_B_DQS#0 DDR_B_DQS0 D 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 4.7U_0805_10V4Z JDIMM2 DDR_B_D0 DDR_B_D1 0.1U_0402_16V4Z +1.8V C1005 C1004 0.1U_0402_16V4Z 0.1U_0402_16V4Z C1009 C1008 0.1U_0402_16V4Z Structure> L 16.976V L >H 17.430V 2DC_IN_S2 DC_IN_S1 2 GND GND VIN PL1 SMB3025500YA_2P PJP1 C change footprint (refer to the JAL70) 03/05 B PC4 1000P_0402_50V7K ACES_88299-0600 PR1 1M_0402_1% N1 2 2 PR11 10K_0402_1% PC5 1000P_0402_50V7K RTCVREF VS 51ON# PC8 0.1U_0603_25V7K 2 PC7 0.22U_0603_25V7K PR14 22K_0402_1% 2 PR13 100K_0402_1% 1 PR10 68_1206_5% PR12 200_0603_5% CHGRTCP PD2 GLZ4.3B_LL34-2 - 1 PR8 10K_0402_1% + PR9 68_1206_5% PQ1 TP0610K-T1-E3_SOT23-3 N1 PU1A LM358DT_SO8 PR7 20K_0402_1% PD1 LL4148_LL34-2 PR6 22K_0402_5% PC6 0.1U_0603_25V7K PACIN PACIN P VIN PD3 LL4148_LL34-2 PR3 84.5K_0402_1% PR5 10K_0402_1% G PR4 @PR2 @ PR2 0_0402_5% 10K_0402_5% 2 ACIN VS ML1220T13RE BATT+ VIN VIN +RTCBATT +RTCBATT + 2 - PBJ1 PJ1 +3VALWP OUT IN N2 GND PC9 10U_0805_10V4Z +3VALW +0.9VP 1 +0.9V JUMP_43X79 PJ3 +5VALWP PJ4 1 +1.8VP +5VALW 2 JUMP_43X118 PC10 1U_0805_25V4Z +1.8V 1 JUMP_43X118 2 PJ2 JUMP_43X118 3.3V PR15 200_0603_5% PU2 G920AT24U_SOT89-3 PR17 560_0603_5% +CHGRTC PR16 560_0603_5% RTCVREF PJ5 3 +VSBP 1 +VSB Delete one of PJ6 for 1.8V jumper (0305) EVT JUMP_43X39 PJ8 PJ7 +RTCBATT PQ2 TP0610K-T1-E3_SOT23-3 PR19 470_0402_5% 2 1 +1.2VALW +1.5VSP @ JUMP_43X118 2 +1.5VS JUMP_43X79 AD_ON PR18 PD4 0_0402_5% 2 +1.2VALWP LL4148_LL34-2 PD14 LL4148_LL34-2 2 1 +NB_CORE +VGA_COREP JUMP_43X118 @ 2 +VGA_CORE JUMP_43X79 PQ3 TP0610K-T1-E3_SOT23-3 PJ10 PJ9 +NB_COREP PR20 100K_0402_1% 1 PR22 100K_0402_1% 2 +2.5VS Delete one VGA jumper (0306) EVT JUMP_43X79 PJ14 GA_ON/OFFBTN# @ PJ13 +1.1VSP PR23 0_0402_5% GA_ON/OFFBTN# 1 +2.5VSP 2 1 +1.1VS +NB_COREP @ @ JUMP_43X118 2 +NB_CORE JUMP_43X79 +3VLP S5 W/O WOL S5 W WOL AD_ON# H L S3/S0 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification L 2007/09/20 Deciphered Date 2008/09/20 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATICS,MB A5401 Rev A 401728 Date: A B C Monday, May 04, 2009 Sheet D 39 of 49 hexainf@hotmail.com PJ11 AD_ON# PD15 LL4148_LL34-2 A B C D 03/05 OK->add OLB to Library) PH1 under CPU botten side : CPU thermal protection at 93 degree C Recovery at 57 degree C 03/09 PJP1 mirror to correct location (update OK) VL VL VMB VL PR24 47K_0402_1% PR25 47K_0402_1% PR26 13.7K_0402_1% 2 + - PU3A LM393DG_SO8 PQ52 G LL4148_LL34-2 D S 2N7002W-T/R7_SOT323-3 PR29 100K_0402_1% VL ENTRIP1 D PQ51 G PR32 100K_0402_1% S 2N7002W-T/R7_SOT323-3 2 PR33 1K_0402_1% 1 PC15 1000P_0402_50V7K +3VLP PR30 15.4K_0402_1% PR31 @ 6.49K_0402_1% 1 PC14 0.22U_0603_16V7K 1 PR216 1K_0402_5% PR28 100_0402_1% 2 SUYIN_200275GR008G13GZR PR27 100_0402_1% PD5 O TM_REF1 PC13 0.01U_0402_25V7K P PC12 1000P_0402_50V7K ENTRIP2 1 PC11 0.1U_0603_25V7K PH1 100K_0603_1%_TH11-4H104FT G EC_SMDA TH EC_SMCA BATT+ PL2 SMB3025500YA_2P BATT_S1 PI 1 10 2 GND GND PJP2 2 BATT_TEMP PH2 near main Battery CONN : BAT thermal protection at 79 degree C Recovery at 47 degree C EC_SMB_CK1 EC_SMB_DA1 VL @ PR34 @PR34 47K_0402_1% @PR35 @ PR35 47K_0402_1% PQ5 TP0610K-T1-E3_SOT23-3 - @ PR39 @PR39 15.4K_0402_1% PU3B LM393DG_SO8 2 @ PC18 @PC18 0.22U_0603_16V7K @PD6 @ PD6 LL4148_LL34-2 P O + G TM_REF1 @ @PR37 @ PR37 13.7K_0402_1% 2 @ VL +VSBP PC17 0.1U_0603_25V7K 2 PR38 22K_0402_1% 2 VL 1 PR36 100K_0402_1% PC16 0.22U_1206_25V7K @PH2 @ PH2 100K_0603_1%_TH11-4H104FT B+ VL PQ6 G PR41 0_0402_5% D POK PC19 0.1U_0402_16V7K PR40 100K_0402_1% S 2N7002W-T/R7_SOT323-3 @ 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/09/20 Deciphered Date 2008/09/20 Title SCHEMATICS,MB A5401 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401728 Date: A B C Monday, May 04, 2009 Sheet D 40 of 49 B ACSET ACPRN 23 EN CSON 22 CELLS CSOP 21 ICOMP CSIN 20 VCOMP CSIP 19 ICM PHASE 18 VREF UGATE 17 CHLIM BOOT 16 10 ACLIM VDDP 15 2 02/26 EVT PL3 10UH_PCMB104T-100MS_6A_20% CHG VADJ LGATE 14 12 GND PGND 13 D 26251VDD PR68 4.7_0603_5% PC41 4.7U_0805_6.3V6K 3 PR70 18.2K_0402_1% VS PR71 340K_0402_1% PR73 499K_0402_1% 2 PR75 105K_0402_1% CV mode 4 12.60V Issued Date Compal Electronics, Inc Compal Secret Data Security Classification - 2007/09/20 Deciphered Date 2008/09/20 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: B C SCHEMATICS,MB A5401 Rev A 401728 Monday, May 04, 2009 Sheet D 41 of 49 hexainf@hotmail.com - + PC43 0.01U_0402_25V7K 2 PU1B LM358DT_SO8 P PR74 10K_0402_1% G BATT_OVP 1 Per cell=3.5V LI-3S :13.5V BATT-OVP=1.5012V PC42 0.01U_0402_25V7K PR72 31.6K_0402_1% IREF=0.43V~3.24V A PR60 0.02_2512_1% S IREF=0.7224*Icharge 12600mV ISL6251AHAZ-T_QSOP24 BATT-OVP=0.1112*VMB Normal 3S LI-ON Cells 2N7002W-T/R7_SOT323-3 Part Number is wrong with 18.2K Charging Voltage (0x15) BATT+ VMB CALIBRATE# BATT Type 1 DL_CHG PQ20 AO4466_SO8 11 PC24 2200P_0402_25V7K PC23 0.1U_0603_25V7K 2 PD11 RB751V-40TE17_SOD323-2 PACIN 2N7002W-T/R7_SOT323-3 G S PC36 0.1U_0603_25V7K BST_CHGA 6251VDDP PQ15D PQ18 AO4466_SO8 1 PQ22 G 20K_0402_1% PR69 6251aclim 11.5K_0402_1% CP mode Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) where Vaclm=1.502V, Iinput=4.07A 1 CSOP DH_CHG PR64 2.2_0603_5% BST_CHG PD10 1SS355TE-17_SOD323-2 CSON 6251VREF 65W/90W# CC=0.6~4.48A PR54 20_0402_5% PC30 0.047U_0603_16V7K PR55 20_0402_5% PR56 20_0402_5% PC33 0.1U_0603_25V7K PR58 2_0402_5% LX_CHG PR66 2 0.1U_0402_16V7K PR65 100K_0402_1% wrong Value PC28 0.1U_0603_25V7K 2 PC40 10U_1206_25V6M DCIN DCIN IREF 6251VREF PC35 PR63 80.6K_0402_1% 1 ACOFF PR59 100_0402_1% 2 PC34 @ 100P_0402_50V8J PQ13 PDTC115EU_SOT323 VDD 24 10K_0402_1% PR67 2.37K_0402_1% ACOFF PR57 ADP_I PR62 22K_0402_5% PACIN PQ21 PDTC115EU_SOT323 PC32 0.01U_0402_25V7K PC37 0.01U_0402_25V7K PACIN SUSP# PR61 4.7_1206_5% 6251_EN 6800P_0402_25V7K S ACON ACON D 2N7002W-T/R7_SOT323-3 PQ19 G SUSP# 2 PU4 PR49 200K_0402_1% VIN FSTCHG PR53 PC31 VIN PD7 1SS355TE-17_SOD323-2 ACOFF PR47 10K_0402_1% BAS40CW_SOT323-3 S FSTCHG 2 3S/4S# 2 PC27 0.1U_0402_16V7K 1 100K_0402_1% PR44 47K_0402_1% PC38 680P_0402_50V7K 100K_0402_1% 1 PR48 6251VDD PR50 10K_0402_5% 2 PQ11 PDTC115EU_SOT323 PD8 PQ17 PDTC115EU_SOT323 2N7002W-T/R7_SOT323-3 CSIN DCIN D PQ9 AO4407_SO8 1 PC25 0.1U_0603_25V7K PR51 150K_0402_1% JUMP_43X118 P3 PR52 47K_0402_5% 2 CSIP FSTCHG CHG_B+ PC22 10U_1206_25V6M PC21 5600P_0402_25V7K 4 PD9 1SS355TE-17_SOD323-2 6251VDD 47K PQ14 PDTC115EU_SOT323 PQ16 G PQ10 TP0610K-T1-E3_SOT23-3 PQ12 PDTA144EU_SOT323-3 47K PR45 200K_0402_1% PC20 10U_1206_25V6M PR43 47K_0402_1% B+ PJ15 1 PR42 0.02_2512_1% P3 PQ8 AO4407_SO8 VIN P2 B+ CP = 85%*Iada ; CP = 4.07A PR46 100K_0402_1% PQ7 AO4407_SO8 D PC39 10U_1206_25V6M ADP_I = 19.9*Iadapter*Rsense PC26 2.2U_0603_6.3V6K Iada=0~4.74A(90W/19V=4.736A) C PC29 0.1U_0603_25V7K A Frequency different RT8205C 300KHZ/375KHZ 2VREF_51125 TPS51125 245KHZ/305KHZ PC44 0.22U_0603_10V7K OCP calculation method different 3 S VL LG_5V D @ PC58 0.01U_0402_16V7K PR90 100K_0402_1% S PC49 10U_1206_25V6M + PC56 4.7U_0805_10V6K 2 VL 1 PR87 @ 0_0402_5% +5VALWP PC53 330U_D2E_6.3VM_R25M 1 PC89 1U_0603_10V6K TPS51125RGER_QFN24_4X4 PC55 PR85 680P_0603_50V7K 4.7_1206_5% VCLK 18 17 16 EN0 13 PR86 499K_0402_1% 02/27_EVT_change 7_7 PL5 8.2UH_PCMB063T-8R2MS_4.5A_20% PQ26 AO4712_SO8 (ME interference) S Note:Poscap (P/N:SGA*) 2N7002W-T/R7_SOT323-3 A Compal Electronics, Inc Compal Secret Data Security Classification 2007/11/12 Issued Date Deciphered Date 2008/11/12 Title SCHEMATICS,MB A5401 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Monday, May 04, 2009 Date: Rev A KAQB0 B +5VALWP Ipeak=7A ; Imax=4.9A;DCR=54m~60m ohm C(330U,ESR=25m ohm) Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Iocp=13.63~16.18A (Freq=245KHz) (Rtrip=226K) 2N7002W-T/R7_SOT323-3 +3.3VALWP Ipeak=5.6A ; Imax=3.92A ; DCR=54m~60m ohm C (330U,ESR=25m ohm) Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Iocp=11.41~13.58A (Freq=305KHz) (Rtrip=196K) PQ29 G 2 PR91 49.9K_0402_1% VS A LX_5V 19 D PR89 100K_0402_1% 20 DRVL1 ENTRIP2 1 LL1 DRVL2 PC57 0.1U_0603_25V7K 1 PQ28 2 2N7002W-T/R7_SOT323-3 G G LL2 12 2VREF_51125 PQ27D PC48 2200P_0402_50V7K ENTRIP1 11 B++ ENTRIP1 UG_5V B 21 GND B+ VFB1 22 DRVH1 VREG5 VBST1 DRVH2 VIN VBST2 PR88 100K_0402_1% (ME interference) MAINPWON POK 10 SKIPSEL LG_3V PQ25 AO4712_SO8 + PC54 680P_0603_50V7K 1 PC52 330U_D2E_6.3VM_R25M +3VALWP PR84 4.7_1206_5% PL4 8.2UH_PCMB063T-8R2MS_4.5A_20% 15 PR82 2 BST_3V 2.2_0603_1% PC50 UG_3V 0.1U_0402_16V7K LX_3V 24 23 PR83 PC51 2.2_0603_1% 0.1U_0402_16V7K BST_5V 2 02/27_EVT_ change 7_7 VO1 PGOOD VREG3 C PQ24 AO4466_SO8 VO2 B++ PR81 226K_0402_1% ENTRIP1 VREF P PAD VFB2 PU5 25 PQ23 AO4466_SO8 PC47 4.7U_0805_10V6K 2 PC46 10U_1206_25V6M C PR80 196K_0402_1% TONSEL +3VLP 1 PR79 19.1K_0402_1% ENTRIP2 PR78 20K_0402_1% PR77 30K_0402_1% JUMP_43X118 D Add pull high resistor to +3VLP on pin13 PR76 13K_0402_1% ENTRIP2 @ PC45 2200P_0402_50V7K B+ PJ16 TPS51125 (Rtrip*Itrip/9)-24mV GND pad need add via to ground 14 B++ RT8205C Rtrip*Itrip/10 D Sheet 42 of 49 A B C D Confirm :UMA (pop >o/p:adjustable) Discrete(unpop >o/p:fix) FB2_NB_COREP POWER_SEL ISL6228_B+ 1.1V OCSET_1.8V VO1 10 OCSET1 28 PR107 3.3K_0402_5% PR106 30K_0402_1% 11 EN1 OCSET2 25 12 PHASE1 EN2 24 1.1V_EN UGATE1 PHASE2 23 LX_1.1V BOOT1 UGATE2 22 UG_1.1V PU6 1 OCSET_1.1V 2 PC76 4.7U_1206_25V6K PR113 8.66K_0402_1% 1 +NB_COREP 1 PC84 1U_0402_6.3V6K PQ35 FDS6670AS_NL_SO8 D D D D G S S S +5VALW 2 1 PC83 1U_0402_6.3V6K BOOT2 PR116 PC81 0_0603_5% 0.1U_0402_16V7K BST_1.1V 2 +5VALW 1.8V_EN PC77 0.033U_0402_16V7K AO4466_SO8 PQ34 21 20 PVCC2 LGATE2 19 PGND2 PGND1 18 15 17 PC79 0.1U_0402_16V7K LGATE1 PVCC1 S S S PR114 0_0603_5% 1BST_1.8V14 PC74 4.7U_1206_25V6K ISL6228_B+ PR115 4.7_1206_5% PL7 1UH_PCMB103E-1R0MS_20A_20% + 13 16 +NB_COREP PR109 8.66K_0402_1% 1 2 6228_1.1VO2 26 PC69 1000P_0402_50V7K PR108 20K_0402_1% FB2_NB_COREP 27 D D D D G 2 1 R*C>1ms PGOOD2 PQ33 FDS6670AS_NL_SO8 UG_1.8V 0_0402_5% PR111 @PC61 @ PC61 0.1U_0402_16V7K 29 VO2 avoid ME interference SYSON PQ30 @ SSM3K7002F_SC59-3 S GND_T 1 LX_1.8V Vref=0.6V 1.8V_EN PC78 680P_0402_50V7K S PR100 22K_0402_1% FB2 PQ32 AO4466_SO8 PL6 1.8UH_1164AY-1R8N=P3_9.5A_30% PR112 4.7_1206_5% + PC75 330U_D2E_2.5VM D ISL6228_B+ ISL6228HRTZ-T_QFN28_4X4 1 D PC62 0.1U_0402_16V7K @ @ PQ31 SSM3K7002F_SC59-3 2 PR97 G @ 10K_0402_5% VIN2 FSET2 VCC2 VCC1 VIN1 FB1 change to big for efficiency +1.8VP PR94 @ 10K_0402_5% 2 G PC80 330U_D2E_2.5VM PC82 680P_0402_50V7K PC71 4.7U_1206_25V6K 2 PC70 4.7U_1206_25V6K ISL6228_B+ PR110 11K_0402_1% PR92 12K_0402_1% PR93 @ 10K_0402_1% 6228_1.8VO1 FSET1 FB_1.8V-1 PR105 22.6K_0402_1% PC72 22P_0402_50V8J @ LOW POWER_SEL PC64 0.1U_0603_25V7K PC68 1000P_0402_50V7K PR101 18.2K_0402_1% PR104 45.3K_0402_1% 2 PC66 1000P_0402_50V7K PR103 22.6K_0402_1% PGOOD1 PR102 3.3K_0402_5% 2 + PC67 1000P_0402_50V7K 1.0V R*C>1ms Avoid ME Interference (03/10) HIGH +5VALW PR99 10_0603_1% 1 PC65 68U_25V_M_R0.44 B+ PR98 10_0603_1% ISL6228_B+ PJ17 JUMP_43X118 2 1 PR96 2.2_0603_1% 1 2 PC63 0.1U_0603_25V7K PC60 1U_0402_6.3V6K +5VALW 1 PR95 2.2_0603_1% 1 PC59 1U_0402_6.3V6K 2 +5VALW avoid ME interference @PC73 @ PC73 0.01U_0402_25V7K LG_1.8V LG_1.1V VLDT_EN C(330U,ESR=15m ohm) 1.8VP Ipeak=9.023A, Imax=6.316A, Iocp=1.2*Ipeak=10.8276A Fsw=1/1.5E-10*18.2k =366K Vo=Vref*((PR97+PR99)/PR97) Roset=change to 11k ohm (remember) Csen=change to 0.022UF=22PF (remember) Iocp=11.282A C(330U,ESR=15m ohm) 1.8VP Ipeak=11.93A, Imax=8.351A, Iocp=1.2*Ipeak=14.316A Fsw=1/1.5E-10*22k =303K Vo=Vref*((PR97+PR99)/PR97) Roset=change to 8.66k ohm (remember) Csen=change to 0.033UF=33PF (remember) Iocp=20.619A 1.1V_EN @PC85 @PC85 0.1U_0402_16V7K Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/09/20 Deciphered Date 2008/09/20 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATICS,MB A5401 Rev A 401728 Date: A B C Monday, May 04, 2009 Sheet D 43 of 49 hexainf@hotmail.com DCR=3.5m ohm /tolerance :20%/(L=1uH ) PR117 0_0402_5% DCR=7.5m ohm /tolerance :30%/(L=1.8uH ) 1 D2 D2 G1 S1 DL_1.2V PGOOD 14 LX_1.2V TRIP 11 V5DRV 10 DRVL D 2.2UH +-20% FDV0630-2R2M=P3 7.2A PL8 +1.2VALWP + +5VALW PC92 330U_D2E_2.5VM DL_1.2V TPS51117RGYR_QFN14_3.5x3.5 DH_1.2V 12 VFB VFB=0.75V 13 LL VBST 15 TP EN_PSV V5FILT DRVH B+ PC93 4.7U_0805_10V6K PC95 1U_0603_10V6K BST_1.2V @ PC94 @PC94 47P_0402_50V8J VOUT PGND PR121 300_0603_5% TON Add pull down resistance GND PU7 1 @ PC90 @PC90 0.01U_0402_25V7K @ PR200 100K_0402_5% +5VALW G2 S2/D1 S2/D1 S2/D1 AO4932_SO8 PR120 PC91 0_0603_5% 0.1U_0603_25V7K 2BST_1.2V-1 PR122 10K_0402_1% POK PR119 0_0402_5% D PQ36 DH_1.2V PR118 200K_0402_5% 2 51117_B+ PJ18 JUMP_43X118 2 1 PC88 2200P_0402_25V7K PC87 4.7U_0805_25V6-K PC86 4.7U_0805_25V6-K PR123 6.34K_0402_1% +1.2VALW PR124 10K_0402_1% C +5VALW 2 PR126 1.15K_0402_1% PC98 FB VIN +1.1VSP VOUT APL5912-KAC-TRL_SO8 PC100 0.01U_0402_25V7K 22U_0805_6.3V6M VCNTL EN VIN VOUT @ PC99 @PC99 1U_0603_10V6K @ PR127 47K_0402_5% VLDT_EN VLDT_EN Ipeak=2.865A, Imax=2.0055A,1.2*Ipeak=3.438A Delta I=((19-1.2)*(1.2/19))/(L*Fsw)=2.589A =>1/2DeltaI=1.2945A Vtrip=Rtrip*10uA=10K*10uA=0.1V Iocp=4.938~6.568A PR125 0_0402_5% POK GND PU8 VFB=0.75V ; Rdson=15.8m ~ 19.6m ohm L(2.2U,DCR=21m ohm) ; C(330U,ESR=15 mohm) Vo=VFB*(1+PR116/PR117)=1.2V Fsw=274.6KHz PC97 4.7U_0805_6.3V6K PC96 1U_0402_6.3V6K 1 PJ19 JUMP_43X79 @ C PR128 3K_0402_1% pull down resistance B B PJ20 JUMP_43X79 1 +1.8V NC REFEN NC VOUT NC GND +3VALW VCNTL GND 2 PR129 1K_0402_1% PC101 4.7U_0603_6.3V6M VIN 2 PU9 PC102 1U_0402_6.3V6K S A +0.9VP PR131 1K_0402_1% D PC103 0.1U_0402_16V7K 1 PR130 2N7002W-T/R7_SOT323-3 0_0402_5% PQ37 2 G SYSON# RT9173DPSP_SO8 PC104 10U_0805_6.3V6M A PC105 0.1U_0402_16V7K 2007/09/20 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2008/09/20 Title SCHEMATICS,MB A5401 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401728 Date: Monday, May 04, 2009 Sheet 44 of 49 PR141 0_0402_5% 2 1 D2 D2 G1 S1 DL_1.5V PGOOD 14 DH_1.5V 12 LX_1.5V TRIP 11 V5DRV 10 VFB=0.75V +1.5VSP + +5VALW PC161 330U_D2E_2.5VM DL_1.5V TPS51117RGYR_QFN14_3.5x3.5 DRVL D 2.2UH +-20% FDV0630-2R2M=P3 7.2A PL14 13 LL VFB DRVH VBST V5FILT PGND VOUT GND TON BST_1.5V PR215 PC108 0_0603_5% 0.1U_0603_25V7K 2BST_1.5V-1 B+ PC159 4.7U_0805_10V6K PC106 1U_0603_10V6K @ PC109 @PC109 47P_0402_50V8J +5VALW PR213 300_0603_5% TP EN_PSV PU10 resistance 15 @ PC158 @PC158 0.01U_0402_25V7K VFB=0.75V ; Rdson=15.8m ~ 19.6m ohm L(2.2U,DCR= 21m ohm); C(330U,ESR=15m ohm) @ PR207 Vo=VFB*(1+PR116/PR117)=1.5V 100K_0402_5% Fsw=207.756KHz Ipeak=1A, Imax=0.7A,1.2*Ipeak=1.2A Delta I=((19-1.2)*(1.2/19))/(L*Fsw)=3.0227A =>1/2DeltaI=1.5113A Add pull down Vtrip=Rtrip*10uA=10K*10uA=0.1V Iocp=5.1556~6.7856A PR142 10K_0402_1% SUSP# G2 S2/D1 S2/D1 S2/D1 PJ21 JUMP_43X118 2 1 AO4932_SO8 D PQ45 DH_1.5V PR139 300K_0402_5% 2 1.5V_51117 PC160 2200P_0402_25V7K PC157 4.7U_0805_25V6-K PC110 4.7U_0805_25V6-K PR214 10K_0402_1% C C PR140 10K_0402_1% N1 PU11 APL5508-25DC-TRL_SOT89-3 LM393DG_SO8 B+ PR143 2.2M_0402_5% +2.5VSP 1 @ PR145 @PR145 150_1206_5% VL PC112 1U_0402_6.3V6K - P O G PC111 4.7U_0805_6.3V6K GND OUT IN +3VS PU12B + PR144 499K_0402_1% N1 PD13 PU12A + TP0610K-T1-E3_SOT23-3 PQ38 PR150 47K_0402_5% 2 2N7002W-T/R7_SOT323-3 G B B+ PR137 PR135 1K_1206_5% PR134 1K_1206_5% 100K_0402_5% LL4148_LL34-2 PR136 2 PQ41D 499K_0402_1% PR133 1K_1206_5% PD12 100K_0402_5% PR149 34K_0402_1% 2 PRG++ PR148 PC115 0.01U_0402_25V7K PR147 191K_0402_1% VIN PACIN RTCVREF PC113 0.1U_0603_25V7K LM393DG_SO8 2 BAS40CW_SOT323-3 - G O 32.4 ACON 1 PC114 1000P_0402_50V7K MAINPWON PR132 1K_1206_5% P B PR146 100K_0402_1% PQ40 PDTC115EU_SOT323 A A ACOFF Precharge detector Min typ Max H >L 14.589V 14.84V 15.243V L >H 15.562V 15.97V 16.388V PR138 100K_0402_5% PQ39 PDTC115EU_SOT323 ACIN +5VALW BATT ONLY Precharge detector Min typ Max H >L 6.138V 6.214V 6.359V L >H 7.196V 7.349V 7.505V 2007/09/20 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2008/09/20 Title SCHEMATICS,MB A5401 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401728 Date: Sheet Monday, May 04, 2009 45 of 49 hexainf@hotmail.com @ PR151 @PR151 66.5K_0402_1% 1 PQ42 PDTC115EU_SOT323 S 32 33 34 35 36 38 37 PC118 10U_1206_25V6M +CPU_CORE 22 10 VSEN BOOT2 21 41 GND PAD ISEN1 03/03_EVT CPU_ISEN2 +5VS 2 PR172 1_0402_5% PL11 1UH_FDV0630-1R0M-P3_10.3A_20% 2 Rn PC142 0.22U_0603_16V7K CPU_ISEN2 B PR187 10K_0402_1% 1 PR188 4.7_1206_5% PC141 1U_0402_6.3V6K LG_CPU2 PR191 1_0402_5% PQ47 AO4456_SO8 +CPU_CORE PR183 10_0402_5% PR185 10_0603_5% AO4466_SO8 PHASE_CPU2 VSUM PC143 0.01U_0402_50V7K 2 PH3 10K_0603_5%_TSM1A103J4302RE One phase :Ipeak=10A ; Imax=6A ; 1.2Ipeak=12A L(1U, DCR= 10m ohm) Rdson=4.5m ~ 5.6m ohm Rocset=13K ohm // Iocp=12.873A MLCC*9(22U,6.3V,X5R) ; Poscap*4(330U,ESR=9m ohm) Close to Phase1 Choke PL11 CPU_B+ 20 ISEN2 19 VDD GND 18 17 VSUM VIN 16 15 VO DFB 13 DROOP 12 PR176 2.2_0603_1% Rs UGATE2 C VCC_PRM VSUM PHASE2 VDIFF PC126 4.7U_0603_6.3V6K PR169 10K_0402_1% PC136 10U_1206_25V6M VID0 VID1 VID2 VID3 VID4 VID5 FB PR192 2.61K_0402_1% PC139 0.022U_0402_16V7K PC138 0.22U_0402_6.3V6K PC140 0.22U_0402_6.3V6K PR184 0_0402_5% PC119 68U_25V_M_R0.44 CPU_ISEN2 CPU_ISEN1 PC135 10U_1206_25V6M 23 PU13 ISL6264CRZ-T_QFN40_6X6 1 PR170 3.65K_0805_1% PR171 10K_0402_1% 24 COMP PR168 4.7_1206_5% PGND2 VW +5VS LGATE2 25 2 26 PC127 680P_0603_50V8J PVCC PC124 0.22U_0603_16V7K 2 LGATE1 LG_CPU1 PR173 0_0402_5% 1 28 27 B+ VCC_PRM CPU_VSS_SENSE 31 PGND1 PQ46 B 2 PR162 2.2_0603_1% PR153 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% PR159 PR160 PR155 PR156 PR157 PR161 29 PR189 3.65K_0805_1% PR190 10K_0402_1% OCSET PHASE1 PQ44 AO4456_SO8 PC144 680P_0603_50V8J SOFT PC133 180P_0402_50V8J PR180 PR181 1K_0402_1% 1.4K_0402_1% 1 @ @P PL10 1UH_FDV0630-1R0M-P3_10.3A_20% PC134 2200P_0402_50V7K OFS PR186 11K_0402_1% PR182 10_0402_5% + 30 PC132 0.22U_0603_25V7K from output Bulk Cap AO4466_SO8 RBIAS UGATE1 CPU_ISEN1 行 PR178 0_0402_5% 2 @PC131 @ PC131 0.068U_0402_16V7K PC137 C137 1000P_0402_50V7K +CPU_CORE PR179 10_0402_5% 1 03/03_EVT D B+ PQ43 PHASE_CPU1 @ @P CPU_VCC_SENSE PC120 0.22U_0603_25V7K UG_CPU1 BOOT1 SET VR_ON PSI_L PGOOD 11 PC129 1000P_0402_50V7K PC130 C130 1000P_0402_50V7K PR177 255_0402_1% 39 40 PC125 470P_0402_50V7K PC128 220P_0402_50V8J 2 PR174 97.6K_0402_1% PR175 1K_0402_1% 1 PR163 R163 10K_0402_5% PR154 1 PR158 10K_0402_5% PR165 150K_0402_1% PR164 36.5K_0402_1% PR167 4.02K_0402_1% PC123 0.047U_0402_16V7K @ @P CPU_B+ CPU_VID1 @ @P RTN C PR166 6.81K_0402_1% PC122 C122 1000P_0402_50V7K PC121 1000P_0402_50V7K VCC_PRM +3VS PL9 FBMA-L18-453215-900LMA90T_1812 CPU_VID2 CPU_VID0 0_0402_5% VGATE (ME interference /change to 6mm) CPU_VID3 PC117 10U_1206_25V6M D CPU_VID4 PC116 2200P_0402_50V7K PR152 10K_0402_5% CPU_VID5 0_0402_5% PSI_L +3VS VR_ON 14 CPU_ISEN1 VCC_PRM VSUM A A 2007/09/20 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2008/09/20 Title SCHEMATICS,MB A5401 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401728 Date: Monday, May 04, 2009 Sheet 46 of 49 PQ49 AO4466_SO8 UMA@ D D +3VS PJ22 JUMP_43X118 2 1 EN_PSV PR196 2.2_0603_5% TON VOUT V5FILT VFB 14 TP UMA@ DRVH 13 DH_VCORE LX_VCORE LL 12 TRIP 11 V5DRV 10 VFB=0.75V PL13 UMA@ +5VALW PC149 + 330U_V_2.5VM_R9M UMA@ 1 PC150 4.7U_0805_10V6K UMA@ TPS51117RGYR_QFN14_3.5x3.5 UMA@ PR198 7.5K_0402_1% PGND @ PC151 47P_0402_50V8J DRVL DL_VCORE C PC148 680P_0402_50V7K UMA@ UMA@ UMA@ PC153 1U_0603_10V6K PGOOD DL_VCORE PR197 4.7_1206_5% UMA@ PR199 UMA@ +VGA_COREP 02/27_EVT (high:0.95/low:0.9) 2K_0402_1% VFB VFB=0.75Volt Ipeak=6.52A, Imax=4.564A,1.2*Ipeak=7.824A Delta I=((19-1.2)*(1.2/19))/(L*Fsw)=4.8735A =>1/2DeltaI=2.4367A Vtrip=Rtrip*10uA=7.5K*10uA=0.075V Iocp=12.0031~16.0237A PR206 UMA@ 300_0402_5% +5VALW VFB=0.75V ; Rdson=4.6m ~ 5.6m ohm L(1U,DCR= 2.7~3.0m ohm); C(330 U,ESR= 9m ohm) Vo=VFB*(1+PR116/PR117)=0.95V Fsw=254.237KHz GND C +VGA_COREP 1UH_PCMB103E-1R0MS_20A_20% UMA@ PC147 0.1U_0603_25V7K 2BST_VCORE-1 1 BST_VCORE VBST PU14 EN_PSV PC146 0.1U_0402_16V7K UMA@ 15 100K_0402_1% UMA@ UMA@ change to AO4456 (EVT) 2 B+ PR193 VGA_ON B+_core PQ50 PC145 AO4456_SO8 4.7U_1206_25V6K UMA@ PR195 200K_0402_5% 2 PR194 10K_0402_5% @ UMA@ 30K_0402_1% PR202 1.Remember to change input cap from 4.7U*1 to 10U*2 2.change one of the M92-M2 XT +3VS Core Voltage Level 2N7002W-T/R7_SOT323-3 D G @ PR209 UMA@ 10K_0402_1% PC175 0.1U_0402_16V7K 02/27_EVT (high:0.95/low:0.9) S 10K_0402_1% 0.9V B PR210 UMA@ 10K_0402_5% PR208 UMA@ 10K_0402_1% 1 PQ48 UMA@ 0.95V UMA@ PR201 input cap from 4.7U*1 to 10U*1 3.C-test > change to input cap 10U*1 >10U*2 B VGA_PWRSEL +3VS PR204 UMA@ 10K_0402_5% S PR203 10K_0402_1% 2 G UMA@ VGA_PWRSEL D PQ53 UMA@ VGA_PWRSEL BOM control (R*C>1ms) (03/12) 2N7002W-T/R7_SOT323-3 PR205 @ 10K_0402_1% A A 2007/12/18 2008/12/18 Deciphered Date Title SCHEMATICS,MB A5401 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401728 Date: Sheet Monday, May 04, 2009 47 of 49 hexainf@hotmail.com Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Version change list (P.I.R List) Item D Reason for change PG# 0.1 50 Switch NB_core voltage 0.1 51 EMI requestmrnt 0.1 50 Add PR104 4.7 ohm and PC83 680p 2009/01/04 EMI requestmrnt 0.1 50 Add PR108 4.7 ohm and PC89 680p 2009/01/04 EMI requestmrnt 0.1 53 Add PR229 2.2 ohm 2009/01/04 DVT EMI requestmrnt 0.1 53 Add PR243 2.2 ohm 2009/01/04 DVT Change resistance value Switch NB_core voltage 0.1 50 Change PR95 from 51 Kohm to 39.2 Kohm 2009/01/04 DVT Change resistance value Switch NB_core voltage 0.1 50 Change PR122 from 12 Kohm to 226 Kohm 2009/01/04 DVT ADD circuit ADD circuit ADD snubber ADD snubber ADD CPU boot ADD CPU boot 10 11 Switch NB_core voltage Modify List Page of for PWR Rev C Fixed Issue ADD PC107, PC105, PR121, PR123, PR122, PR102, PQ25, PQ28 at UMA Sku ADD PC110, PC111, PC108, PC109, PC1113, PR1128, PR194, PR129, PR127 at UMA Sku Date 2009/01/04 Phase DVT D 2009/01/04 DVT DVT DVT C Change resistance value soft start of Switch NB_core voltage 0.1 50 Change PR123 from ohm to 10 Kohm 2009/01/04 DVT Change capacitor value soft start of Switch NB_core voltage 0.1 50 Change PC105 from 0.01 uF to o.1 uF 2009/01/04 DVT 0.1 48 Change PU4 part number to SA00002V400 2009/01/04 DVT Change IC part number Change IC part number 12 13 14 15 B B 16 17 18 19 20 21 22 A A 23 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/09/20 2008/09/20 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATICS,MB A5401 Rev A 401728 Date: Monday, May 04, 2009 Sheet 48 of 49 PHASE PVT Modification list P.29 Delete Q24 and modify ODD power circuit Modify ODD power circuit to follow up SUSP# Change L94~L97 to bead , delete C1184/C1193 Follow Realtek suggest P.37 Change SPDIF detec power +5VAMP to +5VS C466 Change to 10U P.33 Add R566 4/20 Add H34 4/21 Add LAN_DET function For FAN IO/B PLT_RST# change to JP21 For ESD Add R212 For VRAM ID 4/22 PURPOSE P.36 C45 D PAGE R567 for e-machine D For FAN Update USB footprint -FOX_UB511AC-RABA7-7F_4P-T C536 Change to 220U 4/23 Add C39 4/24 Change Lid SW power to +3VL C41 C778 C780 For ESD C B C For Discrete B CRT HDMI R285 VGA@ 150_0402_1% R141 VGA@ 499_0402_1% R137 VGA@ 499_0402_1% For E-Machine disable side port R281 R54 VGA@ 2.2K_0402_5% R46 VGA@ 2.2K_0402_5% R223 C640 1 HM@ HM@ ZZZ 3K_0402_5% PCB 06F LA-5401P REV0 M/B 0_0402_5% LA5401P MB Rev0: DA80000ET00 R149 VGA@ 499_0402_1% R145 VGA@ 499_0402_1% R155 VGA@ 499_0402_1% R152 VGA@ 499_0402_1% R158 VGA@ 499_0402_1% R157 VGA@ 499_0402_1% R406 C633 PCB HM@ LA5401P MB Rev1: DA80000ET10 0_0603_5% LA5401P MB with Sub/B Rev1: DAZ~ C662 1 VGA@ C667 C660 A C639 1 VGA@ VGA@ 2 8P_0402_50V8J 8P_0402_50V8J 8P_0402_50V8J Issued Date VGA@ Compal Electronics, Inc Compal Secret Data Security Classification 2008/10/06 Deciphered Date 2009/10/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATICS,MB A5401 Document Number Rev A 401728 Monday, May 04, 2009 Sheet 49 of 49 hexainf@hotmail.com A 2 VGA@ VGA@ 3.3P_0402_50V8J 3.3P_0402_50V8J 3.3P_0402_50V8J ... 100 P _04 02_50V8J KSI2 C453 100 P _04 02_50V8J KSO0 C433 100 P _04 02_50V8J KSO9 C442 100 P _04 02_50V8J KSI5 C456 100 P _04 02_50V8J KSI3 C454 100 P _04 02_50V8J KSI6 C457 100 P _04 02_50V8J KSO8 C441 100 P _04 02_50V8J... 100 P _04 02_50V8J KSI0 C451 100 P _04 02_50V8J KSO3 C436 100 P _04 02_50V8J KSO11 C444 100 P _04 02_50V8J KSI4 C455 100 P _04 02_50V8J KSO 10 C443 100 P _04 02_50V8J KSO2 C435 100 P _04 02_50V8J KSI1 C452 100 P _04 02_50V8J... 100 P _04 02_50V8J KSO7 C4 40 100 P _04 02_50V8J KSO14 C447 100 P _04 02_50V8J KSO6 C439 100 P _04 02_50V8J KSO13 C446 100 P _04 02_50V8J KSO5 C438 100 P _04 02_50V8J KSO12 C445 100 P _04 02_50V8J KSO4 C437 100 P _04 02_50V8J
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