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Acer aspire e5 571g compal LA b991p A5WAHA5WAB rev 1 0 схема

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A B C D E Compal Confidential Model Name : Z5WAH File Name : LA-B162P/LA-B991P 1 Compal Confidential 2 EA50_HB M/B Schematics Document Intel Broadwell ULT (Broadwell + Wildcat point) Nvidia N15S-GT / N15V-GM / N15V-GL 2013-12-24 3 REV:0.2 4 2013/09/11 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/09/24 Deciphered Date Cover Page Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D Z5WAH M/B LA-B162P Wednesday, January 08, 2014 Sheet E Rev 0.3 of 54 A B VGA eDP LVDS page 28 C D LVDS-Translator RTD2132R page 24 Fan Control page 36 page 25 204pin DDR3L-SO-DIMM X1 Memory BUS HDMI Conn DP to VGA ITE IT6513FN E eDP Intel Broadwell ULT BANK 0, 1, 2, Dual Channel 1.35V DDR3L 1333/1600 DP x lanes Processor HDMI x lanes OPI Nvidia N15x with DDR3 x4 or MINI Card WLAN USB port page 31 PCIe 2.0 x4 5GT/s port port PCIe 2.0 5GT/s in (SD) 6.0 Gb/s CMOS Camera SATA HDD Conn page 33 6.0 Gb/s port page 32 3.3V 24MHz Touch Screen HDA Codec 1168pin BGA page 04~14 LPC BUS page 32 CLK=24MHz ENE KB9012/9022 page 34 page 30 page 30 page 25 48MHz HD Audio SATA CDROM Conn page 33 (port 5) page 33 USB USBx8 RJ45 conn RTC CKT USB/B (port 1,2) Finger Print PCH page 29 Card Reader USB port USB port SATA3.0 port USB 2.0 conn x2 Wildcat point Flexible IO SATA3.0 port Realtek 8411B USB 3.0 conn x1 page 16 page 17~23 PCIe 2.0 5GT/s LAN(GbE)/ Card Reader BANK 4, 5, 6, Broadwell ULT DDI 204pin DDR3L-SO-DIMM X1 page 27 page 26 page 15 ALC283 SPI I2C (PORT1) USB (port 6) page 36 page 25 SPI ROM x2 Int Speaker page Int MIC Combo Jack page 36 page 36 page 36 Sub Board page Power On/Off CKT LS-B161P Touch Pad Int.KBD page 35 page 35 PS2 / I2C PWR/B page 33 page 35 LS-B162P DC/DC Interface CKT page 38 Power Circuit DC/DC USB/B (port 1,2) page 33 LS-B163P 2013/09/11 Issued Date BATT/B (UMA) Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2013/09/24 Title Date: A Block Diagrams THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC page 39~50 B C D Z5WAH M/B LA-B162P Wednesday, January 08, 2014 Sheet E Rev 0.3 of 54 A B C D Voltage Rails STATE S1 S3 S5 Adapter power supply (19V) N/A N/A N/A Power Plane VIN SIGNAL Description E SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock HIGH HIGH HIGH HIGH ON ON ON ON S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF Full ON BATT+ Battery power supply (12.6V) N/A N/A N/A B+ AC or battery power rail for power circuit N/A N/A N/A +CPU_CORE Core voltage for CPU ON OFF OFF +VGA_CORE Core voltage for GPU ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF +0.675VS +0.675VS power rail for DDR3L terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF +1.05VS_VTT +1.05V power rail for CPU ON OFF OFF +1.05VSDGPU +1.05VSDGPU switched power rail for GPU ON OFF OFF Board ID / SKU ID Table for AD channel +1.35V +1.35V power rail for DDR3L ON ON OFF +1.5VSDGPU +1.5VSDGPU power rail for GPU ON OFF OFF +1.5VS +1.5V power rail for CPU ON OFF OFF +3VALW +3VALW always on power rail ON ON ON* +3VLP B+ to +3VLP power rail for suspend power ON ON ON +3VS +3VALW to +3VS power rail ON OFF OFF +3VSDGPU +3VS to +3VSDGPU power rail for GPU ON OFF OFF +5VALW +5VALWP to +5VALW power rail ON ON ON* +5VS +5VALW to +5VS power rail ON OFF OFF +RTCVCC RTC power ON ON ON Vcc Ra/Rc/Re Board ID 10 11 12 13 Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF EC SM Bus1 address Device Address Smart Battery 0001 011X EC SM Bus2 address Device On Board Thermal Senser 3.3V +/- 5% 100K +/- 5% Rb / Rd / Rf 12K +/- 5% 15K +/- 5% 20K +/- 5% 27K +/- 5% 33K +/- 5% 43K +/- 5% 56K +/- 5% 75K +/- 5% 100K +/- 5% 130K +/- 5% 160K +/- 5% 200K +/- 5% 240K +/- 5% USB 2.0 0100 110x 0011 000x PCH SM Bus address Device EHCI1 Address ChannelA DIMM0 1010 0000 JDIMM1 ChannelB DIMM1 1010 0010 JDIMM2 V AD_BID typ V 0.354 V 0.430 V 0.550 V 0.702 V 0.819 V 0.992 V 1.185 V 1.414 V 1.650 V 1.865 V 2.031 V 2.200 V 2.329 V V AD_BID max V 0.360 V 0.438 V 0.559 V 0.713 V 0.831 V 1.006 V 1.200 V 1.430 V 1.667 V 1.881 V 2.046 V 2.215 V 2.343 V USB Port Table Address VGA Internal Thermal Senser 0100 000x G Senser V AD_BID V 0.347 V 0.423 V 0.541 V 0.691 V 0.807 V 0.978 V 1.169 V 1.398 V 1.634 V 1.849 V 2.015 V 2.185 V 2.316 V USB 3.0 XHCI BTO Option Table Port Port 3 External USB Port USB Port(Left 3.0) USB Port(Right 2.0) USB Port(Right 2.0) Mini Card (WLAN+BT) Touch Screen Camera Finger Print USB Port(Left 3.0) BOARD ID Table Board ID 2013/09/11 Issued Date PCB Revision 0.1 0.2 0.3 0.4 0.5 1.0 BTO Item Unpop Connector EC 9022 EC 9012 UMA Component GPU VRAM x 8pcs EDP panel eDP to LVDS EMC Component EMC Reserve On Board HDD G-Sensor TPM Module Redriver HDD Touch Screen DGPU_IDEN CPU_IDEN GC6 2.0 non GC6 One DMIC Two DMIC VRAM Selection BOM Structure @ CONN@ 9022@ 9012@ UMA@ VGA@ 128@ EDP@ LVDS@ EMC@ XEMC@ HDD@ BA@ BA@ BA@ TS@ VGL@, VGM@, SGT@ HW@, BW@ GC6@ NGC6@ EA50@ EA54@ X76@ Compal Electronics, Inc 2013/09/24 Deciphered Date Notes List Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C Compal Secret Data Security Classification D Z5WAH M/B LA-B162P Sheet Wednesday, January 08, 2014 E Rev 0.3 of 54 U1 U1 AAA1 CPU Haswell InteI I5-4200U 1.6G 4200@ CPU Haswell Intel I3-4010U 1.7G 4010@ PCB 154 LA-B162P REV0 M/B @ U1 U1 SA00006SMB0 SA00006SX70 DA60014P000 HASWELL_MCP_E U1A D CPU Haswell Intel I7-4500U 1.8G 4500@ SA00006SLB0 CPU_Haswell intel I3-4158U 2G 4158@ SA00006VW40 DP to CRT U1 HDMI C54 C55 B58 C58 B55 A55 A57 B57 CPU_DP1_N0 CPU_DP1_P0 CPU_DP1_N1 CPU_DP1_P1 CPU_Haswell intel I7-4550U 1.5G 4550@ SA00006SJ40 DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3 C51 C50 C53 B54 C49 B50 A53 B53 CPU_DP2_N0 CPU_DP2_P0 CPU_DP2_N1 CPU_DP2_P1 CPU_DP2_N2 CPU_DP2_P2 CPU_DP2_N3 CPU_DP2_P3 EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 DDI EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3 EDP DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3 EDP_AUXN EDP_AUXP EDP_RCOMP EDP_DISP_UTIL D C45 B46 A47 B47 EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 C47 C46 A49 B49 A45 B45 D20 A43 EDP_AUXN EDP_AUXP EDP_COMP R1 24.9_0402_1% +VCCIOA_OUT Trace width=20 mils,Spacing=25mil,Max length=100mils EDP_DISP_UTIL OF 19 eDP Panel Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ C C HASWELL_MCP_E U1B C94 XEMC@ +1.35V 2 C96 6.8P_0402_50V8C XEMC@ R68 62_0402_5% H_PROCHOT# R184 470_0603_5% DIMM_DRAMRST# @ @ 6.8P_0402_50V8C C60 XEMC@ 6.8P_0402_50V8C R11 R13 R41 DDR3 Compensation Signals Trace width=12~15 mil, Spcing=20 mils Max trace length= 500 mil 1 D61 K61 N62 R8 56_0402_5% H_PROCHOT#_R K63 C95 XEMC@ R6 B T20 T2 H_PECI +1.05VS_VTT 6.8P_0402_50V8C 10K_0402_5% H_CPUPWRGD C61 AU60 200_0402_1% SM_RCOMP0 AV60 120_0402_1% SM_RCOMP1 AU61 100_0402_1% SM_RCOMP2 DIMM_DRAMRST# AV15 DDR_PG_CTRL AV61 DDR_PG_CTRL PROC_DETECT CATERR PECI MISC PRDY PREQ PROC_TCK PROC_TMS PROC_TRST PROC_TDI PROC_TDO JTAG PROCHOT THERMAL PROCPWRGD PWR SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 SM_DRAMRST SM_PG_CNTL1 BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7 DDR3 J62 K62 E60 E61 E59 F63 F62 J60 H60 H61 H62 K59 H63 K60 J61 XDP_PRDY#_R XDP_PREQ#_R XDP_TCK_R XDP_TMS_R XDP_TRST#_R XDP_TDI_R XDP_TDO_R XDP_BPM#0_R XDP_BPM#1_R @ T148 @ T149 @ T150 @ T151 @ T152 @ T153 @ @ @ @ @ @ @ T157 T158 T159 T160 T161 T162 T163 @ @ T164 T165 B Close to AV15 OF 19 Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/09/11 Deciphered Date 2013/09/24 Title BDW MCP(1/11) DDI,MSIC,XDP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Z5WAH M/B LA-B162P Wednesday, January 08, 2014 Sheet Rev 0.3 of 54 D D U1C C B DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 AH63 AH62 AK63 AK62 AH61 AH60 AK61 AK60 AM63 AM62 AP63 AP62 AM61 AM60 AP61 AP60 AP58 AR58 AM57 AK57 AL58 AK58 AR57 AN57 AP55 AR55 AM54 AK54 AL55 AK55 AR54 AN54 AY58 AW58 AY56 AW56 AV58 AU58 AV56 AU56 AY54 AW54 AY52 AW52 AV54 AU54 AV52 AU52 AK40 AK42 AM43 AM45 AK45 AK43 AM40 AM42 AM46 AK46 AM49 AK49 AM48 AK48 AM51 AK51 HASWELL_MCP_E SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63 U1D SA_CLK#0 SA_CLK0 SA_CLK#1 SA_CLK1 SA_CKE0 SA_CKE1 SA_CKE2 SA_CKE3 SA_CS#0 SA_CS#1 SA_ODT0 SA_RAS SA_WE SA_CAS SA_BA0 SA_BA1 SA_BA2 DDR CHANNEL A SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15 SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7 SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7 SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1 AU37 AV37 AW36 AY36 SA_CLK_DDR#0 SA_CLK_DDR0 SA_CLK_DDR#1 SA_CLK_DDR1 AU43 AW43 AY42 AY43 AP33 AR32 AP32 DDRA_ODT0 @ AY34 AW34 AU34 AU35 AV35 AY41 DDRA_CKE0_DIMMA DDRA_CKE1_DIMMA DDRA_CS0_DIMMA# DDRA_CS1_DIMMA# DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 T4 DDR_A_RAS# DDR_A_WE# DDR_A_CAS# DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 AU36 DDR_A_MA0 AY37 DDR_A_MA1 AR38 DDR_A_MA2 AP36 DDR_A_MA3 AU39 DDR_A_MA4 AR36 DDR_A_MA5 AV40 DDR_A_MA6 AW39 DDR_A_MA7 AY39 DDR_A_MA8 AU40 DDR_A_MA9 AP35 DDR_A_MA10 AW41 DDR_A_MA11 AU41 DDR_A_MA12 AR35 DDR_A_MA13 AV42 DDR_A_MA14 AU42 DDR_A_MA15 AJ61 DDR_A_DQS#0 AN62 DDR_A_DQS#1 AM58 DDR_A_DQS#2 AM55 DDR_A_DQS#3 AV57 DDR_A_DQS#4 AV53 DDR_A_DQS#5 AL43 DDR_A_DQS#6 AL48 DDR_A_DQS#7 AJ62 DDR_A_DQS0 AN61 DDR_A_DQS1 AN58 DDR_A_DQS2 AN55 DDR_A_DQS3 AW57 DDR_A_DQS4 AW53 DDR_A_DQS5 AL42 DDR_A_DQS6 AL49 DDR_A_DQS7 AP49 AR51 AP51 SM_DIMM_VREFCA SA_DIMM_VREFDQ SB_DIMM_VREFDQ AY31 AW31 AY29 AW29 AV31 AU31 AV29 AU29 AY27 AW27 AY25 AW25 AV27 AU27 AV25 AU25 AM29 AK29 AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26 AM26 AK25 AL25 AY23 AW23 AY21 AW21 AV23 AU23 AV21 AU21 AY19 AW19 AY17 AW17 AV19 AU19 AV17 AU17 AR21 AR22 AL21 AM22 AN22 AP21 AK21 AK22 AN20 AR20 AK18 AL18 AK20 AM20 AR18 AP18 HASWELL_MCP_E SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63 AM38 AN38 AK38 AL38 SB_CK#0 SB_CK0 SB_CK#1 SB_CK1 AY49 AU50 AW49 AV50 SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3 AM32 AK32 SB_CS#0 SB_CS#1 AL32 DDRB_ODT0 SB_ODT0 AM35 AK35 AM33 SB_RAS SB_WE SB_CAS OF 19 DDRB_CS0_DIMMB# DDRB_CS1_DIMMB# @ T5 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 AP40 DDR_B_MA0 AR40 DDR_B_MA1 AP42 DDR_B_MA2 AR42 DDR_B_MA3 AR45 DDR_B_MA4 AP45 DDR_B_MA5 AW46 DDR_B_MA6 AY46 DDR_B_MA7 AY47 DDR_B_MA8 AU46 DDR_B_MA9 AK36 DDR_B_MA10 AV47 DDR_B_MA11 AU47 DDR_B_MA12 AK33 DDR_B_MA13 AR46 DDR_B_MA14 AP46 DDR_B_MA15 SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15 C AW30 DDR_B_DQS#0 AV26 DDR_B_DQS#1 AN28 DDR_B_DQS#2 AN25 DDR_B_DQS#3 AW22DDR_B_DQS#4 AV18 DDR_B_DQS#5 AN21 DDR_B_DQS#6 AN18 DDR_B_DQS#7 SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7 AV30 DDR_B_DQS0 AW26 DDR_B_DQS1 AM28 DDR_B_DQS2 AM25 DDR_B_DQS3 AV22 DDR_B_DQS4 AW18 DDR_B_DQS5 AM21 DDR_B_DQS6 AM18 DDR_B_DQS7 SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7 B DDR_B_D[0 63] DDR_B_MA[0 15] DDR_B_DQS#[0 7] DDR_A_D[0 63] DDRB_CKE0_DIMMB DDRB_CKE1_DIMMB DDR_B_RAS# DDR_B_WE# DDR_B_CAS# AL35 AM36 AU49 SB_BA0 SB_BA1 SB_BA2 DDR CHANNEL B SB_CLK_DDR#0 SB_CLK_DDR0 SB_CLK_DDR#1 SB_CLK_DDR1 DDR_B_DQS[0 7] DDR_A_MA[0 15] DDR_A_DQS#[0 7] DDR_A_DQS[0 7] OF 19 Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/09/11 Deciphered Date 2013/09/24 Title BDW MCP(2/11) DDRIII THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Z5WAH M/B LA-B162P Wednesday, January 08, 2014 Sheet Rev 0.3 of 54 PCH_RTCX1 R101 10M_0402_5% PCH_RTCX2 R69 20K_0402_1% 2 R70 20K_0402_1% C150 1U_0402_6.3V6K +RTCVCC PCH_INTVRMEN 1 R73 R74 330K_0402_5% 330K_0402_5% @ INTVRMEN * H:Integrated VRM enable L:Integrated VRM disable C HDA for AUDIO ME CMOS R122 HDA_SDOUT_AUDIO HDA_RST_AUDIO# HDA_SYNC_AUDIO HDA_BITCLK_AUDIO 0_0402_5% @ ME Debug RP14 EMC@ R72 JME1 SHORT PADS CMOS @ RTCRST close RAM door D S G EC_RTCRST# DVT modify 11/12 add Q19 for EC_RTCRST# pull low on EC side HDA_SDIN0 T6 trace width 10mil +CHGRTC D23 RTCX1 RTCX2 INTRUDER INTVRMEN SRTCRST RTCRST SATA_RN0/PERN6_L3 SATA_RP0/PERP6_L3 SATA_TN0/PETN6_L3 SATA_TP0/PETP6_L3 RTC SATA_RN1/PERN6_L2 SATA_RP1/PERP6_L2 SATA_TN1/PETN6_L2 SATA_TP1/PETP6_L2 Q52 L2N7002LT1G_SOT23-3 @ AW8 AV11 AU8 AY10 AU12 AU11 AW10 AV10 AY8 HDA_BIT_CLK HDA_SYNC HDA_RST# HDA_SDIN0 @ HDA_SDOUT @ @ @ HDA_BCLK/I2S0_SCLK HDA_SYNC/I2S0_SFRM HDA_RST/I2S_MCLK HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_SDO/I2S0_TXD HDA_DOCK_EN/I2S1_TXD HDA_DOCK_RST/I2S1_SFRM I2S1_SCLK AUDIO SATA_RN2/PERN6_L1 SATA_RP2/PERP6_L1 SATA_TN2/PETN6_L1 SATA_TP2/PETP6_L1 SATA SATA_RN3/PERN6_L0 SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0 SATA_TP3/PETP6_L0 HDA_SDOUT HDA_RST# HDA_SYNC HDA_BIT_CLK 51_0402_5% @ R97 T95 T21 T19 T15 T10 T11 T22 T12 +RTCBATT AW5 AY5 AU6 AV7 AV6 AU7 PCH_RTCX1 PCH_RTCX2 1M_0402_5% SM_INTRUDER# PCH_INTVRMEN PCH_SRTCRST# PCH_RTCRST# T7 T8 T9 33_0804_8P4R_5% W=20mils HASWELL_MCP_E U1E +RTCVCC HDA_SDO C149 1U_0402_6.3V6K +RTCVCC DVT modify 11/27 TXC recommend from 18P change to 15P 2 C154 1 C153 D 18P_0402_50V8J D 15P_0402_50V8J Y1 32.768KHZ_12.5PF_Q13FC135000040 PCH_JTAG_RST# @ PCH_JTAG_TCK @ PCH_JTAG_TDI @ PCH_JTAG_TDO @ PCH_JTAG_TMS @ @ @ PCH_TCK_JTAGX @ W=20mils AU62 AE62 AD61 AE61 AD62 AL11 AC4 AE63 AV2 SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37 PCH_TRST PCH_TCK PCH_TDI PCH_TDO PCH_TMS RSVD RSVD JTAGX RSVD SATA_IREF RSVD RSVD SATA_RCOMP SATALED JTAG J5 H5 B15 A15 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0 J8 H8 A17 B17 SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1 HDD ODD J6 H6 B14 C15 C F5 E5 C17 D17 V1 U1 V6 AC1 PCH_GPIO34 PCH_GPIO35 PCH_GPIO36 PCH_GPIO37 PCH_GPIO34 PCH_GPIO35 PCH_GPIO36 PCH_GPIO37 A12 SATA_IREF L11 @ T13 K10 @ T14 C12 SATA_RCOMP U3 R10 10K_0402_5% R75 R2 @ +1.05VS_ASATA3PLL 0_0603_5% 3.01K_0402_1% +3VS SATA_RCOMP, IREF Trace width=12~15 mil, Spcing=12 mils Max trace length= 500 mil OF 19 Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ +RTCVCC BAS40-04_SOT23-3 B B C151 0.1U_0402_16V4Z +RTCBATT R446 1K_0402_5% @ 20mil + +CHGRTC +RTCBATT +RTCBATT_R 20mil 2 D32 CHN202UPT_SC70-3 @ C168 0.1U_0402_16V4Z @ 1 - +RTCVCC JBATT1 LOTES_AAA-BAT-054-K01 CONN@ SP07000H700 A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/09/11 Deciphered Date 2013/09/24 Title BDW MCP(3/11) RTC,SATA,XDP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Z5WAH M/B LA-B162P Wednesday, January 08, 2014 Sheet Rev 0.3 of 54 HASWELL_MCP_E U1F PCH_GPIO18 C43 C42 U2 PCH_GPIO19 B41 A41 Y5 CLK_PCIE_LAN# CLK_PCIE_LAN 10K_0402_5% R52 C41 B42 AD1 CLK_PCIE_MINI1# CLK_PCIE_MINI1 MINI1_CLKREQ# B38 C37 N1 XTAL24_IN 1M_0402_5% R48 XTAL24_OUT Y2 24MHZ_12PF_X3G024000DC1H PCIE LAN C2 15P_0402_50V8J C3 15P_0402_50V8J 2 D PCH_GPIO18 DVT modify 11/27 TXC recommend from 10P change to 15P CLK_PCIE_LAN# CLK_PCIE_LAN +3VS LAN_CLKREQ# CLK_PCIE_MINI1# CLK_PCIE_MINI1 MINI1_CLKREQ# WLAN VGA PCH_GPIO19 A39 B39 U5 CLK_PEG_VGA# CLK_PEG_VGA VGA_CLKREQ# CLK_PEG_VGA# CLK_PEG_VGA B37 A37 T2 PCH_GPIO23 PCH_GPIO23 CLKOUT_PCIE_N0 CLKOUT_PCIE_P0 PCIECLKRQ0/GPIO18 A25 B25 XTAL24_IN XTAL24_OUT K21 @ M21 @ C26 RSVD RSVD DIFFCLK_BIASREF CLKOUT_PCIE_N1 CLKOUT_PCIE_P1 PCIECLKRQ1/GPIO19 CLKOUT_PCIE_N2 CLKOUT_PCIE_P2 PCIECLKRQ2/GPIO20 SIGNALS CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 PCIECLKRQ3/GPIO21 C35 C34 AK8 AL8 TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8 CLOCK B35 A35 T16 T17 XCLK_BIASREF R140 R141 R142 R148 AN15 AP15 CLKOUT_LPC_0 CLKOUT_LPC_1 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P CLKOUT_PCIE_N4 CLKOUT_PCIE_P4 PCIECLKRQ4/GPIO22 XTAL24_IN XTAL24_OUT 1 1 2 2 CLKOUT_LPC0 CLKOUT_LPC1 R78 3.01K_0402_1% +1.05VS_AXCK_LCPLL 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% EMC@ 22_0402_5% BA@ 22_0402_5% R390 R395 CLK_BCLK_ITP# CLK_BCLK_ITP D @ @ CLK_PCI_LPC CLK_PCI_TPM SML0CLK RP8 PCH_SMBCLK PCH_SMBDATA SML0DATA T184 T183 CLKOUT_PCIE_N5 CLKOUT_PCIE_P5 PCIECLKRQ5/GPIO23 OF 19 Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ HASWELL_MCP_E U1G LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# +3VS DGPU_PWR_EN L2N7002LT1G_SOT23-3 PCH_SPI_CLK AA3 Y7 PCH_SPI_CS0# Y4 PCH_SPI_CS1# AC2 PCH_SPI_MOSI AA2 PCH_SPI_MISO AA4 PCH_SPI_WP1# Y6 PCH_SPI_HOLD1# AF1 VGA_CLKREQ# PEG_CLKREQ# D R112 2.2K_0402_5% @ 2 R107 2.2K_0402_5% @ LAD0 LAD1 LAD2 LAD3 LFRAME SMBALERT/GPIO11 SMBCLK SMBDATA SML0ALERT/GPIO60 SMBUS SML0CLK SML0DATA SML1ALERT/PCHHOT/GPIO73 SML1CLK/GPIO75 SML1DATA/GPIO74 LPC SPI_CLK SPI_CS0 SPI_CS1 SPI_CS2 SPI_MOSI SPI_MISO SPI_IO2 SPI_IO3 SPI CL_CLK CL_DATA CL_RST C-LINK OF 19 HASWELL-MCP-E-ULT_BGA1168 @ AN2 AP2 AH1 AL2 AN1 AK1 AU4 AU3 AH3 AF2 AD2 AF4 PCH_GPIO11 PCH_SMBCLK PCH_SMBDATA PCH_GPIO60 SML0CLK SML0DATA PCH_GPIO73 SML1CLK SML1DATA @ @ @ PCH_GPIO11 PCH_SMBCLK PCH_SMBDATA PCH_GPIO60 PCH_GPIO73 +3VALW_PCH T23 T24 T25 SML1CLK SML1DATA R114 R113 2.2K_0804_8P4R_5% C 2.2K_0402_5% 2.2K_0402_5% Rev1p2 for Share EC ROM, +3VS change to +3VALW +3V_SPI PCH_SPI_IO2_1 PCH_SPI_IO3_1 +3V_SPI +3V_SPI +3V_SPI PCH_SPI_CS0# PCH_SPI_MISO_1 PCH_SPI_IO2_1 CS# VCC DO(IO1) HOLD#(IO3) WP#(IO2) CLK GND DI(IO0) B +3VS +3VS PCH_SPI_MISO_1 PCH_SPI_IO3_1 PCH_SPI_CLK_1 PCH_SPI_MOSI_1 0.1U_0402_16V4Z PCH_SPI_IO3_1 PCH_SPI_CLK_1 PCH_SPI_MOSI_1 EN25QH64-104HIP_SO8 RP19 U6 +3VALW +3VS C66 R108 15_0402_5% @ SPI ROM ( 8MByte ) 2ROM pop PCH_SPI_WP1# PCH_SPI_MISO PCH_SPI_HOLD1# PCH_SPI_CLK PCH_SPI_MOSI SPI ROM Q7A DMN66D0LDW-7_SOT363-6 R116 4.7K_0402_5% PCH_SMBDATA 15_0804_8P4R_5% PCH_SPI_MOSI_1 R498 PCH_SPI_CLK_1 R500 PCH_SPI_MISO_1 R502 PCH_SPI_CS0# R505 PCH_SPI_CLK_1 XEMC@ 33_0402_5% 1 1 2 2 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% R119 4.7K_0402_5% D_CK_SDATA PCH_SMBCLK Reserve for EMI(Near SPI ROM) C152 10P_0402_50V8J 2 R104 XEMC@ PCH_SPI_HOLD1# PCH_SPI_WP1# 1K_0402_5% 1K_0402_5% R103 @ R102 @ R126 0_0402_5% R123 0_0402_5% 2 1K_0402_5% 1K_0402_5% D_CK_SDATA EC_SPI_SO EC_SPI_CLK EC_SPI_SI EC_SPI_CS# From EC (For share ROM) DDR, G‐sensor D_CK_SCLK D_CK_SCLK Q7B DMN66D0LDW-7_SOT363-6 +3VS DVT modify 11/15 pop share rom Q8A DMN66D0LDW-7_SOT363-6 PU 2.2K at EC side (+3VS) EC_SMB_CK2 EC_SMB_DA2 SML1CLK SPI ROM ( 4MByte ) 2ROM pop PCH_SPI_WP1# @ R109 PCH_SPI_CS1# PCH_SPI_MISO_2 PCH_SPI_IO2_2 33_0402_5% U7 CS# DO WP# GND VCC HOLD# CLK DI VGA, EC +3V_SPI C67 @ 0.1U_0402_16V4Z PCH_SPI_IO3_2 PCH_SPI_CLK_2 PCH_SPI_MOSI_2 PCH_SPI_MOSI_2 PCH_SPI_CLK_2 PCH_SPI_IO3_2 PCH_SPI_MISO_2 RP20 B R105 R106 S Pull high @ VGA side C R115 10K_0402_5% VGA@ Q2 G AU14 LPC_AD0 AW12 LPC_AD1 AY12 LPC_AD2 AW11 LPC_AD3 LPC_FRAME# AV12 SML1DATA PCH_SPI_MOSI PCH_SPI_CLK PCH_SPI_HOLD1# PCH_SPI_MISO 33_0804_8P4R_5% @ Q8B DMN66D0LDW-7_SOT363-6 EN25QH32-104HIP_SO8 @ A A 2ROM is SPI ROM 2M + 4M Byte 2ROM U6 RP19 R108 POP EN25QH16-104HIP_SO8 (SA00004UG00) - 33_0804_8P4R_5% (SD309330A80) - 33_0402_5% (SD028330A80) Reserve for EMI(Near SPI ROM) C453 10P_0402_50V8J 2 R402 XEMC@ PCH_SPI_CLK_2 XEMC@ 33_0402_5% Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/09/11 Deciphered Date 2013/09/24 Title BDW MCP(4/11) CLK,SPI,SMBUS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Z5WAH M/B LA-B162P Sheet Wednesday, January 08, 2014 Rev 0.3 of 54 1 +3VS R227 10K_0402_5% DSWODVREN ‐ On Die DSW VR Enable * H:Enable(DEFAULT) L:Disable SYS_RESET# D C513 0.01U_0402_16V7K XEMC@ SUSWARN# SYS_PWROK R61 R62 PCH_PWROK R63 VCCST_PG_EC place near AC3 10K_0402_5% @ 1 @ @ PCH_PWROK_R R117 PCH_RSMRST# SUSACK# SYS_RESET# 0_0402_5% SYS_PWROK_R 0_0402_5% PCH_PWROK_R 0_0402_5% PM_APWROK R64 @ R110 @ R79 PCH_RSMRST# SUSWARN# PBTN_OUT# +3VALW_PCH R156 R124 R125 @ 330K_0402_5% 330K_0402_5% AK2 AC3 AG2 AY7 AB5 AG7 0_0402_5% PLT_RST# 0_0402_5% PCH_RSMRST#_R SUSWARN# 0_0402_5% PBTN_OUT#_R PCH_ACIN 8.2K_0402_5% PCH_BATLOW# T31 @ AW6 AV4 AL7 AJ8 AN4 AF3 AM5 SUSACK SYS_RESET SYS_PWROK PCH_PWROK APWROK PLTRST AW7 AV5 AJ5 DSWVRMEN DPWROK WAKE V5 AG4 AE6 AP5 CLKRUN/GPIO32 SUS_STAT/GPIO61 SUSCLK/GPIO62 SLP_S5/GPIO63 RSMRST SUSWARN/SUSPWRDNACK/GPIO30 PWRBTN ACPRESENT/GPIO31 BATLOW/GPIO72 SLP_S0 SLP_WLAN/GPIO29 DSWODVREN PCH_RSMRST#_R PCH_PCIE_WAKE# R120 1K_0402_5% R157 8.2K_0402_5% CLKRUN# LPCPD# SUSCLK R127 @ PM_SLP_S5# 10K_0402_5% @ T27 @ T28 PM_SLP_S4# PM_SLP_S3# @ T30 @ T96 PM_SLP_LAN# R118 @ 10K_0402_5% AJ6 AT4 AL5 AP4 AJ7 SLP_S4 SLP_S3 SLP_A SLP_SUS SLP_LAN +3VALW_PCH R245 100K_0402_5% @ @ D21 OF 19 ACIN PCH_PCIE_WAKE# +3VALW_PCH +3VS CLKRUN# LPCPD# @ PM_SLP_S5# PM_SLP_S4# PM_SLP_S3# T29 +3VALW_PCH not support Deep S4,S5 can NC Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ D SYSTEM POWER MANAGEMENT R206 0_0402_5% PLT_RST# +RTCVCC HASWELL_MCP_E U1H PCH_ACIN Note: Deep Sx need use EC GPIO for  ACPRESENT function RB751V-40 SOD-323 1 VGATE_3V A Y R65 0_0402_5% SYS_PWROK U43 MC74VHC1G08DFT2G_SC70-5 @ PCH_PWROK DDPC_CTRLDATA: Port C Detected * R207 10K_0402_5% @ 1: Port B or C is detected 0: Port B or C is not detected (Have internal PD) 2 R208 10K_0402_5% C DDPB_CTRLDATA: Port B Detected B G PCH_PWROK P +3VS C HASWELL_MCP_E U1I +3VS +3VS VGATE NC VCC A Y GND R310 10K_0402_5% @ VGATE_3V U17 +1.05VS_VTT VGATE_3V 74AUP1G07GW_TSSOP5 @ GC6_FB_EN GC6_FB_EN DGPU_PWR_EN DGPU_HOLD_RST# B RP27 G_SEN_INT PCH_GPIO80 MINI1_CLKREQ# DEVSLP0 10K_0804_8P4R_5% R2057 0_0402_5% GC6@ PCH_GPIO77 DGPU_PWR_EN DGPU_HOLD_RST# PCH_GPIO80 T26 @ TP_INT# G_SEN_INT +3VS B8 A9 C6 PCH_INV_PWM ENBKL PCH_ENVDD PCH_GPIO51 TP_INT# G_SEN_INT Project_ID1 PCH_GPIO51 Project_ID0 U6 P4 N4 N2 AD4 U7 L1 L3 R5 L4 EDP_BKLCTL EDP_BKLEN EDP_VDDEN PIRQA/GPIO77 PIRQB/GPIO78 PIRQC/GPIO79 PIRQD/GPIO80 PME DDPB_CTRLCLK DDPB_CTRLDATA DDPC_CTRLCLK DDPC_CTRLDATA eDP SIDEBAND DDPB_AUXN DDPC_AUXN DDPB_AUXP DDPC_AUXP DISPLAY GPIO GPIO55 GPIO52 GPIO54 GPIO51 GPIO53 DDPB_HPD DDPC_HPD EDP_HPD OF 19 MINI1_CLKREQ# DEVSLP0 B9 C9 2.2K_0402_5% R271 D9 DDI2_CTRL_CK DDI2_CTRL_CK D11 DDI2_CTRL_DATA DDI2_CTRL_DATA C5 B6 B5 A6 DDI1_AUX_DN DDI1_AUX_DP DDI1_AUX_DN DDI1_AUX_DP C8 A8 D6 CPU_DP_HPD CPU_HDMI_HPD CPU_EDP_HPD B Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ +3VS R210 NGC6@ PCH_GPIO77 10K_0402_5% *Z5WAH Z5W1H Z5WBH Reserved Project_ID1 Project_ID0 GPIO54 GPIO53 0 1 1 Y PLT_RST_BUF# R416 100K_0402_5% Project ID A MC74VHC1G08DFT2G_SC70-5 G U30 B 1 R215 10K_0402_5% EA50@ 2 Project_ID0 R214 10K_0402_5% Project_ID1 A R204 10K_0402_5% EA54@ R205 10K_0402_5% @ PLT_RST# +3VS +3VS P +3VS A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/09/11 Deciphered Date 2013/09/24 Title BDW MCP(5/11) PM,GPIO,DDI THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Z5WAH M/B LA-B162P Wednesday, January 08, 2014 Sheet Rev 0.3 of 54 +3VS RP28 RP29 RP30 RP31 RP32 PCH_GPIO67 PCH_GPIO65 DGPU_HOLD_RST# PCH_GPIO64 10K_0804_8P4R_5% PCH_GPIO84 PCH_GPIO3 PCH_GPIO89 10K_0804_8P4R_5% PCH_GPIO17 PCH_GPIO23 PCH_GPIO76 10K_0804_8P4R_5% NGC6@ R216 RP36 PCH_GPIO51 DGPU_PWR_EN EC_SMI#_SCI# PCH_GPIO85 PCH_GPIO92 PCH_GPIO88 10K_0804_8P4R_5% +1.05VS_VTT D U1J HASWELL_MCP_E PCH_GPIO19 PCH_GPIO36 TP_INT# PCH_GPIO18 PCH_GPIO35 PCH_GPIO34 PCH_GPIO37 EC_LID_OUT# DGPU_HOLD_RST# PCH_GPIO23 DGPU_AC_DETECT DGPU_AC_DETECT GPU_EVENT# PCH_GPIO70 R71 0_0402_5% @ TS_INT# P1 PCH_GPIO76 PCH_GPIO8 AU2 AM7 AD6 EC_LID_OUT# Y1 PCH_GPIO16 T3 PCH_GPIO17 PCH_GPIO24 AD5 AN5 CPU_IDEN PCH_GPIO28 AD7 DGPU_IDEN AN3 PCH_GPIO56 AG6 PCH_GPIO57 AP1 PCH_GPIO58 AL4 PCH_GPIO59 AT5 PCH_GPIO44 AK4 PCH_GPIO47 AB6 PCH_GPU_ACINU4 DGPU_PRSNT# Y3 P3 TS_INT# Y2 PCH_GPIO71 PCH_GPIO13 AT3 PCH_GPIO14 AH4 PCH_GPIO25 AM4 PCH_GPIO45 AG5 PCH_GPIO46 AG3 PCH_GPIO9 AM3 PCH_GPIO10 AM2 P2 DEVSLP0 DEVSLP0 PCH_GPIO70 C4 GPU_EVENT# L2 R2058 GC6@ 0_0402_5% PCH_GPIO38 N5 EC_SMI#_SCI# EC_SMI#_SCI# V2 PCH_SPKR PCH_SPKR BMBUSY/GPIO76 GPIO8 LAN_PHY_PWR_CTRL/GPIO12 GPIO15 GPIO16 GPIO17 GPIO24 GPIO27 GPIO28 GPIO26 GPIO56 GPIO57 GPIO58 GPIO59 GPIO44 GPIO47 GPIO48 GPIO49 GPIO50 HSIOPC/GPIO71 GPIO13 GPIO14 GPIO25 GPIO45 GPIO46 THERMTRIP RCIN/GPIO82 SERIRQ PCH_OPI_RCOMP RSVD RSVD CPU/ MISC GSPI0_CS/GPIO83 GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86 GSPI1_CS/GPIO87 GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89 GSPI_MOSI/GPIO90 UART0_RXD/GPIO91 UART0_TXD/GPIO92 UART0_RTS/GPIO93 UART0_CTS/GPIO94 UART1_RXD/GPIO0 UART1_TXD/GPIO1 UART1_RST/GPIO2 UART1_CTS/GPIO3 I2C0_SDA/GPIO4 I2C0_SCL/GPIO5 I2C1_SDA/GPIO6 I2C1_SCL/GPIO7 SDIO_CLK/GPIO64 SDIO_CMD/GPIO65 SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69 GPIO LPIO GPIO9 GPIO10 DEVSLP0/GPIO33 SDIO_POWER_EN/GPIO70 DEVSLP1/GPIO38 DEVSLP2/GPIO39 SPKR/GPIO81 +3VALW_PCH 10K_0402_5% 10 OF 19 8 RP37 RP38 RP39 RP40 RP34 RP35 PCH_GPIO10 PCH_GPIO11 PCH_GPIO57 PCH_GPIO13 10K_0804_8P4R_5% USB_OC1# PCH_GPIO8 PCH_GPIO73 SUSWARN# 10K_0804_8P4R_5% PCH_GPIO46 PCH_GPIO42 PCH_GPIO14 PCH_GPIO60 10K_0804_8P4R_5% PCH_GPIO28 PCH_GPIO47 PCH_GPIO45 PCH_GPIO24 10K_0804_8P4R_5% PCH_GPIO43 PCH_GPIO59 PCH_GPIO25 PCH_GPIO58 10K_0804_8P4R_5% USB_OC0# PCH_GPIO56 PCH_GPIO44 PCH_GPIO9 10K_0804_8P4R_5% D60 V4 T4 AW15 AF20 AB21 R6 L6 N6 L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4 F2 F3 G4 F1 E3 F4 D3 E4 C3 E2 R144 1K_0402_5% H_THERMTRIP# @ @ SERIRQ PCH_OPIRCOMP T106 T32 EC_KBRST# SERIRQ R145 49.9_0402_1% PCH_GPIO83 PCH_GPIO84 PCH_GPIO85 PCH_GPIO86 PCH_GPIO87 PCH_GPIO88 PCH_GPIO89 PCH_GPIO90 PCH_GPIO91 PCH_GPIO92 PCH_GPIO93 PCH_GPIO94 PCH_GPIO0 PCH_GPIO1 R275 PCH_GPIO2 2.2K_0402_5% PCH_GPIO3 PCH_GPIO4 PCH_GPIO5 +3VS RP16 PCH_GPIO87 PCH_GPIO51 DGPU_PWR_EN PCH_GPIO83 10K_0804_8P4R_5% PCH_GPIO68 PCH_GPIO69 PCH_GPIO5 PCH_GPIO4 10K_0804_8P4R_5% PCH_GPIO1 PCH_GPIO94 PCH_GPIO93 PCH_GPIO2 10K_0804_8P4R_5% PCH_GPIO91 PCH_GPIO0 PCH_GPIO90 PCH_GPIO38 10K_0804_8P4R_5% PCH_GPIO19 PCH_GPIO36 TP_INT# SERIRQ 10K_0804_8P4R_5% PCH_GPIO18 PCH_GPIO35 PCH_GPU_ACIN PCH_GPIO34 10K_0804_8P4R_5% PCH_GPIO71 PCH_GPIO16 EC_KBRST# PCH_GPIO37 10K_0804_8P4R_5% RP25 RP26 B R274 2.2K_0402_5% RP24 C RP23 D +3VS C PCH_I2C1_SDA PCH_I2C1_SCL PCH_GPIO64 PCH_GPIO65 PCH_GPIO66 PCH_GPIO67 PCH_GPIO68 PCH_GPIO69 Touch Pad, Touch Screen Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ PCH_GPIO11 USB_OC1# PCH_GPIO73 SUSWARN# PCH_GPIO42 PCH_GPIO60 +3VALW_PCH +3VS R247 @ R269 10K_0402_5% USB_OC0# 1: Intel ME TLS with confidentiality * 1K_0402_5% PCH_SPKR SPKR / GPIO81 :  NO  REBOOT GPIO15 : TLS Confidentiality PCH_GPIO43 @ EC_LID_OUT# B 1: ENABLED * 0: Intel ME TLS with no confidentiality (Have internal PD) 0: DISABLED (Have internal PD) +3VS PCH_GPIO86 R272 R273 @ PCH_GPIO66 1K_0402_5% 1K_0402_5% R270 @ 1K_0402_5% +3VS R306 10K_0402_5% UMA@ * 2 DGPU_PRSNT# R219 10K_0402_5% VGA@ DIS,Optimus UMA 1: ENABLED 1: ENABLED GPIO49 DGPU_PRSNT# 0: SPI ROM * (Have internal PD) 0: DISABLED (Have internal PD) 1 +3VALW_PCH A +3VALW_PCH GPIO26 DGPU_IDEN R312 10K_0402_5% BW@ R311 10K_0402_5% VGM@ CPU INFO 2 N15V-GL N15V-GM GPIO27 CPU_IDEN VGA INFO R220 10K_0402_5% VGL@ R221 10K_0402_5% HW@ Haswell Boradwell A SDIO_D0 / GPIO66 : Top‐Block Swap Override GSPI0_MOSI / GPIO86 : Boot BIOS Strap  Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/09/11 Deciphered Date 2013/09/24 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: BDW MCP(6/11) GPIO,LPIO Z5WAH M/B LA-B162P Wednesday, January 08, 2014 Sheet Rev 0.3 of 54 D D HASWELL_MCP_E U1K C76 C77 1 VGA@ 0.22U_0402_10V6K VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_N0 F10 PEG_GTX_C_HRX_P0 E10 PEG_HTX_C_GRX_N0 C78 PEG_HTX_C_GRX_P0 C79 1 VGA@ 0.22U_0402_10V6K VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_N0 PEG_HTX_GRX_P0 PEG_GTX_HRX_N1 PEG_GTX_HRX_P1 C80 C81 1 VGA@ 0.22U_0402_10V6K VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_N1 F8 PEG_GTX_C_HRX_P1 E8 PEG_HTX_C_GRX_N1 C82 PEG_HTX_C_GRX_P1 C83 1 VGA@ 0.22U_0402_10V6K VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_N1 PEG_HTX_GRX_P1 PEG_GTX_HRX_N2 PEG_GTX_HRX_P2 PEG_GTX_HRX_N0 PEG_GTX_HRX_P0 VGA C PCIE LAN WLAN C84 C85 1 VGA@ 0.22U_0402_10V6K VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_N2H10 PEG_GTX_C_HRX_P2G10 1 VGA@ 0.22U_0402_10V6K VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_N2 PEG_HTX_GRX_P2 PEG_GTX_HRX_N3 PEG_GTX_HRX_P3 C88 C89 1 VGA@ 0.22U_0402_10V6K VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_N3 E6 PEG_GTX_C_HRX_P3 F6 PEG_HTX_C_GRX_N3 C90 PEG_HTX_C_GRX_P3 C91 1 VGA@ 0.22U_0402_10V6K VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_N3 PEG_HTX_GRX_P3 B22 A21 PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 G11 F11 PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3 C29 B30 PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 F13 G13 PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4 B29 A29 PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 PCIE_PTX_C_DRX_N3 PCIE_PTX_C_DRX_P3 B23 A23 PEG_HTX_C_GRX_N2 C86 PEG_HTX_C_GRX_P2 C87 C23 C22 1 C155 C160 0.1U_0402_16V7K 0.1U_0402_16V7K PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 1 C156 C157 PCIE_PTX_C_DRX_N4 PCIE_PTX_C_DRX_P4 0.1U_0402_16V7K 0.1U_0402_16V7K B21 C21 G17 F17 PEG_GTX_HRX_N[0 3] PEG_GTX_HRX_P[0 3] PEG_HTX_C_GRX_N[0 3] PEG_HTX_C_GRX_P[0 3] C30 C31 F15 G15 B31 A31 PERN5_L0 PERP5_L0 USB2N0 USB2P0 PETN5_L0 PETP5_L0 USB2N1 USB2P1 PERN5_L1 PERP5_L1 USB2N2 USB2P2 PETN5_L1 PETP5_L1 USB2N3 USB2P3 PERN5_L2 PERP5_L2 USB2N4 USB2P4 PETN5_L2 PETP5_L2 USB2N5 USB2P5 PERN5_L3 PERP5_L3 USB2N6 USB2P6 PETN5_L3 PETP5_L3 USB2N7 USB2P7 PERN3 PERP3 PETN3 PETP3 USB3.0 P1 USB PCIe USB3.0 P2 PETN1/USB3TN3 PETP1/USB3TP3 PERN2/USB3RN4 PERP2/USB3RP4 R232 R155 1 @ 3.01K_0402_1% 0_0603_5% @ E15 @ E13 A27 B27 USB3RN2 USB3RP2 USB3TN2 USB3TP2 PERN1/USB3RN3 PERP1/USB3RP3 USB3.0 P3 / PCIE P1 USB3.0 P4 / PCIE P2 USBRBIAS USBRBIAS RSVD RSVD PETN2/USB3TN4 PETP2/USB3TP4 OC0/GPIO40 OC1/GPIO41 OC2/GPIO42 OC3/GPIO43 +1.05VS_AUSB3PLL T33 T34 PCIE_RCOMP PCIE_IREF USB3TN1 USB3TP1 PERN4 PERP4 PETN4 PETP4 USB3RN1 USB3RP1 RSVD RSVD PCIE_RCOMP PCIE_IREF Trace width=12~15 mil, Spcing=12 mils Max trace length= 500 mil 11 OF 19 AN8 AM8 USB20_N0 USB20_P0 AR7 AT7 USB20_N1 USB20_P1 AR8 AP8 USB20_N2 USB20_P2 USB20_N0 USB20_P0 USB2 Port 0 (USB3.0 P0) USB20_N1 USB20_P1 USB2 Port 1 USB20_N2 USB20_P2 USB2 Port 2 USB20_N4 USB20_P4 Mini Card(WLAN+BT) USB20_N5 USB20_P5 Touch Screen USB20_N6 USB20_P6 Camera USB20_N7 USB20_P7 Finger Print AR10 AT10 AM15 AL15 USB20_N4 USB20_P4 AM13 AN13 USB20_N5 USB20_P5 AP11 AN11 USB20_N6 USB20_P6 AR13 AP13 USB20_N7 USB20_P7 G20 H20 PCH_USB3_RX0_N PCH_USB3_RX0_P C33 B34 PCH_USB3_TX0_N PCH_USB3_TX0_P DVT modify 11/12 change to USB port setting C USB3 Port 0 E18 F18 B33 A33 AJ10 USBRBIAS AJ11 AN10 @ T35 AM10 @ T36 AL3 AT1 AH2 AV3 R154 22.6_0402_1% USB_OC0# USB_OC1# PCH_GPIO42 PCH_GPIO43 USB_OC0# USB_OC1# PCH_GPIO42 PCH_GPIO43 CAD note:  Route single‐end 50‐ohms and max 450‐mils length Recommended minimum spacing to other signal traces is 15 mils Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/09/11 Deciphered Date 2013/09/24 Title BDW MCP(7/11) PCIE,USB THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Z5WAH M/B LA-B162P Wednesday, January 08, 2014 Sheet Rev 0.3 10 of 54 A B C D PR211 BI PR201 6.49K_0402_1% PR210 1K_0402_1% 1K_0402_1% EC_SMB_CK1 @ PR204 10K_0402_1% @ PR206 100K_0402_1% +3VLP @ PU201 VCC TMSNS1 BATT_TEMP MAINPWON GND RHYST1 OT1 TMSNS2 OT2 RHYST2 @ PR207 47K_0402_1% @ PH201 100K_0402_1%_NCP15WF104F03RC EMI@ PL201 HCB2012KF-121T50_0805 EMI@ PL202 HCB2012KF-121T50_0805 2 EMI@ PC201 1000P_0402_50V7K BATT+ G718TM1U_SOT23-8 BATT_S1 @ PR205 10K_0402_1% EC_SMCK EC_SMB_DA1 @ PC202 0.1U_0603_25V7K 100_0402_1% PR208 100_0402_1% 2 PR209 EC_SMDA 2 @ PJP201 SUYIN_200275GR008G13GZR 10 GND GND 8 7 6 5 4 3 TH 1 1 +3VLP 2013/10/28 update PH201 chang Common part SL200002H00 2 -Battery_pin define PIN1 GND PIN2 GND PIN3 SMD PIN4 SMC PIN5 TS PIN6 B/I PIN7 Batt+ PIN8 Batt+ For KB9012 OTP -Battery Con_pin define PIN8 GND PIN7 GND PIN6 SMD PIN5 SMC PIN4 TS PIN3 B/I PIN2 Batt+ PIN1 Batt+ For KB9022 OTP 92℃ 1.2V 1.0V 56℃ 1.2V 1.0V 2013/10/14 update For KB9022 sense 20mΩ PR216 22.6K ohm32.4K ohm 40W PR227 26.1K ohm30K ohm 65W Active Recovery 52W,0.51V 40W,0.51V 84.5W,0.82V 65W,0.82V PH201 under CPU botten side : CPU thermal protection at 92 degree C ( shutdown ) Recovery at 56 degree C +EC_VCCA 3 ADP_I PR229 @9022@ 0_0402_5% VCIN0_PH 9022@ PR227 30K_0402_1% MAINPWON 65W@ PR223 54.9K_0402_1% PH202 100K_0402_1%_NCP15WF104F03RC PR228 B value:4250K±1% Issued Date ECAGND 2012/07/10 Deciphered Date Compal Electronics, Inc 2013/09/24 Title Date: B @ BATTERY CONN / OTP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A H_PROCHOT#_EC @ Compal Secret Data Security Classification PR203 10K_0402_1% PR226 1_0402_1% PR225 0_0402_5% For 65W adapter==>action 70W , Recovery 54W For 40W adapter==>action 52W , Recovery 40W VCIN1_PROCHOT 40W@ PR223 105K_0402_1% 2013/10/28 update PH202 chang Common part SL200002H00 10K_0402_1% 0.1U_0402_25V6 @9022@ @9022@ PC203 1 VCIN1_BATT_DROP 2 @9022@ PR230 80.6K_0402_1% 40W@ PR202 10.5K_0402_1% 65W@ PR202 10K_0402_1% 9022@ PR216 32.4K_0402_1% Battery is 3-cell design B+=9V 2013/10/02 Add for ENE9022 Battery Voltage drop detection B+ Connect to ENE9022 pin64 AD1 C Wednesday, January 08, 2014 D Sheet 40 Rev 0.3 of 54 A B C D PQ301 G Protection for reverse input S 2N7002KW_SOT323-3 Rds(on) typ = 35mohm max Vgs = 20V Vds = 30V ID = 7.7A (Ta=70C) Vin Dectector L >H H >L Min 17.16V 16.76V Typ 17.63V 17.22V 2BQ24725A_BATDRV_1 PR305 4.12K_0603_1% 2013/11/29 update PL302 change Common part SH00000YB00 11 BQ24725A_BATDRV Compal Secret Data 2014/07/02 Deciphered Date 2013/09/24 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B PC315 10U_0805_25V6K BATT+ PC314 10U_0805_25V6K CSON1 PR311 0.01_1206_1% CSOP1 2 PQ306 PQ 306 AON7408L_DFN8-5 AO N7408L_DFN8-5 CHG1 2 PL302 10UH_PCMB063T-100MS_4A_20% PC317 0.1U_0402_25V6 1U_0402_25V6 Support max charge 3.5A Power loss: 0.245W CSR rating: 1W VSRP-VSRN spec < 81.28mV 7*7*3 PC319 0.1U_0603_16V7K PC307 0.01U_0402_50V7K 01U_0402_50V7K PQ305 PQ 305 AON7408L_DFN8-5 AO N7408L_DFN8-5 1 PC318 PR312 680P_0402_50V7K 4.7_1206_5% 4.7_1206_5% @EM @E MI@ @EM @E MI@ 12 PR313 10_0603_1% CSOP1 SRP1 PR314 6.8_0603_1% CSON1 SRN1 PQ304 AO4466L_SO8 PC316 0.1U_0402_25V6 1U_0402_25V6 @EMI@PC306 @EM 0.1U_0402_25V6 1U_0402_25V6 14 13 Security Classification Issued Date DL_CHG Max 18.12V 17.70V VILIM = 20*ILIM*Rsr ILIM = 3.3*100/(100+107)/20/0.02 = 3.986 A EMI@ PC305 2200P_0402_25V7K BQ24725A_REG2N 16 PR317 100K_0402_1% SCL ILIM 10 SDA BQ24725A_ACDET @ PR320 0_0402_5% 15 **Design Notes** #For 65 /90W system, 3S1P/3S2P battery Maximum Charging current 3.5A Battery discharge power 55W +3VALW #Register Setting 0X12 bit8 set (default 1) to disable IFAULT HI if add ISN choke BQ24725A_ILIM 0X12 bit3 set (default 0) to enable turbo boost function PR316 316K_0402_1% Disable turbo when AC only #Circuit Design ACOK,ILIM pull high voltage need base on 3/5V enable control Use 10X10 choke and 3X3 H/L side MOSFET Charge current 3.5A Power loss : 1.82W Power density : 0.81 (15X15) If use 4S per cell 4.35V battery, need additional circuit for ACDET(PR218/PR220/PR222 change to 0.1%, parallel resistors with PR222 for ACDET setting) PC223 2200p is for quick response when AC plug out EC_SMB_CK1 For hybrid design, need double check PQ202,PQ203,PQ204,PQ205 component rating #Protect function EC_SMB_DA1 1 ACOVP : ACDET voltage > 3.14V Charger timeout : No communication within 175s(default) ACOC : 3.33 X Input current DAC setting(default) CHGOCP : 3/4.5/6A based on current current setting ADP_I BATOVP : 103-106% BATLOWV : 2.5V PC323 @ TSHUT : 155C 100P_0402_50V8J IFAULT HI : 750mV (default) Close EC chip IFAULT LOW : 110mV (default) BATDRV 2 BTST REGN 18 HIDRV 17 DH_CHG PR307 2.2_0603_5% 2_0603_5% BQ24725A_BST2 PR306 10_1206_1% BQ24725A_LX SRN PC322 100P_0402_50V8J PR PR319 319 66 66.5K_0402_1% 5K_0402_1% 1 PC321 2200P_0402_50V7K 19 ACDRV PR318 422K_0402_1% VIN PHASE SRP ACIN BQ24725A_BATDRV BQ24725A_LX CMSRC BQ24735A_V2.mdd PR308 0_0402_5% PC313 1U_0603_25V6K GND BQ24735RGRR_QFN20_3P5X3P5 BQ24735A_V1.mdd PR315 DH_CHG ACP ACOK Rds(on) = 30mohm max Vgs = 20V Vds = 30V ID = 7A (Ta=70C) PD302 RB751V-40_SOD323-2 LODRV Module model information VF = 0.37V ACN IOUT BQ24725A_ACDRV 100K_0402_1% PAD BQ24725A_CMSRC +3VLP 1 PU301 PC311 0.047U_0402_25V7K BQ24725A_IOUT 2 1U_0603_25V6K 1 BQ24725A_VCC2 1 PC312 21 VF = 0.5V PD301 BAS40CW_SOT323-3 20 PC309 0.1U_0402_25V6 PR310 4.12K_0603_1% 12K_0603_1% BQ24725A_ACN BQ24725A_ACP PR309 4.12K_0603_1% 12K_0603_1% PC308 0.1U_0402_25V6 1U_0402_25V6 BQ24725A_ACDRV_1 VIN PQ303 AO4466L_SO8 Isat: 4A DCR: 27mohm PC320 0.01U_0402_25V7K 01U_0402_25V7K CHG_B+ EMI@ PL301 1UH_NRS4018T1R0NDGJ_3.2A_30% PC303 10U_0805_25V6K PR303 0.02_1206_1% 1 VCC PC302 0.1U_0402_25V6 1U_0402_25V6 @ PR304 0_0402_5% PQ302 AON6414AL_DFN8-5 PC301 2200P_0402_50V7K P2 P1 ACDET VIN Rds(on) = 35mohm max Vgs = 20V Vds = 30V ID = 7.7A (Ta=70C) PC304 10U_0805_25V6K 3M_0402_5% PC310 0.1U_0402_25V6 1U_0402_25V6 1M_0402_5% Need check the SOA for inrush 2013/10/14 PR303 10m ohm chang >20m ohm B+ SD00000S120 Vgs = 20V Vds = 60V Id = 250mA PR302 PR301 D C Compal Electronics, Inc Document Number CHARGER Rev 0.3 Common Circuit Wednesday, January 08, 2014 D Sheet 41 of 54 A B C D E Module model information SY8208B_V2.mdd SY8208C_V2.mdd 1 EN1 and EN2 dont't floating PR402 499K_0402_1% 2 PR412 100K_0402_5% 3.3V LDO 150mA~300mA 2 +3VLP PC411 4.7U_0603_6.3V6M SPOK PL402 +3VALWP 1.5UH_PCMB053T-1R5MS_6A_20% PC410 22U_0603_6.3V6M Check pull up resistor of SPOK at HW side LX_3V SY8208BQNC_QFN10_3X3 B+ 0.1U_0603_25V7K 10 PC409 22U_0603_6.3V6M LDO PC403 PC408 22U_0603_6.3V6M PG 1 OUT 3V_FB PR401 2.2_0603_5% 2 +3VALWP GND BST_3V PC407 22U_0603_6.3V6M PR405 LX @ 13V_SN BS 680P_0603_50V7K 4.7_1206_5% EN2 @EMI@ EN1 IN PC402 PR403 0.01U_0402_25V7K 1K_0402_5% 2 3V5V_EN PC412 IN @EMI@ PC406 10U_0805_25V6K PU401 3V_VIN PC405 10U_0805_25V6K EMI@ PC404 2200P_0402_50V7K EMI@ PL401 HCB2012KF-121T50_0805 @EMI@ PC401 0.1U_0402_25V6 B+ PR404 150K_0402_1% ENLDO_3V5V Vout is 3.234V~3.366V Ipeak=4.65A Imax=3.25A Iocp=10A TDC=6A +3VALWP @ PJ401 2 +3VALW JUMP_43X118 B+ EMI@ PL403 HCB2012KF-121T50_0805 5V_VIN @EMI@ EC_ON @ Ipeak=9A Imax=6.25A Iocp=10A RB751V-40_SOD323-2 to PD401_SCS00000Z00 3V5V_EN PC426 4.7U_0402_6.3V6M 20131209 PR410_R-short change +5VALW PD401 MAINPWON @ PC427 22U_0603_6.3V6M PC424 4.7U_0603_6.3V6M TDC=6A PR409 2.2K_0402_5% PR411 1M_0402_1% Vout is 4.998V~5.202V 5V LDO 150mA~300mA +5VALWP VL 1.5UH_PCMB053T-1R5MS_6A_20% PC423 22U_0603_6.3V6M SY8208CQNC_QFN10_3X3 PL404 PC428 22U_0603_6.3V6M 1 LX_5V 5*5*3 PC422 22U_0603_6.3V6M LDO 10 PC416 0.1U_0603_25V7K PC421 22U_0603_6.3V6M PG PR407 2.2_0603_5% PC420 22U_0603_6.3V6M OUT 1 VCC 5V_FB BST_5V SPOK LX 3V5V_EN @ PJ402 JUMP_43X118 GND 680P_0603_50V7K 4.7_1206_5% PR408 BS PC419 4.7U_0603_6.3V6M EN1 EN2 VCC_3V IN PC425 15V_SN PC413 PR406 6800P_0402_25V7K 1K_0402_5% 2 @EMI@ @EMI@ PC418 0.1U_0402_25V6 @ EMI@ PC417 2200P_0402_50V7K PC415 10U_0805_25V6K PC414 10U_0805_25V6K +5VALWP PU402 EC VDD0 is +3VL, PC426 UNPOP EC VDD0 is +3VALW, PC426 POP @ Compal Secret Data Security Classification 2011/06/15 Issued Date 2013/09/24 Deciphered Date Title Compal Electronics, Inc +3VALW/+5VALW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D Rev 0.3 Sheet Wednesday, January 08, 2014 E 42 of 54 Module model information RT8207M_V1.mdd RT8207M_V2.mdd For Single layer For Dual layer D D Pin19 need pull separate from +1.5VP If you have +1.5V and +0.75V sequence question, you can change from +1.5VP to +1.5VS Note: S3 - sleep ; S5 - power off VTTREF_1.35V FB +1.35VP VTT PC507 10U_0805_6.3V6K PC510 0.033U_0402_16V7K FB_1.35V S3 20 19 VLDOIN 18 BOOT 17 UGATE 2 PR506 8.2K_0402_1% +1.35VP B SYSON @ PR509 0_0402_5% @ PC514 0.1U_0402_10V7K MOSFET: 3x3 DFN H/S Rds(on): 27mohm(Typ), 34mohm(Max) L/S Rds(on): 22mohm(Typ), 13.5mohm(Max) SUSP# DDR_VTT_PG_CTRL @ PR510 0_0402_5% PR511 0_0402_5% PR508 10K_0402_1% Choke: 7x7x3 Rdc=8.3mohm(Typ), 10mohm(Max) 1 +1.35VP VTTREF_1.5V off on on 16 PR507 887K_0402_1% 1.35V_B+ Switching Frequency: 285kHz Ipeak=5.4A Delta I =4.4A Iocp=9.15~6.58A OVP: 110%~120% VFB=0.75V, Vout=1.364V @ PJ501 2 @ PC515 0.1U_0402_10V7K JUMP_43X118 +0.675VSP @ PJ503 2 +0.675VS JUMP_43X39 Compal Secret Data Security Classification Issued Date 2010/07/20 Deciphered Date 2013/09/24 Title A Compal Electronics, Inc +1.35VP/+0.675VSP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Wednesday, January 08, 2014 Date: +1.35V JUMP_43X118 @ PJ502 2 A C +0.75VSP off off on VDDQ 21 Level L L H VDD VTTREF +5VALW 2013/10/14 update PQ502 AON7702A EOL change >AON7506_SB000010A00 Mode S5 S3 S0 VDDP EN_0.675VSP PC513 1U_0603_10V6K B 11 GND RT8207MZQW_WQFN20_3X3 S5 VDD_1.35V PAD VTTSNS TON +5VALW CS 2 @EMI@ PC512 680P_0402_50V7K PQ502 AON7506_DFN33-8-5 12 PU501 VTTGND PGND + PR504 5.1_0603_5% 2 2013/10/28 update PC509 chang Common part SF000006S00 H4.5 ESR=15m ohm PC509 330U_2.5V_M @EMI@ PR503 4.7_1206_5% 13 LGATE 14 PR502 6.65K_0402_1% CS_1.35V PC508 1U_0603_10V6K H=4.5 SF000002Z00 15 EN_1.35V DL_1.35V TON_1.35V PHASE 2013/10/20 update Setting OCP PR502 >6.65K +1.35VP +0.675VSP PC506 10U_0805_6.3V6K PC501 0.1U_0603_25V7K 2013/10/28 update PL502 chang Common part 7*7*3 SH00000YE00 PL502 1UH_PCMB063T-1R0MS_12A_20% +1.35VP SW_1.35V PQ501 AON7408L_DFN8-5 1.1% BOOT_1.35V 0.75Volt +/- 5% TDC 0.7A Peak Current 1A DH_1.35V C 1.364V PR501 2.2_0603_5% PGOOD BST_1.35V PC505 10U_0805_25V6K PC504 10U_0805_25V6K EMI@ PC503 2200P_0402_50V7K 1.35V_B+ @EMI@ PC502 0.1U_0402_25V6 B+ 10 EMI@ PL501 HCB2012KF-121T50_0805 Sheet 43 Rev 0.3 of 54 D D Module model information SY8208D_V1.mdd EN pin don't floating If have pull down resistor at HW side, pls delete PR2 PR602 0_0402_5% SUSP# C 1 C @ PC602 0.22U_0402_10V6K 2 1M_0402_1% PR603 LDO_3V SY8208DQNC_QFN10_3X3 FB = 0.6V @ 2 2 2 Rdown PR609 20K_0402_1% 2 PR607 @ 0_0402_5% Rup +3VALW PC615 22U_0603_6.3V6M LDO PC612 22U_0603_6.3V6M PG BYP PC611 22U_0603_6.3V6M PR608 10K_0402_5% ILMT 1.1% +1.05VSP PC610 22U_0603_6.3V6M VCCST_PWRGD 2013/10/28 update PL602 chang Common part 7*7*3 SH00000YE00 1.062V PL602 1UH_PCMB063T-1R0MS_12A_20% LX_1.05V PC609 22U_0603_6.3V6M TDC 8A PC601 0.1U_0603_25V7K PC608 330P_0402_50V7K FB ILMT_1.05V3 10 PR601 0_0603_5% 2 LX BST_1.05V PR606 15.4K_0402_1% GND 1 BS EN PC614 4.7U_0603_6.3V6K 10U_0805_25V6K PC607 10U_0805_25V6K PC604 IN +3VS PU601 PC613 4.7U_0603_6.3V6K ILMT_1.05V @ PR605 0_0402_5% @EMI@ PC606 0.1U_0402_25V6 1 LDO_3V B+_1.05V EMI@ PC605 2200P_0402_50V7K B+ @EMI@ PR604 @EMI@ PC603 4.7_1206_5% 680P_0603_50V7K 2SNB_1.05V EMI@ PL601 HCB2012KF-121T50_0805 B VCCST_PWRGD The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high Pin BYP is for CS Common NB can delete +1.05VSP +3VALW and PC15 PJ601 2 JUMP_43X118 +1.05VS_VTT B @ VFB=0.6V Vout=0.6V* (1+Rup/Rdown) Vout=1.05V A A Compal Secret Data Security Classification Issued Date 2011/06/15 Deciphered Date 2013/09/24 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc Document Number +1.05VSP Wednesday, January 08, 2014 Sheet Rev 0.3 44 of 54 Ultra Low Dropout 0.23V(typical) at 3A Output Current D PC702 1U_0402_6.3V6K 2 @ PJ701 JUMP_43X39 D +5VALW +3VS +1.5VSP PC704 0.01U_0402_25V7K @ PJ702 2 +1.5VS JUMP_43X39 PC705 22U_0603_6.3V6M 1 0.53% +1.5VSP Rup PR703 20K_0402_1% FB 2 GND EN POK 1 1.507V Rdown PR705 22.6K_0402_1% 2 PR704 47K_0402_5% PC701 0.1U_0402_16V7K SUSP# PR701 100K_0402_5% PU701 APL5930KAI-TRG_SO8 VCNTL VOUT VIN VIN VOUT PC703 4.7U_0805_6.3V6K C C Vout=0.8V* (1+Rup/Rdown) Ultra Low Dropout 0.23V(typical) at 3A Output Current B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2011/06/13 2013/09/24 Deciphered Date Title +1.5VSP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Rev 0.3 Wednesday, January 08, 2014 Sheet 45 of 54 Base on BDW PDDG Rev_0_73 15W TDC 19A MAX 32A MAX 40A OCP 38.4A OCP 48A Loadline=-2.0mv/A IMON 0.1uF ( 0402 ) RC Filter PC820 @ PC819 A PR820 PC807 PC803 10U_0805_25V6K 1 +CPU_CORE PR809 3.65K_0603_1% TDC 19A MAX 40A OCP 48A Loadline=-2.0mv/A @EMI@ PR808 4.7_1206_5% 2 PC811 0.1U_0402_25V6 B Note: PR812=124K =>Slew rate=53mV/us Vboot = 1.7V PR818 2.61K_0402_1% RC Match 15W@ PC816 0.033U_0402_16V7K PC817 0.1U_0402_16V4Z PR819 11K_0402_1% 28W@ PC816 0.022U_0402_16V7K OCP Setting 15W: 38A 28W: 48A PL802 PH801 10KB_0402_5%_ERTJ0ER103J 0.082U_0402_16V7K @ PC818 330P_0402_50V7K Height mm 68u_SF000000W00 @EMI@ PC810 680P_0603_50V7K 28W@ PQ802 PRGM2 VCC_SENSE 28W@ PR820 348_0402_1% PQ801 AON7518_DFN8-5 +5VS Height mm 100u_SF000000I80 2013/12/13 update PL802 change Common part SH000011P00 PRGM1 28W@ PR816 1.58K_0402_1% @ PQ803 PRGM1 VR_SVID_DATA 17 VR_SVID_ALRT# 19 Droop + C PR816 1.27K_0402_1% @ PR815 10_0402_1% 13 PR801 PC801 2.2_0603_5% 0.22U_0603_16V7K 2 BOOT 1 B+ 0.15UH 20% PCME064T-R15MS0R667 36A 15W@ 2 @ PC815 390P_0402_50V7K PR814 2K_0402_1% 2 PC814 330P_0402_50V7K UAGTE ISUMP PR813 1.91K_0402_1% 14 11 PRGM2 FB COMP PHASE 12 VCC ISUMN @ 18 NTC FB 33P_0402_50V8J PC812 BOOT 1 ISL95813HRZ-T_QFN20_3X4 VR_HOT# 15 COMP UGATE EMI@ PL801 HCB2012KF-121T50_0805 CPU_B+ IMON >20130828 Choke: 0.15UH (Size:7*7*4) SH00000U300 Rdc=0.66mohm +-7% Heat Rating Current=36A Saturation Current=45A CPU_B+ Note: PR804=113K =>Icc(max)=40A fsw=700KHz NTC 3.83K_0402_1% 2013/10/28 update PH802 chang Common part SL200002E00 95.3kOhm 0.1uF ( 0402 ) LAGTE 2 PR811 27.4K_0402_1% PC813 6800P_0402_25V7K 2 B 93.1kOhm 16 ISUMP PR810 LGATE PHASE ISUMN PH802 470K_0402_5%_ TSM0B474J4702RE PC809 47P_0402_50V8J Over temperature protection: OTP Setting: 100C active Pin5 (NTC) voltage 0.92v, recovery PR807 PC811 PR806 0_0603_5% 10 VR_HOT_1# VR_HOT# PROG1 28W@ PR804 205K_0402_1% PGOOD RTN IMON VR_ON PR807 121K_0402_1% VR_ON SDA PAD PC808 1000P_0402_50V7K SCLK 21 PU801 VGATE 20 PR805 1.91K_0402_1% ALERT# VR_SVID_CLK VR_ON RC Match 113kOhm 15W@ PR804 169K_0402_1% C 0.022uF 90.9kOhm VR_SVID_CLK 0.033uF PR804 PC816 PR812 124K_0402_1% VR_ALERT# Droop PR817 4.99M_0402_1% 1.58kOhm PC804 10U_0805_25V6K Note: VR_SVID_ALRT# Pull high on HW side 1.27kOhm AON6554_DFN5X6-8-5 VR_SVID_DATA OCP PR816 PR803 54.9_0402_1% 619 Ohm 499 Ohm D L-side MOS: MDU1511RH Rds(on):

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