ARMBased Microcontroller

Invite you to consult the document content ARMBased Microcontroller for more documents serving the academic needs and research. This is a useful reference for you Specialized Electronics Electronics Telecommunications.

SAM DA1 ARM-Based Microcontroller DATASHEET Description The Atmel® SAM DA1 is a series of low-power automotive microcontrollers using the 32-bit ARM® Cortex®-M0+ processor with 32 to 64 pins and up to 64KB of Flash, up to 8KB of SRAM and up to 2KB Read-While-Write (RWW) Flash section The SAM DA1 devices operate at a maximum frequency of 48MHz and reach 2.14 Coremark/MHz They are designed for simple and intuitive migration with identical peripheral modules, hex compatible code, identical linear address map and pin-compatible migration paths between all devices in the product series All devices include intelligent and flexible peripherals, patented Atmel Event System for inter-peripheral signaling The Atmel SAM DA1 devices have the following features: In-system programmable Flash, eight-channel direct memory access (DMA) controller, 12-channel event system, programmable interrupt controller, up to 52 programmable I/O pins, 32-bit real-time clock and calendar, five 16-bit timer/counters (TC) and three 16-bit timer/counters for control (TCC), where each TC can be configured to perform frequency and waveform generation, accurate program execution timing or input capture with time and frequency measurement of digital signals The TCs can operate in 8- or 16-bit mode, selected TCs can be cascaded to form a 32-bit TC, and three timer/counters have extended functions optimized for motor, lighting and other control applications The series provides up to six serial communication modules (SERCOM) that each can be configured to act as a USART, UART, SPI, I2C up to 3.4MHz, and LIN slave; up to twenty-channel 350ksps 12-bit ADC with programmable gain and optional oversampling and decimation supporting up to 16-bit resolution, one 10-bit 350ksps DAC, two analog comparators with window mode, programmable watchdog timer, brown-out detector and power-on reset and two-pin serial wire debug (SWD) program and debug interface Peripheral Touch Controller supporting capacitive buttons, sliders, wheels and proximity sensing, one full-speed USB 2.0 embedded host and device interface and one inter-IC sound controller (I2S) All devices have accurate and low-power external and internal oscillators All oscillators can be used as a source for the system clock Different clock domains can be independently configured to run at different frequencies, enabling power saving by running each peripheral at its optimal clock frequency, and thus maintaining a high CPU frequency while reducing power consumption The SAM DA1 devices offer two software-selectable sleep modes, idle and standby In idle mode the CPU is stopped while all other functions can be kept running Atmel-9349A–SAM-DA1_Datasheet–10/2015 SMART In standby all clocks and functions are stopped except those selected to continue running The device supports SleepWalking SleepWalking allows peripherals to wake up from sleep based on predefined conditions, allowing the CPU to wake up only when needed, e.g., when a threshold is crossed or a result is ready The Peripheral Event System supports synchronous and asynchronous events, allowing peripherals to receive, respond to and send events even in standby mode The Flash program memory can be reprogrammed in-system through the SWD interface The same interface can be used for non-intrusive on-chip application code debugging A boot loader running in the device can use any communication interface to download and upgrade the application program in the Flash memory Atmel® SAM DA1 devices are supported by a complete suite of program and system development tools, including C compilers, macro-assemblers, program debugger/simulators, programmers and evaluation kits Features z Processor ARM Cortex-M0+ CPU running at up to 48MHz Single-cycle hardware multiplier z Micro trace buffer z z z Memories 16/32/64KB in-system self-programmable Flash 0.5/1/2KB Read-While-Write (RWW) Flash section z 4/4/8KB SRAM memory z z z System z z z z z z Power-on reset (POR) and brown-out detection (BOD) Internal and external clock options with 48MHz digital frequency locked loop (DFLL48M) and 48MHz to 96MHz fractional digital phase locked loop (FDPLL96M) External interrupt controller (EIC) 16 external interrupts One non-maskable interrupt Two-pin serial wire debug (SWD) programming, test and debugging interface z Low power z z Idle and standby sleep modes SleepWalking peripherals z Peripherals z z z z z z z 8-channel direct memory access controller (DMAC) 12-channel event system Five 16-bit timer/counters (TC), configurable as either: z One 16-bit TC with compare/capture channels z One 8-bit TC with compare/capture channels z One 32-bit TC with compare/capture channels, by using two TCs Three 16-bit timer/counters for control (TCC), with extended functions: z Up to four compare channels with optional complementary output z Generation of synchronized pulse width modulation (PWM) pattern across port pins z Deterministic fault protection, fast decay and configurable dead-time between complementary output z Dithering for enhancing resolution with up to 5-bit and reduce quantization error 32-bit real time counter (RTC) with clock/calendar function Watchdog timer (WDT) CRC-32 generator Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 z z z z z z z One full speed (12Mbps) universal serial bus (USB) 2.0 controller z Device 2.0 and reduced-host low speed and full speed z Flexible end-point configuration and management with dedicated DMA channels z On-chip transceivers including pull-ups and serial resistors z Crystal-less operation in device mode Up to six serial communication interfaces (SERCOM), each configurable to operate as either: z USART with full-duplex and single-wire half-duplex configuration z I2C up to 3.4MHz z SPI z LIN slave One two-channel inter-IC sound (I2S) interface One 12-bit, 350ksps analog-to-digital converter (ADC) with up to 20 channels z Differential and single-ended input z 1/2x to 16x programmable gain stage z Automatic offset and gain error compensation z Oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution 10-bit, 350ksps digital-to-analog converter (DAC) Two analog comparators (AC) with window compare function Peripheral Touch Controller (PTC) z Up to 256-channel capacitive touch and proximity sensing z I/O z Up to 52 programmable I/O pins z Packages 64-pin TQFP 48-pin TQFP, QFN z 32-pin TQFP, QFN z z z Operating voltage z 2.7V to 3.63V z Temperature range z –40 to +105°C Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 Configuration Summary Table 1-1 Configuration Summary SAM DA1J SAM DA1G SAM DA1E Pins 64 48 32 General Purpose I/O-pins (GPIOs) 52 38 26 Flash 64/32/16KB 64/32/16KB 64/32/16KB RWW Flash section 2KB/1KB/512B 2KB/1KB/512B 2KB/1KB/512B SRAM 8/4/4KB 8/4/4KB 8/4/4KB Timer counter (TC) instances 5 Waveform output channels per TC instance 2 Timer Counter for Control (TCC) instances 3 Waveform output channels per TCC 8/4/2 8/4/2 6/4/2 DMA channels 8 USB interface 1 Serial communication interface (SERCOM) instances 6 Inter-IC sound interface (I2S) 1 Analog-to-digital converter (ADC) channels 20 14 10 Analog comparators (AC) 2 Digital-to-analog converter (DAC) channels 1 Real-time counter (RTC) Yes Yes Yes RTC alarms 1 RTC compare values × 32-bit value or × 16-bit values × 32-bit value or × 16-bit values × 32-bit value or × 16-bit values External interrupt lines 16 16 16 Peripheral Touch Controller (PTC) X and Y lines 16x16 12x10 10x6 Maximum CPU frequency Packages 48MHz TQFP QFN TQFP QFN TQFP 32.768kHz crystal oscillator (XOSC32K) 0.4-32MHz crystal oscillator (XOSC) 32.768kHz internal oscillator (OSC32K) 8MHz high-accuracy internal oscillator (OSC8M) 48MHz digital frequency locked loop (DFLL48M) 96MHz fractional digital phase locked loop (FDPLL96M) Clocks Event system channels 12 12 12 Software debug interface Yes Yes Yes Watchdog timer (WDT) Yes Yes Yes Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 Ordering Information Figure 2-1 Ordering Information SAM DA1 E 14 A - A B T Product Family SAM D = Baseline Cortex-M MCU Package Carrier T = Tape and Reel Product Series A1 = Automotive Basic feature set + DMA, Adv Timers, USB, I2S, PTC Plating Material and Temp Grade B = -40°C to +105°C Matte Sn plating (only DA1) Pin Count E = 32 pins G = 48 pins J = 64 pins Package Type A = TQFP M = QFN Wettable Flanks Memory Density 14 = 16kB 15 = 32kB 16 = 64kB Marketing Revision A = Initial revision 2.1 B-versions Table 2-1 SAM DA1E Ordering Code FLASH (Bytes) SRAM (Bytes) Package Carrier Type Temperature Grade PTC, USB, I2S ATSAMDA1E14A-ABT 16K 4K TQFP32 Tape and reel –40°C to +105°C Yes ATSAMDA1E14A-MBT 16K 4K QFN32 Tape and reel –40°C to +105°C Yes ATSAMDA1E15A-ABT 32K 4K TQFP32 Tape and reel –40°C to +105°C Yes ATSAMDA1E15A-MBT 32K 4K QFN32 Tape and reel –40°C to +105°C Yes ATSAMDA1E16A-ABT 64K 8K TQFP32 Tape and reel –40°C to +105°C Yes ATSAMDA1E16A-MBT 64K 8K QFN32 Tape and reel –40°C to +105°C Yes Package Carrier Type Temperature Grade PTC, USB, I2S Table 2-2 SAM DA1G Ordering Code FLASH (Bytes) SRAM (Bytes) ATSAMDA1G14A-ABT 16K 4K TQFP48 Tape and reel –40°C to +105°C Yes ATSAMDA1G14A-MBT 16K 4K QFN48 Tape and reel –40°C to +105°C Yes ATSAMDA1G15A-ABT 32K 4K TQFP48 Tape and reel –40°C to +105°C Yes ATSAMDA1G15A-MBT 32K 4K QFN48 Tape and reel –40°C to +105°C Yes ATSAMDA1G16A-ABT 64K 8K TQFP48 Tape and reel –40°C to +105°C Yes ATSAMDA1G16A-MBT 64K 8K QFN48 Tape and reel –40°C to +105°C Yes Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 Table 2-3 SAM DA1J Ordering Code FLASH (Bytes) SRAM (Bytes) Package Carrier Type Temperature Grade PTC, USB, I2S ATSAMDA1J14A-ABT 16K 4K TQFP64 Tape and reel –40°C to +105°C Yes ATSAMDA1J15A-ABT 32K 4K TQFP64 Tape and reel –40°C to +105°C Yes ATSAMDA1J16A-ABT 64K 8K TQFP64 Tape and reel –40°C to +105°C Yes Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 Block Diagram SWCLK CORTEX-M0+ Processor Fmax 48MHz Serial Wire SWDIO Memory Trace Buffer I/O Bus 64/32/16KB NVM 2KB/1KB/512B RWW Flash Section 8/4/4KB SRAM NVM Controller SRAM Controller Cache Device Service Unit M M M S High Speed Bus Matrix Peripheral Access Controller S DMA M USB FS Device Mini-Host S AHB-APB Bridge A DM SOF 1kHz AHB-APB Bridge C Peripheral Access Controller Peripheral Access Controller DMA System Controller BOD33 S DP S AHB-APB Bridge B PORT x SERCOM PAD0 PAD1 PAD2 PAD3 x Timer/Counter WO0 WO1 VREF OSC32K XIN32 XOSC32K DMA OSC8M XOUT32 DFLL48M XIN XOSC FDPLL96M XOUT x Timer/Counter for Control Power Manager Clock Controller RESETN Reset Controller Sleep Controller Generic Clock Controller 20-channel 12-bit ADC 350KSPS 10-bit DAC Peripheral Touch Controller Watchdog Timer VREFA VREFB AIN[3 0] VOUT DMA Real Time Counter WOn AIN[19 0] DMA Analog Comparators GCLK_IO[7 0] WO0 WO1 PORT DMA Event System VREFP X[15 0] Y[15 0] EXTINT[15 0] NMI External Interrupt Controller DMA Inter-IC Sound Controller MCK SCK WS SDI SDO Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 Pinout 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 PB03 PB02 PB01 PB00 PB31 PB30 PA31 PA30 VDDIN VDDCORE GND PA28 RESETN PA27 PB23 PB22 Figure 4-1 SAM DA1J 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 10 11 12 13 14 15 16 VDDIO GND PA25 PA24 PA23 PA22 PA21 PA20 PB17 PB16 PA19 PA18 PA17 PA16 VDDIO GND 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PA00 PA01 PA02 PA03 PB04 PB05 GNDANA VDDANA PB06 PB07 PB08 PB09 PA04 PA05 PA06 PA07 PA08 PA09 PA10 PA11 VDDIO GND PB10 PB11 PB12 PB13 PB14 PB15 PA12 PA13 PA14 PA15 Digital Pin Analog Pin Oscillator Ground Input Supply Regulated Output Supply Reset Pin Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 PA28 RESETN PA27 41 40 PB23 PB22 VDDCORE GND 43 39 38 37 PB02 PA31 PA30 VDDIN 47 46 45 44 42 PB03 48 Figure 4-2 SAM DA1G 31 30 29 28 10 11 27 26 12 25 PA04 PA05 PA06 PA07 23 24 PA14 PA15 VDDANA PB08 PB09 20 21 22 32 PB11 PA12 PA13 33 18 19 GND PB10 PA03 GNDANA 14 15 16 17 35 34 13 36 PA09 PA10 PA11 VDDIO PA08 PA00 PA01 PA02 VDDIO GND PA25 PA24 PA23 PA22 PA21 PA20 PA19 PA18 PA17 PA16 Digital Pin Aanalog Pin Oscillator Ground Input Supply Regulated Output Supply Reset Pin Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 PA31 PA30 VDDIN VDDCORE GND PA28 RESETN PA27 32 31 30 29 28 27 26 25 Figure 4-3 SAM DA1E 19 PA18 PA06 18 PA17 PA07 17 PA16 VDDANA 16 PA19 PA05 PA15 PA04 15 PA22 20 14 21 PA11 PA14 PA03 13 PA23 12 PA24 22 PA10 23 PA09 PA02 11 PA01 10 PA25 GND 24 PA08 PA00 Digital Pin Analog Pin Oscillator Ground Input Supply Regulated Output Supply Reset Pin Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 10 41 Errata 41.1 Revision E - SYSTICK calibration value is wrong Errata reference: 14155 Fix/Workaround: right SYSTICK calibration value is 0x1000000 - On pin PA24 and PA25 the pull-up and pull-down configuration is not disabled automatically when alternative pin function is enabled Errata reference: 12368 Fix/Workaround: For pin PA24 and PA25, the GPIO pull-up and pull-down must be disabled before enabling alternative functions on them - If APB clock is stopped and GCLK clock is running, APB read access to read synchronized registers will freeze the system The CPU and the DAP AHB-AP are stalled, as a consequence debug operation is impossible Errata reference: 10416 Fix/Workaround: Do not make read access to read-synchronized registers when APB clock is stopped and GCLK is running To recover from this situation, power cycle the device or reset the device using the RESETN pin - In I2C Slave mode, writing the CTRLB register when in the AMATCH or DRDY interrupt service routines can cause the state machine to reset Errata reference: 13574 Fix/Workaround: Write CTRLB.ACKACT to using the following sequence: // If higher priority interrupts exist, then disable so that the // following two writes are atomic SERCOM - STATUS.reg = 0; SERCOM - CTRLB.reg = 0; // Re-enable interrupts if applicable Write CTRLB.ACKACT to using the following sequence: // If higher priority interrupts exist, then disable so that the // following two writes are atomic SERCOM - STATUS.reg = 0; SERCOM - CTRLB.reg = SERCOM_I2CS_CTRLB_ACKACT; // Re-enable interrupts if applicable Otherwise, only write to CTRLB in the AMATCH or DRDY interrupts if it is to close out a transaction When not closing a transaction, clear the AMATCH interrupt by writing a to its bit position instead of using CTRLB.CMD The DRDY interrupt is automatically cleared by reading/writing to the DATA register in smart mode If not in smart mode, DRDY should be cleared by writing a to its bit position Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1001 Code replacements examples: Current: SERCOM - CTRLB.reg |= SERCOM_I2CS_CTRLB_ACKACT; Change to: // If higher priority interrupts exist, then disable so that the // following two writes are atomic SERCOM - STATUS.reg = 0; SERCOM - CTRLB.reg = SERCOM_I2CS_CTRLB_ACKACT; // Re-enable interrupts if applicable Current: SERCOM - CTRLB.reg &= ~SERCOM_I2CS_CTRLB_ACKACT; Change to: // If higher priority interrupts exist, then disable so that the // following two writes are atomic SERCOM - STATUS.reg = 0; SERCOM - CTRLB.reg = 0; // Re-enable interrupts if applicable Current: /* ACK or NACK address */ SERCOM - CTRLB.reg |= SERCOM_I2CS_CTRLB_CMD(0x3); Change to: // CMD=0x3 clears all interrupts, so to keep the result similar, // PREC is cleared if it was set if (SERCOM - INTFLAG.bit.PREC) SERCOM - INTFLAG.reg = SERCOM_I2CS_INTFLAG_PREC; SERCOM - INTFLAG.reg = SERCOM_I2CS_INTFLAG_AMATCH; - If the external XOSC32K is broken, neither the external pin RST nor the GCLK software reset can reset the GCLK generators using XOSC32K as source clock Errata reference: 12164 Fix/Workaround: Do a power cycle to reset the GCLK generators after an external XOSC32K failure 41.1.1 DFLL48M - The DFLL clock must be requested before being configured otherwise a write access to a DFLL register can freeze the device Errata reference: 9905 Fix/Workaround: Write a zero to the DFLL ONDEMAND bit in the DFLLCTRL register before configuring the DFLL module - If the DFLL48M reaches the maximum or minimum COARSE or FINE calibration values during the locking sequence, an out of bounds interrupt will be generated These interrupts will be generated even if the final calibration values at DFLL48M lock are not at maximum or minimum, and might therefore be false out of bounds interrupts Errata reference: 10669 Fix/Workaround: Check that the lockbits: DFLLLCKC and DFLLLCKF in the SYSCTRL Interrupt Flag Status and Clear register (INTFLAG) are both set before enabling the DFLLOOB interrupt Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1002 - The DFLL status bits in the PCLKSR register during the USB clock recovery mode can be wrong after a USB suspend state Errata reference: 11938 Fix/Workaround: Do not monitor the DFLL status bits in the PCLKSR register during the USB clock recovery mode 41.1.2 DMAC - If data is written to CRCDATAIN in two consecutive instructions, the CRC computation may be incorrect Errata reference: 13507 Fix/Workaround: Add a NOP instruction between each write to CRCDATAIN register 41.1.3 NVMCTRL - Default value of MANW in NVM.CTRLB is Errata reference: 13134 This can lead to spurious writes to the NVM if a data write is done through a pointer with a wrong address corresponding to NVM area Fix/Workaround: Set MANW in the NVM.CTRLB to at startup - When external reset is active it causes a high leakage current on VDDIO Errata reference: 13446 Fix/Workaround: Minimize the time external reset is active 41.1.4 SERCOM - In USART autobaud mode, missing stop bits are not recognized as inconsistent sync (ISF) or framing (FERR) errors Errata reference: 13852 Fix/Workaround: None - If the SERCOM is enabled in SPI mode with SSL detection enabled (CTRLB.SSDE) and CTRLB.RXEN=1, an erroneous slave select low interrupt (INTFLAG.SSL) can be generated Errata reference: 13369 Fix/Workaround: Enable the SERCOM first with CTRLB.RXEN=0 In a subsequent write, set CTRLB.RXEN=1 41.1.5 TC - Spurious TC overflow and Match/Capture events may occur Errata reference: 13268 Fix/Workaround: Do not use the TC overflow and Match/Capture events Use the corresponding Interrupts instead 41.1.6 TCC - In RAMP mode with Fault keep, qualified and restart: Errata reference: 13262 If a fault occurred at the end of the period during the qualified state, the switch to the next ramp can have two restarts Fix/Workaround: Avoid faults few cycles before the end or the beginning of a ramp Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1003 42 About This Document 42.1 Conventions 42.1.1 Numerical Notation Table 42-1 Numerical notation 165 Decimal number 0101b Binary number (example 0b0101 = decimal) 0101 Binary numbers are given without suffix if unambiguous 0x3B24 Hexadecimal number X Represents an unknown or don't care value Z Represents a high-impedance (floating) state for either a signal or a bus 42.1.2 Memory Size and Type Table 42-2 Memory Size and Bit Rate Symbol Description kB/kbyte kilobyte (210 = 1024) MB/Mbyte megabyte (220 = 1024*1024) GB/Gbyte gigabyte (230 = 1024*1024*1024) b bit (binary or 1) B byte (8 bits) 1kbit/s 1,000 bit/s rate (not 1,024 bit/s) 1Mbit/s 1,000,000 bit/s rate 1Gbit/s 1,000,000,000 bit/s rate 42.1.3 Frequency and Time Table 42-3 Frequency and Time Symbol Description kHz 1kHz = 103Hz = 1,000Hz MHz 106 = 1,000,000Hz GHz 109 = 1,000,000,000Hz s second ms millisecond µs microsecond ns nanosecond Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1004 42.1.4 Registers and Bits Table 42-4 Register and bit mnemonics 42.2 R/W Read/Write accessible register bit The user can read from and write to this bit R Read-only accessible register bit The user can only read this bit Writes will be ignored W Write-only accessible register bit The user can only write this bit Reading this bit will return an undefined value BIT Bit names are shown in uppercase (Example PINA1) BITS[n:m] A set of bits from bit n down to m (Example: PINA3 = {PINA3, PINA2, PINA1, PINA0} Reserved Reserved bits are unused and reserved for future use For compatibility with future devices, always write reserved bits to zero when the register is written Reserved bits will always return zero when read PERIPHERALi If several instances of a peripheral exist, the peripheral name is followed by a number to indicate the number of the instance in the range 0-n PERIPHERALi denotes one specific instance Reset Value of a register after a power reset This is also the value of registers in a peripheral after performing a software reset of the peripheral, except for the Debug Control registers SET/CLR Registers with SET/CLR suffix allows the user to clear and set bits in a register without doing a readmodify-write operation These registers always come in pairs Writing a one to a bit in the CLR register will clear the corresponding bit in both registers, while writing a one to a bit in the SET register will set the corresponding bit in both registers Both registers will return the same value when read If both registers are written simultaneously, the write to the CLR register will take precedence Acronyms and Abbreviations Table 42-5 contains acronyms and abbreviations used in this document Table 42-5 Acronyms and Abbreviations Abbreviation Description AC Analog Comparator ADC Analog-to-Digital Converter ADDR Address AHB AMBA Advanced High-performance Bus APB AMBA Advanced Peripheral Bus AREF Analog reference voltage AVDD Analog supply voltage BLB Boot Lock Bit BOD Brown-out detector CAL Calibration CC Compare/capture CLK Clock CRC Cyclic Redundancy Check CTRL Control Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1005 Table 42-5 Acronyms and Abbreviations (Continued) Abbreviation Description DAC Digital to Analog converter DFLL Digital Frequency Locked Loop DSU Device service unit EEPROM Electrically Erasable Programmable Read-Only Memory EIC External interrupt controller EVSYS Event System GCLK Generic clock GND Ground GPIO General Purpose Input/Output I2C Inter-integrated circuit IF Interrupt Flag INT Interrupt IOBUS I/O Bus NMI Non-Maskable Interrupt NVIC Nested vector interrupt controller NVMCTRL Non-Volatile Memory controller OSC Oscillator PAC Peripheral access controller PC Program counter PER Period PM Power manager POR Power-on reset PTC Peripheral touch controller PWM Pulse Width Modulation RAM Random-access memory REF Reference RMW Read-modify-write RTC Real-time counter RX Receiver SERCOM Serial communication interface SMBus System Management Bus SP Stack Pointer SPI Serial peripheral interface Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1006 Table 42-5 Acronyms and Abbreviations (Continued) Abbreviation Description SRAM Static random-access memory SYSCTRL System controller SWD Single-wire debug TC Timer/Counter TX Transmitter ULP Ultra Low Power USART Universal synchronous and asynchronous serial receiver and transmitter VDD Digital supply voltage VREF Voltage reference WDT Watchdog timer XOSC Crystal oscillator XTAL Crystal Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1007 Table of Contents Description Features Configuration Summary Ordering Information 2.1 B-versions Block Diagram Pinout Signal Descriptions List 11 I/O Multiplexing and Considerations 13 6.1 6.2 Multiplexed Signals 13 Other Functions 16 Power Supply and Start-Up Considerations 17 7.1 7.2 7.3 7.4 Power Domain Overview Power Supply Considerations Power-Up Power-On Reset and Brown-Out Detector 17 17 19 19 Product Mapping 20 Automotive Quality Grade 21 10 Data Retention 21 11 Memories 22 11.1 11.2 11.3 Embedded Memories 22 Physical Memory Map 22 NVM Calibration and Auxiliary Space 24 12 Processor And Architecture 27 12.1 12.2 12.3 12.4 12.5 12.6 Cortex M0+ Processor Nested Vector Interrupt Controller Micro Trace Buffer High-Speed Bus System AHB-APB Bridge PAC – Peripheral Access Controller 27 29 30 31 35 36 13 Peripherals Configuration Summary 43 14 DSU – Device Service Unit 45 14.1 14.2 14.3 14.4 14.5 14.6 Overview Features Block Diagram Signal Description Product Dependencies Debug Operation 45 45 45 46 46 47 Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1008 14.7 14.8 14.9 14.10 14.11 14.12 14.13 Chip-Erase Programming Intellectual Property Protection Device Identification Functional Description Register Summary Register Description 48 48 49 50 51 56 59 15 Clock System 81 15.1 15.2 15.3 15.4 15.5 15.6 15.7 Clock Distribution Synchronous and Asynchronous Clocks Register Synchronization Enabling a Peripheral On-demand, Clock Requests Power Consumption vs Speed Clocks after Reset 81 82 82 86 87 87 87 16 GCLK – Generic Clock Controller 89 16.1 16.2 16.3 16.4 16.5 16.6 16.7 16.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 89 89 89 90 90 91 96 97 17 PM – Power Manager 111 17.1 17.2 17.3 17.4 17.5 17.6 17.7 17.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 111 111 112 112 112 114 123 124 18 SYSCTRL – System Controller 144 18.1 18.2 18.3 18.4 18.5 18.6 18.7 18.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 144 144 146 146 147 148 163 165 19 WDT – Watchdog Timer 209 19.1 19.2 19.3 19.4 Overview Features Block Diagram Signal Description 209 209 209 210 Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1009 19.5 19.6 19.7 19.8 Product Dependencies Functional Description Register Summary Register Description 210 211 216 217 20 RTC – Real-Time Counter 227 20.1 20.2 20.3 20.4 20.5 20.6 20.7 20.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 227 227 227 228 228 230 236 239 21 DMAC – Direct Memory Access Controller 271 21.1 21.2 21.3 21.4 21.5 21.6 21.7 21.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 271 271 272 272 272 274 292 295 22 EIC – External Interrupt Controller 335 22.1 22.2 22.3 22.4 22.5 22.6 22.7 22.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 335 335 335 336 336 337 341 342 23 NVMCTRL – Non-Volatile Memory Controller 354 23.1 23.2 23.3 23.4 23.5 23.6 23.7 23.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 354 354 354 354 355 355 362 363 24 PORT 379 24.1 24.2 24.3 24.4 24.5 24.6 Overview Features Block Diagram Signal Description Product Dependencies Functional Description 379 379 380 380 380 382 Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1010 24.7 24.8 Register Summary 387 Register Description 389 25 EVSYS – Event System 406 25.1 25.2 25.3 25.4 25.5 25.6 25.7 25.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 406 406 407 407 407 408 413 414 26 SERCOM – Serial Communication Interface 432 26.1 26.2 26.3 26.4 26.5 26.6 Overview Features Block Diagram Signal Description Product Dependencies Functional Description 432 432 432 432 433 434 27 SERCOM USART – SERCOM Universal Synchronous and Asynchronous Receiver and Transmitter 440 27.1 27.2 27.3 27.4 27.5 27.6 27.7 27.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 440 440 441 441 441 443 454 456 28 SERCOM SPI – SERCOM Serial Peripheral Interface 478 28.1 28.2 28.3 28.4 28.5 28.6 28.7 28.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 478 478 478 478 479 480 489 491 29 SERCOM I2C – SERCOM Inter-Integrated Circuit 511 29.1 29.2 29.3 29.4 29.5 29.6 29.7 29.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 511 511 511 512 512 513 531 536 Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1011 30 I2S - Inter-IC Sound Controller 574 30.1 30.2 30.3 30.4 30.5 30.6 30.7 30.8 30.9 Overview Features Block Diagram Signal Description Product Dependencies Functional Description I2S Application Examples Register Summary Register Description 574 574 575 575 576 578 589 591 593 31 TC – Timer/Counter 610 31.1 31.2 31.3 31.4 31.5 31.6 31.7 31.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 610 610 611 612 612 613 624 627 32 TCC – Timer/Counter for Control Applications 651 32.1 32.2 32.3 32.4 32.5 32.6 32.7 32.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 651 651 652 652 653 654 684 687 33 USB – Universal Serial Bus 744 33.1 33.2 33.3 33.4 33.5 33.6 33.7 33.8 33.9 Overview Features USB Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description Test Registers 744 744 745 746 746 748 764 773 846 34 ADC – Analog-to-Digital Converter 848 34.1 34.2 34.3 34.4 34.5 34.6 34.7 34.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 848 848 849 849 850 851 861 863 Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1012 35 AC – Analog Comparators 888 35.1 35.2 35.3 35.4 35.5 35.6 35.7 35.8 35.9 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Additional Features Register Summary Register Description 888 888 889 889 889 891 897 900 901 36 DAC – Digital-to-Analog Converter 917 36.1 36.2 36.3 36.4 36.5 36.6 36.7 36.8 Overview Features Block Diagram Signal Description Product Dependencies Functional Description Register Summary Register Description 917 917 917 917 918 919 923 924 37 PTC - Peripheral Touch Controller 934 37.1 37.2 37.3 37.4 37.5 37.6 Overview Features Block Diagram Signal Description Product Dependencies Functional Description 934 934 935 936 936 938 38 Electrical Characteristics 939 38.1 38.2 38.3 38.4 38.5 38.6 38.7 38.8 38.9 38.10 38.11 38.12 38.13 38.14 Disclaimer Absolute Maximum Ratings General Operating Ratings Supply Characteristics Maximum Clock Frequencies Power Consumption Peripheral Power Consumption I/O Pin Characteristics Analog Characteristics NVM Characteristics Oscillators Characteristics PTC Typical Characteristics USB Characteristics Timing Characteristics 939 939 941 941 942 943 946 950 952 963 964 970 973 975 39 Packaging Information 981 39.1 39.2 39.3 Thermal Considerations 981 Package Drawings 982 Soldering Profile 987 40 Schematic Checklist 988 40.1 Introduction 988 Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1013 40.2 40.3 40.4 40.5 40.6 40.7 40.8 Power Supply External Analog Reference Connections External Reset Circuit Unused or Unconnected Pins Clocks and Crystal Oscillators Programming and Debug Ports USB Interface 988 989 991 991 992 995 999 41 Errata 1001 41.1 Revision E 1001 42 About This Document 1004 42.1 42.2 Conventions 1004 Acronyms and Abbreviations 1005 Table of Contents 1008 Atmel | SMART SAM DA1 [DATASHEET] Atmel-9349A–SAM-DA1_Datasheet–10/2015 1014 ARM Connected Logo Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com © 2015 Atmel Corporation / Rev.: Atmel-9349A-SAM-DA1_Datasheet_10/2015 Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation in U.S and other countries ARM®, ARM Connected® logo, and others are the registered trademarks or trademarks of ARM Ltd Other terms and product names may be trademarks of others DISCLAIMER: The information in this document is provided in connection with Atmel products No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice Atmel does not make any commitment to update the information contained herein Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life SAFETY-CRITICAL, MILITARY, AND AUTOMOTIVE APPLICATIONS DISCLAIMER: Atmel products are not designed for and will not be used in connection with any applications where the failure of such products would reasonably be expected to result in significant personal injury or death (“Safety-Critical Applications”) without an Atmel officer's specific written consent Safety-Critical Applications include, without limitation, life support devices and systems, equipment or systems for the operation of nuclear facilities and weapons systems Atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by Atmel as military-grade Atmel products are not designed nor intended for use in automotive applications unless specifically designated by Atmel as automotive-grade