digital logic design mini projects

Lecture Digital logic design - Lecture 13: Problems (Mano)

Lecture Digital logic design - Lecture 13: Problems (Mano)

... also shown in Fig Using the truth table and K-Map, design the BCD-to-seven-segment decoder using the minimum number of gates 15 Problem (Mano) Design a combinational circuit that converts a four ... the decimal digit is also shown in Fig Using the truth table and K-Map, design the BCD-to-seven-segment decoder using the minimum number of gates Problem (Mano) An ABCD-to-seven segment decoder ... the decimal digit is also shown in Fig Using the truth table and K-Map, design the BCD-to-seven-segment decoder using the minimum number of gates 10 Problem (Mano) An ABCD-to-seven segment decoder

Ngày tải lên: 12/02/2020, 13:52

21 41 0
Lecture Digital logic design - Lecture 11: Combinational design  procedure

Lecture Digital logic design - Lecture 11: Combinational design procedure

... +d(10,11,12,13,14,15) 28 Minimize K-Maps ° W minimization ° Find W = A + BC + BD 29 Minimize K-Maps ° X minimization ° Find X = BC’D’+B’C+B’D 30 Minimize K-Maps ° Y minimization ° Find Y = CD + C’D’ 31 Minimize ... Lecture 11 Combinational Design Procedure Overvie w ° Design digital circuit from specification ° Digital inputs and outputs known • Need to determine logic that can transform data ° Start ... solution reached is minimal ° Have seen five ways to represent a function: • Boolean expression • truth table • logic circuit • minterms/maxterms • Karnaugh map Combinational logic design ° Use multiple

Ngày tải lên: 12/02/2020, 14:29

35 49 0
Lecture Digital logic design - Lecture 25: Shift registers

Lecture Digital logic design - Lecture 25: Shift registers

... Table 26 Design a serial adder using a sequential -logic procedure 27 Design a serial adder using a sequential -logic procedure 28 Design a serial adder using a sequential -logic procedure 29 Design ... combin logic 25 Design a serial adder using a sequential -logic procedure Two shift registers are required to store the binary numbers to be added serially serial outputs from the registers are designated ... registers can be used with adders to build arithmetic units ° Remember: most digital hardware can be built from combinational logic (and, or, invert) and flip flops • Basic components of most computers

Ngày tải lên: 12/02/2020, 15:09

33 44 0
Lecture Digital logic design - Lecture 5: More boolean algebra

Lecture Digital logic design - Lecture 5: More boolean algebra

... and logic operations ° Function results in binary or x 0 0 1 1 y 0 1 0 1 z 1 1 F 0 0 1 x y z z’ y+z’ F = x(y+z’) F = x(y+z’) Boolean Functions ° Boolean algebra deals with binary variables and logic ... (x+y+z)(x+y+z’)(x+y’+z)(x’+y+z)(x’+y+z’) Representation of Circuits ° All logic expressions can be represented in 2level format ° Circuits can be reduced to minimal 2-level representation ° Sum of products representation ... Algebra and Logic Simplification Simplification Using Boolean Algebra Gate Network for Example 1: AB+A(B+C)+B(B+C) A AB B A B A(B+C) B+C AB+A(B+C)+B(B+C) C B B(B+C) Boolean Algebra and Logic Simplification

Ngày tải lên: 12/02/2020, 15:12

32 40 0
Lecture Digital logic design - Lecture 6: More logic functions: NAND, NOR, XOR and XNOR

Lecture Digital logic design - Lecture 6: More logic functions: NAND, NOR, XOR and XNOR

... sum-of-products and NORs • SOP to NORs • NORs to SOP ° Positive and negative logic • We use primarily positive logic in this course Logic functions of N variables ° Each truth table represents one possible ... the INVERTER, the operation symbol is not changed) Positive Logic and Negative Logic We will be emphasizing primarily on positive logic in this course Axioms and Graphical representation of DeMorgan's ... output expression for circuit via s DeMorgan’s Theorem Alternate Logic- Gate Representations Standard and alternate symbols for various logic gates and inverter Invert each input and output of the

Ngày tải lên: 12/02/2020, 15:41

34 59 0
Lecture Digital logic design - Lecture 2: More number systems/complements

Lecture Digital logic design - Lecture 2: More number systems/complements

... Digital Logic Design Lecture More Number Systems/Complements Overvie w ° Hexadecimal numbers • Related ... comp of 10101010 is 01010101 • For an n bit number N the 1’s complement is (2n-1) – N • Called diminished radix complement by Mano since 1’s complement for base (radix 2) • To find negative of

Ngày tải lên: 12/02/2020, 15:41

59 39 0
Lecture Digital logic design - Lecture 4: Boolean algebra

Lecture Digital logic design - Lecture 4: Boolean algebra

... Basic logical operators are the logic functions AND, OR and NOT ° Logic gates implement logic functions ° Boolean Algebra: a useful mathematical system for specifying and transforming logic functions ... expressions will result in a logic circuit that is equivalent to the original circuit, yet requires fewer gates A B C AB+A(B+C)+B(B+C) B A C B+A C Boolean Algebra, Logic and Gates ° Logical operators operate ... Algebra ° Formal logic: In formal logic, a statement (proposition) is a declarative sentence that is either true(1) or false (0) ° It is easier to communicate with computers using formal logic ° Boolean

Ngày tải lên: 12/02/2020, 15:51

34 57 0
Lecture Digital logic design - Lecture 3: Complements, number codes and registers

Lecture Digital logic design - Lecture 3: Complements, number codes and registers

... ° Data can move from register to register ° Digital logic used to process data ° We will learn to design this logic Register A Register B Digital Logic Circuits Register C Transfer of Information ... Digital Logic Design Lecture Complements, Number Codes and Registers Overvie w ° Complement of numbers ... Computer ° We need processing ° We need storage ° We need communication ° You will learn to use and design these components Summary ° 2’s complement most important (only representation for zero)

Ngày tải lên: 12/02/2020, 18:08

33 53 0
Lecture Digital logic design - Lecture 30: Read Only Memory (ROM)

Lecture Digital logic design - Lecture 30: Read Only Memory (ROM)

... although the speeds still don’t compare with regular RAMs • MP3 players, digital cameras and other toys use CompactFlash, Secure Digital, or MemoryStick cards for non-volatile storage • Many devices ... Rather wasteful, since lots of storage bits • For functions, doesn’t take advantage of K-maps, other minimization Rea dOnl Each minterm of each function can be specified y Me mor 3 Inputs A B C F0 ... ° Internal organization similar to SRAM ° ROMs are effective at implementing truth tables • Any logic function can be implemented using ROMs ° Multiple single-bit functions embedded in a single

Ngày tải lên: 12/02/2020, 18:25

25 53 0
Lecture Digital logic design - Lecture 31: PLAs and Arithmetic Logic Unit (ALU)

Lecture Digital logic design - Lecture 31: PLAs and Arithmetic Logic Unit (ALU)

... PLAs and Arithmetic Logic Unit (ALU) Programmable Logic Array ° A ROM is potentially inefficient because it uses a decoder, which generates all possible minterms No circuit minimization is done ... connects +15V to R2 35 Digital Logic Simulation Click the Open button in the Toolbar Select the SIM.CKT file from the list of available circuits The SIM.CKT circuit contains several mini- circuits and ... Move the tip of the Probe Tool to the Logic Switch labeled “Toggle Switch.” and click near its center The Logic Display connected to the output of this minicircuit should then start to toggle

Ngày tải lên: 12/02/2020, 19:02

37 101 0
Lecture Digital logic design - Lecture 10: Circuit analysis procedure

Lecture Digital logic design - Lecture 10: Circuit analysis procedure

... we convert from one to the other? Logic circuits ° Logic circuits for digital systems may be combinational or sequential ° Combinational circuit consists of logic gates whose outputs at any time ... concept – analyze digital circuits • Given a circuit - Create a truth table - Create a minimized circuit ° Approaches • Boolean expression approach • Truth table approach ° Leads to minimized hardware ... propagation delay of the logic gate (tp) ° The propagation delay for a to output change (tpLH) may be different than the delay for a to change (tpHL) Gat e Del ays (co nt’d ) Digital? ?signal: Important

Ngày tải lên: 12/02/2020, 20:23

39 56 0
Lecture Digital logic design - Lecture 20: Sequential circuits: Latches

Lecture Digital logic design - Lecture 20: Sequential circuits: Latches

... Unstable combinati on 1 X race conditio 21 Review: Steering Gates ° The flow of logic can be controlled with a logic gate Signal 10 °°10 Control The NAND as a steering gate inverts the input ... 0 1 No  c h ang e No  c h ang e  ( r e s e t ) 1 ( s e t ) A vo id ! ° Notice the hierarchical design! • The dotted blue box is the S’R’ latch from the previous slide • The additional NAND gates

Ngày tải lên: 12/02/2020, 20:43

37 46 0
Lecture Digital logic design - Lecture 17: Problems (Mano)

Lecture Digital logic design - Lecture 17: Problems (Mano)

... 2’s complementer? Try it yourself 10 Problem Design a four-bit combinational circuit incrementer (a circuit that adds to a four-bit binary number (b) Design a four-bit combinational circuit decrementer ... (Mano) Design a combinational circuit that compares two four-bit numbers to check if they are equal The circuit output is equal to if the two numbers are equal and otherwise 16 Problem Draw the logic ... Using a decoder and external gates, design the combinational circuit defined by the following three Boolean functions 18 Problem Using a decoder and external gates, design the combinational circuit

Ngày tải lên: 12/02/2020, 22:25

27 48 0
Lecture Digital logic design - Lecture 21: Sequential circuits: Flip flops

Lecture Digital logic design - Lecture 21: Sequential circuits: Flip flops

... Asynchronous ° Asynchronous design is often unavoidable: • User interfaces • Different speed devices • Clocks are difficult to distribute over long distances ° More difficult to design, design tools generally ... asynchronous design tools are being developed ° Most current devices us synchronous logic inside local blocks, and asynchronous communication between blocks ° What constitutes a “block” is shrinking as logic ... increase • Currently making jump to chips with multiple independent blocks, or fully asynchronous logic 43 Types of Sequential Circuits • Two types of sequential circuits: • Synchronous: The behavior

Ngày tải lên: 12/02/2020, 23:39

53 84 0
Lecture Digital logic design - Lecture 15: Magnitude comparators and multiplexers

Lecture Digital logic design - Lecture 15: Magnitude comparators and multiplexers

... other word, a comparator determines the relationship of two binary quantities Designing Comparators Functionally Designing Comparators Functionally Add an enable line A A>B A=B B Enable Build ... Select one out of several bits • Some inputs used for selection • Also can be used to implement logic Comparators ° Comparing two binary words is a common operation in computers ° A circuit that ... comparators ° XOR and XNOR gates can be viewed as 1-bit comparators ° Comparator is a combinational logic circuit that compares the magnitudes of two binary quantities to determine which one has the

Ngày tải lên: 12/02/2020, 23:58

42 82 0
Lecture Digital logic design - Lecture 12: More about combinational analysis and design procedures

Lecture Digital logic design - Lecture 12: More about combinational analysis and design procedures

... Example: Design the minimum-cost logic circuit that implements the following Boolean expressions F1(A,B,C,D) = m(1,2,3,7,11,15) F2(A,B,C,D) = M(0,1,2,3,4,8,12) 54 Functional Decomposition Example: Design ... 1 0 1 10 Multilevel Logic Circuits Two techniques that can be used to realize multilevel logic circuits: Factoring Functional Decomposition 52 Factoring Example: Realize a logic circuit that has ... Lecture 12 More about Combinational Analysis and Design Procedures Logic Circuit Analysis Analysis: Determining the behavior of a system given its description The description

Ngày tải lên: 13/02/2020, 00:14

66 54 0
Lecture Digital logic design - Lecture 22: Sequential circuits analysis

Lecture Digital logic design - Lecture 22: Sequential circuits analysis

... = D.(Q +Q) = D.1 = D 10 Design: Example ° Determine input expression for flip-flop and y output 35 Design Example °From Boolean expressions built, draw logic diagram 36 Design: Example ° How if ... combinational logic which realizes the input functions for the flip-flops and the output functions The combinational logic may be implemented with gates, with a ROM, or with a PLA Sequential Logic (Why) ... Circuit Design (cont’d) Design table for the binary counter example 46 Seq uen tial Circ uit Des ign (co nt’d ) Use K-maps to simplify expressions for JK inputs 47 Sequential Circuit Design (cont’d)

Ngày tải lên: 13/02/2020, 00:30

49 58 0
Lecture Digital logic design - Lecture 9: NAND and XOR Implementations

Lecture Digital logic design - Lecture 9: NAND and XOR Implementations

... primitives nand nor and or not • The above alternate symbols can be used to facilitate the analysis and design of NAND and NOR gate networks NA NDNA DeMorgan’s Law: ND & (a + b)’ = a’ b’ NO a + b = (a’ ... "bubble" must be matched by a corresponding "bubble" For ms• Conservation of inversions • Do not alter logic function ° Example: AND/OR to NAND/NAND A A B B C D Z C D NAND NAND NAND Z Con ver °sio Example: ... AND gate • 10 wires (7 literals plus internal wires) A B C D E F G X Conversion of Multi-level Logic to NAND ° FGates = A (B + C D) + B C' Level 1 original AND­OR  network introduction and conservation of 

Ngày tải lên: 13/02/2020, 00:36

28 44 0
Lecture Digital logic design - Lecture 8: More Karnaugh Maps and Don’t Cares

Lecture Digital logic design - Lecture 8: More Karnaugh Maps and Don’t Cares

... Need to make sure all 1’s are covered ° Try to minimize total product terms ° Design could be implemented using NANDs and NORs Don’t cares ° In digital systems it often happens that certain input ... • Larger examples exist ° Don’t care conditions help minimize functions • Output for don’t cares are undefined ° Result of minimization is minimal sum-of-products ° Result contains prime implicants ... 6 prime implicants: A'B'D, BC', AC, A'C'D, AB, B'CD D essential minimum cover: AC + BC' + A'B'D B A 5 prime implicants: BD, ABC', ACD, A'BC, A'C'D essential minimum cover: 4 essential implicants C 0 1 1 0 1

Ngày tải lên: 13/02/2020, 01:04

30 105 0
Digital logic design

Digital logic design

... Computer Engineering ECE380 Digital Logic Introduction to Logic Circuits: Design Examples Dr. D. J. Jackson Lecture 5-2Electrical & Computer Engineering Design examples • Logic circuits provide ... Engineering ECE380 Digital Logic Introduction to Logic Circuits: Synthesis using AND, OR, and NOT gates Dr. D. J. Jackson Lecture 4-2Electrical & Computer Engineering Example logic circuit design • ... AND logical AND –OR logical OR – NOT logical NOT – NAND, NOR, XOR, XNOR (covered later) • Assignment operator <= – A variable (usually an output) should be assigned the result of the logic...

Ngày tải lên: 27/03/2014, 20:00

251 824 0

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