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Lecture Digital logic design - Lecture 22: Sequential circuits analysis

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Cấu trúc

  • Lecture 22 Sequential Circuits Analysis

  • Combinational vs. Sequential

  • Synchronous vs. Asynchronous

  • General Models for Sequential Circuits

  • Sequential Logic (Why) ?

  • Analysis of Clocked Sequential Circuits

  • The Current “State”

  • State

  • “Finite-State Machines”

  • D Flip-Flop with Clock input

  • Boolean equation for D Flip-Flop

  • Sequential Circuit Analysis

  • Slide 13

  • Slide 14

  • Slide 15

  • Slide 16

  • Slide 17

  • Slide 18

  • Slide 19

  • Flip-flop Input Function

  • Slide 21

  • Analysis: Example

  • Analysis: Example

  • Slide 24

  • Flip-flop Excitation Tables

  • Slide 26

  • Designing Sequential Circuit

  • Design: Example

  • Design: Example

  • Slide 30

  • Slide 31

  • Slide 32

  • Slide 33

  • Slide 34

  • Slide 35

  • Design Example

  • Slide 37

  • Slide 38

  • Design a Synchronous Counter

  • Slide 40

  • Slide 41

  • Slide 42

  • Sequential Circuit Design

  • Sequential Circuit Design (cont’d)

  • Slide 45

  • Slide 46

  • Slide 47

  • Slide 48

  • Slide 49

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The following will be discussed in this chapter: Combinational vs. sequential, synchronous vs. asynchronous, general models for sequential circuits, sequential logic (why)? analysis of clocked sequential circuits, the current “state”, sequential circuit analysis,...

Lecture 22 Sequential Circuits Analysis Combinational vs Sequential   Combinational Logic Circuit  Output is a function only of the present inputs  Does not have state information  Does not require memory Sequential Logic Circuit (Finite State Machine)  Output is a function of the present state and at times present state and input  Has state information  Requires memory  Uses Flip-Flops to implement memory Synchronous vs Asynchronous   Synchronous Sequential Logic Circuit  Clocked  All Flip-Flops use the same clock and change state on the same triggering edge Asynchronous Sequential Logic Circuit  No clock  Can change state at any instance in time  Faster but more complex than synchronous sequential circuits General Models for Sequential Circuits A sequential circuit can be divided conveniently into two parts the flip-flops which serve as memory for the circuit and the combinational logic which realizes the input functions for the flip-flops and the output functions The combinational logic may be implemented with gates, with a ROM, or with a PLA Sequential Logic (Why) ? ° Sequential circuit has additional dimension which is time ° Combinational logic only depends on current input ° Sequential circuit output depends on previous input other than current input ° More powerful than combinational logic ° Able to model condition that can’t be accommodated by combinational logic Analysis of Clocked Sequential Circuits ° Analysis of a sequential circuit consists of obtaining a table or a diagram for the time sequence of inputs, outputs, and internal states ° Sequential circuit behavior is determined from the inputs, the outputs, and the state of its flip-flops ° Boolean expressions that describe the behavior of the sequential circuit ° Outputs and the next state are both a function of the inputs and the present state ° A logic diagram is recognized as a clocked sequential circuit if it includes flip-flops ° Logic diagram may or may not include combinational circuit gates The Current “State” ° It is inconvenient, and often impossible, to describe the behaviour of a sequential circuit by means of a table that lists outputs as a function of the input sequence that has been received up until the current time ° To know where you are going next, you need to know where you are now ° With the TV channel selector, it is impossible to determine what channel is currently selected by looking only at the preceding sequence of presses, whether we look at the preceding 10 presses or the preceding 1000 ° More information, the current “state” of the channel selector, is needed State ° The state of a sequential circuit is a collection of state variables whose values at any particular time contain all the information about the past necessary to account for the circuit’s future behaviour ° In the channel-selector example, the current channel number is the current state ° Inside the TV, this state might be stored as seven binary state variables representing a decimal number between and ° Given the current state (channel number), we can always predict the next state as a function of the inputs (up/down pushes) “Finite-State Machines” ° In a digital circuit, state variables have binary values ° A circuit with n binary state variables has 2n possible states ° 2n is always finite, so sequential circuits are sometimes called finite-state machines D Flip Flo p with Clo ck inp ut Q D Q(t+1) 0 0 1 0 1 Q(t+1) = Q D + Q.D = D.(Q +Q) = D.1 = D 10 Design: Example ° Determine input expression for flip-flop and y output 35 Design Example °From Boolean expressions built, draw logic diagram 36 Design: Example ° How if using JK flip-flop (Homework) 37 38 Design a Synchronous Counter ° Counter: sequential circuit cycle through state sequence ° Binary counter: follow binary sequence n-bit binary counter (with n flip-flop) able to count from to 2n-1 ° Example: 3-bit binary counter (using T flip-flop) 39 Design a Synchronous Counter ° 3-bit binary counter (cont) 40 Design a Synchronous Counter ° 3-bit binary counter 41 42 Seq uen °tial Sequential circuit consists of Circ uit • A combinational circuit that produces output • A feedback circuit Des ign - We use JK flip-flops for the feedback circuit ° Simple counter examples using JK flip-flops • Provides alternative counter designs • We know the output - Need to know the input combination that produces this output - Use an excitation table – Built from the truth table 43 Seq uen tial Circ uit Des ign (co nt’d ) 44 Sequential Circuit Design (cont’d) ° Build a design table that consists of • Current state output • Next state output • JK inputs for each flip-flop ° Binary counter example • 3-bit binary counter • JK flip-flops are needed • Current state and next state outputs are bits each • pairs of JK inputs 45 Sequential Circuit Design (cont’d) Design table for the binary counter example 46 Seq uen tial Circ uit Des ign (co nt’d ) Use K-maps to simplify expressions for JK inputs 47 Sequential Circuit Design (cont’d) ° Final circuit for the binary counter example • Compare this design with the synchronous counter design 48 Thanks 49 ... Asynchronous Sequential Logic Circuit  No clock  Can change state at any instance in time  Faster but more complex than synchronous sequential circuits General Models for Sequential Circuits A sequential. .. powerful than combinational logic ° Able to model condition that can’t be accommodated by combinational logic Analysis of Clocked Sequential Circuits ° Analysis of a sequential circuit consists... for JK flip-flop, S or R for SR flip-flop, D for D flip-flop, T for T flip-flop respectively) and the second character represents the name of the flipflop 21 Analysis: Example ° Given a sequential

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