Hot carrier mechanisms in advanced NMOS transistors 4

Chapter Three Mechanisms for N-MOSFET Hot-Carrier Degradation at Operating Voltage below Oxide Potential Barrier Conventionally, hot-carrier degradation is known to correlate strongly with the magnitude of the substrate current on the basis of the widely acclaimed “lucky electron” model [1][2]. This approach, however, fails to account for the continued existence of gate current Ig at drain voltage Vd below V [3]. Now, it is generally agreed that Ig at low Vd is contributed by a small group of electrons, which can possess energy much greater than qVd, or the Si/SiO2 barrier of 3.1 eV, through non-local effects such as electron-electron scattering [4]-[6], impact ionization feedback [7]-[9] etc. Nonetheless, Ib still remains the basis for interpretation of hot-carrier effects to these days, due largely to the overwhelming success of the lucky-electron model [2][10]. It should, however, be highlighted that Ib at low Vd is mainly caused by a large population of electrons with much lower energy between 1.2 eV and qVd [11], which may not be predominantly responsible for the hot-carrier damage under specific conditions. Indeed, a recent study on the deep submicrometer NMOSFET showed that maximum degradation occurred at gate stress voltage Vg = Vd, not Vg ≈ 0.5Vd as shown in Fig. 3.1 Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 78 [12]. It was explained that the shift occurred when ratio R, defined as ratio of IbIbmax to IbVg=Vd , is smaller than a critical value. In other words, the change over is partly due to larger number of hot carriers at Vg = Vd condition, that possesses sufficient energy for interface state generation. The other factor that influenced this change is the proximity of the current flow with the Si/SiO2 interface. Fig. 3.1 NMOSFET Idsat degradation after 100 channel hot-carrier stress versus channel length. Devices were stressed at either Ibpeak or at Vg=Vd. Technology A denotes devices processed using 0.25 µm technology. Technology B denotes devices processed using 0.1µm technology [12]. It is worth mentioning that Lee et al. have also presented a case that is consistent with the above argument [13]. The authors explained that the current flow under Vg=Vd stress condition is nearer to the surface relative to that under Vg=0.5Vd condition and this is depicted in Fig. 3.2. This resulted in higher probability of hotcarrier injection, hence the shift in worst-case degradation. Nevertheless, the mechanism remains unclear [13]. Chapter Hot-carrier Mechanism Below Oxide Potential Barrier (a) 79 (b) Fig. 3.2 Comparison of maximum impact ionization point for (a) drain avalanche hotcarrier (b) channel hot-carrier stress modes for 0.15µm NMOSFET [13]. In damage creation perspective, the classical model for generation of Si/SiO2 interface states (Nit) is ascribed to the injection of hot electrons/holes into the gate oxide [2] [14]. The concept of a threshold electron energy (> eV) for the onset of interface damage was challenged when Nit generation persisted for drain voltage Vd < V. However, it was believed that the consistency of the classical model was maintained [10] by attributing the continued existence of Nit generation to electrons in the high-energy regime (> eV) of the energy distribution. Recently, Chen et al. provided an improved understanding to traditionally accepted concept that interface traps are generated mostly by hot hole and electron injection into the oxide [15]. It was suggested that the bulk of the channel electrons confined close to the Si/SiO2 interface under high Vg condition, are responsible for the larger interface state generation as discussed in section 1.1.4. However, this does not offer a complete explanation, since a similar change in current path also happens in older devices. In retrospect, the bulk of the channel electrons are having energies below eV in Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 80 today’s state-of-the-art technology. Hence, the role of less energetic electrons in interface state generation needs to be investigated. There are two main sections in this chapter. In section 3.2, new experimental evidence is presented, indicating that the shift in the worst-case stress condition of the deep submicrometer NMOSFET is caused by the increased injection of the “high-energy tail” electrons into the gate oxide as Vg approaches Vd. The role of these high-energy tail (HET) electrons on NMOSFET degradation in the sub-3 V regime is investigated in section 3.3. By modulating the HET electron population via reverse substrate biasing during channel hot-electron (CHE) stressing, evidence of a composite Nit generation mode is revealed. The experimental findings show that a large fraction of the Nit generated in the – V stress Vd range may not be solely attributed, in a consistent manner, to the HET electrons. A significant interface damage contribution from the majority of the channel electrons, whose energy ≤ qVd (< eV), is implied. Contribution from the minority HET electrons, however, can become increasingly dominant as Vd decreases. On the basis that these HET electrons gain excess energy through secondary means [4]-[7], this composite Nit generation mode may significantly influence the accuracy of hot-carrier reliability projection. 3.1 Experimental NMOSFETs with drawn gate length of 0.18 µm, gate width of 20 µm and oxide thickness of ~30 Å were studied. Rapid thermal oxidation, followed by N2O nitridation produced an oxide with ~1% N2 content. Source/drain extensions were formed via As implantation, at 1.4×1015 cm-2, KeV. Boron halo implant at 4×1013 cm-2, 15 keV was employed for punchthrough suppression. Shift in saturation drain current ∆Id,sat was measured at Vg = Vd Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 81 = 1.8 V; Ido,sat indicates pre-stress value. Both threshold voltage shift ∆Vth and percentage decrease in linear transconductance ∆gm/gmo were obtained from linear I-V characteristics, with Vd = 0.1 V. Threshold voltage Vth is defined as the gate voltage that corresponds to µA drain current per µm gate width. Charge pumping current measurement employed a constant gate top voltage Vgt = V and variable gate base voltage Vgb, with rise/fall time gradient of 60 ns/V. ∆Icp was extracted at Vgb = −3 V. 3.2 Mechanism for the Worst-Case Hot-Carrier Stress Degradation In this section, the shift in the worst-case stress condition of the deep submicrometer NMOSFET is investigated. Hot-carrier stress was initially carried out at a fixed Vd = 2.7 V, Vb = 0, and variable Vg. The NMOSFETs were stressed for 5×103 s and the various electrical parameters were extracted. Fig. 3.3 (a) shows the threshold voltage shift ∆Vth, and percentage decrease in the forward and reverse saturation drain current ∆Id,sat / Ido,sat, as a function of Vg. Fig. 3.3 (b) shows the increase in charge pumping current ∆Icp, and the percentage decrease in linear transconductance ∆gm / gmo. Also shown for comparison is the Ib versus Vg characteristic (dashed line). It is interesting to note that maximum degradation no longer occurs at the Vg (≈ 0.5Vd) that gives rise to maximum Ib. The maximum degradation point has in fact shifted above 0.5Vd, and occurs at Vg ≈ 0.8Vd for our devices. Similar behavior is also seen at other stress intervals, as hot-carrier stressing of devices with direct tunneling gate oxides at Vg ≈ 0.8Vd and ≈ 0.5Vd yield similar degradation slopes. To ensure that this observation is not caused by increased Si/SiO2 interface damage due to direct tunneling leakage in devices with ultra-thin gate oxides, control experiments with Vd = were also performed. In such cases, hardly any damage was found after Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 82 equivalent stress period. The shift in the maximum degradation point towards Vd suggests the importance of Ig, which is made up of the HET electrons. This pool of electrons achieved their energies through effects namely the electron-electron scattering or impact ionization feedback as discussed in section 1.1.5 previously. Fig. 3.3 (a) Threshold voltage shift ∆Vth and percentage decrease in the saturation drain current ∆Id,sat / Ido,sat as a function of gate stress voltage Vg. Filled triangular symbols denote the forward mode characteristics while the open triangular symbols denote the reverse mode characteristics of ∆Id,sat / Ido,sat (b) shows the corresponding increase in charge pumping current ∆Icp and the percentage decrease in maximum linear transconductance ∆gm / gmo. Also shown in the same plot is the substrate current Ib versus Vg characteristics (dashed line; Vd = 2.7 V). The dotted lines correspond to the Vg value that gives maximum Ib. In order to validate the role of HET electrons in the shift of worst case degradation, a technique to modulate them experimentally is thus essential. The kinetics of electronelectron scattering is entirely theoretical, though it is well conceived as a plausible mechanism for modulating the HET electron. On the other hand, the amount of HET Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 83 electrons can be adjusted by applying a reverse substrate bias or also known as impact ionization feedback. A reverse-biased Vb increases the electric field of the drain-substrate junction, and induces secondary impact ionization by enhanced heating of holes [7]-[9]. Monte-Carlo simulation shows a prominent high-energy tail, comprising tertiary electrons from the impact ionization feedback process, supported by experimental evidence from light emission measurement [16]. This well established mechanism for Ig enhancement via impact ionization feedback is also adopted to obtain a new gate current injection mode which can be used in FLASH applications [8]. Thus, in relation to the shift in worst case hotcarrier degradation, the impact of Ig is further investigated via hot-carrier stress experiments performed with a reverse-biased Vb. The parametric shifts due to non-zero body bias stress configuration are depicted in Fig. 3.4. Fig. 3.4 (a) shows ∆Icp and ∆gm / gmo versus Vg characteristics while Fig. 3.4 (b) shows the corresponding ∆Vth and ∆Id,sat / Ido,sat (reverse mode) characteristics. The hot-carrier stress conditions and measurement biases are the same as that of Fig. 3.3, except that in this case, some stresses were carried out with a reverse-biased Vb. Also shown are the degradation characteristics obtained under conventional hotcarrier stress, i.e. Vb = 0. Several salient features should be noted. Compared to the case where Vb = 0, a shift in the maximum degradation point to Vg = Vd is evident. This is accompanied by an increasingly larger relative difference in degradation as Vg approaches Vd. The good correlation between the various parametric shifts and ∆Icp shows that the increased hot-carrier damage is mainly due to interface trap generation. These degradation characteristics would rule out the possibility that the enlarged parametric shifts under reverse-biased Vb stress condition are caused by increased electron trapping in the gate oxide. Besides, it is essential to ensure that the increased parametric Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 84 shifts are not due to conventional substrate hot-electron (SHE) injection [17]. The typical SHE injection occurs when a negative (reverse) bias is applied to the substrate, a positive bias to the gate terminal, with the drain and source grounded. Electron-hole pairs were generated as a result of the reverse substrate bias. In the case of NMOSFET, the electrons are driven by the substrate field toward the Si/SiO2 interface. As they move toward the substrate-oxide interface, they further gain kinetic energy from the high field in the surface depletion region. These electrons would eventually collect at the drain or source terminals and some of them with high enough energy could overcome the surface energy barrier and get injected into the gate oxide [18]. As a result of SHE injection, an increase in gate current [19] or number of interface states [20] is expected. In relation to current work, a control experiment with Vd = 0, Vg = 2.7 V and Vb = −2.7 V, which corresponds to the largest Vg and Vb employed, was performed. It was found that not more than pA increase in Icp (not shown) was observed after the same stress period, indicating that damage due to conventional SHE can be entirely ruled out. To further ensure that the resultant increase in the hot-carrier damage is not due to a significant change in the peak lateral field near the drain junction, owing to Vth increase under body biasing, the Ib and Ig characteristics for different Vb values were compared. Fig. 3.5 (a) shows the variations of Ib and Ig as a function of Vd. Vg was set equal to Vd during the measurement. Also shown is the direct tunneling current characteristic (thick solid line) for Vd = 0. In this case, direct tunneling gate current IgDT is largely independent of Vb, confirming that contribution from the conventional SHE mechanism is negligible. Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 85 Fig. 3.4 (a) Increase in charge pumping current ∆Icp (symbol) and percentage decrease in maximum linear transconductance ∆gm / gmo (solid line) as a function of gate stress voltage Vg, with substrate bias Vb as the parameter. (b) The corresponding threshold voltage shift ∆Vth (symbol) and percentage decrease in saturation drain current ∆Id,sat / Ido,sat (reverse mode; solid line). The effect of Vb on Ib is clearly minimal, as can be seen from the similar Ib characteristics. On the other hand, an important increase in Ig is evident for cases where Vb < 0. The former implies that the number of hot-carriers near the drain region is approximately unchanged by body biasing. Based on the lucky-electron model, hot-carrier damage should largely be similar, which clearly contradicts the results of Fig. 3.5. Evidently, the additional hotcarrier damage is caused by the increase in Ig. The above results thus unambiguously show that although Ig is contributed by a small electron population, these highly energetic electrons can have a profound impact on the hot-carrier reliability under certain favorable conditions. Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 86 Fig. 3.5 (a) Substrate (Ib) and gate (Ig) currents as a function of drain voltage Vd, with substrate bias Vb as the parameter. During measurement, the gate voltage Vg was set equal to Vd. The thick solid line at the bottom right-hand corner shows much smaller Ig for Vd = 0, where no dependence on Vb is found. (b) Normalized gate current (Ig / Id) versus normalized substrate current (Ib / Id) characteristics (Vb = 0), with Vg − Vd as the parameter. It could be also argued that gate current due to direct tunneling would dominate as the oxide thickness is reduced, rendering the role of HET electrons in hot-carrier degradation insignificant. However, the work by Tsai et al. indicated that the worsening of hot-carrier degradation with thinner oxide (< 20 nm) is the result of Auger recombination process via valence band tunneling from the substrate [21]. This recombination process yielded an increase in the HET electrons. Hence, the effect arising from this pool of energetic electrons on the hot-carrier degradation remains vital in ultra-thin oxide regime. To further investigate the reason behind the progressive increase in hot-carrier damage as Vg approaches Vd, we consider the Ig / Id versus Ib / Id characteristics, where Id is the drain current. By this approach, the Ig and Ib dependence on the inversion layer density is eliminated, and the injection tendency of the HET electrons can be examined with Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 87 respect to the impact ionization rate. Fig. 3.5 (b) shows the results. The dotted line connects data points belonging to the same Vd. A significant enhancement in Ig / Id is apparent, despite the decrease in Ib / Id, as the difference Vg − Vd is made progressively positive. The increase in Ig / Id can be attributed to the increasingly attractive oxide field near the drain region, as Vg approaches Vd. Also indicated in Fig. 3.5 (b) are the slopes of the various Ig / Id versus Ib / Id characteristics. The decrease in n, from 3.2 to 1.9 as Vg − Vd changes from −1 to V shows the reduction in electron-injection barrier when oxide field gradually becomes attractive [1][2]. 3.3 Composite Interface State Generation under CHE Stressed Condition To further probe the role of these high-energy tail (HET) electrons on NMOSFET degradation in the sub-3 V regime, a series of CHE stresses were conducted. These HET electron population was modulated via reverse substrate biasing, which enhanced the impact ionization feedback (IIF) effect [7][8]. It has been shown that the primary CHE effect remains approximately constant, i.e. lateral heating by the applied Vd is almost unaffected by the reverse substrate bias Vb as depicted in Fig. 3.5 (a) [22]. This allows the extent of interface damage induced by the HET electrons to be assessed in relation to the primary CHE effect. A significant enhancement in the HET electron population under reverse substrate biasing is depicted in Fig. 3.6, through the several orders of magnitude increase in the hot-electron injection current (Ige). The substantial Ige in the conventional case, i.e. Vb = 0, for Vg ≥ 0.5Vd should also be noted. The presence of a non-negligible Ige for Vd smaller than the Si/SiO2 barrier potential has commonly been ascribed to electron-electron interaction [4][6], although some Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 88 contribution from the IIF effect may be expected by virtue of the inherently reverse-biased drain-substrate junction. Also shown are the substrate current (Ib) plots, showing negligible influence of the reverse Vb on Ib for Vg ≥ 0.5Vd. Fig. 3.6 (a) Substrate (Ib) and hot-electron gate (Ige) current versus gate voltage Vg characteristics, with the substrate bias (Vb) as the parameter. The drain bias Vd = 2.7 V. Also shown for comparison is the gate tunneling leakage characteristics (Vd = Vb = 0). (b) Increase in the gate tunneling leakage ∆Ig / Igo (partially filled symbols) and charge pumping current ∆Icp (open symbols) versus stress time t characteristics for conventional (Vb = 0) (∆ ) and reverse substrate-biased Vb = –1.8 V (□ ) CHE stress (Vg = 0.5Vd = 1.5 V). Device parametric shifts arising from a reverse substrate-biased CHE stress (Vb = –1.8 V), at Vg = 0.5Vd, are compared to that arising from conventional CHE stress (Vb = 0) in Fig. 3.6(b) and 3.7. For the former, the significantly increased post-stress gate tunneling leakage ∆Ig / Igo correlates well with ~ orders of magnitude increase in Ige as shown in Fig. 3.6(b), indicating substantial bulk oxide defect generation by enhanced hot-electron Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 89 injection. A larger Ige implies that a greater number of the HET electrons are impinging on the Si/SiO2 interface. But the expected impact of this increased Ige on Nit generation is not borne out by the charge pumping current ∆Icp characteristic, which depicts only a slight increase in ∆Nit. Marginal changes in other parameters, such as transconductance, saturation drain current etc., are also evident in Fig. 3.7. Fig. 3.7 (a) Threshold voltage shift ∆Vth and fractional decrease in the drain current ∆Id / Ido as a function of stress time t. The linear ∆Id / Ido was measured at Vg = 0.6 V (~ Vth), Vd = 0.1 V, while the saturation ∆Id / Ido was measured at Vg = Vd = 1.8 V in the reverse mode. (b) The corresponding forward saturation ∆Id / Ido and linear ∆Id / Ido (measured at Vg = 1.8 V) characteristics. Also shown is the fractional decrease in the linear transconductance ∆gm / gmo. Fig. 3.7 also shows time-dependent threshold voltage shift ∆Vth and fractional decrease in the linear drain current ∆Id,lin / Id,lin (measured at Vg ~ Vth). These parameters are sensitive to damage in the channel region, which is most affected by reverse substratebiased CHE stress [23]. Compared to conventional stress, the marginal change in ∆Vth and Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 90 ∆Id,lin / Id,lin under reverse-Vb CHE stress further imply that the overall interface damage is not significantly increased, despite the much larger Ige (i.e. the HET electron population) of the latter. Conventional CHE stressing at the Vg = 0.5Vd condition is known to result in maximum Nit generation, although Ige ~ 0. This lack of correlation between Ige and ∆Nit has generally been reconciled on the basis of a combined hot-hole and hot-electron injection argument [24]. Since a reverse (negative) Vb significantly deflects hot holes away from the Si/SiO2 interface [25], and thus decouples the possible interaction between the two carriers, it may be argued that Nit generation under reverse-Vb CHE stress may have actually decreased. But as a result of an increase in Ige, the subsequent increase in ∆Nit could have masked the decrease, yielding comparable ∆Nit. This argument is, however, not borne out by the vastly different ∆Ig / Igo characteristics of the two cases. During conventional CHE stress, the small and nearly stress-time independent ∆Ig / Igo shows negligible bulk oxide defect generation. Hence, it is unlikely for the comparable Nit generation in this case to be dominated by combined hot-hole and hot-electron injection. The observation of comparable ∆Nit for Vb = and reverse –Vb CHE stress, despite the large difference in Ige, implies that a significant fraction of the generated Nit may not be solely attributed, in a consistent manner, to the HET electrons. The result tends to suggest that a significant fraction of the interface damage is contributed by the bulk of the less energetic channel electron population, with energy ≤ qVd (< eV). A possible mechanism may involve multiple vibrational excitations of interfacial Si-H bonds [26] by this group of electrons. In the vibrational excitation regime, the bond dissociation rate strongly depends; not only on the electron energy, but also on the magnitude of the drain stress current Id, as reported by Chen et al. [26][27]. Although the majority of the channel electrons possess Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 91 lower energy, a predominantly larger population may result in a bond dissociation rate that is greater than that due to the more energetic, but minority HET electrons. The importance of the HET electrons, in relation to the bulk of the channel electrons, i.e. the stress Id, must however be examined as Vd (and hence Vg and the resulting drain current) varies. In Fig. 3.8, device degradation due to reverse-Vb stress (at both Vg = 0.5Vd and Vg = Vd) is compared to that due to Vb = stress, as a function of the stress Vd. The respective Ib and Ige, at the Vg = Vd condition, are depicted in the inset. Fig. 3.8 Ratio ∆DR, given by ∆D(Vb = –1.8 V)/∆D(Vb = 0), as a function of the drain stress voltage Vd. ∆D is the parametric shift of interest, extracted after 104 s stress. The open (filled) symbols and dashed (solid) line denote the characteristics obtained from Vg = 0.5Vd (Vg = Vd) stress. Legends: Reverse saturation drain current decrease ∆Id (○ ●), threshold voltage shift ∆Vth (□ ■), and charge pumping current increase ∆Icp (solid and dashed lines). The inset shows the hot-electron gate (Ige) current versus Vg (= Vd) characteristics, under reverse substrate biasing: Vb = (○), –0.9 V (dashed line), and –1.8 V (●). Also shown are the corresponding substrate current characteristics denoted by solid lines. Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 92 The ratio ∆DR is defined as ∆D (Vb = –1.8 V)/∆D (Vb = 0), where ∆D is the parametric shift of interest at a given stress time. Given that Ib is unchanged under reverse substrate biasing (inset), the change in ∆DR, as Vd is varied, thus provides a relative measure of the interface damage induced by the HET electrons. At relatively high Vd (and hence high Vg), giving rise to a large stress Id, it can be seen that ∆DR ~ 1, indicating the dominance of the majority of the less energetic channel electrons. A gradual increase in ∆DR as Vd decreases is, however, apparent. This implies an increasingly important interface damage contribution from the HET electrons as Vd decreases. Compared to Vg = 0.5Vd stress, a larger ∆DR for Vg = Vd stress corroborates the view of increased HET electron injection at more positive Vg condition [10][22]. The larger ∆VthR, in comparison to ∆Id,satR or ∆IcpR, should also be noted for the Vg = Vd stress. Since ∆Vth is sensitive to damage in the channel region, this observation indicates a particularly pronounced nonlocal HET electron injection at the Vg = Vd condition. From the inset, it can be observed that Ige at Vg = Vd is increased by ~ 102 for Vb = – 1.8 V (inset). This increase in Ige is even higher at the Vg = 0.5Vd condition. However, the corresponding ∆DR < 10. It may thus be inferred that a large fraction of the Nit generated during conventional CHE stressing in the to V range is in fact not due to the HET electrons, but the majority of the less energetic channel electrons, owing to the predominantly high stress Id. As the same group of electrons is also mainly responsible for Ib, this accounts for the good consistency of the classical hot-electron model in the sub-3 V regime (open symbols, Fig. 3.8). This composite Nit generation mode, which comprises a significant contribution from the less energetic channel electrons at stressing condition (due to the high stress Id), and a possibly dominant contribution from the HET electrons near operating condition (e.g. Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 93 Vd ~ V), has an important implication. On the basis that the HET electrons gain excess energy through secondary means, their relative importance at low Vd can cause the actual hot-carrier lifetime to be shorter than that projected from stress conditions. This is illustrated in Fig. 3.9 using Vb = –0.9 V, which slightly increases the HET electron population (dashed line, inset of Fig. 3.9). At stress conditions, no significant difference in the hot-carrier lifetime, in comparison to Vb = stress, is evident. However, a significantly shorter lifetime results at much lower Vd conditions, due to the importance of the HET electrons. Extrapolating from stress conditions thus overestimates the actual hot-carrier lifetime. This calls for additional caution in the hot-carrier reliability assessment of future MOSFET generations. Fig. 3.9 Hot-carrier lifetime τ (@ saturation ∆Id / Ido = %) as a function of Ib / Id. The open (filled) symbols denote Vb = (–0.9 V) CHE stress at the Vg = Vd condition. The inset shows the corresponding τ versus / Vd plots. Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 94 3.4 Summary New experimental evidence, based on an approach that modulates the concentration of the high-energy tail of the electron energy distribution function (EEDF) via the application of a reverse-biased Vb during hot-carrier stress, provides important insights into the basic mechanism responsible for the shift in the worst-case stress condition of deep submicrometer NMOSFET, from Vg ≈ 0.5Vd towards Vd. It is shown that at low Vd, energetic electrons in the high-energy tail of the EEDF plays an increasingly important role on device reliability, even though they not contribute significantly to Ib. The increased injection of these energetic electrons into the gate oxide, as Vg approaches Vd, is found to be mainly responsible for the observed shift in the worst-case stress condition. This finding bears an important implication on the use of Ib as the conceptual basis for lifetime extrapolation from accelerated stressing. Under high bias condition, Ib predominates. Hot-carrier damage is largely caused by energetic carriers that are not injected into the gate oxide [15], hence the maximum degradation occurs at Vg corresponding to the maximum Ib. At low bias condition, the bulk of the electrons responsible for Ib possess much lower energy, and damage is mainly caused by the injection of the high-energy tail electrons. This could be the reason why an overly optimistic lifetime projection is obtained from accelerated stress data [28]. A detailed investigation of the role of the high-energy tail electrons on the damage creation under various stress conditions is conducted subsequently. Further investigation provided evidence of a composite Nit generation mode during CHE stressing. It was revealed that a significant contribution from the less energetic channel electrons (≤ qVd < eV), as opposed to the usual perception that the injection of HET Chapter Hot-carrier Mechanism Below Oxide Potential Barrier 95 electrons (> eV) into the gate oxide is mainly responsible for Nit generation in the sub-3 V regime. Contribution from the HET electrons, however, becomes increasingly important as Vd decreases. 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Hsia, “Valence-band tunneling enhanced hot carrier degradation in ultrathin oxide nMOSFET,” in Proc Int Electron Devices Meeting Tech Digest, pp 139- 142 , 2000 [22] D S Ang, T W H Phua, H Liao, and C H Ling, “High-energy tail electrons as the mechanism for the worst-case hot- carrier stress degradation of the deep submicrometer NMOSFET,” IEEE Electron Device Lett., vol 24, pp 46 9 -47 1, Jul 2003 [23] F Driussi,... Electron Devices, vol 49 , pp 1302-1307, Jul 2002 Chapter 3 Hot- carrier Mechanism Below Oxide Potential Barrier [26] 100 Z Chen, K Hess, J Lee, J W Lyding, E Rosenbaum, I Kizilyalli, and S Chetlur, “Mechanism for hot- carrier- induced interface trap generation in MOS transistors, ” in Proc Int Electron Devices Meeting Tech Digest, pp 85-88, 1999 [27] Z Chen, P Ong, A K Mylin, V Singh, and S Chetlur, “Direct... of a combined hot- hole and hot- electron injection argument [ 24] Since a reverse (negative) Vb significantly deflects hot holes away from the Si/SiO2 interface [25], and thus decouples the possible interaction between the two carriers, it may be argued that Nit generation under reverse-Vb CHE stress may have actually decreased But as a result of an increase in Ige, the subsequent increase in ∆Nit could... injection conditions in the substrate hot electron induced degradation of n-MOSFET,” in Proc Int Workshop on VLSI Process and Device Modeling, pp 156-159, 1993 [19] F Driussi, R Iob, D Esseni, L Selmi, R van Schaijk, and F Widdershoven, “Spectroscopic analysis of trap assisted tunneling in thin oxides by means of substrate hot electron injection experiments,” in Proc Int Electron Devices Meeting Tech Digest,... enhanced hot- electron Chapter 3 Hot- carrier Mechanism Below Oxide Potential Barrier 89 injection A larger Ige implies that a greater number of the HET electrons are impinging on the Si/SiO2 interface But the expected impact of this increased Ige on Nit generation is not borne out by the charge pumping current ∆Icp characteristic, which depicts only a slight increase in ∆Nit Marginal changes in other... Hot electrons and holes in MOSFET’s biased below the Si−SiO 2 interfacial barrier,” IEEE Electron Device Lett., vol 6, pp 513-515, Oct 1985 [4] P A Childs and C C C Leung, “New mechanism of hot carrier generation in very short channel MOSFETs,” Electronics Lett., vol 31, pp 139- 141 , 1995 [5] A Abramo, C Fiegna, and F Venturi, Hot carrier effects in short MOSFETs at low applied voltages,” in Proc Int... Devices Meeting Tech Digest, pp 301-3 04, 1995 [6] S E Rauch, III, F J Guarin, and G LaRosa, “Impact of E-E scattering to the hot carrier degradation of deep submicron NMOSFET’s,” IEEE Electron Device Lett., vol 19, pp 46 3 -46 5, Dec 1998 [7] J D Bude, “Gate current by impact ionization feedback in sub-micron MOSFET technologies,” in Proc Sym on VLSI Tech Digest, pp 101-102, 1995 Chapter 3 Hot- carrier Mechanism... pumping current increase ∆Icp (solid and dashed lines) The inset shows the hot- electron gate (Ige) current versus Vg (= Vd) characteristics, under reverse substrate biasing: Vb = 0 (○), –0.9 V (dashed line), and –1.8 V (●) Also shown are the corresponding substrate current characteristics denoted by solid lines Chapter 3 Hot- carrier Mechanism Below Oxide Potential Barrier 92 The ratio ∆DR is defined... Vb as depicted in Fig 3.5 (a) [22] This allows the extent of interface damage induced by the HET electrons to be assessed in relation to the primary CHE effect A significant enhancement in the HET electron population under reverse substrate biasing is depicted in Fig 3.6, through the several orders of magnitude increase in the hot- electron injection current (Ige) The substantial Ige in the conventional... excitation for the Si–H/D bond breaking in metal-oxide-semiconductor transistors, ” Appl Phys Lett., vol 81, pp 3278-3280, Oct 2002 [28] B W Min, O Zia, M Celik, R Widenhofer, L Kang, S Song, S Gonzales, and M Mendicino, Hot carrier enhanced gate current and its impact on short channel nMOSFET reliability with ultra-thin gate oxides,” in Proc Int Electron Devices Meeting Tech Digest, pp 873-876, 2001 . yielded an increase in the HET electrons. Hence, the effect arising from this pool of energetic electrons on the hot-carrier degradation remains vital in ultra-thin oxide regime. To further investigate. degradation in the sub-3 V regime is investigated in section 3.3. By modulating the HET electron population via reverse substrate biasing during channel hot-electron (CHE) stressing, evidence. Worst-Case Hot-Carrier Stress Degradation In this section, the shift in the worst-case stress condition of the deep submicrometer NMOSFET is investigated. Hot-carrier stress was initially carried