Hot carrier mechanisms in advanced NMOS transistors 8

Chapter Seven Evidence of Germanium Outdiffusion as a Result of High Channel Temperature Prior to every new technology introduction, transistors have to undergo series of reliability assessments such as hot-carrier induced degradation. In this evaluation, transistors are typically subjected to DC hot-carrier stress for a period of time. It is widely accepted that heat is also generated when devices are electrically biased and the rise in the channel temperature is linearly proportional to the dissipated power [1][2]. . For transistors that were built on bulk Si substrate, generated heat during hotcarrier stressing could be dissipated readily. As a result, hot-carrier effects arising from rising channel temperature remained secondary despite long stress duration. On the other hand, the generated heat in transistors built on strained-Si/SiGe substrate is not able to dissipate efficiently. This is attributed to the poor thermal conductivity of underlying SiGe as discussed in chapter one. Since the underlying SiGe is not able to dissipate the heat fast enough, then most of the heat is confined in the thin Si film for the entire stress duration. As a consequence, the channel temperature in the strained-Si is much higher compared to that in the bulk Si under nominal operation condition [3]. Chapter Germanium Outdiffusion due to High Channel Temperature 183 For transistors under accelerated hot-carrier stress, the channel temperature could be even higher as a result of larger power dissipation. The trapped heat is even more intense during the high voltage stress and this could alter the characteristics of the strained-Si/SiGe interface such as the change in Ge concentration when Ge outdiffused. Ge outdiffusion typically occurs during the fabrication of wafers such as implantation or thermal processes [4]-[6]. While these processing steps are vital to the shallow junction formation in the state-of-the-art CMOS technology, Ge from the underlying SiGe could outdiffuse and segregate at the Si / SiO2 interface. As a result, the mobility of electrons is lowered due to alloy scattering and Coulomb scattering by the increased interface states and fixed charges [7][8]. This negative impact of Ge outdiffusion compromised the performance of strained-Si/SiGe devices and it could be a serious reliability concern. To date, there is few or no report on the effect of severe channel heating on the strained-Si/SiGe interface. Thus, it is essential to examine this interface when the transistor is subjected to hot-carrier stress condition. In this chapter, a technique called energy dispersive x-ray spectrometry (EDS) is briefly described. This method was used to measure the average Ge concentration in the strained-Si/SiGe substrate. It was shown that the average Ge concentration is higher in the substrate near the gate edges than that in the channel region for fresh devices. Experimental evidence subsequently revealed that the average Ge concentration at the corresponding locations measured after hot-carrier stress has increased due to the high channel temperature, with the largest increase in the channel region. However, for a given rise in channel temperature, the amount of Ge that Chapter Germanium Outdiffusion due to High Channel Temperature 184 outdiffused towards the Si / SiO2 interface could be governed by the extent of residual damage present in the substrate. 7.1 Device Fabrication and Experimental Setup Based on the 0.18 µm CMOS technology, strained-Si N-MOSFETs with a final thickness of ~15 nm on an underlying layer of ~1 µm thick relaxed SiGe virtual substrate with 15 and 20 % Ge concentration were fabricated. The thermal budget was limited by replacing STI sidewall and implant screen oxides by low temperature CVDTEOS oxide. Bulk Si devices fabricated using an identical processing sequence served as control. The device gate length used in this work was 0.18 µm. All electrical tests were performed using HP4155A semiconductor parameter analyzer at chuck temperature T = 30 and 100 °C. Quantitative compositions of Ge measured with an energy-dispersive X-ray spectrometer (EDS) interfaced to a high-resolution TEM CM200 operated at 200 KeV with the nanoprobe electron beam focused to ~1 nm were compared between fresh and stressed devices. The accuracy of this semi-quantitative method is better than ±1 atm. wt. and has a sensitivity of ~0.1 % atm. wt. 7.2 Energy Dispersive X-Ray Spectrometry (EDS) Energy Dispersive X-Ray Spectrometry (EDS) is a common method for identifying and quantifying elemental composition by measuring the number of x-rays produced by a solid sample when irradiated by electrons [9]. This technique can be applied on very small sample area. The characteristics X-rays are emitted when the specimen under test is bombarded with electrons from an electron beam such as that in Chapter Germanium Outdiffusion due to High Channel Temperature 185 the transmission electron microscope (TEM) or scanning electron microscope (SEM). Fig. 7.1 illustrates an example of how an emitted x-ray forms. An incident electron would travel from the electron beam to the inner shell of an atom in the sample as shown in Fig. 7.1 (a). Subsequently, this incident electron knocked out the electron residing in the K-shell, thus leaving a vacancy in the K-shell as depicted in Fig. 7.1 (b). Fig. 7.1 (c) shows an electron of a higher energy (i.e. L-shell) within the atom moves into this vacancy. This transition yielded the release of energy equal to the difference in energy between K-shell and the L-shell. These released energy falls into the x-ray regime of the electromagnetic spectrum; therefore an x-ray photon is emitted. X-ray photon Incident electron (a) (b) (c) Fig. 7.1 An example of an x-ray florescence in a scanning electron microscope system (SEM) [10]. The energies and number of X-rays emitted are collected and determined by a solid-state detector [11]. They are then plotted by energy and the peaks in the distribution corresponded to known elemental composition present in the sample. Subsequently, a comparison is made between the data and the known or computergenerated standards to determine the identity and quantity of elements present in the sample. Fig. 7.2 shows an example of a X-ray spectra [12]. Chapter Germanium Outdiffusion due to High Channel Temperature 186 Fig. 7.2 An example of a X-ray spectrum taken [12]. 7.3 Results and Discussion Fig. 7.3 shows the typical Id-Vd characteristics of both strained-Si and bulk Si devices. The apparent reduction in Id at high Vg and Vd for strained-Si devices is due to the self-heating effect which is analogous to that observed in silicon-on-insulator (SOI). In chapter five, the extracted value of Tch arising from this self-heating effect is ~760 °C during hot-carrier stress. In the following experiment, the Ge concentration near the strained-Si / oxide interface was measured for fresh devices and those that were subjected to hot-carrier stress. Drain Current, Id (mA/µ m) Chapter Germanium Outdiffusion due to High Channel Temperature 187 1.2 V 0.6 0.9 V 0.4 0.6 V 0.2 Control 15% Ge 20% Ge 0.0 0.0 0.4 0.8 1.2 1.6 Drain Voltage, Vd (V) 2.0 Fig. 7.3 Drain current Id as a function of drain voltage Vd with gate overdrives Vg-Vt as the parameter for strained-Si and bulk-Si N-MOSFETs. W = 20 µm; Tox = nm. Fig. 7.4 (a) depicts the locations in the channel region and gate edges near the drain and source terminals in 20 % Ge strained-Si devices where Ge concentration CGe is measured via the EDS technique. The variation of CGe as a function of depth into the composite strained-Si / SiGe layer of these fresh devices is shown in Fig. 7.4 (b). As expected from a well-controlled thermal budget, CGe in the strained-Si layer is low having values less than % and rises steadily towards 20 % in the relaxed SiGe buffer. Fig. 7.4 (c) shows CGe variation at Si thickness TSi of nm. The higher CGe near the gate edges could be attributed to the outdiffusion of Ge from the underlying SiGe as a result of more severe residual implant damage (after anneal) or the effects of recoil implantation [4]-[6]. Chapter Germanium Outdiffusion due to High Channel Temperature 188 (a) Average Ge Conc., 〈 CGe〉 (%) (b) Si/SiGe Interface SiO2 SiO2/Si 20 Interface 16 12 Fresh Device Wch/Lch 20/0.18µ m Gate Edge (S) Channel Region Gate Edge (D) -5 10 15 20 25 30 Ge Concentration, CGe ( % ) Si Depth in Y-Direction, TSi (nm) (c) Fresh Device Wch/Lch = 20 / 0.18µ m CGe @ Tsi = nm Gate Edge Channel Gate Edge (Drain) (Source) Fig. 7.4 (a) TEM cross-section of 20% Ge strained-Si N-MOSFET with channel width W = 20 µm; open circles denote positions at which Ge concentrations are measured; horizontal demarcates the strained-Si (thickness 15 nm) / SiGe interface. (b) Variation of average Ge concentration CGe as a function of depth TSi at the gate edges and channel region of fresh strained-Si N-MOSFETs. (c) Statistical variation of CGe extracted at TSi = nm. Chapter Germanium Outdiffusion due to High Channel Temperature 189 On the whole, the small variation in threshold voltage of the fresh strained-Si devices implies that CGe in the strained-Si layer does not vary significantly among the fresh strained-Si devices as illustrated in Fig. 7.5 [13]. This is plausible since the uniformity of the channel dopant profile suggests the amount of Ge outdiffused during 120 (d) Max o Threshold Voltage, Vt (mV) processing is similar for all devices. 116 112 108 Min 20% Ge Fig. 7.5 Threshold voltage variation of fresh strained-Si N-MOSFETs. It is generally agreed that Ge outdiffused towards the Si / SiO2 interface during the fabrication process. Nevertheless, it could also occur under high channel temperature when the device is significantly biased. In fact, the high channel temperature of the strained-Si device biased at the stressing condition could in fact induce Ge outdiffusion from the underlying SiGe layer. This prediction is confirmed in Fig. 7.6. Comparison was made between fresh devices and those subjected to Vg = Vd = 2.7 V stress. Several salient features should be noted. Fig. 7.6 (a) shows the fractional increase in Ge concentration ∆CGe/CGeo at the various locations in the Y-direction for devices stressed at T of 30 and 100 °C. The Chapter Germanium Outdiffusion due to High Channel Temperature 190 corresponding CGe in the X-direction is shown in Fig. 7.6 (b). CGe in the channel region is doubled after hot-electron stress at both temperatures. The statistical spread in ∆CGe/CGeo obtained from numerous devices stressed under similar conditions, confirmed that maximum fractional increase in CGe occurred within the channel region. Nonetheless, for devices stressed at higher T, the channel temperature is increased correspondingly as shown in Fig. 5.8. The resulting effect on the CGe near the surface is apparent. The strained-Si / SiGe interface is less abrupt in all regions, indicating the global effect of heating on the Ge profile when T is increased. Besides, ∆CGe/CGeo near the surface for devices stressed at T of 100 °C is larger than that stressed at 30 °C for all locations except the channel region. In spite of this, the Ge outdiffusion in the channel is the largest. This is due to the fact that large amount of heat trapped within the thin strained-Si film when impact ionization occurred in the channel near the drain side. For the same increase in T, Ge outdiffusion near the gate edges occurs more readily. The different ∆CGe/CGeo in the various regions could not be entirely attributed to the Ge outdiffusion arising from self-heating effect. In fact, the severity of this outdiffusion process when T increased from 30 to 100 °C as illustrated in Fig. 7.6, depends on the amount of implant residual damage [4][5]. It is plausible for the higher sensitivity of Ge outdiffusion in the gate edge with the increase in temperature to be due to the lightly-doped drain (LDD) formation where higher doses of halo and extension ion implantation results in more damage. In the channel region, however, the doses are typically smaller and hence the sensitivity is diminished. Chapter Germanium Outdiffusion due to High Channel Temperature Fractional Increase in Average Ge Conc., ∆CGe/CGeo (a) 1.6 SiO2 SiO2/Si 191 Si/SiGe Interface Interface Gate Edge (S) Channel Region Gate Edge (D) 0.8 Stressed @ 100 °C Stressed @ 30 °C 0.0 -5 10 15 20 25 30 Fractional Increase in Average Ge Conc., ∆CGe/CGeo Si Depth in Y-Direction, TSi (nm) 1.6 (b) T=30 °C T=100 °C 1.2 0.8 0.4 CGe @ Tsi=5nm 0.0 Gate Edge Channel (Drain) Gate Edge (Source) Fig. 7.6 (a) Fractional increase in Ge concentration ∆CGe/CGeo at the gate edges and channel region as a function of depth TSi. The strained-Si N-MOSFETs with W = 20 µm were stressed at Vg = Vd = 2.7 V for 7×104 s. (b) Statistical variation of ∆CGe / CGeo extracted at TSi = nm. CGeo denotes the average Ge concentration of fresh devices. Chapter Germanium Outdiffusion due to High Channel Temperature 192 The Ge concentration in the channel near the strained-Si/oxide interface increases from ~ % to ~ % after hot-electron stress as shown in Fig. 7.4 and Fig. 7.6. The significant interface state generation in the channel observed in the previous chapter could be the result of this Ge outdiffusion rather than self-heating induced degradation. In order to validate this hypothesis, the amount of interface trap density generated as a function of Ge concentration present at the strained-Si/oxide interface is shown in Fig. 7.7. As it can be seen, for Ge concentration at the strained-Si surface up to %, the amount of interface trap density increase is negligibly small. This is insignificant when compared to ~1.5 orders of magnitude corresponding increase due to hot electron induced degradation as shown in Fig. 6.13. Hence, the effect of Ge outdiffusion on the interface state generation during hot channel stressing can be neglected. Fig. 7.7 Variation in the interface state density and fixed oxide charge density as a function of Ge concentration at the strained Si/SiO2 interface. The Ge concentrations at the surface have been calculated using TCAD simulation. Interface trap density and fixed oxide charge density significantly increased when Ge concentration at the surface becomes higher than 6% [14]. Chapter Germanium Outdiffusion due to High Channel Temperature 193 7.4 Summary Based on the EDS technique, average Ge concentration near the surface of the strained-Si / SiGe devices is compared before and after the hot-carrier stress. An increase in the Ge concentration in the channel and that near the gate edges is observed in the latter. The increase could be attributed to the high channel temperature arising from self-heating. Moreover, it is also susceptible to the residual implant damage present in the substrate as observed in the significant increase in Ge concentration near the gate edges and not in the channel when the chuck temperature is increased to 100 °C. The increase in Ge concentration at the surface, however, has little influence on the interface state generation in the channel region. This work clearly illustrates that the severe self-heating effect induces the Ge to outdiffuse towards the Si / SiO2 interface. Chapter Germanium Outdiffusion due to High Channel Temperature 194 7.5 References [1] E. Pop, R. W. Dutton, K. E. Goodson, “Monte carlo simulation of joule heating in bulk and strained silicon,” Appl. Phys. Lett., vol. 86, pp. 082101, Feb. 2005. [2] R. Menozzi, and A. Kingswood, “A new technique to measure the thermal resistance of LDMOS transistors,” IEEE Trans. Devices and Mat. Reliability, vol. 5, pp. 515-521, Sep. 2005. [3] K. A. Jenkins, and K. Rim, “Measurement of the self-heating in strained-silicon MOSFETs,” IEEE Electron Device Lett., vol. 23, pp. 360-362, Jun. 2002. [4] G. Xia, H. M. Nayfeh, M. J. Lee, E. A. Fitzgerald, D. A. Antoniadis, D. H. Anjum, J. Li, R. Hull, N. Klymko, and J. L. Hoyt, “Impact of ion implantation damage and thermal budget on mobility enhancement in strained-Si N-channel MOSFETs,” IEEE Trans. Electron Device, vol. 51, pp. 2136-2144, Dec. 2004. [5] W. Vandervorst, T. Janssens, B. Brijs, R. Delhougne, R. Loo, M. Caymax, B. J. Pawlak, and M. Posselt, “Athermal germanium migration in strained silicon layers during junction formation with solid-phase epitaxial regrowth,” Appl. Phys. Lett., vol. 86, pp. 081915, Feb. 2005. [6] N. Sugii, S. Irieda, J. Morioka, and T. Inada, “Recrystallization, redistribution, and electrical activation of strained-silicon/Si0.7Ge0.3 heterostructures with implanted arsenic,” Journal of Appl. Phys., vol. 96, pp. 261-268, Jul. 2004. Chapter Germanium Outdiffusion due to High Channel Temperature [7] 195 S. Takagi, A. Touriumi, M. Iwase, and H. Tango, “On the universality of inversion layer mobility in Si MOSFETs: Part I – Effects of substrate impurity concentration,” IEEE Trans. Electron Devices, vol. 41, pp. 2357-2362, Dec. 1994. [8] T. Mizuno, N. Sugiiyama, T. Tezuka, T. Numata, T. Maeda, and S. Takagi, “Design for scaled thin film strained-SOI CMOS devices with higher carrier mobility,” in Proc. Int. Electron Devices Meeting Tech. Digest, 2002, pp. 3134. [9] http://www.analyzethis1.com/EDS.htm [10] J. Rakovan, “Energy dispersive spectrometry,” Rocks and Minerals, vol. 79, pp. 194-195, May/Jun. 2004. [11] J. I. Goldstein, D. E. Newbury, P. Echlin, D. C. Joy, C. Fiori, and E. Lifshin, “Scanning electron microscopy and X-ray microanalysis,” New York, Plenum Press, 2003. [12] http://www.wmtr.com/Content/EDS.htm . [13] T. W. H. Phua, D. S. Ang, C. H. Tung, C. H. Ling, “Self-heating induced Germanium outdiffusion and non-local channel degradation in the stainedSi/SiGe N-MOSFET subjected to channel hot-electron stress,” presented in Proc. Solid State Devices & Mat., 2006. Chapter Germanium Outdiffusion due to High Channel Temperature [14] 196 G. K. Dalapati, S. Chattopadhyay, K. S. K. Kwa, S. H. Olsen, Y. L. Tsang, R. Agaiby, A. G. O’Neill, P. Dobrosz, and S. J. Bull “Impact of Strained-Si Thickness and Ge Out-Diffusion on Gate Oxide Quality for Strained-Si Surface Channel n-MOSFETs,” IEEE Trans. Electron Devices, vol. 53, pp. 1142-1152, May 2006. [...]... concentration in the channel near the strained-Si/oxide interface increases from ~ 2 % to ~ 4 % after hot- electron stress as shown in Fig 7.4 and Fig 7.6 The significant interface state generation in the channel observed in the previous chapter could be the result of this Ge outdiffusion rather than self-heating induced degradation In order to validate this hypothesis, the amount of interface trap... at the strained-Si/oxide interface is shown in Fig 7.7 As it can be seen, for Ge concentration at the strained-Si surface up to 4 %, the amount of interface trap density increase is negligibly small This is insignificant when compared to ~1.5 orders of magnitude corresponding increase due to hot electron induced degradation as shown in Fig 6.13 Hence, the effect of Ge outdiffusion on the interface state... strained-Si / SiGe devices is compared before and after the hot- carrier stress An increase in the Ge concentration in the channel and that near the gate edges is observed in the latter The increase could be attributed to the high channel temperature arising from self-heating Moreover, it is also susceptible to the residual implant damage present in the substrate as observed in the significant increase... significant increase in Ge concentration near the gate edges and not in the channel when the chuck temperature is increased to 100 °C The increase in Ge concentration at the surface, however, has little influence on the interface state generation in the channel region This work clearly illustrates that the severe self-heating effect induces the Ge to outdiffuse towards the Si / SiO2 interface Chapter... Goodson, “Monte carlo simulation of joule heating in bulk and strained silicon,” Appl Phys Lett., vol 86 , pp 082 101, Feb 2005 [2] R Menozzi, and A Kingswood, “A new technique to measure the thermal resistance of LDMOS transistors, ” IEEE Trans Devices and Mat Reliability, vol 5, pp 515-521, Sep 2005 [3] K A Jenkins, and K Rim, “Measurement of the self-heating in strained-silicon MOSFETs,” IEEE Electron Device... the interface state generation during hot channel stressing can be neglected Fig 7.7 Variation in the interface state density and fixed oxide charge density as a function of Ge concentration at the strained Si/SiO2 interface The Ge concentrations at the surface have been calculated using TCAD simulation Interface trap density and fixed oxide charge density significantly increased when Ge concentration... Newbury, P Echlin, D C Joy, C Fiori, and E Lifshin, “Scanning electron microscopy and X-ray microanalysis,” New York, Plenum Press, 2003 [12] http://www.wmtr.com/Content/EDS.htm [13] T W H Phua, D S Ang, C H Tung, C H Ling, “Self-heating induced Germanium outdiffusion and non-local channel degradation in the stainedSi/SiGe N-MOSFET subjected to channel hot- electron stress,” presented in Proc Solid... 2357-2362, Dec 1994 [8] T Mizuno, N Sugiiyama, T Tezuka, T Numata, T Maeda, and S Takagi, “Design for scaled thin film strained-SOI CMOS devices with higher carrier mobility,” in Proc Int Electron Devices Meeting Tech Digest, 2002, pp 3134 [9] http://www.analyzethis1.com/EDS.htm [10] J Rakovan, “Energy dispersive spectrometry,” Rocks and Minerals, vol 79, pp 194-195, May/Jun 2004 [11] J I Goldstein, D E Newbury,... enhancement in strained-Si N-channel MOSFETs,” IEEE Trans Electron Device, vol 51, pp 2136-2144, Dec 2004 [5] W Vandervorst, T Janssens, B Brijs, R Delhougne, R Loo, M Caymax, B J Pawlak, and M Posselt, “Athermal germanium migration in strained silicon layers during junction formation with solid-phase epitaxial regrowth,” Appl Phys Lett., vol 86 , pp 081 915, Feb 2005 [6] N Sugii, S Irieda, J Morioka, and T Inada,... “Recrystallization, redistribution, and electrical activation of strained-silicon/Si0.7Ge0.3 heterostructures with implanted arsenic,” Journal of Appl Phys., vol 96, pp 261-2 68, Jul 2004 Chapter 7 Germanium Outdiffusion due to High Channel Temperature [7] 195 S Takagi, A Touriumi, M Iwase, and H Tango, “On the universality of inversion layer mobility in Si MOSFETs: Part I – Effects of substrate impurity concentration,” . observed in silicon-on-insulator (SOI). In chapter five, the extracted value of T ch arising from this self-heating effect is ~760 ° C during hot-carrier stress. In the following experiment, the. fractional increase in C Ge occurred within the channel region. Nonetheless, for devices stressed at higher T, the channel temperature is increased correspondingly as shown in Fig. 5 .8. The resulting. conductivity of underlying SiGe as discussed in chapter one. Since the underlying SiGe is not able to dissipate the heat fast enough, then most of the heat is confined in the thin Si film for the