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The following will be discussed in this chapter: Addition and subtraction of binary data is fundamental, represent inputs and outputs, hardware features, same hardware can be used for addition and subtraction with minor changes, dealing with overflow.
Lecture 14 Binary Adders and Subtractors Overvie w ° Addition and subtraction of binary data is fundamental • Need to determine hardware implementation ° Represent inputs and outputs • Inputs: single bit values, carry in • Outputs: Sum, Carry ° Hardware features • Create a single-bit adder and chain together ° Same hardware can be used for addition and subtraction with minor changes ° Dealing with overflow • What happens if numbers are too big? Half Add ° er Add two binary numbers • A0 , B0 -> single bit inputs • S0 -> single bit sum • C1 -> carry out A 0 B 0 A 0 B 0 S 0 C 1 0 1 1 1 0 0 S 0 C 1 Dec Binary +1 +1 10 Mult iple ° -bit Consider single-bit adder for each bit position Add itio n A3 A2 A1 A0 B3 B2 B1 B0 A 1 A B 0 1 1 1 1 0 B 1 Ci+1 Ci Ai +Bi Si Each bit position creates a sum and carry Full Add Full adder includes carry in Ci ° er ° Notice interesting pattern in Karnaugh map Ci Ai Bi Si Ci+1 0 0 1 1 0 1 0 1 1 1 1 0 0 1 1 AiBi 00 Ci 11 1 01 10 1 Si Full Add Full adder includes carry in Ci ° er ° Alternative to XOR implementation Ci Ai Bi Si Ci+1 0 0 1 1 0 1 0 1 1 1 1 0 0 1 1 Si = Ci’ A’i Bi + Ci ’ Ai Bi ’ + Ci Ai ’ Bi ’ + Ci Ai B i Full Adder ° Reduce and/or representations into XORs Si = Ci’ Ai’ Bi + Ci’ Ai Bi’ + Ci Ai’ !Bi’ + Ci Ai Bi Si = Ci’ (A’I Bi + Ai B’i) + Ci (A’I B’i + Ai Bi) Si = C’I (Ai ⊕ Bi)+ Ci (Ai ⊕ Bi)’ Si = Ci ⊕ (Ai ⊕ Bi) Full Adder (S in SOP) Full Add ° er Now consider implementation of carry out ° Two outputs per full adder bit (Ci+1, Si) Ci Ai Bi Si Ci+1 0 0 1 1 0 1 0 1 1 1 1 0 AiBi 00 Ci 0 0 1 1 Note: inputs 01 11 10 1 1 Ci+1 Full Add ° Now er consider implementation of carry out ° Minimize circuit for carry out - Ci+1 Ci Ai Bi Si Ci+1 0 0 1 1 0 1 0 1 1 1 1 0 0 1 1 AiBi 00 Ci 01 10 1 11 1 Ci+1 Ci+1 = Ai Bi + Ci Bi + Ci Ai 10 Ripple Adder Delay °How to improve? 24 Carry Look Ahead Adder • How to reduce propagation delay of ripple carry adders? • Carry look ahead adder: All carries are computed as a function of C0 (independent of n !) • It works on the following standard principles: • A carry bit is generated when both input bits Ai and Bi are 1, or • When one of input bits is 1, and a carry in bit exists 25 Carry Look Ahead Adder 26 Carry Look Ahead Adder 27 Carry Look Ahead Adder 28 Carry Look Ahead Generator 29 Carry Look Ahead Adder Conclusion: Each carry bit can be expressed in terms of the input carry Co, and not based on its preceding carry bit Each carry bit can be expressed as a SOP, and can be implemented using a two-level circuit, i.e a gate delay of 2T 30 Carry Look Ahead Adder 31 BCD Adder ° BCD digits are valid for decimal numbers 0-9 ° Addition of two BCD numbers will generate an output, that may be greater than 1001 (9) ° In such cases, the BCD number 0110 is added to the result as a correction step ° When adding two BCD numbers, the maximum result that can be obtained is: + = 18 If we include a carry in bit, then the maximum result that can be obtained is: 19 (10011) Both numbers 18 and 19 are invalid BCD digits Therefore, a needs to be added to bring them to correct BCD format 32 Derivation of BCD adder 33 Derivation of BCD adder °Combinations 1010 through 1111 need correction °When K=1, it is necessary to add 0110 to the binary sum 34 Add ing two BC D nu mb ers – Circ uit 35 Binary Multiplication 36 Binary Multiplication ° Therefore, for multiplying two 2-bit numbers, AND gates and ADDERS will be sufficient °Half Adders 37 Summary ° Addition and subtraction are fundamental to computer systems ° Key – create a single bit adder/subtractor • Chain the single-bit hardware together to create bigger designs ° The approach is call ripple-carry addition • Can be slow for large designs ° Overflow is an important issue for computers • Processors often have hardware to detect overflow ° Next time: encoders/decoder 38 ... add 0110 to the binary sum 34 Add ing two BC D nu mb ers – Circ uit 35 Binary Multiplication 36 Binary Multiplication ° Therefore, for multiplying two 2-bit numbers, AND gates and ADDERS will be... 4 2 21 Addition cases and overflow 22 Binary Parallel Adder (Again) ° To add n-bit numbers: • Use n Full -Adders in parallel • The carries propagates as in addition by hand °Src: Mano’s Book °This... er Add two binary numbers • A0 , B0 -> single bit inputs • S0 -> single bit sum • C1 -> carry out A 0 B 0 A 0 B 0 S 0 C 1 0 1 1 1 0 0 S 0 C 1 Dec Binary +1 +1 10 Mult iple ° -bit Consider