I E C 61 -2 ® Edition 3.0 201 7-05 I N TE RN ATI ON AL S TAN D ARD colour i n sid e P ri n ted board as sem bl i es – P art : Secti on al s peci fi cati on – Re q u i rem en ts for s u rface m ou n t s ol d e re d IEC 61 91 -2:201 7-05(en) as se m bl i es T H I S P U B L I C AT I O N I S C O P YRI G H T P RO T E C T E D C o p yri g h t © I E C , G e n e v a , S wi tz e rl a n d All rights reserved Unless otherwise specified, no part of this publication may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from either IEC or IEC's member National Committee in the country of the requester If you have any questions about I EC copyright or have an enquiry about obtaining additional rights to this publication, please contact the address below or your local I EC member National Committee for further information IEC Central Office 3, rue de Varembé CH-1 21 Geneva 20 Switzerland Tel.: +41 22 91 02 1 Fax: +41 22 91 03 00 info@iec.ch www.iec.ch Ab ou t th e I E C The I nternational Electrotechnical Commission (I EC) is the leading global organization that prepares and publishes I nternational Standards for all electrical, electronic and related technologies Ab o u t I E C p u b l i ca ti o n s The technical content of IEC publications is kept under constant review by the IEC Please make sure that you have the latest edition, a corrigenda or an amendment might have been published I E C Catal og u e - webstore i ec ch /catal og u e The stand-alone application for consulting the entire bibliographical information on IEC International Standards, Technical Specifications, Technical Reports and other documents Available for PC, Mac OS, Android Tablets and iPad I E C pu bl i cati on s s earch - www i ec ch /search pu b The advanced search enables to find IEC publications by a variety of criteria (reference number, text, technical committee,…) It also gives information on projects, replaced and withdrawn publications E l ectroped i a - www el ectroped i a org The world's leading online dictionary of electronic and electrical terms containing 20 000 terms and definitions in English and French, with equivalent terms in additional languages Also known as the International Electrotechnical Vocabulary (IEV) online I E C G l os sary - s td i ec ch /g l oss ary 65 000 electrotechnical terminology entries in English and French extracted from the Terms and Definitions clause of IEC publications issued since 2002 Some entries have been collected from earlier publications of IEC TC 37, 77, 86 and CISPR I E C J u st Pu bl i s h ed - webstore i ec ch /j u stpu bl i sh ed Stay up to date on all new IEC publications Just Published details all new publications released Available online and also once a month by email I E C C u stom er S ervi ce C en tre - webstore i ec ch /csc If you wish to give us your feedback on this publication or need further assistance, please contact the Customer Service Centre: csc@iec.ch I E C 61 -2 ® Edition 3.0 201 7-05 I N TE RN ATI ON AL S TAN D ARD colour i n sid e P ri n ted board as sem bl i e s – P art : Secti on al s peci fi cati on – Req u i rem en ts for s u rface m ou n t s ol d ered as se m bl i es INTERNATIONAL ELECTROTECHNICAL COMMISSION ICS 31 90; 31 240 ISBN 978-2-8322-4322-0 Warn i n g ! M ake s u re th a t you ob tai n ed th i s p u b l i cati on from an au th ori zed d i stri b u tor ® Registered trademark of the International Electrotechnical Commission –2– I EC 61 91 -2: 201 © I EC 201 CONTENTS FOREWORD Scope Norm ative references Terms and definitions General requirem ents Surface m ounting of components General Alignment requirem ents Process control Surface m ounted com ponent requirem ents 5 Flatpack lead forming 5 General 5 Surface m ounted device lead bends 5 Surface m ounted device lead deform ation 5 Flattened leads 5 Dual-in-line packages (DI Ps) 5 Parts not configured for surface m ounting Small devices with two term inations General Stack mounting Devices with external deposited elements Lead com ponent bod y positioning General Axial-leaded components Other components Parts configured for butt lead m ounting Non-conductive adhesive coverage limits Acceptance requirem ents General Control and corrective actions Surface soldering of leads and term inations 1 General 1 Solder fillet height and heel fillets 1 3 Flat ribbon L and gull-wing leads Round or flattened (coined) leads J leads 6 Rectangular or square end com ponent Cylindrical end-cap terminations 6 Bottom only terminations Castellated terminations Butt j oints 1 I nward L-shaped ribbon leads 20 Flat lug leads 21 3 Ball grid array 22 Column grid array 23 Bottom termination com ponents 24 I EC 61 91 -2: 201 © I EC 201 –3– 6 Components with bottom therm al plane term inations (D-Pak) 24 P-style terminations 26 General post-soldering requirements applicable to all surface-m ounted assem blies 26 Dewetting 26 Leaching 26 Pits, voids, blowholes, and cavities 26 4 Solder wicking 27 Solder webs and skins 27 6 Bridging 27 Degradation of m arking 27 Solder spikes 27 Disturbed j oint 27 Component damage 27 1 Open circuit, non-wetting 27 Component tilting 27 Non-conducting adhesive encroachm ent 28 4 Open circuit, no solder available 28 Component on edge 28 Rework and repair 28 Annex A (normative) Placem ent requirem ents for surface m ounted devices 30 A General 30 A Component positioning 30 A Small devices incorporating two terminations 30 A 3.1 Metallization coverage over the land (side-to-side) 30 A 3.2 Metallization coverage over the land (end) 30 A Mounting of cylindrical end-cap devices (MELFs) 30 A Registration of castellated chip carriers 30 A Surface m ounted device lead and land contact 30 A Surface m ounted device lead side overhang 30 A Surface m ounted device lead toe overhang 31 A Surface m ounted device lead height off land (prior to soldering) 31 A Positioning of J lead devices 31 A 1 Positioning gull-wing lead devices 31 A External connections to packaging and interconnect structures 31 Bibliograph y 32 Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure – Lead formation for surface mounted device – Fillet height – Flat ribbon and gull-wing leads – Round or flattened (coined) lead joint – J lead joint – Rectangular or square end com ponents – Cylindrical end-cap terminations – Bottom only term inations – Leadless chip carriers with castellated terminations – Butt joints 20 –4– Figure Figure Figure Figure Figure Figure 11 12 13 14 15 16 I EC 61 91 -2: 201 © I EC 201 – I nward L-shaped ribbon leads 21 – Flat lug leads 22 – BGA with collapsing balls 23 – Bottom term ination components 24 – Bottom thermal plane term inations 25 – P-style terminations 26 Table – BGA with non-collapsing balls 23 Table – Colum n grid array 23 Table – Reworkable defects 29 I EC 61 91 -2: 201 © I EC 201 –5– INTERNATI ONAL ELECTROTECHNI CAL COMMISSI ON P RI N T E D B O ARD AS S E M B L I E S – P a rt : S e c ti o n a l s p e c i fi c a ti o n – Re q u i re m e n ts fo r s u rfa c e m o u n t s o l d e re d a s s e m b l i e s FOREWORD ) The I nternati on al Electrotechni cal Comm ission (I EC) is a worl d wid e organization for stan dardization com prisin g all n ation al el ectrotechnical comm ittees (I EC National Comm ittees) The object of I EC is to prom ote internati onal co-operation on all questions concerni ng stand ardi zati on in the el ectrical an d electronic fields To this end and in additi on to other acti vities, I EC publish es I nternational Stan dards, Techn ical Specifications, Technical Reports, Publicl y Avail abl e Specificati ons (PAS) an d Gu ides (h ereafter referred to as “I EC Publication(s)”) Thei r preparation is entrusted to technical comm ittees; any I EC National Comm ittee interested in the subj ect dealt with m ay partici pate in this preparatory work I nternational, governm ental an d n on governm ental organ izations l iaising with th e I EC also participate i n this preparation I EC collaborates closel y with the I ntern ational Organi zation for Stand ardization (I SO) in accordance with ditions determ ined by agreem ent between th e two organi zati ons 2) The form al decisions or ag reem ents of I EC on tech nical m atters express, as n early as possible, an i nternati onal consensus of opi nion on the rel evant subjects since each technical com m ittee has representati on from all interested I EC N ational Com m ittees 3) I EC Publications have the form of recomm endations for intern ational use an d are accepted by I EC National Com m ittees in that sense While all reasonable efforts are m ade to ensure that th e tech nical content of I EC Publications is accu rate, I EC cann ot be h eld responsi ble for th e way in which th ey are used or for an y m isinterpretation by an y en d u ser 4) I n order to prom ote intern ational u niform ity, I EC National Com m ittees und ertake to apply I EC Publications transparentl y to the m axim um extent possible i n their national an d regi on al publicati ons Any d ivergence between an y I EC Publication and the correspondi ng national or regi on al publicati on sh all be clearl y in dicated in the latter 5) I EC itself d oes n ot provi de an y attestation of conform ity I n depend ent certificati on bodies provi de conform ity assessm ent services and, in som e areas, access to I EC m arks of conform ity I EC is not responsi ble for an y services carri ed out by ind ependent certification bodi es 6) All users shou ld ensure that th ey have the l atest editi on of thi s publicati on 7) No liability shall attach to I EC or its directors, em ployees, servants or ag ents inclu din g in divi dual experts and m em bers of its technical com m ittees and I EC Nati on al Com m ittees for any person al i njury, property d am age or other dam age of any nature whatsoever, wheth er di rect or indirect, or for costs (includ i ng leg al fees) and expenses arisi ng out of the publ ication, use of, or relian ce upon, this I EC Publicati on or any other I EC Publications 8) Attention is drawn to th e N orm ative references cited in th is publ ication Use of the referenced publ ications is indispensable for the correct applicati on of this publication 9) Attention is drawn to the possibility that som e of the elem ents of this I EC Publication m ay be the su bject of patent rig hts I EC shall not be held responsibl e for identifyi ng any or all such patent ri ghts I nternational Standard I EC 61 91 -2 has been prepared by I EC technical com mittee 91 : Electronics assem bl y technology This third edition cancels and replaces the second edition published in 201 This edition constitutes a technical revision This edition includes the following significant technical changes with respect to the previous edition: a) the requirem ents have been updated to be com pliant with the acceptance criteria in I PC-A-61 0F; b) som e of the terminolog y used in the document has been updated; c) references to I EC standards have been corrected; d) five termination styles have been added –6– I EC 61 91 -2: 201 © I EC 201 The text of this I nternational Standard is based on the following docum ents: CDV Report on votin g 91 /1 386/CDV 91 /1 429/RVC Full information on the voting for the approval of this I nternational Standard can be found in the report on voting indicated in the above table This docum ent has been drafted in accordance with the I SO/I EC Directives, Part A list of all parts of I EC 61 91 under the general title Printed board assemblies can be found in the I EC website The com mittee has decided that the contents of this document will remain unchanged until the stability date indicated on the I EC website under "http://webstore iec ch" in the data related to the specific docum ent At this date, the document will be • • • • reconfirm ed, withdrawn, replaced by a revised edition, or amended A bilingual version of this publication m ay be issued at a later date I M P O R T AN T – T h e ' c o l o u r i n s i d e ' th at it tai n s u n d e rs t a n d i n g c o l o u r p ri n t e r of c o l o u rs i ts wh i ch c o n te n ts l ogo a re U s e rs on th e co ve r p ag e o f th i s c o n s i d e re d s h ou l d to t h e re fo re be p u b l i c ati o n u s e fu l p ri n t th i s fo r i n d i c a te s th e d o cu m en t c o rre c t u sin g a I EC 61 91 -2: 201 © I EC 201 –7– P RI N T E D B O ARD AS S E M B L I E S – P a rt : S e c ti o n a l s p e c i fi c a ti o n – Re q u i re m e n ts fo r s u rfa c e m o u n t s o l d e re d a s s e m b l i e s S cop e This part of I EC 61 91 gives the requirements for surface m ount solder connections The requirements pertain to those assem blies that are totally surface mounted or to the surface mounted portions of those assem blies that include other related technologies (e g through hole, chip mounting, term inal m ounting, etc ) N o rm a t i ve re fe re n c e s The following docum ents are referred to in the text in such a way that som e or all of their content constitutes requirements of this docum ent For dated references, onl y the edition cited applies For undated references, the latest edition of the referenced docum ent (including an y am endm ents) applies I EC 601 94, Printed board design, manufacture and assembly – Terms and definitions I EC 61 91 -1 , Printed board assemblies – Part 1: Generic specification – Requirements for soldered electrical and electronic assemblies using surface mount and related assembly technologies IPC-A-61 0, Acceptability of Electronic Assemblies T e rm s a n d d e fi n i t i o n s For the purposes of this docum ent, the terms and definitions given in I EC 601 94 appl y I SO and I EC m aintain term inological databases for use in standardization at the following addresses: • • I EC Electropedia: available at http://www electropedia org/ I SO Online browsing platform: available at http://www iso org/obp G e n e l re q u i re m e n t s The requirem ents of I EC 61 91 -1 are a mandatory part of this specification Workm anship shall m eet the requirem ents of I PC-A-61 in accordance with the classification requirem ents of this docum ent 5 S u rfa c e m o u n t i n g o f c o m p o n e n t s G e n e l This clause covers assem bly of components that are placed on the surface to be m anuall y or machine soldered and includes components designed for surface mounting as well as through-hole components that have been adapted for surface mounting technolog y –8– I EC 61 91 -2: 201 © I EC 201 Al i g n m en t re q u i rem en ts Sufficient process control at all stages of design and assembly shall be in place to enable the post-soldering alignm ents and solder joint fillet controls specified in to be achieved Relevant factors affecting the requirements include land and conductor design, com ponent proximities, com ponent and land solderability, solder paste/adhesive quantity and alignment and com ponent placement accuracy P ro ce s s tro l If suitable process controls are not in place to ensure com pliance with 5.2 and the intent of Annex A, the detailed requirem ents of Annex A shall be m andatory S u rface m ou n te d co m p on en t re q u i rem en ts The leads of lead surface mounted components shall be form ed to their final configuration prior to m ounting Leads shall be form ed in such a m anner that the lead-to-bod y seal is not damaged or degraded and that they m ay be soldered into place by subsequent processes which not result in residual stresses decreasing reliability When the leads of dual-in-line packages, flatpacks, and other multilead devices becom e m isaligned during processing or handling, they m ay be straightened to ensure parallelism and alignm ent prior to m ounting, while m aintaining the lead-to-bod y seal integrity 5 5 F l atp ack l e ad fo rm i n g G en e ral Leads on opposite sides of surface mounted flatpacks shall be formed such that the non-parallelism between the base surface of the com ponent and the surface of the printed board (i e com ponent cant) is minimal Com ponent cant is permissible provided the final configuration does not exceed the maxim um spacing limit of 2, m m (see Figure ) T No bend into the seal R 45° – 90° ≤ 2, mm R IEC Ke y R T lead -ben d radius nom inal lead thickness F i g u re – Le ad fo rm ati on fo r s u rface m o u n ted d evi ce 5 S u rface m ou n te d d evi ce l e ad b en d s Leads shall be supported during forming to protect the lead-to-bod y seal Bends shall not extend into the seal (see Figure ) The lead-bend radius (R) shall be > T (T = nominal lead – 22 – I EC 61 91 -2: 201 © I EC 201 L P W T J K W C A = = = = = = lead length land width lead width lead thickness land protrusion gap between package and land P K J G T F F E B D J J SOURCE: I PC Fig ure reprinted with perm ission Dimensions in millimetres Featu re Side overhang Dimension A Level A ½W Toe overh ang B c Min im um end joint wi dth C ẵW c Level B ẳW c Level C Not perm itted Not perm itted Not perm itted ¾W W L – Ka Min im um side joint length D Maxim um fillet height E b b G + T + ,0 F d d G+T G d d d Min im um fillet heig ht Solder thickness L–K a a Where the lug is intended to be sold ered beneath the com pon ent bod y and th e land is design ed for this purpose, th e lead shal l show evid ence of wettin g in th e gap K b Unspecifi ed param eter c Shall n ot vi olate m inim um design ductor spacing d Wetting is evi dent Figure – Flat lug leads 6.3.1 Ball grid array Solder joints of ball grid array (BGA) shall m eet the dim ensional requirem ents of Figure or Table for each product level Whether the BGA balls are collapsing or non-collapsing depends on the soldering tem perature I EC 61 91 -2: 201 © I EC 201 – 23 – SOURCE: I PC Fig ure reprinted with perm ission Feature Level A, B, C Alignm ent Solder ball offset does not void m inim al electrical clearance Clearance C Solder ball offset does not void m inim al electrical clearance Soldered conn ection Solder balls contact the land and form a contin uous ell iptical, rou nd or pil lar connection Voids Level of voi din g shall be agreed between user an d supplier a b c Und erfil l or stakin g m aterial Present and com pletel y cu red i f requ ired a Desig n-i nduced voi ds by m icrovias, etc are excl ud ed I n such cases, acceptance criteri a h ave to be establish ed between user and suppli er b Manufactu rer m ay use test or anal ysis to develop altern ati ve voids criteri a u nd er consid eration of end use environm ent c Plating process induced voids, e g m icro-voi ds/cham pagn e voids, are excl uded I n such cases, acceptance criteri a have to be establish ed between user and su ppli er Figure – BGA with collapsing balls Table – BGA with non-collapsing balls Featu re Level A, B, C Alignm ent Solder ball offset does not void m inim al electrical clearance Soldered conn ection Solder is wetted to the sol der ball an d land Und erfil l or stakin g m aterial Present and com pletel y cu red i f requ ired 6.3.1 Column grid array Solder joints of colum n grid arrays with round, square and rectangle profile shall m eet the dim ensional requirem ents of Table for each product level Table – Column grid array Featu re Level A Level B, C Alignm ent Colum n offset does not void m inim al electrical clearance Colum n perim eter d oes n ot extend perim eter of the l and Soldered conn ection 270° circum ferential wetti ng 270° circum ferential wetti ng Und erfil l or stakin g m aterial Present and com pletel y cured i f requ ired – 24 – I EC 61 91 -2: 201 © I EC 201 6.3.1 Bottom termination components Solder j oints of bottom termination components shall m eet the dimensional requirem ents of Figure for each product level SOURCE: I PC Fig ure reprinted with perm ission Featu re Dimension Level A ½W a Level B ¼W a Level C ¼W a Side overhang A Toe overh ang B Not perm itted Not perm itted Not perm itted Min im um end joint wi dth C ẵW ắW ắW Min im um side joint length D d d d Solder fillet thickn ess G c c c Min im um toe fillet height F be be be Term ination height H e e e Lan d wi dth P b b b Term ination wi dth W b b b a Does n ot vi olate m inim um electrical clearance b Unspecifi ed param eter c Wetting is evi dent d No visual i nspectable attribute e H = h eig ht of wettable si de su rface if present Som e packages n ot h ave wettabl e su rface on sid es an d d o not requi re a side fill et Figure – Bottom termination components 6.3.1 Components with bottom thermal plane terminations (D-Pak) Solder joints of components with bottom thermal planes shall m eet the dim ensional requirements of Figure for each product level I EC 61 91 -2: 201 © I EC 201 – 25 – SOURCE: I PC Fig ure reprinted with perm ission Featu re Dimension Side overhang Aa Toe overh ang Ba Minim um end joint wi dth Ca Minim um side joint l ength Da Maxim um heel fillet h eig ht Ea Minim um heel fillet hei ght Fa Solder fillet thickn ess G Lead thickness T Featu re (onl y thermal plane connection) Dimension Level A Level B Criteri a for th e type of lead term ination bei ng used Level A Level B Therm al pl ane si de overh an g ¼W Therm al pl ane en d overhang Not perm itted Therm al pl ane en d joi nt width Level C 00 % wetti ng i n contact area Level C b Therm al pl ane si de joint length Da c Therm al pl ane solder fill et thickness G Wetting is evi dent when a fill et is present c Therm al pl ane void criteri a Therm al pl ane term ination wi dth W b Therm al pl ane lan d wi dth P d a See 3 b Solder wetti ng is n ot requi red on trim m ed edges of th e therm al plane if that exposes n ot wettable su rfaces c Acceptance criteria have to be establish ed between th e user and the su ppli er d Not specified or desig n d eterm ined variable i n size Figure – Bottom thermal plane terminations – 26 – I EC 61 91 -2: 201 © I EC 201 6.3.1 P-style terminations Solder j oints of components with P-style term inations shall meet the dim ensional requirem ents of Figure for each product level SOURCE: I PC Fig ure reprinted with perm ission Featu re Dimension Level A Level B Level C A ½W ¼W Not perm itted Toe overh ang B a a a Min im um end joint wi dth C ½W ¾W W Min im um side joint length D W ½W ½W Min im um fillet heig ht – toe an d heel F b ¼H ¼H Term ination height H c c c Min im um side fillet hei ght J b b b Term ination length L c c c Term ination wi dth W c c c Side overhang a No part of th e L porti on of th e term ination exten ds beyon d the land b Wetting is evi dent c Not specified or desig n d eterm ined variable i n size Figure – P-style terminations 6.4 6.4.1 General post-soldering requirements applicable to all surface-mounted assemblies Dewetting Non-conforming, defect level A, B, C: dewetting at an y term ination if it reduces the wetted area of an y term ination or land by m ore than % of the maximum 6.4.2 Leaching Non-conforming, defect level A, B, C: leaching at an y term ination if it causes m ore than % of the visible part of an y termination wetted area to become unwetted 6.4.3 Pits, voids, blowholes, and cavities Non-conforming, defect level A, B, C: when the wetted areas or wetted perimeters of a solder joint are reduced below the specified minimum for the relevant j oint type I EC 61 91 -2: 201 © I EC 201 6.4.4 – 27 – Solder wicking Non-conforming, defect level A, B, C: wicking prevents the specified m inim um wetting requirements for the relevant j oint type from being m et, or it causes excessive stiffness in a lead 6.4.5 Solder webs and skins Non-conforming, defect level A, B, C: an y solder web or skin present 6.4.6 Bridging Non-conforming, defect level A, B, C: an y u nwanted bridging joining normall y isolated conducting surfaces Non-conforming, defect level B, C: wh ere excess solder causes a large rigid connection between two or more com ponent term inations that are intended to be electrically connected but ph ysicall y apart, this may also be non-conform ing Defect due to stress risks from CTE m ismatch 6.4.7 Degradation of marking Non-conforming, defect level A, B, C: loss of identity data or parametric value marking through degradation of characters or colours on com ponents, parts, printed boards 6.4.8 Solder spikes Acceptable, level A, B, C: spikes that have rounded tips or are less than 0, m m high and appear in circuits that operate below 250 V AC or DC Non-conforming, defect level A, B, C: an y spike that violates m inim um design spacing 6.4.9 Disturbed joint Acceptable, level A, B, C: a j oint with surface roughness (grain y or dull finish) Non-conform ing, defect level A, B, C: an y j oint exhibiting a crack, fillet lifting, or a surface exhibiting visible contamination 6.4.1 Component damage Non-conform ing, defect level A, B, C: an y damage to a com ponent, part, or board that m ay a) cause loss of functionality, reduction in reliability, or b) result in failures to meet relevant I EC or user’s specifications, or c) be a rejection criterion for quality inspections 6.4.1 Open circuit, non-wetting Non-conforming, defect level A, B, C: an y solder joint where solder was available but there has been failure to wet an y surface specified as being part of the minimum joint, for exam ple due to solder balling, poor solderability, surface tension effect (tombstoning) 6.4.1 Component tilting Acceptable, level A, B, C: a component or part that exhibits tilt in an y direction, but meets the relevant specified requirements for all its soldered joints – 28 – I EC 61 91 -2: 201 © I EC 201 Non-conforming, defect level A, B, C: an y component or part whose tilt causes it to fail to m eet the specified minimum requirements 6.4.1 Non-conducting adhesive encroachment Acceptable, level A, B, C: adhesive encroachment into a solder joint that does not prevent it from meeting the relevant specified m inim um wetting and alignment requirem ents Non-conforming, defect level A, B, C: adhesive encroachment into a solder joint that will cause it to fail to meet the relevant specified minimum requirem ents for the j oint or prevent reliable rework 6.4.1 Open circuit, no solder available Non-conform ing, defect level A, B, C: an y failure to m ake a solder joint due to local non-availability of solder prior to or during soldering, for example arising from a stencil defect, shadowing, solder balling 6.4.1 Component on edge Acceptable, level A, B, C: provided component bod y length is less than 3, m m, width is less than , m m and thickness greater than ,0 mm and all solder j oint and alignm ent requirements for the relevant level are met Rework and repair Rework shall onl y be undertaken with prior permission of the user The m axim um num ber of rework actions on an individual board or unit shall be agreed on with the user All rework activities on a product shall be recorded in the m anufacturer’s quality system This data shall be used for continual im provem ent and corrective action by the supplier When rework is perform ed, each reworked or reflowed connection shall be inspected to the requirements of See Table for re-workable defects I EC 61 91 -2: 201 © I EC 201 – 29 – Table – Reworkable defects No Defects Defects identified i n Table of I EC 61 91 -1 : 201 Flat, ribbon L, or gull -wing l ead sol der conn ections that d o n ot m eet the req uirem ents of , or 3 Rou nd or flattened (coi ned ) lead sol der nections that n ot m eet the req ui rem ents of 3, or 4 J lead sold er conn ections that n ot m eet the requi rem ents of , or 5 Rectan gul ar or squ are en d com ponent sold er connections th at n ot m eet the requi rem ents of , or 6 Cyli nd rical end -cap term ination (MELF) sol der conn ections th at n ot m eet the requi rem ents of , or 7 Bottom only term inati on sol der connections that d o not m eet the requ irem ents of , or 8 Leadless chip carri er with castellated term inati on sol der conn ections that d o not m eet the requi rem ents of , or 9 Butt joint sold er connections th at n ot m eet the requi rem ents of , or 10 I n ward L-shaped lead necti ons that d o not m eet the req uirem ents of 3, or 1 11 Flat lug l eads on power dissipating com ponents that not m eet the req ui rem ents of , or 12 Ball gri d arrays that n ot m eet the requ irem ents of , or 3 13 Colum n g rid arrays that not m eet the req uirem ents of , or 14 Bottom term ination com ponents that not m eet the req ui rem ents of , or 15 Com ponents with bottom therm al plane term inations (D-Pak) that not m eet the requ irem ents of , or 6 16 P-style term inations th at n ot m eet the requ irem ents of , or – 30 – I EC 61 91 -2: 201 © I EC 201 Annex A (normative) Placement requirements for surface mounted devices A.1 General The following placement requirements for surface m ount devices shall be imposed onl y if process controls are not sufficientl y in place to ensure compliance with A.2 Component positioning Misregistration of components shall not reduce the spacing to adjacent printed wiring or other metallized elements by more than the minim um electrical spacing A.3 A.3.1 Small devices incorporating two terminations M etallization coverage over the land (side-to-side) At least 75 % of the com ponent m etallization width on each end of the component shall overlap the land area I f land metallization width is less than 75 % of the com ponent metallization, the component metal lization shall cover the entire width of the land (see Figure 6) A.3.2 M etallization coverage over the land (end) At least two-thirds of the length of the end metallization shall overlap the land area Minim um conductor spacing shall be maintained (see Figure 6) A.4 Mounting of cylindrical end-cap devices (MELFs) MELF devices shall be mounted such that the side overhang does not exceed 25 % of the diameter of the m etallized face (end cap) At least two-thirds of the thickness of the metallized face (end cap) shall be on the land (see Figure 7) Use of lands with cut-outs (e g U-shaped lands) to aid in component positioning is permissible provided that an adequate solder fillet is formed A.5 Registration of castellated chip carriers At least 75 % of the cross-section of each m etallized castellation of a leadless chip carrier shall be over the land to which the chip carrier is registered (see Figure 9) A.6 Surface mounted device lead and land contact Minim um contact length (D) shall be equal to 75 % of the foot length (L) for flat ribbon leads, round leads and flattened round leads Refer to Figures to A.7 Surface mounted device lead side overhang Leads may have side overhang, provided the overhang does not exceed 25 % of the lead width or 0, m m, whichever is less, and minimum conductor spacing is maintained I EC 61 91 -2: 201 © I EC 201 A.8 – 31 – Surface mounted device lead toe overhang Toe ends of leads of the following surface m ounted devices may overhang the land, provided the minimum electrical spacing and contact length is maintained: • • • flat ribbon L and gull-wing leads; round or flattened (coined) leads; J leads A.9 Surface mounted device lead height off land (prior to soldering) Round or flattened leads may be raised off the land surface a m axim um of one-half the original lead diameter Flat or ribbon leads m ay be raised off the land surface a maximum of two tim es the lead thickness or 0, mm, whichever is less Toe up or toe down on flat and round leads shall be permissible provided that separation between leads and termination area does not exceed 2T and 50 % of D lim its, respectivel y A.1 Positioning of J lead devices J lead devices shall be m ounted so that the side overhang is less than 25 % of the lead width The part shall be positioned so that a minimum solder fillet of one-and-a-half lead widths can be formed A.1 Positioning gull-wing lead devices I t is preferred that leads be seated such that the full length of the foot is within the land area (no overhang) A.1 External connections to packaging and interconnect structures Where packaging and interconnect structures (P&I ) are used to provide controlled thermal expansion, they shall not be connected to external system elem ents (i e chassis or heat sinks) that will degrade the thermal expansion control below design lim its – 32 – I EC 61 91 -2: 201 © I EC 201 Bibliography I E C an d I S O re fe re n c e s I EC 60068-2-20, Environmental testing – Part 2-20: Tests – Test T: Test methods for solderability and resistance to soldering heat of devices with leads I EC 60068-2-58, Environmental testing – Part 2-58: Tests – Test Td: Test methods for solderability, resistance to dissolution of metallization and to soldering heat of surface mounting devices (SMD) IEC 61 88-5-1 , Printed boards and printed board assemblies – Design and use – Part 5-1: Attachment (land/joint) considerations – Generic requirements IEC 61 88-5-2, Printed boards and printed board assemblies – Design and use – Part 5-2: Attachment (land/joint) considerations – Discrete components IEC 61 88-5-3, Printed boards and printed board assemblies – Design and use – Part 5-3: Attachment (land/joint) considerations – Components with gull-wing leads on two sides I EC 61 88-5-4, Printed boards and printed board assemblies – Design and use – Part 5-4: Attachment (land/joint) considerations –Components with J leads on two sides I EC 61 88-5-5, Printed boards and printed board assemblies – Design and use – Part 5-5: Attachment (land/joint) considerations – Components with gull-wing leads on four sides I EC 61 88-5-6, Printed boards and printed board assemblies – Design and use – Part 5-6: Attachment (land/joint) considerations – Chip carriers with J-leads on four sides I EC 61 88-7, Printed boards and printed board assemblies – Design and use – Part 7: Electronic component zero orientation for CAD library construction IEC 61 89-2, Test methods for electrical materials, printed boards and other interconnection structures and assemblies – Part 2: Test methods for materials for interconnection structures I EC 61 90-1 -2, Attachment materials for electronic assembly – Part 1-2: Requirements for soldering pastes for high-quality interconnects in electronics assembly IEC 61 93-1 , Quality assessment systems – Part 1: Registration and analysis of defects on printed board assemblies IEC 61 93-3, Quality assessment systems – Part 3: Selection and use of sampling plans for printed board and laminate end-product and in-process auditing IEC 62326-1 , Printed boards – Part 1: Generic specification IEC 62326-4, Printed boards – Part 4: Rigid multilayer printed boards with interlayer connections – Sectional specification IEC 62326-4-1 , Printed boards – Part 4: Rigid multilayer printed boards with interlayer connections – Sectional specification – Section 1: Capability detail specification – Performance levels A, B and C I SO 9001 , Quality management systems – Requirements I EC 61 91 -2: 201 © I EC 201 – 33 – Other references IPC-TM-650, Test Methods Manual 25 25 27 38 22 3 Detection and m easurement of ionizable surface contaminants by resistivity of solvent extract I onic cleanliness testing of bare PWBs Cleanliness test – residual rosin Surface organic contamination detection test Bow and twist (percentage) Surface insulation resistance, fluxes I PC-91 91 , General Guidelines for Implementation of Statistical Process Control (SPC) I PC-OI -645, Standard for Visual Optical Inspection Aids I PC-SM-81 7, General Requirements for Dielectric Surface Mount Adhesives I PC-A-61 0, Acceptability of Electronic Assemblies J-STD-001 , Requirements for Soldered Electrical and Electronic Assemblies J-STD-002, Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires J-STD-003, Solderability Tests for Printed Boards J-STD-004, Requirements for Soldering Fluxes J-STD-005, Requirements for Soldering Pastes J-STD-006, Requirements for Electronic Grade Solder Alloys and Fluxed and Non-Fluxed Solid Solders for Electronic Solder Applications J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic Surface Mount Devices _ INTERNATIONAL ELECTROTECHNICAL COMMISSI ON 3, rue de Varembé PO Box 31 CH-1 21 Geneva 20 Switzerland Tel: + 41 22 91 02 1 Fax: + 41 22 91 03 00 info@iec.ch www.iec.ch