Acer aspire 5310 5710 COMPAL LA 3771p JDW50 JDY70 REV 0 1

A B C D E 1 Compal confidential 2 IGL50/51 Schematics Document Mobile Yonah uFCPGA with Intel Calistoga_GM/PM+ICH7-M core logic 3 2006-05-15 REV:0.1 4 Compal Secret Data Security Classification 2005/03/10 Issued Date 2006/03/10 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title Compal Electronics, Inc Cover Sheet Size D ocum ent Num ber C u stom I G L50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet E of 48 A B C D E ZZZ1 Compal confidential File Name : LA-3061 PCB PCI-E x 16 VGA Sub BD V RAM 128/ 256MB LVDS Panel Interface Mobile Yonah uFCBGA-479/uFCPGA-478 CPU Thermal Sensor AD M1032 1 page page 4, 5, Fan Control H_A#(3 31) page Clock Generator I CS 954306 FSB H_D#(0 63) 533/667MHz page 15 Nvidia G7 2/G73M PCI-E x 16 Intel Calistoga GMCH page 18 DDR2 -400/533/667 PCBGA 1466 LVDS Panel Interface page DDR2-SO-DIMM X2 BANK 0, 1, 2, page 13,14 Dual Channel page 7, 8, 9, 10,11,12 16 Mini-PCIE Card CRT & TV OUT page 17, 36 New Card Connector x2 page 37 PCIE x3 USB2.0 Intel ICH7-M LAN I/F page 28 DMI AC-LINK mBGA-652 PCI BUS 3.3V 33 MHz page 19, 20, 21, 22 USB conn X3 page 31, 37 10/100/1G LAN CardBus Controller 1394+CARD RTL8110CL/SBL E NE CB1410 page 27 READER R5C832 page 24 page 26 MO DEM A MOM page B T Conn LPC BUS 29 page 28 3 SubWoofer page 31 RJ45 CONN page 28 Slot 1394 page 25 page 26 3IN1 READER page 38 ENE KB910/L Audio AD1986A A MOM page 29 page 33 RTC CKT page 20 page 32 BIOS page 32 SPR CONN *RJ45 CONN *MIC IN JACK *LINE OUT JACK *1394 CONN *SPDIF CONN *DC JACK *TVOUT CONN *USB CONN x1 *CIR x1 page 23 PATA CDROM Connector page 34 page 23 T ouch Pad page 30 SATA HDD Connector x2 Int.KBD Power On/Off CKT AMP & Audio Jack page 37 DC/DC Interface CKT page 35 page 34 Power Circuit DC/DC Compal Secret Data Security Classification 2005/03/10 Issued Date page 39~45 2006/03/10 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title Compal Electronics, Inc Block Diagram Size D ocum ent Num ber C u stom I G L50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet E of 48 A B+ Power Block Diagram Of The IMVP6 +3VALW +5VALW RTCVREF Regulator G920AT24 DC IN MOS AO4916 B+ BATT+ MOS TP0610K SPOK# (3.3V) VIN VIN Detector +VSB +5VS MOS SI4800 SUSP PWM CONT MAX8734AEE Switch BATT SI9182DH OUT2 ON2 PWM OZ813 ON1 OUT1 U:SI7840 X1 L:AO4410X2 SUSP +2.5VS MOS AO4916 PWM CONT MAX8770GTL+ PCI DEVICES +1.8VS Regulator APL5331KAC SYSON SUSP MOS SI4800 +1.5VS SUSP# CARD BUS R E Q/GNT# AD20 CB1410 CARD READER & 1394 R5C832 L A N CONTROLLER RTL8110SBL/CL PCI_PIRQG# AD17 PCI_PIRQF# USB DEVICE Express Card Mini Card I2C / SMB Address KB910/L (SM1-Pulled-Up 5V) ADDRESS R/W A3/A2 H 17/16 H KB910/L (SM2-Pulled-Up 3.3V) ADM1032AR 99/98 H G7xM (I2CC-Pulled-Up 3.3V) G781-1 (RESERVED) 9B/9A ICH7M SM Bus ICS9LPR325AKLFT DDR II DIMM0 DDR II DIMM1 Express Card Mini-Express LDO5 S5 S4/ Battery only O O O O O S5 S4/AC & Battery don't exist X S1 DEVICE PORT DEVICE AT24C16AN SMART BATTERY LDO3 S0 PCIE LANE LANE PCI_PIRQH# +B State S4 : STD S5 : SOFT OFF D3/D2 H A1/A0 H A3/A2 H NC NC (3.3V) (3.3V) (3.3V) (2.5V) (2.5V) LEFT SIDE BLUE TOOTH RIGHT SIDE JP810 RIGHT SIDE CMOS RIGHT SIDE BOM Structure MARK @ FUNCTION NC FOR ALL EXP@ PCIE-NEW CARD BT@ BLUE TOOTH UMA@ Internal 945GM VGA@ External G7xM SUBWOOFER@ HGT30@ CB@ S3 : STR S5 S4/AC +5VALW +1.8V +3VALW +5V O O O O X X O O O ID MB ID 1 P NAME IGL-50 IGL-51 MB REV# R0.1 R0.2 R0.3 R1.0 (EVT) (DVT) (PVT) (MP) O O X X X X X X X BRD_ID MB_ID +5VS +3VS +2.5VS +1.8VS +1.5VS +VGA_CORE +1.2VS +0.9VS +CPU_CORE +VCCP R119(Ra)=100K Ohm 1A 1.5A 1.8A 300mA 1A mA 70mA 3A EXPRESS CARD HDD ODD MDC APA2066 TPA0211 AD1986 USB PORT * 480mA 1A 200mA 1A 655mA 680mA mA 15mA 200mA mA +2.5VS VGA CARD (G7XM) NB 130mA (143mA) SUSP# O MEANS ON X MEANS OFF power plane PCI_PIRQA# 2.5A 9.8A (14.7A) NB EXPRESS CARD CLK_GEN LCDVCC VGA CARD (G7XM) SB R5C832 BIOS ROM KB910L CB1410 OUT2 PWM ISL6269CRZ VCCP PIRQ AD22 36A +3VS MOS U:SI4810B L:SI4810B +1.05VS Voltage Rails IDSEL# CPU NB +0.9VS EXTERNAL +VCCP MOS SI4800 SUSP# MOS U:SI4810B L:SI4810B P.40 CPU +5VS +1.8V Charger MB39A126 +CPU_CORE mA 160mA +3.3VS Regulator APL5912-KAC MOS AO4407 VID[0 6] +VDDA +3VALW MOS AO4916 +CPU_CORE +5VALW KB910L SB RTL8110SBL/CL +1.8V +1.8VS +0.9VREF +0.9VS DDR2_DIMM NB (667Mhz) 8A 3.1A GDDR2 VGA CARD (G7XM) 6A 4.06A DDR2_DIMM 10mA GDDR2 1A DDR2_DIMM 2A +1.5V SB 40mA +1.5VS NB SB MiniCard EXPRESS CARD VGA CARD (G7XM) R115(Rb) Vab 8.2K 18K 33K 56K 100K 200K NC 0V 0.25V 0.50V 0.82V 1.19V 1.65V 2.20V 3.30V 8.9A(13.8A) 3.8A 1A 0.65A 2A SUBWOOFER HGT30 PCMCIA/CARD BUS GIGA@ 8110SBL(SCL)Giga LAN 10/100@ 8110CL 10/100Mb LAN Compal Secret Data Security Classification 2005/03/10 Issued Date Deciphered Date 2006/03/10 THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Notes List Size D ocum ent Num ber C u stom I G L50/51 LA-3771 D ate: A Compal Electronics, Inc 星 期 四 , 六 月 08, 2006 R ev Sheet of 48 + VCCP H_ D #[0 63] I TP_TDI + VCCP 7 H_ A DS# H_ B NR# H_ B PRI# H_ BR0# H_ D EFER# H_ D R D Y# H_ HI T# H_ HI TM# H_ IE RR# H _LOCK# H_RESET# H_ ADS# H_ B NR# H_ B PRI# H_ BR0# H_ D EFER# H_ D R D Y# H_ HIT# H_ HITM# H_LOCK# H_RESET# H_ R S#[0 2] H_ RS#0 H_ RS#1 H_ RS#2 H_ T R DY# H_ T R DY# ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 B 45 H_ PROCHOT# R 83 F3 F4 G3 G2 AD4 AD3 AD1 AC4 ITP_DBRESET# C20 H_ D B SY# E1 H _DPSLP# B5 H _DPRSTP# E5 H_ DPW R# D24 ITP_BPM#4 AC2 ITP_BPM#5 AC1 H_ PROCHOT#D21 21 ITP_DBRESET# H_ D B S Y# 20 H_DPSLP# 0,45 H_DPRSTP# H_ D PW R# + VCCP H1 E2 G5 F1 H5 F21 G6 E4 D20 H4 B1 68_0402_5% 20 H_ PW RGOOD ,20 H_ C PUSLP# R 71 R 74 @ 1K_0402_5% 51_0402_5% 1 H_ PW RGOOD D6 H_ C PUSLP# D7 ITP_TCK AC5 I TP_TDI AA6 ITP_TDO AB3 TEST1 C26 TEST2 D25 ITP_TMS AB5 ITP_TRST# AB6 H_ T H ERMDA A24 H_ T H ERMDC A25 H_ T HERMTRIP# C7 ,20 H_ T HERMTRIP# H_THERMDA, H_THERMDC routing together Trace width / Spacing = 10 / 10 mil CONTROL RS0# RS1# RS2# TRDY# 56_0402_5% ITP_BPM#5 R 103 56_0402_5% ITP_TRST# R 95 56_0402_5% ITP_TCK R 96 56_0402_5% ITP_DBRESET# DINV0# DINV1# DINV2# DINV3# DBR# DBSY# DPSLP# DPRSTP# DPWR# PRDY# PREQ# PROCHOT# DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3# MISC PWRGOOD SLP# TCK TDI TDO TEST1 TEST2 TMS TRST# J26 M26 V23 AC20 H23 M24 W24 AD23 G22 N25 Y25 AE24 H_ D INV #0 H_ D INV #1 H_ D INV #2 H_ D INV #3 H_ DSTBN#0 H_ DSTBN#1 H_ DSTBN#2 H_ DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 A20M# FERR# IGNNE# INIT# LINT0 LINT1 H_ A 20M# H_ F ERR# H_ IGNN E# H_ INI T# H_ IN TR H _ NMI D5 A3 H_STPCLK# H_ S MI# LEGACY CPU THERMAL THERMDA DIODE THERMDC THERMTRIP# STPCLK# SMI# P AD T13 P AD P AD P AD P AD P AD T17 T18 T20 T16 T19 D Thermal Sensor G781F +3VS U1 H_ T H ERMDA C 311 H_ T H ERMDC 2200P_0402_50V7K EC_SMB_CK2 33 EC_SMB_CK2 E C_SMB_DA2 33 E C_SMB_DA2 D+ VDD1 D- ALERT# SCLK THERM# SDATA C 310 U_0402_16V4Z T HERM# 10K_0402_5% R 226 +3VS GND C G781F_SOP8 Address:100_1100 +5VS H_ D INV#0 H_ D INV#1 H_ D INV#2 H_ D INV#3 7 7 C 303 U_1206_10V4Z H_ D STBN#[0 3] +3VS C 309 1U_0402_25V4Z 33 E N_ F AN1 OUT -IN H_DSTBP#[0 3] F AN1 _ON B D Q19 SI3456BDV-T1-E3_TSOP6 G +IN R 222 10K_0402_5% S U1 A LM358A_SO8 JP2 A6 A5 C4 B3 C6 B4 @ 200_0402_1% ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 +VSB BPM0# BPM1# BPM2# BPM3# R 85 R 219 150K_0402_5% H_ A20M# 20 H_ F ERR# 20 H_ IGNNE# 20 H_ INIT# 20 H_ INTR 20 H _ NMI 20 F AN1 R 218 100K_0402_5% D 11 N4148_SOD80 H_STPCLK# 20 H_ S MI# 20 2 14 25 ACES_85205-0300 33 F AN_SPEED1 +IN OUT -IN TYCO_1-1674770-2_Yonah~D ME@ C 308 1000P_0402_50V7K U1 5B LM358A_SO8 + VCCP A + VCCP R 100 R 73 H _DPSLP# @ 56_0402_5% @ 56_0402_5% R 99 H _DPRSTP# B 2 A ADS# BNR# BPRI# BR0# DEFER# DRDY# HIT# HITM# IERR# LOCK# RESET# HOST CLK 56_0402_5% 7 7 7 R 84 56_0402_5% BCLK0 BCLK1 C LK_CPU_BCLK A22 C LK_CPU_BCLK# A21 15 C LK_CPU_BCLK 15 C LK_CPU_BCLK# R 101 C R 97 ITP_TDO C305 10U_0805_10V4Z ADSTB0# ADSTB1# ITP_TMS L2 V4 REQ0# REQ1# REQ2# REQ3# REQ4# H_ D#0 H_ D#1 H_ D#2 H_ D#3 H_ D#4 H_ D#5 H_ D#6 H_ D#7 H_ D#8 H_ D#9 H_ D#10 H_ D#11 H_ D#12 H_ D#13 H_ D#14 H_ D#15 H_ D#16 H_ D#17 H_ D#18 H_ D#19 H_ D#20 H_ D#21 H_ D#22 H_ D#23 H_ D#24 H_ D#25 H_ D#26 H_ D#27 H_ D#28 H_ D#29 H_ D#30 H_ D#31 H_ D#32 H_ D#33 H_ D#34 H_ D#35 H_ D#36 H_ D#37 H_ D#38 H_ D#39 H_ D#40 H_ D#41 H_ D#42 H_ D#43 H_ D#44 H_ D#45 H_ D#46 H_ D#47 H_ D#48 H_ D#49 H_ D#50 H_ D#51 H_ D#52 H_ D#53 H_ D#54 H_ D#55 H_ D#56 H_ D#57 H_ D#58 H_ D#59 H_ D#60 H_ D#61 H_ D#62 H_ D#63 H _ADSTB#0 H _ADSTB#1 DATA GROUP E22 F24 E26 H22 F23 G25 E25 E23 K24 G24 J24 J23 H26 F26 K22 H25 N22 K25 P26 R23 L25 L22 L23 M23 P25 P22 P23 T24 R24 L26 T25 N24 AA23 AB24 V24 V26 W25 U23 U25 U22 AB25 W22 Y23 AA26 Y26 Y22 AC26 AA24 AC22 AC23 AB22 AA21 AB21 AC25 AD20 AE22 AF23 AD24 AE21 AD21 AE25 AF25 AF22 AF26 H_ADSTB#0 H_ADSTB#1 K3 H2 K2 J3 L5 ADDR GROUP D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# P 7 H _REQ#0 H _REQ#1 H _REQ#2 H _REQ#3 H _REQ#4 YONAH G H_ REQ#[0 4] A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# J4 L4 M3 K5 M1 N2 J1 N3 P5 P2 L1 P4 P1 R1 Y2 U5 R3 W6 U4 Y5 U2 R4 T5 T3 W3 W5 Y4 W2 Y1 D H_ A #3 H_ A #4 H_ A #5 H_ A #6 H_ A #7 H_ A #8 H_ A #9 H_ A#10 H_ A#11 H_ A#12 H_ A#13 H_ A#14 H_ A#15 H_ A#16 H_ A#17 H_ A#18 H_ A#19 H_ A#20 H_ A#21 H_ A#22 H_ A#23 H_ A#24 H_ A#25 H_ A#26 H_ A#27 H_ A#28 H_ A#29 H_ A#30 H_ A#31 This shall place near CPU R 98 56_0402_5% C307 1000P_0402_50V7K JP 1A H_ A# [3 31] OCP# 2005/10/06 Issued Date 2006/10/06 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC C E H_ PROCHOT# OCP# Q4 @ PMBT3904_SOT23 Compal Secret Data Security Classification @ 56_0402_5% 21 Title Compal Electronics, Inc Yonah CPU in mFCPGA479 Size D ocum ent Num ber C ustom I GL 50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet of 48 + VCCP Length match within 25 mils The trace width 18 mils space 45 VC CSENSE mils 45 VSSENSE D + CPU_CORE R 69 1K_0402_1% + CPU_GTLREF R 93 100_0402_1% VC CSENSE 2 R 62 2K_0402_1% C 1 2 U_0805_10V4Z Close to CPU pin within 500mils K6 J6 M6 N6 T6 R6 K21 J21 M21 N21 T21 R21 V21 W21 V6 G21 CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0 133 0 C 132 1U_0402_25V4Z 45 H_ PSI# 45 45 45 45 45 45 45 C P U_ VID0 C P U_ VID1 C P U_ VID2 C P U_ VID3 C P U_ VID4 C P U_ VID5 C P U_ VID6 15 15 15 CPU_BSEL0 CPU_BSEL1 CPU_BSEL2 H_ P SI# AE6 C P U_ VID0 C P U_ VID1 C P U_ VID2 C P U_ VID3 C P U_ VID4 C P U_ VID5 C P U_ VID6 AD6 AF5 AE5 AF4 AE3 AF2 AE2 AD26 + CPU_GTLREF 166 1 R104 54.9_0402_1% R102 27.4_0402_1% R72 54.9_0402_1% R70 27.4_0402_1% + CPU_CORE Resistor placed within 0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal JP1C D AF7 AE7 B26 C 122 Close to CPU pin AD26 within 500mils +CPU_CORE + VCCP V SSENSE J P1B VC CSENSE V SSENSE +1.5VS R 94 100_0402_1% C PU_BSEL0 C PU_BSEL1 C PU_BSEL2 B22 B23 C21 C OMP0 C OMP1 C OMP2 C OMP3 R26 U26 U1 V1 E7 AB20 AA20 AF20 AE20 AB18 AB17 AA18 AA17 AD18 AD17 AC18 AC17 AF18 AF17 VCCSENSE VSSSENSE VCCA VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP PSI# VID0 VID1 VID2 VID3 VID4 VID5 VID6 GTLREF BSEL0 BSEL1 BSEL2 COMP0 COMP1 COMP2 COMP3 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC YONAH POWER, GROUNG, RESERVED SIGNALS AND NC B D2 F6 D3 C1 AF1 D22 C23 C24 AA1 AA4 AB2 AA3 M4 N5 T2 V3 B2 C3 T22 B25 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AB26 AA25 AD25 AE26 AB23 AC24 AF24 AE23 AA22 AD22 AC21 AF21 AB19 AA19 AD19 AC19 AF19 AE19 AB16 AA16 AD16 AC16 AF16 AE16 AB13 AA14 AD13 AC14 AF13 AE14 AB11 AA11 AD11 AC11 AF11 AE11 AB8 AA8 AD8 AC8 AF8 AE8 AA5 AD5 AC6 AF6 AB4 AC3 AF3 AE4 AB1 AA2 AD2 AE1 B6 C5 F5 E6 H6 J5 M5 L6 P6 R5 V5 U6 Y6 A4 D4 E3 H3 G4 K4 L3 P3 N4 T4 U3 Y3 W4 D1 C2 F2 G1 AE18 AE17 AB15 AA15 AD15 AC15 AF15 AE15 AB14 AA13 AD14 AC13 AF14 AE13 AB12 AA12 AD12 AC12 AF12 AE12 AB10 AB9 AA10 AA9 AD10 AD9 AC10 AC9 AF10 AF9 AE10 AE9 AB7 AA7 AD7 AC7 B20 A20 F20 E20 B18 B17 A18 A17 D18 D17 C18 C17 F18 F17 E18 E17 B15 A15 D15 C15 F15 E15 B14 A13 D14 C13 F14 E13 B12 A12 D12 C12 F12 E12 B10 B9 A10 A9 D10 D9 C10 C9 F10 F9 E10 E9 B7 A7 F7 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC YONAH POWER, GROUND K1 J2 M2 N1 T1 R2 V2 W1 A26 D26 C25 F25 B24 A23 D23 E24 B21 C22 F22 E21 B19 A19 D19 C19 F19 E19 B16 A16 D16 C16 F16 E16 B13 A14 D13 C14 F13 E14 B11 A11 D11 C11 F11 E11 B8 A8 D8 C8 F8 E8 G26 K26 J25 M25 N26 T26 R25 V25 W26 H24 G23 K23 L24 P24 N23 T23 U24 Y24 W23 H21 J22 M22 L21 P21 R22 V22 U21 Y21 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS C B TYCO_1-1674770-2_Yonah~D ME@ TYCO_1-1674770-2_Yonah~D ME@ A A Compal Secret Data Security Classification 2005/10/06 Issued Date 2006/10/06 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc Yonah CPU in mFCPGA479 Size D ocum ent Num ber C ustom I GL 50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet of 48 + CPU_CORE D D Place these capacitors on L8 (North side,Secondary Layer) C 318 U_0805_6.3V6M C 326 U_0805_6.3V6M 2 C 151 U_0805_6.3V6M C 171 U_0805_6.3V6M C 346 U_0805_6.3V6M 2 C184 U_0805_6.3V6M + CPU_CORE Place these capacitors on L8 (North side,Secondary Layer) 1 C 325 U_0805_6.3V6M C 186 U_0805_6.3V6M 1 C 341 U_0805_6.3V6M C 178 U_0805_6.3V6M C 316 U_0805_6.3V6M C 185 U_0805_6.3V6M 2 C 166 U_0805_6.3V6M C342 U_0805_6.3V6M + CPU_CORE Place these capacitors on L8 (Sorth side,Secondary Layer) 1 C 183 U_0805_6.3V6M C 170 U_0805_6.3V6M 1 C 334 U_0805_6.3V6M C 319 U_0805_6.3V6M C 172 U_0805_6.3V6M C 333 U_0805_6.3V6M C 181 U_0805_6.3V6M 2 C 176 2 U_0805_6.3V6M C C + CPU_CORE Place these capacitors on L8 (Sorth side,Secondary Layer) 1 C 150 U_0805_6.3V6M C 165 U_0805_6.3V6M 1 C 345 U_0805_6.3V6M C 173 U_0805_6.3V6M C 179 U_0805_6.3V6M 2 C 177 2 U_0805_6.3V6M C 317 U_0805_6.3V6M C182 U_0805_6.3V6M Mid Frequence Decoupling + + + C343 330U_V_2.5VK_R9 + C320 330U_V_2.5VK_R9 C339 330U_V_2.5VK_R9 + C175 330U_V_2.5VK_R9 B C180 330U_V_2.5VK_R9 South Side Secondary C324 330U_V_2.5VK_R9 + CPU_CORE + North Side Secondary ESR 1980uF B + VCCP C 109 2 0U_D2_4VM + 1 C 190 U_0402_16V4Z 2 C 136 U_0402_16V4Z C 138 U_0402_16V4Z C 137 U_0402_16V4Z C 189 U_0402_16V4Z C188 U_0402_16V4Z 2 Place these inside socket cavity on L8 (North side Secondary) A A Compal Secret Data Security Classification 2005/10/06 Issued Date 2006/10/06 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc CPU Bypass capacitors Size D ocum ent Num ber C ustom I GL 50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet of 48 U1 R27 54.9_0402_1% R26 54.9_0402_1% HCLKN HCLKP HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3 HDINV#0 HDINV#1 HDINV#2 HDINV#3 HCPURST# HADS# HTRDY# HDPWR# HDRDY# HDEFER# HHITM# HHIT# HLOCK# HBREQ0# HBNR# HBPRI# HDBSY# HCPUSLP# D8 G8 B8 F8 A8 H _REQ#0 H _REQ#1 H _REQ#2 H _REQ#3 H _REQ#4 B9 C13 H _ADSTB#0 H _ADSTB#1 VGA@ UMA_ GML@ 13 13 14 14 H_ADSTB#0 H_ADSTB#1 AG1 AG2 C L K_MCH_BCLK# C L K_MCH_BCLK H_ DSTBN#0 H_ DSTBN#1 H_ DSTBN#2 H_ DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 J7 W8 U3 AB10 H_ D INV #0 H_ D INV #1 H_ D INV #2 H_ D INV #3 B7 E8 E7 J9 H8 C3 D4 D3 B3 C7 C6 F6 A7 E3 H_RESET# H_ A DS# H_ T R DY# H_ DPW R# H_ D R D Y# H_ D EFER# H_ HI TM# H_ HI T# H _LOCK# H_ BR0# H_ B NR# H_ B PRI# H_ D B SY# H_ C PUSLP# B4 E6 D6 H_ RS#0 H_ RS#1 H_ RS#2 HRS0# HRS1# HRS2# 21 21 21 21 D MI_RXN0 D MI_RXN1 D MI_RXN2 D MI_RXN3 21 21 21 21 D MI_RXP0 D MI_RXP1 D MI_RXP2 D MI_RXP3 13 13 14 14 M_ CLK_DDR0 M_ CLK_DDR1 M_ CLK_DDR2 M_ CLK_DDR3 13 13 14 14 1 AE35 AF39 AG35 AH39 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 AC35 AE39 AF35 AG39 D MI _RXN0 D MI _RXN1 D MI _RXN2 D MI _RXN3 AE37 AF41 AG37 AH41 D M I_RXP0 D M I_RXP1 D M I_RXP2 D M I_RXP3 AC37 AE41 AF37 AG41 M_ CLK_DDR0 M_ CLK_DDR1 M_ CLK_DDR2 M_ CLK_DDR3 AY35 AR1 AW7 AW40 M_ CLK_DDR#0 M_ CLK_DDR#1 M_ CLK_DDR#2 M_ CLK_DDR#3 AW35 AT1 AY7 AY40 D D R _ CKE0_DIMMA D D R _ CKE1_DIMMA D D R _CKE2_DIMMB D D R _CKE3_DIMMB AU20 AT20 BA29 AY29 D D R _ C S0_DIMMA# AW13 D D R _ C S1_DIMMA# AW12 D D R _ CS2_DIMMB# AY21 D D R _ CS3_DIMMB# AW21 M_ODT0 M_ODT1 M_ODT2 M_ODT3 80.6_0402_1% R 28 4 4 D M I_TXN0 D M I_TXN1 D M I_TXN2 D M I_TXN3 M_ CLK_DDR#0 M_ CLK_DDR#1 M_ CLK_DDR#2 M_ CLK_DDR#3 D D R _ C S0_DIMMA# D D R _ C S1_DIMMA# D D R _ CS2_DIMMB# D D R _ CS3_DIMMB# +1.8V R 29 H_ D INV#0 H_ D INV#1 H_ D INV#2 H_ D INV#3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 D D R _ CKE0_DIMMA D D R _ CKE1_DIMMA D D R _CKE2_DIMMB D D R _CKE3_DIMMB 13 13 14 14 C L K_MCH_BCLK# 15 C L K_MCH_BCLK 15 H_ D STBN#[0 3] H_DSTBP#[0 3] 21 21 21 21 13 13 14 14 H_ REQ#[0 4] K4 T7 Y5 AC4 K3 T6 AA5 AC5 D MI_TXN0 D MI_TXN1 D MI_TXN2 D MI_TXN3 M _OCDOCMP0 M _OCDOCMP1 AL20 AF10 M_ODT0 M_ODT1 M_ODT2 M_ODT3 BA13 BA12 AY20 AU21 S MR COMPN S MRCOMPP AK1 AK41 + D D R _MCH_REF R 88 0_0402_5% H_RESET# 2 1,45 D P RSLPVR H_ ADS# H_ T R DY# H_ DPW R# H_ D R D Y# 9,23,28,37 PLT_RST# H_ DEFER# H_ HITM# H_ HIT# H_LOCK# H_ BR0# H_ B NR# H_ B PRI# H_ D B SY# H_ CPUSLP# ,20 AV9 AT9 80.6_0402_1% P M_ B MBUSY# G28 21 P M_ B MBUSY# PM_EXTTS#0 F25 3,14 PM_EXTTS#0 PM_EXTTS#1 H26 H_ T HERMTRIP# G6 ,20 H_ T HERMTRIP# IC H _POK AH33 21,33 IC H_POK PLTRST_R# AH34 R 55 100_0402_1% K28 19 MC H_ IC H_ S YNC# DMIRXN0 DMIRXN1 DMIRXN2 DMIRXN3 DMIRXP0 DMIRXP1 DMIRXP2 DMIRXP3 DMITXN0 DMITXN1 DMITXN2 DMITXN3 C FG U1 GML Description at page15 U1 4B 21 21 21 21 DMITXP0 DMITXP1 DMITXP2 DMITXP3 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20 G_CLKP G_CLKN SM_CK0 SM_CK1 SM_CK2 SM_CK3 C LK PM R20 24.9_0402_1% HADSTB#0 HADSTB#1 H_ A #3 H_ A #4 H_ A #5 H_ A #6 H_ A #7 H_ A #8 H_ A #9 H_ A#10 H_ A#11 H_ A#12 H_ A#13 H_ A#14 H_ A#15 H_ A#16 H_ A#17 H_ A#18 H_ A#19 H_ A#20 H_ A#21 H_ A#22 H_ A#23 H_ A#24 H_ A#25 H_ A#26 H_ A#27 H_ A#28 H_ A#29 H_ A#30 H_ A#31 SM_CK0# SM_CK1# SM_CK2# SM_CK3# D_REF_CLKN D_REF_CLKP D_REF_SSCLKN D_REF_SSCLKP CLK_REQ# SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3 SM_CS0# SM_CS1# SM_CS2# SM_CS3# SM_OCDCOMP0 SM_OCDCOMP1 SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3 SM_RCOMPN SM_RCOMPP NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 SM_VREF0 SM_VREF1 PM_BMBUSY# PM_EXTTS0# PM_EXTTS1# PM_THERMTRIP# PWROK RSTIN# ICH_SYNC# C ALISTOGA_FCBGA1466~D UMA_ GM@ RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5 RESERVED6 RESERVED7 RESERVED8 RESERVED9 RESERVED10 RESERVED11 RESERVED12 RESERVED13 K16 K18 J18 F18 E15 F15 E18 D19 D16 G16 E16 D15 G15 K15 C15 H16 G18 H15 J25 K27 J26 MC H_CLKSEL0 MC H_CLKSEL1 MC H_CLKSEL2 C F G3 P AD C F G4 P AD C F G5 C F G6 P AD C F G7 C F G8 P AD C F G9 C F G10 P AD C F G11 C F G12 C F G13 C F G14 C F G15 C F G16 C F G17 C F G18 C F G19 C F G20 P AD P AD P AD AG33 C L K_MCH_3GPLL AF33 C L K_MCH_3GPLL# A27 A26 MC H_CLKREQ# 15 A3 A39 A4 A40 AW1 AW41 AY1 BA1 BA2 BA3 BA39 BA40 BA41 C1 AY41 B2 B41 C41 D1 C T32 R32 F3 F7 AG11 AF11 H7 J19 A41 A34 D28 D27 A35 B R 46 10K_0402_5% R18 221_0603_1% R22 R 49 10K_0402_5% 1 R 21 R 45 @ 40.2_0402_1% 100_0402_1% M _OCDOCMP0 C16 0.1U_0402_16V4Z +VCCP 221_0603_1% @ PM_EXTTS#1 + D D R _MCH_REF + VCCP 100_0402_1% PM_EXTTS#0 100_0402_1% + VCCP C L K _MCH_SSCDREFCLK# 15 C L K _MCH_SSCDREFCLK 15 MC H_CLKREQ# +1.8V Layout Note: H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 / H_SWNG1 trace width and spacing is 10/20 C L K _MCH_DREFCLK# 15 C L K _MCH_DREFCLK 15 H_ R S#[0 2] R 25 R30 C L K_MCH_3GPLL 15 C L K_MCH_3GPLL# 15 C L K _MCH_DREFCLK# C L K _ MCH_DREFCLK C40 MC H _SSCDREFCLK# D41 MC H_ SSCDREFCLK H32 D Layout Note: +DDR_MCH_REF trace width and spacing is 20/20 C ALISTOGA_FCBGA1466~D UMA_ GM@ A MC H_CLKSEL0 15 MC H_CLKSEL1 15 MC H_CLKSEL2 15 T9 T3 C F G5 11 T10 C F G7 11 T7 C F G9 11 T5 C F G11 11 C F G12 11 C F G13 11 T2 T8 C F G16 11 T1 C F G18 11 C F G19 11 C F G20 11 +3VS 2 R23 24.9_0402_1% B HVREF0 HVREF1 HXRCOMP HXSCOMP HYRCOMP HYSCOMP HXSWING HYSWING HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 H9 C9 E11 G11 F11 G12 F9 H11 J12 G14 D9 J14 H13 J15 F14 D12 A11 C11 A12 A13 E13 G13 F12 B12 B14 C12 A14 C14 D14 PM J13 + H _VREF K13 H _XRCOMP E1 H _XSCOMP E2 H_ YR C OMP Y1 H_ YS COMP U1 + H _SW NG0 E4 + H _SW NG1 W1 HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# DDR MUXING + VCCP HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63# DMI C F1 J1 H1 J6 H3 K2 G1 G2 K9 K1 K7 J8 H4 J3 K11 G4 T10 W11 T3 U7 U9 U11 T11 W9 T1 T8 T4 W7 U5 T9 W6 T5 AB7 AA9 W4 W3 Y3 Y7 W5 Y10 AB8 W2 AA4 AA7 AA2 AA6 AA10 Y8 AA1 AB4 AC9 AB11 AC11 AB3 AC2 AD1 AD9 AC1 AD7 AC6 AB5 AD10 AD4 AC8 NC D H_ A#[3 31] U1 A H_ D#0 H_ D#1 H_ D#2 H_ D#3 H_ D#4 H_ D#5 H_ D#6 H_ D#7 H_ D#8 H_ D#9 H_ D#10 H_ D#11 H_ D#12 H_ D#13 H_ D#14 H_ D#15 H_ D#16 H_ D#17 H_ D#18 H_ D#19 H_ D#20 H_ D#21 H_ D#22 H_ D#23 H_ D#24 H_ D#25 H_ D#26 H_ D#27 H_ D#28 H_ D#29 H_ D#30 H_ D#31 H_ D#32 H_ D#33 H_ D#34 H_ D#35 H_ D#36 H_ D#37 H_ D#38 H_ D#39 H_ D#40 H_ D#41 H_ D#42 H_ D#43 H_ D#44 H_ D#45 H_ D#46 H_ D#47 H_ D#48 H_ D#49 H_ D#50 H_ D#51 H_ D#52 H_ D#53 H_ D#54 H_ D#55 H_ D#56 H_ D#57 H_ D#58 H_ D#59 H_ D#60 H_ D#61 H_ D#62 H_ D#63 RESERVED H_ D # [0 63] HOST R 31 @ 40.2_0402_1% M _OCDOCMP1 A + H _SW NG0 + H _SW NG1 0.1U_0402_16V4Z C11 R19 2 100_0402_1% 0.1U_0402_16V4Z C19 R24 2 100_0402_1% C26 0.1U_0402_16V4Z R36 200_0402_1% + H _VREF Compal Secret Data Security Classification 2005/10/06 Issued Date 2006/10/06 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc Calistoga (1/6) Size D ocum ent Num ber C u stom I G L50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet of 48 D D 13 D D R _ A_DM[0 7] 13 D D R _A_DQS[0 7] C 13 D D R _A_DQS#[0 7] 13 D D R _ A_MA[0 13] D DR_A_BS#0 D DR_A_BS#1 D DR_A_BS#2 AU12 AV14 BA20 D D R _A_DM0 D D R _A_DM1 D D R _A_DM2 D D R _A_DM3 D D R _A_DM4 D D R _A_DM5 D D R _A_DM6 D D R _A_DM7 AJ33 AM35 AL26 AN22 AM14 AL9 AR3 AH4 D D R_A_DQS0 D D R_A_DQS1 D D R_A_DQS2 D D R_A_DQS3 D D R_A_DQS4 D D R_A_DQS5 D D R_A_DQS6 D D R_A_DQS7 AK33 AT33 AN28 AM22 AN12 AN8 AP3 AG5 D D R_A_DQS#0 D D R_A_DQS#1 D D R_A_DQS#2 D D R_A_DQS#3 D D R_A_DQS#4 D D R_A_DQS#5 D D R_A_DQS#6 D D R_A_DQS#7 AK32 AU33 AN27 AM21 AM12 AL8 AN3 AH5 D D R _A_MA0 D D R _A_MA1 D D R _A_MA2 D D R _A_MA3 D D R _A_MA4 D D R _A_MA5 D D R _A_MA6 D D R _A_MA7 D D R _A_MA8 D D R _A_MA9 D D R _A_MA10 D D R _A_MA11 D D R _A_MA12 D D R _A_MA13 AY16 AU14 AW16 BA16 BA17 AU16 AV17 AU17 AW17 AT16 AU13 AT17 AV20 AV12 D D R _A_CAS# D D R _A_RAS# D D R_A_W E# S A_ R C V ENIN# S A_ RCVENOUT# AY13 AW14 AY14 AK23 AK24 U14E SA_BS0 SA_BS1 SA_BS2 SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63 SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7 SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7 SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7# SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 DDR SYS MEMORY A D DR_A_BS#0 D DR_A_BS#1 D DR_A_BS#2 B 13 13 13 D D R _A_CAS# D D R _A_RAS# D D R_A_W E# T6 P AD T12 P AD SA_CAS# SA_RAS# SA_WE# SA_RCVENIN# SA_RCVENOUT# check layout AJ35 AJ34 AM31 AM33 AJ36 AK35 AJ32 AH31 AN35 AP33 AR31 AP31 AN38 AM36 AM34 AN33 AK26 AL27 AM26 AN24 AK28 AL28 AM24 AP26 AP23 AL22 AP21 AN20 AL23 AP24 AP20 AT21 AR12 AR14 AP13 AP12 AT13 AT12 AL14 AL12 AK9 AN7 AK8 AK7 AP9 AN9 AT5 AL5 AY2 AW2 AP1 AN2 AV2 AT3 AN1 AL2 AG7 AF9 AG4 AF6 AG9 AH6 AF4 AF8 D D R _A_D0 D D R _A_D1 D D R _A_D2 D D R _A_D3 D D R _A_D4 D D R _A_D5 D D R _A_D6 D D R _A_D7 D D R _A_D8 D D R _A_D9 D D R _A_D10 D D R _A_D11 D D R _A_D12 D D R _A_D13 D D R _A_D14 D D R _A_D15 D D R _A_D16 D D R _A_D17 D D R _A_D18 D D R _A_D19 D D R _A_D20 D D R _A_D21 D D R _A_D22 D D R _A_D23 D D R _A_D24 D D R _A_D25 D D R _A_D26 D D R _A_D27 D D R _A_D28 D D R _A_D29 D D R _A_D30 D D R _A_D31 D D R _A_D32 D D R _A_D33 D D R _A_D34 D D R _A_D35 D D R _A_D36 D D R _A_D37 D D R _A_D38 D D R _A_D39 D D R _A_D40 D D R _A_D41 D D R _A_D42 D D R _A_D43 D D R _A_D44 D D R _A_D45 D D R _A_D46 D D R _A_D47 D D R _A_D48 D D R _A_D49 D D R _A_D50 D D R _A_D51 D D R _A_D52 D D R _A_D53 D D R _A_D54 D D R _A_D55 D D R _A_D56 D D R _A_D57 D D R _A_D58 D D R _A_D59 D D R _A_D60 D D R _A_D61 D D R _A_D62 D D R _A_D63 D D R _ A_D[0 63] 13 14 14 14 DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2 14 D D R _B_DM[0 7] 14 D D R_B_DQS[0 7] 14 D D R_B_DQS#[0 7] 14 D D R _ B_MA[0 13] 14 14 14 D D R_B_CAS# D D R_B_RAS# D DR_B_W E# T4 P AD T11 P AD DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2 AT24 AV23 AY28 D D R_B_DM0 D D R_B_DM1 D D R_B_DM2 D D R_B_DM3 D D R_B_DM4 D D R_B_DM5 D D R_B_DM6 D D R_B_DM7 AK36 AR38 AT36 BA31 AL17 AH8 BA5 AN4 D DR_B_DQS0 D DR_B_DQS1 D DR_B_DQS2 D DR_B_DQS3 D DR_B_DQS4 D DR_B_DQS5 D DR_B_DQS6 D DR_B_DQS7 AM39 AT39 AU35 AR29 AR16 AR10 AR7 AN5 D DR_B_DQS#0 D DR_B_DQS#1 D DR_B_DQS#2 D DR_B_DQS#3 D DR_B_DQS#4 D DR_B_DQS#5 D DR_B_DQS#6 D DR_B_DQS#7 AM40 AU39 AT35 AP29 AP16 AT10 AT7 AP5 D D R_B_MA0 D D R_B_MA1 D D R_B_MA2 D D R_B_MA3 D D R_B_MA4 D D R_B_MA5 D D R_B_MA6 D D R_B_MA7 D D R_B_MA8 D D R_B_MA9 D D R_B_MA10 D D R_B_MA11 D D R_B_MA12 D D R_B_MA13 AY23 AW24 AY24 AR28 AT27 AT28 AU27 AV28 AV27 AW27 AV24 BA27 AY27 AR23 D D R_B_CAS# D D R_B_RAS# D DR_B_W E# S B _ R C VENIN# S B _RCVENOUT# AR24 AU23 AR27 AK16 AK18 SB_BS0 SB_BS1 SB_BS2 SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7 SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7 SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7# SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 DDR SYS MEMORY B U1 4D 13 13 13 SB_CAS# SB_RAS# SB_WE# SB_RCVENIN# SB_RCVENOUT# check layout C ALISTOGA_FCBGA1466~D UMA_ GM@ SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63 AK39 AJ37 AP39 AR41 AJ38 AK38 AN41 AP41 AT40 AV41 AU38 AV38 AP38 AR40 AW38 AY38 BA38 AV36 AR36 AP36 BA36 AU36 AP35 AP34 AY33 BA33 AT31 AU29 AU31 AW31 AV29 AW29 AM19 AL19 AP14 AN14 AN17 AM16 AP15 AL15 AJ11 AH10 AJ9 AN10 AK13 AH11 AK10 AJ8 BA10 AW10 BA4 AW4 AY10 AY9 AW5 AY5 AV4 AR5 AK4 AK3 AT4 AK5 AJ5 AJ3 D D R _B_D[0 63] 14 D D R_B_D0 D D R_B_D1 D D R_B_D2 D D R_B_D3 D D R_B_D4 D D R_B_D5 D D R_B_D6 D D R_B_D7 D D R_B_D8 D D R_B_D9 D D R_B_D10 D D R_B_D11 D D R_B_D12 D D R_B_D13 D D R_B_D14 D D R_B_D15 D D R_B_D16 D D R_B_D17 D D R_B_D18 D D R_B_D19 D D R_B_D20 D D R_B_D21 D D R_B_D22 D D R_B_D23 D D R_B_D24 D D R_B_D25 D D R_B_D26 D D R_B_D27 D D R_B_D28 D D R_B_D29 D D R_B_D30 D D R_B_D31 D D R_B_D32 D D R_B_D33 D D R_B_D34 D D R_B_D35 D D R_B_D36 D D R_B_D37 D D R_B_D38 D D R_B_D39 D D R_B_D40 D D R_B_D41 D D R_B_D42 D D R_B_D43 D D R_B_D44 D D R_B_D45 D D R_B_D46 D D R_B_D47 D D R_B_D48 D D R_B_D49 D D R_B_D50 D D R_B_D51 D D R_B_D52 D D R_B_D53 D D R_B_D54 D D R_B_D55 D D R_B_D56 D D R_B_D57 D D R_B_D58 D D R_B_D59 D D R_B_D60 D D R_B_D61 D D R_B_D62 D D R_B_D63 C B C ALISTOGA_FCBGA1466~D UMA_ GM@ A A Compal Secret Data Security Classification 2005/10/06 Issued Date 2006/10/06 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc Calistoga (2/6) Size D ocum ent Num ber C u stom I G L50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet of 48 D D + 1.5VS_PCIE R 54 24.9_0402_1% U1 4C L VDSA0+ L VDSA1+ LVDSA2+ 38 38 38 L VDSA0L VDSA1L VDSA2- 38 38 38 LVDSB0+ LVDSB1+ LVDSB2+ 38 38 38 L VDSAC+ L VDSACLVDSBC+ L VDSBC- 16 GMC H_ L VDDEN R 208 R 209 17 17 17 C37 B35 A37 LVDSB0+ LVDSB1+ LVDSB2+ F30 D29 F28 LVDSB0LVDSB1LVDSB2- G30 D30 F29 L VDSAC+ L V DSACLVDSBC+ L VDSBC- A32 A33 E26 E27 L D DC_CLK L D DC_DATA GMC H_ L VDDEN R 53 1.5K_0402_1% TV_COMPS T V_ LUMA T V _CRMA TV_COMPS T V_LUMA T V_CRMA D32 J30 H30 H29 G26 G25 F32 B38 C35 C33 C32 A16 C18 A19 R 42 J20 4.99K_0402_1% B16 B18 B19 J29 K30 R 210 R 211 R 212 C RT_R UMA@ 150_0603_1% C RT_G UMA@ 150_0603_1% CRT_B UMA@ 150_0603_1% VD DCCL VD D CDA 17 17 17 C R T _ VSYNC C R T _ HS YNC CRT_B 17 C RT_G 17 C RT_R VD DCCL VD D CDA C26 C25 C R T _ V SYNC C R T _ HS YNC CRT_B H23 G23 E23 D23 C22 B22 A21 B21 C RT_G C RT_R R 47 J22 255_0402_1% LA_DATA#0 LA_DATA#1 LA_DATA#2 LB_DATA0 LB_DATA1 LB_DATA2 LB_DATA#0 LB_DATA#1 LB_DATA#2 LA_CLK LA_CLK# LB_CLK LB_CLK# LBKLT_CTL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL TVDAC_A TVDAC_B TVDAC_C TV_IREF TV_IRTNA TV_IRTNB TV_IRTNC TV_DCONSEL1 TV_DCONSEL0 DDCCLK DDCDATA VSYNC HSYNC BLUE BLUE# GREEN GREEN# RED RED# C RT B 17 17 EXP_RXN0 EXP_RXN1 EXP_RXN2 EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8 EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15 LA_DATA0 LA_DATA1 LA_DATA2 TV TV_COMPS UMA@ 150_0603_1% T V_ LUMA UMA@ 150_0603_1% T V _CRMA UMA@ 150_0603_1% L VDSA0L VDSA1L VDSA2- GMC H _ENBKL 16 GMC H_ENBKL R 207 B37 B34 A36 LVDSB0LVDSB1LVDSB2- 38 38 38 38 C L VDSA0+ L VDSA1+ L VDSA2+ EXP_COMPI EXP_COMPO LV DS 38 38 38 SDVOCTRL_DATA SDVOCTRL_CLK CRT_IREF PCI-EXPRESS GRAPHICS H27 H28 EXP_RXP0 EXP_RXP1 EXP_RXP2 EXP_RXP3 EXP_RXP4 EXP_RXP5 EXP_RXP6 EXP_RXP7 EXP_RXP8 EXP_RXP9 EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15 EXP_TXN0 EXP_TXN1 EXP_TXN2 EXP_TXN3 EXP_TXN4 EXP_TXN5 EXP_TXN6 EXP_TXN7 EXP_TXN8 EXP_TXN9 EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15 EXP_TXP0 EXP_TXP1 EXP_TXP2 EXP_TXP3 EXP_TXP4 EXP_TXP5 EXP_TXP6 EXP_TXP7 EXP_TXP8 EXP_TXP9 EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15 D40 D38 PEGCOMP F34 G38 H34 J38 L34 M38 N34 P38 R34 T38 V34 W38 Y34 AA38 AB34 AC38 P EG_RXN0 P EG_RXN1 P EG_RXN2 P EG_RXN3 P EG_RXN4 P EG_RXN5 P EG_RXN6 P EG_RXN7 P EG_RXN8 P EG_RXN9 P EG_RXN10 P EG_RXN11 P EG_RXN12 P EG_RXN13 P EG_RXN14 P EG_RXN15 D34 F38 G34 H38 J34 L38 M34 N38 P34 R38 T34 V38 W34 Y38 AA34 AB38 PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15 P EG_RXN[0 15] 18 PEG_RXP[0 15] 18 C P EG_M_TXN[0 15] 18 F36 G40 H36 J40 L36 M40 N36 P40 R36 T40 V36 W40 Y36 AA40 AB36 AC40 PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15 C 153 C 124 C 142 C 115 C 155 C 126 C 148 C 117 C 157 C 128 C 140 C 119 C 159 C 130 C 144 C 121 U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z PEG_M_TXN0 PEG_M_TXN1 PEG_M_TXN2 PEG_M_TXN3 PEG_M_TXN4 PEG_M_TXN5 PEG_M_TXN6 PEG_M_TXN7 PEG_M_TXN8 PEG_M_TXN9 PEG_M_TXN10 PEG_M_TXN11 PEG_M_TXN12 PEG_M_TXN13 PEG_M_TXN14 PEG_M_TXN15 D36 F40 G36 H40 J36 L40 M36 N40 P36 R40 T36 V40 W36 Y40 AA36 AB40 PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15 C 152 C 123 C 141 C 114 C 154 C 125 C 147 C 116 C 156 C 127 C 139 C 118 C 158 C 129 C 143 C 120 U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z U_0402_16V4Z PEG_M_TXP0 PEG_M_TXP1 PEG_M_TXP2 PEG_M_TXP3 PEG_M_TXP4 PEG_M_TXP5 PEG_M_TXP6 PEG_M_TXP7 PEG_M_TXP8 PEG_M_TXP9 PEG_M_TXP10 PEG_M_TXP11 PEG_M_TXP12 PEG_M_TXP13 PEG_M_TXP14 PEG_M_TXP15 PEG_M_TXP[0 15] 18 B C ALISTOGA_FCBGA1466~D UMA_ GM@ 1 D S L D DC_CLK E D I D_CLK_LCD E D ID_CLK_LCD 38 G Q18 BSS138_SOT23 UMA@ A R 217 2.2K_0402_5% UMA@ R 214 2.2K_0402_5% @ 0_0402_5% UMA@ R 709 R216 2.2K_0402_5% UMA@ +3VS 2 UMA@ R215 2.2K_0402_5% +2.5VS A G +2.5VS L D DC_DATA E D I D_DAT_LCD D S Q17 BSS138_SOT23 UMA@ R 710 E D ID_DAT_LCD 38 Compal Secret Data Security Classification 2005/10/06 Issued Date @ 0_0402_5% 2006/10/06 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc Calistoga (3/6) Size D ocum ent Num ber C u stom I G L50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet of 48 2 + VCCP D13 +2.5VS @ D D U1 H B26 C39 AF1 +1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_HPLL A38 B39 +2.5VS AF2 +1.5VS_MPLL 2 C99 0.1U_0402_16V4Z 10U_1206_6.3V6M 10U_1206_6.3V6M C105 +1.5VS_DPLLA close pin G41 CRTDAC: Route caps within 250mil of Alviso Route FB within 3" of Calistoga + +1.5VS UMA@ L5 CHB1608U301_0603 + +1.5VS UMA@ C +2.5VS +3VS_TVBG +1.5VS_T VDAC +3VS 1 2 1 0_0805_5% B PCI-E/MEM/PSB PLL decoupling +1.5VS 1 2 @ +1.5VS_MPLL C13 2 A 2005/10/06 2006/10/06 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL A ND TRA DE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DE P A RTME NT E XCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC +1.5VS 2 1 2 R17 0_0603_5% 45mA Max 2 T itle @ Compal Secret Data Security Classification Issued Date 1 +1.5VS R213 0_0603_5% +1.5VS_HPLL R16 0_0603_5% 45mA Max +1.5VS_TVDAC C301 0.1U_0402_16V4Z +1.5VS R56 0_0603_5% +1.5VS 10U_1206_6.3V6M +1.5VS_3GPLL C9 1 0_0603_5% +3VS C14 VCCAUX32 VCCAUX33 VCCAUX34 VCCAUX35 VCCAUX36 VCCAUX37 VCCAUX38 VCCAUX39 VCCAUX40 0.1U_0402_16V4Z 2 C37 2200P_0402_50V7K VCCAUX0 VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCAUX5 VCCAUX6 VCCAUX7 VCCAUX8 VCCAUX9 VCCAUX10 VCCAUX11 VCCAUX12 VCCAUX13 VCCAUX14 VCCAUX15 VCCAUX16 VCCAUX17 VCCAUX18 VCCAUX19 VCCAUX20 VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28 VCCAUX29 VCCAUX30 VCCAUX31 AK31 AF31 AE31 AC31 AL30 AK30 AJ30 AH30 AG30 AF30 AE30 AD30 AC30 AG29 AF29 AE29 AD29 AC29 AG28 AF28 AE28 AH22 AJ21 AH21 AJ20 AH20 AH19 P19 P16 AH15 P15 AH14 C67 0.1U_0402_16V4Z VCCHV0 VCCHV1 VCCHV2 D21 H19 A23 B23 B25 C104 0.1U_0402_16V4Z VCCD_TVDAC VCCDQ_TVDAC 2 R205 A28 B28 C28 C98 10U_1206_6.3V6M VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2 C8 VCCD_HMPLL0 VCCD_HMPLL1 +3VS C46 0.1U_0402_16V4Z close pin A38 C45 2200P_0402_50V7K C58 0.1U_0402_16V4Z +1.5VS +3VS_T VDACA +3VS_T VDACA R206 C297 2200P_0402_50V7K AH1 AH2 +3VS_T VDACA C54 0.1U_0402_16V4Z +3VS_T VDACA C55 2200P_0402_50V7K +3VS_TVBG E19 F19 C20 D20 E20 F20 +3VS_T VDACA 10U_1206_6.3V6M VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1 +3VS_T VDACA C304 VCCA_TVBG VSSA_TVBG H20 G20 0.01U_0402_25V4Z VCCA_MPLL C102 P O W E R CALIST OGA_F CBGA1466~D UMA_GM@ +1.5VS_DPLLB L16 CHB1608U301_0603 +2.5VS C97 0.1U_0402_16V4Z C296 0.47U_0603_16V4Z +1.5VS VCCA_LVDS VSSA_LVDS AG14 AF14 AE14 Y14 AF13 AE13 AF12 AE12 AD12 F BM-11-160808-601-T_0603 0.1U_0402_16V4Z C10 0.47U_0603_16V4Z MCH_AB1 C12 0.22U_0603_10V7K MC H_D2 VCCA_DPLLA VCCA_DPLLB VCCA_HPLL 0.1U_0402_16V4Z C50 2.2U_0805_16V4Z C24 4.7U_0805_10V4Z C94 0.22U_0603_10V7K +2.5VS_CRT DAC +2.5VS C49 0.1U_0402_16V4Z 2 B E21 F21 G21 L4 VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC2 +1.5VS C100 +1.5VS_3GPLL +2.5VS 330U_V_2.5VK_R9 C101 M CH_A6 AC33 G41 H41 0.1U_0402_16V4Z 2 C300 + 330U_V_2.5VK_R9 C82 1 R57 0_0805_5% 0.1U_0402_16V4Z C +1.5VS_PCIE C63 2200P_0402_50V7K 10_0402_5% VCCA_3GPLL VCCA_3GBG VSSA_3GBG AB41 AJ41 L41 N41 R41 V41 Y41 +2.5VS W=40 mils C71 0.1U_0402_16V4Z + VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6 B30 C30 A30 C711 4.7U_0805_10V4Z 1 +3VS R220 @ VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2 C72 2200P_0402_50V7K C91 220U_D2_4VM D12 @ CH751H-40_SC76 VTT0 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT35 VTT36 VTT37 VTT38 VTT39 VTT40 VTT41 VTT42 VTT43 VTT44 VTT45 VTT46 VTT47 VTT48 VTT49 VTT50 VTT51 VTT52 VTT53 VTT54 VTT55 VTT56 VTT57 VTT58 VTT59 VTT60 VTT61 VTT62 VTT63 VTT64 VTT65 VTT66 VTT67 VTT68 VTT69 VTT70 VTT71 VTT72 VTT73 VTT74 VTT75 VTT76 C298 10U_1206_6.3V6M 2 +1.5VS AC14 AB14 W14 V14 T14 R14 P14 N14 M14 L14 AD13 AC13 AB13 AA13 Y13 W13 V13 U13 T13 R13 N13 M13 L13 AB12 AA12 Y12 W12 V12 U12 T12 R12 P12 N12 M12 L12 R11 P11 N11 M11 R10 P10 N10 M10 P9 N9 M9 R8 P8 N8 M8 P7 N7 M7 R6 P6 M6 A6 R5 P5 N5 M5 P4 N4 M4 R3 P3 N3 M3 R2 P2 M2 D2 AB1 R1 P1 N1 M1 C306 0.1U_0402_16V4Z C302 0.1U_0402_16V4Z R221 @ 10_0402_5% H22 220U_D2_4VM C107 VCC_SYNC +2.5VS C108 + VCCP C299 0.1U_0402_16V4Z 1 CH751H-40_SC76 A Compal Electronics, Inc Calistoga (4/6) Size Document Number C ustom I G L 0/51 LA-3771 Date: Rev 0.1 星期四 , 六月 08, 2006 Sheet 10 of 48 + 3VALW + 3VALW + 3VALW E C _ FLASH# 21 I1 O U2 T C7SH32FU_SSOP5 INT _ F LASH_EN# R 337 100K_0402_5% + 5VALW +5VALW C 199 F SEL# F SEL# R 116 100K_0402_1% U_0402_16V4Z 33 U4 33 3,40 EC_SMB_CK1 3,40 E C_SMB_DA1 0_0402_5% 1 A0 A1 A2 GND AT24C16AN-10SU-2.7_SO8 R 338 @ VCC WP SCL SDA Q30 2N7002_SOT23 F W R# R 707 22_0402_5% I1 I0 IN T_FSEL# S I0 O 0_0402_5% @ G D P F W E# P R 339 8,24,26,33,35,37,43,44 S USP# U3 T C7SH32FU_SSOP5 G U_0402_16V4Z R 442 100K_0402_1% G 1 C 501 R 117 100K_0402_1% Reserve R339, if U26 is single gate 33 K BA[0 19] 33 AD B [0 7] K B A[0 19] 1MB Flash ROM AD B [0 7] + 3VALW U3 33 F R D# K BA0 K BA1 K BA2 K BA3 K BA4 K BA5 K BA6 K BA7 K BA8 K BA9 K BA10 K BA11 K BA12 K BA13 K BA14 K BA15 K BA16 K BA17 K BA18 K BA19 21 20 19 18 17 16 15 14 36 40 13 37 IN T_FSEL# F R D# F W E# 22 24 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 VCC0 VCC1 D0 D1 D2 D3 D4 D5 D6 D7 RP# NC READY/BUSY# NC0 NC1 CE# OE# WE# GND0 GND1 31 30 A DB0 A DB1 A DB2 A DB3 A DB4 A DB5 A DB6 A DB7 25 26 27 28 32 33 34 35 RESET# 10 11 12 29 38 2 R 443 100K_0402_1% C 416 U_0402_16V4Z + 3VALW 23 39 SST39VF080-70-4C-EIE_TSOP40 Change to small socket for ROM part New LPC Debug Pad MB side JP812 R 879 @ 0_0402_5% EC_TX 5,32 C LK_14M_SIO H3 R 880 @ 0_0402_5% 32,33 EC_RX EC_RX L PC_DRQ1# R 881 0_0402_5% 21,24,26,32,33 S IRQ S E RIRQ L P C_AD2 0,32,33 L PC_AD1 0,32,33 L P C_FRAME# L P C_AD3 L P C_AD1 L P C_FRAME# L P C_AD0 10 @ 32,33 SB_INT_FLASH_SEL tie to ATI SB GPIO41 and pull down LPC_DRQ#1 20 P CI_RST# 9,21,24,25,26,27,32,33 R 882 0_0402_5% 0,32,33 L PC_AD3 EC_TX L P C_AD2 0,32,33 21 S B _INT_FLASH_SEL L P C_AD0 0,32,33 C L K_PCI_DB 5,32 K BA16 K BA15 K BA14 K BA13 K BA12 K BA11 K BA9 K BA8 F W E# RESET# INT _ F LASH_EN# S B _ INT_FLASH_SEL K BA18 K BA7 K BA6 K BA5 K BA4 K BA3 K BA2 K BA1 D E B UG_PAD 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 K BA17 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 K BA19 K BA10 A DB7 A DB6 A DB5 A DB4 + 3VALW A DB3 A DB2 A DB1 A DB0 F R D# F SEL# K BA0 S UYIN_80065AR-040G2T ME@ Under DDR ME Assigment Area Keep Resistor near Debug Pad and in the same side Standard side DIMM Pin near DIMM Reverse side DIMM Pin keep away DIMM Compal Secret Data Security Classification Issued Date 2005/10/06 Deciphered Date 2006/10/06 THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc BIOS & EC I/O Port Size D ocum ent Num ber C ustom I GL 50/51 LA-3771 D ate: 星 期 四 , 六 月 08, 2006 R ev Sheet 34 of 48 A B C D E F G H I J +5VALW R 92 +5VALW to +5VS Transfer 1 47K_0402_5% 33 U2 C 435 U_0805_10V4Z 1 +VSB D D D D S YS ON# S YS ON# U_0402_16V4Z S S S G S I4 800DY_SO8 Q6 2N7002_SOT23 C 419 +5VALW R 384 10K _0402_5% S G C 426 U_0805_10V4Z D 3,37,43 S YS ON 1 +5VS + 5VALW R UNO N R 334 10K _0402_5% D 2 S 44 S USP G Q26 2N7002_SOT23 S USP D C 434 U_0603_50V4Z S USP S 18,24,26,33,34,37,43,44 S USP# G Q24 2N7002_SOT23 3 +3VALW to +3VS Transfer + 3VALW +3VS +5VS + 1.8VS C 224 U_0603_50V4Z R 58 470_0402_5% 470_0402_5% R 335 D S USP G Q25 2N7002_SOT23 S C 313 VGA@ U_0805_10V4Z D D D D S S S G S I4 800DY_SO8 VGA@ R 227 33K _0402_5% VGA@ C 131 VGA@ U_0805_10V4Z 1 S 2 C D 470_0402_5% D S YS ON# G Q5 2N7002_SOT23 S R 105 470_0402_5% D S USP G Q704 2N7002_SOT23 S S USP G Q7 2N7002_SOT23 R UNO N 0_0402_5% Compal Secret Data 2005/10/06 Deciphered Date 2006/10/06 Title THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC B R 731 470_0402_5% Issued Date A R 228 D S USP G Q8 2N7002_SOT23 C 312 U_0603_50V4Z VGA@ Security Classification C 133 R 129 D S USP G Q20 2N7002_SOT23 VGA@ S @ VGA@ U_0402_16V4Z S +2.5VS +VSB S USP G Q3 2N7002_SOT23 S +3VS +1.8VS U1 470_0402_5% D + 1.8V +1.8V R 106 D +1.8V to +1.8VS Transfer +0.9VS R UNO N @0_0402_5% S G Q11 2N7002_SOT23 1 C 225 R 132 D S USP U_0805_10V4Z R 136 22K _0402_5% C 229 S I4 800DY_SO8 1 U_0402_16V4Z 4 C 236 U_0805_10V4Z S S S G +VSB D D D D U7 E F G H Compal Electronics, Inc DC/DC Circuit Size D ocum ent Num ber C u stom I G L50/51 LA-3771 D ate: 星 期 四 , 六 月 08, 2006 I R ev Sheet 35 of J 48 A B C D E CLOSE TO JTVOUT1 VGA I/O PORT Connector L 802 1 D 803 D 804 D A204U_SC70 @ D A2 04U_SC70 @ D A204U_SC70 @ S-VIDEO JP802 L UM A_OUT C R MA_OUT C R MA_OUT COMP_OUT L UM A_OUT L 803 C804 82P_0402_50V8J C R MA C803 82P_0402_50V8J 17 FLM1608081R8K_0603 3 D 802 2 1 +3VS 2 FLM1608081R8K_0603 C801 82P_0402_50V8J L UMA C802 82P_0402_50V8J 17 COMP_OUT 1 G1 G2 MOLEX_53780-0670 ME @ L 801 C806 82P_0402_50V8J FLM1608081R8K_0603 1 D805 D 801 D 806 +CRT_VCC D A204U_SC70 @ D A2 04U_SC70 @ D A204U_SC70 @ DSUB R ED_OUT +5VS + CRT_VCC L804 CHB1608B121_0603 GR E EN B L UE JVG A_VS_OUT 2 C809 MSEMS# VGA _DDC_DAT_OUT VGA _DDC_CLK_OUT 22P_0402_50V8J 22P_0402_50V8J C807 JVGA _HS_OUT RB751V_SOD323 L806 CHB1608B121_0603 C808 17 B LUE_OUT D 807 L805 CHB1608B121_0603 22P_0402_50V8J 17 RED 17 GR EEN_OUT 2 10 11 12 13 14 3 JP801 2 +3VS 1 C OMP C805 82P_0402_50V8J 17 1 P IN4 1 C 810 C 811 C 812 10P_0402_25V8K10P_0402_25V8K 10P_0402_25V8K 2 @ @ @ 2 15 16 10 11 12 13 14 C814 15 16 ACES_87213-1400 ME@ C 813 1U_0402_25V4Z 2 U_0402_16V4Z + CRT_VCC R804 2.2K_0402_5% 2 R803 2.2K_0402_5% CF8 @ C F9 C F 10 C F11 C F 12 C F13 C F 14 F M6 H9 HO LEA H1 HO LEA H1 HO LEA H1 HO LEA H1 HO LEA H1 HO LEA H1 HO LEA H1 HO LEA H2 HO LEA H2 HO LEA H2 HO LEA H2 HO LEA H2 HO LEA H2 HO LEA H2 H2 H2 H3 C L1 HO LEA HO LEA HO LEA HO LEA C L IP H3 HO LEA H3 HOLEA H3 HOLEA PIN D-SUB 7 8 14 10 10 13 11 11 12 12 13 15 14 FUNCTION +CRT_VCC RED GND GREEN GND BLUE GND VSYNC GND HSYNC SENSE SM_DAT SM_CLK PIN4 PIN SVIDEO FUNCTION 1 NC CRMA GND LUMA 5 GND 6 CVBS 1 1 1 1 1 1 1 1 H1 HO LEA H1 HO LEA H8 HO LEA H7 HO LEA H6 HO LEA H5 HO LEA H4 HO LEA H3 HO LEA F M5 C F7 @ 1 F M4 CF6 1 H2 HO LEA 1 H1 HO LEA F M3 C F5 CHB1608B121_0603 F M2 CF4 1 F M1 C F3 1 CF2 1 C F1 2 C815 33P_0402_50V8J L808 R ED_OUT GR EEN_OUT B LUE_OUT VGA _DDC_DAT_OUT VGA _DDC_CLK_OUT J VGA _HS_OUT J VG A_VS_OUT CHB1608B121_0603 1 C816 33P_0402_50V8J L807 17 VGA_DDC_CLK 17 JVGA_ HS 17 JVGA_VS R802 1K_0402_5% 17 VGA_DDC_DAT R801 1K_0402_5% PIN ASSIGMENT Compal Secret Data Security Classification 2005/03/10 Issued Date 2006/03/10 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title Compal Electronics, Inc CRT & TVout Connector Size D ocum ent Num ber C ustom I GL 50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet E 36 of 48 NEW CARD FOR C38 CMOS Camera Conn +1.5VS_PEC U_0805_10V4Z Express Card Power Switch EXP@ C 819 +1.5VS U_0402_16V4Z D 12 14 EXP@ C 820 U_0402_16V4Z EXP@ +3VS +3VALW 3,35,43 S YS O N 8,24,26,33,34,35,43,44 S USP# R 807 + 3VALW 21 17 PLT_RST# U_0402_16V4Z ,19,23,28 PLT_RST# +1.5VS_PEC 1.5Vin 1.5Vin S YS ON 20 S USP# 1EXP@ 100K_0402_5% 10 C P USB# 18 3.3Vin 3.3Vin AUX_IN SHDN# CPPE# PERST# EXP@ C 822 U_0402_16V4Z 16 NC US B20_N7 U SB20_P7 1 2 US B20_N5 U SB20_P5 US B20_N5 USB20_P5 R869 0_0603_5% R870 0_0603_5% C 823 EXP@ U_0805_10V4Z GND1 GND2 ACES_88266-05001 ME@ GND +3VS_PEC CPUSB# U_0805_10V4Z RCLKEN EXP@ R 808 R 809 1 EXP@ 0_0402_5% IC H _SMBCLK IC H_ SMBDATA +1.5VS_PEC +1.5VS_PEC P C IE_PME#_R +3V_PEC EXP@ 0_0402_5% 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 U SB7USB7+ C PUSB# 2 R 811 PERST# +3VS_PEC C L K RENC# C PUSB# C L K _PCIE_NC1# C L K _PCIE_NC1 C L KREQ_NC# 15 C L K _PCIE_NC1# 15 C L K _PCIE_NC1 21 21 P C IE_RXN1 PCIE_RXP1 21 21 P CIE_TXN1 PCIE_TXP1 C 825 EXP@ J P803 0_0402_5% 5,21,28 IC H_SMBCLK 5,21,28 IC H_ SMBDATA 15 JP813 21 21 PERST# STBY# C 861 1U_0402_10V6K +3V_PEC 19 OC# D +3V_PEC 15 AUX_OUT SYSRST# U_0603_6.3V6M 3.3Vout 3.3Vout close to JP14 C 1,28 IC H_ PCIE_W AKE# +5VS EXP@ C 860 EXP@ C 824 U_0402_16V4Z US B20_N7 USB20_P7 11 13 1.5Vout 1.5Vout R 5538_QFN20 EXP@ 21 21 C 818 +3VS_PEC C 821 EXP@ C 817 U_0402_16V4Z U8 01 P C IE_RXN1 P CIE_RXP1 P CIE_TXN1 PCIE_TXP1 27 28 close to JP14 C GND USB_DUSB_D+ CPUSB# RSV RSV SMB_CLK SMB_DATA +1.5V +1.5V WAKE# +3.3VAUX PERST# +3.3V +3.3V CLKREQ# CPPE# REFCLKREFCLK+ GND PERn0 PERp0 GND PETn0 PETp0 GND USB board Pulled up on ICH7M side + 5VALW +5VALW C483 U_0402_16V4Z 1 + USB_VCCD + USB_VCCB U9 GND IN IN EN# OUT OUT OUT FLG U8 03 USB_OC#2 21 G528_SO8 USB_OC#6 21 R 816 0_0402_5% US B_ON# 1 C500 @ 1000P_0402_50V7K GND IN IN EN# C 862 U_0402_16V4Z OUT OUT OUT FLG USB_OC#4 21 R 871 0_0402_5% G528_SO8 C863 @ 1000P_0402_50V7K US B_ON# 1,33 US B_ON# GND GND F OX_1CH4110C ME@ B B + USB_VCCB + C 827 C826 U_D_6.3VM U_0402_16V4Z T/P Board LID Switch + USB_VCCD +3VALW R 193 47K_0402_5% OUTPUT E C_GPIO1D 33 C 828 JP27 1000P_0402_50V7K 21 21 US B 20_N6 USB20_P6 1R 872 0_0402_5% 21 21 US B 20_N2 USB20_P2 1R 814 0_0402_5% 21 21 US B 20_N4 USB20_P4 1R 817 0_0402_5% R 873 0_0402_5% R 815 0_0402_5% C 865 R 481 100K_0402_5% 1000P_0402_50V7K RB751V_SOD323 U1 A C 864 + C 866 U_D_6.3VM R 818 0_0402_5% U_0402_16V4Z 30 EXT_MIC 29 S P DIF 29 JAC K _ P LUG_MIC R 846 0_0402_5% L ID _ SW ITCH# 33 30 29 30 C 287 A3212EEHLT-T_SOT23W-3 D 19 C 286 U_0402_16V4Z ACES_87151-0807G ME@ 0_0402_5% R 195 33 33 15P_0402_50V8J + 3VALW +5VS TP_DATA TP_DATA TP_CLK TP_CLK R 821 220_0402_5% 2 VDD 10 10 GND JP804 PL J AC K _PLUG PR 10 11 12 13 14 15 16 17 18 19 20 21 22 10 11 12 13 14 15 16 17 18 19 20 C 169 EXT_MIC C836 C 837 C 838 680P_0402_50V7K 680P_0402_50V7K 21 22 ACES_87213-2000 ME@ C 835 A 680P_0402_50V7K 680P_0402_50V7K 680P_0402_50V7K Normally Short For JACK_PLUG C835 ~ C838 For EMI Solution Compal Secret Data Security Classification 2005/03/10 Issued Date 2006/03/10 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc INDICATE LED Size D ocum ent Num ber C ustom I GL 50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet 37 of 48 4 in Card Reader + VC C_4IN1 UMA LCD/PANEL Conn + VC C_4IN1_XD JP814 41 26 S DDATA0_MSDATA0 26 S D_MSDATA1 26 S D_MSDATA2 26 S DDATA3_MSDATA3 26 XDD4 26 XDD5 26 XDD6 26 XDD7 D 26 S DCMD_MSBS 26 XDW P# 26 XDALE 26 XDCD# 26 SDW P#_XDRB# 26 26 XD_CE# XDCLE S D DATA0_MSDATA0 S D_MSDATA1 S D_MSDATA2 S D DATA3_MSDATA3 XDD4 XDD5 XDD6 XDD7 33 34 35 36 37 38 39 40 S DCMD_MSBS XDW P# XDALE X DCD# SDW P#_XDRB# S DCLK_MSCLK XD_CE# XDCLE 30 31 29 23 25 26 27 28 32 24 18 42 45 46 XD-VCC XD-D0 XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7 SD-VCC MS-VCC IN CONN XD-WE XD-WP XD-ALE XD-CD XD-R/B XD-RE XD-CE XD-CLE SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-CMD SD-CD-SW SD-CD-COM SD-WP-SW SD-WP-COM MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3 MS-INS MS-BS SD-GND SD-GND MS-GND MS-GND XD-GND XD-GND N.C N.C 15 SDW P#_XDRB# 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 + L CDVDD 9 L VDSAC+ L VDSAC- 9 LVDSA2+ L VDSA2- L VDSA1+ L VDSA1- L VDSAC+ L V DSACL VDSA2+ L VDSA2- SDW P#_XDRB# 26 R 875 22_0402_5% M SCLK S DCLK_MSCLK S DCLK_MSCLK 26 S D DATA0_MSDATA0 S DDATA0_MSDATA0 26 S D DATA1_MSDATA1 S DDATA1_MSDATA1 26 S D DATA2_MSDATA2 S DDATA2_MSDATA2 26 S D DATA3_MSDATA3 S DDATA3_MSDATA3 26 M SCD#_XDCD1 MSCD#_XDCD1 26 S DCMD_MSBS S DCMD_MSBS 26 14 17 10 JP815 (60 MIL) R 874 22_0402_5% S DCLK S DCLK_MSCLK S D DATA0_MSDATA0 S DDATA0_MSDATA0 26 S D_MSDATA1 S D_MSDATA1 26 S D_MSDATA2 S D_MSDATA2 26 S D DATA3_MSDATA3 S DDATA3_MSDATA3 26 S DCMD_MSBS S DCMD_MSBS 26 S DCD#_XDCD0# S DCD#_XDCD0# 26 16 19 20 11 12 13 21 22 43 44 9 L VDSA1+ L VDSA1L VDSA0+ L VDSA0- L VDSA0+ L VDSA0- 31 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 10 11 12 13 14 15 GNDGND 10 11 12 13 14 15 +3VS E D ID_CLK_LCD E D ID_DAT_LCD E D I D_CLK_LCD E D I D_DAT_LCD LVDSBC+ L VDSBC- L VDSBC+ L VDSBC- LVDSB2+ LVDSB2- D LVDSB2+ L VDSB2- LVDSB1+ LVDSB1- LVDSB1+ L VDSB1- LVDSB0+ LVDSB0- LVDSB0+ L VDSB0- 32 ME@ ACES_87216-30006 SHIELD GND SHIELD GND T AIT W_R012-210-LR B B A B A 33 E C _GPIO12 33 E C _GPIO59 28 W IRELESS_LED# 28 BTONLED Blue MDO0+ 27 MDO0- 27 MDO1+ 27 MDO2+ 27 MDO2- 27 MDO1- 27 27 MDO3+ MDO3- MDO0- MDO1+ MDO2+ MDO2- MDO1- MDO3+ MDO3- TX1+ Blue Amber TX1- BATT_LOW_LED# 33 C HARGE_LED0# 33 C HARGE_LED1# 33 RX1+ P W R_LED# STATUS AC Chargin Low BATT RX1RX2+ SGND1 RX2SGND2 11 12 150_0402_5% 220_0402_5% C HA RGE_LED0# C HA RGE_LED1# R 810 R 812 150_0402_5% 220_0402_5% P W R_LED# R 813 150_0402_5% C 869 BLUE Blinking Blue Amber U_0402_16V4Z 1 C 831 U_0402_16V4Z + VCC5_LED 27 Right Switch BD 2 R 820 0_0402_5% @ 1000P_0402_50V7K RJ11 KO16 KSI0 DW-UP KSI1 DW-ENTER DW-DOWN MUTE 9,30 INT _ MIC 33 T V_TUNER_LED# NOVA_BTN# 33 NUM_ LED# 33 C APS_LED# 20 SATA_LED# HDD CD-ROM 23 R 835 100K_0402_5% D 810 N OVO_BTN# B R829 @ @ ACES_87151-16071 N OVO_BTN# D 8081 R 834 R 833 R 832 1 220_0402_5% 220_0402_5% 220_0402_5% C H751H-40_SC76 D 8091 C H751H-40_SC76 16 15 14 13 12 11 10 G18 G17 18 17 JP808 32 O N/OFFBTN# U_0402_16V4Z E C_GPIO57 1ON# O DD_LED# 16 15 14 13 12 11 10 KSO16 K SI1 K SI0 KSO17 33 KSO16 2,33 K SI1 2,33 K SI0 33 KSO17 33 C AMERA_BTN# + 3VALW MDC CONN 100K_0402_5% KO17 U_0805_10V4Z NOVO BTN R 831 R 890 10K_0402_5% Dial Wheel KEY Matrix 100K_0402_5% Function E C_GPIO57 33 ON# 1 2 U_0402_16V4Z C 841 470P_0402_50V8J 2,39 D AN2 02U_SC70 A C 842 2 C 830 C832 C 839 1000P_0402_50V7K 1 1000P_0402_50V7K @ A C839, C841, C842 For EMI Solution JP809 R J _TIP R J_ R ING 1 ALLTO_C100B6-110A4-L U_0402_16V4Z R J 45_PR ME@ C 840 C 834 1000P_1206_2KV7K R J45_PR MOLEX_53780-1470~D 2 R 828 RJ11_1 RJ11_2 R 819 0_0402_5% C 833 0_0603_5% C868 U_0402_16V4Z C 829 R 827 10_0603_5% 10 1 10 11 12 13 14 GND1 GND2 U_0402_16V4Z +5VS 2 10 11 12 13 14 15 16 +3VS + 5VALW R J _TIP R J_ R ING C C 867 RJ45 B +5VS JP816 Blue : Power On, Blinking Blue : Suspend TX2+ TX2- R 805 R 806 BTONLED + 5VALW R 830 100K_0402_5% R822 100K_0402_5% Wireless / Bluetooth LED Amber BATT_CHG_LED# JP807 27 Left Switch BD C MDO0+ +3VS SUBWOOFER_ON/OFF_BTN# RF_ON/OFF_BTN# LED Indicator RJ11+RJ45 CONN E DL71_MDC Compal Secret Data Security Classification 2005/03/10 Issued Date 2006/03/10 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc INDICATE LED Size D ocum ent Num ber C ustom I GL 50/51 LA-3771 D ate: R ev 星 期 四 , 六 月 08, 2006 Sheet 38 of 48 A B C D ACIN BATT ONLY Precharge detector Min typ Max H >L 6.169V 6.231V 6.361V L >H 7.168V 7.349V 7.537V Precharge detector Min typ Max H >L 14.620V 14.853V 15.245V L >H 15.534V 15.970V 16.421V V IN A D P IN VS P R8 K_1206_5% 1 ,3 P A CIN 41 A CIN RTCV RE F P R15 10K_0402_1% P R16 0K_0402_1% P U1A L M DG_ S O8 - P A CIN O A COFF PQ2 D T C 1 E UA _ S C7 Vin Detector P Q3 D T C 1 E UA _ S C7 High 18.384 17.901 17.430 Low 17.370 16.907 16.630 3.3V B+ 3 ,4 P + P R13 00K_0402_5% 1 P R11 0K_0402_5% P D3 R L Z B _ L L 4 G 2 P R9 0K_0402_1% P R12 2K_0402_1% P C6 U_ _ V K P R10 K _ _ % VS P R14 0K_0402_1% P R4 K_1206_5% P R5 M_ _ % 1 1 P Q1 T P K -T -E _ S OT23 P R7 00K_0402_5% V IN P C5 2 U_ _ V K P R3 K_1206_5% 2 VIN P D2 R L S 4 _ L L DS P R 175 P C 131 K _ _ % @ U_ _ V K @ P R6 00K_0402_5% 1 2 2 @ J S T _ B B -E H-A (L F )(S N) P C3 100P_0402_50V8J 4 P R2 K_1206_5% P R1 P D1 0_1206_5% R L Z24B_LL34 1 P C2 00P_0402_50V8J P L2 F B MA -L -4 5 -9 0 L MA T _ 812 P C1 P _ _ V 7K 1 P C4 560P_0402_50V7K P JP1 P R17 M_ _ % VL + V P 1 RTCVREF + V (6A,240mils ,Via NO.=12) 1 + VALW + V S P (5A,200mils ,Via NO.= 10) + VALWP 1 PACIN 41 S +5VALWP @ + V S P Q6 D T C 1 E UA _ S C7 (0.3A,40mils ,Via NO.= 2) P J6 P A D - O P E N x3 m P C7 U_ _ V K G P J4 P A D - O P E N x3 m P R29 7K_0402_5% 2 + VALWP P Q5 R H U 0 N _ S OT 3 P R 25 99K_0402_1% 1 2 D P R 24 91K_0402_1% P R G ++ P U1B L M DG_ S O8 P C9 0 P _ _ V 7K - (6A,240mils ,Via NO.= 12) P J3 P A D - O P E N x3 m P R18 499K_0402_1% P G P R 19 00K_0402_1% + O 2 P R28 4K_0402_1% P A D - O P E N x3 m + V S ACON 2 41 1 PJ2 51ON# 40,42 MAINPWON P R 30 6 K _ _ % P J1 P A D - O P E N x3 m + V S P P R 27 2K_0402_1% ,3 P D6 R B F _ S OT 3 VS P C12 2 U_ _ V K GND C H GRTCP 2 2 IN OUT P C11 U _ _ V K P R26 00K_0402_5% 2 P R 21 610 _ _ %2 + C HGRTC P R23 00_0805_5% P C10 U _ 0805_25V4Z P R22 60_0603_5% PQ4 T P K -T -E _ S OT23 P U2 G A T U_ S OT P C8 U_ _ V K R TCV RE F VS P C13 U_ _ V K 3.3V 1 P D5 R B V -4 T E _ S OD3 -2 BATT+ P R 20 3_1206_5% P D4 R L S 4 _ L L DS V IN P J1 P A D - O P E N x3 m + VALW + V S P +VSBP + V S (4.5A,180mils ,Via NO.= 9) P J7 P A D - O P E N x3 m + V S P +V CCP (5A,200mils ,Via NO.= 10) Issued Date +VSB Compal Electronics, Inc Compal Secret Data Security Classification P J8 P A D - O P E N x3 m 2005/08/01 Deciphered Date 2006/08/01 THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC (0.3A,40mils ,Via NO.= 2) T itle DCIN/DECTOR S ize B Da te : A B C D o c u m e n t N u mb e r R ev 星 期 四, 六月 08, 2006 S heet D 39 of 48 B C P L3 F B MA -L -4 5 -9 0 L MA T _ 812 O M A I N P W O N ,4 P R39 VS + P O - G 2 P C20 2 U_ _ V K P R41 100K_0402_5% P U3A L M DG_ S O8 P U3B L M DG_ S O8 P R44 _0402_5% D 3 S P Q8 R H U 0 N _ S OT 3 2 G P C22 U_ _ V K S P OK 2 P R42 2K_0402_1% P R 43 00K_0402_5% 42 - +V S B P P C21 U_ _ V K B+ + P R40 50K_0402_1% PQ7 T P K -T -E _ S OT23 2 K _ 012 _ %VL 2 P C 19 U _ _ V M 2 E C _ S MB _ CK 3 ,3 P C18 1000P_0402_50V7K B A T T _ TEMP 33 E C _ S MB _ DA 3 ,3 VL T M _ RE F P P R38 K_0402_1% 16 K _ 32_ % G P R37 + VALWP 2 P R34 4 K _ 023 _ % P R36 49K_0402_1% P R 33 K _ _ % A L I / M H# VL P R32 150K_0402_1% 1 2 VS VL P H1 0 K _ _ % _ T H1 -4 H1 F T + VALWP P R 176 K_0402_1% 1 @ S U Y I N _ 0 MR0 G1 Z L _ P _ RV 1 2 PH1 under CPU botten side : CPU thermal protection at 85 degree C Recovery at 70 degree C B A T T+ P C 15 1000P_0603_50V7K P R 178 7K_0402_5% P C 14 1000P_0603_50V7K P R 177 K_0402_1% P R35 00_0402_1% A L I / N I M H# A B /I TS_A E C _ S MDA E C _ S MCA ID B/I TS SMD SMC GND P R31 00_0402_1% BATT+ B A T T _S1 P C 17 U_ _ V K B A T T++ P JP D P C 16 U_ _ V K A 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2005/08/01 Deciphered Date 2006/08/01 THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC T itle BATTERY CONN / OTP S ize B Da te : A B C D o c u m e n t N u mb e r R ev 星 期 四, 六月 08, 2006 S heet D 40 of 48 B PL4 FBMA-L11-322513-201LMA40T_1210 2 PC26 2200P_0402_50V7K PC30 1U_0603_25V7K 21 2 12 SEL -INC1 CTL +INC1 15 P C35 1500P_0603_50V7K 21 14 PC40 10P_0402_50V8J 13 2 BATT+ BATT+ 2 PR56 0.02_2512_1% PR62 33K_0402_1% M B39A126 -INE3 OUTC1 FB123 16 +INE1 PL5 10U_LF919AS-100M-P3_4.5A_20% 2 PC38 4.7U_1206_25V6K VIN P R58 47K_0402_1% 17 2 18 10 11 PR65 0_0402_5% PC39 0.01U_0402_25V7K PR63 100K_0402_1% AC O FF 3,39 PQ14 D T C115EUA_SC70 RT AC O FF -INE1 19 VH ACIN XACOK P C32 1U_0603_25V7K VREF OUT LXCHRG ACOK 20 PD11 B340A_SMA2 P R61 10K_0402_1% +3VALWP IREF=0.932*Icharge IREF=0.466~2.61V I fast charge=2.8A P C41 47P_0402_50V8J CS 1 PR67 47K_0402_5% CC=2.8A (100K/(100K+133K))*2.61V=1.12V LI-3S :13.05V BATT-OVP=1.45V BATT-OVP=0.111*BATT+ PQ18 D TC115EUA_SC70 90W HGT30 CP Point=4.166A 2 1 - P G - P U12A LM358A_SO8 1.25V/(20*0.02)=3.125A P U12B LM358A_SO8 + 5V*(10K/(30K+10K))=1.25V + 65W HGT31 CP Point=3.125A 1.666V/(20*0.02)=4.166A 2005/08/01 Compal Electronics, Inc 2006/08/01 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC C Charge voltage 3S CC-CV MODE : 12.6V SEL is L Compal Secret Data Security Classification Issued Date PC43 0.01U_0402_25V7K 33 BATT_OVP VS 5V*(10K/(30k+10k))=1.666V PR69 PR68 499K_0402_1% 340K_0402_1% VS 1.12/(20*0.02)=2.8A BATT+ PQ19 D T C115EUA_SC70 PR72 105K_0402_1% F S T CHG 33 PC42 0.01U_0402_25V7K PC25 0.1U_0603_25V7K PQ13 AO4407_SO8 PC37 4.7U_1206_25V6K VCC PD10 B340A_SMA2 2 AC O N CS -INE2 VIN AC OFF# P C29 22U_0603_16V7K CS 22 39 +INE2 2 PR66 22K_0402_1% P AC IN 24 23 PD12 RLS4148_LLDS2 39 GND P R57 P C34 1K_0402_1% 2200P_0402_50V7K M B39A1261 G +INC2 1 S PQ17 R HU002N06_SOT323 OUTC2 PR59 47K_0402_5% PR60 133K_0402_1% D 2 AC OFF# NA PR54 20K_0402_1% 1 PR53 10K_0402_1% 2 IR E F 33 -INC2 PR48 47K_0402_1% 1 1 PR52 100K_0402_1% 1 1 PC33 0.22U_0603_16V7K PQ16 R HU002N06_SOT323 2 S PC31 0.01U_0402_25V7K G PR55 150K_0402_1% PQ15 D T C115EUA_SC70 PC28 4700P_0402_25V7K 1 2 P R51 10K_0402_1% M B39A126 PR49 0_0603_5% P U4 MB39A126PFV-ER_SSOP24 D 2 CHG_B+ P2 PQ12 D TA144EUA_SC70 PC24 4.7U_1206_25V6K P R45 0.02_2512_1% PC23 4.7U_1206_25V6K 47K PQ11 AO4407_SO8 2 PC27 0.1U_0603_25V7K PR47 47K_0402_5% 47K Charger Fosc=14100/Rt=14100/47=300KHz PR64 47K_0402_5% E PQ10 AO4407_SO8 PR46 200K_0402_1% D Iadp=0~3.125A Iadp=0~4.166A B+ P2 PQ9 AO4407_SO8 VIN C PR54=30K_0402_1% PR54=20K_0402_1% PC36 4.7U_1206_25V6K PR45=0.02_2512_1% PR45=0.02_2512_1% PR50 10K_0402_1% A 65W 90W D Title PWR-Charger Size B D ate: D ocum ent Num ber R ev 星 期 四 , 六 月 08, 2006 Sheet E 41 of 48 A B C D B+ P J 23 P C 46 U_ _ V K B S T 3B P Q 21 S I 0 B DY -T -E _ S O8 2 + P L8 U H _ P C M C T -4 R7 MN_ 5 A _ % 1 +3VALWP P C 58 U _ V _ V M_ R1 2 S P OK P R93 P R 90 _0402_5% @ 57K_0402_1% PRO# P R92 _0402_5% 25 P Q3 S I B DY -T -E _ S O8 D D D D G S S S D H3 40 P Q 20 S I 0 B DY -T -E _ S O8 D D D D G S S S P R82 _0603_5% D L3 10 LDO3 P C51 U_ _ V A K 2 B S T 3A 2 P R 84 P R81 74K_0402_1% 00K_0402_1% P R80 00K_0402_1% 1 P C59 2 U_ _ V K P R94 7K_0402_5% REF 11 28 26 24 27 22 3HG LX3 P C61 U_ _ V K P C57 U_ _ V K +5V Ipeak = 6.5A ~ 10.4A P R89 10 _ _ %2 2 1 12 2VREF_19998 P R88 7K_0402_5% P R91 00K_0402_5% P ZD1 R L Z B _ L L 2 P R86 _0402_5% P C60 U _ _ V K @ GND VS LX5 DL5 ILIM5 OUT5 P U6 FB5 BST3 N.C.MA X A E E I+_ QS OP DH3 DL3 SHDN# LX3 ON5 OUT3 ON3 FB3 SKIP# PGOOD P R 83 74K_0402_1% V+ DH5 23 15 19 21 P R79 _0603_5% 2 VCC 17 13 ILIM3 P C53 U _0805_16V7K 2VREF_1999 TON BST5 20 18 16 LD05 14 P C49 U_ _ V K P R 75 7_0402_5% 1 P R77 _ _ % P C55 U_ _ V K P C52 U _ 0805_25V4Z 1 B S T 5A P C 54 U _ _ V K S S S G P Q2 S I B DY -T -E _ S O8 D D D D PL7 P R 85 K _ _ % @ VL D L5 P R87 _0402_5% 1 2 + P C56 U _ V _ V M_ R1 U H _ P C M C T -4 R7 MN_ 5 A _ % +5VALWP P R76 _ _ % D H5 P C50 2 0 P _ _ V 7K 1 P R74 _0603_5% P R78 _0603_5% MA X 3_B+ LX5 VL C H P 2 UP T _ S OT 3 -3 5HG B +++ D D D D S S S G P C48 1 U_ _ V A K P C47 2 0 P _ _ V 7K P A D - O P E N x3 m MA X 3_B+ P D13 B +++ B S T 5B 2 P C45 U_ _ V K P L6 F B MA -L 1 -3 2 -2 L MA T _ 210 +3.3V Ipeak = 6.5A ~ 8.26A P C62 U _ _ V M M A I N P W O N ,4 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2005/08/01 Deciphered Date 2006/08/01 THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC T itle +5VALWP/+3VALWP S ize D o c u m e n t N u mb e r C u s to m Da te : A B C R ev 星 期 四, 六月 08, 2006 S heet D 42 of 48 +1.8VP Ilimit = 7.87A~12.5A +1.05VSP Ilimit=6.33A~10.03A D D O Z813A_B+ OZ813_B+ PL9 FBMA-L11-322513-201LMA40T_1210 P J25 1 + 2 C PC70 4700P_0402_25V7K PC69 22P_0402_50V8J 2 1.8VS2N PR95 51_0402_1% D D D D S S S G PC156 2.2U_0603_6.3V6K PL11 UH_PCMC063T-3R3MN_6A_20% P C80 5600P_0402_50V7K 1.05VS1P 1 + 1.05VS1N PC78 220U_D2_4VM_R15 PR107 51_0402_1% 2 2 PC81 22P_0402_50V8J PQ31 SI4810BDY-T1-E3_SO8 D D D D G S S S PC79 10U_1206_25VAK PQ24 SI4800BDY-T1-E3_SO8 D D D D G S S S +3VALW P P C132 1U_0402_16V7K +1.05VSP P R108 PR109 100K_0402_1% 29.4K_0402_1% 28mohm B PC82 4700P_0402_25V7K 1 OZ813A_B+ 1 LX1.05V PR264 1K_0402_1% 2 PC68 6800P_0402_25V7K +5VALW P RB751V-40TE17_SOD323-2 P C76 1U_0603_25V7K DL_1.05V PR263 0_0402_5% 2 1.8VS2P PC71 U_0805_16V7K 1 +1.8VP P R98 22K_0402_1% 2 DH_1.05V PR179 100K_0402_1% B+ P D17 1.05VS1N B BST_1.05V 1.05VS1P P C77 1000P_0402_50V7K +5VALW P VSET1 CS1N CS1P PGD1 LX1 HDR1 2 PR106 150K_0402_1% PR172 61.9K_0402_1% P R97 100K_0402_1% RB751V-40TE17_SOD323-2 P D16 BST_1.8V 18 17 16 15 14 13 OZ813LN_QFN24 1.05SET PC66 220U_D2_4VM_R15 PQ23 SI4810BDY-T1-E3_SO8 DL_1.8V BST2 LDR2 VDDP GDNP LDR1 BST1 1.8VSET 8,24,26,33,34,35,37,44 S USP# 25 24 23 22 21 20 19 GNDA ON/SKIP2 VIN VREF TSET VDDA ON/SKIP1 10 11 12 PC75 0.01U_0402_25V7K VSET2 CS2N CS2P PGD2 LX2 HDR2 2 2 2 1 PC73 0.1U_0603_25V7K P R105 75K_0402_1% PC74 1U_0603_6.3V6M DREF 2 PC72 0.022U_0402_16V7K PR103 24K_0402_1% @ P R101 0_0402_5% PR100 1K_0402_1% @ PR99 22_0402_1% P U7 PC67 0.1U_0603_25V7K P C65 1000P_0402_50V7K PR104 100K_0402_1% C P AD-OPEN 3x3m LX_1.8V 1 PL10 UH_PCMC063T-3R3MN_6A_20%28mohm 1.8VSET PC184 0.01U_0402_25V7K 3,35,37 S YS O N DH_1.8V S S S G 2 +5VALW P PR266 0_0402_5% PQ22 SI4800BDY-T1-E3_SO8 P R262 0_0402_5% D D D D 1.8VS2N 1.8VS2P PR261 1K_0402_1% + 3VALW P PC63 10U_1206_25VAK A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2005/08/01 2006/08/01 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title 1.05VSP/1.8VP Size D ocum ent Num ber C u stom D ate: R ev 星期四, 六月 08, 2006 Sheet 43 of 48 +1.5VSP Ilimit = 9.38A~12.5A PL12 B+ D 2 1 FBMA-L11-322513-201LMA40T_1210 P J27 P AD-OPEN 3x3m PC83 10U_1206_25VAK D P H ASE_VCCPP PR265 10K_0402_1% UG_ VCCPP 2 PR110 0_0603_5% PC85 1U_0402_16V7K BOOT_VCCPP +5VS 69_VCC PVCC VCC LG P R1122 69_VCC 4.7_0603_5% P C86 2U_0603_6.3V6K PQ26 SI4800BDY-T1-E3_SO8 VIN 12 G S S S BOOT UG PHASE GND PGOOD D D D D 13 14 15 17 16 P R111 @ 4.7_0603_5% L G _VCCPP 11 FCCM PGND 10 C G S S S IS E 1N_VCCPP PR115 8.66K_0402_1% + P C88 2 U_D2_4VM_R15 C PQ27 SI4810BDY-T1-E3_SO8 VO +1.5VSP FSET P C89 01U_0402_25V7K FB ISEN COMP EN P R114 47K_0402_5% 1 8,24,26,33,34,35,37,43 S USP# PL13 UH_PCMC063T-3R3MN_6A_20% P R113 0_0402_5% D D D D 1 P C87 2U_0603_6.3V6K 1 PC90 01U_0402_25V7K P R117 57.6K_0402_1% 2 P R116 49.9K_0402_1% 2 22P_0402_50V8J PC91 1 P U8 IS L6269CRZ-T_QFN16 P C92 6800P_0402_25V7K PR118 4.53K_0402_1% P R119 3K_0402_1% +1.8VP B 1 +3VS B P J9 J UMP_43X118 PC94 0U_1206_6.3V7K NC VREF NC VOUT NC PC95 U_0603_6.3V6M S PQ28 R HU002N06_SOT323 +0.9VSP PR124 1K_0402_1% G PC102 0U_1206_6.3V7K A Compal Electronics, Inc Compal Secret Data Security Classification Issued Date D PC101 0.1U_0402_16V7K 2 PR123 100K_0402_1% S USP 35 P C98 @ U_D_6.3VM 1 + +3VALW P APL5331KAC-TRL_SO8 PC103 0.1U_0402_16V7K 2 PR125 1K_0402_1% A TP +2.5VSP PC97 10U_1206_6.3V7K P U10 APL5912-KAC-TRL_SO8 PC99 0.01U_0402_25V7K FB VIN PR122 2.15K_0402_1% EN P C100 01U_0402_25V7K 2 PR121 33K_0402_1% 18,24,26,33,34,35,37,43 S USP# GND VOUT PR120 1K_0402_1% VCNTL GND VOUT P C96 0U_1206_6.3V7K VIN 1 POK VCNTL VIN P U9 P C93 U_0603_6.3V6M P J10 JUMP_43X79 2 +5VS 2005/08/01 2006/08/01 Deciphered Date THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +VCCPP/+2.5VSP/0.9VSP Size D ocum ent Num ber C u stom D ate: R ev 星期四, 六月 08, 2006 Sheet 44 of 48 +5VS B+ PL14 FBM-L11-322513-201LMAT_1210 2 CPU_VID6 C 7,21 DPRSLPVR 4,20 H_DPRSTP# H_PSI# 36 37 11 39 40 +3VS D5 GND D6 CSP1 TIME CSN1 CCV FB REF CCI DPRSLPVR DH2 DPRSTP BST2 PSI LX2 PWRGD DL2 PC163 2200P_0402_50V7K PC162 0.1U_0603_25V7K PC161 10U_1206_25VAK PC160 10U_1206_25VAK PC159 10U_1206_25VAK 26 DL1 CPU 27 18 17 CSP1 CPU 16 CSN1_CPU 12 FB_CPU 10 C CI_CPU 21 DH2_CPU 20 BST2_CPU 22 LX2_CPU 24 DL2 CPU NTC PR230 3.48K_0402_1% 2 PH2 10KB_0603_5%_ERTJ1VR103J PC176 10U_1206_25VAK VSSENSE PQ40 SI7840DP_SO8 PQ36 FDS6676AS_SO8 G D S D S D S D PQ37 FDS6676AS_SO8 G D S D S D S D PQ35 SI7840DP_SO8 DL2 CPU PL16 P_0.36H_ETQP4LR36WFC_24A_20% 2DH2A_CPU B PR257 2.1K_0402_1% PR267 2.2_0603_5% PR256 4.7_1206_5% PR255 @10_0402_5% PC177 10U_1206_25VAK CPU_B+ PC182 680P_0603_50V7K PR254 10K_0402_5% PC181 0.1U_0402_16V7K VSSENSE PC172 4700P_0402_25V7K CPU_VCC_SENSE PC173 470P_0402_50V8J POUT C 1 PR253 @ 0_0402_5% 2 PC171 @ 0.022U_0402_16V7K PR243 100_0402_5% H_PROCHOT# PR246 @ 3K_0603_1% B PR248 20K_0402_1% 1 PQ38 RHU002N06_SOT323 PR251 100_0402_5% PR252 56_0402_5% S +3VS PR250 @ 10K_0402_5% G PR245 @ 3K_0603_1% VCCSENSE PR235 0_0402_5% CSN2 CPU 13 PR249 0_0402_5% PC169 0.22U_0603_16V7K 15 PR238 @ 3K_0603_1% PR242 3.65K_0402_1% PR239 0_0402_5% GNDS D CSN2 POUT MAX8770GTL+_TQFN40 V R_ON 33 VRHOT CSP2_CPU TP PR247 @ 0_0402_5% 15 CLK_ENABLE# 23 14 BSTM2_CPU CSP2 PC175 0.22U_0603_16V7K SHDN 41 VGATE PR241 @ 2K_0402_1% PR240 2.1K_0402_1% 21 PGND2 PR229 10_0402_5% PR237 0_0402_5% 2 PC174 1000P_0402_50V7K 38 PR244 0_0402_5% CLKEN 2 +CPU_CORE PR226 2.1K_0402_1% 2 PGND1 PL15 P_0.36H_ETQP4LR36WFC_24A_20% 2 CPU_VID5 D4 +CPU_CORE PQ32 SI7840DP_SO8 35 DL1 PQ39 SI7840DP_SO8 LX1 D3 29 CPU_VID4 D2 28 PC180 2200P_0402_50V7K 34 DH1 PC179 0.1U_0603_25V7K 2 D1 BST1_CPU BSTM1_CPU 2 PR220 PC166 DH1 CPU0_0402_5% 0.22U_0603_16V7KDH1A CPU PR268 LX1 CPU 2.2_0603_5% 30 PC178 10U_1206_25VAK CPU_VID3 33 BST1 CPU_VID2 32 D0 D 25 PR224 4.7_1206_5% + PC167 680P_0603_50V7K CPU_VID1 TON 31 VDD THRM Vcc PQ34 FDS6676AS_SO8 G D S D S D S D CPU_VID0 19 PR218 100K_0402_5% PR219 0_0402_5% PR221 0_0402_5% PR222 0_0402_5% PR223 0_0402_5% PR225 0_0402_5% PR227 0_0402_5% PR228 0_0402_5% PR232 71.5K_0402_1% PC168 470P_0402_50V8J PC170 0.22U_0603_16V7K PR233 499_0402_1% PR234 0_0402_5% PR236 0_0402_5% 1 PU11 VCC PQ33 FDS6676AS_SO8 G D S D S D S D NTC 200K_0402_5% PR216 1 2 PC164 2.2U_0603_6.3V6K PC165 1U_0603_6.3V6M PR217 @ 13K_0402_1% 2 D 0_1206_5% PR215 10_0402_5% PC157 0.01U_0402_25V7K 1 PC158 100U_25V_M CPU_B+ PR214 5VS12 PR258 3.48K_0402_1% NTC1 PH3 10KB_0603_5%_ERTJ1VR103J PC183 0.22U_0603_16V7K A PR260 0_0402_5% Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2005/06/20 Deciphered Date A 2006/06/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +CPU_CORE Size Document Number C ustom Date: R ev 0.1 星期四 , 六 ?08, 2006 Sheet 45 of 48 Version change list (P.I.R List) Item D Fixed Issue Reason for change Rev P G# Modify List Page of for PWR VER Phase D C C 10 11 B B A A Compal Electronics, Inc T itle PIR (PWR) S ize D o c u m e n t Nu mb e r D a te: 星 期四, 六月 08, 2006 R ev Sheet 46 of 48 A B C D Version change list (P.I.R List) I tem Fixed Issue E Page of Rev PG# Modify List B.Ver# P hase 1 0.2 DVT 0.2 DVT 0.2 DVT 0.2 DVT 0.2 DVT 2 0.2 DVT 0.2 DVT 3 0.2 DVT 0.2 DVT 0.2 DVT 0.2 DVT 10 11 4 Compal Electronics, Inc T itle PIR THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC C D S ize D o c u m e n t N u mb e r R ev 0 HGT30/31 LA-3061 Da te : 星 期 |, 六 月 , 0 S heet E 47 of 48 A B C D Version change list (P.I.R List) I tem Fixed Issue E Page of Rev PG# Modify List B.Ver# P hase 1 12 0.3 PVT 13 0.3 PVT 14 0.3 PVT 15 0.3 16 0.3 PVT 2 PVT 3 4 Compal Electronics, Inc T itle PIR THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC C D S ize D o c u m e n t N u mb e r R ev 0 HGT30/31 LA-3061 Da te : 星 期 |, 六 月 , 0 S heet E 48 of 48 ... 90 92 94 96 98 10 0 10 2 10 4 10 6 10 8 1 10 11 2 11 4 11 6 11 8 1 20 12 2 12 4 12 6 12 8 1 30 13 2 13 4 13 6 13 8 1 40 14 2 14 4 14 6 14 8 1 50 15 2 15 4 15 6 15 8 1 60 16 2 16 4 16 6 16 8 1 70 17 2 17 4 17 6 17 8 1 80 18 2 18 4 18 6 18 8... 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 10 1 10 3 10 5 10 7 10 9 11 1 11 3 11 5 11 7 11 9 12 1 12 3 12 5 12 7 12 9 13 1 13 3 13 5 13 7 13 9 14 1 14 3 14 5 14 7 14 9 15 1 15 3 15 5 15 7 15 9 16 1 16 3 16 5 16 7 16 9 17 1 17 3... C 81 C56 C 41 C35 C76 C 80 C73 0. 1U _04 02 _16 V4Z 0. 1U _04 02 _16 V4Z 0. 1U _04 02 _16 V4Z 0. 1U _04 02 _16 V4Z 0. 1U _04 02 _16 V4Z 0. 1U _04 02 _16 V4Z 0. 1U _04 02 _16 V4Z 0. 1U _04 02 _16 V4Z 0. 1U _04 02 _16 V4Z 0. 1U _04 02 _16 V4Z 0. 1U _04 02 _16 V4Z