Acer aspire 3600 5500 COMPAL LA 2761p

A B C D E Page Index =============== P01-Cover Page P02-Block Diagram P03-Notes List P04-Dothan(1/2) P05-Dothan(2/2) 1 P06-Alviso HOST(1/5) P07-Alviso DDR(2/5) P08-Alviso PCI-E(3/5) P09-Alviso POWER(4/5) P10-Alviso POWER(5/5) P11-DDRI-SODIMM0 Compal Confidential P12-DDRI-SODIMM1 P13-DDR Decoupling P14-Clock Generator P15-CRT Conn P16-VGA / LCD Conn EFL50/ EFT51 Schematics Document P17-ICH6(1/4)_HUB,PCI,HOST P18-ICH6(2/4)_CPU,AC97,IDE,LPC P19-ICH6(3/4)_USB,PM,LAN,GPIO 2 P20-ICH6(4/4)_POWER&GND P21-HDD/CDROM Intel Dothan/ Celeron M/ Alviso GM(PM) / DDR-2 / ICH6-M P22-DVI / TV_Out Conn P23-PCMCIA ENE CB1410 & CB714 P24-PCMCIA SOCKET P25-TI 1394A TSB43AB21A (Daughter Card: ATi M24P/ M26P) P26-LAN BCM5788M P27-LAN Magnetic & RJ45/RJ11 P28-Mimi-PCI Slot 2005 / 03 / 08 (B-Test EVT) P29-AC97 Codec_ALC250D P30-Audio Line in Switch P31-AMP & Audio Jack P32-Super IO SMC217 Rev:0.2 P33-ENE-KB910 P34-MDC / BT / KBD / TP Conn 3 P35-BIOS & I/O Port & SATA HDD P36-RJ11/LID Switch / Fan / FIR P37-USB2.0 Conn P38-Docking Conn P39-PWR_OK / RTC P40-DC INTERFACE P41-Screws P42-PWR-DCIN / Precharge P43-PWR-Charger P44-PWR-Battery Select P45-PWR-3V/5V/12V P46-PWR-GMCH_CORE/1.8V/0.9V P47-PWR-1.5V/2.5V P48-PWR-CPU_CORE 4 P49-PWR-OTP P50-PWR-PIR Compal Secret Data Security Classification 2005/03/08 Issued Date Deciphered Date 2006/03/08 A B C Title Cover Sheet THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC D Size Document Number Custom EFL50 LA-2761 Date: Wednesday, April 20, 2005 Rev 0.2 Sheet E of 51 A B C D E Compal confidential Project Code: EFL50/ EFT51 File Name : LA-2761 CRT & TV-OUT Intel Dothan/ Celeron M CPU Clock Generator ICS954226AGT page 4,5 page page 15 Thermal Sensor ADM1032ARM FSB H_A#(3 31) Daughter Card Slot PCI-Express x16 PCI-E BUS Intel Alviso GM(PM) page 15 page 14 H_D#(0 63) 400 / 533 Mhz DDR-2 DDRII-SO-DIMM X2 BANK 0, 1, 2, 3page 11,12,13 PCBGA 1257 page 6,7,8,9,10 ATi M24P/ M26P VGA Board Two Channel DDR-2 page 16 DMI LCD CONN page 16 USB conn x USB 2.0 2 page 37 Intel ICH6-M BT Conn USB 2.0 page 34 mBGA-609 PCI BUS Audio CKT ALC250-D AC-LINK BroadCOM BCM4401KFB BCM5788M Mini PCI Socket page 26 page 28 page 17,18,19,20 ENE Controller CB712 1394 Controller TSB43AB21 RJ45 CONN page 27 page 24 3in1 CardReader page 24 Slot page 36 page 36 SATA HDD Conn 394 Conn page 21 LPC BUS Docking Conn PCI-E Bridge RJ45 VGA DVI TV-Out HP-Out/ Line-Out Mic-in/ Line-in SPDIF Parallel Port Serial Port KB/ Mouse (PS/2) page 25 HDD Conn CDROM Conn PATA page 21 Power On/Off CKT page 39 SMsC LPC47N217 DC/DC Interface CKT RTC CKT page 40 page 39 ENE KB910Q page 32 page 33 Int KBD Power Circuit DC/DC page 42~49 Power OK CKT Parellel Port DOCKING CONN page 39 page 38 page 36 page 25 page 23,24 Slot page 31 RJ11 CONN MDC Conn SATA Jack x2 AMP & Audio Jack page 29 Serial Port DOCKING CONN page 38 page 34 Touch Pad CONN.page 34 page 39 BIOS page 35 Button LED Compal Secret Data Security Classification page 38 2005/03/08 Issued Date Deciphered Date 2006/03/08 A B C Title Block Diagrams THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC D Size Document Number Custom EFL50 LA-2761 Date: Wednesday, April 20, 2005 Rev 0.2 Sheet E of 51 A B C D SIGNAL STATE Voltage Rails Description S1 S3 S4/ S5 VIN Adapter power supply (19V) N/A N/A N/A B+ AC or battery power rail for power circuit N/A N/A N/A +CPU_CORE Core voltage for CPU ON OFF OFF +1.05VS 1.05V switched power rail ON OFF OFF +DDRVTT 0.9V switched power rail for DDR terminator ON OFF OFF HIGH HIGH ON ON ON ON HIGH HIGH HIGH ON ON ON LOW S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF ON ON ON* ON OFF OFF +1.8VS 1.8V switched power rail ON OFF OFF +DDRVCC 1.8V power rail for DDR ON ON OFF Vcc Ra / Rc +2.5VS 2.5V switched power rail ON OFF OFF Board ID +3VALW 3.3V always on power rail ON ON ON* +3V 3.3V power rail ON ON OFF +3VS 3.3V switched power rail ON OFF OFF +5VALW 5V always on power rail ON ON ON* +5VS 5V switched power rail ON OFF OFF +5VMOD 5V switched power rail for Module Bay ON OFF OFF +12VALW 12V always on power rail ON ON ON* +RTCVCC RTC power ON ON ON Board ID / SKU ID Table for AD channel External PCI Devices AD20 PIRQA/PIRQB 1394 AD16 PIRQE SD AD20 PIRQA/PIRQB Mini-PCI AD18 PIRQG/PIRQH LAN AD17 PIRQF Board ID Interrupts EC SM Bus1 address Address Device Address Smart Battery 0001 011X b ADM1032 1001 110X b (24C04) SKU ID 1010 000X b 1011 000Xb ICH6M SM Bus address Device Address Clock Generator (ICS 954226AGT) 1101 001Xb DDRII DIMM0 1001 000Xb DDRII DIMM2 1001 010Xb V AD_BID V 0.216 V 0.436 V 0.712 V 1.036 V 1.453 V 1.935 V 2.500 V V AD_BID typ V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V PCB Revision 0.1 0.2 BTO Item UMA Discrete LAN 10/100 LAN GIGA Spindle Spindle Spindle with SATA Spindle with PATA Spindle with SATA Spindle with PATA With Docking Without Docking With 1394 With 1394 4pin With 1394 6pin SKU BOM Structure GM@ PM@ 4401@ 5788@ 1S@ 2S@ 2SS@ 2SP@ 1SS@ 1SP@ WD@ ND@ 1394@ 1394@ 1394@ Compal Secret Data Security Classification 2005/03/08 Issued Date Deciphered Date 2006/03/08 B C Title Notes THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A V AD_BID max V 0.289 V 0.538 V 0.875 V 1.264 V 1.759 V 2.341 V 3.300 V BTO Option Table SKU ID Table EC SM Bus2 address Device 3.3V +/- 5% 100K +/- 5% Rb / Rd 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% NC BOARD ID Table Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF C ardBus Clock HIGH 1.5V switched power rail REQ#/GNT# +VS LOW 1.5V always on power rail IDSEL# +V HIGH +1.5VALW Device +VALW S1(Power On Suspend) +1.5VS EEPROM(24C16/02) SLP_S1# SLP_S3# SLP_S4# SLP_S5# Full ON Power Plane E D Size Document Number Custom EFL50 LA-2761 Date: Wednesday, April 20, 2005 Rev 0.2 Sheet E of 51 JP20A H_D#[0 63] H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_REQ#[0 4] H_RS#[0 2] H_D#[0 63] D H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0 H_ADSTB#1 H_ADSTB#0 H_ADSTB#1 C 13 CLK_CPU_BCLK 13 CLK_CPU_BCLK# H_ADS# H_BNR# H_BPRI# H_BR0# H_DEFER# H_DRDY# H_HIT# H_HITM# H_LOCK# H_CPURST# H_TRDY# CLK_CPU_BCLK CLK_CPU_BCLK# H_ADS# H_BNR# H_BPRI# H_BR0# H_DEFER# H_DRD Y# H_HIT# H_HITM# H_IERR# H_LOCK# H_CPURST# H_RS#0 H_RS#1 H_RS#2 H_TRDY# B H_DBSY# 17 H_DPSLP# 17 H_DPRSTP# H_DPWR# 17 H_PWRGOOD 6,17 H_CPUSLP# 6,17 H_THERMTRIP# A ITP_DBRRESET# H_DBSY# H_DPSLP# H_DPRSTP# H_DPWR# P4 U4 V3 R3 V2 W1 T4 W2 Y4 Y1 U1 AA3 Y3 AA2 AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 R2 P3 T2 P1 T1 A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# ADDR GROUP A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26 H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 DINV0# DINV1# DINV2# DINV3# D25 J26 T24 AD20 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 DATA GROUP REQ0# REQ1# REQ2# REQ3# REQ4# U3 AE5 ADSTB0# ADSTB1# A16 A15 ITP_CLK0 ITP_CLK1 B15 B14 BCLK0 BCLK1 N2 L1 J3 N4 L4 H2 K3 K4 A4 J2 B11 D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# Dothan ADS# BNR# BPRI# BR0# DEFER# DRDY# HIT# HITM# IERR# LOCK# RESET# H1 K1 L2 M3 RS0# RS1# RS2# TRDY# C8 B8 A9 C9 BPM0# BPM1# BPM2# BPM3# HOST CLK CONTROL GROUP PRO_CHOT# A7 M2 B7 G1 C19 A10 B10 B17 DBR# DBSY# DPSLP# DPRSTP# DPWR# PRDY# PREQ# PROCHOT# H_PWRGOOD H_CPUSLP# ITP_TCK ITP_TDI ITP_TDO TEST1 TEST2 ITP_TMS ITP_TRST# E4 A6 A13 C12 A12 C5 F23 C11 B13 PWRGOOD SLP# TCK TDI TDO TEST1 TEST2 TMS TRST# THERMDA THERMDC H_THERMTRIP# B18 A18 C17 THERMDA DIODE THERMDC THERMTRIP# MISC THERMAL DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3# C23 K24 W25 AE24 C22 L24 W24 AE25 +3VS C402 H_RS#[0 2] H_A#[3 31] C401 0.1U_0402_16V4Z U29 2200P_0402_50V7K 33 EC_SMB_CK2 33 EC_SMB_DA2 R379 @ 10K_0402_5% D H_A#[3 31] H_REQ#[0 4] THERMDA D+ VDD1 THERMDC D- ALERT# EC_SMB_CK2 SCLK EC_SMB_DA2 SDATA THERM# GND ADM1032ARM_RM8 SMBus Address: 1001110X (b) +1.05VS C ITP_TDI R53 ITP_TDO R383 @ 54.9_0402_1% 150_0402_5% H_CPURST# R382 @ 54.9_0402_1% ITP_TMS R54 40.2_0402_1% PRO_CHOT# R386 56_0402_5% H_PWRGOOD R56 200_0402_5% H_IERR# R380 56_0402_5% +3VS H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 A20M# FERR# IGNNE# INIT# LINT0 LINT1 C2 D3 A3 B5 D1 D4 H_A20M# H_FERR# H_IGNNE# H_INIT# H_INTR H_NMI STPCLK# SMI# C6 B4 H_STPCLK# H_SMI# 6 6 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 6 6 6 6 ITP_DBRRESET# R381 150_0402_5% ITP_TRST# R384 680_0402_5% ITP_TCK R385 27.4_0402_1% TEST1 R55 @ 1K_0402_5% TEST2 R401 @ 1K_0402_5% 0415 H_A20M# 17 H_FERR# 17 H_IGNNE# 17 H_INIT# 17 H_INTR 17 H_NMI 17 LEGACY CPU B H_INIT# C685 47P_0402_50V8J H_NMI C686 47P_0402_50V8J H_SMI# C687 47P_0402_50V8J H_CPURST# C688 47P_0402_50V8J H_STPCLK# 17 H_SMI# 17 A TYCO_1612365-1_Dothan THERMDA & THERMDC Trace / Space = 10 / 10 mil Compal Secret Data Security Classification 2005/03/08 Issued Date Deciphered Date 2006/03/08 Title Dothon Processor in mFCPGA479 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number Custom EFL50 LA-2761 Date: Wednesday, April 20, 2005 Rev 0.2 Sheet of 51 +CPU_CORE +CPU_CORE JP20B @ 54.9_0402_1% @ 54.9_0402_1% 2 R393 R388 R387 R417 +VCCA 1 1 30 mils0_0603_5% @20_0603_5% @20_0603_5% @20_0603_5% D +1.8VS P23 W4 VCCQ0 VCCQ1 @ 0_1206_5% +VCCA 0_1206_5% R399 Trace Width>= 40 mils 1 C405 0.01U_0402_16V7K C463 10U_0805_10V4Z D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L5 L21 M6 M22 N5 N21 P6 P22 R5 R21 T6 T22 U21 VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP D6 D8 D18 D20 D22 E5 E7 E9 E17 E19 E21 F6 F8 F18 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC C +CPU_CORE +1.05VS PSI# E1 PSI# 46 46 46 46 46 46 CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 E2 F2 F3 G3 G4 H4 VID0 VID1 VID2 VID3 VID4 VID5 R422 1K_0402_1% 46 PSI# CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 B R420 GTL_REF0 2K_0402_1% 13 CPU_BSEL0 13 CPU_BSEL1 AD26 JP20C VCCSENSE VSSSENSE VCCA0 VCCA1 VCCA2 VCCA3 1.5V FOR DOTHAN-B +1.5VS AE7 AF6 VCCA0 F26 VCCA1 B1 VCCA2 N1 VCCA3 AC26 +1.05VS 1.8V FOR DOTHAN-A R419 VCCSENSE VSSSENSE Dothan POWER, GROUNG, RESERVED SIGNALS AND NC R144 R141 GTLREF CPU_BSEL0 CPU_BSEL1 C16 C14 BSEL0 BSEL1 COMP0 COMP1 COMP2 COMP3 P25 P26 AB2 AB1 COMP0 COMP1 COMP2 COMP3 B2 C3 E26 AF7 AC1 RSVD RSVD RSVD RSVD RSVD TYCO_1612365-1_Dothan VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A2 A5 A8 A11 A14 A17 A20 A23 A26 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 220U_D2_4VM_R12 1 + + C50 C49 220U_D2_4VM_R12 220U_D2_4VM_R12 + + C151 C150 220U_D2_4VM_R12 +CPU_CORE 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 1 1 1 C455 C456 C424 C435 C443 C448 C453 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 10U_0805_10V4Z +CPU_CORE 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 1 1 1 C112 C421 C420 C434 C442 C447 C423 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 10U_0805_10V4Z +CPU_CORE 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 1 1 1 C57 C61 C72 C82 C97 C109 C60 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 10U_0805_10V4Z +CPU_CORE 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 1 1 1 C81 C452 C113 C96 C108 C58 C71 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 10U_0805_10V4Z +CPU_CORE 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 1 1 1 C668 C669 C670 C671 C672 C673 C667 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z F20 F22 G5 G21 H6 H22 J5 J21 K22 U5 V6 V22 W5 W21 Y6 Y22 AA5 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AB6 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC9 AC11 AC13 AC15 AC17 AC19 AD8 AD10 AD12 AD14 AD16 AD18 AE9 AE11 AE13 AE15 AE17 AE19 AF8 AF10 AF12 AF14 AF16 AF18 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS Dothan POWER, GROUND 10U_0805_10V4Z 0331 Vcc-core Decoupling SPCAP,Polymer C,uF ESR, mohm ESL,nH 3X330uF 9m ohm/3 3.5nH/4 MLCC 0805 X5R 35X10uF 5m ohm/35 0.6nH/35 0.1U_0402_16V4Z 0.1U_0402_16V4Z VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24 D C B TYCO_1612365-1_Dothan +1.05VS 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z A 50 mils R408 27.4_0402_1% COMP0 R407 54.9_0402_1% COMP1 R424 27.4_0402_1% COMP2 R425 54.9_0402_1% COMP3 + 500 mils C404 C63 C68 2 C90 C75 C85 1 C43 C42 C41 C98 A 150U_D2_6.3VM 0.1U_0402_16V4Z 2005/03/08 Issued Date COMP0, COMP2 layout : Width 18mils and Space 25mils COMP1, COMP3 layout : Space 25mils 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z Compal Secret Data Security Classification TRACE CLOSELY CPU > 50 mils C78 Deciphered Date 2006/03/08 Title Dothan Processor in mFCPGA479 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number Custom EFL50 LA-2761 Date: Wednesday, April 20, 2005 Rev 0.2 Sheet of 51 H_RS#[0 2] +1.5VS H_RS#[0 2] H_A#[3 31] H_A#[3 31] H_REQ#[0 4] H_REQ#[0 4] H_D#[0 63] H_D#[0 63] CLK_DREF_SSC R114 PM@ 0_0402_5% CLK_DREF_SSC# R122 PM@ 0_0402_5% U31A 13 CLK_MCH_BCLK# 13 CLK_MCH_BCLK 4 4 4 4 4 4 CLK_MCH_BCLK# CLK_MCH_BCLK AB1 AB2 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 G4 K1 R3 V3 G5 K2 R2 W4 H8 K3 T7 U5 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_CPURST# H_CPURST# H_ADS# H_TRDY# H_DPWR# H_DRD Y# H_DEFER# H_ADS# H_TRDY# H_DPWR# H_DRDY# H_DEFER# B H_HITM# H_HIT# H_LOCK# H_BR0# H_BNR# H_BPRI# H_DBSY# HCLKN HCLKP HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3 HDINV#0 HDINV#1 HDINV#2 HDINV#3 H10 HCPURST# F8 B5 G6 F7 E6 F6 D6 D4 B3 E7 A5 D5 C6 G8 A4 C5 B4 HADS# HTRDY# HDPWR# HDRDY# HDEFER# HEDRDY# HHITM# HHIT# HLOCK# HBREQ0# HBNR# HBPRI# HDBSY# HCPUSLP# HRS0# HRS1# HRS2# J11 C1 C2 T1 L1 D1 P1 H_VREF H_XRCOMP H_XSCOMP H_YRCOMP H_YSCOMP H_XSWING H_YSWING DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3 18 18 18 18 DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3 18 18 18 18 DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3 11 M_CLK_DDR0 11 M_CLK_DDR1 12 M_CLK_DDR3 12 M_CLK_DDR4 11 M_CLK_DDR#0 11 M_CLK_DDR#1 12 M_CLK_DDR#3 12 M_CLK_DDR#4 11 11 12 12 DDR_CKE0_DIMMA DDR_CKE1_DIMMA DDR_CKE2_DIMMB DDR_CKE3_DIMMB 11 11 12 12 DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS2_DIMMB# DDR_CS3_DIMMB# R162 R163 40.2_0402_1% 40.2_0402_1% 10mils 11 M_ODT0 11 M_ODT1 12 M_ODT2 12 M_ODT3 R165 R166 +1.8V 80.6_0402_1% 80.6_0402_1% 10mils AA31 AB35 AC31 AD35 DMIRXN0 DMIRXN1 DMIRXN2 DMIRXN3 DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3 Y31 AA35 AB31 AC35 DMIRXP0 DMIRXP1 DMIRXP2 DMIRXP3 AA33 AB37 AC33 AD37 DMITXN0 DMITXN1 DMITXN2 DMITXN3 Y33 AA37 AB33 AC37 DMITXP0 DMITXP1 DMITXP2 DMITXP3 DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3 DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3 M_CLK_DDR0 M_CLK_DDR1 AM33 AL1 AE11 AJ34 AF6 AC10 M_CLK_DDR3 M_CLK_DDR4 M_CLK_DDR#0 M_CLK_DDR#1 SM_CK0 SM_CK1 SM_CK2 SM_CK3 SM_CK4 SM_CK5 AN33 AK1 AE10 AJ33 AF5 AD10 SM_CK0# SM_CK1# SM_CK2# SM_CK3# SM_CK4# SM_CK5# DDR_CKE0_DIMMA AP21 DDR_CKE1_DIMMA AM21 DDR_CKE2_DIMMB AH21 DDR_CKE3_DIMMB AK21 SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3 M_CLK_DDR#3 M_CLK_DDR#4 CFG/RSVD HVREF HXRCOMP HXSCOMP HYRCOMP HYSCOMP HXSWING HYSWING 18 18 18 18 DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3 SM_CS0# SM_CS1# SM_CS2# SM_CS3# M_OCDCOMP0 M_OCDCOMP1 M_ODT0 M_ODT1 M_ODT2 M_ODT3 AF22 AF16 AP14 AL15 AM11 AN10 SM_OCDCOMP0 SM_OCDCOMP1 SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3 M_RCOMPN M_RCOMPP SMVREF AK10 AK11 AF37 AD1 AE27 AE28 AF9 AF10 SMRCOMPN SMRCOMPP SMVREF0 SMVREF1 SMXSLEWIN SMXSLEWOUT SMYSLEWIN SMYSLEWOUT +1.05VS 2 24.9_0402_1% 54.9_0402_1% 24.9_0402_1% 54.9_0402_1% (10mil:20mil) BM_BUSY# EXT_TS0# EXT_TS1# THRMTRIP# PWROK RSTIN# DREF_CLKN DREF_CLKP DREF_SSCLKP DREF_SSCLKN CPU_SLP# H_YSWING 1 +1.05VS R409 221_0603_1% 2 R406 0.1U_0402_16V4Z 200_0603_1% @ 1K_0402_5% CFG16 CFG6 R124 1K_0402_5% CFG18 CFG19 CFG7 R117 @ 1K_0402_5% CFG9 R119 @ 1K_0402_5% CFG12 R125 @ 1K_0402_5% CFG13 R137 @ 1K_0402_5% CFG16 R140 @ 1K_0402_5% NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 CLK_DREF_96M# CLK_DREF_96M CLK_DREF_SSC CLK_DREF_SSC# AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37 SMVREF 0.1U_0402_16V4Z R158 C185 1K_0402_1% (12mil:10mil) 2 C179 0.1U_0402_16V4Z C149 0.1U_0402_16V4Z R423 100_0603_1% C459 R411 0.1U_0402_16V4Z 100_0603_1% CFG18 R128 @ 1K_0402_5% CFG19 R135 @ 1K_0402_5% PM_BMBUSY# 18 H_THERMTRIP# 4,17 VGATE 13,18,46 PLT_RST# 16,18,20,32,33,41 CLK_DREF_96M# 13 CLK_DREF_96M 13 CLK_DREF_SSC 13 CLK_DREF_SSC# 13 +2.5VS EXT_TS#0 R139 10K_0402_5% EXT_TS#1 R136 10K_0402_5% CFG5 Refer to sheet for FSB frequency select Low = DMI x High = DMI x CFG6 Low = DDR-II High = DDR-I CFG7 Low = DT/Transportable CPU High = Mobile CPU CFG9 Low = Reverse Lane High = Normal Operation CFG[13:12] 00 01 10 11 CFG16 (FSB Dynamic ODT) Low = Disabled High = Enabled CFG[2:0] B * * * * = Reserved = XOR Mode Enabled = All Z Mode Enabled = Normal Operation (Default) * * CFG18 (VCC Select) Low = 1.05V (Default) High = 1.5V * CFG19 (VTT Select) Low = 1.05V (Default) High = 1.2V * A Compal Secret Data Security Classification 2005/03/08 Issued Date Deciphered Date 2006/03/08 Title Alviso HOST (1/5) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC @ 1K_0402_5% R127 C138 2 R132 CFG5 1 H_XSWING CFG0 2 (12mil:10mil) H_VREF CFG12 CFG13 1K_0402_1% R421 221_0603_1% R405 100_0603_1% (5mil:15mil) 10K_0402_5% A24 A23 D37 C37 ALVISO_BGA1257 0_0402_5% +1.05VS A R131 PM_BMBUSY# EXT_TS#0 EXT_TS#1 H_THERMTRIP# VGATE PLT_RST# 2 CFG0 J23 J21 H22 F5 AD30 AE29 R164 R130 +1.05VS H_CPUSLP# +1.05VS CFG9 H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil 4,17 H_CPUSLP# D CFG5 CFG6 CFG7 CFG[17:3]: internal pull-up +1.8V ALVISO_BGA1257 Un-pop for Dothan-A MCH_CLKSEL1 13 MCH_CLKSEL0 13 CFG[19:18]: internal pull-down 10mils R1202 R1111 R1512 R1451 CFG0 MCH_CLKSEL1 MCH_CLKSEL0 C AN16 AM14 AH15 AG16 M_YSLEW G16 H13 G14 F16 F15 G15 E16 D17 J16 D15 E15 D14 E14 H12 C14 H15 J15 H14 G22 G23 D23 G25 G24 J17 A31 A30 D26 D25 +2.5VS DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS2_DIMMB# DDR_CS3_DIMMB# M_XSLEW CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 4 4 4 H_HITM# H_HIT# H_LOCK# H_BR0# H_BNR# H_BPRI# H_DBSY# CPU_SLP# H_RS#0 H_RS#1 H_RS#2 HPCREQ# HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 HADSTB#0 HADSTB#1 DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3 NC H_ADSTB#0 H_ADSTB#1 A11 A7 D7 B8 C7 A8 B9 E13 18 18 18 18 DDR MUXING C E4 E1 F4 H7 E2 F1 E3 D3 K7 F2 J7 J8 H6 F3 K8 H5 H1 H2 K5 K6 J4 G3 H3 J1 L5 K4 J5 P7 L7 J3 P5 L3 U7 V6 R6 R5 P3 T8 R7 R8 U8 R4 T4 T5 R1 T3 V8 U6 W6 U3 V5 W8 W7 U2 U1 Y5 Y2 V4 Y7 W1 W3 Y3 Y6 W2 CLK PM H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0 H_ADSTB#1 HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63# Alviso HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# HOST D G9 C9 E9 B7 A10 F9 D8 B10 E10 G10 D9 E11 F10 G11 G13 C10 C11 D11 C12 B13 A12 F12 G12 E12 C13 B11 D13 A13 F13 H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 DMI U31B H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 Size Document Number Custom EFL50 LA-2761 Date: Wednesday, April 20, 2005 Rev 0.2 Sheet of 51 D D 11 DDR_A_DQS#[0 7] C 11 DDR_A_MA[0 13] 11 DDR_A_CAS# 11 DDR_A_RAS# 11 DDR_A_WE# B SA_BS0# SA_BS1# SA_BS2# DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7 AJ37 AP35 AL29 AP24 AP9 AP4 AJ2 AD3 SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 AK36 AP33 AN29 AP23 AM8 AM4 AJ1 AE5 SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 AK35 AP34 AN30 AN23 AN8 AM5 AH1 AE4 SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7# DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 AL17 AP17 AP18 AM17 AN18 AM18 AL19 AP20 AM19 AL20 AM16 AN20 AM20 AM15 SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 DDR_A_CAS# DDR_A_RAS# AN15 AP16 AF29 AF28 AP15 SA_CAS# SA_RAS# SA_RCVENIN# SA_RCVENOUT# SA_WE# DDR_A_WE# DDR MEMORY SYSTEM A 11 DDR_A_DQS[0 7] AK15 AK16 AL21 AG35 AH35 AL35 AL37 AH36 AJ35 AK37 AL34 AM36 AN35 AP32 AM31 AM34 AM35 AL32 AM32 AN31 AP31 AN28 AP28 AL30 AM30 AM28 AL28 AP27 AM27 AM23 AM22 AL23 AM24 AN22 AP22 AM9 AL9 AL6 AP7 AP11 AP10 AL7 AM7 AN5 AN6 AN3 AP3 AP6 AM6 AL4 AM3 AK2 AK3 AG2 AG1 AL3 AM2 AH3 AG3 AF3 AE3 AD6 AC4 AF2 AF1 AD4 AD5 SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8 SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43 SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63 DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 U31D DDR_A_D[0 63] 11 12 DDR_B_BS#0 12 DDR_B_BS#1 12 DDR_B_BS#2 12 DDR_B_DM[0 7] 12 DDR_B_DQS[0 7] 12 DDR_B_DQS#[0 7] 12 DDR_B_MA[0 13] 12 DDR_B_CAS# 12 DDR_B_RAS# 12 DDR_B_WE# DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2 AJ15 AG17 AG21 SB_BS0# SB_BS1# SB_BS2# DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7 AF32 AK34 AK27 AK24 AJ10 AK5 AE7 AB7 SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 AF34 AK32 AJ28 AK23 AM10 AH6 AF8 AB4 SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 AF35 AK33 AK28 AJ23 AL10 AH7 AF7 AB5 SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7# DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 AH17 AK17 AH18 AJ18 AK18 AJ19 AK19 AH19 AJ20 AH20 AJ16 AG18 AG20 AG15 SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 AH14 AK14 AF15 AF14 AH16 SB_CAS# SB_RAS# SB_RCVENIN# SB_RCVENOUT# SB_WE# DDR_B_CAS# DDR_B_RAS# DDR_B_WE# DDR SYSTEM MEMORY B U31C DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2 11 DDR_A_BS#0 11 DDR_A_BS#1 11 DDR_A_BS#2 11 DDR_A_DM[0 7] ALVISO_BGA1257 SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8 SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42 SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63 AE31 AE32 AG32 AG36 AE34 AE33 AF31 AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31 AJ31 AK30 AJ30 AH29 AH28 AK29 AH30 AH27 AG28 AF24 AG23 AJ22 AK22 AH24 AH23 AG22 AJ21 AG10 AG9 AG8 AH8 AH11 AH10 AJ9 AK9 AJ7 AK6 AJ4 AH5 AK8 AJ8 AJ5 AK4 AG5 AG4 AD8 AD9 AH4 AG6 AE8 AD7 AC5 AB8 AB6 AA8 AC8 AC7 AA4 AA5 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 DDR_B_D[0 63] 12 C B ALVISO_BGA1257 A A Compal Secret Data Security Classification 2005/03/08 Issued Date Deciphered Date 2006/03/08 Title Alviso DDR (2/5) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number Custom EFL50 LA-2761 Date: Wednesday, April 20, 2005 Rev 0.2 Sheet of 51 +2.5VS +3VS PCIE_MTX_C_GRX_N[0 15] 15,41 PCIE_MTX_C_GRX_N[0 15] R92 GM@ 2.2K_0402_5% G GMCH_ENBKL GM@ BSS138_SOT23 PCEI_GTX_C_MRX_P[0 15] 15,41 PCEI_GTX_C_MRX_P[0 15] Q10 D @ 0_0402_5% U31G R143 4.99K_0603_1% GMCH_CRT_CLK GMCH_CRT_DATA 14 GMCH_CRT_CLK 14 GMCH_CRT_DATA 14 GMCH_CRT_B GMCH_CRT_B R121 R107 R403 14 GMCH_CRT_G 14 GMCH_CRT_R 14 GMCH_CRT_VSYNC 14 GMCH_CRT_HSYNC PM@ 150_0402_5% PM@ 150_0402_5% PM@ 150_0402_5% +2.5VS R97 R98 R100 R99 4.7K_0402_5% GMCH_CRT_CLK 4.7K_0402_5% GMCH_CRT_DATA 2.2K_0402_5% LCTLB_DATA 1 2.2K_0402_5% 2 R108 TV_REFSET 0_0402_5% 15 GMCH_ENVDD GMCH_CRT_G GMCH_CRT_R GMCH_CRT_VSYNC GMCH_CRT_HSYNC REFSET R142 255_0402_1% LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA GMCH_ENVDD LIBG LCTLA_CLK 15 15 15 15 R134 100K_0402_5% LBKLT_EN R112 1.5K_0402_1% LIBG R109 PM@ 150_0402_5% GMCH_TV_COMPS R118 PM@ 150_0402_5% GMCH_TV_LUMA R101 PM@ 150_0402_5% GMCH_TV_CRMA GMCH_TXCLKGMCH_TXCLK+ GMCH_TZCLKGMCH_TZCLK+ 15 GMCH_TXOUT015 GMCH_TXOUT115 GMCH_TXOUT215 GMCH_TXOUT0+ 15 GMCH_TXOUT1+ 15 GMCH_TXOUT2+ 15 GMCH_TZOUT015 GMCH_TZOUT115 GMCH_TZOUT2- MISC SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP A15 C16 A17 J18 B15 B16 B17 TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC E24 E23 E21 D21 C20 B20 A19 B19 H21 G21 J20 DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET E25 F25 C23 C22 F23 F22 F26 C33 C31 F28 F27 LBKLT_CTL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL GMCH_TXCLKGMCH_TXCLK+ GMCH_TZCLKGMCH_TZCLK+ B30 B29 C25 C24 LACLKN LACLKP LBCLKN LBCLKP GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2- B34 B33 B32 LADATAN0 LADATAN1 LADATAN2 GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+ GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2- A34 A33 B31 C29 D28 C27 PCI - EXPRESS GRAPHICS GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA 21 GMCH_TV_COMPS 21 GMCH_TV_LUMA 21 GMCH_TV_CRMA C SDVO_SDAT SDVO_SCLK CLK_MCH_3GPLL# CLK_MCH_3GPLL H24 H25 AB29 AC29 TV 15,41 15,41 13 13 SDVO_SDAT SDVO_SCLK CLK_MCH_3GPLL# CLK_MCH_3GPLL VGA R88 LVDS D B PCEI_GTX_C_MRX_N[0 15] 15,41 PCEI_GTX_C_MRX_N[0 15] LBKLT_EN S D 15,33 GMCH_ENBKL PCIE_MTX_C_GRX_P[0 15] 15,41 PCIE_MTX_C_GRX_P[0 15] LADATAP0 LADATAP1 LADATAP2 LBDATAN0 LBDATAN1 LBDATAN2 +2.5VS 2 +3VS C28 D27 C26 LBDATAP0 LBDATAP1 LBDATAP2 R115 EXP_COMPI EXP_ICOMPO EXP_RXN0/SDVO_TVCLKIN# EXP_RXN1/SDVO_INT# EXP_RXN2/SDVO_FLDSTALL# EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8 EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15 E30 F34 G30 H34 J30 K34 L30 M34 N30 P34 R30 T34 U30 V34 W30 Y34 PCEI_GTX_C_MRX_N0 PCEI_GTX_C_MRX_N1 PCEI_GTX_C_MRX_N2 PCEI_GTX_C_MRX_N3 PCEI_GTX_C_MRX_N4 PCEI_GTX_C_MRX_N5 PCEI_GTX_C_MRX_N6 PCEI_GTX_C_MRX_N7 PCEI_GTX_C_MRX_N8 PCEI_GTX_C_MRX_N9 PCEI_GTX_C_MRX_N10 PCEI_GTX_C_MRX_N11 PCEI_GTX_C_MRX_N12 PCEI_GTX_C_MRX_N13 PCEI_GTX_C_MRX_N14 PCEI_GTX_C_MRX_N15 EXP_RXP0/SDVO_TVCLKIN EXP_RXP1/SDVO_INT EXP_RXP2/SDVO_FLDSTALL EXP_RXP3 EXP_RXP4 EXP_RXP5 EXP_RXP6 EXP_RXP7 EXP_RXP8 EXP_RXP9 EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15 D30 E34 F30 G34 H30 J34 K30 L34 M30 N34 P30 R34 T30 U34 V30 W34 PCEI_GTX_C_MRX_P0 PCEI_GTX_C_MRX_P1 PCEI_GTX_C_MRX_P2 PCEI_GTX_C_MRX_P3 PCEI_GTX_C_MRX_P4 PCEI_GTX_C_MRX_P5 PCEI_GTX_C_MRX_P6 PCEI_GTX_C_MRX_P7 PCEI_GTX_C_MRX_P8 PCEI_GTX_C_MRX_P9 PCEI_GTX_C_MRX_P10 PCEI_GTX_C_MRX_P11 PCEI_GTX_C_MRX_P12 PCEI_GTX_C_MRX_P13 PCEI_GTX_C_MRX_P14 PCEI_GTX_C_MRX_P15 EXP_TXN0/SDVOB_RED# EXP_TXN1/SDVOB_GREEN# EXP_TXN2/SDVOB_BLUE# EXP_TXN3/SDVOB_CLKN EXP_TXN4/SDVOC_RED# EXP_TXN5/SDVOC_GREEN# EXP_TXN6/SDVOC_BLUE# EXP_TXN7/SDVOC_CLKN EXP_TXN8 EXP_TXN9 EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15 E32 F36 G32 H36 J32 K36 L32 M36 N32 P36 R32 T36 U32 V36 W32 Y36 PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15 EXP_TXP0/SDVOB_RED EXP_TXP1/SDVOB_GREEN EXP_TXP2/SDVOB_BLUE EXP_TXP3/SDVOB_CLKP EXP_TXP4/SDVOC_RED EXP_TXP5/SDVOC_GREEN EXP_TXP6/SDVOC_BLUE EXP_TXP7/SDVOC_CLKP EXP_TXP8 EXP_TXP9 EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15 D32 E36 F32 G36 H32 J36 K32 L36 M32 N36 P32 R36 T32 U36 V32 W36 PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15 24.9_0402_1% +1.5VS C C422 C437 C445 C451 C460 C465 C469 C476 C418 C430 C444 C450 C458 C464 C468 C475 2 2 C416 0.1U_0402_16V4Z C428 0.1U_0402_16V4Z C440 0.1U_0402_16V4Z C449 0.1U_0402_16V4Z C457 0.1U_0402_16V4Z C462 0.1U_0402_16V4Z C467 0.1U_0402_16V4Z C474 0.1U_0402_16V4Z 2 2 2 2 C413 0.1U_0402_16V4Z C425 0.1U_0402_16V4Z C438 0.1U_0402_16V4Z C446 0.1U_0402_16V4Z C454 0.1U_0402_16V4Z C461 0.1U_0402_16V4Z C466 0.1U_0402_16V4Z C470 0.1U_0402_16V4Z 2 2 2 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_N9 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15 B 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_P5 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_P7 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15 S D GMCH_LCD_CLK ALVISO_BGA1257 1 G LDDC_CLK R87 GM@ 4.7K_0402_5% R104 GM@ 4.7K_0402_5% 15 GMCH_TZOUT0+ 15 GMCH_TZOUT1+ 15 GMCH_TZOUT2+ GMCH_TZOUT0+ GMCH_TZOUT1+ GMCH_TZOUT2+ PEG_COMP D36 D34 GMCH_LCD_CLK 15 Q9 GM@ 2N7002_SOT23 A A +2.5VS 2 +3VS R404 GM@ 4.7K_0402_5% Compal Secret Data Security Classification G R105 GM@ 4.7K_0402_5% 2005/03/08 S D GMCH_LCD_DATA GMCH_LCD_DATA 15 2006/03/08 Title Alviso PCI-E (3/5) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Q32 GM@ 2N7002_SOT23 Deciphered Date LDDC_DATA Issued Date Size B Date: Document Number Rev 0.2 EFL50 LA-2761 Wednesday, April 20, 2005 Sheet of 51 +1.05VS U31F U31E T29 R29 N29 M29 K29 J29 V28 U28 T28 R28 P28 N28 M28 L28 K28 J28 H28 G28 V27 U27 T27 R27 P27 N27 M27 L27 K27 J27 H27 K26 H26 K25 J25 K24 K23 K22 K21 W20 U20 T20 K20 V19 U19 K19 W18 V18 T18 K18 K17 +1.05VS D C +1.5VS +1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_HPLL +1.5VS_MPLL +1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_HPLL +1.5VS_MPLL AC1 AC2 B23 C35 AA1 AA2 VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 F17 E17 D18 C18 F18 E18 VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1 POWER VCCD_HMPLL1 VCCD_HMPLL2 VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL 120mA +3VS_TVDAC K13 J13 K12 W11 V11 U11 T11 R11 P11 N11 M11 L11 K11 W10 V10 U10 T10 R10 P10 N10 M10 K10 J10 Y9 W9 U9 R9 P9 N9 M9 L9 J9 N8 M8 N7 M7 N6 M6 A6 N5 M5 N4 M4 N3 M3 N2 M2 B2 V1 N1 M1 G1 +1.05VS + C55 TV@150U_D2_6.3VM H18 G18 VCCA_TVBG VSSA_TVBG VCCD_TVDAC VCCDQ_TVDAC D19 H17 24mA VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2 B26 B25 A25 60mA VCCA_LVDS A35 VCCHV0 VCCHV1 VCCHV2 B22 B21 A21 VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2 B28 A28 A27 VCCA_SM0 VCCA_SM1 VCCA_SM2 VCCA_SM3 AF20 AP19 AF19 AF18 VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6 AE37 W37 U37 R37 N37 L37 J37 VCCA_3GPLL0 VCCA_3GPLL1 VCCA_3GPLL2 Y29 Y28 Y27 VCCA_3GBG VSSA_3GBG F37 G37 VCC_SYNC H20 +1.5VS 10mA +2.5VS 2mA 60mA +1.5VS_DDRDLL +1.5VS_PEG 1500mA C432 0.47U_0603_16V4Z +1.5VS_3GPLL 0.15mA +2.5VS_3GBG F19 E19 G19 VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC +2.5VS VTT0 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT35 VTT36 VTT37 VTT38 VTT39 VTT40 VTT41 VTT42 VTT43 VTT44 VTT45 VTT46 VTT47 VTT48 VTT49 VTT50 VTT51 POWER C431 70mA 0.47U_0603_16V4Z C163 0.22U_0402_10V4Z ALVISO_BGA1257 Please Closed to U31-H20 B C131 0.22U_0402_10V4Z +2.5VS 1 C663+ 150U_D2_6.3VM TV@ C664 C665 +1.5VS_DDRDLL +1.5VS_DPLLA C59 C70 10U_1206_16V4Z +1.5VS_DDRDLL +1.5VS_DPLLB L15 60mA CHB1608U301_0603 +1.5VS_DPLLB +1.5VS 60mA C77 0.1U_0402_16V4Z @ 1000P_0402_50V7K C73 C87 10U_1206_16V4Z L16 CHB1608U301_0603 +1.5VS 1 C183 10U_1206_16V4Z C80 C478 C481 C477 C161 C167 VCCD_LVDS(Ball A25,B25,B26) R153 C186 VCCDQ_TVDAC (Ball H17) +1.05VS +1.5VS_PEG +1.5VS 0.1U_0402_16V4Z +1.5VS_3GPLL +1.5VS_MPLL L31 60mA CHB1608U301_0603 +1.5VS_MPLL +1.5VS +1.5VS_HPLL 2.2U_0603_6.3V6K 1 C146 10U_1206_16V4Z C153 C141 4.7U_0805_10V4Z 950mA 0_0805_5% C157 4.7U_0805_10V4Z +1.5VS + C168 C165 C166 470U_D2_2.5VM2 2.2U_0603_6.3V6K @ 1000P_0402_50V7K 1 C158 2.2U_0603_6.3V6K C159 2.2U_0603_6.3V6K C132 2.2U_0603_6.3V6K @ 1000P_0402_50V7K 0.1U_0402_16V4Z A 0.1U_0402_16V4Z 0.1U_0402_16V4Z AM37 AH37 1 1 1 C169 C160 C144 C143 AP29 AD28 +1.8V C154 C152 AD27 2 2 2 AC27 10U_1206_16V4Z AP26 2.2U_0603_6.3V6K 0.1U_0402_16V4Z AN26 D AM26 +1.8V AL26 2200mA AK26 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z AJ26 AH26 AG26 1 1 1 1 + C174 C188 C172 C177 AF26 AE26 C200 C175 C176 C178 C187 AP25 2 2 2 2 330U_D2E_2.5VM AN25 AM25 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z AL25 AK25 AJ25 AH25 AG25 +2.5VS AF25 VCCHV(Ball A21,B21,B22) AE25 AE24 AE23 AE22 1 1 1 C101 C100 C94 C107 C92 C102 AE21 AE20 AE19 0.1U_0402_16V4Z 0.01U_0402_16V7K 4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z AE18 AE17 AE16 AE15 AE14 VCCA_LVDS (Ball A35) VCCTX_LVDS(Ball A27,A28,B28) C AP13 AN13 +2.5VS AM13 VCCA_CRTDAC(Ball F19,E19) AL13 AK13 AJ13 AH13 1 1 C91 C133 C126 C103 AG13 AF13 AE13 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.022U_0402_16V7K AP12 AN12 AM12 AL12 AK12 VCC_SYNC(Ball H20) AJ12 AH12 AG12 VCCD_TVDAC (Ball D19) +1.5VS AF12 0.1U_0402_16V4Z 0.1U_0402_16V4Z AE12 AD11 AC11 AB11 1 1 1 C199 C93 C104 C120 C122 C140 C134 AB10 0.1U_0402_16V4Z C197 AB9 0.1U_0402_16V4Z AP8 V1.8_DDR_CAP6 2 2 2 4.7U_0805_10V4Z 2 AM1 V1.8_DDR_CAP4 AE1 V1.8_DDR_CAP3 B C182 0.1U_0402_16V4Z 0.022U_0402_16V7K 0.022U_0402_16V7K 0.1U_0402_16V4Z +1.5VS_PEG @ 1000P_0402_50V7K @ 1000P_0402_50V7K 60mA C181 R159 L24 0.5_0603_1% CHB1608U301_0603 +2.5VS_3GBG +3GPLL +1.5VS +2.5VS_3GBG +1.5VS_3GPLL +1.5VS_HPLL R160 0_0603_5% 4000mA C189 0.1U_0402_16V4Z C198 0.1U_0402_16V4Z ALVISO_BGA1257 0307 @ 1000P_0402_50V7K 0.1U_0402_16V4Z +1.5VS_DPLLA VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8 VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55 VCCSM56 VCCSM57 VCCSM58 VCCSM59 VCCSM60 VCCSM61 VCCSM62 VCCSM63 VCCSM64 C195 0.1U_0402_16V4Z V1.8_DDR_CAP1 V1.8_DDR_CAP2 V1.8_DDR_CAP5 L21 CHB1608U301_0603 +1.5VS C184 C171 1 C170 10U_1206_16V4Z 2 0.1U_0402_16V4Z 1 R123 +3VS_TVDAC L17 CHB1608U301_0603 +3VS +2.5VS 0_0603_5% C74 10U_1206_16V4Z @ 1000P_0402_50V7K 2 1000P_0402_50V7K C155 C139 C123 VCCA_TVBG (Ball H18) 1 C136 C130 C128 C129 0.1U_0402_16V4Z C65 VCCA_TVDAC 1000P_0402_50V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z A 0.022U_0402_16V7K @ 1000P_0402_50V7K 120mA 10U_1206_16V4Z 2 0.1U_0402_16V4Z @ 1000P_0402_50V7K 10U_1206_16V4Z 2 0.1U_0402_16V4Z Compal Secret Data Security Classification @ 1000P_0402_50V7K 2005/03/08 Issued Date Deciphered Date 2006/03/08 Title Alviso POWER (4/5) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number Custom EFL50 LA-2761 Date: Wednesday, April 20, 2005 Rev 0.2 Sheet of 51 U31H U31I D C B +1.05VS A L12 M12 N12 P12 R12 T12 U12 V12 W12 L13 M13 N13 P13 R13 T13 U13 V13 W13 VTT_NCTF17 VTT_NCTF16 VTT_NCTF15 VTT_NCTF14 VTT_NCTF13 VTT_NCTF12 VTT_NCTF11 VTT_NCTF10 VTT_NCTF9 VTT_NCTF8 VTT_NCTF7 VTT_NCTF6 VTT_NCTF5 VTT_NCTF4 VTT_NCTF3 VTT_NCTF2 VTT_NCTF1 VTT_NCTF0 Y12 AA12 Y13 AA13 L14 M14 N14 P14 R14 T14 U14 V14 W14 Y14 AA14 AB14 L15 M15 N15 P15 R15 T15 U15 V15 W15 Y15 AA15 AB15 L16 M16 N16 P16 R16 T16 U16 V16 W16 Y16 AA16 AB16 R17 Y17 AA17 AB17 AA18 AB18 AA19 AB19 AA20 AB20 R21 Y21 AA21 AB21 Y22 AA22 AB22 Y23 AA23 AB23 Y24 AA24 AB24 Y25 AA25 AB25 Y26 AA26 AB26 VSS_NCTF68 VSS_NCTF67 VSS_NCTF66 VSS_NCTF65 VSS_NCTF64 VSS_NCTF63 VSS_NCTF62 VSS_NCTF61 VSS_NCTF60 VSS_NCTF59 VSS_NCTF58 VSS_NCTF57 VSS_NCTF56 VSS_NCTF55 VSS_NCTF54 VSS_NCTF53 VSS_NCTF52 VSS_NCTF51 VSS_NCTF50 VSS_NCTF49 VSS_NCTF48 VSS_NCTF47 VSS_NCTF46 VSS_NCTF45 VSS_NCTF44 VSS_NCTF43 VSS_NCTF42 VSS_NCTF41 VSS_NCTF40 VSS_NCTF39 VSS_NCTF38 VSS_NCTF37 VSS_NCTF36 VSS_NCTF35 VSS_NCTF34 VSS_NCTF33 VSS_NCTF32 VSS_NCTF31 VSS_NCTF30 VSS_NCTF29 VSS_NCTF28 VSS_NCTF27 VSS_NCTF26 VSS_NCTF25 VSS_NCTF24 VSS_NCTF23 VSS_NCTF22 VSS_NCTF21 VSS_NCTF20 VSS_NCTF19 VSS_NCTF18 VSS_NCTF17 VSS_NCTF16 VSS_NCTF15 VSS_NCTF14 VSS_NCTF13 VSS_NCTF12 VSS_NCTF11 VSS_NCTF10 VSS_NCTF9 VSS_NCTF8 VSS_NCTF7 VSS_NCTF6 VSS_NCTF5 VSS_NCTF4 VSS_NCTF3 VSS_NCTF2 VSS_NCTF1 VSS_NCTF0 V25 W25 L26 M26 N26 P26 R26 T26 U26 V26 W26 VCC_NCTF10 VCC_NCTF9 VCC_NCTF8 VCC_NCTF7 VCC_NCTF6 VCC_NCTF5 VCC_NCTF4 VCC_NCTF3 VCC_NCTF2 VCC_NCTF1 VCC_NCTF0 VCCSM_NCTF31 VCCSM_NCTF30 VCCSM_NCTF29 VCCSM_NCTF28 VCCSM_NCTF27 VCCSM_NCTF26 VCCSM_NCTF25 VCCSM_NCTF24 VCCSM_NCTF23 VCCSM_NCTF22 VCCSM_NCTF21 VCCSM_NCTF20 VCCSM_NCTF19 VCCSM_NCTF18 VCCSM_NCTF17 VCCSM_NCTF16 VCCSM_NCTF15 VCCSM_NCTF14 VCCSM_NCTF13 VCCSM_NCTF12 VCCSM_NCTF11 VCCSM_NCTF10 VCCSM_NCTF9 VCCSM_NCTF8 VCCSM_NCTF7 VCCSM_NCTF6 VCCSM_NCTF5 VCCSM_NCTF4 VCCSM_NCTF3 VCCSM_NCTF2 VCCSM_NCTF1 VCCSM_NCTF0 NCTF +1.05VS VCC_NCTF78 VCC_NCTF77 VCC_NCTF76 VCC_NCTF75 VCC_NCTF74 VCC_NCTF73 VCC_NCTF72 VCC_NCTF71 VCC_NCTF70 VCC_NCTF69 VCC_NCTF68 VCC_NCTF67 VCC_NCTF66 VCC_NCTF65 VCC_NCTF64 VCC_NCTF63 VCC_NCTF62 VCC_NCTF61 VCC_NCTF60 VCC_NCTF59 VCC_NCTF58 VCC_NCTF57 VCC_NCTF56 VCC_NCTF55 VCC_NCTF54 VCC_NCTF53 VCC_NCTF52 VCC_NCTF51 VCC_NCTF50 VCC_NCTF49 VCC_NCTF48 VCC_NCTF47 VCC_NCTF46 VCC_NCTF45 VCC_NCTF44 VCC_NCTF43 VCC_NCTF42 VCC_NCTF41 VCC_NCTF40 VCC_NCTF39 VCC_NCTF38 VCC_NCTF37 VCC_NCTF36 VCC_NCTF35 VCC_NCTF34 VCC_NCTF33 VCC_NCTF32 VCC_NCTF31 VCC_NCTF30 VCC_NCTF29 VCC_NCTF28 VCC_NCTF27 VCC_NCTF26 VCC_NCTF25 VCC_NCTF24 VCC_NCTF23 VCC_NCTF22 VCC_NCTF21 VCC_NCTF20 VCC_NCTF19 VCC_NCTF18 VCC_NCTF17 VCC_NCTF16 VCC_NCTF15 VCC_NCTF14 VCC_NCTF13 VCC_NCTF12 VCC_NCTF11 AB12 AC12 AD12 AB13 AC13 AD13 AC14 AD14 AC15 AD15 AC16 AD16 AC17 AD17 AC18 AD18 AC19 AD19 AC20 AD20 AC21 AD21 AC22 AD22 AC23 AD23 AC24 AD24 AC25 AD25 AC26 AD26 +1.8V L17 M17 N17 P17 T17 U17 V17 W17 L18 M18 N18 P18 R18 Y18 L19 M19 N19 P19 R19 Y19 L20 M20 N20 P20 R20 Y20 L21 M21 N21 P21 T21 U21 V21 W21 L22 M22 N22 P22 R22 T22 U22 V22 W22 L23 M23 N23 P23 R23 T23 U23 V23 W23 L24 M24 N24 P24 R24 T24 U24 V24 W24 L25 M25 N25 P25 R25 T25 U25 +1.05VS U31J VSS271 VSS270 VSS269 VSS268 VSS260 VSS259 VSS258 VSS257 VSS256 VSS255 VSS254 VSS253 VSS252 VSS251 VSS250 VSS249 VSS248 VSS247 VSS246 VSS245 VSS244 VSS243 VSS242 VSS241 VSS240 VSS239 VSS238 VSS237 VSS236 VSS235 VSS234 VSS233 VSS232 VSS231 VSS230 VSS229 VSS228 VSS227 VSS226 VSS225 VSS224 VSS223 VSS222 VSS221 VSS220 VSS219 VSS218 VSS217 VSS216 VSS215 VSS214 VSS213 VSS212 VSS211 VSS210 VSS209 VSS208 VSS207 VSS206 VSS205 VSS204 VSS203 VSS202 VSS201 VSS200 VSS199 VSS198 VSS197 VSS196 VSSALVDS VSS195 VSS194 VSS193 VSS192 VSS191 VSS190 VSS189 VSS188 VSS187 VSS186 VSS185 VSS184 VSS183 VSS182 VSS181 VSS180 VSS179 VSS178 VSS177 VSS176 VSS175 VSS174 VSS173 VSS172 VSS171 VSS170 VSS169 VSS168 VSS167 VSS166 VSS165 VSS164 VSS163 VSS162 VSS161 VSS160 VSS159 VSS158 VSS157 VSS156 VSS155 VSS154 VSS153 VSS152 VSS151 VSS150 VSS149 VSS148 VSS147 VSS146 VSS145 VSS144 VSS143 VSS142 VSS141 VSS140 VSS139 VSS138 VSS137 VSS136 VSS135 VSS134 VSS133 VSS132 VSS131 VSS130 VSS AL24 AN24 A26 E26 G26 J26 B27 E27 G27 W27 AA27 AB27 AF27 AG27 AJ27 AL27 AN27 E28 W28 AA28 AB28 AC28 A29 D29 E29 F29 G29 H29 L29 P29 U29 V29 W29 AA29 AD29 AG29 AJ29 AM29 C30 Y30 AA30 AB30 AC30 AE30 AP30 D31 E31 F31 G31 H31 J31 K31 L31 M31 N31 P31 R31 T31 U31 V31 W31 AD31 AG31 AL31 A32 C32 Y32 AA32 AB32 B36 AA11 AF11 AG11 AJ11 AL11 AN11 B12 D12 J12 A14 B14 F14 J14 K14 AG14 AJ14 AL14 AN14 C15 K15 A16 D16 H16 K16 AL16 C17 G17 AF17 AJ17 AN17 A18 B18 U18 AL18 C19 H19 J19 T19 W19 AG19 AN19 A20 D20 E20 F20 G20 V20 AK20 C21 F21 AF21 AN21 A22 D22 E22 J22 AH22 AL22 H23 AF23 B24 D24 F24 J24 AG24 AJ24 ALVISO_BGA1257 VSS267 VSS266 VSS265 VSS264 VSS263 VSS262 VSS261 VSS129 VSS128 VSS127 VSS126 VSS125 VSS124 VSS123 VSS122 VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99 VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS84 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68 AC32 AD32 AJ32 AN32 D33 E33 F33 G33 H33 J33 K33 L33 M33 N33 P33 R33 T33 U33 V33 W33 AD33 AF33 AL33 C34 AA34 AB34 AC34 AD34 AH34 AN34 B35 D35 E35 F35 G35 H35 J35 K35 L35 M35 N35 P35 R35 T35 U35 V35 W35 Y35 AE35 C36 AA36 AB36 AC36 AD36 AE36 AF36 AJ36 AL36 AN36 E37 H37 K37 M37 P37 T37 V37 Y37 AG37 VSS67 VSS66 VSS65 VSS64 VSS63 VSS62 VSS61 VSS60 VSS59 VSS58 VSS57 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27 VSS26 VSS25 VSS24 VSS23 VSS22 VSS21 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 VSS14 VSS13 VSS12 VSS11 VSS10 VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1 VSS0 VSS D C B ALVISO_BGA1257 +1.05VS +1.5VS C? 0.1U_0603_16V7K C? 0.1U_0603_16V7K C? 0.1U_0603_16V7K C689 0.1U_0402_16V4Z 1 C690 0.1U_0402_16V4Z C691 0.1U_0402_16V4Z C692 0.1U_0402_16V4Z 1 C693 0.1U_0402_16V4Z C694 0.1U_0402_16V4Z A Compal Secret Data Security Classification 2005/03/08 Issued Date ALVISO_BGA1257 Y1 D2 G2 J2 L2 P2 T2 V2 AD2 AE2 AH2 AL2 AN2 A3 C3 AA3 AB3 AC3 AJ3 C4 H4 L4 P4 U4 Y4 AF4 AN4 E5 W5 AL5 AP5 B6 J6 L6 P6 T6 AA6 AC6 AE6 AJ6 G7 V7 AA7 AG7 AK7 AN7 C8 E8 L8 P8 Y8 AL8 A9 H9 K9 T9 V9 AA9 AC9 AE9 AH9 AN9 D10 L10 Y10 AA10 F11 H11 Y11 Deciphered Date 2006/03/08 Title Alviso POWER (5/5) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size B Date: Document Number Rev 0.2 EFL50 LA-2761 Wednesday, April 20, 2005 Sheet 10 of 51 +5VALW U26 C390 4.7U_0805_10V4Z D 1 FLG VOUT GND VIN CE USB_OC#0 18 +USB_AS +USB_AS 470P_0402_50V7K 1 + C388 C387 470P_0402_50V7K 1 + C202 SYSON 33,40,48 SYSON D +USB_BS RT9702ACB_SOT23-5 Cost-Down from G528 to RT9702 C204 150U_D2_6.3VM 150U_D2_6.3VM 2 +3VALW +5VALW +USB_BS U16 C211 4.7U_0805_10V4Z GND IN IN EN# OUT OUT OUT FLG 18 USB20_N2 18 USB20_P2 R179 10K_0402_5% R174 10K_0402_5% G528_SO8 SYSON# 40 SYSON# 2 0307 JP13 JP24 R178 10K_0402_5% C206 0.1U_0402_16V4Z C 18 USB20_N0 18 USB20_P0 SUYIN_020173MR004S312ZL USB_OC#4 18 (Left) USB_OC#2 18 1 2 VCC DD+ GND GND1 GND2 GND3 GND4 SUYIN_020173MR004G533ZR C209 0.1U_0402_16V4Z (Rear) C U1 USB20_N0 U32 +5VALW USB20_N2 U46 C654 4.7U_0805_10V4Z FLG VOUT GND VIN CE USB_OC#6 18 USB20_P4 +USB_CS AS SDA GND ALERT VDD SCL USB20_P2 AS SDA GND ALERT VDD SCL +USB_BS USB20_N4 USB20_P0 +USB_AS @ IP4220CZ6_SOT23-6 @ IP4220CZ6_SOT23-6 RT9702ACB_SOT23-5 +USB_CS SYSON 33,40,48 SYSON 470P_0402_50V7K C655 + @ Cost-Down from G528 to RT9702 C652 150U_D2_6.3VM @ B +IR_ANODE R606 4.7_1206_5% C240 150U_D2_6.3VM C624 C604 10U_1206_16V4Z 32 IRRX C600 0.1U_0402_16V4Z ACES_85205-0400 @ @ 150U_D2_6.3VM JP25 18 USB20_N4 18 USB20_P4 IR1 IRRX IR_3VS 18 USB20_N6 18 USB20_P6 (1 SPINDLE) R594 47_1206_5% 2 2 10U_1206_16V4Z 1 B JP11 470P_0402_50V7K 1 + C225 + C610 +3VS R605 4.7_1206_5% 2 +USB_BS FIR Module +3VS IRED_C RXD VCC GND IRED_A TXD SD/MODE MODE SUYIN_020173MR004S312ZL IRTXOUT IRTXOUT 32 IRMODE IRMODE 32 R586 @ 0_0402_5% U47 USB20_N6 (Left) TFDU6102-TR3_8P SDA GND ALERT VDD SCL AS USB20_P6 +USB_CS @ IP4220CZ6_SOT23-6 SD/MODE: SHUTDOWN MODE, HIGH ACTIVE MODE: HIGH/LOW SPEED SELECT A A Compal Electronics, Inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC USB Conn Size Document Number Date: Wednesday, April 20, 2005 Rev 0.2 EFL50 LA-2761 Sheet 37 of 51 A B C D E U2 1@ RB751V_SOD323 D12 D_LAN_MDI2+ D_LAN_MDI2- 26 D_LAN_MDI2+ 26 D_LAN_MDI2- D_LAN_MDI3+ D_LAN_MDI3- 26 D_LAN_MDI3+ 26 D_LAN_MDI3- 32 32 32 32 32 32 32 32 KB_DATA KB_CLK PS_DATA PS_CLK R8 R7 R6 R5 1 1 D_HP_S D_SPDIFO R I# DTR# CTS# TXD RTS# RXD DSR# DC D# RI# DTR# CTS# TXD RTS# RXD DSR# DCD# W D@ W D@ W D@ W D@ 33 EZ_SUSON 33 EZ_MAINON 33 EZ_PERST# 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% EZ_PCIE_TXP1 EZ_PCIE_TXN1 D_DVI_TXD2D_DVI_TXD2+ 18 EZ_PCIE_TXP1 18 EZ_PCIE_TXN1 41 D_DVI_TXD241 D_DVI_TXD2+ LAN0GND LAN1+ LAN1GND GND LAN_LINK# PP_STB# PP_AFD# PP_D0 PP_ERR# PP_D1 PP_INIT# PP_D2 PP_SLIN# PP_D3 PP_D4 PP_D5 PP_D6 PP_D7 PP_ACK# PP_BUSY PP_PE PP_SLCT PE_WAKE# GND GND PCIECLK1+ PCIECLK1LAN_ACT# RESERVE GND LAN2+ LAN2GND LAN3+ LAN3GND HP_S SPDIF COM_RI# COM_DTR# COM_CTS# COM_SOUT COM_RTS# COM_SIN COM_DSR# COM_DCD# GND PS2_KBDT PS2_KBCK PS2_MSDT PS2_MSCK SUSON MAINON PE_RST# GND PCIETX1+ PCIETX1DVI2DVI2+ GND DVI_DET DVI_DAT GND DVI_CLK EZIN_EM# MIC_S AUD_INR AUD_INL AGND AUD_MIC AUD_OR AUD_OL AGND GND VGA_HS VGA_VS VGA_DAT VGA_CLK SERIRQ PE_CLK EZIN_ME# PE_REQ2# PE_DAT PE_REQ1# GND PCIERX1+ PCIERX1DVI1DVI1+ GND DVI0DVI0+ GND DVICLK+ DVICLKGND GND TV_COMP TV_Y TV_C GND GND VGA_R VGA_G VGA_B GND GND PCIERX2+ PCIERX2GND GND PCIETX2+ PCIETX2GND GND PCIECLK2+ PCIECLK2VCC VCC GND GND DE_DVI_SDATA D_DVI_DET DE_DVI_SDATA 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 R365 PM@ 6.8K_0402_5% +3VS G R355 4.7K_0402_5% D_DVI_DET DVI_SDATA 2N7002_SOT23 DE_DVI_SCLK MZIN_EM# D_MIC_S D_AUD_INR D_AUD_INL D_AGND D_AUD_MIC2 D_AUD_OR D_AUD_OL D_AGND Q27 G LAN0+ 63 R363 0_0402_5% GM@ R366 GM@ 6.8K_0402_5% +5VS DVI_SDATA 15,41 DE_DVI_SCLK Q26 S 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 CLK_EZ_CLK1 CLK_EZ_CLK1# D_LAN_ACTIVITY# 13 CLK_EZ_CLK1 13 CLK_EZ_CLK1# 26 D_LAN_ACTIVITY# 1@ RB751V_SOD323 D_LAN_MDI0- D_LAN_LINK# R_LPTSTB# AFD#/3M# F D0 LPTERR# F D1 LPTINIT# F D2 LPTSLCTIN# F D3 F D4 F D5 F D6 F D7 LPTACK# LPTBUSY LPTPE LPTSLCT 26 D_LAN_LINK# 32 R_LPTSTB# 32 AFD#/3M# 32 FD0 32 LPTERR# 32 FD1 32 LPTINIT# 32 FD2 32 LPTSLCTIN# 32 FD3 32 FD4 32 FD5 32 FD6 32 FD7 32 LPTACK# 32 LPTBUSY 32 LPTPE 32 LPTSLCT D13 D_LAN_MDI1+ D_LAN_MDI1- 26 D_LAN_MDI1+ 26 D_LAN_MDI1- D_LAN_MDI0+ R356 4.7K_0402_5% D 26 D_LAN_MDI0- 33 KB_DATA 33 KB_CLK 33 PS_DATA 33 PS_CLK P TC7SH08FU_SSOP5 26 D_LAN_MDI0+ 16 D_USB_SMI#2 +5VS R11 0_0402_5% PM@ RB411D_SOT23 Docking Conn JP12 16 D_USB_SMI#1 +3VS DOCKIN# 14,21,26,33 2 S 1@ D A D_DVI_DET 1@ 100K_0402_5% DOCKIN# Y R1 1@ 10K_0402_5% D_DVI_DET MZIN_EM# B D14 R2 1@ 0.1U_0402_16V4Z 1 G 1@ 10K_0402_5% R3 C1 +3VALW +5VS +3VALW DVI_SCLK 2N7002_SOT23 DVI_SCLK 15,41 +3VS R360 PM@ 6.8K_0402_5% +5VS R364 GM@ 6.8K_0402_5% D_CRT_HSYNC D_CRT_VSYNC D_DDC_DATA D_DDC_CLK D_CRT_HSYNC 14 D_CRT_VSYNC 14 D_DDC_DATA 14 D_DDC_CLK 14 +5VS EZ_SMB_CLK MZIN_ME# R4 30mil 1@ 1K_0402_5% EZ_PE_REQ2# 18,33 EZ_SMB_DAT EZ_PE_REQ1# 33 EZ_PCIE_RXP1 EZ_PCIE_RXN1 D_DVI_TXD1D_DVI_TXD1+ EZ_PCIE_RXP1 18 EZ_PCIE_RXN1 18 D_DVI_TXD1- 41 D_DVI_TXD1+ 41 D_DVI_TXD0D_DVI_TXD0+ D_DVI_TXD0- 41 D_DVI_TXD0+ 41 D:DVI_TXC+ D_DVI_TXC- D_DVI_TXC+ 41 D_DVI_TXC- 41 D_TV_COMPS D_TV_LUMA D_TV_CRMA JP2 D_SPDIFO D_HP_S D_MIC_S D_AUD_INR D_AUD_INL D_AGND D_AUD_MIC2 D_AGND D_AUD_OR D_AUD_OL D_TV_COMPS 21 D_TV_LUMA 21 D_TV_CRMA 21 D_CRT_R D_CRT_G D_CRT_B D_CRT_R 14 D_CRT_G 14 D_CRT_B 14 EZ_PCIE_RXP2 EZ_PCIE_RXN2 EZ_PCIE_RXP2 18 EZ_PCIE_RXN2 18 EZ_PCIE_TXP2 EZ_PCIE_TXN2 10 10 ACES_87213-1000 EZ_PCIE_TXP2 18 EZ_PCIE_TXN2 18 CLK_EZ_CLK2 CLK_EZ_CLK2# CLK_EZ_CLK2 13 CLK_EZ_CLK2# 13 DKN_B+ PJP1 1@ JUMP_43X118 1 2 VIN VIN FOX_QL10303-C4444R-4F_124P +3VS 0.1U_0402_25V4K EZ_SMBUS_ON# 33 D 0307 EZ_SMB_CLK 15,41 DVI_DET C393 C395 C394 1 @ 4.7K_0402_5% R357 DVI_DET D_DVI_DET 100_0402_5% R359 +3VS D15 @ SKS10-04AT_TSMA EZ_SMB_DAT 100K_0603_5% 2 G 0.1U_0402_25V4K 0307 S D Q1 @ 2N7002_SOT23 R9 2 +3VS @ 4.7K_0402_5% 1 S R362 1@ 0_0603_5% Compal Electronics, Inc R10 1@ 0_0603_5% Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A 0.1U_0402_25V4K 2 G R361 Q28 @ 2N7002_SOT23 D 11,12,13 D_CK_SCLK 0.1U_0402_25V4K R469 10K_0402_5% 11,12,13 D_CK_SDATA C391 Q30 @ 2N7002_SOT23 1 C392 +5VS 0.1U_0402_25V4K S G R369 @ 100K_0402_5% B C D Docking Size Document Number Rev 0.2 EFL50 LA-2761 Date: Wednesday, April 20, 2005 Sheet E 38 of 51 B TOP Side D Power Button Bottom Side ON/OFFBTN# SW4 EVQPLHA15_4P KSI2 33,34 ON/OFF 33 33 KSO16 100K_0402_5% D16 51ON# 51ON# 42 DAN202U_SC70 4 KSI3 33,34 e/eManager_BTN +3VALW 2 R368 4.7K_0402_5% SW5 EVQPLHA15_4P 33 KSO16 Q29 KSI0 33,34 33 KSO16 SW6 EVQPLHA15_4P KSI1 33,34 Q2 DTC124EK_SC59 D Launch Manager_BTN 2 R367 33K_0402_5% 33 EC_ON D17 RLZ20A_LL34 EC_ON C389 1000P_0402_50V7K SW3 EVQPLHA15_4P 33 KSO16 R358 JOPEN Internet_BTN SW2 EVQPLHA15_4P J2 E E-Mail_BTN +3VALW JOPEN J1 C A G 2N7002_SOT23 S BlueTooth_BTN Wireless_BTN SW7 SW8 EN_BT# 33,34 PTS-042_2P EN_WL# 33,34 PTS-042_2P Power ON Circuit +3VS +3V +3V LED Indicator O +3V POWER I 11 O 10 +3V POWER SYS_PWROK 18 G I G U34E SN74LVC14APWLE_TSSOP14 P 14 U34D SN74LVC14APWLE_TSSOP14 P 14 R539 180K_0402_5% R535 C562 1U_0805_25V4Z 33,34 PWR_SUSP_LED# LED7 33 E_MAIL_LED# LED1 33 CAPSLED# LED2 33 NUMLED# LED3 PWR_SUSP_LED#D HT-170UD_0805 R612 E_MAIL_LED#D HT-170UYG-DT GRN_0805 R12 CAPSLED#D HT-170UYG-DT GRN_0805 R45 NUMLED#D HT-170UYG-DT GRN_0805 R58 PWR_LED#D HT-170UYG-DT GRN_0805 R613 BATT_FULL_LED#D HT-170UYG-DT GRN_0805 R610 BATT_CHGI_LED#D HT-170UD_0805 R611 MEDIA_LED#D HT-170UYG-DT GRN_0805 R85 360_0402_5% +5VALW 100K_0402_5% RTC Battery - + BATT1 +RTCBATT 33,34 PWR_LED# LED5 33,34 BATT_FULL_LED# LED6 33,34 BATT_CHGI_LED# LED8 360_0402_5% +5VS 360_0402_5% +5VS 360_0402_5% +5VS 360_0402_5% +5VALW 360_0402_5% +5VALW 360_0402_5% +5VALW 360_0402_5% +5VS 360_0402_5% +5VALW 360_0402_5% +5VALW +RTCBATT RTCBATT 33 MEDIA_LED# D9 LED4 BAS40-04_SOT23 33,34 WL_ON_LED# LED10 WL_ON_LED#D 12-21UYOC/S530-A2/TR8_YEL R353 CHGRTC +RTCVCC C243 0.1U_0402_16V4Z 33,34 BT_ON_LED# LED9 BT_ON_LED#D R354 12-21UYOC/S530-A2/TR8_YEL Compal Electronics, Inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Power OK/Reset/RTC battery Size Document Number Rev 0.2 EFL50 LA-2761 Date: Wednesday, April 20, 2005 Sheet E 39 of 51 B C +3VALW TO +3V D +3V +5VALW TO +5VS +1.8VS +3V +5VS R339 470_0402_5% 1U_0805_25V4Z U43 SYSON_ALW SI4800DY_SO8 2 C639 R341 @ 1M_0402_1% C633 VSB 4.7U_0805_10V4Z C646 D D SYSON# G Q23 2N7002_SOT23 1U_0805_25V4Z C653 4.7U_0805_10V4Z S 10U_1206_16V4Z D 0.1U_0402_16V4Z S R340 100K_0402_5% 2 C647 SUSP G Q14 2N7002_SOT23 S 5VS_GATE SYSON# G Q24 2N7002_SOT23 +5VS +3VS D +3VS 2 S S S G 10U_1206_16V4Z 1U_0805_25V4Z R161 100K_0402_5% 5VS_GATE +1.5VALW U17 D D D D VSB SI4800DY_SO8 1 R155 @ 1M_0402_1% D SUSP 0.1U_0402_16V4Z S G Q12 2N7002_SOT23 2 SI4800DY_SO8 +5VALW C230 C229 +1.5VS 4.7U_0805_10V4Z R343 10K_0402_5% 1U_0805_25V4Z C228 4.7U_0805_10V4Z R200 470_0402_5% SUSP 49 SUSP 10U_1206_16V4Z C180 2 C196 +1.5VS S S S G D D D D +1.5VALW TO +1.5VS C190 U11 C194 SUSP G Q41 2N7002_SOT23 S 1 +3VALW S D SUSP G Q13 2N7002_SOT23 +3VALW TO +3VS 1 R609 470_0402_5% R156 470_0402_5% 1 S S S G SI4800DY_SO8 D D D D R169 470_0402_5% 1 S S S G D D D D 10U_1206_16V4Z C609 +3VALW C611 U45 +5VALW E A 5VS_GATE D SUSP G Q17 2N7002_SOT23 15,33,35 SUSP# DTC115EKA_SOT23 Q25 100K 100K 3 S 3 +5VALW +1.8V R631 470_0402_5% SYSON# 37 SYSON# 1 +1.8V R344 10K_0402_5% U12 +1.8VS C192 D +1.8V TO +1.8VS (DDR2) C191 S SI4800DY_SO8 2 4.7U_0805_10V4Z 2 SYSON# G Q46 2N7002_SOT23 DTC115EKA_SOT23 Q22 1U_0805_25V4Z C193 4.7U_0805_10V4Z SYSON 33,37,48 SYSON 100K 100K S S S G D D D D 0304 4 5VS_GATE Compal Electronics, Inc Title PROPRIETARY NOTE A B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: C D POWER CONTROL CKT Document Number Rev 0.2 EFL50 LA-2761 Wednesday, April 20, 2005 Sheet E 40 of 51 H1 H_S354D118 H20 H_S354D118 H19 H_S354D118 H18 H_S354D118 H16 H_C315D165 H17 H_C315D165 H12 H_R354X348D118 Chip_Name CF3 SMD40M80 H21 H_S354D118 H7 H_S354D118 H14 H_S354D118 H2 H_C276D173 H5 H_C276D173 H15 H_C315D315N Label_Name EXP_TXP0/SDVOB_RED PCIE_MTX_C_GRX_P0 EXP_TXN0/SDVOB_RED# PCIE_MTX_C_GRX_N0 EXP_TXP1/SDVOB_GREEN PCIE_MTX_C_GRX_P1 EXP_TXN1/SDVOB_GREEN# PCIE_MTX_C_GRX_N1 EXP_TXP2/SDVOB_BLUE PCIE_MTX_C_GRX_P2 EXP_TXN2/SDVOB_BLUE# PCIE_MTX_C_GRX_N2 EXP_TXP3/SDVOB_CLKP PCIE_MTX_C_GRX_P3 EXP_TXN3/SDVOB_CLKN PCIE_MTX_C_GRX_N3 EXP_RXP1/SDVO_INT PCEI_GTX_C_MRX_P1 EXP_RXN1/SDVO_INT# PCEI_GTX_C_MRX_N1 0307 1 1 1 CF10 SMD40M80 CF9 SMD40M80 CF7 SMD40M80 CF13 SMD40M80 H23 H_S354D118 1 CF2 SMD40M80 CF15 SMD40M80 1 CF16 SMD40M80 1 CF4 SMD40M80 CF5 SMD40M80 CF6 SMD40M80 CF14 SMD40M80 CF8 SMD40M80 CF1 SMD40M80 H4 H_O335X236D256X157 D D H6 H13 H10 H11 H3 H_C394BC217D177 H_C394BC217D177 H_C394BC217D177 H_C394BC217D177 H_S433D118 H9 H_R551X350D165 H8 H_S354D165 H22 H_S429D157 FD5 FIDUCAL 1 1 1 1 FD2 FIDUCAL FD4 FIDUCAL 1 FD1 FIDUCAL FD6 FIDUCAL FD3 FIDUCAL 1 1 1 CF22 PAD_C197 CF21 PAD_C197 CF18 PAD_C197 CF17 PAD_C197 CF11 CF12 PAD_181X138 PAD_181X138 OUT +3VS +2.5VS D_DVI_TXD0- 38 D_DVI_TXD0+ 38 D_DVI_TXD1D_DVI_TXD1+ +2.5VS -IN D_DVI_TXC- 38 D_DVI_TXC+ 38 D_DVI_TXD0D_DVI_TXD0+ D_DVI_TXD1- 38 D_DVI_TXD1+ 38 D_DVI_TXD2D_DVI_TXD2+ LM358A_SO8 D_DVI_TXD2- 38 D_DVI_TXD2+ 38 12 28 15 21 36 42 48 C PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3 R412 0_0402_5% PLT_RST# R410 0_0402_5% @ CH_VSWING PLTRST_VGA# AS CH_RST# R418 R415 B 43 44 SDVOB_B+ SDVOB_B- 46 47 SDVOB_CLK+ SDVOB_CLK- 25 AS RESET# VSWING 27 26 ATPG SCEN R416 10K_0402_5% 1.2K_0402_5% SDVOB_G+ SDVOB_G- HPDET 29 DVI_DET SC_DDC SD_DDC 11 10 DVI_SCLK DVI_SDATA SC_PROM SD_PROM SPD SPC 2 DVI_TXC- 15 DVI_TXC+ 15 DVI_TXD0DVI_TXD0+ DVI_TXD0- 15 DVI_TXD0+ 15 DVI_TXD1DVI_TXD1+ DVI_TXD1- 15 DVI_TXD1+ 15 DVI_TXD2DVI_TXD2+ DVI_TXD2- 15 DVI_TXD2+ 15 DVI_DET 15,38 DVI_SCLK 15,38 DVI_SDATA 15,38 +2.5VS +2.5VS SDVOB_R+ SDVOB_R- 40 41 D_DVI_TXCD_DVI_TXC+ D_DVI_TXD0D_DVI_TXD0+ D_DVI_TXD1D_DVI_TXD1+ D_DVI_TXD2D_DVI_TXD2+ SDVO_SDAT SDVO_SCLK R116 R113 5.6K_0402_5% 5.6K_0402_5% R413 10K_0402_5% PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 37 38 13 14 16 17 19 20 22 23 C DVI_TXCDVI_TXC+ NC NC TLC# TLC TDC0# TDC0 TDC1# TDC1 TDC2# TDC2 34 35 15,18 PLTRST_VGA# 6,16,18,20,32,33 PLT_RST# PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1 SDVOB_INT+ SDVOB_INT- DGND DGND AGND AGND AGND TGND TGND AGND_PLL 8,15 PCIE_MTX_C_GRX_P3 8,15 PCIE_MTX_C_GRX_N3 32 33 30 31 39 45 18 24 8,15 PCIE_MTX_C_GRX_P2 8,15 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N0 SDVOB_INT+ SDVOB_INTC433 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P0-R RP1 PCIE_MTX_C_GRX_N0-R 0_0404_4P2R_5% PCIE_MTX_C_GRX_P1-R RP2 PCIE_MTX_C_GRX_N1-R 0_0404_4P2R_5% PCIE_MTX_C_GRX_P2-R RP3 PCIE_MTX_C_GRX_N2-R 0_0404_4P2R_5% PCIE_MTX_C_GRX_P3-R RP4 PCIE_MTX_C_GRX_N3-R 0_0404_4P2R_5% 8,15 PCIE_MTX_C_GRX_P1 8,15 PCIE_MTX_C_GRX_N1 0.1U_0402_16V4Z C427 8,15 PCIE_MTX_C_GRX_P0 8,15 PCIE_MTX_C_GRX_N0 PCEI_GTX_C_MRX_P1 PCEI_GTX_C_MRX_N1 RP8 0_0404_4P2R_5% RP7 0_0404_4P2R_5% RP6 0_0404_4P2R_5% RP5 0_0404_4P2R_5% CH7307C_LQFP48 GM@ 10K_0402_5% AS W=20 mils SDVO_SDAT SDVO_SCLK SDVO_SDAT 8,15 SDVO_SCLK 8,15 B R414 8,15 PCEI_GTX_C_MRX_P1 8,15 PCEI_GTX_C_MRX_N1 DVDD DVDD AVDD_PLL TVDD TVDD AVDD AVDD AVDD U30 U15B +IN D_DVI_TXCD_DVI_TXC+ DVI CONTROLLER 1 VSB @ 10K_0402_5% +3VALW U22A +1.5VS C6741 @ 1000P_0603_50V8J +1.5VS C6761 @ 1000P_0603_50V8J +3VS +5VS C6751 @ 1000P_0603_50V8J +3VS +5VS C6771 @ 1000P_0603_50V8J +3VS DVI_DVDD_2.5V O +3VS 12 I OE# 13 G I OE# 0.1U_0402_16V4Z P C360 14 C106 SN74LVC125APWLE_TSSOP14 +1.5VS C6781 @ 1000P_0603_50V8J +3VS +1.5VS C6801 @ 1000P_0603_50V8J +1.8V +5VS C6811 @ 1000P_0603_50V8J +1.8V +5VS C6821 @ 1000P_0603_50V8J +1.8V +5VS C6831 @ 1000P_0603_50V8J +1.8V +5VS C6841 @ 1000P_0603_50V8J +1.8V U22D O 11 +3V +5VS C6791 @ 1000P_0603_50V8J +3VS +2.5VS C105 0.1U_0402_16V4Z C115 10U_1206_16V4Z 0.1U_0402_16V4Z DVI_AVDD_3V For EMI C472 +3VS C471 0.1U_0402_16V4Z C473 10U_1206_16V4Z SN74LVC125APWLE_TSSOP14 A 0.1U_0402_16V4Z U34F P 14 A I O 12 G 13 SN74LVC14APWLE_TSSOP14 Compal Electronics, Inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Screws and CH7307 Size Rev 0.2 EFL50 LA-2761 Date: Document Number Sheet Wednesday, April 20, 2005 41 of 51 A B C PC139 2 0.01U_0603_16V7K 10K_0603_5% PR1 1M_0603_1% VIN G PD26 SBM1040-13_POWERMITE3 - PR6 20K_0603_1% PACIN 43 PZD1 LM393M_SO8 PR7 10K_0603_5% PC6 RLZ4.3B_LL34 1000P_0603_16V7K Vin Detector RTCVREF High 18.764 17.901 17.063 Low 17.745 16.903 16.038 PR8 10K_0603_5% PR9 1K_1206_5% 3.3V 33_1206_5% VS PQ34 DTC115EUA_SC70 33,43 ACOFF PQ1 TP0610K_SOT23 2 PR19 1.5M_0603_5% PR20 330K_0603_1% PD6 GND PC14 10U_0805_10V4Z G920AT24U_SOT89 PC13 1U_0805_25V4Z 1 PR22 1 1000P_0603_50V7K 300_0603_5% 0.1U_0603_16V7K RB751V_SOD323 LM393M_SO8 PC12 PR25 137K_0603_1% 634K_0603_1% PC10 1000P_0603_50V8J IN - @66.5K_0603_1% G OUT PR23 34K_0603_1% 300_0603_5% 43 ACON PR24 + O 2 PC11 1 3.3V PR27 CHGRTC PU2 PR26 PR21 200_0805_5% RB751V_SOD323 RTCVREF PD5 P PU1B 17,40,44,45 MAINPWON PR18 10K_0603_5% VL 22K_0603_5% PR17 39 51ON# B+ PQ33 DTC115EUA_SC70 PC8 0.1U_0805_25V7K PC7 0.22U_1206_25V7K PR14 100K_0603_5% 1 PR169 100K_0402_5% 2 CHGRTCP 1 PR11 RB751V_SOD323 PD3 BATT+ PR15 1K_1206_5% 1N4148_SOD80 1N4148_SOD80 PQ35 TP0610K_SOT23 PR12 1K_1206_5% 100K_0402_5% PR168 PR10 1K_1206_5% 1 PD2 PD4 PR167 2 VIN 100K_0402_5% VIN ACIN 33 PACIN O 100P_0603_50V8J + 2 1000P_0603_50V7K 2200P_0603_50V7K PC4 1000P_0603_50V7K 100P_0603_50V8J 1 PC5 PC3 PC2 1 PC1 2 SINGA 2DC-S026-B07_3P G 2 22K_0603_5% G PR4 0_0603_5% PU1A P PR5 G AD IN PR2 10K_0603_5% PR3 84.5K_0603_1% FBM-L11-453215-900LMA60T_2P VS VIN PL1 ADPIN SINGATRON 2DC-S026-I07 PCN1 1 G G VIN 1 G D PR170 PJP3 RTCVREF Precharge detector D PJP5 PJP4 +1.5VALW +1.8VP PQ2 2N7002_SOT23 G AC ADAPTOR +1.8V PR28 PACIN 47K_0603_5% S PAD-OPEN 3x3m 14.04 12.90 PAD-OPEN 3x3m (2.5A,100mils ,Via NO.=5) (6A,240mils ,Via NO.= 12) 13.70 12.60 13.40 12.40 +1.5VALWP PQ3 DTC115EUA_SC70 PJP6 +5VALW PJP7 PAD-OPEN 3x3m (5A,200mils ,Via NO.= 10) +0.9VP +0.9VS Precharge detector BATTERY 5.85 5.74 5.64 4.74 4.65 4.60 PAD-OPEN 3x3m PJP8 +3VALWP +3VALW (0.3A,40mils ,Via NO.= 2) PAD-OPEN 3x3m +2.5VP PJP10 +1.05VP +2.5VS Compal Electronics, Inc PAD-OPEN 3x3m THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY Title OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS Size Document Number AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY B THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, Date: Wednesday, April 20, 2005 INC +1.05VS DCIN & DETECTOR (0.3A,40mils ,Via NO.= 2) PAD-OPEN 3x3m (2A,80mils ,Via NO.= 4) A PJP9 (4.5A,180mils ,Via NO.= 9) +5VALWP +5VALWP Rev EFL50 LA-2761 B C Sheet D 0.1 42 of 51 A B C D P2 Iadp=0~2.84A P3 B+ PQ5 AO4407_SO8 FBM-L11-453215-900LMA60T_2P PC15 PC16 4.7UF_1206_25V PC18 0.1U_0805_25V7K ACOFF# 23 +INE2 CS 22 -INE2 VCC(o) 21 FB2 20 PR41 21 VH 19 FB1 VCC RT 17 CC=0.5~3.3A CV=12.6V(6 OR CELLS LI-ION) FSTCHG 33 11 OUTD CTL 14 PR182 12 @0_0402_5% -INC1 +INC1 13 PR186 @0_0402_5% MB3887_SSOP24 VREF_MB39A126 PR48 47K_0603_1% PC148 @10P_0402_25V8K PR44 BATT+ 0.02_2512_1% PC28 0.1U_0402_16V7K PR46 2 PC27 47K_0402_1% 1500P_0603_50V7K 15 SKS30-04AT_TSMA FB3 PD9 OUTC1 PR45 10 10K_0603_1% PL3 10U_SIQB125-100A_4.5A_20% PD24 SKS30-04AT_TSMA 16 -INE3 +INE1 42 ACON PC26 0.1UF_0805_25V PR42 -INE1 PQ7 2.2_0402_5% 68K_0402_1% PR185 @0_0402_5% S PR192 LXCHRG 18 0_0402_5% ACOFF 33,42 1SS355_SOD323 0.1U_0603_25V7K 1 VREF PR181 PQ8 DTC115EUA_SC70 PD8 2 PC29 4.7UF_1206_25V PC23 PR184 @0_0402_5% PC25 2 PQ9 2N7002_SOT23 OUT AO4407_SO8 0.1U_0603_25V7K PR47 D PR37 2 10K_0603_5% G PR183 2200P_0603_50V7K 10K_0603_1% 100K_0603_1% 1SS355_SOD323 PC20 1 PR35 150K_0603_5% PD7 PC22 PR40 21 PR43 133K_0603_1% 1 @0_0402_5% PC24 0.1U_0603_25V7K 2 PR187 VREF_MB39A126 33 IREF PC19 220P_0402_25V8K 4700P_0603_50V7K 10K_0603_1% 0_0402_5% 2 S ACOFF# OUTC2 GND 2 2 1 PR39 10K_0603_1% 1 PR38 34K_0603_1% 0.1U_0603_25V7K PQ36 2N7002_SOT23 24 10K_0603_1% 1 PC21 DTC115EUA_SC70 42 PACIN +INC2 PR31 200K_0603_1% D G -INC2 2 47K PR36 PC140 0.1U_0603_25V7K PQ37 VIN 10K_0603_5% PC30 4.7UF_1206_25V 1 47K PR33 47K_0603_5% PU3 33 ADP_I PR32 PR34 0_0603_5% PQ38 DTA144EUA_SC70 PR30 47K_0402_5% 4.7UF_1206_25V 4 AO4407_SO8 2 0.02_2512_1% 1 1 PR29 VIN PQ6 PL2 AO4407_SO8 B++ PC17 2200P_0603_50V7K PQ4 MB39A126 MB39A126 PR49 PR50 2 150K_0603_0.1% 3 VS PC31 22P_0603_50V8J VMB IREF=0.9323Icharge IREF=0.466~3.1V FOR CELL 300K_0603_0.1% 4.2V 2 PC32 P - PU4B LM358A_SO8 PR54 PR53 2.2K_0603_5% OVP voltage : LI PC33 0.01U_0402_25V7K 2 105K_0603_0.5% + - LM358A_SO8 PR52 187K_0603_1% PU4A + G 33 BATT_OVP 0.1U_0603_50V4Z PR51 340K_0603_1% FOR CELL CELL : 13.24V > BATT_OVP= 2.2V THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC (BAT_OVP=0.124 *VMB) A B C Compal Electronics, Inc Title CHARGER Size B Date: Document Number Rev EFL50 LA-2761 Wednesday, April 20, 2005 Sheet D 0.1 43 of 51 A B C D BST5B PD10 CHP202U_SC70 B+++ PQ11 2 47K_0402_5% PC40 4.7U_1206_25V6K AO4912_SO8 28 26 24 27 22 3HG BST3A LX3 PR64 0_0603_5% DL3 PL5 SIL104R-100 DH3 2 PRO# +3VALWP 10 45 SPOK PR74 0_0402_5% PR73 PR70 0_0402_5% @ 3.57K_0402_1% 11 1 PR173 LDO3 0_0402_5% REF 25 PC54 0.047U_0603_16V7K 1 RLZ5.1B_LL34 PR65 PR172 100K_0603_5% 2 PZD4 12 2VREF_19998 PR72 47K_0402_5% 2 PC55 4.7U_0805_10V4Z @ 2 PR62 0_0402_5% GND 23 VS D2 G2 D2 D1/S2/K G1 D1/S2/K S1/A D1/S2/K PC47 1U_0805_16V7K 2 PR63 PR69 499K_0402_1% 200K_0402_1% LX5 PU5 DL5 ILIM5 OUT5 MAX1999EEI_QSOP28 FB5 BST3 N.C DH3 DL3 SHDN# LX3 ON5 OUT3 ON3 FB3 SKIP# PGOOD ILIM3 2 PR60 PR67 499K_0402_1% 200K_0402_1% 15 19 21 PC50 0.22U_0603_10V7K PR68 10.2K_0402_1% + PR71 0_0402_5% PC48 150U_D_6.3VM 1 2 PR59 47_0402_5% DH5 PC42 2200P_0402_50V7K PR171 @4.7_1206_5% PC46 BST5 16 +5VALWP PQ10 2VREF_1999 14 VCC BST5A B+++ PC41 0.1U_0603_16V7K PR58 0_0603_5% TON PL6 SIL104R-100 18 PC44 4.7U_0805_10V4Z VL 170.1U_0603_50V4Z LX5 13 DH5 20 PR56 5HG V+ PR57 0_0603_5% B+++ 1U_1206_25V7K PR55 0_0603_5% LD05 DL5 PC43 4.7_1206_5% 2 AO4912_SO8 1 G2 D2 D1/S2/K D2 D1/S2/K G1 D1/S2/K S1/A VL 1 PC37 4.7U_1206_25V6K PC36 2200P_0402_50V7K 1 PC38 0.1U_0603_50V4Z BST3B PC34 0.1U_0603_50V4Z 2 PL4 FBM-L18-453215-900LMA90T_1812 B+ + PC53 150U_D_6.3VM PC141 0.047U_0603_16V7K +5V Ipeak = 6.66A ~ 10A +3.3V Ipeak = 6.66A ~ 10A MAINPWON 17,40,42,45 PC51 1U_0603_16V6M 4 Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE Title SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR Size Document Number THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, B INC Date: Wednesday, April 20, 2005 5V/3.3V/12V Rev EFL50 LA-2761 A B C Sheet D 0.1 44 of 51 A B C D PH1 under CPU botten side : CPU thermal protection at 80 degree C Recovery at 44(45) degree C VMB PL7 PJP11 VL PC57 0.01U_0603_50V7K 1 2 442K_0603_1% - PU6A P + MAINPWON 17,40,42,44 G O LM393M_SO8 1 100K_0603_1%_TH11-4H104FT PC59 PD14 BATT_TEMP 33 2 VL 100K_0603_1% PC60 1000P_0402_50V7K 1U_0805_50V4Z PR87 3 PH1 1 PD16 154K_0603_1% TM_REF1 +3VALWP 2 PR80 150K_0603_1% PR81 2 6.49K_0603_1% PR78 1 PC58 0.1U_0603_50V4Z PR83 PR84 PR86 1K_0603_1% @BAS40-04_SOT23 PD15 VL VS PC56 1000P_0603_50V7K PR85 17.8K_0603_1% PR77 P_SUYIN_200275MR005G179ZL PC152 1000P_0603_50V7K EC_SMC1 EC_SMD1 1 SMC SMD GND TSA G G TS 100_0603_1% FBM-L18-453215-900LMA90T_1812 BATT+ 100_0603_1% BATT+ PR88 100K_0603_1% @BAS40-04_SOT23 @BAS40-04_SOT23 EC_SMB_CK1 33,35 +3VALWP EC_SMB_DA1 33,35 PQ40 TP0610K_SOT23 VSB + P PC144 0.1U_0805_25V7K - G PC143 0.22U_1206_25V7K 2 22K_0603_5% PU6B O LM393M_SO8 PR180 VL 2 PR176 100K_0603_5% 1 B+ PR175 100K_0603_1% PR174 PC142 @ 0.1U_0402_16V7K PQ39 D 2N7002_SOT23 G S 0_0402_5% 44 SPOK 3 4 Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY Title OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS Size Document Number AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY B THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, Date: Wednesday, April 20, 2005 INC BATTERY CONN / OTP/1.2V Rev EFL50 LA-2761 A B C Sheet D 0.1 45 of 51 +5VS PR111 78.7K_0603_1% PC75 LXS 34 DLS 32 PR110 DHS1 SUS CSP 40 CSP SKIP CSN 39 CSN GND GNDS 13 MAX1532AETL_TQFN40 PR120 10K_0402_1% E PQ23 HMBT2222A_SOT23 PC66 100U_25V_M PC158 2200P_0402_50V7K PC157 2200P_0402_50V7K PC156 2200P_0402_50V7K PC155 2200P_0402_50V7K PC159 2200P_0402_50V7K 2 PR102 @ 100K_0402_1% 909_0402_1% CPU VCC SENSE PR114 0_0402_5% CPUB+ CHP202U_SC70 DHS PR191 2 PR112 3K_0603_1% PC76 0.022U_0402_16V7K 2.2_0402_5% LXS B PR119 @ 100K_0402_1% AO4408_SO8 PQ19 PL10 0.56UH_ETQP4LR56WFC_21A_20% RHU002N06_SOT323 B AO4410_SO8 3 PC154 2200P_0402_50V7K 1 5VS1 1 S PQ20 G PR116 2.2_0402_5% PR118 20K_0402_1% PC64 4.7U_1206_25V6K BSTMA C @ 18 11 909_0402_1% PD18 PC84 27P_0402_50V8J 0.47U_0603_16V7K 470P_0402_50V8J PC72 1000P_0402_50V7K PC74 PR105 3K_0603_1% FB 14 499_0402_1% 15 CCI PC71 PR104 FB CCV 499_0402_1% TIME PR97 PR103 OFS AO4410_SO8 PQ16 DLM 12 ILIM 4.7_1206_5% PR100 OAIN- PC78 OAIN+ 16 D 17 OAIN- OAIN+ SHDN# 0.22U_0603_16V7K S1 PC70 0.22U_0603_16V7K S CMN 33 D 0.01U_0402_25V7Z 38 35 C CMN DHS D S0 BSTS PR121 100K_0402_1% PSI# CMP + 0.001_2512_5% 37 5VS1 31 CMP REF G PR117 0_0402_5% 18 PM_DPRSLPVR PGND VROK TON S D5 25 PQ18 @RHU002N06_SOT323 PR115 PQ17 RHU002N06_SOT323 G 13,18 PM_STP_CPU# B D 19 2 PR113 100K_0402_1% 29 PC77 100P_0402_50V8J 270P_0402_50V7K PR109 200K_0402_1% 10.7K_0402_1% FB 27 DLM +CPU_CORE PL9 0.56UH_ETQP4LR56WFC_21A_20% 1 PQ22 PR122 909_0402_1% PC73 LXM D4 2.2_0402_5% LXM PC82 4.7U_1206_25V6K 2 D3 20 PR188 30.1K_0402_1% 21 DHM1 680P_0603_50V8J 4.7_1206_5% VCC PR108 28 PC81 4.7U_1206_25V6K PR107 @ 100K_0402_5% DHM AO4408_SO8 PQ14 PR190 33,47 VR_ON D2 PR94 2.2_0402_5% PC149 C 22 4.7U_1206_25V6K PC63 PR101 0_0402_5% PR106 0_0402_5% 26 PC150 680P_0603_50V8J PR189 1 2 36 BSTM 1 V+ D1 CPU_VID5 6,13,18 VGATE D0 23 CPU_VID4 24 DHM4 0.22U_0603_16V7K CPU_VID3 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% VCC CPU_VID2 10 VDD 30 BSTMA CPU_VID1 0_0402_5% 0_0402_5% 1 PR90 10_0402_5% VCC CPU_VID0 2 2.2U_0603_6.3V6K PR91 PC68 1U_0603_16V6K PU7 B+ PL8 FBM-L11-322513-201LMAT_1210 0_1206_5% PC67 @ PR92 PR93 PR95 PR96 PR98 PR99 2 PC69 D CPUB+ PR89 5VS1 100K_0402_5% +3VS PC85 0.47U_0603_16V7K PR123 909_0402_1% A A PC124 2 1000P_0402_50V7K OAIN+ 1 Compal Electronics, Inc OAIN+ Title +VCC_H_CORE PC125 Size B 1000P_0402_50V7K Date: Document Number Rev 0.1 EFL50 LA-2761 Wednesday, April 20, 2005 Sheet 46 of 51 PL18 FBM-L11-322513-151LMAT_1210 PC130 4.7U_1206_25V6K PR159 D D 2 PC128 0.1U_0603_25V7K B+ 2 1 PC127 0.01U_0402_25V7Z PU8 DH FB LX VCC DL GND BST 4.7U_0805_6.3V6K PD25 AO4912_SO8 VCCP_LG2 4.7_0402_5% PR162 PL17 1 2 1.8U_SIL104R-1R8_9.5A_30% 1 PQ32 G2 D2 D1/S2/K D2 D1/S2/K G1 D1/S2/K S1/A 1SS355_SOD323 PC134 0.1U_0603_25V7K PR166 4.7K_0402_1% +5VALWP C +1.05VP 2 PC138 3300P_0402_50V7K PC133 0_0402_5% @0.1U_0603_16V4Z PR161 0_0402_5% VCCP_HG1 VCCP_HG2 VCCP_PHASE BSTVCCP MAX8578EUB +3VS PR160 750_0402_5% 2 C 866_0402_1% PR163 PC136 0.1U_0603_25V7K PC135 6800P_0402_25V7K 680P_0603_50V8J PC153 PR193 4.7_1206_5% PR164 30_0402_5% + PC137 220U_D2_4VM_R15 SS OCSET VCCP_LG1 IN 10 PC132 2 1 PR165 4.12K_0402_1% B B A A Compal Electronics, Inc Title 1.5V & 1.8V THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number B Rev 0.1 EFL50 LA-2761 Date: Wednesday, April 20, 2005 Sheet 47 of 51 +1.8VP O.C.P =8.1A ~ 10.36A B++++ PL13 FBM-L11-322513-151LMAT_1210 +1.5VP Current limit = 8.2A ~10.64A 1 1 2 2.2U_0805_10V6K ISEN2 22 27 DL_1.8V LGATE1 LGATE2 PGND1 PGND2 26 VOUT2 VSEN2 EN2 PG2/REF 20 19 21 16 OCSET2 18 C PR154 1.74K_0402_1% ISE_1.8V 2 PL15 +1.8VP 1.8U_SIL104R-1R8_9.5A_30% PQ27 AO4702_SO8 PR146 0_0402_5% PC117 0.01U_0402_25V7Z 2 PR143 11K_0402_1% PC108 @ 0.1U_0402_16V7K SYSON 33,37,40 PR152 0_0402_5% PR147 @ 0_0402_5% PR142 10K_0402_1% PR158 80.6K_0402_1% 2 13 1 ISL6227CA-T_SSOP28 + 2 OCSET1 PR157 71.5K_0402_1% PC123 @ 0.1U_0402_16V7K 11 VOUT1 VSEN1 EN1 PG1 VOUT_1.8V VSE_1.8V 1 PR133 @ 0_0402_5% 2 PR155 10K_0402_1% PR153 0_0402_5% DDR VSE_1.5V +5VALWP 10 15 GND VOUT_1.5V PC114 330U_D_3VM 25 LX_1.8V PHASE2 ISEN1 D D D D DH_1.8V G S S S VCC 28 24 DL_1.5V PHASE1 UGATE2 PQ26 AO4422_SO8 PR136 2.05K_0402_1% ISE_1.5V UGATE1 PC111 0.1U_0402_16V7K 2 23 DH_1.5V BST_1.8V-1 PR148 0_0603_5% BOOT2 PR135 0_0603_5% PQ31 AO4702_SO8 LX_VGA BOOT1 PC112 0.01U_0402_25V7Z 2BST_1.5V-16 17 D D D D SOFT2 G S S S S S S G PR141 0_0402_5% SOFT1 0.01U_0402_25V7Z PC100 0.1U_0402_16V7K 2 2 PR140 6.81K_0402_1% PC107 0.01U_0402_25V7Z PU9 12 VIN BST_1.5V-2 PC106 14 D D D D S S S G AO4422_SO8 D D D D + C PC104 150U_D_2V18 PC126 PR156 2.2_0603_5% BST_1.8V-2 PQ25 PL14 1.8U_SIL104R-1R8_9.5A_30% PC110 4.7U_1206_25V6K 2 +5VALWP PC103 0.1U_0603_25V7K PD22 DAP202U_SOT323 +1.5VALWP D 2 PR137 0_1206_5% PC101 4.7U_0805_6.3V6K B+ PC99 4.7U_1206_25V6K PC97 0.1U_0603_25V7K D B B 915PM(DISCRETE) PR143=11K 1.8VP=1.867V 915GM (UMA) PR143=10.5K 1.8VP=1.8V A A Compal Electronics, Inc Title 1.5VP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size B Document Number EFL50 LA-2761 Rev 0.1 D D +3VALWP PJP12 2 JUMP_43X118 PC115 4.7U_1206_25V6K C C +5VALWP RTCVREF VIN PGND VFB AGND VTT VCCA PU11 VTT REFEN PC147 AGND 2200PF_0603_16V7K PC146 PR178 200K_0402_1% 1U_0603_16V6K PR179 CM8562IS_PSOP8 PC145 0.1U_0603_50V4Z 1 64.9K_0402_1% PQ41 D 2N7002_SOT23 G S 1 2 PC113 4.7U_1206_25V6K PR177 10_0603_1% +2.5VP SUSP 40 B B PJ2 JUMP_43X118 2 1 +1.8VP NC VREF NC VOUT NC TP +3VALWP VCNTL GND 2 PR149 1.07K_0402_1% PC118 10U_1206_6.3V7K VIN 1 PU12 PC119 1U_0603_6.3V6M APL5331KAC-TR_SO8 A A 2 1 +0.9VP PC121 10U_1206_6.3V7K Compal Electronics, Inc PC122 @ 0.1U_0402_16V7K PQ30 D 2N7002_SOT23 PC120 0.1U_0402_16V7K G PR151 1K_0402_1% S SUSP 40 SUSP PR150 0_0402_5% Title 1.8VP/0.9VP/2.5VP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number B Rev 0.1 EFL50 LA-2761 Date: Wednesday, April 20, 2005 Sheet 49 of 51 Version change list (P.I.R List) Item D Fixed Issue Add C663, C664, C665 Add C658, C659, C660, C661, C662 Change L43, L44, L45, L46 Net Page of for HW Reason for change Rev PG# For +2.5V (VCC_SYNC) 0.2 For EMI Solution 0.2 11 Improve Audio 0.2 31 Modify List VER Phase D C C B B A A Compal Secret Data Security Classification 2005/03/08 Issued Date Deciphered Date 2006/03/08 Title PIR (HW) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number Custom EFL50 LA-2761 Date: Wednesday, April 20, 2005 Rev 0.2 Sheet 50 of 51 Version change list (P.I.R List) Item D Fixed Issue Rev PG# Modify PU8 IC Modify 1.05VP voltage level change precharge detect point 47 47 C Reason for change 42 Modify disable precharge respond time for decrease BATT connector EMI 45 for decrease CPU CORE switching ring effect and add EMI solution : snubber for decreaseVCCP ripple 46 47 45 46 43 10 47 add EMI solution 11 add EMI solution in 1.05VP power regulator 47 Phase DVT change PR166 from 7.15k to 4.7k , PC135 from 6800P to 0.047u 0603 change PR20 from 412k to 330k DVT D DVT modify PD16 schematic,and delete PD16(only reserve) 45 VER change PU8 from MAX8576 to MAX8578 2delete PC132 change PR167/PR168/PR169 from 470k to 100k PD16 PIN2 AND PIN3 are wrong add EMI solution Page of for PWR 42 Modify List DVT DVT DVT add PC151/PC152/PC153 :680PF change PR94/PR116 from to 2.2 add PR189//PR188 4.7 1206 ,add PC150/PC149 680P C DVT change PC137 from 150u 35m to 220u 15m DVT2 add PC152 add PR190/191:2.2 add PR192:2.2 DVT2 PVT add PL18 FBM L11 add PC153=680PF ,PR193=4.7 PVT B B A A Compal Electronics, Inc Title PIR (PWR) Size Document Number Rev 0.1 LA-2511 Date: Wednesday, April 20, 2005 Sheet 51 of 51 ... VESD1 VESD2 VESD3 LAN_MDI3+ LAN_MDI3LAN_MDI2+ LAN_MDI2LAN_MDI1+ LAN_MDI1LAN_MDI0+ LAN_MDI0- LAN_MIDI3+ LAN_MIDI3LAN_MIDI2+ LAN_MIDI2LAN_MIDI1+ LAN_MIDI1LAN_MIDI0+ LAN_MIDI0- LAN_CTRL_1.2V 26 26... LAN_MIDI0- RP18 LAN_MIDI0+ ND@ 0_0404_4P2R_5% LAN_MIDI2+ LAN_MIDI2LAN_MIDI3+ LAN_MIDI3- L_LAN_MDI0L_LAN_MDI0+ 2 LAN_MIDI0LAN_MIDI0+ 25 LAN_MIDI0+ L_LAN_MDI2L_LAN_MDI2+ D RP20 LAN_MIDI2LAN_MIDI2+ ND@... R83 49.9_0402_1% RP21 LAN_MIDI1LAN_MIDI1+ L_LAN_MDI1L_LAN_MDI1+ LAN_MIDI0+ LAN_MIDI0LAN_MIDI1+ LAN_MIDI1- ND@ 0_0404_4P2R_5% RP22 LAN_LINK# LAN_ACTIVITY# L_LAN_LINK# L_LAN_ACTIVITY# R72 49.9_0402_1%