A B C D E 1 Compal Confidential 2 C5MMH MB Schematic Document LA-E911P 3 Rev:1A 2017.04.11 4 Compal Secret Data Security Classification 2016/01/29 Issued Date Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title B C D Cover Sheet Size Document Number Custom Rev 1A C5PM2_LA-E361P Date: A Compal Electronics, Inc Sheet Tuesday, April 11, 2017 E of 64 A B C D E Fan Control*2 page 42 eDP Interleaved Memory Memory BUS HDMI CONN page 30 page 31 eDP PEG x16 8GT/s Nvidia N17P-GX with gDDR5 x4 HDMI x lanes Kabylake H PROCESSOR BGA1440 (42X28) (SKL-H_4+2) Processor 260 pin DDR4-SO-DIMM X1 page 14 BANK 0, 1, 2, Dual Channel 260pin DDR4-SO-DIMM X1 1.2V DDR4 1333/1600 page 15 BANK 4, 5, 6, page 06~13 page 23~29 page 37 NGFF WLAN PCIE 2.0 5GT/s USB port X4 DMI page 34 PCIE 3.0 x4 8GT/s Port 9-12 port USB 3.0 conn USB 3.0 Type-C x2 USB (port 2) USB/B (port 3,4) CMOS Camera USB (port 9) Flexible IO page 32 page 38 PCIE 2.0 5GT/s SATA3.0 USBx8 Skylake PCH - H FCBGA(23X23) USB2.0 USB/B (port 5,6) 6.0 Gb/s port page 33 port 48MHz SATA Re-Driver LAN(GbE)/CardReader Realtek 8411H PARADE PS8527 837pin FCBGA HD Audio page 35 Finger Print USB (port 10) page 30 page 42 page 36 3.3V 24MHz page 16~22 Card Reader RJ45 conn SATA HDD Conn HDA Codec ALC255 LPC/eSPI BUS page 40 3 CLK=24MHz ENE KB9022/9032 page 32 page 38 TPM page 39 RTC CKT page 21 Power On/Off CKT page 41 Sub Board LS-E911P Hall sensor/B Int Speaker SPI page 40 Touch Pad PS2 / I2C UAJ on Sub/B Int DMIC on Camera page 30 page 33 Int.KBD SPI ROM x1 page 33 page 17 LS-E912P USB2/B page 41 page 33 page 41 page 41 DC/DC Interface CKT page 43 Compal Electronics, Inc Compal Secret Data Security Classification Power Circuit DC/DC 2016/01/29 Issued Date Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC page 44~61 Title Date: A B C D Block Diagrams Size Document Number Custom C5MMH M/B LA-E911P Tuesday, April 11, 2017 Sheet E Rev 1A of 64 A B C D E 1 CPU_XDP_TMS CPU_XDP_TDI CPU_XDP_TMS CPU_XDP_TDI K36 K37 J35 J34 H37 H36 J37 J38 If need debug from usb port this cmc@ need pop D27 E27 +1.0VS_VCCSTG TMS/TDI pin CPU on-die termination Place to PCH side CMC@ 51_0402_5% RC6 CMC@ 51_0402_5% CPU_XDP_TDI CMC@ 100_0402_1% CPU_XDP_TDO RC14 @ H34 H33 F37 G38 F34 F35 E37 E36 CPU_XDP_TMS RC5 RC7 PCH_JTAG_TCK1 51_0402_5% F26 E26 C34 D34 B36 B34 F33 E33 C33 B33 +1.0VS_VCCSTG RC8 SKYLAKE_HALO UC1D CPU_XDP_TDO CPU_XDP_TCK0 PCH_JTAG_TCK1 CPU_XDP_TDO CPU_XDP_TCK0 PCH_JTAG_TCK1 CMC@ 100_0402_1% CPU_XDP_TDO Place to CPU side RC13 CMC@ 51_0402_1% CPU_XDP_TCK0 A27 B27 BGA1440 DDI1_TXP[0] DDI1_TXN[0] DDI1_TXP[1] DDI1_TXN[1] DDI1_TXP[2] DDI1_TXN[2] DDI1_TXP[3] DDI1_TXN[3] EDP_TXP[0] EDP_TXN[0] EDP_TXP[1] EDP_TXN[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3] DDI1_AUXP DDI1_AUXN EDP_AUXP EDP_AUXN DDI2_TXP[0] DDI2_TXN[0] DDI2_TXP[1] DDI2_TXN[1] DDI2_TXP[2] DDI2_TXN[2] DDI2_TXP[3] DDI2_TXN[3] EDP_DISP_UTIL EDP_RCOMP D29 E29 F28 E28 B29 A29 B28 C28 EDP_TXP0 EDP_TXN0 EDP_TXP1 EDP_TXN1 EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3 C26 B26 EDP_AUXP EDP_AUXN +1.0VS_VCCIO A33 D37 EDP_COMP 24.9_0402_1% RC1 CAD note: Trace width=20 mils,Spacing=25mil,Max length=100mils DDI2_AUXP DDI2_AUXN DDI3_TXP[0] DDI3_TXN[0] DDI3_TXP[1] DDI3_TXN[1] DDI3_TXP[2] DDI3_TXN[2] DDI3_TXP[3] DDI3_TXN[3] PROC_AUDIO_CLK PROC_AUDIO_SDI PROC_AUDIO_SDO DDI3_AUXP DDI3_AUXN G27 G25 G29 CPU_DISPA_SDI RC2 20_0402_5% OF 14 CPU_DISPA_BCLK CPU_DISPA_SDO CPU_DISPA_SDI_R Close to CPU SKL-H_BGA1440 REV = @ ? 1.0 Modify UC1 SR32S@ UC1 SR32Q@ S IC CL8067702870309 SR32S B0 2.5G ABO! SA0000AD850 UV1 G0@ S IC CL8067702870109 SR32Q B0 2.8G ABO! SA0000AD750 UH1 SR30W @ S IC GL82HM175 SR30W D1 FCBGA PCH-H ABO! SA0000ADB30 UV1 G1@ S IC N17P-G0-A1 FCBGA 908P GPU 1706 SA0000A0540 S IC N17P-G1-A1 FCBGA 908P GPU 1707 SA0000A0660 1.A Modify ZZZ DAZ@ PCB C5MMH LA-E911P LS-E911P/E912P DAZ20Z00102 1A Modify 4 Compal Secret Data Security Classification 2016/11/03 Issued Date Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom Date: A B C D Compal Electronics, Inc SKL-H(1/9)DDI,EDP C5MMH M/B LA-E911P Tuesday, April 11, 2017 Sheet E of Rev 1A 64 A B C D E Interleaved Memory UC1A DDR_A_D[0 15] DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_A_D[16 31] DDR_A_D[32 47] DDR_A_D[48 63] BA2 BA1 AY4 AY5 BA5 BA4 AY1 AY2 SKYLAKE_HALO BGA1440 BR6 BT6 BP3 BR3 BN5 BP6 BP2 BN3 BL4 BL5 BL2 BM1 BK4 BK5 BK1 BK2 BG4 BG5 BF4 BF5 BG2 BG1 BF1 BF2 BD2 BD1 BC4 BC5 BD5 BD4 BC1 BC2 AB1 AB2 AA4 AA5 AB5 AB4 AA2 AA1 V5 V2 U1 U2 V1 V4 U5 U4 R2 P5 R4 P4 R5 P2 R1 P1 M4 M1 L4 L2 M5 M2 L5 L1 DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15] DDR0_DQ[16]/DDR0_DQ[32] DDR0_DQ[17]/DDR0_DQ[33] DDR0_DQ[18]/DDR0_DQ[34] DDR0_DQ[19]/DDR0_DQ[35] DDR0_DQ[20]/DDR0_DQ[36] DDR0_DQ[21]/DDR0_DQ[37] DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQ[26]/DDR0_DQ[42] DDR0_DQ[27]/DDR0_DQ[43] DDR0_DQ[28]/DDR0_DQ[44] DDR0_DQ[29]/DDR0_DQ[45] DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQ[32]/DDR1_DQ[0] DDR0_DQ[33]/DDR1_DQ[1] DDR0_DQ[34]/DDR1_DQ[2] DDR0_DQ[35]/DDR1_DQ[3] DDR0_DQ[36]/DDR1_DQ[4] DDR0_DQ[37]/DDR1_DQ[5] DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQ[61]/DDR1_DQ[45] DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQ[63]/DDR1_DQ[47] DDR0_CKP[0] DDR0_CKN[0] DDR0_CKN[1] DDR0_CKP[1] DDR0_CLKP[2] DDR0_CLKN[2] DDR0_CLKP[3] DDR0_CLKN[3] DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3] DDR0_CS#[0] DDR0_CS#[1] DDR0_CS#[2] DDR0_CS#[3] DDR0_ODT[0] DDR0_ODT[1] DDR0_ODT[2] DDR0_ODT[3] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_MA[3] DDR0_MA[4] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_PAR DDR0_ALERT# DDR0_DQSN[0] DDR0_DQSN[1] DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSP[7]/DDR1_DQSP[5] DDR0_DQSP[0] DDR0_DQSP[1] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_ECC[0] DDR0_ECC[1] DDR0_ECC[2] DDR0_ECC[3] DDR0_ECC[4] DDR0_ECC[5] DDR0_ECC[6] DDR0_ECC[7] DDR0_DQSP[8] DDR0_DQSN[8] AG1 AG2 AK1 AK2 AL3 AK3 AL2 AL1 DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK#1 DDR_A_CLK1 AT1 AT2 AT3 AT5 DDR_A_CKE0 DDR_A_CKE1 AD5 AE2 AD2 AE5 DDR_A_CS#0 DDR_A_CS#1 AD3 AE4 AE1 AD4 DDR_A_ODT0 DDR_A_ODT1 AH5 AH1 AU1 DDR_A_BA0 DDR_A_BA1 DDR_A_BG0 AH4 AG4 AD1 DDR_A_MA16 DDR_A_MA14 DDR_A_MA15 AH3 AP4 AN4 AP5 AP2 AP1 AP3 AN1 AN3 AT4 AH2 AN2 AU4 AE3 AU2 AU3 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_BG1 DDR_A_ACT# AG3 AU5 DDR_A_PARITY DDR_A_ALERT# BR5 BL3 BG3 BD3 AB3 V3 R3 M3 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 BP5 BK3 BF3 BC3 AA3 U3 P3 L3 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 SKYLAKE_HALO UC1B DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK#1 DDR_A_CLK1 DDR_A_CKE0 DDR_A_CKE1 DDR_A_CS#0 DDR_A_CS#1 DDR_A_ODT0 DDR_A_ODT1 DDR_A_BA0 DDR_A_BA1 DDR_A_BG0 DDR_B_D[0 15] DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 DDR_B_D[16 31] DDR_A_MA16 DDR_A_MA14 DDR_A_MA15 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_BG1 DDR_A_ACT# DDR_A_PARITY DDR_A_ALERT# DDR_B_D[32 47] DDR_B_D[48 63] DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 BGA1440 BT11 BR11 BT8 BR8 BP11 BN11 BP8 BN8 BL12 BL11 BL8 BJ8 BJ11 BJ10 BL7 BJ7 BG11 BG10 BG8 BF8 BF11 BF10 BG7 BF7 BB11 BC11 BB8 BC8 BC10 BB10 BC7 BB7 AA11 AA10 AC11 AC10 AA7 AA8 AC8 AC7 W8 W7 V10 V11 W11 W10 V7 V8 R11 P11 P7 R8 R10 P10 R7 P8 L11 M11 L7 M8 L10 M10 M7 L8 AW11 AY11 AY8 AW8 AY10 AW10 AY7 AW7 AY3 BA3 DDR1_DQ[0]/DDR0_DQ[16] DDR1_DQ[1]/DDR0_DQ[17] DDR1_DQ[2]/DDR0_DQ[18] DDR1_DQ[3]/DDR0_DQ[19] DDR1_DQ[4]/DDR0_DQ[20] DDR1_DQ[5]/DDR0_DQ[21] DDR1_DQ[6]/DDR0_DQ[22] DDR1_DQ[7]/DDR0_DQ[23] DDR1_DQ[8]/DDR0_DQ[24] DDR1_DQ[9]/DDR0_DQ[25] DDR1_DQ[10]/DDR0_DQ[26] DDR1_DQ[11]/DDR0_DQ[27] DDR1_DQ[12]/DDR0_DQ[28] DDR1_DQ[13]/DDR0_DQ[29] DDR1_DQ[14]/DDR0_DQ[30] DDR1_DQ[15]/DDR0_DQ[31] DDR1_DQ[16]/DDR0_DQ[48] DDR1_DQ[17]/DDR0_DQ[49] DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[23]/DDR0_DQ[55] DDR1_DQ[24]/DDR0_DQ[56] DDR1_DQ[25]/DDR0_DQ[57] DDR1_DQ[26]/DDR0_DQ[58] DDR1_DQ[27]/DDR0_DQ[59] DDR1_DQ[28]/DDR0_DQ[60] DDR1_DQ[29]/DDR0_DQ[61] DDR1_DQ[30]/DDR0_DQ[62] DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[32]/DDR1_DQ[16] DDR1_DQ[33]/DDR1_DQ[17] DDR1_DQ[34]/DDR1_DQ[18] DDR1_DQ[35]/DDR1_DQ[19] DDR1_DQ[36]/DDR1_DQ[20] DDR1_DQ[37]/DDR1_DQ[21] DDR1_DQ[38]/DDR1_DQ[22] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63] DDR1_CKP[0] DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[1] DDR1_CLKP[2] DDR1_CLKN[2] DDR1_CLKP[3] DDR1_CLKN[3] DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3] DDR1_CS#[0] DDR1_CS#[1] DDR1_CS#[2] DDR1_CS#[3] DDR1_ODT[0] DDR1_ODT[1] DDR1_ODT[2] DDR1_ODT[3] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR1_MA[3] DDR1_MA[4] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_PAR DDR1_ALERT# DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSN[6] DDR1_DQSN[7] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSP[5]/DDR1_DQSP[3] DDR1_DQSP[6] DDR1_DQSP[7] DDR1_ECC[0] DDR1_ECC[1] DDR1_ECC[2] DDR1_ECC[3] DDR1_ECC[4] DDR1_ECC[5] DDR1_ECC[6] DDR1_ECC[7] DDR1_DQSP[8] DDR1_DQSN[8] AM9 AN9 AM8 AM7 AM11 AM10 AJ10 AJ11 DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK#1 DDR_B_CLK1 AT8 AT10 AT7 AT11 DDR_B_CKE0 DDR_B_CKE1 AF11 AE7 AF10 AE10 DDR_B_CS#0 DDR_B_CS#1 AF7 AE8 AE9 AE11 DDR_B_ODT0 DDR_B_ODT1 AH10 AH11 AF8 DDR_B_MA16 DDR_B_MA14 DDR_B_MA15 AH8 AH9 AR9 DDR_B_BA0 DDR_B_BA1 DDR_B_BG0 AJ9 AK6 AK5 AL5 AL6 AM6 AN7 AN10 AN8 AR11 AH7 AN11 AR10 AF9 AR7 AT9 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_BG1 DDR_B_ACT# AJ7 AR8 DDR_B_PARITY DDR_B_ALERT# BP9 BL9 BG9 BC9 AC9 W9 R9 M9 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 BR9 BJ9 BF9 BB9 AA9 V9 P9 L9 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK#1 DDR_B_CLK1 DDR_B_CKE0 DDR_B_CKE1 DDR_B_CS#0 DDR_B_CS#1 DDR_B_ODT0 DDR_B_ODT1 DDR_B_MA16 DDR_B_MA14 DDR_B_MA15 DDR_B_BA0 DDR_B_BA1 DDR_B_BG0 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_BG1 DDR_B_ACT# DDR_B_PARITY DDR_B_ALERT# DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 AW9 AY9 DDR CHANNEL B DDR CHANNEL A 121_0402_1% 75_0402_1% 100_0402_1% OF 14 SKL-H_BGA1440 REV = @ RC17 RC18 RC19 SM_RCOMP0 G1 SM_RCOMP1 H1 SM_RCOMP2 J2 close to CPU ? DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2] SKL-H_BGA1440 REV = @ OF 14 DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ BN13 BP13 BR13 +0.6V_VREFCA +0.6V_B_VREFDQ +0.6V_VREFCA +0.6V_B_VREFDQ ? 4 Compal Secret Data Security Classification Issued Date 2016/11/03 Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title SKL-H(2/9)DDRIII Size Document Number Custom B C D Rev 1A C5MMH M/B LA-E911P Date: A Compal Electronics, Inc Tuesday, April 11, 2017 Sheet E of 64 A B C D E 1 UC1C SKYLAKE_HALO BGA1440 PEG_GTX_HRX_P15 PEG_GTX_HRX_N15 PEG_GTX_HRX_P14 PEG_GTX_HRX_N14 CC6 CC8 VGA@ VGA@ CC10 VGA@ CC12 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P15 PEG_GTX_C_HRX_N15 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P14 PEG_GTX_C_HRX_N14 E23 D23 E24 F24 PEG_GTX_HRX_P13 PEG_GTX_HRX_N13 CC14 VGA@ CC15 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P13 PEG_GTX_C_HRX_N13 PEG_GTX_HRX_P12 PEG_GTX_HRX_N12 CC3 VGA@ CC17 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P12 PEG_GTX_C_HRX_N12 E22 F22 PEG_GTX_HRX_P11 PEG_GTX_HRX_N11 CC19 VGA@ CC21 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P11 PEG_GTX_C_HRX_N11 E21 D21 PEG_GTX_HRX_P10 PEG_GTX_HRX_N10 CC5 VGA@ CC23 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P10 PEG_GTX_C_HRX_N10 E20 F20 PEG_GTX_HRX_P9 PEG_GTX_HRX_N9 CC25 VGA@ CC27 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P9 PEG_GTX_C_HRX_N9 E19 D19 PEG_GTX_HRX_P8 PEG_GTX_HRX_N8 CC29 VGA@ CC31 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P8 PEG_GTX_C_HRX_N8 E18 F18 PEG_GTX_HRX_P7 PEG_GTX_HRX_N7 CC33 VGA@ CC35 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_N7 D17 E17 PEG_GTX_HRX_P6 PEG_GTX_HRX_N6 CC37 VGA@ CC39 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6 F16 E16 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_N5 F14 E14 PEG_GTX_HRX_P5 PEG_GTX_HRX_N5 CC41 VGA@ CC43 VGA@ D15 E15 PEG_GTX_HRX_P4 PEG_GTX_HRX_N4 CC45 VGA@ CC47 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_N4 PEG_GTX_HRX_P3 PEG_GTX_HRX_N3 CC49 VGA@ CC51 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_N3 D13 E13 PEG_GTX_HRX_P2 PEG_GTX_HRX_N2 CC53 VGA@ CC55 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2 F12 E12 PEG_GTX_HRX_P1 PEG_GTX_HRX_N1 CC57 VGA@ CC59 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1 D11 E11 PEG_GTX_HRX_P0 PEG_GTX_HRX_N0 CC61 VGA@ CC63 VGA@ 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0 F10 E10 +1.0VS_VCCIO RC20 CAD note: Trace width=12 mils,Spacing=15mil,Max length=400mils E25 D25 DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 DMI_CRX_PTX_P1 DMI_CRX_PTX_N1 DMI_CRX_PTX_P2 DMI_CRX_PTX_N2 DMI_CRX_PTX_P3 DMI_CRX_PTX_N3 PEG_RCOMP 24.9_0402_1% G2 PEG_RXP[0] PEG_RXN[0] PEG_TXP[0] PEG_TXN[0] PEG_RXP[1] PEG_RXN[1] PEG_TXP[1] PEG_TXN[1] PEG_RXP[2] PEG_RXN[2] PEG_TXP[2] PEG_TXN[2] PEG_RXP[3] PEG_RXN[3] PEG_TXP[3] PEG_TXN[3] PEG_RXP[4] PEG_RXN[4] PEG_TXP[4] PEG_TXN[4] PEG_RXP[5] PEG_RXN[5] PEG_TXP[5] PEG_TXN[5] PEG_RXP[6] PEG_RXN[6] PEG_TXP[6] PEG_TXN[6] PEG_RXP[7] PEG_RXN[7] PEG_TXP[7] PEG_TXN[7] PEG_RXP[8] PEG_RXN[8] PEG_TXP[8] PEG_TXN[8] PEG_RXP[9] PEG_RXN[9] PEG_TXP[9] PEG_TXN[9] PEG_RXP[10] PEG_RXN[10] PEG_TXP[10] PEG_TXN[10] PEG_RXP[11] PEG_RXN[11] PEG_TXP[11] PEG_TXN[11] PEG_RXP[12] PEG_RXN[12] PEG_TXP[12] PEG_TXN[12] PEG_RXP[13] PEG_RXN[13] PEG_TXP[13] PEG_TXN[13] PEG_RXP[14] PEG_RXN[14] PEG_TXP[14] PEG_TXN[14] PEG_RXP[15] PEG_RXN[15] PEG_TXP[15] PEG_TXN[15] B25 A25 PEG_HTX_GRX_P15 0.22U_0201_6.3V6K PEG_HTX_GRX_N15 0.22U_0201_6.3V6K 2 1VGA@ CC7 1VGA@ CC9 B24 C24 PEG_HTX_GRX_P14 0.22U_0201_6.3V6K PEG_HTX_GRX_N14 0.22U_0201_6.3V6K 2 1VGA@ CC11 1VGA@ CC13 B23 A23 PEG_HTX_GRX_P13 0.22U_0201_6.3V6K PEG_HTX_GRX_N13 0.22U_0201_6.3V6K 2 1VGA@ CC1 1VGA@ CC2 B22 C22 PEG_HTX_GRX_P12 0.22U_0201_6.3V6K PEG_HTX_GRX_N12 0.22U_0201_6.3V6K 2 1VGA@ CC16 1VGA@ CC18 B21 A21 PEG_HTX_GRX_P11 0.22U_0201_6.3V6K PEG_HTX_GRX_N11 0.22U_0201_6.3V6K 2 1VGA@ CC20 1VGA@ CC4 B20 C20 PEG_HTX_GRX_P10 0.22U_0201_6.3V6K PEG_HTX_GRX_N10 0.22U_0201_6.3V6K 2 1VGA@ CC22 1VGA@ CC24 B19 A19 PEG_HTX_GRX_P9 PEG_HTX_GRX_N9 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC26 1VGA@ CC28 B18 C18 PEG_HTX_GRX_P8 PEG_HTX_GRX_N8 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC30 1VGA@ CC32 A17 B17 PEG_HTX_GRX_P7 PEG_HTX_GRX_N7 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC34 1VGA@ CC36 C16 B16 PEG_HTX_GRX_P6 PEG_HTX_GRX_N6 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC38 1VGA@ CC40 A15 B15 PEG_HTX_GRX_P5 PEG_HTX_GRX_N5 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC42 1VGA@ CC44 C14 B14 PEG_HTX_GRX_P4 PEG_HTX_GRX_N4 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC46 1VGA@ CC48 A13 B13 PEG_HTX_GRX_P3 PEG_HTX_GRX_N3 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC50 1VGA@ CC52 C12 B12 PEG_HTX_GRX_P2 PEG_HTX_GRX_N2 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC54 1VGA@ CC56 A11 B11 PEG_HTX_GRX_P1 PEG_HTX_GRX_N1 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC58 1VGA@ CC60 C10 B10 PEG_HTX_GRX_P0 PEG_HTX_GRX_N0 0.22U_0201_6.3V6K 0.22U_0201_6.3V6K 2 1VGA@ CC62 1VGA@ CC64 PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_N15 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_N7 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_RCOMP DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 D8 E8 DMI_CRX_PTX_P1 DMI_CRX_PTX_N1 E6 F6 DMI_CRX_PTX_P2 DMI_CRX_PTX_N2 D5 E5 DMI_CRX_PTX_P3 DMI_CRX_PTX_N3 J8 J9 DMI_RXP[0] DMI_RXN[0] DMI_TXP[0] DMI_TXN[0] DMI_RXP[1] DMI_RXN[1] DMI_TXP[1] DMI_TXN[1] DMI_RXP[2] DMI_RXN[2] DMI_TXP[2] DMI_TXN[2] DMI_RXP[3] DMI_RXN[3] DMI_TXP[3] DMI_TXN[3] B8 A8 DMI_CTX_PRX_P0 DMI_CTX_PRX_N0 C6 B6 DMI_CTX_PRX_P1 DMI_CTX_PRX_N1 B5 A5 DMI_CTX_PRX_P2 DMI_CTX_PRX_N2 D4 B4 DMI_CTX_PRX_P3 DMI_CTX_PRX_N3 DMI_CTX_PRX_P0 DMI_CTX_PRX_N0 DMI_CTX_PRX_P1 DMI_CTX_PRX_N1 DMI_CTX_PRX_P2 DMI_CTX_PRX_N2 DMI_CTX_PRX_P3 DMI_CTX_PRX_N3 OF 14 SKL-H_BGA1440 REV = @ ? 4 Compal Secret Data Security Classification 2016/11/03 Issued Date Deciphered Date 2017/01/10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title SKL-H(3/9) PEG,DMI Size Document Number Custom B C D Rev 1A C5MMH M/B LA-E911P Date: A Compal Electronics, Inc Sheet Tuesday, April 11, 2017 E of 64 B C D SVID Alert / Data SKYLAKE_HALO UC1E Place the PU resistors close to CPU RC34 +1.0V_VCCST 56_0402_5% CPU_SVID_ALERT# RC36 (To VR) CPU_SVID_ALERT#_R 220_0402_5% RC38 +1.0V_VCCST CPU_24M CPU_24M# CPU_24M CPU_24M# CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] PCI_BCLKP PCI_BCLKN CLK24P CLK24N 100_0402_1% (To VR) CPU_SVID_DAT CPU_SVID_DAT CPU_SVID_ALERT# CPU_SVID_CLK CPU_SVID_DAT H_PROCHOT#_R CPU_SVID_CLK BH31 BH32 BH29 BR30 DDR_PG_CTRL BT13 EC_VCCST_PG H13 H_CPUPW RGD PLTRST_CPU# H_PM_SYNC PM_DOW N H_PECI THERMTRIP# BT31 BP35 BM34 BP31 BT34 J31 +1.0VS_VCCSTG VIDALERT# VIDSCK VIDSOUT PROCHOT# DDR_VTT_CNTL CFG[17] CFG[16] CFG[19] CFG[18] VCCST_PWRGD BPM#[0] BPM#[1] BPM#[2] BPM#[3] EC(open-drain) From BCLKP BCLKN E31 D31 RC31 1K_0402_5% H_PROCHOT# H_CPUPW RGD PLTRST_CPU# H_PM_SYNC H_PECI THERMTRIP# +1.0V_VCCST H_SKTOCC# RC21 @ From EC OD output RC27 1K_0402_5% EC_VCCST_PG_R PM_DOW N_R RC29 60.4_0402_1% EC_VCCST_PG RC30 20_0402_1% PM_DOW N @ RC22 0_0402_5% FLOAT FOR SKL GND FOR CNL H_CATERR# @ T3 BR33 BN1 PROC_TDO PROC_TDI PROC_TMS PROC_TCK PROC_TRST# PROC_PREQ# PROC_PRDY# SKTOCC# PROC_SELECT# BM30 CATERR# CFG_RCOMP PAD CFG0 CFG2 PAD T1 RC25 PAD T2 PCIE port assign CFG[5] CFG[2] x 16 x 16 * reverse 1 1 x x reverse x + x 1x8+2x4 reverse 1 CPU_XDP_TDO CPU_XDP_TDI CPU_XDP_TMS CPU_XDP_TCK0 CPU_XDP_TDO CPU_XDP_TDI CPU_XDP_TMS CPU_XDP_TCK0 BP30 BL30 BP27 CFG_RCOMP OF 14 SKL-H_BGA1440 @ REV = H_PECI +3VS CFG[0] 0.1U_0201_10V6K CC65 * UC2 CH2 EMC@ 1000P_0402_50V7K CH3 XEMC@ 1U_0402_16V7K H_CPUPW RGD NC VCC A Y @ EMC@ 1000P_0402_50V7K CH67 CFG[4] SM_PG_CTRL GND 74AUP1G07GW _TSSOP5 H_PROCHOT#_R RC35 220K_0402_5% 2 DDR_PG_CTRL XEMC@ 1U_0402_16V7K 0 Description XEMC@ 1U_0402_16V7K CH65 CH1 0 +1.2V_VDDQ DDR_VTT_CNTL to DDR VTT supplied ramped X1 ,Change to common part 86.6K_0402_1% PR845 86.6K_0402_1% PR844 10_0402_1% PR842 10_0402_1% PR841 SL200002I00 SW1_3PH_B SW2_3PH_B CSN1_3PH_B CSN2_3PH_B 1U_0402_10V6K PWM2_3PH_A/ADDR H42@ PR832 43.2K_0402_1% PWM1_3PH_B/ICCMAX3B PR839 1.65K_0402_1% PWM2_3PH_B/DOSC1 CSP1_3PH_B PR878 @ 1.65K_0402_1% PC811 SW1_3PH_B Prevention current imbalance 0.1U_0402_25V6 PWM3_3PH_A/VBOOT PC819 CSREF_3PH_B The PR829 will change to 169K ohm, then IA GT SA vboot=1.05V PC812 PR877 @ 1.65K_0402_1% 0.1U_0402_25V6 CSREF_3PH_A Prevention current imbalance 2 B PR838 1.65K_0402_1% CSP2_3PH_B SW2_3PH_B CSP3_3PH_A PC818 0.1U_0402_25V6 PR821 1.65K_0402_1% SW3_3PH_A Place close to GT choke PL806 (phase 1) PH804 220K_0402_5%_ERTJ0EV224J CSREF_3PH_A B PC825 470P_0402_50V8J 2 16.2K_0402_1% 81205_SCLK 81205_ALERT 81205_SDIO 2 53 52 51 50 49 48 47 46 45 44 43 42 41 40 TAB 1 2 PR848 2 PR850 604_0402_1% PSYS_MON DRON PWM1_3PH_A/ICCMAX3A 0.1U_0402_25V6 PR851 49.9_0402_1% PC826 470P_0402_50V8J PC815 PC810 CSP2_3PH_A VSSGT_SENSE @ PR855 100_0402_1% PR852 24.9K_0402_1% CSP3_3PH_B PC816 0.1U_0402_25V6 TSENSE_3PH_B 0.1U_0402_25V6 PR820 1.65K_0402_1% SW2_3PH_A CSREF_3PH_A PC813 0.1U_0402_25V6 TSENSE_3PH_A 2 PR826 2.2_0402_1% CSP1_3PH_A @ PR819 1.65K_0402_1% 2 @ PR854 0_0402_5% VR_HOT# DIFFOUT_3PH_B FB_3PH_B COMP_3PH_B ILIM_3PH_B CSCOMP_3PH_B CSSUM_3PH_B CSREF_3PH_B CSP1_3PH_B CSP2_3PH_B 1K_0402_1% PC814 0.01U_0402_50V7K CSREF_3PH_A +5VALW SW1_3PH_A PR825 1 PR811 75K_0402_1% 2 SL200002I00 2 10_0402_1% ,Change to common part PR858 100_0402_1% 39 38 37 36 35 34 33 32 31 30 29 28 27 VCCGT_SENSE PC828 2200P_0402_50V7K PC827 2200P_0402_50V7K 1K_0402_1% VRHOT# VSP_3PH_B VSN_3PH_B IMON_3PH_B DIFFOUT_3PH_B FB_3PH_B COMP_3PH_B ILIM_3PH_B CSCOMP_3PH_B CSSUM_3PH_B CSREF_3PH_B CSP1_3PH_B CSP2_3PH_B PR831 97.6K_0402_1% 10_0402_1% PR818 PR817 SL200000500->X1 PR853 1K_0402_1% PR859 PR830 97.6K_0402_1% CSN3_3PH_A 2016/03/13 10_0402_1% PU801 NCP81205MNTXG_QFN52_6X6 CSN2_3PH_A PR816 VRMP +19VB_CPU connect to 3A rail 124K_0402_1% @ PR856 0_0402_5% +1.0V_VCCST PR829 24.9K_0402_1% CSN1_3PH_A 124K_0402_1% H42@ PR815 PC809 0.1U_0402_50V7K @ PR857 100_0402_1% 14 15 16 17 18 19 20 21 22 23 24 25 26 H42@ PR814 CSP1_3PH_A CSP2_3PH_A CSP3_3PH_A VSP_3PH_A VSN_3PH_A IMON_3PH_A DIFFOUT_3PH_A FB_3PH_A COMP_3PH_A ILIM_3PH_A CSCOMP_3PH_A CSSUM_3PH_A CSREF_3PH_A CSP1_3PH_A CSP2_3PH_A CSP3_3PH_A SW3_3PH_A DIFFOUT_3PH_A FB_3PH_A COMP_3PH_A ILIM_3PH_A 13.7K_0402_1% 10 11 12 13 SW2_3PH_A 124K_0402_1% PC808 56P_0402_50V8 H42@ PR813 H42@ PR810 CSCOMP_3PH_A CSSUM_3PH_A PC807 820P_0402_50V7K SW1_3PH_A PH801 PR812 165K_0402_1% Place close to IA choke PL803 (phase 1) 220K_0402_5%_ERTJ0EV224J VSP_3PH_A VSN_3PH_A PC803 470P_0402_50V8J VR_ON @ PR866 0_0402_5% PR808 604_0402_1% CPU_SVID_DAT +VCC_GT VSP_1PH VSN_1PH COMP_1PH ILIM_1PH CSN_1PH CSP_1PH IMON_1PH VR_RDY PWM_1PH/ICCMAX_1PH EN SCLK ALRT# SDIO H42@ PR806 23.2K_0402_1% C H44e: PR160,PR162,PR165=127K H42: PR160,PR162,PR165=113K H44e: PR810=12.1K H42: PR810=13.7K CPU_SVID_ALERT#_R 10_0402_1% PR809 PC806 3.3K_0402_1% 2200P_0402_50V7K 2 H44e: PR806=22.6K H42: PR806=23.2K PC804 470P_0402_50V8J 2 PR807 49.9_0402_1% VSP_1PH COMP_1PH ILIM_1PH CSN_1PH_R CSP_1PH IMON_1PH VSN_1PH PC805 15P_0402_50V8J PC835 15P_0402_50V8J PR860 PR867 37.4K_0402_1% 2 PC802 2200P_0402_50V7K CPU_SVID_CLK 0_0402_5% PWM1_1PH/ICCMAX1 PWM1_1PH/ICCMAX1 VSN_3PH_A 49.9_0402_1% @ PR861 81205_SDIO PR872 PC834 1.5K_0402_1% 0.015U_0402_25V7K PR803 1K_0402_1% 2 TTSENSE_3PH_A VRMP VCC DRON PWM1_3PH_A/ICCMAX_3PH_A PWM2_3PH_A/ADDR PWM3_3PH_A/VBOOT PWM3_3PH_B/ROSC_3PH PWM2_3PH_B/ROSC_1PH PWM1_3PH_B/ICCMAX_3PH_B TTSENSE_1PH/PSYS TTSENSE_3PH_B CSP3_3PH_B @ PR805 100_0402_1% PC801 1000P_0402_50V7K PR827 53.6K_0402_1% VSSSENSE @ PR804 0_0402_5% 2 PR828 3.92K_0402_1% 2 VSP_3PH_A PR862 81205_ALERT VR_PWRGD @ PR801 0_0402_5% 10K_0402_5% PR868 30.9K_0402_1% PC833 1000P_0402_50V7K PC830 470P_0402_50V7K @ PR802 100_0402_1% 2 81205_SCLK PR800 PR871 12.4K_0402_1% +VCC_CORE @ +3VS PC831 0.01U_0402_25V7K PR847 75K_0402_1% PC817 2200P_0402_50V7K PC821 56P_0402_50V8 1 PC832 4700P_0402_25V7K PR846 165K_0402_1% 2 PC838 1000P_0402_50V7K PR822 10_0402_1% PR864 100_0402_1% VSP_1PH PR869 7.5K_0603_1% 1 PR870 14K_0402_1% PC822 680P_0402_50V7K @ PR876 100_0402_1% CSN_1PH VCCSA_SENSE +1.0V_VCCST PH805 100K_0402_1%_NCP15W F104F03RC 2 D PR875 1.5K_0402_1% 1000P_0402_50V7K Place close to SA choke PL809 VSN_1PH PR863 100_0402_1% PR873 619_0402_1% PC837 VCCSENSE PC836 1000P_0402_50V7K VSSSA_SENSE +VCC_SA CSREF_3PH_B TSENSE_3PH_B TSENSE_3PH_A +5VALW PH802 PR824 1 1 @ PR834 0_0402_5% Place close to GT MOS @ PR823 0_0402_5% Place close to IA MOS PH803 H42@ PR836 PR835 1K_0402_1% 2 61.9K_0402_1% 2 61.9K_0402_1% 100K_0402_1%_NCP15W F104F03RC 100K_0402_1%_NCP15W F104F03RC PHASE DETECTION CSP3_3PH_B (Common Part) SL200002H00 A A Title CPU_IC Size D Document Number C5MMH M/B LA-E911P Date: Tuesday, April 11, 2017 Rev 1A Sheet 52 of 64 1 2 D1 G1 2 PC889 D +VCC_GT S2 S2 S2 G2 2.2U_0402_6.3V6M Choke 0.15uH SH00000X700 (Size:6.59 x 6.6 x 3.0 mm) (DCR:0.9m +-7%) @EMI@ PR891 4.7_1206_5% CSN1_3PH_B SNB1_GT SW1_3PH_A 1 PC853 CSN1_3PH_A D2/S1 DRVL1_VCCGT PC854 PL806 0.15UH_MMD06CZER15MG_37A_20% VSW1_VCCGT GND DRVL EMI@ PC882 680P_0603_50V7K VCC PQ807 AON6992_DFN5X6D-8-7 4 +5VALW 0_0603_5% PC897 EMI@ 0.1U_0402_25V6 PC895 EMI@ 0.1U_0402_25V6 2 PC896 EMI@ 0.1U_0402_25V6 DRON DRVH1_VCCGT-1 PR897 PWM1_3PH_B/ICCMAX3B SNB1_VCORE 2.2U_0402_6.3V6M PC890 0.22U_0603_25V7K PU805 NCP81151MNTBG_DFN8_2X2 BST FLAG DRVH1_VCCGT PWM DRVH VSW1_VCCGT EN SW D1 S2 S2 G2 S2 1 2 2 G1 PC880 Choke 0.15uH SH00000X700 (Size:6.59 x 6.6 x 3.0 mm) (DCR:0.9m +-7%) EMI@ PR882 4.7_1206_5% DRVL1_VCORE +VCC_CORE 2 VSW1_VCORE BOOT1_VCCGT @ PJ801 JUMP_43X118 2 (Common Part) SF000007100 100U 25V M 6.3X6 PC855 10U_0805_25V6K SW GND DRVL PR890 2.2_0603_1% 10U_0805_25V6K VCC D2/S1 PC856 EMI@ PL801 HCB2012KF-121T50_0805 10U_0805_25V6K EN PL803 0.15UH_MMD06CZER15MG_37A_20% + +19VB_CPU +19VB 10U_0805_25V6K 100U_25V_M DRON +5VALW + PC872 @ 100U_25V_M PWM1_3PH_A/ICCMAX3A PC841 10U_0805_25VAK PC842 10U_0805_25VAK PU802 NCP81151MNTBG_DFN8_2X2 BST FLAG DRVH1_VCORE PWM DRVH D PQ801 AON6992_DFN5X6D-8-7 10U_0805_25VAK PR898 0_0603_5% 2DRVH1_VCORE-1 PC881 0.22U_0603_25V7K 10U_0805_25VAK BOOT1_VCORE PC843 PC873 PC844 PR881 2.2_0603_1% 2 EMI@ PL800 HCB2012KF-121T50_0805 +19VB_CPU SW1_3PH_B_R @EMI@ PC891 680P_0603_50V7K SW1_3PH_B @ PR886 0_0402_5% near choke +19VB_CPU 1 2 D1 D2/S1 +VCC_GT S2 S2 S2 G2 DRVL2_VCCGT Choke 0.15uH SH00000X700 (Size:6.59 x 6.6 x 3.0 mm) (DCR:0.9m +-7%) @EMI@ PR894 4.7_1206_5% CSN2_3PH_B PC892 2.2U_0402_6.3V6M SNB2_GT SW2_3PH_A EMI@ PC885 680P_0603_50V7K C PL807 0.15UH_MMD06CZER15MG_37A_20% PQ809 AON6992_DFN5X6D-8-7 GND 1 2 VCC G1 DRVL CSN2_3PH_A SNB2_VCORE 2 0_0603_5% DRON +5VALW 2.2U_0402_6.3V6M DRVH2_VCCGT-1 PR899 PWM2_3PH_B/DOSC1 D1 S2 Choke 0.15uH SH00000X700 (Size:6.59 x 6.6 x 3.0 mm) (DCR:0.9m +-7%) S2 PC883 +VCC_CORE EMI@ PR885 4.7_1206_5% DRVL2_VCORE 2 2 G1 S2 G2 D2/S1 DRVL VSW2_VCORE 6 SW GND PC893 0.22U_0603_25V7K PU806 NCP81151MNTBG_DFN8_2X2 BST FLAG DRVH2_VCCGT PWM DRVH VSW2_VCCGT EN SW PC857 10U_0805_25V6K VCC PL804 0.15UH_MMD06CZER15MG_37A_20% PC858 10U_0805_25V6K EN PR893 2.2_0603_1% BOOT2_VCCGT PC859 10U_0805_25V6K PC860 10U_0805_25V6K DRON +5VALW PQ803 AON6992_DFN5X6D-8-7 +19VB_CPU PC845 10U_0805_25VAK PWM2_3PH_A/ADDR DRVH2_VCORE-1 PC846 10U_0805_25VAK PC884 0.22U_0603_25V7K PU803 NCP81151MNTBG_DFN8_2X2 BST FLAG DRVH2_VCORE PWM DRVH C PR896 0_0603_5% PC847 10U_0805_25VAK PR884 2.2_0603_1% BOOT2_VCORE 10U_0805_25VAK PC848 SW2_3PH_B_R @EMI@ PC894 680P_0603_50V7K SW2_3PH_B @ PR892 0_0402_5% near choke +19VB_CPU D1 S2 S2 2 2 G1 S2 G2 DRVL3_VCORE EMI@ PR888 4.7_1206_5% +VCC_CORE Choke 0.15uH SH00000X700 (Size:6.59 x 6.6 x 3.0 mm) (DCR:0.9m +-7%) CSN3_3PH_A PC886 2.2U_0402_6.3V6M SNB3_VCORE 2 DRVL VSW3_VCORE GND VCC SW B PL805 0.15UH_MMD06CZER15MG_37A_20% D2/S1 +5VALW EN DRON PU804 NCP81151MNTBG_DFN8_2X2 BST FLAG DRVH3_VCORE PWM DRVH 2 PWM3_3PH_A/VBOOT PC849 10U_0805_25VAK PQ805 AON6992_DFN5X6D-8-7 PC850 10U_0805_25VAK PR895 0_0603_5% 2DRVH3_VCORE-1 PC887 0.22U_0603_25V7K PC851 10U_0805_25VAK PR887 2.2_0603_1% BOOT3_VCORE B 10U_0805_25VAK PC852 EMI@ PC888 680P_0603_50V7K For H-line 42： ： VCC_CORE (LL=1.8m) FSW = 600kHz DCR = 0.9m Ohm +/- 7% For H-line 42： ： VCC_GT (LL=2.65m) FSW = 600kHz DCR = 0.9m Ohm +/- 7% I(max)=50A I(peak)=68A Vboot=0V I(max)=25A I(peak)=55A Vboot=0V TYP MAX H/S_AON6428 Rds(on) = 11.3m Ohm , 14.5m Ohm L/S_AON6794 Rds(on) = 2.8m Ohm , 3.5m Ohm DaulMOS AON6992 TYP MAX H/S Rds(on) = 6.8m Ohm , 8.6m Ohm L/S Rds(on) = 2.0m Ohm , 2.5m Ohm SW3_3PH_A Function Field : Drivers - 36.2 Rest of support elements - 36.3 Acoustic Noise B+ Bulk CAP - 37.2 A Compal Electronics, Inc Compal Secret Data Security Classification 2016/01/29 Issued Date Deciphered Date 2017/06/14 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title C5MMH M/B LA-E911P Size Document Number Custom Re v 1A VCC/VCCGT Date: A Tuesday, April 11, 2017 Sheet 53 of 64 4 D1 PC898 10U_0805_25V6K 2 D +VCC_SA PQ811 AON7934_DFN3X3A8-10 @EMI@ PR900 4.7_1206_5% S2 S2 10U_0805_25V6K 10U_0805_25V6K 2 PC865 PL809 0.47UH_MMD05CZR47M_12A_20% SW _+VCC_SA 10 LG_+VCC_SA CSN_1PH SNB_SA 2.2U_0402_6.3V6M PC866 Choke 0.47uH SH00001ED00 (Commom Part) (Size:5.7 x 5.4 x 3.0 mm) (DCR:6.2m +-5%) D1 D1 G1 D2/S1 DRVL VCC GND SW _+VCC_SA PC867 @ 2 EN S2 +5VALW SW G2 DRON DRVH PWM BST PW M1_1PH/ICCMAX1 PAD BST_+VCC_SA 1 PU808 NCP81253MNTBG_DFN8_2X2 HG_+VCC_SA D1 PR901 PC899 2.2_0603_1% 0.22U_0603_25V7K BST_R_+VCC_SA D 10U_0805_25V6K +19VB_CPU PC870 @ @EMI@ PC900 680P_0603_50V7K SW_1PH C C For H-line 42： ： VCC_SA (LL=10m) FSW = 600kHz DCR = 6.2m Ohm +/- 5% I(max)=10A I(peak)=12A Vboot=1.05V DaulMOS AON7934 TYP MAX H/S Rds(on) = 12.4m Ohm , 15.8m Ohm L/S Rds(on) = 9.1m Ohm , 11.6m Ohm B B Function Field : Drivers - 36.2 Rest of support elements - 36.3 A Compal Electronics, Inc Compal Secret Data Security Classification 2016/01/29 Issued Date Deciphered Date 2017/06/14 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title C5MMH M/B LA-E911P Size Document Number Custom Rev 1A VCCSA Date: A Tuesday, April 11, 2017 Sheet 54 of 64 A 1 1 2 1 Issued Date 1 PC1190 1U_0201_6.3V6M PC1189 1U_0201_6.3V6M PC1188 1U_0201_6.3V6M 1 1 1 1 PC1182 1U_0201_6.3V6M PC1181 1U_0201_6.3V6M PC1180 1U_0201_6.3V6M PC1179 1U_0201_6.3V6M PC1178 1U_0201_6.3V6M PC1177 1U_0201_6.3V6M PC1176 1U_0201_6.3V6M PC1175 1U_0201_6.3V6M PC1174 1U_0201_6.3V6M 1 1 1 1 1 PC1172 1U_0201_6.3V6M PC1171 1U_0201_6.3V6M PC1170 1U_0201_6.3V6M PC1169 1U_0201_6.3V6M PC1168 1U_0201_6.3V6M PC1167 1U_0201_6.3V6M PC1166 1U_0201_6.3V6M PC1165 1U_0201_6.3V6M PC1164 1U_0201_6.3V6M PC1163 1U_0201_6.3V6M 1 1 1 1 1 1 Security Classification 2016/01/29 Deciphered Date 1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC 2017/06/14 1 Compal Secret Data Date: 1 PC1209 1U_0201_6.3V6M PC1208 1U_0201_6.3V6M PC1207 1U_0201_6.3V6M PC1206 1U_0201_6.3V6M PC1205 1U_0201_6.3V6M PC1204 1U_0201_6.3V6M 2 1 1 1 1 1 1 1 1 PC1202 22U_0603_6.3V6M PC1201 22U_0603_6.3V6M PC1200 22U_0603_6.3V6M @ PC1199 22U_0603_6.3V6M PC1198 22U_0603_6.3V6M PC1197 22U_0603_6.3V6M PC1152 1U_0201_6.3V6M PC1151 1U_0201_6.3V6M PC1150 1U_0201_6.3V6M PC1149 1U_0201_6.3V6M PC1148 1U_0201_6.3V6M PC1147 1U_0201_6.3V6M PC1146 1U_0201_6.3V6M PC1145 1U_0201_6.3V6M PC1144 1U_0201_6.3V6M PC1143 1U_0201_6.3V6M PC1054 1U_0201_6.3V6M 1 1 1 1 1 1 1 1 1 @ PC1196 22U_0603_6.3V6M PC1195 22U_0603_6.3V6M PC1194 22U_0603_6.3V6M PC1193 22U_0603_6.3V6M PC1192 22U_0603_6.3V6M PC1191 22U_0603_6.3V6M PC1142 1U_0201_6.3V6M PC1141 1U_0201_6.3V6M PC1140 1U_0201_6.3V6M PC1139 1U_0201_6.3V6M PC1138 1U_0201_6.3V6M PC1137 1U_0201_6.3V6M PC1136 1U_0201_6.3V6M PC1135 1U_0201_6.3V6M PC1134 1U_0201_6.3V6M PC1133 1U_0201_6.3V6M PC1043 1U_0201_6.3V6M PC1042 1U_0201_6.3V6M 1 1 1 1 1 1 1 PC1132 1U_0201_6.3V6M PC1131 1U_0201_6.3V6M PC1130 1U_0201_6.3V6M PC1129 1U_0201_6.3V6M PC1128 1U_0201_6.3V6M PC1127 1U_0201_6.3V6M PC1126 1U_0201_6.3V6M PC1125 1U_0201_6.3V6M PC1124 1U_0201_6.3V6M PC1123 1U_0201_6.3V6M PC1030 22U_0603_6.3V6M PC1029 22U_0603_6.3V6M PC1028 22U_0603_6.3V6M PC1027 22U_0603_6.3V6M 1 1 1 1 1 1 1 1 1 1 1 1 @ PC1656 22U_0603_6.3V6M @ PC1655 22U_0603_6.3V6M @ PC1654 22U_0603_6.3V6M @ PC1653 22U_0603_6.3V6M @ PC1652 22U_0603_6.3V6M PC1651 22U_0603_6.3V6M @ @ PC1650 22U_0603_6.3V6M PC1649 22U_0603_6.3V6M @ PC1120 22U_0603_6.3V6M PC1119 22U_0603_6.3V6M PC1118 22U_0603_6.3V6M PC1117 22U_0603_6.3V6M @ PC1116 22U_0603_6.3V6M PC1115 22U_0603_6.3V6M PC1114 22U_0603_6.3V6M @ @ PC1113 22U_0603_6.3V6M PC1112 22U_0603_6.3V6M PC1111 22U_0603_6.3V6M @ PC1020 22U_0603_6.3V6M PC1019 22U_0603_6.3V6M PC1018 22U_0603_6.3V6M PC1017 22U_0603_6.3V6M PC1016 22U_0603_6.3V6M PC1015 22U_0603_6.3V6M 1 1 1 1 1 1 2 1 1 1 1 1 2 1 @ PC1648 22U_0603_6.3V6M PC1647 22U_0603_6.3V6M @ PC1646 22U_0603_6.3V6M @ PC1645 22U_0603_6.3V6M PC1644 22U_0603_6.3V6M PC1643 22U_0603_6.3V6M PC1642 22U_0603_6.3V6M PC1641 22U_0603_6.3V6M PC1122 22U_0603_6.3V6M @ PC1121 22U_0603_6.3V6M PC1110 22U_0603_6.3V6M PC1109 22U_0603_6.3V6M @ PC1108 22U_0603_6.3V6M PC1107 22U_0603_6.3V6M @ PC1106 22U_0603_6.3V6M @ PC1105 22U_0603_6.3V6M PC1104 22U_0603_6.3V6M PC1103 22U_0603_6.3V6M PC1102 22U_0603_6.3V6M @ PC1101 22U_0603_6.3V6M PC1010 22U_0603_6.3V6M PC1009 22U_0603_6.3V6M PC1008 22U_0603_6.3V6M PC1007 22U_0603_6.3V6M PC1006 22U_0603_6.3V6M PC1005 22U_0603_6.3V6M PC1004 22U_0603_6.3V6M PC876 220U_D2_2V_Y @ PC877 560U_D2_2VM_R4.5M PC1203 1U_0201_6.3V6M PC1162 1U_0201_6.3V6M PC1161 1U_0201_6.3V6M PC1160 1U_0201_6.3V6M PC1159 1U_0201_6.3V6M PC1158 1U_0201_6.3V6M PC1157 1U_0201_6.3V6M PC1156 1U_0201_6.3V6M PC1155 1U_0201_6.3V6M PC1154 1U_0201_6.3V6M PC1153 1U_0201_6.3V6M PC1065 1U_0201_6.3V6M PC1053 1U_0201_6.3V6M PC1041 1U_0201_6.3V6M PC1026 22U_0603_6.3V6M 1 PC1187 1U_0201_6.3V6M PC1173 1U_0201_6.3V6M PC1075 1U_0201_6.3V6M 1 PC1040 1U_0201_6.3V6M 2 PC1014 22U_0603_6.3V6M PC1003 22U_0603_6.3V6M PC869 220U_D2_2V_Y +VCC_GT PC1186 1U_0201_6.3V6M PC1185 1U_0201_6.3V6M PC1064 1U_0201_6.3V6M PC1052 1U_0201_6.3V6M @ 1 PC1051 1U_0201_6.3V6M 2 PC1039 1U_0201_6.3V6M PC1025 22U_0603_6.3V6M @ PC1085 1U_0201_6.3V6M PC1074 1U_0201_6.3V6M PC1063 1U_0201_6.3V6M 1 1 +VCC_GT 1 PC1062 1U_0201_6.3V6M 2 PC1050 1U_0201_6.3V6M PC1038 1U_0201_6.3V6M PC1024 22U_0603_6.3V6M PC1013 22U_0603_6.3V6M @ + PC1184 1U_0201_6.3V6M PC1084 1U_0201_6.3V6M PC1073 1U_0201_6.3V6M 1 1 +VCC_CORE 1 PC1072 1U_0201_6.3V6M 2 PC1061 1U_0201_6.3V6M PC1049 1U_0201_6.3V6M PC1037 1U_0201_6.3V6M PC1023 22U_0603_6.3V6M PC1002 22U_0603_6.3V6M PC868 220U_D2_2V_Y 2 PC1083 1U_0201_6.3V6M 1 1 1 + PC1183 1U_0201_6.3V6M PC1082 1U_0201_6.3V6M 2 PC1071 1U_0201_6.3V6M PC1060 1U_0201_6.3V6M PC1048 1U_0201_6.3V6M PC1036 1U_0201_6.3V6M PC1012 22U_0603_6.3V6M PC1001 22U_0603_6.3V6M 1 1 1 +VCC_CORE (IA) 220uF X 22uF_0603 X 20(+10@) 1uF_0201 X 63 2 PC1081 1U_0201_6.3V6M PC1070 1U_0201_6.3V6M PC1059 1U_0201_6.3V6M PC1047 1U_0201_6.3V6M @ 1 1 PC1011 22U_0603_6.3V6M PC1095 1U_0201_6.3V6M PC1080 1U_0201_6.3V6M PC1069 1U_0201_6.3V6M PC1058 1U_0201_6.3V6M PC1022 22U_0603_6.3V6M @ PC1094 1U_0201_6.3V6M 1 PC1035 1U_0201_6.3V6M @ PC1093 1U_0201_6.3V6M PC1079 1U_0201_6.3V6M PC1068 1U_0201_6.3V6M PC1046 1U_0201_6.3V6M @ PC1092 1U_0201_6.3V6M 1 PC1057 1U_0201_6.3V6M @ PC1091 1U_0201_6.3V6M PC1090 1U_0201_6.3V6M PC1078 1U_0201_6.3V6M PC1067 1U_0201_6.3V6M 2 PC1021 22U_0603_6.3V6M @ PC1089 1U_0201_6.3V6M PC1088 1U_0201_6.3V6M 1 PC1034 1U_0201_6.3V6M @ PC1077 1U_0201_6.3V6M PC1045 1U_0201_6.3V6M 2 1 PC1056 1U_0201_6.3V6M + PC1087 1U_0201_6.3V6M PC1066 1U_0201_6.3V6M 2 PC1033 1U_0201_6.3V6M PC1076 1U_0201_6.3V6M 2 PC1044 1U_0201_6.3V6M + PC1086 1U_0201_6.3V6M 1 2 B PC1055 1U_0201_6.3V6M +VCC_CORE +VCC_GT 220uF X (+1@) 22uF_0603 X 18(+20@) 1uF_0201 X 68 Common part SGA00009S00 D +VCC_GT D +VCC_SA 22uF_0603 X 10(+2@) 1uF_0201 X C +VCC_SA C B A Title C5MMH M/B LA-E911P Compal Electronics, Inc Size Document Number Custom Tuesday, April 11, 2017 CPU CAP Sheet 55 of 64 R ev 1A A B C D E +19VB @VGA_EMI@ PL1301 HCB2012KF-121T50_0805 TYP MAX H/S_AON6428 Rds(on) = 11.3m Ohm , 14.5m Ohm L/S_AON6794 Rds(on) = 2.8m Ohm , 3.5m Ohm +19VB_1.35VSDGPUP VGA@ PR1312 10K_0402_5% LGATE_1.35VSDGPUP VGA@ PC1307 1U_0603_6.3V6M VGA@ PQ1303 AON6314 1N DFN5X6-8 VGA@ PR1315 49.9_0402_1% 2 VGA@ PC1313 680P_0402_50V7K ->290KHz ->340KHz ->380KHz PR1305 4.7_1206_5% VGA_EMI@ 11 VGA@ PR1306 200K_0402_1% 1.35VS_DGPU_FB S 2N7002KW _SOT323-3 G PR1309 0_0402_5% @VGA@ Change the output voltage from 1.35V to 1.5V VGA@ + VGA@ PR1314 100_0402_1% PR1307 1 + 2 FB_VDDQ_SENSE PR1313 @VGA@ VFB=0.704V Vout=0.704V* PC1308 680P_0603_50V7K VGA_EMI@ 18.7K_0402_1% VGA@ PR1308 20K_0402_1% VGA@ PQ1302 D 2 VGA@ PR1311 10K_0402_1% @VGA@ PC1309 0.1U_0402_16V7K VRAM_VDD_CTL PR1310 VGA@ 90.9K_0402_1% +1.35VSDGPUP PC1311 VGA@ 220U_D2 SX_2VY_R9M +5VALW PC1301 VGA@ 220U_D2 SX_2VY_R9M LGATE VGA@ PL1302 0.82UH PCMC063T-R82MN 13A_20% 2 RF LX_1.35VSDGPUP 1 VCC HGATE_1.35VSDGPUP SNB_1.35VSDGPUP Rrf=470K Rrf=200K Rrf=100K PHASE FB TP Frequency EN Choke 0.82uH SH00000FH00 (Size:6.95 x 6.6 x 2.8 mm) (DCR:6.7m~8m Ohm) UGATE CS VGA@ PC1305 0.1U_0603_25V7K 2 1M_0402_1% PR1304 BOOT VGA@ PR1302 0_0603_5% BST_1.35VSDGPUP 1 @VGA@ VGA@ PC1306 0.1U_0402_16V7K 1.35VSDGPU_PW R_EN 1.35VS_DGPU_EN PGOOD 10 PR1303 VGA@ 10K_0402_1% VGA@ PR1301 69.8K_0402_1% 2ILMT_1.35VSDGPUP PU1301 VGA@ RT8237EZQW (2)_W DFN10_3X3 IOCP +3VS @ PJ1301 JUMP_43X79 VGA_EMI@ PC1312 0.1U_0402_25V6 AON6380 1N DFN5X6-8 10U_0805_25V6K VGA@ PC1310 PQ1301 10U_0805_25V6K VGA@ PC1304 VGA@ @VGA_EMI@ PC1303 0.1U_0402_25V6 VGA_EMI@ PC1302 2200P_0402_50V7K 1.35VS_DGPU_PG 0_0402_5% (1+Rup/Rdown) Vout=0.704V* (1+(18.7/20))=1.36 0.97% Vout=0.704V* (1+(18.7/(20//93.1)))=1.5 Vout=0.704V* (1+(18.7/(20//90.9)))=1.524 Vout=0.704V* (1+(18.7/(20//88.7)))=1.548 0.03% 1.62% 3.23% @ +1.35VSDGPUP PJ1302 2 +1.35VSDGPU JUMP_43X118 Rds on 2.8 / 3.5mohm Rlimt=69.8K @ PJ1303 2 JUMP_43X118 4 Compal Secret Data Security Classification Issued Date 2016/01/29 Deciphered Date 2017/06/14 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size A3 Date: Compal Electronics, Inc VRAM Document Number Rev 1A C5MMH M/B LA-E911P Tuesday, April 11, 2017 Sheet 56 of 64 A B C D @ PJ1401 JUMP_43X79 2 +1.0VSDGPUP VGA@ PL1401 1UH_2.8A_30%_4X4X2_F 2 FB_1.0VSDGPUP Rdown VGA_EMI@ PC1405 680P_0402_50V7K 2 VGA@ PC1407 22U_0603_6.3V6M VGA@ PC1404 0.1U_0402_16V7K 2 VGA@ PR1404 1M_0402_1% 1 VGA@ PR1403 13.7K_0402_1% EN_1.0VSDGPUP VGA@ PC1403 22U_0603_6.3V6M 10K_0402_5% +1.0VSDGPUP Rup VGA_EMI@ PR1402 4.7_0603_5% 2 @VGA@ PC1406 22U_0603_6.3V6M LX_1.0VSDGPUP VGA@ PC1401 68P_0402_50V8J EN VFB=0.6V Vout=0.6V* (1+Rup/Rdown) =0.6V* (1+13.7/20) Vout=1.011V FB GND VGA@ PR1405 20K_0402_1% PG LX VGA@ PR1406 10K_0402_1% VGA@ PR1401 IN VGA_CORE_S_EN 1VS_DGPU_PG +3VS VIN_1.0VSDGPUP SNUB_1.0VSDGPUP @ PJ1402 JUMP_43X79 2 PU1401 VGA@ SY8032ABC_SOT23-6 +3VALW +1.0VSDGPU Choke 1uH SH00000YG00 (Common Part) (Size:3.8 x 3.8 x 1.9 mm) (DCR:20m~25m) VGA@ PC1402 22U_0603_6.3V6M E Note: When design Vin=5V, please stuff snubber to prevent Vin damage 2 3 4 Compal Secret Data Security Classification Issued Date 2016/01/29 Deciphered Date 2017/06/14 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size C Date: A B C D Compal Electronics, Inc 1.05VSDGPU Document Number Rev 1A C5MMH M/B LA-E911P Tuesday, April 11, 2017 Sheet E 57 of 64 PC1508 @VGA@ 100U_25V_NC_6.3X6 @VGA@ PC1507 10U_0805_25VAK VGA@ PC1506 10U_0805_25VAK VGA@ PC1505 10U_0805_25VAK VGA@ PC1504 10U_0805_25VAK VGA_EMI@ PC1503 2200P_0402_50V7K 1 SF000007100 (Common Part) 100U 25V M 6.3X6 VGA@ PL1502 0.22UH_MMD-10DZ-R22MES1L 35A_20% 2 D1 D1 G1 1 G1 1 VGA@ PQ1502 AON6992_DFN5X6D-8-7 NVVDD_LG1 +19VB_GPU_NVVDD VGA@ PC1523 10U_0805_25VAK VGA@ PC1522 10U_0805_25VAK VGA@ PC1521 10U_0805_25VAK PC1520 @VGA@ 10U_0805_25VAK +VGA_CORE NVVDD_HG2 D1 G1 S2 S2 G2 @VGA_EMI@ PR1523 2.2_1206_1% S2 VGA@ PQ1504 AON6992_DFN5X6D-8-7 D1 VGA@ PQ1503 AON6992_DFN5X6D-8-7 PL1503 VGA@ 0.22UH_MMD-10DZ-R22MES1L 35A_20% D2/S1 NVVDD_SW2 100_0402_5% D2/S1 S2 S2 G1 VSSSENSE_VGA PR1524 VGA@ G2 Avoid high dV/dt VCCSENSE_VGA NVVDD_HG2 100_0402_5% +VGA_CORE S2 VGA@ PR1521 2 PR1520 0_0402_5% @VGA@ 1000P_0402_25V VGA@ PC1524 0.01U_0402_16V VGA@ PC1515 47P_0402_50V8J VGA_EMI@ PC1519 2200P_0402_50V7K VGA@ PC1517 @VGA_EMI@ PC1518 0.1U_0402_25V6 1 VGA@ PR1514 49.9_0402_1% Place close to GPU R1, R2, R3, R4, R5, C are based on VGA type to set S2 S2 S2 G2 S2 S2 S2 G2 2 NVVDD_LG1 @VGA@ PC1525 4700P_0402_50V7K VGA@ PQ1501 AON6992_DFN5X6D-8-7 VGA@ PC1513 22P_0402_50V8J VGA@ PR1522 20.5K_0402_1% D2/S1 1 @VGA@ PR1508 75K_0402_1% R2 C VGA@ PC1514 220P_0402_50V8J VGA@ PR1513 10K_0402_5% VGA@ PR1512 39.2K_0402_1% PR1519 0_0402_5% @VGA@ D2/S1 Choke 0.22uH SH00000QZ00 (Size:11.5 x 10 x 4.0 mm) (DCR:0.82m +-5%) NVVDD_FB NVVDD_FS VGA@ PR1511 51.1K_0402_1% NVVDD_VREF R5 NVVDD_COMP 12 11 NVVDD_FBRTN 10 21 C for ON VGA@ PR1517 16.5K_0402_1% VGA@ PR1518 309_0402_1% VGA@ PR1515 4.32K_0402_1% VGA@ PR1516 6.19K_0402_1% R3 R4 VGA_CORE_PG 13 NVVDD_REFIN R1 VGA@ PR1504 100K_0402_5% NVVDD_HG2 FB NVVDD_BST2 NVVDD_HG1 COMP/OPT 14 PGOOD PSI NVVDD_VIDBUF VGA@ PR1503 2.2_0603_1% PH2 18 16 17 LG2 PVCC EN VID NVVDD_HG1 +3VS @VGA@ PR1510 0_0402_5% HG2 15 1 HG1 FBRTN NVVDD_VID_R BST2 FS NVVDD_PSI_R 19 20 LG1 PH1 NVVDD1_EN VGA@ PC1510 0.22U_0603_25V7K VGA@ PU1501 NCP81278MNTXG_QFN20_3X3 BST1 VREF Avoid high dV/dt REFIN DGPU_VID GND NVVDD_BST1 NVVDD_HG1 VIDBUF VGA@ PR1502 2.2_0603_1% +VGA_CORE VGA@ PC1511 0.22U_0603_25V7K VGA@ PR1505 10K_0402_1% 2 @ PJ1501 JUMP_43X118 NVVDD_SW2 2 @VGA@ PC1501 0.1U_0402_16V7K +1.8VS @VGA@ PR1525 10K_0402_1% @VGA@ PR1509 10K_0402_1% NVVDD_SW1 DGPU_PSI + NVVDD_LG2 NVVDD_SW1 +5VS @VGA@ PR1507 0_0402_5% +19VB @VGA_EMI@ @VGA_EMI@ PC1512 PR1506 2200P_0603_50V7K 2.2_1206_1% @VGA@ PR1501 0_0402_5% VGA@ PC1516 4700P_0402_50V7K VGA_CORE_EN NVVDD_LG1 @VGA_EMI@ PC1502 0.1U_0402_25V6 1 EN can't float VGA@ PC1509 4.7U_0402_6.3V6M +5VS High: >1.5V Low: VGA_EMI@ PL1504 HCB2012KF-121T50_0805 VGA_EMI@ PL1501 HCB2012KF-121T50_0805 +19VB_GPU_NVVDD Choke 0.22uH SH00000QZ00 (Size:11.5 x 10 x 4.0 mm) (DCR:0.82m +-5%) @VGA_EMI@ PC1526 2200P_0603_50V7K NVVDD_LG2 NVVDD_LG2 ：50 W [ N17P- G0 ：4 0W] For N17P-G1： VGA_CORE (NVVDD) FSW = 450kHz DCR = 0.82m Ohm +/- 5% TDC=45A I(max)=106A Vboot=0.8V DaulMOS AON6992 TYP MAX H/S Rds(on) = 6.8m Ohm , 8.6m Ohm L/S Rds(on) = 2.0m Ohm , 2.5m Ohm Please base on GPU spec to calculate Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2016/01/29 Deciphered Date 2017/06/14 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size VGA_CORE Document Number C5MMH M/B LA-E911P Date: Tuesday, April 11, 2017 Sheet 58 of 64 Rev 1A A @VGA@ PC1615 4700P_0402_50V7K C C @VGA@ PC1606 10U_0805_25V6K @VGA@ PC1605 10U_0805_25V6K VGA@ PC1604 10U_0805_25V6K 2 D1 G1 S2 S2 S2 G2 Choke 0.22uH SH000011H00 (Common Part) (Size:7.6 x 6.6 x 3.8 mm) (DCR:0.98m +-5%) VGA@ PC1609 220P_0402_50V8J 1 VGA@ PL1602 0.22UH_24A_20%_ 7X7X4_M 2 VGA@ PC1611 47P_0402_50V8J 2 NVVDDS_LG1 VGA@ PR1611 49.9_0402_1% @VGA_EMI@ PR1610 2.2_1206_1% B @VGA_EMI@ PC1610 2200P_0603_50V7K 1 VGA@ PC1613 1000P_0402_25V PR1617 0_0402_5% @VGA@ PR1618 0_0402_5% @VGA@ VGA@ PR1620 100_0402_5% +VGA_CORE_S Avoid high dV/dt VGA@ PR1621 20.5K_0402_1% VGA@ PQ1602 AON6992_DFN5X6D-8-7 D2/S1 +VGA_CORE_S R2 VGA@ PC1608 22P_0402_50V8J 2 NVVDDS_SW1 1 VGA@ PR1609 51.1K_0402_1% R5 2 @ PJ1601 JUMP_43X118 2 11 @VGA@ PR1606 75K_0402_1% 16 FS VREF NVVDDS_COMP 12 NVVDDS_VREF 2 VGA@ PC1612 4700P_0402_50V7K VGA_CORE_S_PG 13 VGA@ VGA@ PR1612 PR1613 39.2K_0402_1% 10K_0402_5% C for ON R4 VGA@ PC1614 0.01U_0402_16V VGA@ PR1619 309_0402_1% VGA@ PR1615 4.32K_0402_1% VGA@ PR1616 16.5K_0402_1% R3 FBRTN FB NVVDDS_REFIN R1 PH2 18 VID NVVDDS_VIDBUF VGA@ PR1614 6.19K_0402_1% 17 PVCC COMP/OPT 14 1NVVDDS_FS B LG2 19 PSI @VGA@ PR1607 0_0402_5% Avoid high dV/dt LG1 20 PGOOD 1 +19VB VGA@ PR1604 100K_0402_5% 15 10 DGPU_S_VID HG2 EN GND HG1 21 VGA@ PR1608 10K_0402_1% PH1 BST2 REFIN VGA@ PU1601 NCP81278MNTXG_QFN20_3X3 BST1 VIDBUF NVVDD2_EN @VGA@ PR1605 0_0402_5% 2 DGPU_PSI NVVDDS_BST1 NVVDDS_HG1 VGA@ PR1603 10K_0402_1% NVVDDS_HG1 +3VS VGA@ PR1602 2.2_0603_1% @VGA@ PC1601 0.1U_0402_16V7K VGA@ PC1607 0.22U_0603_25V7K 2 +1.8VS @VGA@ PR1601 0_0402_5% 1 VGA_CORE_S_EN EN can't float NVVDDS_SW1 VGA@ PC1603 10U_0805_25V6K NVVDDS_LG1 VGA_EMI@ PC1617 2200P_0402_50V7K High: >1.5V Low: