1. Trang chủ
  2. » Công Nghệ Thông Tin

Hardware and Computer Organization- P17 potx

30 211 0

Đang tải... (xem toàn văn)

Tài liệu hạn chế xem trước, để xem đầy đủ mời bạn chọn Tải xuống

THÔNG TIN TÀI LIỆU

Thông tin cơ bản

Định dạng
Số trang 30
Dung lượng 224,12 KB

Nội dung

463 Chapter 9: Solutions for Odd-Numbered Problems 1. This is an example of the addressing mode known as “address register indirect with index and displacement”. The effective address is the sum of the address value in A0, the index value, D0, and the 2’s complement displacement. Since $84 is a negative number, –7C. Thus, the effective address, EA = $2000 + $0400 + ( –$7C ). EA = $2384 The program is not relocatable for two reasons: 1. There is a jump to an absolute address, start 2. An absolute address is loaded into A0. The program could still be relocatable by managing what gets loaded into A0 and D0, but the jump instruction forces it to be absolute. 3. The value in D0 after the highlighted instruction is $0000002A. 5. 00000400 067955550000AAAA ADDI.W #$5555,$0000AAAA 00000408 06B9AAAA55550000FFFE ADDI.L #$AAAA5555,$0000FFFE 00000412 0640AAAA ADDI.W #$AAAA,D0 7. ******************************************************************** * * CSS 422 HW #4: Relocatable Memory test program * ******************************************************************** * System equates pattern1 EQU $AAAA * First test pattern pattern2 EQU $FFFF * Second test pattern pattern3 EQU $0001 * Third test pattern st_addr EQU $00000400 * Starting address of test end_addr EQU $0009FFF0 * Ending address of the test stack EQU $000C0000 * Location of the stack pointer word EQU 2 * Length of a word, in bytes byte EQU 1 * One byte long, NO MAGIC NUMBERS! bit EQU 1 * Shifting by bits exit_pgm EQU $2700 * Simulator exit code data EQU $500 * Data storage region start EQU $400 * Program starts here Appendix A 464 new_ad EQU $000A0000 * Relocated program runs here pr_cmd EQU 00 * Command to print message * Main Program OPT CRE * Turn on cross references ORG start * Program begins here LEA stack,SP * Initialize the stack pointer LEA relo,A0 * Starting address pointer LEA last_addr,A1 * End pointer LEA new_ad,A3 * Destination relo_lp MOVE.W (A0)+,(A3)+ * Move a word CMPA.L A0,A1 * Have we moved enough? BPL relo_lp JMP new_ad relo LEA test_patt(PC),A3 * A3 points to the test pattern to use LEA bad_cnt(PC),A4 * A4 points to bad memory counter LEA bad_addr(PC),A5 * A5 points to the bad addr location LEA data_read(PC),A6 * A6 points to data storage CLR.B (A4) * Clear bad address count MOVE.W (A3)+,D0 * Get current pattern, point to next one BSR do_test * Run first test NOT.W D0 * Complement bits for next test BSR do_test * Run second test MOVE.W (A3)+,D0 * Get next pattern BSR do_test * Run third test NOT.W D0 * Complement bits for fourth test MOVE.W (A3),D0 * Get last pattern shift1 BSR do_test * Run shift test ROL.W #bit,D0 * Shift bits BCC shift1 * Done yet? No go back MOVE.W -(A3),D0 * Get test pattern 3 again NOT.W D0 * Complement test pattern 3 shift2 BSR do_test * Run the test ROL.W #bit,D0 * Shift the bits BCS shift2 * Done yet? If not go back message MOVE.B #pr_cmd,D0 * Load command to print banner LEA string(PC),A1 * Point to message MOVE.W str_len(PC),D1 TRAP #15 *Do it! done STOP #exit_pgm * Quit back to simulator Solutions for Odd-Numbered Problems 465 ************************************************************************ * Subroutine: do_test * * Performs the actual memory test. Fills * the memory with the test pattern of interest. * Registers used: D1,A0,A1,A2 * Return values: None * Registers saved: None * Input parameters: * D0.W = test pattern * A4.L = Points to memory location to save the count of bad addresses * A5.L = Points to memory location to save the last bad address found * A6.L = Points to memory location to save the data_read back and data * written * * Assumptions: Saves all registers used internally ************************************************************************ do_test MOVEM.L A0-A2/D1,-(SP) * Save registers LEA st_addr,A0 * A0 points to start address LEA end_addr,A1 * A1 points to last address MOVE.L A0,A2 * Fill A2 will point to memory fill_loop MOVE.W D0,(A2)+ * Fill and increment pointer CMPA.L A1,A2 * Are we done? BLE fill_loop MOVE.L A0,A2 * Reset pointer test_loop MOVE.W (A2),D1 * Read value back from memory CMP.W D0,D1 * Are they the same? BEQ addr_ok * OK, check next location not_ok MOVE.L A0,(A5) * Save the address of the bad loca - tion ADDQ.W #byte,(A4) * Increment the counter MOVE.W D1,(A6)+ * Save the data read back MOVE.W D0,(A6) * Save the data written SUBQ.L #word,A6 * Restore A6 as a pointer addr_ok ADDQ.L #word,A2 * A2 points to next memory location CMPA.L A1,A2 * Have we hit the last address yet? BLE test_loop * No, keep testing MOVEM.L (SP)+,D1/A0-A2 * Restore registers RTS * Go back * Data Space Appendix A 466 test_patt DC.W pattern1,pattern2,pattern3 * Memory test patterns bad_cnt DS.W 1 * Keep track of # of bad addresses bad_addr DS.L 1 * Store last bad address found here data_read DS.W 1 * What did I read back? data_wrt DS.W 1 * What did I write? string DC.B ‘End of test’ * Exit message str_len DC.W str_len-string last_addr DS.W 1 END start 467 Chapter 10: Solutions for Odd-Numbered Problems 1. <0C0020h> = 15C7h. The word is aligned. 3. 0F57Ch 5. MOV CX,4 MOV BX,10 loop1: inc BX dec CX jnz loop1 7. <AX> = 0AF3DH 9. MOV AX,8200H ;Get segment value MOV DX,AX ;Load segment register MOV SI,0000 ;Load source index register MOV DI,0200H ;Load destination index register MOV CX,1000 ;Load counter loader: MOV AL,[SI] ;Get byte MOV [DI],AL ;Store byte INC SI ;advance pointers INC DI DEC CX JNZ loader 469 1. The 68K has two operational modes, user and supervisor. The ARM architecture allows for 7 operational modes. User mode is the lowest privilege level The other modes are: System, Supervisor, Abort, Fast Interrupt Request, Interrupt Request and Undefined. 3. The biggest difference is that, with the exception of registers, r13-r15, all registers are com - pletely general-purpose. Any register may be used as part of an arithmetic operation or as an address pointer. This is in sharp contrast to the distinction that the 68K architecture makes between the address registers, A0-A6 and the data registers, D0-D7. 5. MOV r4,#&100 ORR r4,r4,#3 7. <r11> = &0013E94C 9. If the Z flag = 0, then the value in register r1, &DEF02340, is incremented by 4 to &DEF02344 and that value is used as an address pointer to retrieve the 16-bit data object stored in that memory location. The 16-bit value is then loaded into general-purpose register r4. If the Z flag = 1, then the instruction is not executed. Chapter 11: Solutions for Odd-Numbered Problems 471 Chapter 12: Solutions for Odd-Numbered Problems 1. *********************************************************************** * Subroutine: xmitStr * Purpose: Transmits a string of characters to the UART * serial port. * Input register list: * A6- Pointer to the data string to be sent. * Return register list: * A6- Pointer to the character after the string terminating * character. * Register usage: All registers used by xmitStr will be saved and * restored upon exit * * Assumptions: * - There is at least one character to transmit. * - String is terminated by $FF. * ******************************************************************** * Data definitions eom EQU $FF *End of message character status EQU $2001 *Status register xmit EQU $2000 *Transmit data register tbmt_mask EQU $01 *Isolate transmit buffer * Subroutine starts here xmitStr MOVEM.L D0/D1/A0/A1,-(SP) *Save the registers LEA.L xmit,A0 *A0 points to transmitter LEA.L status,A1 *A1 points to the status reg. xmit_loop MOVE.B (A1),D1 *Get status ANDI.B #tbmt_mask,D1 *Isolate bit . measure we want: Computer #1 requires 2 cycles per instruction and each clock cycle takes 1 ns (1/1GHz). Therefore, computer #1 requires 2 nanoseconds to execute 1 instruction . Computer #2 requires. per instruction and each clock cycle takes 2 ns (1/500MHz). Therefore, computer #2 requires 2.4 nanoseconds to execute 1 instruction. Thus, performance = 2.4/2.0 = 1.2 . Or computer #1 has. Initialize hardware B. c - Confidence check C. e - Select channel D. g - S/H E. d - Digitize F. a - Wait G. b - Get data Alternative solution: A. c - Confidence check B. f - Initialize hardware

Ngày đăng: 02/07/2014, 14:20

TỪ KHÓA LIÊN QUAN