Power Electronics Semiconductor Devices Edited by Robert Perret This page intentionally left blank Power Electronics Semiconductor Devices This page intentionally left blank Power Electronics Semiconductor Devices Edited by Robert Perret First published in France in 2003 and 2005 by Hermes Science/Lavoisier entitled: Mise en œuvre des composants électroniques de puissance and Interrupteurs électroniques de puissance © LAVOISIER, 2003, 2005 First published in Great Britain and the United States in 2009 by ISTE Ltd and John Wiley & Sons, Inc Apart from any fair dealing for the purposes of research or private study, or criticism or review, as permitted under the Copyright, Designs and Patents Act 1988, this publication may only be reproduced, stored or transmitted, in any form or by any means, with the prior permission in writing of the publishers, or in the case of reprographic reproduction in accordance with the terms and licenses issued by the CLA Enquiries concerning reproduction outside these terms should be sent to the publishers at the undermentioned address: ISTE Ltd 27-37 St George’s Road London SW19 4EU UK John Wiley & Sons, Inc 111 River Street Hoboken, NJ 07030 USA www.iste.co.uk www.wiley.com © ISTE Ltd, 2009 The rights of Robert Perret to be identified as the author of this work have been asserted by him in accordance with the Copyright, Designs and Patents Act 1988 Library of Congress Cataloging-in-Publication Data Mise en œuvre des composants électroniques de puissance and Interrupteurs électroniques de puissance English Power electronics semiconductor devices / edited by Robert Perret p cm Includes bibliographical references and index ISBN 978-1-84821-064-6 Power electronics Power semiconductors Solid state electronics I Perret, Robert II Title TK7881.15.M5713 2009 621.381'044 dc22 2009001021 British Library Cataloguing-in-Publication Data A CIP record for this book is available from the British Library ISBN: 978-1-84821-064-6 Printed and bound in Great Britain by CPI Antony Rowe, Chippenham and Eastbourne Table of Contents Preface xi Chapter Power MOSFET Transistors Pierre ALOÏSI 1.1 Introduction 1.2 Power MOSFET technologies 1.2.1 Diffusion process 1.2.2 Physical and structural MOS parameters 1.2.3 Permanent sustaining current 1.3 Mechanism of power MOSFET operation 1.3.1 Basic principle 1.3.2 Electron injection 1.3.3 Static operation 1.3.4 Dynamic operation 1.4 Power MOSFET main characteristics 1.5 Switching cycle with an inductive load 1.5.1 Switch-on study 1.5.2.Switch-off study 1.6 Characteristic variations due to MOSFET temperature changes 1.7 Over-constrained operations 1.7.1 Overvoltage on the gate 1.7.2 Over-current 1.7.3 Avalanche sustaining 1.7.4 Use of the body diode 1.7.5 Safe operating areas 1.8 Future developments of the power MOSFET 1.9 References 5 20 23 23 23 25 30 34 36 36 38 44 46 46 47 49 50 51 53 55 vi Power Electronics Semiconductor Devices Chapter Insulated Gate Bipolar Transistors Pierre ALOÏSI 2.1 Introduction 2.2 IGBT technology 2.2.1 IGBT structure 2.2.2 Voltage and current characteristics 2.3 Operation technique 2.3.1 Basic principle 2.3.2 Continuous operation 2.3.3 Dynamic operation 2.4 Main IGBT characteristics 2.5 One cycle of hard switching on the inductive load 2.5.1 Switch-on study 2.5.2 Switch-off study 2.6 Soft switching study 2.6.1 Soft switching switch-on: ZVS (Zero Voltage Switching) 2.6.2 Soft switching switch-off: ZCS (Zero Current Switching) 2.7 Temperature operation 2.8 Over-constraint operations 2.8.1 Overvoltage 2.8.2 Over-current 2.8.3 Manufacturer’s specified safe operating areas 2.9 Future of IGBT 2.9.1 Silicon evolution 2.9.2 Saturation voltage improvements 2.10 IGBT and MOSFET drives and protections 2.10.1 Gate drive design 2.10.2 Gate drive circuits 2.10.3 MOSFET and IGBT protections 2.11 References 57 58 58 60 63 63 64 71 74 75 76 78 86 86 88 94 98 98 99 113 116 116 117 119 119 122 128 130 Chapter Series and Parallel Connections of MOS and IGBT Daniel CHATROUX , Dominique LAFORE and Jean-Luc SCHANEN 133 3.1 Introduction 3.2 Kinds of associations 3.2.1 Increase of power 3.2.2 Increasing performance 3.3 The study of associations: operation and parameter influence on imbalances in series and parallel 3.3.1 Analysis and characteristics for the study of associations 3.3.2 Static operation 57 133 134 134 135 135 135 137 Table of Contents 3.3.3 Dynamic operation: commutation 3.3.4 Transient operation 3.3.5 Technological parameters that influence imbalances 3.4 Solutions for design 3.4.1 Parallel association 3.4.2 Series associations 3.4.3 Matrix connection of components 3.5 References vii 140 149 151 152 152 161 179 182 Chapter Silicon Carbide Applications in Power Electronics Marie-Laure LOCATELLI and Dominique PLANSON 185 4.1 Introduction 4.2 Physical properties of silicon carbide 4.2.1 Structural features 4.2.2 Chemical, mechanical and thermal features 4.2.3 Electronic and thermal features 4.2.4 Other “candidates” as semiconductors of power 4.3 State of the art technology for silicon carbide power components 4.3.1 Substrates and thin layers of SiC 4.3.2 Technological steps for achieving power components 4.4 Applications of silicon carbide in power electronics 4.4.1 SiC components for high frequency power supplies 4.4.2 SiC components for switching systems under high voltage and high power 4.4.3 High energy SiC components for series protection systems 4.5 Conclusion 4.6 Acknowledgments 4.7 References 185 186 186 189 188 195 296 296 203 216 216 233 249 252 255 255 Chapter Capacitors for Power Electronics Abderrahmane BÉROUAL, Sophie GUILLEMET-FRITSCH and Thierry LEBEY 267 5.1 Introduction 5.2 The various components of the capacitor – description 5.2.1 The dielectric material 5.2.2 The armatures 5.2.3 Technology of capacitors 5.2.4 Connections 5.3 Stresses in a capacitor 5.3.1 Stresses related to the voltage magnitude 5.3.2 Losses and drift of capacity 5.3.3 Thermal stresses 267 268 269 269 270 271 272 272 273 274 Towards Integrated Power Electronics 539 The technology used in functional integration must therefore be composed of optimized stages, which are compatible with each other The technological process of producing a structure for an electrical function will be established from the association of all or part of the optimized steps of this sector This pipeline can be established around an “in-line” process with polysilicon grids in order to achieve basic power devices of the MOS/bipolar family (IGBT, MOS-Thyristor) and supplemented by specific technological steps achieving: – integrated elements on the rear side; – the possibility of introducing the four types of MOS; – the possibility of carrying out two types of P cells; – P– peripheries; – P+ cells; and – the introduction of specific technological steps The step sequence must be in accordance with the final heat balance of each step Figure 9.1 shows the technological step sequence of a flexible chain Technological steps Si ecth SiPoly deposit realizations Peripheral termination P- ionic implantation P+ ionic implantation short-circuit Redistribution Redistribution Contact - metal P+ backside Implantation Thyristor anode N+ implantation cathode Topside cathode backside Implantation N+ anti // diode cathode Si etch SiPoly deposit Integrated capacitor Gate oxide Redistribution Gate N implantation SiPoly deposit NPreformed channel = Basic step = Specific step P ionic implantation P1 -well P implantation P preformed channel P2-well implantation P2 -well P backside implantation Semi-transp anode Figure 9.41 Linking technological steps 540 Power Electronics Semiconductor Devices 9.4.2.1 A sequence example The main building blocks of this technology are made in the following way: implementation of P+ cells front and rear, producing the N+ cathode on the rear side, creating the N doped polysilicon grid, leading to P cells and N+ cathode aligned with the grid and production of preformed N and P channels The starting substrate is N-type silicon P+, P and N+ regions are made by ion implantation (boron for the P type and arsenic for the N+ type) The redistribution of the P+ regions (front and rear) and the N+ rear cathode is done, during the creation of the gate oxide made at 1,100°C, and during redistributions of P cells and N+ cathodes on the front side at 1,150°C The gate polysilicon is deposited by LPCVD from the decomposition of silane (SiH4) This is doped by N dissemination of phosphorus The preformed channels are achieved through the polysilicon by ion implantation of boron for P-type channels and phosphorus for N-type channels They are then redistributed at a temperature of 950°C Figure 9.42 shows the sequence of technological steps for the creation of the polysilicon grid, P and N+ cells Figure 9.42 Different sequences of technological steps Towards Integrated Power Electronics 541 9.4.2.2 Specific technological steps Increasing the complexity of the integrating power functions leads to the development of specific technological steps compatible with the flexible basic industry process These developments are attributed to progress made in recent years in the techniques used in the field of micro-technology The reactive ion etching (RIE), the deep etching of silicon by KOH or EIR, the chemical deposits under high pressure vapor (CVD) or low pressure (LPCVD), the deposits of thick resins, the electrochemical deposition, the thermo migration of aluminum, the report of layer and new techniques of assembling being the main examples The mastery of these techniques will achieve, over time, variable integrated capacities, micro-windings, micro-transformers, micro-converters, micro-coolers, etc The control and integration of these technologies into flexible technology will ultimately allow, the foundations of power structure design to incorporate active and passive elements, and also develop new features 9.5 Conclusion Power electronics was developed in parallel with microelectronics, although it has different objectives: increasing controlled powers, and increasing signal processing capacity Major technological advances have been made in the field of microelectronics, that over the past 30 years have had interesting consequences for power electronics In this chapter, we discussed examples of monolithic integration based on silicon technology (hybrid-type integration of circuits is also possible) Two methods stand out: one emphasizes functionality, while the other relies instead on optimizing the operation and related characteristics Initially, achievements using the Smart Power technology were made in the low voltage field, corresponding to automobile applications However, the main success of these techniques of integration comes from the conjoining of bipolar and MOS technologies, which has provided many power component prototypes, but also to the IGBT which is today the best component for great power The success of the IGBT is a great springboard for promoting the integration of power and it seems likely, as we showed in the last parts of this chapter, that we will evolve to silicon chips, incorporating many features, and achieving a self-contained device ready to use, reliable and compact (integration of auxiliary power supplies, controls, safeguards, cooling, etc.) 542 Power Electronics Semiconductor Devices It also seems that by adding the integration of some passive components, we can in the next decade, develop autonomous micro-systems performing the switching function for high power and packaging of electrical energy, which is so widespread 9.6 References [ALK 04] ALKAYAL M.F., CRÉBIER J.C., SCHAEFFER C., “A new monolithic adjustable overvoltage protection circuit”, IEEE IAS’04, 5-7, Seattle, USA, 2004 [ART 93] ARTHUR S.D., TEMPLE V.A.K, “Special 1400 volt N-MCT designed for surge applications”, Fifth European Conference on Power Electronics and Applications EPE, p 266-271, Brighton, United Kingdom, 1993 [AVE 02a] AVENAS Y., PERRET C., GILLOT C., BOUSSEY J., SCHAEFFER CH., “Integrated cooling devices in silicon technology”, The European Physical Journal of Applied Physics, vol 18(2), p 115-123, 2002 [AVE 02b] AVENAS Y, GILLOT C., BRICARD A., SCHAEFFER C., “On the use of flat heat pipes as thermal spreaders in power electronics cooling”, IEEE-PESC’02, Queensland, Australia, 23-27 June, 2002 [AVE 04] AVENAS Y, GILLOT C., SCHAEFFER C., Caloducs plats en silicium pour composants électroniques, Techniques de l’ingénieur, August 2004 [BAL 79] BALIGA B.J., “Enhancement- and depletion-mode vertical-channel MOS gated thyristors”, Electronic Letters, vol 15(20), 1979 [BAL 88] BALIGA B.J., CHANG H.R., “The MOS-Depletion mode thyristor: a new MOScontrolled bipolar power device”, IEEE Electron Device Lett., vol 9(8), p 411-413, 1988 [BAL 90] BALIGA B.J., “The MOS-gated emitter switched thyristor”, IEEE Electron Device Lett., vol EDL-11, p.75-77 1990 [BAU 91] BAUER F., HALDER E., HOFFMANN K., HADDON H., ROGGWILLER P., STOCKMEIER T., BRUGLER J., FICHTNER W., WESTERMANN M., MORET J.-M., VUILLEUMIER R., “Design aspects of MOS-controlled thyristor elements : technology, simulation and experimental results”, IEEE Transactions on Electron Devices, vol 38(7), 1991 [BOU 02] BOURENNANE A., BREIL M., SANCHEZ J.-L., AUSTIN P., JALADE J , “New MOStriac structures for specific mains applications”, European Power Electronics – Power Electronics Motion and Control Conference, Dubrovnik 2002 [BOU 04] BOURENNANE A., Etude et conception de structures bidirectionnelles en courant et en tension commandées par MOS, PhD Thesis, Paul Sabatier University, 2004 [BRE 96] BREIL M., SANCHEZ J.-L., BERRIANE R., RIOS J., “Etude des performances louverture de dispositifs MOS-Thyristors auto-amorỗables et blocables, Electronique de Puissance du Futur EPF’96, p 51-56, Grenoble, France, 16-18 December 1996 Towards Integrated Power Electronics 543 [BRE 97] BREIL M., SANCHEZ J.-L., “Analytical Model for the optimization of the turn-off performance of a self firing MOS-Thyristor device”, Seventh European Conference on Power Electronics and Applications: EPE’97, p 3.042-3.048, Trondheim, Norway, 8-10 September, 1997 [BRE 98a] BREIL M., Etude d’associations MOS-thyristor autoamorỗables et blocables Exemple dintộgration de la fonction thyristor dual, PhD Thesis, l’Institut National des Sciences Appliquées, Toulouse, 1998 [BRE 98b] BREIL M., SANCHEZ J.-L., AUSTIN P., ROUSSET B., ROSSEL F., LAUR J.-P., “Conception et réalisation d’associations MOS-Thyristor blocables basées sur une filière technologique ‘quatre couches’”, Electronique de Puissance du Futur EPF’98, Belfort, p 21-27, 16-18 December, 1998 [BRE 98c] BREIL M., SANCHEZ J.-L., AUSTIN P., LAUR J.-P., “Turn-off performance comparison of self-firing MOS-thyristor devices for ZVS applications”, Bipolar/BiCMOS Circuits and Technology Meeting, BCTM’98, p 53-56, Minneapolis, USA, 27-29 September, 1998 [BRE 99] BREIL M., SANCHEZ J.-L., AUSTIN P., LAUR J.-P., “A new self-firing MOS-thyristor device: optimization of the turn-off performance and experimental results”, Microelectronics Journal (Special Issue on Power Devices and ICs), vol 30, no 6, p 569-610, 1999 [BRE 01] BREIL M., MARMOUGET M., SANCHEZ J.-L., AUSTIN P., BONNET G., “Specific design methodology dedicated to the development of new power functions based on the concept of functional integration”, Mixed Design of Integrated Circuits and Systems, MIXDES 2001, p 225-230, Zakopane, Poland, 21-23 June 2001 [CHA 95a] CHARITAT G., SANCHEZ J.-L., ROSSEL P., TRANDUC H., BAFLEUR M., “Power integrations : overview and future”, Mix VLSI’95, Mixed Design of VLSI Circuits, p 4759, Krakow, Poland, 1995 [CHA 95b] CHARITAT G., SANCHEZ J.-L., ROSSEL P., TRANDUC H, BAFLEUR M., “Power integration: overview and future”, Mix VLSI’95, Mixed Design of VLSI Circuits, Krakow, Poland, p 47-59, 1995 [CHE 88] CHERON Y., La commutation douce dans la conversion statique de l’énergie électrique, Thesis, INPT, 1988 [DAR 86] DAREES D., Contribution l’étude d’associations monolithiques de composants MOS et bipolaires: le thyristor gâchette isolée, PhD Thesis, INSA Toulouse, 1986 [FOC 78] FOCH H., MAZRTY P., ROUX J., “Utilisation des règles de dualité pour la conception de convertisseurs transistors”, in Le transistor de puissance dans la conversion de l’énergie, p 293-323, Thomson, Aix en Provence, 1978 [GEN 64a] GENTRY F.E., SCACE R.I, FLOWERS J.K., “Bidirectional Triode P-N-P-N Switches”, Proc of the IEEE, p 355-369, 1964 [GEN 64b] GENTRY F.E., GUTZWILLER, HOLLONYAK, VON ZASTROW, Semiconductor Controlled Rectifiers: Principles and Applications of P-N-P-N Devices, Prentice-Hall Inc., NJ, USA, 1964 544 Power Electronics Semiconductor Devices [JAE 87] JAECKLIN A., “A N FET-Driving power thyristor”, IEEE Transactions on Electron Devices, vol ED-34(5), 1987 [LAU 99] LAUR J.-P., SANCHEZ J.-L., AUSTIN P., JALADE J., MARMOUGET M., BREIL M., ROY M., “New integrated device for units protection: circuit-breaker structures”, 8th European Conference on Power Electronics and Applications, EPE’99, Lausanne, Switzerland, 7-9 September 1999 [LIL 92] LILJA K., STOCKMEIER T., “The FIBS, a new high voltage BiMOS switch”, ISPSD’92, p 261-265, Tokyo, 1992 [MAR 99] MARMOUGET M., SANCHEZ J.-L., AUSTIN P., BREIL M., LAUR J.-P, “A new specific design methodology for functional integration”, International Semiconductor Conference, CAS’99, p 47-50, Sinaia, Romania, 5-9 October 1999 [MAR 00] MARMOUGET M., Contribution au développement d’outils d’aide la conception de dispositifs de puissance basé sur le mode de l’intégration fonctionnelle, PhD Thesis, Paul Sabatier University, 2000 [MIT 04a] MITOVA R., CRÉBIER J.-C., AUBARD L., SCHAEFFER C., “Gate conductor supply of power switches without galvanic insulation”, IEEE IAS’04, Seattle, USA, 5-7 October 2004 [MIT 04b] MITOVA R., CRÉBIER J.-C., AUBARD L., SCHAEFFER C., “Integrated conductor supply for power MOSFET based on vertical JFET”, ISPS’04, Prague, Hungary, 30 August-3 September, 2004 [MIT 04c] MITOVA R., ALKAYAL M.F., CRÉBIER J.-C., AUBARD L., SCHAEFFER C., “Intégration d’un système de l’autoalimentation de la commande rapprochée d’un interrupteur de puissance”, EPF’04, Toulouse, France, September 2004 [NAD 91] NADAKUMAR M., BALIGA B.-J., SHEKAR, TANDON S., REISMAN A., “The base resistance controlled thyristor (BRT), a new MOS-gated power thyristor”, IEEE Electron Device Letter, p 138-141, 1991 [PEZ 95a] PEZZANI R., QUOIRIN J-B., “Functional integration of power devices, a new approach”, European Power Electronics (EPE’95), p 2219-2223, Seville, Spain, 1995 [PEZ 95b] PEZZANI R., BERNIER E., Programmable protection circuit and its monolithic manufacturing, patent number: RE 35 854, 1995 [PEZ 96] PEZZANI R., Monolithic semiconductor switch and supply circuit component, patent number: 883 401, 1996 [PEZ 97a] PEZZANI R., BERNIER E., BALLON C., “A methodology for the functional power integration Example, the evolution of the solid state protection in the Telecom area”, European Power Electronics (EPE’97), p 1296-1301, Trondheim, Norway, 1997 [PEZ 97b] PEZZANI R., Three-state monolithic static switch, Patent number : 883 500, 1997 [PEZ 97c] PEZZANI R., Thyristor control switch for a bidirectional motor, Patent number : 889 374, 1997 Towards Integrated Power Electronics 545 [RUM 85] RUMENIK V., “Power devices are in the chip”, IEEE Spectrum, p 42-48, 1985 [SAN 90] SANCHEZ J.-L., LETURCQ P., “Thyristor gâchette isolée planar haute tension (1400 volts) : un exemple d’interrupteur intégré de puissance”, EPF’90, Toulouse, 1990 [SAN 97] SANCHEZ J.-L., AUSTIN P., BERRIANE R., MARMOUGET M., “Trends in design and technology for new power devices based on functional integration”, European Power Electronics (EPE’97), p 1302-1307, Trondheim, Norway, 1997 [SAN 99a] SANCHEZ J.-L., “State of the art and trends in power integration”, MSM, p 20-29, Puerto Rico, USA, 1999 [SAN 99b] SANCHEZ J.-L., “State of the art and trends in power electronics”, MSM, p 20-29, Porto Rico, USA, 1999 [SAN 99c] SANCHEZ J.-L., BREIL M., AUSTIN P., LAUR J.-P., JALADE J., ROUSSET B., FOCH H., “A new high voltage integrated switch: the ‘thyristor dual’ function”, International Symposium on Power Semiconductor Devices and ICs, ISPSD’99, p 157-160, Toronto, Canada, 26-28 May 1999 [SAN 99d] SANCHEZ J.-L., BREIL M., LAUR J.-P., AUSTIN P., JALADE J., ROSSEL F., FOCH H., “Functional integration for new power switches design: example of the ‘thyristor dual’ function”, 8th European Conference on Power Electronics and Applications, EPE’99, Lausanne, Switzerland, 7-9 September 1999 [SAN 99e] SANCHEZ J.-L., LAUR J.-P., M Marmouget, AUSTIN P., JALADE J., BREIL M, Roy M., “A new circuit-breaker integrated device for protection applications”, International Symposium on Power Semiconductor Devices and ICs, ISPSD’99, p 315318, Toronto, Canada, 26-28 May 1999 [TEM 86] TEMPLE V.A.K., “MOS controlled thyristor – a new class of power devices”, IEEE Transactions on Electron Devices, vol ED-33(10), 1986 This page intentionally left blank List of Authors Pierre ALOÏSI Motorola Semiconductors Toulouse France Patrick AUSTIN ISGE, LAAS-CNRS Toulouse France Abderrahmane BÉROUAL Ecole Centrale de Lyon Ampère Laboratory Lyon France Marie BREIL Integration of Systems for Energy Management, LAAS-CNRS Toulouse France Daniel CHATROUX CEA Grenoble France Edith CLAVEL University Joseph Fourier Grenoble France 548 Power Electronics Semiconductor Devices Franỗois COSTA SATIE – ENS Cachan University of Paris XII France Cyrille GAUTIER SATIE – ENS Cachan University of Paris XII France Arnaud GUENA SATIE – ENS Cachan University of Paris XII France Sophie GUILLEMET-FRITSCH French National Scientific Research Center (CNRS) CIRIMAT, Paul Sabatier University Toulouse France Dominique LAFORE Ecole Centrale Marseille Marseille France Thierry LEBEY French National Scientific Research Council (CNRS) LAPLACE Laboratory Toulouse France Marie-Laure LOCATELLI French National Scientific Research Council (CNRS) LAPLACE Laboratory Toulouse France Corinne PERRET CNRS/LTM Grenoble France List of Authors Robert PERRET Grenoble INP France Dominique PLANSON Ecole Centrale de Lyon Ampère Laboratory Lyon France James ROUDET Grenoble Laboratory of Electrical Engineering University of Grenoble France Jean-Luc SCHANEN Grenoble INP-ENSIEG University of Grenoble France Jean-Louis SANCHEZ LAAS-CNRS Toulouse France 549 This page intentionally left blank Index A AC switch, 505, 506 active clamping, 172, 175 avalanche, 14, 15, 17, 51, 52, 55 B bipolar devices, 128 bipolar diodes, 234 breakdown electric field, 189, 190, 192, 212 voltage, 190, 191, 192, 201, 219 bus bars, 318, 319, 323, 327, 354, 362, 363, 397 C capacitive coupling, 344, 349 effects, 31 capacitors, 267, 268, 270, 271, 272, 276, 280, 281, 283, 284, 288, 289, 290, 291, 292, 293, 294, 295, 300, 301, 302, 303, 304, 310, 312, 313, 314, 315, 316 ceramic, 267, 312 carrier lifetime, 98 cell, 5, 10 channel inversion, 24, 26 resistance, 9, 10, 11, 21, 26, 46, 56 common mode, 330, 351 commutation cell, 403 modules, 137 speed, 144, 148, 152 conducted disturbances, 351, 352, 353 convection, 446, 447, 450, 452, 454, 456, 461, 463, 473, 475, 476, 488 cooling, 433, 442, 445, 446, 447, 448, 449, 450, 451, 455, 463, 485, 487, 490, 494 current density, 2, 21, 23, 49, 54 critical density, 49 short circuit current, 92 theoretical density, 49 D derating, 142, 157, 174 desaturated operation, 26 design method and technologies, 535 diamonds, 196 dielectric, 267, 268, 269, 270, 272, 273, 274, 275, 276, 277, 278, 280, 281, 283, 285, 294, 295, 300, 301, 302, 303, 304, 305, 310, 315 drain, 2, 5, 6, 7, 11, 14, 16, 19, 21, 24, 27, 28, 29, 32, 33, 35, 36, 38, 39, 40, 49, 52, 57, 58 drift zone, 3, 8, 12, 16, 18, 23, 24, 27, 28, 32, 33, 46, 57 dual thyristor, 507, 515, 516, 517 dynamic operation, 31 552 Power Electronics Semiconductor Devices E electrodes, 301 electrodynamic efforts, 391, 394, 397, 398, 399 electron injection, 24, 26 EMC, 318, 351, 352, 353, 400 etching, 196, 204, 205, 209, 210, 213, 231, 232, 235, 245, 263 F factor of merit, 202 ferroelectric materials, 295, 305 Flotherm, 476, 478 flow of heat, 443, 444, 450, 452, 454, 455, 459, 463, 464, 465, 468, 477 fluid, 456, 458, 478, 496 Flux 3D, 473, 475, 476, 477 functional integration, 504, 507, 516, 520 G gallium arsenide, 195 gallium nitride, 234, 254 gate, 3, 4, 5, 6, 8, 12, 13, 18, 19, 21, 24, 26, 27, 28, 31, 33, 35, 36, 37, 38, 39, 40, 41, 42, 48, 49, 56, 58 drive, 57, 73, 76, 79, 83, 88, 91, 114, 123, 126 oxide, 6, 13, 18, 26 grid drive circuit, 157, 165 resistance, 408, 409, 411, 413, 414, 415, 417, 418, 425, 426, 427, 431 I IEGT, 122 IGBT, 57, 58, 59, 60, 61, 62, 63, 64, 65, 69, 71, 72, 73, 74, 75, 76, 77, 79, 85137, 317, 319, 364, 365, 390, 391, 401, 410 impedance bridge, 365 IMS, 318, 319, 320, 321, 351, 353, 354, 360, 361 InCa3D, 320, 322, 329, 365, 366, 367, 368, 369, 370, 384, 400 inductance partial inductance, 325, 354, 355, 356, 357, 361, 362 switching mesh, of the, 408, 427 wiring inductance, 154, 157, 158 inductive coupling, 343 injection coefficient, 61, 68, 69, 70, 71, 83, 116 input capacitance, 12, 13, 34 integration, 449, 496, 497, 499, 500, 501, 502, 503, 504, 505, 507, 509, 510, 511, 512, 513, 514, 515, 517, 518, 519, 520, 521, 525, 527, 528, 529, 530, 531, 532, 535, 537, 538, 539, 541, 542, 543, 544, 545 interaction power-command, 407 interconnection, 318, 319, 321, 353, 354, 363, 368, 400 ion implantation, 204, 206, 210, 216, 235, 260 J, L, M JFET, 10, 56 LAASTHERM, 472 losses, 22 majority carriers, matrix connection, 138, 178 MESFET, 231, 232, 233, 256, 258, 263, 264 metallization, 196, 213, 214, 216 Miller voltage, 38, 40 mixed junction diodes, 234 mobilities, 193 modeling and use of capacitors, 283 connections, 317 heat exchanges, 461 modulation, 59, 67, 68, 71 monocrystal growth, 197 monolithic integration, 499, 504 multiplication factor M, 61 O OFF state, 26, 29 ON state, 26 optical commands, 165 output capacitance, 34 over-constrained operations, 48 oxidation, 209 Index P, R parallel connection, 128, 138, 139, 140, 141, 144, 154, 156, 158, 159, 165, 177, 183, 184, 185 parasitic capacitances, 156, 160, 169, 170, 178, 410, 428, 429 transistor, 59 passive clamping, 172 PEEC, 320, 323, 324, 325, 332, 338, 368, 371, 376, 377, 383, 384, 385, 391, 400 permittivity, 269, 270, 275, 294, 295, 296, 300, 303, 304, 305, 307, 314 printed wiring, 330, 350, 351, 353 protections, 123, 133 recombination rate, 65, 68, 83, 98 resistance RDson, 23 S safe operating areas, 54, 55 saturated zone, 36 saturation speed, 189, 194 security areas, 111 series connection, 90, 133, 138, 141, 143, 144, 146, 156, 165, 166, 167, 168, 169, 170, 171, 172, 177, 178, 179, 181, 183, 184, 185, 187 SiC (silicon carbide), 185-268 MOSFET, 225, 255 Schottky diode, 221-225, 228, 255 SiC-3C, 203 SiC-4H, 187, 188, 196, 211, 245 SiC-6H, 187, 188, 211, 214, 215, 216 silicon critical field, 14, 20 SIT (static induction transistor), 231, 232, 233 skin effect, 322, 324, 328, 330, 344, 349, 351, 357 snubbers, 267, 283, 294 source, 3, 5, 6, 7, 8, 10, 11, 13, 14, 18, 19, 21, 23, 24, 26, 27, 29, 31, 33, 37, 48 553 static operation, 26 stored charges, 63, 67, 68, 83, 91, 98, 115, 120, 123 sustaining voltage, 19, 20, 55, 57 peripheral sustaining voltage, 20 switch -off, 39, 40, 41, 42, 44, 53, 57 -on, 38, 39, 42, 43 switching hard switching, 73, 76, 77, 86, 87, 92, 94, 97, 101, 112 losses, 422, 428 soft switching, 88, 89, 90, 91 T tan d, 274, 275 temperature, 4, 13, 22, 23, 30, 46, 47, 48, 50, 51, 52, 54, 55 coefficient, 98, 99, 100 distribution, 442, 490 thermal conductivity, 189, 195, 198, 213, 251 resistance, 445, 452, 454, 455, 456, 475, 487, 492 spreading layer, 22 thermography, 487, 488, 489, 490 thermo-sensible parameter, 491 thermo-sensitive parameter, 492, 493 thin wire method, 331, 335, 336, 339, 342, 343, 344, 348 track, 333, 334, 335, 336, 337, 339, 341, 342, 343, 344, 347, 348, 349, 350, 360 transfer capacitance, 34 U, V, Z unipolar devices, 4, 24 vertical structure, 2, 3, ZCS (zero current switching), 90, 91, 93, 95, 96, 97, 101 ZVS (zero voltage switching), 88, 89, 90, 101, 136 .. .Power Electronics Semiconductor Devices Edited by Robert Perret This page intentionally left blank Power Electronics Semiconductor Devices This page intentionally left blank Power Electronics. .. puissance English Power electronics semiconductor devices / edited by Robert Perret p cm Includes bibliographical references and index ISBN 978-1-84821-064-6 Power electronics Power semiconductors... current versus VDS 30 Power Electronics Semiconductor Devices 1.3.4 Dynamic operation The dynamic operation’s main function is to commutate the power electronics system Power MOSFETS are much