www.elsolucionario.net www.elsolucionario.net jae80458˙FM˙i-xxvi January 22, 2010 15:50 www.elsolucionario.net MICROELECTRONIC CIRCUIT DESIGN i www.elsolucionario.net Jaeger-1820037 www.elsolucionario.net www.elsolucionario.net This page intentionally left blank jae80458˙FM˙i-xxvi January 22, 2010 21:9 www.elsolucionario.net Fourth Edition MICROELECTRONIC CIRCUIT DESIGN Richard C Jaeger Auburn University Travis N Blalock University of Virginia TM iii www.elsolucionario.net Jaeger-1820037 jae80458˙FM˙i-xxvi January 22, 2010 15:50 www.elsolucionario.net TM MICROELECTRONIC CIRCUIT DESIGN, FOURTH EDITION Published by McGraw-Hill, a business unit of The McGraw-Hill Companies, Inc., 1221 Avenue of the Americas, New York, NY 10020 Copyright c 2011 by The McGraw-Hill Companies, Inc All rights reserved Previous editions c 2008, 2004, and 1997 No part of this publication may be reproduced or distributed in any form or by any means, or stored in a database or retrieval system, without the prior written consent of The McGraw-Hill Companies, Inc., including, but not limited to, in any network or other electronic storage or transmission, or broadcast for distance learning Some ancillaries, including electronic and print components, may not be available to customers outside the United States This book is printed on recycled, acid-free paper containing 10% postconsumer waste WDQ/WDQ ISBN 978-0-07-338045-2 MHID 0-07-338045-8 Vice President & Editor-in-Chief: Marty Lange Vice President, EDP / Central Publishing Services: Kimberly Meriwether-David Global Publisher: Raghothaman Srinivasan Director of Development: Kristine Tibbetts Developmental Editor: Darlene M Schueller Senior Sponsoring Editor: Peter E Massar Senior Marketing Manager: Curt Reynolds Senior Project Manager: Jane Mohr Senior Production Supervisor: Kara Kudronowicz Senior Media Project Manager: Sandra M Schnee Design Coordinator: Brenda A Rolwes Cover Designer: Studio Montage, St Louis, Missouri Senior Photo Research Coordinator: John C Leland Photo Research: LouAnn K Wilson Compositor: MPS Limited, A Macmillan Company Typeface: 10/12 Times Roman Printer: Worldcolor All credits appearing on page or at the end of the book are considered to be an extension of the copyright page Library of Congress Cataloging-in-Publication Data Jaeger, Richard C Microelectronic circuit design / Richard C Jaeger, Travis N Blalock — 4th ed p cm ISBN 978-0-07-338045-2 Integrated circuits—Design and construction Semiconductors—Design and construction Electronic circuit design I Blalock, Travis N II Title TK7874.J333 2010 621.3815—dc22 2009049847 www.mhhe.com iv www.elsolucionario.net Jaeger-1820037 jae80458˙FM˙i-xxvi January 22, 2010 15:50 www.elsolucionario.net TO To Joan, my loving wife and partner —R i c h a r d C J a e g e r In memory of my father, Professor Theron Vaughn Blalock, an inspiration to me and to the countless students whom he mentored both in electronic design and in life —T r a v i s N B l a l o c k v www.elsolucionario.net Jaeger-1820037 Jaeger-1820037 jae80458˙FM˙i-xxvi January 22, 2010 15:50 www.elsolucionario.net B RI E F C O NTEN T S PART ONE Solid State Electronics and Devices Introduction to Electronics Solid-State Electronics 42 Solid-State Diodes and Diode Circuits 74 Field-Effect Transistors 145 Bipolar Junction Transistors 217 Operational Amplifier Applications 697 Small-Signal Modeling and Linear Amplification 786 Single-Transistor Amplifiers 857 Differential Amplifiers and Operational Amplifier Design 968 16 Analog Integrated Circuit Design Techniques 1046 17 Amplifier Frequency Response 1128 18 Transistor Feedback Amplifiers and Oscillators 1228 12 13 14 15 APPENDIXES PART TWO Digital Electronics Introduction to Digital Electronics 287 Complementary MOS (CMOS) Logic Design 367 MOS Memory and Storage Circuits 416 Bipolar Logic Circuits 460 PART THREE Analog Electronics 10 Analog Systems and Ideal Operational Amplifiers 529 11 Nonideal Operational Amplifiers and Feedback Amplifier Stability 600 vi A Standard Discrete Component Values 1300 B Solid-State Device Models and SPICE Simulation Parameters 1303 C Two-Port Review 1310 Index 1313 www.elsolucionario.net Preface xx jae80458˙FM˙i-xxvi January 22, 2010 15:50 www.elsolucionario.net C O NTE NTS Preface xx CHAPTER SOLID-STATE ELECTRONICS 42 PART ONE SOLID STATE ELECTRONIC AND DEVICES 2.1 2.2 2.3 CHAPTER INTRODUCTION TO ELECTRONICS 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 A Brief History of Electronics: From Vacuum Tubes to Giga-Scale Integration Classification of Electronic Signals 1.2.1 Digital Signals 1.2.2 Analog Signals 1.2.3 A/D and D/A Converters—Bridging the Analog and Digital Domains 10 Notational Conventions 12 Problem-Solving Approach 13 Important Concepts from Circuit Theory 15 1.5.1 Voltage and Current Division 15 Th´evenin and Norton Circuit 1.5.2 Representations 16 Frequency Spectrum of Electronic Signals 21 Amplifiers 22 1.7.1 Ideal Operational Amplifiers 23 1.7.2 Amplifier Frequency Response 25 Element Variations in Circuit Design 26 1.8.1 Mathematical Modeling of Tolerances 26 1.8.2 Worst-Case Analysis 27 1.8.3 Monte Carlo Analysis 29 1.8.4 Temperature Coefficients 32 Numeric Precision 34 Summary 34 Key Terms 35 References 36 Additional Reading 36 Problems 37 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 Solid-State Electronic Materials 44 Covalent Bond Model 45 Drift Currents and Mobility in Semiconductors 48 2.3.1 Drift Currents 48 2.3.2 Mobility 49 2.3.3 Velocity Saturation 49 Resistivity of Intrinsic Silicon 50 Impurities in Semiconductors 51 2.5.1 Donor Impurities in Silicon 52 2.5.2 Acceptor Impurities in Silicon 52 Electron and Hole Concentrations in Doped Semiconductors 52 2.6.1 n-Type Material (N D >N A ) 53 2.6.2 p-Type Material (N A >N D ) 54 Mobility and Resistivity in Doped Semiconductors 55 Diffusion Currents 59 Total Current 60 Energy Band Model 61 2.10.1 Electron–Hole Pair Generation in an Intrinsic Semiconductor 61 2.10.2 Energy Band Model for a Doped Semiconductor 62 2.10.3 Compensated Semiconductors 62 Overview of Integrated Circuit Fabrication 64 Summary 67 Key Terms 68 Reference 69 Additional Reading 69 Important Equations 69 Problems 70 www.elsolucionario.net Jaeger-1820037 CHAPTER SOLID-STATE DIODES AND DIODE CIRCUITS 74 3.1 The pn Junction Diode 75 3.1.1 pn Junction Electrostatics 75 3.1.2 Internal Diode Currents 79 vii Jaeger-1820037 jae80458˙FM˙i-xxvi January 22, 2010 15:50 www.elsolucionario.net viii 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 The i-v Characteristics of the Diode 80 The Diode Equation: A Mathematical Model for the Diode 82 Diode Characteristics Under Reverse, Zero, and Forward Bias 85 3.4.1 Reverse Bias 85 3.4.2 Zero Bias 85 3.4.3 Forward Bias 86 Diode Temperature Coefficient 89 Diodes Under Reverse Bias 89 3.6.1 Saturation Current in Real Diodes 90 3.6.2 Reverse Breakdown 91 3.6.3 Diode Model for the Breakdown Region 92 pn Junction Capacitance 92 3.7.1 Reverse Bias 92 3.7.2 Forward Bias 93 Schottky Barrier Diode 93 Diode SPICE Model and Layout 94 Diode Circuit Analysis 96 3.10.1 Load-Line Analysis 96 3.10.2 Analysis Using the Mathematical Model for the Diode 98 3.10.3 The Ideal Diode Model 102 3.10.4 Constant Voltage Drop Model 104 3.10.5 Model Comparison and Discussion 105 Multiple-Diode Circuits 106 Analysis of Diodes Operating in the Breakdown Region 109 3.12.1 Load-Line Analysis 109 3.12.2 Analysis with the Piecewise Linear Model 109 3.12.3 Voltage Regulation 110 3.12.4 Analysis Including Zener Resistance 111 3.12.5 Line and Load Regulation 112 Half-Wave Rectifier Circuits 113 3.13.1 Half-Wave Rectifier with Resistor Load 113 3.13.2 Rectifier Filter Capacitor 114 3.13.3 Half-Wave Rectifier with RC Load 115 3.13.4 Ripple Voltage and Conduction Interval 116 3.13.5 Diode Current 118 3.13.6 Surge Current 120 3.13.7 Peak-Inverse-Voltage (PIV) Rating 120 3.13.8 Diode Power Dissipation 120 3.13.9 Half-Wave Rectifier with Negative Output Voltage 121 3.14 3.15 3.16 3.17 3.18 Full-Wave Rectifier Circuits 123 3.14.1 Full-Wave Rectifier with Negative Output Voltage 124 Full-Wave Bridge Rectification 125 Rectifier Comparison and Design Tradeoffs 125 Dynamic Switching Behavior of the Diode 129 Photo Diodes, Solar Cells, and Light-Emitting Diodes 130 3.18.1 Photo Diodes and Photodetectors 130 3.18.2 Power Generation from Solar Cells 131 3.18.3 Light-Emitting Diodes (LEDs) 132 Summary 133 Key Terms 134 Reference 135 Additional Reading 135 Problems 135 CHAPTER FIELD-EFFECT TRANSISTORS 145 4.1 4.2 4.3 4.4 4.5 4.6 Characteristics of the MOS Capacitor 146 4.1.1 Accumulation Region 147 4.1.2 Depletion Region 148 4.1.3 Inversion Region 148 The NMOS Transistor 148 Qualitative i -v Behavior of the 4.2.1 NMOS Transistor 149 4.2.2 Triode Region Characteristics of the NMOS Transistor 150 4.2.3 On Resistance 153 4.2.4 Saturation of the i -v Characteristics 154 4.2.5 Mathematical Model in the Saturation (Pinch-Off) Region 155 4.2.6 Transconductance 157 4.2.7 Channel-Length Modulation 157 4.2.8 Transfer Characteristics and Depletion-Mode MOSFETS 158 4.2.9 Body Effect or Substrate Sensitivity 159 PMOS Transistors 161 MOSFET Circuit Symbols 163 Capacitances in MOS Transistors 165 4.5.1 NMOS Transistor Capacitances in the Triode Region 165 4.5.2 Capacitances in the Saturation Region 166 4.5.3 Capacitances in Cutoff 166 MOSFET Modeling in SPICE 167 www.elsolucionario.net Contents www.elsolucionario.net Index Inverting amplifier—Cont summary table, 614, 615 transformer-coupled, 1014 voltage gain, 553 Inverting amplifier circuit, 553, 554, 604 Inverting input, 549 Ion implantation, 64, 158 iPhone, iPod, 20, 536 J j, 48 JFET See Junction field-effect transistor (JFET) Johnson noise, 823 Junction breakdown voltage, 246 Junction field-effect transistor (JFET), 190–200 bias, 191, 198–200 C-S amplifiers, 833–837 capacitance, 196 circuit symbols, 195 drain-source bias, 191–192 input/output resistance, 838 n-channel JFET, 190, 193–195, 196 p-channel JFET, 195, 196 small-signal model, 820–821 small-signal parameters, 822 SPICE, 197, 1306, 1307 voltage gain, 838 Junction potential, 77 Just active region, 231 K KBQ, 255 KCL, 15 Kilby, Jack St Clair, 5, 42 Kilby integrated circuit, 42 Kirchhoff’s current law (KCL), 15 Kirchhoff’s voltage law (KVL), 15 Knee current parameters, 255 Kodak KAF-1401E CCD image sensor, 63 KVL, 15 L LA, 988–989 Lab-on-a-chip, 66 Laptop computer touchpad, 543 Large-scale integration (LSI), Latch, 419 Latchup, 401–402 LC oscillator, 1277, 1280 Least significant bit (LSB), 10, 564, 734 LED, 132–133 Level shift, 996 Level shifters, 465 Light-emitting diode (LED), 132–133 Lillienfeld patent, 146 Limiting amplifier (LA), 988–989 Line regulation, 112 Linear amplification See Small-signal modeling and linear amplification Linear amplifier, 257, 531 Linear load inverter design, 315 Linear load inverter VTC, 315 Linear region, 150n, 152, 153 Linearity error, 735, 736 Little Ghost Nebula, 63 LO, 1205 Load line, 96 Load-line analysis, 96–98, 109, 181 Load-line visualization, 300, 491 Load regulation, 112 Load resistor problems, 305–306 Local oscillator, 530–531 Local oscillator (LO), 1205 Logic expression simplification, 297 Logic gate design goals, 292–293 Logic inverter, 257 Logic voltage levels, 291 Loop gain, 602, 604, 638–641, 1230 Loop transmission, 602, 604, 1230 Low-frequency poles and zeros (C-S amplifier), 1134–1139 Low-frequency response, 1130 Low logic level at the gate output, 289 Low-pass amplifier, 25, 26, 568–572 Low-pass filter, 578–581, 714–727 Low-pass filter symbol, 569, 714 Low-power Schottky TTL, 507 Low-power TTL, 505 Lower –3-dB frequency, 573 Lower-cutoff frequency See also ωL amplifier frequency response, 1129 C-E amplifier, 1143–1144 capacitor, 924–925 high-pass amplifier, 572 multistage amplifier, 948 Lower half-power point, 573 LSB, 10, 564, 734 LSI, M M S , 298 Maclaurin’s series, 798, 972 Macro model, 669, 670, 709–711 Magellan optical navigation chip, 713 Magnitude, 568 Magnitude scaling, 727 Majority carrier, 53 Masks, 64, 173, 174 Master-slave D flip-flop, 450–451 Match transistors, 1047 Matched device, 1048 Matched transistor, 969 Mathematic modeling diode, 82, 98–100 NMOS transistor, 155–156 static behavior of current switch, 462 temperature coefficients, 32 tolerances, 26–27 Mathematical model summary See Summary tables MATLAB See also SPICE Bode plot, 679, 680 diode, 100–101 Nyquist plot, 672, 678 poles and zeros/C-S amplifier, 1139 rand, 29 transfer function, 1132 Maximally flat magnitude, 714 MDS, 1204 Medical ultrasound imaging, 1025–1026 Medium-scale integration (MSI), MegaPixel CMOS active-pixel image sensor, 164 Memory See MOS memory and storage circuits MEMS-based computer projector, 350–351 MEMS frequency selective resonator, 1228 MEMS oscillator, 1286–1287 Merged transistor structure, 505 Mesh analysis, 15 Metal mask, 174 Metal-oxide-semiconductor field-effect transistor See MOSFET Metal-semiconductor Schottky diode, 95 Metallurgical junction, 76 MI-MV13 image sensor, 164 Micro-mirror pixel structure, 350 Microelectromechanical systems (MEMS) devices, 350 Micron Technology, 164 www.elsolucionario.net 1324 www.elsolucionario.net Index MOS transistor scaling, 169 circuit and power densities, 170 cutoff frequency, 171 drain current, 169 gate capacitance, 169 high field limitations, 171 PDP, 170 subthreshold conduction, 172 MOS Widlar source, 1063 MOS Wilson current source, 1064 MOSFET, 146 See also Field-effect transistor (FET) body effect, 818–819 four-resistor bias circuits, 859 input/output resistance, 838 intrinsic voltage gain, 817 small-signal model, 815–817, 864 small-signal parameters, 817, 822, 864 SPICE, 1303 voltage gain, 838 MOSFET amplifier, 789–790, 795–796 MOSFET circuit symbols, 163–165 MOSFET common-source amplifier, 789 MOSFET current source, 1023–1024 MOSFET differential amplifier analysis, 984–985 MOSFET model parameters, 1153–1154 MOSFET noise model, 824 MOSFET op amp compensation, 1273–1277 Most significant bit (MSB), 11, 564, 734 MR, 1050–1055 MSB, 11, 564, 734 MSI, Multiple-diode circuits, 106–108 Multiple tuned circuits, 1201 Multistage ac-coupled amplifiers, 939–948 current and power gain, 944 input signal range, 945 lower cutoff frequency, 948 output resistance, 943–944 signal source voltage gain, 941–943 three-stage amplifier, 939–941, 945–948 voltage gain, 941–943 Multistage amplifier cascade, 703 Multistage amplifier frequency response, 1187–1193 Multivibrator, 765–770 μ, 49 A709 amplifier, 544 A709 operational amplifier die photograph, 697 A741 die photograph, 600, 787 A741 op amp, 1097–1110 bias circuitry, 1098, 1101–1103 input stage, 1099–1107 output resistance, 1109 output stage, 1107–1109 overall circuit operation, 1097–1098 Q-point analysis, 1099–1101 short-circuit protection, 1109 summary table, 1110 voltage gain, 1103–1107 N nbo , 246 ni , 46 n-bit weighted-resistor DAC, 737 n-channel JFET, 1306 n-channel MOS See NMOS transistor n-type material, 53 NAND decoder, 440–442 NAND gate BiCMOS, 513 CMOS, 387–388 NMOS, 326 NMOS depletion-mode technology, 327–328 PMOS, 352 truth table, 295 TTL, 505, 506 NAND gate symbol, 296 NAND RS flip-flop, 450 Narrow-band (high-Q) tuned amplifier, 1129 NCO, 759 Negative feedback, 553, 601, 1229 Negative G M oscillator, 1281–1282 –1 point, 671 Network of inverters, 298 Neutralization, 1201 NGC604, 63 NGC2359, 63 NGC6369, 63 Nguyen, Clark, 1286 90 percent point, 293 NM H , 291, 292 NM L , 291, 292 NMOS CML, 485 NMOS depletion-mode device parameters, 308 NMOS enhancement-mode device parameters, 308 NMOS inverter delays, 344–346 NMOS inverter with depletion-mode load, 316–318 www.elsolucionario.net Midband, 575 Midband gain, 575, 1129 Milestones, Miller, John M., 1160 Miller capacitance, 1258 Miller compensation, 1288 Miller effect, 1160, 1263 Miller multiplication, 1160, 1263, 1288 Mini-Circuits ZP-3LH+ Mixer, 1213 Minimum detectable signal (MDS), 1204 Minimum feature size, 7, 173, 306 Minority carrier, 53 Minority-carrier transport, 246–247 Mirror ratio (MR), 1050–1055 Missing code, 742, 743 Mixed signal designs, 530 Mixer, 1205–1213 Mixing, 531 Mobility, 49, 55 Monostable multivibrator, 766–770 Monostable multivibrator waveforms, 769 Monotonicity, 735 Monte Carlo analysis, 29–32 BJT, 269–272 C-B amplifier, 934–935 C-E amplifier, 814 cascade amplifier, 709 SPICE, 272 Moore, Gordon, 42, 43, 288 MOS capacitor, 146–148 MOS cascode source, 1067 MOS current mirror, 1049–1052, 1185 MOS device capacitances, 337 MOS differential amplifier, 970 MOS logic gates, 297 See also Digital electronics MOS memory and storage circuits, 416–459 address decoder, 440–444 clocked CMOS sense amplifier, 438–440 dynamic memory cells, 428–434 flip-flop, 447–451 4-T cell, 433–434 1-T cell, 430–433 RAM, 417–419 read operation, 422–424, 431–433 ROM, 444–447 sense amplifier, 434–440 6-T cell, 422–427 static memory cells, 419–428 summary/review, 451–452 write operation, 426–428 MOS transistor layout, 173–176 1325 www.elsolucionario.net Index NMOS inverter with linear load device, 315 NMOS inverter with resistive load, 298, 300–301 NMOS logic, 297 NMOS logic design, 297–306 load-line visualization, 300 load resistor design, 300 load resistor problems, 305–306 NMOS inverter with resistive load, 298, 300–301 noise margin, 303, 304–305 on-resistance, 302 V I H /VO L , 304 V I L /VO H , 303 W/L ratio, 299 NMOS NAND decoder circuit, 441 NMOS NAND/NOR gates, 324–328 NMOS passive mixer, 1211 NMOS saturated load inverter, 307–315 NMOS static NOR address decoder, 441 NMOS transistor, 148–160 bias, 176–187 body effect, 159 channel-length modulation, 157–158 circuit symbols, 163 depletion-mode MOSFET, 158, 159 mathematical model/saturation region, 155–156 on-resistance, 153–154 qualitative i-v behavior, 149–150 saturation of i-v characteristics, 154–155 substrate sensitivity, 159 summary page, 1304 summary table, 160 transconductance, 157 transfer characteristics, 158 triode region characteristics, 150–153 Nodal analysis, 15 Noise, 823–824 Noise factor, 1204 Noise figure, 1204 Noise margin, 291–292 CMOS logic design, 373–375 ECL gate, 467–468 NMOS inverter with depletion-mode load, 317 NMOS logic design, 303 pseudo NMOS inverter, 321–323 real-life example, 420–421 resistive load inverter, 304–305 saturated load inverter, 314–315 TTL inverter, 503–504 TTL prototype, 496–498 Noise margin in the high state, 291 Noise margin in the low state, 291 Nokia analog phone, Nominal value, 27 Nonideal op amps and feedback amplifier stability, 600–683 classic feedback systems, 601–602 closed-loop gain analysis, 602 CMRR See Common-mode rejection ratio (CMRR) current amplifier, 633–637 distortion reduction/feedback, 641–642 feedback amplifier See Feedback amplifier finite input resistance, 610–614 finite open-loop gain, 603–605 frequency response See Frequency response gain error, 602 input-bias current, 645–646 input-offset voltage, 643 loop gain/successive voltage and current inspection, 638–641 nonzero output resistance, 606–609 Nyquist plot, 671–672 offset current, 645–646 offset voltage, 643–644 output voltage and current limits, 647–649 phase margin See Phase margin PSRR, 657 review/summary, 682–684 transconductance amplifier, 629–633 transresistance amplifier, 624–628 voltage amplifier, 617–622 Nonideality factor, 82 Noninverting amplifier, 558–560 defined, 546 finite open-loop gain, 603–604 frequency response, 661–664, 665 ideal See Ideal noninverting amplifier input resistance, 611–613 inverting amplifier, compared, 562 n-stage cascades, 707 overall gain, 896 single-transistor amplifiers See C-B/C-G amplifiers summary table, 614, 615 terminal voltage gain, 896 Noninverting amplifier input resistance, 611–613 Noninverting input, 549 Noninverting SC integrator, 730–731 Nonlinear distortion, 1229 Nonmonotonic converter, 736, 743 Nonsaturating precision-rectifier circuit, 761 Nonzero output resistance, 606–609 NOR decoder, 440, 441 NOR gate BiCMOS, 513 CMOS, 384–387 NMOS, 325 NMOS depletion-mode technology, 327–328 PMOS, 352 truth table, 295 NOR gate symbol, 296 NOR RS flip-flop, 449 Normal-active region, 231 Normal common-base current gain, 221 Normal common-emitter current gain, 221 Normal-mode rejection, 585, 749 Norton circuit transformation, 15 Norton equivalent circuit, 16–20 Norton’s theorem, 538 NOT, 295 Notational conventions, 12 Noyce, Robert, 42, 288 npn transistor, 1307 circuit symbol, 220 common-base output characteristics, 229 common-emitter output characteristics, 228 cutoff region, 232 forward characteristics, 220–222 reverse characteristics, 222–223 small-signal model, 807 SPICE model, 253 transport model, 219–225 transport model equivalent circuit, 227 Null elements, 296 Numeric precision, 34 Numerically controlled oscillator (NCO), 759 Nyquist plot, 671–672 www.elsolucionario.net 1326 O OCTC method, 1139, 1167 Offset current, 645–646, 734 Offset error, 742 Offset voltage, 643–644, 734 ωH See also Upper-cutoff frequency absence of dominant pole, 1133–1134 OCTC method, 1167–1170 www.elsolucionario.net ωL See also Lower-cutoff frequency absence of dominant pole, 1130–1131 SCTC method, 1139–1147 On-resistance CMOS NOR gate, 385 FET, 153–154 NMOS logic design, 302 1-bit DAC, 751 –1 point, 671 shot, 766 1-T cell, 430–433 1-T DRAM cell, 416 One-transistor cell, 430–433 One-transistor dynamic RAM cell, 416 Op amp See Operational amplifier (op amp) Op amp compensation, 1273–1277 Op amp output resistance, 608–609 Op amp transfer function, 660–661 Open-circuit input conductance, 537 Open-circuit termination, 537 Open-circuit time-constant (OCTC) method, 1139, 1167 Open-circuit voltage gain, 537, 551 Open-loop amplifier, 699, 1229 Open-loop gain, 551, 602, 1230 Open-loop gain design, 608–610 Operational amplifier (op amp), 23–24 active load, 1092–1097 all transistor implementations, 1004–1005 analysis of circuits, 603–615 applications See Operational amplifier applications BiCMOS amplifier, 1004 bipolar op amp, 1095, 1096 class-AB output stages, 1011 CMOS op amp prototype, 1002–1004 compensation, 1262–1277 evolution of basic op amps, 991–1005 general purpose, 670–671 ideal See Ideal op amp input stage breakdown, 1096–1097 macro model, 670 nonideal See Nonideal op amps and feedback amplifier stability origin of name, 544 output resistance reduction, 998–999 slew rate, 1266–1269 three-stage bipolar op amp analysis, 999–1002 transfer function, 660–661 two-stage prototype, 992–997 voltage gain, 997–998 Operational amplifier applications, 697–785 A/D conversion See Analog-to-digital (A/D) conversion active filter, 714–728 amplitude stabilization, 757–758 astable multivibrator, 765–766 band-pass filter, 720–721 cascaded amplifier, 698–711 comparator, 763 counting converter, 744 D/A conversion See Digital-to-analog converter (D/A) conversion delta-sigma converter, 750–754 flash converter, 749–750 frequency scaling, 728 high-pass filter, 718–719 instrumentation amplifier, 711–712 inverted R-2R ladder, 738–739 low-pass filter, 714–727 magnitude scaling, 727 monostable multivibrator, 766–770 nonlinear circuit applications, 760–761 nonsaturating precision-rectifier circuit, 761 normal-mode rejection, 749 oscillator See Oscillator positive feedback, 763–770 precision half-wave rectifier, 760 R-2R ladder, 737–738 review/summary, 770–772 SC circuits, 728–733 Schmitt trigger, 763–765 sensitivity, 726–727 successive approximation converter, 744–746 Tow-Thomas biquad, 722–726 Operational amplifier compensation, 1269–1272 Operational-amplifier monostablemultivibrator circuit, 769 Operational transconductance amplifier (OTA), 1087 Operton die plot, 367 Optical communications, 486–487, 988–989 Optical fiber receiver block diagram, 988 Optical isolators, 245 Optical mice, 713 Optical navigation chip photo and block diagram, 713 OR gate, 295 OR gate symbol, 296 Oscillator, 754–758, 1288–1289 amplitude stabilization, 757–758, 1280 1327 Barkhausen criteria, 754 Colpitts, 1278–1279 crystal, 1283–1285 Hartley, 1279–1280 high-frequency, 1277–1285 LC, 1277, 1280 local, 530–531, 1205 MEMS, 1286–1287 negative G M , 1281–1282 negative resistance, 1280 phase-shift, 756–757 RC network, 755–758 ring, 346, 347 Wien-bridge, 755–756 OTA, 1087 Output characteristics, 153, 219, 228 Output resistance bipolar transistor, 802 C-B/C-G amplifiers, 899 C-C/C-D amplifiers, 889 C-E amplifier, 832–833, 871 C-S amplifier, 833, 881 C-S amplifier using MOS inverter, 911 cascode source, 1067–1068 closed-loop amplifier, 699 CMOS differential amplifier with active load, 1053 current mirror, 1057–1058 differential-mode, 976 feedback amplifier analysis, 1233 hybrid-pi model, 801 ideal inverting amplifier, 554, 555 ideal noninverting amplifier, 560 JFET, 822 MOSFET, 822 multistage amplifier, 943–944 A741 op amp, 1109 nonzero, 606–609 op amp, 608–609 open-loop amplifier, 699 reduction of, in op amp, 998–999 series-series feedback amplifier, 631 series-shunt feedback amplifier, 619–620 shunt-series feedback amplifier, 635 shunt-shunt feedback amplifier, 625–626 two-stage op amp, 995 voltage gain, 805, 811, 839 Widlar source, 1061, 1063 Wilson source, 1065–1066 Output resistance reduction, 998–999 Output stages, 1006–1014 class-A amplifier, 1006–1008 class-AB amplifier, 1010–1011 www.elsolucionario.net Index www.elsolucionario.net Index Output stages—Cont class-B amplifier, 1008–1009 short-circuit protection, 1011–1013 summary/review, 1028 transformer coupling, 1013–1014 Over damped, 674 Overshoot, 675–676, 677 Overvoltage protection, 1096 Oxidation, 64 Oxide permittivity, 151 Oxide thickness, 148, 151 P p-channel JFET, 1306 p-channel MOS See PMOS transistor p-type material, 54 Parallel (flash) converter, 749–750 Parasitic bipolar transistor, 401 Pass transistor, 623 Pass transistor column decoder, 442–444 Pass-transistor logic, 442, 444 Passive diode mixers, 1213 Passive MOS double-balanced mixer, 1210 PDP CMOS inverter, 382 ECL gate, 480–481 logic gates, 294 MOS transistor scaling, 170 TTL inverter, 503 Peak detector, 114 Peak-inverse-voltage (PIV), 120 Pentium Processor, 288 Periodic signal, 22 Periodic table, 45 Phase angle, 568 Phase margin example, 681–682 feedback amplifier stability, 1256–1258 overshoot/damping coefficient, 677 second-order systems, 673–674 step response, 674–676 unity gain frequency, 676 Phase-shift oscillator, 756–757 Phasor, 16 Phasor representation, 532, 550 Photo diode, 129–130 Photo diode pixel architecture, 915 Photodetector circuit, 130, 131 Photolithography, 64 Photoresist, 64 Piecewise linear model, 102, 109 Pinch-off locus, 156 Pinch-off point, 155 Pinch-off region, 155 Pinch-off voltage, 156 Pioneer SG-9500 graphic equalizer, 1168 PIV rating, 120 Planck’s constant, 130 Player characteristics, 20–21, 536 PMOS inverter, 349–351 PMOS logic, 297, 349–352 PMOS transistor, 161–163 bias, 188–190 circuit symbols, 163 small-signal model, 819–820 summary page, 1304 summary table, 162 pn junction capacitance, 92–93 pn junction diode, 75–80, 1303 pn product, 48 pnp transistor, 225–227, 1308 circuit symbol, 225 common-base output characteristics, 229 common-emitter output characteristics, 228 small-signal model, 807 SPICE model, 255 transport model equivalent circuit, 227 Pole frequency, 1133 Pole-splitting, 1172 Polycrystalline material, 45 Polysilicon, 64 Polysilicon-gate mask, 173 Positive feedback, 601, 763–770, 1229 Power cubes, 128 Power cubes/cell phone chargers, 128 Power-delay product See PDP Power dissipation amplifier, 839–840 CMOS inverter, 380–381 dynamic, 334–335, 381 ECL gate, 477–478 NMOS inverters, 333–336 power scaling in MOS logic gates, 335–336 static, 333–334, 380–381 Power electronics, 14 Power gain, 533 Power scaling in MOS logic gates, 335–336 Power-supply-independent bias cell, 1074 Power-supply-independent biasing, 1073–1077 Power supply rejection ratio (PSRR), 657 Precharge phase, 394, 437 Precharge transistor, 434 Precharged sense amplifier, 435–436 Precision (1%) resistors, 1301 Precision half-wave rectifier, 760 Precision voltage, 1077 Problem description, 13 Problem-solving approach, 13–14 Programmable read-only memory (PROM), 447 PROM, 447 Propagation delay, 294, 375 Propagation delay-high-to-low transition (τPLH ), 294 Propagation delay-low-to-high transition (τPLH ), 294 Propagation delay design for inverter, 347–349 Pseudo NMOS inverter, 319–323, 343–344 Pseudo NMOS logic gate, 343 Pseudo NMOS noise margins, 421 PSRR, 657 PTAT voltage, 1062, 1078 PTAT voltage and electronic thermometry, 88 PTAT voltage based digital thermometry, 1062 Pulse-width modulated (PWM) signal, 1015 PWM signal, 1015 Q Q-point, 96 amplifier characteristics, 787 bipolar differential amplifier with active load, 1088 bipolar transistor, 256, 257 BJT amplifier, 788 capacitor, 790, 791 CMOS differential amplifier with active load, 1082 differential amplifier, 971–972 FET, 153, 839 four-resistor bias circuit, 260 load line analysis, 181 MOSFET, 176, 177 MOSFET amplifier, 789 A741 op amp, 1099–1101 Quad-phase converter, 585, 749 Quadruple two-input NAND gates, 505 Quantization error, 11, 741 www.elsolucionario.net 1328 www.elsolucionario.net Index R rd , 798 Ric , 656 Rid , 656, 975 Rod , 976 Rth , 18 R-2R ladder, 565, 737–738 Radio frequency amplifier, 1194 Radio frequency choke (RFC), 1201 Radio frequency circuits, 1193–1204 Radio frequency (RF), 537 Radio spectrum, 530n RAM, 417–419 RAND(), 29 Random-access memory (RAM), 417–419 Random numbers, 29 Ratioed logic, 302 RC high-pass filter, 574 RC low-pass filter, 571–572 RC network, 339 RC oscillator, 755–758 Read-only memory (ROM), 444–447 Read-only storage (ROS), 417 Read operation, 419, 422–424, 431–433 Real-world examples See Electronics in action Reasonable numbers, 14 Rectifier circuit defined, 113 full-wave, 123–124 half-wave See Half-wave rectifier circuit rectifier compressions, 126 rectifier design, 126–127 Reference current, 1049, 1072 Reference current design, 1076–1077 Reference current operation, 1072 Reference inverter, 376–378 Reference inverter designs, 324 Reference voltage, 289, 461 Refresh operation, 430 Regenerative feedback, 601, 1229 Regulated cascade current source, 1068–1069 Repartitioned ECL gate, 479 Resistive voltage divider, 15 Resistivity, 44, 50, 51, 55 Resistor coding, 1300 Resistor color coding, 1300 Resistor load, 298 Resistor load inverter, 298 Resistor-transistor logic (RTL), 287 Resolution of the converter, 10, 734 Reverse-active region, 230, 231, 240–242 Reverse bias, 85, 89–93, 104 Reverse breakdown, 92 Reverse common-base current gain, 223 Reverse common-emitter current gain, 222 Reverse saturation small current, 81 Reverse transit time, 493 RF, 537 RF amplifier, 1194 RF circuits, 1193–1204 RF network transformation, 1195 RF transceiver architecture, 1194 RFC, 1201 ρ, 44 Right-half plane zero, 1259 Ring oscillator, 346, 347 Ripple voltage, 116 Rise time, 293 ROM, 444–447 ROS, 417 Row address decoder, 418 RS-FF, 449, 450 RS flip-flop, 449, 450 RTL, 287 S Sample-and-hold (S/H) circuits, 746, 752–753 Satellite radio receiver, 530n, 531 Saturated drift velocity, 49 Saturated load inverter, 307–315 Saturating bipolar inverter, 487–493 Saturation by connection, 178 Saturation current, 81 Saturation region, 155, 160, 162, 230, 242–245, 263–264 Saturation velocity, 171 Saturation voltage, 156, 242, 243–244 SC circuits, 728–733 Scaled inverters, 377 Scaling, 170, 335–336, 377, 727–728, 1054 See also MOS transistor scaling Scaling based on reference circuit simulation, 346 Schmitt trigger, 763–765 Schottky barrier diode, 93–94, 507 Schottky-clamped TTL, 506–508 Schottky TTL NAND gate, 508 SCR, 76 SCTC method, 1139, 1187 Semiconductor compensated, 62 compound, 44 doped See Doped semiconductor elemental, 44 impurities, 51–52 materials, 45 mobility, 49 resistivity, 44 Semiconductor materials, 45 Sense amplifier, 434–440 Sensitivity, 726–727 Series feedback, 609, 615 Series-series feedback, 615, 629–633 Series-series feedback amplifier, 629–633, 1248–1250 Series-shunt feedback, 615, 617–622 Series-shunt feedback amplifier, 617–622, 1234–1241 Settling time, 676 741 design See A741 op amp 7400 series TTL inverter, 500–504 7404 hex inverter, 500 SG-9500 classic analog equalizer, 1168 S/H circuits, 746, 752–753 Shallow trench isolation (STI), 403 Shift register, 447 Shockley, William, 3–5, 4, 217 Short-circuit current gain, 537 Short-circuit output resistance, 537 Short-circuit protection, 1011–1013, 1109 Short-circuit termination, 537 Short-circuit time-constant (SCTC) method, 1139, 1187 Shot noise, 823 Shunt feedback, 609, 615 Shunt-peaked amplifier, 1194–1196 Shunt peaking, 1194 Shunt-series feedback, 615, 633–637 Shunt-series feedback amplifier, 633–637, 1251–1253 Shunt-shunt feedback, 615, 624–628 Shunt-shunt feedback amplifier, 624–628, 1242–1247 Shunt-shunt feedback with new source and load impedances, 1245–1246 Signal injection and extraction, 858–860 Signal source voltage gain C-B/C-G amplifiers, 896 C-C/C-D amplifiers, 888 multistage amplifier, 943 www.elsolucionario.net Quartz crystal equivalent circuit, 1284–1285 Quiescent operating point See Q-point 1329 www.elsolucionario.net Index Signal-to-noise ratio (SNR), 1204 Silicon art, 329 Silicon crystal lattice structure, 46 Silicon dioxide, 64, 146 Silicon-germanium BiCMOS, 509 Silicon nitride, 64 Silicon-on-insulator (SOI), 403–404 Silicon-on-sapphire, 403 Silicon wafer-to-wafer bonding, 404 SIMOX, 403 Simple rectangular resistor, 305 Simplified band-pass filter circuit, 720 Simplified hybrid pi model, 805 Single-balanced mixer, 1206–1208 Single channel technology, 288 Single-crystal material, 45 Single-ended output, 975 Single-pole frequency response, 659 Single pole Gm -C low-pass filter, 1087 Single-pole op amp compensation, 1262–1277 Single-ramp (single-slope) ADC, 746–747 Single shot, 766 Single-stage differential feedback amplifier, 1231 Single-transistor amplifiers, 857–967 amplifiers, compared, 858, 951 BJT amplifiers, 903–905 capacitor design See Capacitor design examples, 925–938 FET amplifiers, 905–907 follower circuits See C-C/C-D amplifiers inverting amplifiers See C-E amplifier; C-S amplifier multistaged ac-coupled amplifier See Multistaged ac-coupled amplifier noninverting amplifiers See C-B/C-G amplifiers selecting an amplifier configuration, 912–914 signal injection and extraction, 858–860 summary/review, 950–951 summary tables, 884, 891, 903, 904, 906, 951 Single-transistor current sources, 1017 Single-transistor transresistance amplifier, 1242 Single-tuned amplifier, 1197–1198 6-T cell, 422–427 Six-transistor (6-T) SRAM cell, 422–427 60 mV per decade, 87 Slew rate, 668, 1266–1269 Small-scale integration (SSI), Small signal, 796 Small-signal common-emitter current gain, 801 Small-signal conductance, 798 Small-signal current gain, 802 Small signal for the BJT, 806 Small-signal modeling and linear amplification, 786–856 BJT, 799–808 BJT amplifier, 788–789, 793–794 C-E amplifier See C-E amplifier C-S amplifier See C-S amplifier circuit analysis, 792–796 coupling/bypass capacitor, 790–791 diode, 796–799 FET, 815–821 hybrid-pi model, 801–802, 805 JFET, 820–821 MOSFET amplifier, 789–790, 795–796 PMOS transistor, 819–820 power dissipation, 839–840 signal range, 840–841 summary/review, 843–844 transistor as amplifier, 787–790 SNR, 1204 Soft clipping circuit, 842 Software packages See MATLAB; SPICE SOI, 403–404 Solar cells, 131–132 Solar power for the home, 132 Solid-state diodes and diode circuits, 74–144 analysis of diodes in breakdown region, 109–112 design notes, 83, 87, 89 diode circuit analysis See Diode circuit analysis diode equation, 82 diode layout, 95–96 diode temperature coefficient, 89 dynamic switching behavior, 129–130 forward bias, 86, 93 full-wave bridge rectification, 125 full-wave rectifier circuit, 123–124 half-wave rectifier circuit, 113–122 i-v characteristics, 80–81 internal diode current, 79 LED, 132–133 mathematical modeling, 82, 98–100 multiple-diode circuits, 106–108 photo diode/photodetector, 130–131 pn junction capacitance, 92–93 pn junction diode, 75–80 rectifier circuit See Rectifier circuit reverse bias, 85, 89–92, 92–93, 104 saturation current in real diodes, 90 Schottky barrier diode, 93–94 solar cells, 131–132 SPICE, 94–95 summary/review, 133–134 zero bias, 85 Solid-state electronic materials, 44–45 Solid-state electronics, 42–73 compensated semiconductor, 62 covalent bond model, 45–48 diffusion current, 59–60 doped semiconductor See Doped semiconductor drift current, 48–49 electron/hole concentrations, 52–55 energy band model, 61–63 equations, 69 impurities in semiconductors, 51–52 integrated circuit fabrication, 64–66 materials, 44–45 mobility, 49 mobility/resistivity, 55–58 n-type material, 53 p-type material, 54 resistivity of intrinsic silicon, 50, 51 summary/review, 67–68 total current, 60–61 Sony, 4, 218 SOS, 403 Source, 149 Source-bulk capacitance, 166 Source degeneration resistance, 1170–1172 Source follower, 887 See also C-C/C-D amplifiers Source-follower circuit, 1006 Source resistance, 533 Space charge region (SCR), 76 SPICE, 1303–1309 See also MATLAB ac analysis vs transient analysis, 807–808 AM demodulation, 122, 123 amplifier VTC, 547 analysis of transistor operating in saturation, 264 bandgap reference design, 1080–1081 bias (JFET/depletion-mode MOSFET), 200 BiCMOS buffer, 510 bipolar technology, 253–255 bipolar transistor current source, 1022 bipolar transistor model parameters, 1152 bipolar transistor saturation voltage, 490 www.elsolucionario.net 1330 www.elsolucionario.net BJT, 1307–1309 BJT base resistance, 1155 C-B amplifier, 901, 902, 933 C-C amplifier, 893, 894 C-D amplifier, 893, 894 C-E amplifier, 791, 813–814, 873–874, 876, 877 C-E amplifier with emitter degeneration, 1174 C-G amplifier, 901, 902 C-S amplifier, 828–829, 837, 883, 938 capacitor design/C-B and C-G amplifiers, 923, 924 capacitor design/C-C and C-D amplifiers, 921 capacitor design/C-E and C-S amplifiers, 918 cascade amplifier design, 708 cascade buffer design, 399 cascaded amplifier calculations, 702 CGS /CGD , 1153 CMOS op amp analysis, 1095 CMRR, 659 Cπ /CBC , 1149 difference amplifier analysis, 567 differential amplifier design, 991 differential amplifier Q-point analysis, 971–972 differential input series-shunt voltage amplifier, 1241 diode parameters, 94–95 diode switching behavior, 129 dynamic performance of inverter with resistor load, 342 electronic current source, 983 follower design, 929 four-resistor bias design, 262 four-resistor biasing, 184 frequency response of multistage amplifier, 709–711 g-parameters, 540 half-wave rectifier circuit, 119 high-frequency analysis of C-E amplifier, 1165–1166 inverter with resistive load, 301 inverter with saturated load device, 312 inverting amplifier design, 555–556 JFET, 1306, 1307 JFET modeling, 197 latchup, 402 logic level analysis/saturated load inverter, 314 loop gain and resistance ratio calculation, 639–641 lower-cutoff frequency/C-E amplifier, 1144 Monte Carlo analysis, 272 MOS current mirror, 1051 MOS transistor parameters for circuit simulation, 1305 MOSFET, 167–169, 1303 MOSFET current source, 1024 MOSFET differential amplifier analysis, 985 MOSFET op amp compensation, 1276–1277 multiple diode circuit, 108 NMOS inverter with depletion-mode load, 316, 318 NMOS inverter with saturated load, 310 NMOS passive mixer, 1211 NMOS transistor model summary, 1304 noninverting amplifier analysis, 559 noninverting amplifier input resistance, 612 op amp macro model, 670 phase margin analysis, 681–682 PMOS transistor model summary, 1304 pn junction diode, 1303 poles and zeros/C-S amplifier, 1138–1139 precharge operation, 434 propagation delay design for inverter, 349 pseudo MOS inverter, 321 pseudo NMOS inverter, 344 read operation, 424 reference current design, 1076–1077 reference inverter design, 378 reverse-active region, 242 saturation voltage calculation, 244 series-series feedback amplifier analysis, 633, 1250 shunt-series feedback amplifier analysis, 637, 1253 shunt-shunt feedback amplifier analysis, 628, 1244 temperature coefficients, 33 three-stage amplifier, 945–948 three-stage bipolar op amp analysis, 1001–1002 Tow-Thomas filter design, 725–726 transfer function analysis, 541 transformer-coupled inverting amplifier, 1014 1331 transistor sizing/complex logic gates, 332 TTL gate, 497 TTL inverter propagation delay, 503 TTL inverter VTC, 504 two-port parameters of current mirror, 1059–1060 two-resistor biasing, 265 two-stage series-shunt voltage amplifier, 1239 voltage follower gain error, 655 voltage gain (differential amplifier), 550–551 write operation, 427 Sputtering, 64 SR, 668 SRAM, 417 SSI, Stagger tuning, 1201 Standard 7400 series TTL inverter, 500–504 Standard capacitor values, 1302 Standard cell library, 394 Standard discrete component values, 1300–1302 Standard inductor values, 1302 Standard resistor values, 1300 Start-up circuit, 1074 Statement of the problem, 13 Static logic inverter design, 310 Static memory cells, 419–428 Static power dissipation, 333–334, 380 Static RAM (SRAM), 417 Stereo receiver, 531 STI, 403 Storage circuits See MOS memory and storage circuits Storage time, 130, 492 Storage time constant, 492 Stored based charge, 492 Stray-insensitive circuits, 731 Substrate sensitivity, 159 Substrate terminal, 149 Subthreshold conduction, 172 Subthreshold region, 172 Successive approximation converter, 744–746 Successive voltage and current injection, 638–641 Sum-of-products logic function, 296, 329, 505 Summary tables C-B/C-G amplifiers, 903 C-C/C-D amplifiers, 891 C-E/C-S amplifiers, 838, 884 www.elsolucionario.net Index www.elsolucionario.net Index Summary tables—Cont current mirrors, 1069 diode circuit analysis, 105 ideal inverting/noninverting amplifier, 561 inverter characteristics, 324 inverting/noninverting amplifier, 615 inverting/noninverting frequency response, 665 A741 characteristics, 1110 NMOS inverter time delays, 344, 345 NMOS transistor, 160 PMOS transistor, 162 single-transistor amplifiers, 951 single-transistor bipolar amplifiers, 904 single-transistor FET amplifiers, 906 small-signal parameter comparison, 822 upper-cutoff frequency/single-stage amplifiers, 1180 Summing amplifier, 563 Summing junction, 563 Super-beta transistors, 223n Superdiode, 760 Superposition, 723 Superposition errors, 564, 737 Superposition principle, 22 Supply-independent biasing, 1073–1077 Supply-independent MOS reference cell, 1075 Surface potential parameter, 159 Surge current, 120 Swamping, 935 Switched-capacitor D/A converter, 740 Switched-capacitor filter, 732 Switched-capacitor integrator, 728–729 Switched capacitor integrator and reference switch, 753 Switched-capacitor (SC) circuits, 728–733 Switching transistor, 298 Symmetrical reference inverter design, 377 Synchronous tuning, 1201 T t f , 293 tr , 293, 338 ts , 492 TT , 744 T-model, 801n Taper factor, 397 Tapped inductor, 1199–1200 TAS-TIS cascade, 988 τP , 294, 375 τPLH , 338 TCR, 32 TCR analysis, 33 Teal, Gordon, 217 Temperature coefficient of resistance (TCR), 32 Temperature coefficients, 32–33 10 percent point, 293 Terminal current gain, 871 Terminal voltage gain C-B/C-G amplifiers, 895 C-C/C-D amplifiers, 886 C-E amplifier, 809, 866 C-S amplifier, 825, 878–879 noninverting amplifier, 896 Texas Instruments (TI), 4, 217 TGC, 1026 THD, 548 Thermal equilibrium, 48 Thermal inkjet printers, 175 Thermal noise, 823 Thermal voltage, 60, 78 Thévenin circuit transformation, 15 Thévenin equivalent circuit, 16–19, 258 Thévenin equivalent resistance, 18 Thors Helmet, 63 3-bit domino CMOS NAND address decoder, 443 3-bit flash ADC, 750 Three-input CML OR gate, 484 Three-input CMOS NOR gate, 386 Three-input ECL NOR gate, 472 Three-input ECL-OR-NOR gate, 472 Three-stage amplifier, 698, 939–941, 945–948 Three-stage amplifier cascade, 698 Three-stage bipolar op amp analysis, 999–1002 Three-stage MOSFET shunt-series feedback amplifier, 1254 Three-stage op amp analysis, 1263–1264 Three-terminal IC voltage regulators, 623–624 Three-terminal op amp, 670 Threshold voltage, 148 TI, 4, 217 TIA, 557, 629 Time gain control (TGC), 1026 Time-varying binary digital signal, Timeline, Tokyo Tsushin Kogyo, 218 Tolerances, 26 Tolerances in bias circuits, 266–272 Total current, 60–61 Total harmonic distortion (THD), 548 Tow-Thomas biquad, 722–726 Transconductance, 157, 255 back-gate, 818 bipolar transistor, 822 differential pair, 973 graphical interpretation, 802 hybrid-pi model, 801 JFET, 822 MOSFET, 816, 822 Transconductance amplifier, 629–633 Transconductance parameters, 152 Transfer characteristics, 158, 228 Transfer function, 568, 1131 Transfer function analysis, 541 Transformer-coupled class-B output stage, 1014 Transformer-coupled inverting amplifier, 1014 Transformer coupling, 1013–1014 Transformer-driven half-wave rectifier, 114 Transimpedance amplifier (TIA), 557, 629 Transistor alternative to load resistor, 306–324 amplifier, as, 787–790 BJT See Bipolar junction transistor (BJT) CMOS inverter, 369 CMOS NAND gate, 387 CMOS NOR gate, 385 complex logic gates, 331–333 diode-connected, 239, 1055, 1057 FET See Field-effect transistor (FET) JFET See Junction field-effect transistor (JFET) matched, 969, 1047 NMOS See NMOS transistor npn See npn transistor origin of name, 5n pass, 623 PMOS See PMOS transistor pnp See pnp transistor precharge, 434 super-beta, 223n Transistor feedback amplifier, 1228–1299 See also Feedback amplifier bipolar amplifier compensation, 1266 block diagram of feedback system, 1229 closed-loop gain, 1229–1230 closed-loop impedances, 1230 www.elsolucionario.net 1332 www.elsolucionario.net Index Transit time, 93, 247–249, 252, 493 Transmission gate, 400 Transport model, 218 Transport model simplifications, 231–242 Transresistance amplifier, 556–557, 624–628, 1242–1247 Triggering, 766, 769–770 Triode, Triode region, 152, 160, 162 Triple ramp converter, 585, 749 Triple three-input NAND gates, 506 Truth tables, 295, 296 TTL, 287 See Transistor-transistor logic (TTL) TTL AOI gate, 506 TTL inverter prototype, 493 TTL NAND gates, 505, 506 TTL three-input NAND gate, 506 Tune amplifier, 1194 Turn-on voltage, 81 TV signal, 22 Two-amplifier cascade, 703–704 Two-dimensional silicon lattice, 46 Two-gate CMOS NAND gate, 387 Two-input BiCMOS NOR gate, 513 Two-input BiNMOS NOR gate, 513 Two-input CMOS NOR gate, 384, 385 Two-input ECL OR gate, 472 Two-input Exclusive-OR gate, 484 Two-input NAND gate, 328 Two-input NMOS NAND gate, 326 Two-input NMOS NOR gate, 325 Two-input NOR gate, 328 Two-phase nonoverlapping clock, 728 Two pole biquadratics Gm-C low-pass filter, 1088 Two-pole low-pass filter, 714 Two port g-parameter representation, 537, 1310 Two-port h-parameter representation, 1311 Two-port model, 537 cascaded amplifier, 698–699 current mirror, 1058–1059 differential pairs, 987, 989 g-parameters, 537–541, 1310 h-parameters, 1311 npn transistor, 799 three-stage cascade amplifier, 699 y-parameters, 1311–1312 z-parameters, 1312 Two-port network, 537 Two-port network representation, 537 Two-port parameters, 537 Two-port y-parameter representation, 1311 Two-port z-parameter representation, 1312 Two-resistor biasing, 264–265 Two resistor, one-capacitor circuit, 1159 Two-stage op amp, 992–997 Two-stage series-shunt voltage amplifier, 1235 Two-stage shunt-series current amplifier, 1251 Two-stage transconductance amplifier, 1248 Two-terminal circuit, 17 256-Mb RAM chip, 418 U Ultra-large-scale integration (ULSI), Ultrasound, 1025–1026 Unbalanced differential amplifier, 1183 Uncompensated amplifier, 1254–1255 Under damped, 675 Uniden bag phone, Uniform random number generators, 29 Unity gain-bandwidth product, 1150 Unity-gain buffer, 561 Unity-gain frequency, 250, 570, 659, 676, 1149–1151, 1153 Unloaded inverter delay, 347 Unstable equilibrium point, 419 Up-conversion, 1205 Upper-cutoff frequency, 570, 1129, 1180 See also ωH Upper –3-dB frequency, 570 Upper half-power point, 570 V V B E -based reference, 1073 VBESAT , 497 VCESAT , 497 V D D , 298n V F S , 733 V H , 289, 291, 308, 319 vic , 650 V I H , 290, 291, 304, 467 V I L , 290, 291, 303, 467 V L , 289, 291, 299 V O H , 291, 303, 467 V O L , 291, 304, 467 V O S , 643 www.elsolucionario.net closed loop response of uncompensated amplifier, 1254–1255 compensated amplifier, 1260–1262 differential input series-shunt amplifier, 1239–1241 feedback amplifier analysis at midband, 1232–1233 feedback amplifier stability, 1254–1262 feedback amplifiers, compared, 1234 feedback analysis procedure, 1234 feedback effects, 1230–1231 higher order effects, 1259–1260 MOSFET op amp compensation, 1273–1277 op amp compensation, 1273–1277 phase margin, 1256–1258 review/summary, 1287–1289 series-series feedback amplifier, 1248–1250 series-shunt feedback amplifier, 1234–1241 shunt-series feedback amplifier, 1251–1253 shunt-shunt feedback amplifier, 1242–1247 single-pole op amp compensation, 1262–1277 slew rate, 1266–1269 small-signal limitations, 1262 three-stage op amp analysis, 1263–1264 transmission zeros in FET op amps, 1265 Transistor models at high-frequency, 1148–1155 Transistor saturation current, 220 Transistor-transistor logic (TTL), 287, 494–509 ECL, compared, 508–509 fan out, 498–499, 504 input clamping diodes, 506 logic functions, 504–506 multi-emitter input transistor, 505 NAND gates, 505, 506 noise margin, 496–498, 503–504 PDP, 503 power consumption, 503 propagation delay, 503 prototype, 494–499 Schottky-clamped transistor, 506–508 standard 7400 series TTL inverter, 500–504 VTC, 503–504 1333 www.elsolucionario.net Index Vr , 116 V R E F , 289, 461, 733 vsat , 49 V SS , 298n VT , 60, 78 VT N , 148 Vacancy, 48 Vacuum diode, Vacuum tube, 5, VAF, 255 Valence band, 61 VAR, 255 VCCS, 13 VCVS, 13 Velocity saturation, 49 Very high frequency (VHF), 530 Very-large-scale integration (VLSI), VHF, 530 Virtual ground, 24, 25, 554, 975 Vlach, Dick, 329 VLSI, Voltage breakdown, 91 common-mode input, 650 cut-in, 81 dc reference, 733 differential-mode output, 969 Early, 251 full-scale, 733 input-offset, 643 junction breakdown, 246 offset, 643–644, 734 pinch-off, 156 precision, 1077 PTAT, 1078 reference, 289 ripple, 116 saturation, 156, 242, 243–244 thermal, 60 threshold, 148 turn-on, 81 Voltage amplifier, 617–622, 1234–1241 Voltage-controlled current source model, 804 Voltage-controlled current source (VCCS), 13 Voltage-controlled voltage source (VCVS), 13 Voltage divider restrictions, 16 Voltage division, 15 Voltage follower, 561 Voltage follower gain error, 654–655 Voltage gain amplification, 532–533 amplification factor, 814 amplifier, 22 C-E amplifier, 809, 810, 811, 812–814, 872–876 C-S amplifier, 825–826, 827–829, 879, 881–883 closed-loop amplifier, 699 CMOS op amp, 1092–1093 intrinsic, 803 multistage amplifier, 941–943 A741 op amp, 1103–1107 op amp, 545–547, 997–998 open-loop amplifier, 699 output resistance, 805, 811, 839 signal source, 810 terminal See Terminal voltage gain Voltage reference, 1077 Voltage regulator, 110 Voltage transfer characteristic (VTC) CMOS, 371–373 differential amplifier, 545 emitter follower, 474 ideal inverter, 289 precision rectifier, 760 TTL inverter, 503–504 VTC See Voltage transfer characteristic (VTC) W Wafer doping, 57–58 Walker, William F., 1026 Weighted-capacitor DAC, 740 Weighted-resistor DAC, 574, 737 White noise, 823 Widlar, Robert, 1046, 1047, 1077 Widlar current source, 1060–1061, 1063, 1073–1074 Widlar source output resistance, 1061 Wien-bridge oscillator, 755–756 Wilson current sources, 1064–1066 Wired-OR logic, 477 WL, 419 W/L ratio, 297, 299, 316 (W/L) P , 319 (W/L) S , 309, 319 Wordline (WL), 419 Wordline drivers, 418 Worldwide electronics market, Worst-case analysis, 27–29 Write operation, 419, 426–428 Y y-parameters, 1311–1312 Z z-parameters, 1312 Zener breakdown, 91 Zener diode regulator circuit, 111 Zener resistance, 111 Zero bias, 85 Zero-bias junction capacitance, 93 Zero-substrate-bias value for VT N , 159 Zuras, Dan, 329 www.elsolucionario.net 1334 jae80458˙es December 24, 2009 13:50 www.elsolucionario.net PHYSICAL CONSTANTS SYMBOL QUANTITY VALUE NAV c εo εS εOX EG h Avogadro constant Speed of light in a vacuum Permittivity of free space Relative permittivity of silicon Relative permittivity of silicon dioxide Bandgap of silicon Planck’s constant k Boltzmann’s constant 6.022 × 1026 /kg · mole 2.998 × 1010 cm/s 8.854 × 10−14 F/cm 11.7 3.9 1.12 eV 6.625 × 10−34 J · s 4.135 × 10−15 eV · s 1.381 × 10−23 J/K 8.617 × 10−5 eV/K kT q mo Mp ni q Thermal voltage at 300K 0.0259 V Electron rest mass Proton rest mass Silicon intrinsic carrier density at room temperature Electronic charge 9.1095 × 10−31 kg 1.6726 × 10−27 kg 1010 /cm3 1.602 × 10−19 C CONVERSION FACTORS angstrom = 10−8 cm m = 10−4 cm mil = 25.4 m eV = 1.602 × 10−19 J = 10−6 n = 10−9 p = 10−12 f = 10−15 k = 103 M = 106 www.elsolucionario.net Jaeger-1820037 jae80458˙es December 24, 2009 13:50 www.elsolucionario.net Electronics in Action Dual-Ramp or Dual-Slope Analog-to-Digital Converters (ADCs) 583 Chapter Cellular Phone Evolution Player Characteristics 20 Amplifiers in a Familiar Electronic System— The FM Stereo Receiver 25 Chapter 11 Three-Terminal IC Voltage Regulators 623 Fiber Optic Receiver 629 Offset Voltage, Bias Current, and CMRR Measurement 658 Chapter CCD Cameras 63 Lab-on-a-chip 66 Chapter 12 Chapter The PTAT Voltage and Electronic Thermometry AM Demodulation 122 Power Cubes and Cell Phone Chargers 128 Solar Power for the Home 132 Chapter CMOS Camera on a Chip 164 Thermal Inkjet Printers 175 Chapter 13 Chapter The Bipolar Transistor PTAT Cell Optical Isolators 245 Noise in Electronic Circuits 823 Electric Guitar Distortion Circuits 842 240 Chapter 14 Chapter Silicon Art 329 MEMS-Based Computer Projector 88 CMOS Navigation Chip Prototype for Optical Mice 713 Band-Pass Filters in BFSK Reception 722 Sample-and-Hold Circuits 752 Numerically Controlled Oscillators and Direct Digital Synthesis 759 An AC Voltmeter 762 Function Generators 767 Revisiting the CMOS Imager Circuitry Humbucker Guitar Pickup 949 916 350 Chapter 15 Chapter CMOS—The Enabler for Handheld Technologies 383 And-Or-Invert Gates in a Standard Cell Library 394 High Performance CMOS Technologies Limiting Amplifiers for Optical Communications 988 Class-D Audio Amplifiers 1015 Medical Ultrasound Imaging 1025 403 The PTAT Voltage 1062 Gm -C Integrated Filters 1087 Chapter A Second Look at Noise Margins 420 Field Programmable Gate Arrays (FPGAs) Flash Memory 448 428 Chapter Electronics for Optical Communications Chapter 16 486 Chapter 17 Graphic Equalizer 1168 RF Network Transformations 1195 Noise Factor, Noise Figure, and Minimum Detectable Signal 1204 Passive Diode Mixers 1213 Chapter 10 Player Characteristics 536 Laptop Computer Touchpad 543 Fiber Optic Receiver 557 Digital-to-Analog Converter (DAC) Circuits Chapter 18 564 A Transresistance Amplifier Implementation A MEMS Oscillator 1286 1247 www.elsolucionario.net Jaeger-1820037 Jaeger-1820037 jae80458˙es December 24, 2009 13:50 www.elsolucionario.net DIODE EQUATIONS – vD i D = I S exp iD −1 VT = kT q C jo A vD 1− φj Cj = ID τT VT CD = (FORWARD) ACTIVE REGION EQUATIONS— npn TRANSISTOR (v B E > AND vC E ≥ v B E ) Collector (C) iC iB vD nVT i C = I S exp Base (B) vB E VT 1+ vC E VA iC = β F i B i E = (β F + 1)i B 1+ βF = βF O vC E VA iE Emitter (E) BJT SMALL-SIGNAL MODEL PARAMETER RELATIONSHIPS (β O ∼ = βF ) gm = IC ∼ = 40IC VT βo = gm rπ ro = V A + VC E ∼ V A = IC IC μ f = gm ro Cπ = gm τ F ωT = gm Cπ + Cμ LARGE SIGNAL MODEL EQUATIONS—NMOS TRANSISTOR Triode (Linear) Region (v G S > VT N and v D S ≤ v G S − VT N ) i D = K n vG S − VT N − v DS 2 v DS iG = iS = iD Kn = Kn D + iD B G + vGS – – S vSB + W L vDS Active (Saturation) Region (v G S > VT N and v D S ≥ v G S − VT N ) – iD = Kn (vG S − VT N )2 (1 + λv DS ) VT N = VT O + γ iG = v S B + 2φ f − iS = iD Kn = Kn W L 2φ f FET SMALL-SIGNAL MODEL PARAMETER RELATIONSHIPS gm = 2I D ∼ = VG S − VT N 2K n I D ro = + λVDS ∼ = λI D λI D μ f = gm ro ωT = gm CG S + CG D www.elsolucionario.net + Jaeger-1820037 jae80458˙es December 24, 2009 13:50 www.elsolucionario.net RI RI v1 RI v1 RiC RiB vi v1 RL RB vo vi RB RiB RiE RL RE (b) (a) RiC R L RiE R6 vi vo vo (c) The three BJT amplifier configurations: (a) common-emitter amplifier, (b) common-collector amplifier, and (c) common-base amplifier SINGLE TRANSISTOR BJT AMPLIFIERS—APPROXIMATE EXPRESSIONS ∼ =− Terminal voltage gain Avt − Signal-source voltage gain Av COMMON-COLLECTOR AMPLIFIER gm R L + gm R E gm R L + gm R E ∼ =+ R B RiB R I + (R B RiB ) + gm R L + gm R L rπ + (βo + 1)R E Input terminal resistance ∼ = 0.005(1 + gm R E ) ∼ = 0.005(1 + gm R L ) −βo βo + Terminal current gain RI ∼ = +1 + gm R L + gm (R I R6 ) R6 R I + R6 αo ∼ = gm gm ro [1 + gm (R I R6 )] ∼ = 0.005[1 + gm (R I R6 )] αo ∼ = +1 v1 RI RiD RiG vi R B RiB R I + (R B RiB ) +gm R L ∼ = rπ (1 + gm R L ) αo Rth + gm βo + ro (1 + gm R E ) Input signal range gm R L ∼ = +1 + gm R L rπ + (βo + 1)R L ∼ = rπ (1 + gm R E ) Output terminal resistance COMMON-BASE AMPLIFIER RL RG v1 vo RG vi RS RI RiG RiS RL (a) vi v1 R6 RiS RiD RL vo (b) (c) The three FET amplifier configurations: (a) common-source, (b) common-drain, and (c) common-gate SINGLE TRANSISTOR FET AMPLIFIERS—APPROXIMATE EXPRESSIONS COMMON-SOURCE AMPLIFIER − Terminal voltage gain Avt Signal-source voltage gain Av Input terminal resistance Output terminal resistance Input signal range Terminal current gain − COMMON-DRAIN AMPLIFIER gm R L + gm R S gm R L + gm R S RG R I + RG + + COMMON-GATE AMPLIFIER gm R L ∼ = +1 + gm R L gm R L + gm R L RG R I + RG +gm R L ∼ = +1 + gm R L + gm (R I R6 ) R6 R I + R6 ∞ ∞ 1/gm ro (1 + gm R S ) 1/gm ro [1 + gm (R I R6 )] 0.2(VG S − VT N )(1 + gm R S ) 0.2(VG S − VT N )(1 + gm R L ) 0.2(VG S − VT N )[1 + gm (R I R6 )] ∞ ∞ +1 www.elsolucionario.net COMMON-EMITTER AMPLIFIER vo ... Microelectronic circuit design / Richard C Jaeger, Travis N Blalock — 4th ed p cm ISBN 978-0-07-338045-2 Integrated circuits? ?Design and construction Semiconductors? ?Design and construction Electronic circuit. .. circuits are introduced as well as the peripheral address and decoding circuits needed in memory designs ROMs and flip-flop circuitry are included in Chapter Chapter discusses bipolar logic circuits... integrated circuit design A variety of current mirror circuits are introduced and applied in bias circuits and as active loads in operational amplifiers A wealth of circuits and analog design