COMPAL LA a551p (ZRMAE,ZEMAE) 2013 06 07 rev 0 2 schematic

A B C D E 1 C yb er Fo ru m ru ZRMAE/ZEMAE Juno/Iakros 10AN/10ANG 2 LA-A551P REV 0.2 Schematic AMD KABINI Quad Core 25W for UMA+DIS AMD KABINI Quad Core 15W 2013-06-07 Rev 0.2 3 4 Compal Electronics, Inc Compal Secret Data Security Classification 2013/05/15 Issued Date Deciphered Date 2015/09/27 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D Cover Page Document Number Rev 0.2 LA-A551P Friday, June 14, 2013 Sheet E of 40 A B AMD GPU AMD Sun Pro M2, 64bit with 1GB DDR3(2Gbit) AMD Sun Pro M2, 64bit with 2GB DDR3(4Gbit) C D Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2 PCIe Gen2 X4 Single Channel 5Gbps page 13-19 DP0 X4 USB 2.0 Left Jaguar Core C yb er Fo ru m ru USB port page 25 page 20 Integrated Yangtze FCH USB 2.0 USB Right1 5V 480Mbps HDMI Conn (1.4b & 3D) BGA 769-balls USB Right1 USB3.0 port page 24 5V 5Gbps SATA Gen3 port 5V 6Gbps PCIe port page 23 RTL8106E 10/100M PCIe port page 25 USB port page 20 USB Right2 with S&C SPI ROM (4MB) PCIeMini Card port For BT USB page 23 Int Camera USB2.0 port page 24 USB port page 20 USB Right2 USB3.0 port page 24 SATA HDD PCIe Gen1 X1 APU SMBUS SATA port page 23 2.5bps PCIe Gen1 X1 2.5bps HD Audio 3.3V 24MHz SPK Conn page 25 HDA Codec JHP ALC259 page 25 page 26 USB port page 20 USB2.0 port page 24 USB 3.0 PCIeMini Card For WLAN TouchScreen CardReader DP1 X4 page 21 page 10,11 BANK 0, 1, 2, 1.5V DDRIII 1333/1600 MT/s APU SMBUS AMD FT3 APU LVDS/eDP Conn E SPI BUS 3.3V 33HZ page LPC Bus 3.3V 33 MHz RTC CKT APU SMBus page 30 ENE KB9012 Touch Screen Control/B page 27 page 20 EC SMBus DC/DC Interface CKT Touch Pad page 29 page 25 Int.KBD Sub Boards CardReader GL834L(USB20 port 3) +USB (USB20 port0) +Audio Combo jack page 25 Touch pad/LED B page 28 page 25 Power Circuit DC/DC page 30~38 2013/05/15 Issued Date Power On/Off CKT & Power/B Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2015/09/27 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC page 29 Date: A B C D Block Diagram Document Number Rev 0.2 LA-A551P Friday, June 14, 2013 Sheet E of 40 DESIGN CURRENT 0.15A DESIGN CURRENT 0A +3VL +5VL B+ Ipeak=12A, Imax=8.4A, Iocp min=14A +5VALW D D SUSP# DESIGN CURRENT 4A N-CHANNEL TPS22966 +5VS ODD_PWR N-CHANNEL DESIGN CURRENT 2A +5VS_ODD RT8243A C yb er Fo ru m ru TPS22966 Ipeak=8A, Imax=5.6A, Iocp min=10A +3VALW 3VALW_APU_PWREN P-CHANNEL AO-3413 DESIGN CURRENT 330mA +3V_LAN 1.8_0.95VALW_PWREN DESIGN CURRENT 2.5A SY8032 C +3VALW_APU +1.8VALW SUSP# N-CHANNEL C +1.8VS TPS22966 VGA_PWRGD N-CHANNEL +1.8VGS TPS22966 SUSP# DESIGN CURRENT 4A N-CHANNEL +3VS LCD_ENVDD TPS22966 P-CHANNEL AO-3413 DESIGN CURRENT 1.5A +LCD_VDD DESIGN CURRENT 60mA +3VS_DGPU DGPU_PWR_EN P-CHANNEL AO-3413 DESIGN CURRENT 2A SYSON B Ipeak=12A, Imax=8.4A, Iocp min=13.8A RT8207M +3V_WLAN B +1.5V VGA_PWRGD N-CHANNEL DESIGN CURRENT 2A +1.5VGS DESIGN CURRENT 1.5A +0.75VS TPS22966 SUSP# 1.8_0.95VALW_PWREN +0.95VALW Ipeak=2.5A, Imax=1.75A, Iocp min=16A SY8208D 0.95VS_PWREN# N-CHANNEL DESIGN CURRENT 2A +0.95VS FDS6676 VR_ON RT8880A A Ipeak=15A, Imax=10.5A, Iocp min=30A APU_CORE Ipeak=13A, Imax=9.1A, Iocp min=30A APU_CORE_NB Ipeak=21A, Imax=14.7A, Iocp min=40A VGA_CORE A GPU_DPRSLPVR ISL62881 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/05/15 Deciphered Date 2015/09/27 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Power Tree Size Rev 0.2 LA-A551P Date: Document Number Friday, June 14, 2013 Sheet of 40 A B ( O MEANS ON Voltage Rails +5VL +5VALW +3VL +3VALW +1.5V +3VS +1.5VS +VSB E BTO Option Table APU Function +1.8VS +0.95VALW D +5VS +0.95VS +1.8VALW power plane UMA X MEANS OFF ) B+ +RTCVCC C +0.75VS +APU_CORE description CPU A4-5000 CPU A6-5200 explain BTO 15W 4C 25W 4C A4R1@ A6R1@ +APU_CORE_NB Function State EC description Sun-Pro M2 BTO S0 O S1 O O O O O S3 O O O S5 S4/AC O O O S5 S4/ Battery only O O O S5 S4/AC & Battery don't exist O X X APU SM Bus Address (SCL0/SDA0) Power Device +3VS DDR SO-DIMM A +3VS DDR SO-DIMM B +3VS WLAN HEX Address A0H 1010 0000 b A2H 1010 0010 b O O O Function LVDS-eDP Camera & Mic KB Light LVDS-eDP Camera & Mic KB Light Camera & Mic KB Light 9012 885 VGA 9012 w/ w/ EMI LVDS VGA@ 9012@ 885@ 885_EMI@ LVDS@ LAN S&C Size Codec Touch Screen TI solution Size ALC259 Touch Screen C yb er Fo ru m ru explain GPU eDP IEDP@ CAM@ CAM@EMI@ @CAM@EMI@ KBL@ description 8106E O O O explain 8106E TPS2546 TPS2544 14" 15" ALC259 W/ Touch W/O EMI Touch O O X BTO 8106E@ 2546@ 2544@ 14@ 15@ 259@ Touch_EMI@ @Touch_EMI@ O X X Function EMI/ESD/RF part X X X description EMI/ESD/RF part X X X EMI/ESD/RF part explain EMI@ BTO @EMI@ SIGNAL STATE ESD@ @ESD@ SLP_S3# SLP_S5# Full ON HIGH HIGH S1(Power On Suspend) HIGH HIGH S3 (Suspend to RAM) LOW HIGH S4 (Suspend to Disk) LOW HIGH S5 (Soft OFF) LOW LOW G3 LOW LOW @RF@ APU POWER SEQUENCE +RTC G-A 3VALW_APU_PWREN +3VALW_APU G-B 1.8_0.95VALW_PWREN +1.8VALW +0.95VALW EC SM Bus1 Address HEX Power Device +3VL Smart Battery 16H +3VL Charger 12H EC SM Bus2 Address Address Power Device VGA thermal 0001 0110 b +3VS APU thermal 0001 0010 b +3VS HEX 82H 98H SYSON +1.5V G-C SUSP# +3VS G-D Address 1000 0010 b 1001 1000 b +1.8VS +1.5VS +0.95VS VR_ON +APU_CORE G-E +APU_CORE_NB 4 Compal Electronics, Inc Compal Secret Data Security Classification 2013/05/15 Issued Date Deciphered Date 2015/09/27 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Notes List Rev 0.2 LA-A551P Date: A B C D Friday, June 14, 2013 Sheet E of 40 DDR_AB_DQS[0 7] DDR_AB_DQS#[0 7] DDR_AB_D[0 63] UC1A DDR_AB_MA[0 15] MEMORY M_DATA1 M_ADD2 M_DATA2 M_ADD3 M_DATA3 M_ADD4 M_DATA4 M_ADD5 M_DATA5 M_ADD6 M_DATA6 M_ADD7 M_DATA7 M_ADD9 M_DATA8 M_ADD10 M_DATA9 M_ADD11 M_DATA10 M_ADD12 M_DATA11 M_ADD13 M_DATA12 M_ADD14 M_DATA13 M_ADD15 M_DATA14 DDR_AB_DQS0 DDR_AB_DQS#0 DDR_AB_DQS1 DDR_AB_DQS#1 DDR_AB_DQS2 DDR_AB_DQS#2 DDR_AB_DQS3 DDR_AB_DQS#3 DDR_AB_DQS4 DDR_AB_DQS#4 DDR_AB_DQS5 DDR_AB_DQS#5 DDR_AB_DQS6 DDR_AB_DQS#6 DDR_AB_DQS7 DDR_AB_DQS#7 B33 A33 B40 A40 H41 H40 P41 P40 AH41 AH40 AP41 AP40 BA40 AY41 AY33 BA34 AA40 Y41 M_BANK1 M_DATA16 M_BANK2 M_DATA17 DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK1 DDR_A_CLK1# DDR_B_CLK0 DDR_B_CLK0# DDR_B_CLK1 DDR_B_CLK1# AC35 AC34 AA34 AA32 AE38 AE37 AA37 AA38 M_DM0 M_DM1 M_DM2 M_DM3 M_DM4 M_DM5 M_DM6 M_DM7 M_DM8 M_DATA19 M_DATA20 M_DATA21 M_DATA22 M_DATA23 M_DATA24 M_DATA25 M_DATA26 M_DATA27 DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK1 DDR_A_CLK1# DDR_B_CLK0 DDR_B_CLK0# DDR_B_CLK1 DDR_B_CLK1# M_DQS_L0 M_DQS_H1 M_DQS_L1 M_DQS_H2 M_DQS_L2 M_DQS_H3 M_DQS_L3 M_DQS_H4 M_DQS_L4 M_DQS_H5 M_DQS_L5 M_DQS_H6 M_DQS_L6 M_DQS_H7 M_DQS_L7 M_DQS_H8 M_DQS_L8 M_CLK_H0 M_CLK_L0 M_CLK_H1 M_CLK_L1 M_CLK_H2 M_CLK_L2 M_CLK_H3 M_CLK_L3 M_DATA28 M_DATA29 M_DATA30 M_DATA31 M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DATA39 M_DATA40 M_DATA41 M_DATA42 M_DATA43 M_DATA44 M_DATA45 M_DATA46 M_DATA47 M_DATA48 M_DATA49 M_DATA50 M_RESET_L M_DATA51 M_EVENT_L M_DATA53 M_DATA54 M_DATA55 DDR_A_CKE0 DDR_A_CKE1 DDR_B_CKE0 DDR_B_CKE1 DDR_A_CKE0 DDR_A_CKE1 DDR_B_CKE0 DDR_B_CKE1 L34 J38 J37 J34 DDR_A_ODT0 DDR_A_ODT1 DDR_B_ODT0 DDR_B_ODT1 AN38 AU38 AN37 AR37 DDR_A_SCS0# DDR_A_SCS1# DDR_B_SCS0# DDR_B_SCS1# AJ34 AR38 AL38 AN35 DDR_AB_RAS# DDR_AB_CAS# DDR_AB_WE# AJ37 AL34 AL35 +MEM_VREF AD40 AC38 M0_CKE0 M0_CKE1 M1_CKE0 M1_CKE1 M_DATA56 M_DATA57 M_DATA58 M_DATA59 B DDR_A_ODT0 DDR_A_ODT1 DDR_B_ODT0 DDR_B_ODT1 DDR_A_SCS0# DDR_A_SCS1# DDR_B_SCS0# DDR_B_SCS1# M0_ODT0 M0_ODT1 M1_ODT0 M1_ODT1 M0_CS_L0 M0_CS_L1 M1_CS_L0 M1_CS_L1 M_DATA60 M_DATA61 M_DATA62 M_DATA63 M_CHECK0 M_CHECK1 M_CHECK2 M_CHECK3 M_CHECK4 DDR_AB_RAS# DDR_AB_CAS# DDR_AB_WE# ESD@ MEM_MAB_RST# 180P_0402_50V8J M_RAS_L M_CAS_L M_WE_L M_VREF M_VREFDQ M_CHECK5 M_CHECK6 M_CHECK7 M_ZVDDIO_MEM_S FT3 REV 0.51 remove from CRB_ver0C Check List 1.02 close to APU F40 F41 K40 K41 E40 E41 J40 J41 DDR_AB_D16 DDR_AB_D17 DDR_AB_D18 DDR_AB_D19 DDR_AB_D20 DDR_AB_D21 DDR_AB_D22 DDR_AB_D23 M41 N40 T41 U40 L40 M40 R40 T40 DDR_AB_D24 DDR_AB_D25 DDR_AB_D26 DDR_AB_D27 DDR_AB_D28 DDR_AB_D29 DDR_AB_D30 DDR_AB_D31 D FT3_BGA769 UC1B PCIE R10 R8 PCIE_LANTX_ARX_P1 PCIE_LANTX_ARX_N1 LAN PCIE_WLANTX_ARX_P2 PCIE_WLANTX_ARX_N2 WLAN P_GPP_RXP0 P_GPP_TXP0 P_GPP_RXN0 P_GPP_TXN0 R5 R4 P_GPP_RXP1 P_GPP_TXP1 P_GPP_RXN1 P_GPP_TXN1 N5 N4 P_GPP_RXP2 P_GPP_RXN2 P_GPP_TXP2 P_GPP_TXN2 AF40 DDR_AB_D32 AF41 DDR_AB_D33 AK40 DDR_AB_D34 AK41 DDR_AB_D35 AE40 DDR_AB_D36 AE41 DDR_AB_D37 AJ40 DDR_AB_D38 AJ41 DDR_AB_D39 N10 N8 +0.95VS_APU_GFX RC1 P_TX_ZVDD W 1.69K_0402_1% L5 L4 PCIE_GTX_C_ARX_P0 PCIE_GTX_C_ARX_N0 PCIE_GTX_C_ARX_P1 PCIE_GTX_C_ARX_N1 VGA PCIE_GTX_C_ARX_P2 PCIE_GTX_C_ARX_N2 P_GPP_TXP3 P_GPP_RXN3 P_GPP_TXN3 P_GFX_RXP0 P_GFX_RXN0 P_GFX_RXP1 G5 G4 P_GFX_RXP2 P_GFX_TXP0 P_GFX_RXN1 P_GFX_RXN2 P_GFX_RXP3 P_GFX_RXN3 P_GFX_TXN0 P_GFX_TXP1 P_GFX_TXN1 P_GFX_TXP2 P_GFX_TXN2 P_GFX_TXP3 P_GFX_TXN3 K2 PCIE_ATX_LANRX_P1 K1 PCIE_ATX_LANRX_N1 CC31 CC41 0.1U_0402_16V7K 0.1U_0402_16V7K J2 PCIE_ATX_WLANRX_P2 CC11 J1 PCIE_ATX_WLANRX_N2 CC21 0.1U_0402_16V7K 0.1U_0402_16V7K P_RX_ZVDD RC2 1K_0402_1% +0.95VS_APU_GFX 1 VGA@ VGA@ 0.1U_0402_16V7K 0.1U_0402_16V7K F2 PCIE_ATX_GRX_P1 CC7 F1 PCIE_ATX_GRX_N1 CC8 1 VGA@ VGA@ 0.1U_0402_16V7K 0.1U_0402_16V7K E2 PCIE_ATX_GRX_P2 CC9 E1 PCIE_ATX_GRX_N2 CC10 VGA@ VGA@ 0.1U_0402_16V7K 0.1U_0402_16V7K D2 PCIE_ATX_GRX_P3 CC11 D1 PCIE_ATX_GRX_N3 CC12 VGA@ VGA@ 0.1U_0402_16V7K 0.1U_0402_16V7K VGA PCIE_ATX_C_GRX_P2 PCIE_ATX_C_GRX_N2 C PCIE_ATX_C_GRX_P3 PCIE_ATX_C_GRX_N3 AV41 DDR_AB_D48 AW 40DDR_AB_D49 BA38 DDR_AB_D50 AY37 DDR_AB_D51 AU41 DDR_AB_D52 AV40 DDR_AB_D53 AY39 DDR_AB_D54 AY38 DDR_AB_D55 BA36 DDR_AB_D56 AY35 DDR_AB_D57 BA32 DDR_AB_D58 AY31 DDR_AB_D59 BA37 DDR_AB_D60 AY36 DDR_AB_D61 BA33 DDR_AB_D62 AY32 DDR_AB_D63 FAN Control Circuit V41 W 40 AB40 AC40 U41 V40 AA41 AB41 AD41 B +5VS R2 0_0603_5% M_ZVDDIO 39.2_0402_1% RC4 C3 10U_0805_6.3V6M +1.5V 10mil 2 U4 EN VIN VOUT VSET GND GND GND GND C4 @ GND GND CVILU_CI4403M1HRT-NH R1 10K_0402_5% +3VS FAN_SPEED1 P2793BB0_SO8 C27 10U_0805_6.3V6M FAN_SPEED1 C1 0.01U_0402_25V7K @ SA00002XA00 EOL change use SA00003UO00 2nd source SA00005JO00 1K_0402_5% MEM_MAB_EVENT# A 1000P_0402_50V7K RC7 Conn@ JFAN +FAN1 1A +1.5V PCIE_ATX_C_GRX_P1 PCIE_ATX_C_GRX_N1 @ 15mil +MEM_VREF PCIE_ATX_C_GRX_P0 PCIE_ATX_C_GRX_N0 FT3 REV 0.51 EVENT# pull high RC6 1K_0402_1% WLAN G2 PCIE_ATX_GRX_P0 CC5 G1 PCIE_ATX_GRX_N0 CC6 +FAN1 A LAN PCIE_ATX_C_WLANRX_P2 PCIE_ATX_C_WLANRX_N2 H2 H1 @ MEMORY Reference Voltage (Cap follower checklist 1.02) PCIE_ATX_C_LANRX_P1 PCIE_ATX_C_LANRX_N1 AM41 DDR_AB_D40 AN40 DDR_AB_D41 AT41 DDR_AB_D42 AU40 DDR_AB_D43 AL40 DDR_AB_D44 AM40 DDR_AB_D45 AR40 DDR_AB_D46 AT40 DDR_AB_D47 DFAN1 +1.5V L2 L1 P_RX_ZVDD_095 W P_TX_ZVDD_095 J5 J4 D7 E7 PCIE_GTX_C_ARX_P3 PCIE_GTX_C_ARX_N3 P_GPP_RXP3 FT3_BGA769 M_DATA52 G38 MEM_MAB_RST# MEM_MAB_EVENT# AE34 MEM_MAB_RST# MEM_MAB_EVENT# CC94 M_DQS_H0 MEMORY C DDR_AB_D8 DDR_AB_D9 DDR_AB_D10 DDR_AB_D11 DDR_AB_D12 DDR_AB_D13 DDR_AB_D14 DDR_AB_D15 C yb er Fo ru m ru B32 B38 G40 N41 AG40 AN41 AY40 AY34 Y40 B37 A38 D40 D41 B36 A37 B41 C40 M_BANK0 M_DATA18 DDR_AB_DM0 DDR_AB_DM1 DDR_AB_DM2 DDR_AB_DM3 DDR_AB_DM4 DDR_AB_DM5 DDR_AB_DM6 DDR_AB_DM7 DDR_AB_D0 DDR_AB_D1 DDR_AB_D2 DDR_AB_D3 DDR_AB_D4 DDR_AB_D5 DDR_AB_D6 DDR_AB_D7 M_ADD8 M_DATA15 DDR_AB_BS0 DDR_AB_BS1 DDR_AB_BS2 DDR_AB_DM[0 7] B30 A32 B35 A36 B29 A30 A34 B34 AJ38 AG35 N34 M_DATA0 M_ADD1 DDR_AB_BS0 DDR_AB_BS1 DDR_AB_BS2 M_ADD0 GPP AG38 W 35 W 38 W 34 U38 U37 U34 R35 R38 N38 AG34 R34 N37 AN34 L38 L35 GRAPHICS D DDR_AB_MA0 DDR_AB_MA1 DDR_AB_MA2 DDR_AB_MA3 DDR_AB_MA4 DDR_AB_MA5 DDR_AB_MA6 DDR_AB_MA7 DDR_AB_MA8 DDR_AB_MA9 DDR_AB_MA10 DDR_AB_MA11 DDR_AB_MA12 DDR_AB_MA13 DDR_AB_MA14 DDR_AB_MA15 RC8 1K_0402_1% CC18 Compal Secret Data Security Classification 0.1U_0402_16V7K 2013/05/15 Issued Date 1 CC17 1U_0402_6.3V6K 2015/09/27 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Close to APU AD40 Date: FT3 DISP/MISC/HDT Document Number Rev 0.2 LA-A551P Friday, June 14, 2013 Sheet of 40 0.1U_0402_16V7K EDP_LCD_TXOUT0+_R CC109 EDP@ 0.1U_0402_16V7K EDP_LCD_TXOUT0-_R CC110 EDP@ EDP_LCD_TXOUT2+ EDP_LCD_TXOUT2+3VS LCD_ENBKL : APU to EC to LCD LVDS_CLK&LVDS_DATA layout follow EDP AUX route 85 ohm UC1C DISPLAY/SVI2/JTAG/TEST A9 B9 APU_HDMI_TX2+ APU_HDMI_TX2- A10 B10 APU_HDMI_TX1+ APU_HDMI_TX1- A11 B11 APU_HDMI_TX0+ APU_HDMI_TX0- CC107 CC108 EDP@ EDP@ 0.1U_0402_16V7K 0.1U_0402_16V7K DP_DIGON TDP1_TXN1 TDP1_TXN2 TDP1_AUXP TDP1_TXP3 TDP1_TXN3 EDP_LCD_TXOUT2+_R EDP_LCD_TXOUT2-_R LVDS@ 0_0402_5% LVDS@ 0_0402_5% EDP_LCD_TXOUT2+ A4 EDP_LCD_TXOUT2- B4 LTDP0_TXP0 EDP_LCD_TXOUT1+_R EDP_LCD_TXOUT1-_R CC107 CC108 LVDS@ 0_0402_5% LVDS@ 0_0402_5% EDP_LCD_TXOUT1+ A5 EDP_LCD_TXOUT1- B5 LTDP0_TXP1 RC77 RC78 LVDS@ 0_0402_5% LVDS@ 0_0402_5% EDP_LCD_TXOUT0+ A6 EDP_LCD_TXOUT0- B6 LCD_TXCLK+ LCD_TXCLK- LTDP0_TXN0 TDP1_HPD LTDP0_AUXP LTDP0_AUXN LCD_TXCLK+ LCD_TXCLK- A7 B7 LTDP0_TXN1 LTDP0_HPD K15 H15 +3VS EC_SMB_CK2 EC_SMB_DA2 RC26 1K_0402_5% APU_PROCHOT# +1.8VS APU_PWRGD RC32 RC34 300_0402_5% 300_0402_5% APU_RST# G31 D27 E29 B22 B21 APU_RST# B20 A20 APU_PWRGD B19 A19 APU_PWRGD APU_PROCHOT# APU_ALERT# A22 B18 A14 LTDP0_TXP3 DAC_BLUE B15 LTDP0_TXN3 DAC_VSYNC RPC2 SVT DAC_SDA APU_TDI APU_TRST# DP_STEREOSYNC APU_ALERT# 1K_8P4R_5% RC28 B APU_DBREQ# 1K_0402_5% ESD@ APU_RST# CC99 1000P_0402_50V7K ESD@ APU_PWRGD CC93 180P_0402_50V8J close to APU DC1 @ESD@ SCV00001K00 TP@ T32 TP@ T37 SVD DAC_ZVSS SIC THERMDA SID APU_RST_L LDT_RST_L APU_PWROK THERMDC DIECRACKMON BP0 BP1 BP2 BP3 LDT_PWROK PLLTEST1 PROCHOT_L BYPASSCLK_H ALERT_L BYPASSCLK_L APU_PROCHOT# close to APU TDI PLLCHRZ_L TDO TCK M_TEST TMS TRST_L DBRDY APU_VDD_SEN_L TP@ T15 D23 G23 VDDMEM_SENSE E25 E23 TP@ T18 TP@ T19 VDD095_FB_H AV33 VDD095_FB_L AU33 APU_CRT_HSYNC RC18 EDP_LVDS_HPD RC45 2 1K_0402_5% @ 100K_0402_5% EDP_LVDS_HPD EDP/LVDS EDP Cap co-lay CC101 CC103 EDP@ EDP@ 0.1U_0402_16V7K 0.1U_0402_16V7K G19 APU_CRT_HSYNC E19 D19 D21 DBREQ_L FREE_2 USB_ATEST1 VDDCR_CPU_SENSE M_ANALOGIN VDDIO_MEM_S_SENSE VDD_095_FB_H VDD_095_FB_L H27 H29 D25 A27 B27 A26 B26 B28 A28 B24 A24 AV35 AU35 E33 EDP_LVDS_HPD RC44 EDP@ 100K_0402_5% LCD_ENBKL RC19 100K_0402_5% LCD_INT_PWM RC20 100K_0402_5% M_ANALOGOUT TMON_CAL 499_0402_1% TEST4 TEST5 T1 TP@ T2 TP@ TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST25_H TEST25_L TEST28_H TEST28_L TEST31 T3 TP@ T4 TP@ T5 TP@ T6 TP@ T34 TP@ T35 TP@ C route TEST25_H/L AND TEST28_H/L differentially T7 TP@ T8 TP@ T9 TP@ +1.8VS A29 GIO_TSTDTM0_CLKINIT H25 VDDCR_NB_SENSE VSS_SENSE A16 DAC_ZVSS RC21 GIO_TSTDTM0_SERIALCLKH21 USB_ATEST0 APU_VDDNB_SEN_H APU_VDD_SEN_H EDP_LVDS_CLK EDP_LVDS_DATA SVC MISC +3VS APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ# HDMI DISP_CLKIN_L TEST TP@ T28 +1.8VS D EDP_LVDS_DATA_R RC15 LVDS@ 4.7K_0402_5% HDMI DDC PU RES move to HDMI page APU_HSYNC PU FOR INTERNAL(HDMI enable) DISP_CLKIN_H PLLCHRZ_H D29 D31 D35 D33 G27 B25 A25 EDP/LVDS HDMI_HPD H17 EDP_LVDS_HPD B14 PLLTEST0 APU_PROCHOT# APU_HDMI_CLK APU_HDMI_DATA D15 EDP_LVDS_CLK_R CC1011 LVDS@ 0_0402_5% E15 EDP_LVDS_DATA_RCC1031 LVDS@ 0_0402_5% DAC_RED MISC C EDP_LVDS_CLK_R RC14 LVDS@ 4.7K_0402_5% LCD_ENBKL LCD_ENVDD LCD_INT_PWM H19 DAC_GREEN DAC_SCL APU_SVT APU_SVC APU_SVD 150_0402_1% 2K_0402_1% D17 APU_HDMI_CLK E17 APU_HDMI_DATA LTDP0_TXN2 LTDP0_TXP2 DAC_HSYNC SVT,SVC,SVD, APU_PWRGD is 1.8V Output PROCHOT is 3.3V Input DP_150_ZVSS RC13 DP_2K_ZVSS RC9 LCD_ENBKL LCD_ENVDD LCD_INT_PWM TDP1_TXP2 RC75 RC76 EDP_LCD_TXOUT0+_R EDP_LCD_TXOUT0-_R DP_VARY_BL B16 A21 B17 A17 A18 C yb er Fo ru m ru EDP/LVDS DP_2K_ZVSS TDP1_TXP1 TDP1_AUXN A12 B12 APU_HDMI_CLK+ APU_HDMI_CLK- EDP use Lane for FHD EDP Cap co-lay DP_150_ZVSS TDP1_TXN0 DISPLAY HDMI TDP1_TXP0 DP_BLON D AJ10 AJ8 R32 N32 AP29 HDMI_EN/DP_STEREOSYNCE21 TEST36 TEST37 TEST42 TEST43 TEST39 TEST40 TEST41 T12 TP@ T13 TP@ T14 TP@ T16 TP@ T17 TP@ TEST25_L TEST36 TEST37 RC35 RC37 RC39 @ @ DP_STEREOSYNC RC36 @ TEST36 TEST37 RC41 RC46 @ @ TEST25_H RC43 510_0402_1% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 510_0402_1% DP_STEREOSYNC DP_STEREOSYNC Used to align shutter glasses with the interleaved video frame @ B RPC4 FT3 REV 0.51 FT3_BGA769 NOTE: DP_STEREOSYNC & APU_HSYNC PU FOR INTERNAL(HDMI enable), DP_STEREOSYNC & APU_HSYNC PD FOR CUSTOMER(HDMI disable) APU_TMS APU_TCK TEST19 TEST18 +1.8VS 1K_8P4R_5% A A Compal Secret Data Security Classification 2013/05/15 Issued Date 2015/09/27 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: FT3 DISP/MISC/HDT Document Number Rev 0.2 LA-A551P Friday, June 14, 2013 Sheet of 40 UC1E CLK/SATA/USB/SPI/LPC W4 USBCLK/14M_25M_48M_OSC SATA_TX0P SATA_TX0N USB_ZVSS BA16 AY16 SATA_RX0N AY19 BA19 SATA_TX1P AY17 BA17 SATA_RX1N 1K_0402_1%SATA_ZVSS AR19 1K_0402_1%SATA_ZVSS_095 AP19 SATA_ZVSS SATA_RX0P USB_HSD0P USB_HSD0N SATA_TX1N USB_HSD1P +0.95VS RC58 RC59 T20 SATA_ACT SATA_RX1P SATA_ZVDD_095 BA30 SATA_ACT_L/GPIO67 AY12 SATA_X1 SATA USB_HSD1N D USB_HSD2P USB_HSD2N USB_HSD3P USB_HSD3N USB_HSD4P USB_HSD4N TP@ USB_HSD5P LAN WLAN CLK_PCIE_VGA CLK_PCIE_VGA# CLK_LAN CLK_LAN# CLK_WLAN CLK_WLAN# C U4 U5 USB_HSD6P USB_HSD6N USB_HSD7P GFX_CLKN USB_HSD7N AC8 AC10 GPP_CLK0P USB_HSD8P GPP_CLK0N USB_HSD8N AE4 AE5 GPP_CLK1P USB_HSD9P GPP_CLK1N USB_HSD9N AC4 AC5 GPP_CLK2P AA5 AA4 GPP_CLK3P USB_SS_0TXP GPP_CLK3N USB_SS_0TXN X14M_25M_48M_OSC USB_SS_0RXP AP13 48M_X1 GFX_CLKP N2 CLK VGA SATA_X2 GPP_CLK2N USB_SS_ZVSS SERIRQ EMI@ RC62 RC63 EMI@ N1 AG7 AG8 USB20_P2 USB20_N2 AG1 AG2 USB20_P3 USB20_N3 AF1 AF2 USB20_P4 USB20_N4 22_0402_5%LPC_CLK0 AY2 0_0402_5% LPC_CLK1 AW AT2 AT1 AR2 AR1 AP2 AP1 AV29 AP25 AV2 AD1 AD2 AC1 AC2 AB1 AB2 AA1 AA2 AE10 USBSS_ZVSS USBSS_ZVDD RC60 RC61 LAD2 LAD3 USB2.0-Right1 USB20_P9 USB20_N9 USB2.0-Right2 +0.95VALW USB30_TX0P USB30_TX0N USB3.0-Right1 USB30_RX0P USB30_RX0N R1 R2 USB30_TX1P USB30_TX1N USB_SS_1RXP C USB3.0-Right2 USB30_RX1P USB30_RX1N EMI@ LPCCLK1 LAD1 USB20_P8 USB20_N8 1K_0402_1% 1K_0402_1% T2 T1 LPCCLK0 LAD0 D Touch Screen AE1 AE2 W1 USB_SS_1RXN W X48M_X2 SPI_CLK/GPIO162 SPI EC USB20_P1 USB20_N1 X48M_X1 LPC 48M_X2 USB2.0-Left1 (Debug Port) WLAN (BT) Cardreader Int Camera USB20_P0 USB20_N0 V2 USB_SS_0RXN V1 USB_SS_1TXN LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# 11.8K_0402_1% AJ4 AJ5 AE8 USB_SS_ZVDD_095_USB3_DUAL USB_SS_1TXP CLK_PCI_EC CLK_PCI_DDR RC57 AL4 AL5 C yb er Fo ru m ru BA12 USB USB_HSD5N AG4 USB_ZVSS LFRAME_L AU7 SPI_CS1_L/GPIO165 AW SPI_CS2_L/GPIO166 AR4 SPI_DO/GPIO163 SPI_DI/GPIO164 AR11 AR7 APU_SPI_CLK APU_SPI_CS1# APU_SPI_CS2# APU_SPI_MOSI APU_SPI_MISO RC130 T21 TP@ APU_SPI_WP# T22 TP@ APU_SPI_CLK_R 0_0402_5% SATA_DTX_C_ARX_N0 SATA_DTX_C_ARX_P0 RC10 10_0402_5% @EMI@ SPI_HOLD_L/GEVENT9_LAU11 SPI_WP_L/GPIO161 AU9 LDRQ0_L SERIRQ/GPIO48 LPC_CLKRUN_L LPC_PD_L/GEVENT5_L/SPI_TPM_CS_L SATA HDD BA14 AY14 SATA_ATX_DRX_P0 SATA_ATX_DRX_N0 CC13 10P_0402_50V8J @EMI@ FT3 REV 0.51 FT3_BGA769 B 48KMHz CRYSTAL 48M_X2 @ B SPI ROM 48M_X1 RC64 2 1M_0402_5% 4 RC66 YC1 48MHZ_8PF_X3S048000D81H-W CC22 4.7P_0402_50V8J RC1011 885@ RC1021 885@ RC1211 885_EMI@2 RC1241 885@ EC_SPIDO EC_SPIDI EC_SPICLK EC_SPICS# 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% 4M Byte UC5 10K_0402_5% APU_SPI_MOSI APU_SPI_CLK_R APU_SPI_CS1# +3VALW_APU CC23 4.7P_0402_50V8J Socket: SP07000F500/SP07000H900 Please place UC5 close to UC1 APU, 4MB ROM P/N: SA00004LI00 A SI SO APU_SPI_MISO SCLK CS HOLD WP VCC GND MX25L3205DM2I-12G SO8 CC25 0.1U_0402_16V4Z A SW said ROM can change to 4MB Compal Secret Data Security Classification 2013/05/15 Issued Date 2015/09/27 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: FT3-SATA/CLK/USB/SPI/LPC Document Number Rev 0.2 LA-A551P Friday, June 14, 2013 Sheet of 40 SD_CLK/GPIO73 RSMRST_L SD_CMD/GPIO74 TEST0 TEST1/TMS TEST2 AR23 AR31 AN5 AL7 KB_RST# GATEA20 EC_SCI# EC_SMI# SYS_PWRGD AU13 AY10 AY6 WAKE_L/GEVENT8_L SLP_S3_L SLP_S5_L TEST0 TEST1/TMS TEST2 SLP_S3#, SLP_S5# PU reserve BA22 AY21 AY24 SD_DATA3/GPIO80 BA24 SD_DATA0/GPIO77 SD_DATA2/GPIO79 AP15 AV13 BA9 BA10 AV15 SD_LED/GPIO45 SCL0/GPIO43 AU25 AV25 APU_SCLK0 APU_SDATA0 AY11 BA11 APU_SCLK1 APU_SDATA1 SDA0/GPIO47 KBRST_L SCL1/GPIO227 GA20IN/GEVENT0_L SDA1/GPIO228 LPC_SMI_L/GEVENT23_L GPIO49 USB_OC#0 USB_OC#2 USB_CHG_OC# CLKREQ_LAN# CLKREQ_PEG# C @EMI@ 10P_0402_50V8J @ @ 10K_0402_5% 10K_0402_5% AZ_BITCLK_HD AZ_SDOUT_HD AZ_SDIN0_HD AZ_SYNC_HD AZ_RST_HD# AZ_BITCLK_HD HDA_BITCLK AZ_SDIN0_HD CC30 10P_0402_50V8J 2 10P_0402_50V8J PULL HIGH PULL LOW BOOT FAIL TIMER BOOT FAIL TIMER DISABLED HDA_SYNC HDA_RST# AN2 AN1 AK2 AK1 AM1 AL2 AM2 AL1 GPIO64 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60 CLK_REQ1_L/GPIO61 CLK_REQ2_L/GPIO62 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63 CLK_REQG_L/GPIO65/OSCIN USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L USB_OC1_L/TDI/GEVENT13_L USB_OC2_L/TCK/GEVENT14_L CLKGEN ENABLE SPI ROM DEFAULT DEFAULT CLKGEN DISABLED LPC ROM AZ_SYNC AZ_RST_L AJ2 X32K_X1 32K_X2 AJ1 X32K_X2 GPIO70 GPIO71 GEVENT2 RTC_CLK NORMAL POWR UP/RESET TIMING 3.3V SPI ROM GENINT1_L/GPIO32 GENINT2_L/GPIO33 FAST POWER UP/RESET TIMING FOR SIMULATION PXS_RST# RC1331 VGA@ C EC_LID_OUT# AV31 AU31 RTCCLK AV11 1K_0402_5% EC_LID_OUT# VGA_PWRGD +3VALW_APU EC_LID_OUT# RC94 For HDMI RTC_CLK 10K_0402_5% +3VS RTC_CLK @ RC12 @ 1K_0402_5% TEST0 RC16 @ 1K_0402_5% TEST1/TMS RC5 @ 15K_0402_5% RC17 @ 1K_0402_5% TEST2 RC11 @ 15K_0402_5% HDMI_HPD_N RPC6 RC3 15K_0402_5% PXS_PWREN PXS_EN# Board_ID0 Board_ID1 QC2 2N7002KW_SOT323-3 HDMI_HPD +3VS +3VALW_APU 10K_8P4R_5% VGA@ B PXS_RST# Add 2013/5/30 for RTC issue H CC48 @ESD@ 180P_0402_50V8J close to APU PANEL_SEL eDP panel LVDS panel +3VS PANEL_SEL RC95 10K_0402_5% TOUCH@ RC99 1K_0402_5% NTOUCH@ RC126 10K_0402_5% LVDS@ Board Conf Board_ID0 Board_ID1 PX5 0 Reserved DIS UMA 1 TOUCH_SEL QC3A 2N7002KDWH_SOT363-6 VGA@ QC3B 2N7002KDWH_SOT363-6 PXS_EN# VGA@ PXS_PWREN EC_PXCONTROL EC_PXCONTROL Non Touch Touch Panel Panel (turn off EHCI) For DIS +3VS RC125 10K_0402_5% EDP@ L RC110 10K_0402_5% RC114 2K_0402_5% A @ RC115 2K_0402_5% Compal Secret Data Security Classification 2013/05/15 Issued Date 2015/09/27 Deciphered Date Title 2 Place at GPU L @ RC111 2K_0402_5% 2 UMA@ 10K_0402_5% UMA@ 10K_0402_5% 1 1 RC1371 RC1381 SW request HDMI_HPD_N THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Board_ID0 Board_ID1 FT3 REV 0.51 TOUCH_SEL GEVENT2 RTC_CLK @ RC113 2K_0402_5% 2.2K_8P4R_5% GEVENT2 21 1 2 1 RC106 10K_0402_5% @ RC109 10K_0402_5% A RC112 2K_0402_5% +3VS +3VALW_APU +3VS BA29 AP23 FANIN0/GPIO56 FANOUT0/GPIO52 RTC CLK H CLK_PCI_EC CLK_PCI_DDR LPC_FRAME# GPIO174 PD CHK1.03 APU_GPIO174 AV17 BA4 AR15 GEVENT10_L AP17 GEVENT11_L AP11 GEVENT17_L AN8 BLINK/GEVENT18_L AU17 GEVENT22_L BA6 +3VALW_APU RC108 10K_0402_5% PXS_RST# APU_SPKR PXS_PWREN PXS_PWREN TOUCH_SEL APU_SDATA0 APU_SCLK0 APU_SCLK1 APU_SDATA1 DEFAULT DEFAULT @ RC107 10K_0402_5% RPC1 Board_ID0 Board_ID1 PXS_RST# GEVENT7_L AZ_SDIN0/GPIO167 AZ_SDIN3/GPIO170 GPIO69 APU SMBus0 for S0 , SMBus1 for S5 If APU_SMBUS no use pull high 10K SP@ PANEL_SEL 32K_X2 1.8V SPI ROM DEFAULT JPW GEVENT4_L AZ_SDOUT AZ_SDIN2/GPIO169 GPIO68 APU_SCLK1 APU_SDATA1 +3VALW_APU 32.768KHZ_7PF_Q13MC1461000100 LPC_FRAME# PW_CLEAR# GEVENT2_L AZ_BITCLK AZ_SDIN1/GPIO168 SPKR/GPIO66 GPIO174 USB_OC3_L/TDO/GEVENT15_L 32K_X1 STRAP PINS CLK_PCI_DDR 33_0402_5% 33_0402_5% HDA_BITCLK HDA_SDOUT AZ_SDIN0_HD IR_LED_L/LLB_L/GPIO184 FT3_BGA769 CLK_PCI_EC RC98 RC1001 USB_OC#2 GPIO59 RC104 20M_0402_5% B USB_OC#2 EMI@ 33_0402_5% 33_0402_5% GPIO58 IR_RX1/GEVENT20_L 32K_X1 YC2 CC31 RC92 RC93 AY8 AW AV1 AY1 D LPC_RST# RC74 100K_0402_5% @ 10K_0402_5% RC23 APU_PCIE_WAKE# RC25 APU_GPIO174 10K_0402_5% CC15 USB_OC#0 USB_CHG_OC# USB_OC#0 USB_CHG_OC# 100K_8P4R_5% AP27 AY28 BA28 AV23 AP21 BA26 AV19 AY27 BA27 AU21 AY26 AV21 AM21 BA3 150P_0402_50V8J APU_SCLK0 APU_SDATA0 GPIO57 GPIO RPC5 GPIO55 MSIC CLKREQ_WLAN# +3VALW_APU RC96 RC97 AU29 AW 29 AR27 AV27 AY29 IR_TX1/GEVENT6_L HDA LAN_EN IR_TX0/GEVENT21_L 33_0402_5% CC27 LPC_PME_L/GEVENT3_L AC_PRES/IR_RX0/GEVENT16_L RC73 LPC_RST#_R AY25 GPIO51 SLP_S3# SLP_S5# A_RST# is for LPC devices SD_DATA1/GPIO78 IR 2.2K_0402_5% 2.2K_0402_5% @ @ C yb er Fo ru m ru RC128 RC129 150P_0402_50V8J AY23 AY20 BA20 S SLP_S3# SLP_S5# AY3 BA5 SYS_RESET_L/GEVENT19_L APU_PCIE_RST# RC72 @ 100K_0402_5% SLP_S3# SLP_S5# PWR_GOOD SD_WP/GPIO76 G APU_PCIE_WAKE# PWR_BTN_L CC28 SYS_PWRGD TP@ T23 TP@T23 APU_PCIE_WAKE# BA8 AM19 AY7 AW 11 GPIO50 +3VALW_APU 33_0402_5% PCIE_RST_L BA23 AY22 2 10K_0402_5% AY5 SD_PWR_CTRL SD_CD/GPIO75 PBTN_OUT# SYS_PWRGD +1.8VALW RC127 RC68 APU_PCIE_RST#_R LPC_RST_L RSMRST# AY4 AY9 21 CC29 LPC_RST#_R APU_PCIE_RST#_R close to APU 1U_0402_6.3V6K UC1D ACPI/SD/AZ/GPIO/RTC/MISC CH751H-40PT_SOD323-2 D PCIE_RST# is for PCIE devices on APU ESD@ SYS_PWRGD 180P_0402_50V8J RSMRST# 2 SD EC_RSMRST# Sequence DC2 1 CC97 47K_0402_5% RC71 +1.8VALW D Follow check list & ORB_0C design 10 ms RC delay circuit on +1.8-V S5 power rail FT3 GPIO/AZ/MISC Document Number Rev 0.2 LA-A551P Friday, June 14, 2013 Sheet of 40 UC1F 3A +1.5V +1.5V CC14 1@ 2 CC16 1@ 22U_0603_6.3V6M 22U_0603_6.3V6M 0.1U_0402_16V7K CC37 0.1U_0402_16V7K CC43 0.1U_0402_16V7K CC36 0.1U_0402_16V7K CC42 0.1U_0402_16V7K CC35 2 0.1U_0402_16V7K CC41 0.1U_0402_16V7K CC34 1.8VALW & 1.8VS OF APU VDD_18 +1.8VALW 0.5A 0_0603_5% VDDCR_CPU_3 L25 VDDIO_MEM_S_5 VDDIO_MEM_S_6 VDDIO_MEM_S_7 VDDIO_MEM_S_8 VDDIO_MEM_S_9 VDDIO_MEM_S_10 VDDIO_MEM_S_11 VDDIO_MEM_S_12 VDDIO_MEM_S_13 VDDIO_MEM_S_14 VDDIO_MEM_S_15 VDDIO_MEM_S_16 VDDIO_MEM_S_17 VDDIO_MEM_S_18 VDDIO_MEM_S_19 VDDIO_MEM_S_20 VDDIO_MEM_S_21 VDDIO_MEM_S_22 VDDIO_MEM_S_23 VDDCR_NB_3 N11 VDDCR_NB_4 N13 1.5A 2 1U_0402_6.3V6K CC64 1U_0402_6.3V6K CC63 1U_0402_6.3V6K CC62 1U_0402_6.3V6K CC61 1U_0402_6.3V6K CC60 1U_0402_6.3V6K CC59 1U_0402_6.3V6K CC58 10U_0603_6.3V6M CC57 1U_0402_6.3V6K CC55 1U_0402_6.3V6K CC54 1U_0402_6.3V6K CC53 1U_0402_6.3V6K CC52 1U_0402_6.3V6K CC51 1U_0402_6.3V6K CC50 CC49 VDDCR_NB_5 N17 VDDCR_NB_7 R13 VDDCR_NB_8 R17 VDDCR_NB_9 U13 VDDCR_NB_10 U17 VDDCR_NB_11 W 13 VDDCR_NB_12 W 17 VDDCR_NB_13 AA13 VDDCR_NB_14 AA17 VDDCR_NB_15 AC13 VDDCR_NB_16 AC17 VDDCR_NB_17 AE15 VDDCR_NB_18 AE17 VDDCR_NB_19 AE19 VDDCR_NB_20 AG17 VDDCR_NB_21 AG21 AL10 AL11 0.5A 3.3VALW & 3.3VS OF APU B1 B2 +1.8VALW_APU VDDIO_AZ_ALW_1 VDDIO_AZ_ALW_2 VDD_18_ALW_1 VDD_18_1 VDD_18_ALW_2 VDD_18_2 VDD_18_3 VDD_18_4 for VDDIO_AZ_ALW 1A CC66 2 2 1U_0402_6.3V6K CC70 1 4.7U_0603_6.3V6K 0.2A 0.1A +0.95VALW_APU_USB3 1U_0402_6.3V6K CC72 1U_0402_6.3V6K CC71 0.5A VDD_33_1 VDD_33_ALW_2 VDD_33_2 VDD_095_USB3_DUAL_1 VDD_095_1 VDD_095_USB3_DUAL_2 VDD_095_2 VDD_095_USB3_DUAL_3 VDD_095_3 VDD_095_USB3_DUAL_4 VDD_095_4 VDD_095_5 +0.95VALW_APU AR5 AU4 AV7 AW VDD_33_ALW_1 AE11 AE13 AJ11 AJ13 VDD_095_ALW_1 VDD_095_6 VDD_095_ALW_2 VDD_095_7 VDD_095_ALW_3 VDD_095_8 VDD_095_ALW_4 VDD_095_9 1.5A A2 A3 B3 C3 +1.8VS AM15 AM17 AG23 AG27 AJ21 AJ27 AL21 AL23 AL27 AM23 AM25 4.5uA VDD_095_GFX_2 W 10 AN4 +3VS_APU 5A +0.95VS_APU VSS_63 VSS_2 VSS_64 VSS_3 VSS_65 VSS_4 VSS_66 VSS_5 VSS_67 VSS_6 VSS_68 VSS_7 VSS_69 VSS_8 VSS_70 VSS_9 VSS_71 VSS_10 VSS_72 VSS_11 VSS_73 VSS_12 VSS_74 VSS_13 VSS_75 VSS_14 VSS_76 VSS_15 VSS_77 VSS_16 VSS_78 VSS_17 VSS_79 VSS_18 VSS_80 VSS_19 VSS_81 VSS_20 VSS_82 VSS_21 VSS_83 VSS_22 VSS_84 VSS_23 VSS_85 VSS_24 VSS_86 VSS_25 VSS_87 VSS_26 VSS_88 VSS_27 VSS_89 VSS_28 VSS_90 VSS_29 VSS_91 VSS_30 VSS_92 VSS_31 VSS_93 VSS_32 VSS_94 VSS_33 VSS_95 VSS_34 VSS_96 VSS_35 VSS_97 VSS_36 VSS_98 VSS_37 VSS_99 VSS_38 VSS_100 VSS_39 VSS_101 VSS_40 VSS_102 VSS_41 VSS_103 VSS_42 VSS_104 VSS_43 VSS_105 VSS_44 VSS_106 VSS_45 VSS_107 VSS_46 VSS_108 VSS_47 VSS_109 VSS_48 VSS_110 VSS_49 VSS_111 VSS_50 VSS_112 VSS_51 VSS_113 VSS_52 VSS_114 VSS_53 VSS_115 VSS_54 VSS_116 VSS_55 VSS_117 VSS_56 VSS_118 VSS_57 VSS_119 VSS_58 VSS_120 VSS_59 VSS_121 VSS_60 VSS_122 VSS_61 VSS_123 VSS_62 VSS_124 J3 J7 J8 J39 K11 K13 K17 K19 K21 K23 K25 K27 K29 K31 L3 L7 L8 L10 L11 L15 L19 L31 L39 L41 M1 M2 N3 N7 N15 N19 N25 N29 N31 N39 P1 P2 R3 R7 R15 R19 R25 R29 R39 R41 U1 U2 U3 U7 U8 U11 U15 U19 U25 U29 U31 U39 W3 W5 W 11 W 15 W 19 W 25 +0.95VS_APU_GFX AMD CKL v1.01 @ 2 2 1U_0402_6.3V6K CC85 VSS_192 VSS_131 VSS_193 VSS_132 VSS_194 VSS_133 VSS_195 VSS_134 VSS_196 VSS_135 VSS_197 VSS_136 VSS_198 VSS_137 VSS_199 VSS_138 VSS_200 VSS_139 VSS_201 VSS_140 VSS_202 VSS_141 VSS_203 VSS_142 VSS_204 VSS_143 VSS_205 VSS_144 VSS_206 VSS_145 VSS_207 VSS_146 VSS_208 VSS_147 VSS_209 VSS_148 VSS_210 VSS_149 VSS_211 VSS_150 VSS_212 VSS_151 VSS_213 VSS_152 VSS_214 VSS_153 VSS_215 VSS_154 VSS_216 VSS_155 VSS_217 VSS_156 VSS_218 VSS_157 VSS_219 VSS_158 VSS_220 VSS_159 VSS_221 VSS_160 VSS_222 VSS_161 VSS_223 VSS_162 VSS_224 VSS_163 VSS_225 VSS_164 VSS_226 VSS_165 VSS_227 VSS_166 VSS_228 VSS_167 VSS_229 VSS_168 VSS_230 VSS_169 VSS_231 VSS_170 VSS_232 VSS_171 VSS_233 VSS_172 VSS_234 VSS_173 VSS_235 VSS_174 VSS_236 VSS_175 VSS_237 VSS_176 VSS_238 VSS_177 VSS_239 VSS_178 VSS_240 VSS_179 VSS_241 VSS_180 VSS_242 VSS_181 VSSBG_DAC VSS_182 VBURN VSS_183 PSEN D C VSS_184 VSS_185 VSS_186 @ B 10uF 1uF 180pF 1 2 +0.95VS_APU_GFX LC1 0.6A FBMA-L11-201209-300LMA30T 1 5A 2 2 route to 20mil SP@ JCMOS 2 2 2 Compal Secret Data Security Classification 2013/05/15 Issued Date 2015/09/27 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: VSS_191 VSS_130 +0.95VS_APU 1 PJ2 JUMP_43X79 @ 1U_0402_6.3V6K CC88 RC122 10K_0402_5% VSS_190 VSS_129 RC123 120_0402_5% 2 0.22U_0402_16V7K CC98 DC5 CH751H-40PT_SOD323-2 0.5A 0_0603_5% 1U_0402_6.3V6K CC84 4.5uA A +0.95VALW_APU 1U_0402_6.3V6K CC82 +RTC_APU_R +0.95VALW RC120 1U_0402_6.3V6K CC80 +RTC_APU +RTC 0_0603_5% 1U_0402_6.3V6K CC79 VDDIO_33 +3VL RC119 1U_0402_6.3V6K CC78 VDDIO_33_ALW RTC OF APU 10U_0603_6.3V6M CC77 VDDIO_AZ_ALW 1A VSS_128 AL39 AL41 AM11 AM27 AM31 AN3 AN7 AN39 AP31 AR3 AR13 AR17 AR21 AR25 AR29 AR39 AR41 AU1 AU2 AU3 AU15 AU19 AU23 AU27 AU39 AV9 AW AW AW 13 AW 15 AW 17 AW 19 AW 21 AW 23 AW 25 AW 27 AW 31 AW 33 AW 35 AW 37 AW 39 AW 41 AY13 AY15 AY18 AY30 BA2 BA7 BA13 BA15 BA18 BA21 BA25 BA31 BA35 BA39 A15 AL31 AM29 +0.95VS +0.95VALW_APU_USB3 1U_0402_6.3V6K CC83 +0.95VALW 180pF VSS_189 VDD_095_USB3_DUAL VDD_095 VDD_095_ALW VDD_095_GFX 0.95VALW & 0.95VS OF APU 1uF VSS_188 VSS_127 FT3 REV 0.51 Place on TOP AMD CKL v1.01 4.7uF VSS_187 VSS_126 FT3_BGA769 @ FT3 REV 0.51 FT3_BGA769 VSS_125 FT3 REV 0.51 FT3_BGA769 VDD_095_GFX_3 AA10 VDDBT_RTC_G W 29 W 39 W 41 Y1 Y2 AA3 AA7 AA8 AA11 AA15 AA19 AA25 AA29 AA39 AC3 AC7 AC11 AC15 AC19 AC25 AC29 AC31 AC39 AC41 AE3 AE7 AE25 AE29 AE32 AE39 AG3 AG5 AG10 AG11 AG13 AG15 AG19 AG25 AG29 AG31 AG39 AG41 AH1 AH2 AJ3 AJ7 AJ15 AJ17 AJ19 AJ23 AJ25 AJ29 AJ31 AJ32 AJ39 AL3 AL8 AL15 AL17 AL19 AL25 AL29 0.6A VDD_095_GFX_1 U10 +RTC_APU 0.2A GND VSS_1 10U_0603_6.3V6M CC87 1U_0402_6.3V6K CC75 1U_0402_6.3V6K CC74 for VDDIO_33_ALW 0_0603_5% AL13 AM13 +3VALW_APU 0.2A RC117 0.2A +1.5VS +3VS_APU 1U_0402_6.3V6K CC69 +3VS 1U_0402_6.3V6K CC67 +3VALW_APU +APU_CORE_NB VDDCR_NB_2 L17 +1.5VS B 13A/17A VDDCR_NB_1 L13 0.1A A8 A13 A23 A31 A35 A39 B8 B13 B23 B31 B39 C1 C2 C5 C7 C9 C11 C13 C15 C17 C19 C21 C23 C25 C27 C29 C31 C33 C35 C37 C39 C41 D9 D11 D13 E3 E4 E9 E11 E13 E27 E31 E35 E38 E39 G3 G7 G11 G13 G15 G17 G21 G25 G29 G35 G37 G39 G41 H11 H13 H23 H31 VDDCR_CPU_4 L27 VDDCR_CPU_5 L29 VDDCR_CPU_6 N21 VDDCR_CPU_7 N23 VDDCR_CPU_8 N27 VDDCR_CPU_9 R21 VDDCR_CPU_10 R23 VDDCR_CPU_11 R27 VDDCR_CPU_12 U21 VDDCR_CPU_13 U23 VDDCR_CPU_14 U27 VDDCR_CPU_15 W 21 VDDCR_CPU_16 W 23 VDDCR_CPU_17 W 27 VDDCR_CPU_18 AA21 VDDCR_CPU_19 AA23 VDDCR_CPU_20 AA27 VDDCR_CPU_21 AC21 VDDCR_CPU_22 AC23 VDDCR_CPU_23 AC27 VDDCR_CPU_24 AE21 VDDCR_CPU_25 AE23 VDDCR_CPU_26 AE27 VDDIO_MEM_S_4 UC1H GND +APU_CORE VDDCR_NB_6 R11 4.7U_0603_6.3V6K C VDDIO_MEM_S_3 +1.8VS +1.8VALW_APU RC116 VDD_18_ALW VDDCR_CPU_2 L23 C yb er Fo ru m ru AMD CKL v1.01 10uF 4.7uF 1uF 180pF VDDCR_CPU_1 L21 VDDIO_MEM_S_2 10U_0603_6.3V6M CC86 0.1U_0402_16V7K CC33 D 10U_0603_6.3V6M CC40 10U_0603_6.3V6M CC39 3A VDDIO_MEM_S_1 UC1G 15A/21A POWER J35 L32 L37 N35 R31 R37 U32 U35 W 31 W 32 W 37 AA31 AA35 AC32 AC37 AE31 AE35 AG32 AG37 AJ35 AL32 AL37 AR35 1U_0402_6.3V6K CC96 10U_0603_6.3V6M CC95 1U_0402_6.3V6K CC92 VDDIO_MEM_S 180pF 1U_0402_6.3V6K CC91 1.5V OF APU 0.1uF 1U_0402_6.3V6K CC90 AMD CKL v1.01 10uF 1U_0402_6.3V6K CC89 FT3 PWR/GND Document Number Rev 0.2 LA-A551P Friday, June 14, 2013 Sheet of 40 A DDR_AB_DQS#2 DDR_AB_DQS2 DDR_AB_D18 DDR_AB_D19 DDR_AB_D24 DDR_AB_D25 DDR_AB_DM3 DDR_AB_D26 DDR_AB_D27 DDR_A_CKE0 DDR_A_CKE0 DDR_AB_BS2 DDR_AB_BS2 C DDR_AB_MA12 DDR_AB_MA9 DDR_AB_MA8 DDR_AB_MA5 DDR_AB_MA3 DDR_AB_MA1 DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK0 DDR_A_CLK0# DDR_AB_MA10 DDR_AB_BS0 DDR_AB_BS0 DDR_AB_WE# DDR_AB_CAS# DDR_AB_WE# DDR_AB_CAS# DDR_AB_MA13 DDR_A_SCS1# DDR_A_SCS1# DDR_AB_D32 DDR_AB_D33 DDR_AB_DQS#4 DDR_AB_DQS4 B DDR_AB_D34 DDR_AB_D35 DDR_AB_D40 DDR_AB_D41 DDR_AB_DM5 DDR_AB_D42 DDR_AB_D43 DDR_AB_D48 DDR_AB_D49 DDR_AB_DQS#6 DDR_AB_DQS6 DDR_AB_D50 DDR_AB_D51 DDR_AB_D56 DDR_AB_D57 DDR_AB_DM7 DDR_AB_D58 DDR_AB_D59 +3VS +0.75VS CD20 0.1U_0402_16V4Z A 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 205 207 CKE0 VDD NC BA2 VDD A12/BC# A9 VDD A8 A5 VDD A3 A1 VDD CK0 CK0# VDD A10/AP BA0 VDD W E# CAS# VDD A13 S1# VDD TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT GND1 BOSS1 RD1 1K_0402_1% DDR_AB_DQS#[0 7] CKE1 VDD A15 A14 VDD A11 A7 VDD A6 A4 VDD A2 A0 VDD CK1 CK1# VDD BA1 RAS# VDD S0# ODT0 VDD ODT1 NC VDD VREF_CA VSS DQ36 DQ37 VSS DM4 VSS DQ38 DQ39 VSS DQ44 DQ45 VSS DQS5# DQS5 VSS DQ46 DQ47 VSS DQ52 DQ53 VSS DM6 VSS DQ54 DQ55 VSS DQ60 DQ61 VSS DQS7# DQS7 VSS DQ62 DQ63 VSS EVENT# SDA SCL VTT GND2 BOSS2 DDR_AB_DM[0 7] +VREF_DQA +VREF_CAA DDR_AB_MA[0 15] D MEM_MAB_RST# DDR_AB_D14 DDR_AB_D15 CD1 DDR_AB_D20 DDR_AB_D21 DDR_AB_DM2 DDR_AB_D22 DDR_AB_D23 @ CD2 DDR_AB_D28 DDR_AB_D29 RD3 1K_0402_1% @ CD4 CD3 Close to JDDR3L.1 RD4 1K_0402_1% Close to JDDR3L.126 DDR_AB_DQS#3 DDR_AB_DQS3 DDR_AB_D30 DDR_AB_D31 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 DDR_A_CKE1 DDR_A_CKE1 DDR_AB_MA15 DDR_AB_MA14 C DDR_AB_MA11 DDR_AB_MA7 DDR_AB_MA6 DDR_AB_MA4 DDR_AB_MA2 DDR_AB_MA0 DDR_A_CLK1 DDR_A_CLK1# DDR_AB_BS1 DDR_AB_RAS# DDR_A_SCS0# DDR_A_ODT0 DDR_A_ODT1 DDR_A_CLK1 DDR_A_CLK1# DDR_AB_BS1 DDR_AB_RAS# DDR_A_SCS0# DDR_A_ODT0 DDR_A_ODT1 +VREF_CAA DDR_AB_D36 DDR_AB_D37 Layout Note: Place these Caps near Command and Control signals of DIMMA Layout Note: Place near JDDR3L DDR_AB_DM4 DDR_AB_D38 DDR_AB_D39 B +1.5V Change CD43 from 47u 0805 to CD43&CD44 22u*2 0603 DDR_AB_D44 DDR_AB_D45 DDR_AB_DQS#5 DDR_AB_DQS5 DDR_AB_D46 DDR_AB_D47 CD44 22U_0603_6.3V6M CD43 22U_0603_6.3V6M CD10 10U_0603_6.3V6M CD11 10U_0603_6.3V6M CD13 10U_0603_6.3V6M CD5 0.1U_0402_16V4Z CD14 10U_0603_6.3V6M CD6 0.1U_0402_16V4Z CD16 10U_0603_6.3V6M CD7 0.1U_0402_16V4Z CD18 10U_0603_6.3V6M CD8 0.1U_0402_16V4Z Layout Note: Place near JDDR3L.203 and 204 +1.5V DDR_AB_D52 DDR_AB_D53 DDR_AB_DM6 DDR_AB_D54 DDR_AB_D55 +0.75VS 1U_0402_6.3V6K CD12 1U_0402_6.3V6K CD9 DDR_AB_D60 DDR_AB_D61 DDR_AB_DQS#7 DDR_AB_DQS7 DDR_AB_D62 DDR_AB_D63 MEM_MAB_EVENT# APU_SDATA0 APU_SCLK0 MEM_MAB_EVENT# APU_SDATA0 APU_SCLK0 A +0.75VS 206 208 Compal Electronics, Inc Compal Secret Data Security Classification LCN_DAN06-K4406-0103 Conn@ 2013/05/15 Issued Date Deciphered Date 2015/09/27 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: RD2 1K_0402_1% DDR_AB_D[0 63] DDR_AB_D12 DDR_AB_D13 DDR_AB_DM1 MEM_MAB_RST# DDR_AB_DQS[0 7] DDR_AB_D6 DDR_AB_D7 +1.5V 2.2U_0402_6.3V6M DDR_AB_D16 DDR_AB_D17 +1.5V DDR_AB_DQS#0 DDR_AB_DQS0 2.2U_0402_6.3V6M DDR_AB_D10 DDR_AB_D11 SO-DIMM VREF DDR_AB_DQS#1 DDR_AB_DQS1 DDR_AB_D4 DDR_AB_D5 D 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 0.1U_0402_16V7K DDR_AB_D8 DDR_AB_D9 VSS DQ4 DQ5 VSS DQS0# DQS0 VSS DQ6 DQ7 VSS DQ12 DQ13 VSS DM1 RESET# VSS DQ14 DQ15 VSS DQ20 DQ21 VSS DM2 VSS DQ22 DQ23 VSS DQ28 DQ29 VSS DQS3# DQS3 VSS DQ30 DQ31 VSS DDR_AB_D2 DDR_AB_D3 VREF_DQ VSS DQ0 DQ1 VSS DM0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 VSS DQ26 DQ27 VSS DDR_AB_DM0 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 C yb er Fo ru m ru +VREF_DQA DDR_AB_D0 DDR_AB_D1 DDR3 SO-DIMM A Reverse Type +1.5V JDDR3L +1.5V 0.1U_0402_16V7K DDRIII-SODIMMA Document Number Rev 0.2 LA-A551P Friday, June 14, 2013 Sheet 10 of 40 20 mil EC_MUTE_INT D MIC1_VREFO_L MIC1_VREFO_R MIC2_VREFO 15 14 20 @ESD@ 0.01U_0402_25V7K CA65 12 MONO_IN CA25 2.2U_0603_10V6K AC_JDREF LDO_CAP RA30 20K_0402_1% AC_VREF CA60 10U_0603_6.3V6M CPVEE CBN CA54 2.2U_0402_6.3V6M 1 CBP CA55 CA53 2.2U_0402_6.3V6M 0.1U_0402_10V7K INT_MIC_DATA INT_MIC_CLK_R @ RA34 20K_0402_1% MONO_OUT SPK_OUT_L+ SPK_OUT_LHPOUT_R HPOUT_L SDATA_OUT SDATA_IN JDREF LDO_CAP VREF CPVEE CBN CBP 13 18 COMBO_GPI 47 BCLK LINE1_L LINE1_R NC GPIO0/DMIC_DATA GPIO1/DMIC_CLK SENSE_A SENSE_B EAPD PD# C For EMI reserve +PVDD +PVDD 45 44 SPKR+ SPKR- 40 41 33 32 AVSS1 AVSS2 PVSS1 PVSS2 DVSS Thermal Pad CA45 0.1U_0402_16V4Z close to pin9 75_0402_1% RA19 RA20 75_0402_1% CA70 2 CA27 100P_0402_50V8J +1.5VS CA33 0.1U_0402_10V7K close to pin39 SENSE A close to pin46 Function 39.2K PORT-I (PIN 32, 33) Headphone out 20K PORT-B (PIN 21, 22) Ext MIC 10K PORT-C (PIN 23, 24) CA51 @EMI@ 1 @EMI@ AZ_BITCLK_HD 10_0402_5% RA41 10P_0402_50V8J C Combo Jack For EMI reserve close to codec +MIC1_VREFO_L Rshort@ RA7 0_0603_5% SPK_L1 Rshort@ RA8 0_0603_5% SPK_L2 CA31 1000P_0402_50V7K @EMI@ SPKR+ Rshort@ RA9 0_0603_5% SPKR- Rshort@ RA10 0_0603_5% 1 2 SPK_R2 2.2K_0402_5% RA35 EXT_MIC 1K_0402_5% LA8 EMI@ 11 COMBO_GPI CA48 10U_0603_6.3V6M 22K_0402_5% if need EMI material will use SM01000GK00 HP_R LA7 HP_L Rshort@ 0_0603_5% CA75 2 @EMI@ place close to chip A SENSE_A NBA_PLUG 39.2K RA61 39.2K_0402_1% PORT-E (PIN 14, 15) 20K PORT-F (PIN 16, 17) 10K PORT-H (PIN 20) Compal Secret Data Security Classification 2013/05/15 Issued Date 2015/09/27 Deciphered Date Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: B PL (PIN 48) 5.1K PR Rshort@ LA6 0_0603_5% @EMI@ EXT_MIC_L 0_0402_5% MIC1_LINE1_R_L CA36 1000P_0402_50V7K @EMI@ Change material to SM01000GK00 RA69 RA71 CA30 1000P_0402_50V7K @EMI@ SPK_R1 MIC1_LINE1_R_R A SENSE B CA35 10U_0603_6.3V6M @ RA45 0_0603_5% @ RA46 0_0603_5% @ RA43 0_0603_5% RA38 @EMI@ 0_0603_5% RA31 @EMI@ 0_0603_5% For EMI reserve close to codec 100P_0402_50V8J Codec Signals D AZ_BITCLK_HD CA74 Impedance +5VS CA32 0.1U_0402_10V7K AZ_SDOUT_HD AZ_SDIN0_HD RA23 33_0402_5% CA34 1000P_0402_50V7K @EMI@ Sense Pin AGND MONO_IN For better sound by customer request +PVDD 49 0.1U_0402_10V7K RA49 4.7K_0402_5% RA25 0_0603_5% 10U_0603_6.3V6M 26 37 42 43 SPKL- 47K_0402_5% +5VS 23 24 48 SPKL+ RA52 RA21 0_0603_5% CA50 60 mil 0_0402_5% SPK PCI Beep CA37 10U_0603_6.3V6M 0.1U_0402_10V7K HP_R HP_L AZ_BITCLK_HD 2W 4ohm =40mil 1W 8ohm =20mil APU_SPKR CA3 2.2U_0402_6.3V6M CA47 Enable Disable Beep sound CA42 close to pin 38 0.1U_0402_10V7K HDALink is 1.5V AZ_SDIN0_HD_R Internal AMP B +DVDD_IO HPOUT_R HPOUT_L DGND EC_MUTE# Hight LOW close to pin 25 2 SPKL+ SPKL- ALC259-VC2-CG_MQFN48_6X6 259@ INT_MIC_CLK_R RA42 FBMA-10-100505-301T CAM_EMI@ +3VS close to pin1 RESET# 19 28 27 34 35 36 SENSE_A SENSE_B EC_MUTE# INT_MIC_CLK SPK_OUT_R+ SPK_OUT_R- 10 mil close to pin 28 +AVDD +AVDD 39 46 CA4 0.1U_0402_16V4Z RA1 LINE2_R LINE2_L SYNC 11 close to pin19 PVDD1 PVDD2 25 38 PCBEEP 10 AZ_SYNC_HD AZ_RST_HD# AVDD1 AVDD2 +DVDD +DVDD_IO 100P_0402_50V8J +MIC1_VREFO_L MIC2_R MIC2_L CA69 31 30 29 DVDD DVDD_IO 22K_0402_5% 17 16 MIC1_R MIC1_L 22 21 RA70 MIC1_LINE1_R_C_R MIC1_LINE1_R_C_L +AVDD CA58 CA57 0_0402_5% C yb er Fo ru m ru 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K +DVDD 650mA for 5V level 40 mil RA22 UA1 MIC1_LINE1_R_R MIC1_LINE1_R_L 35mA for 3.3V level 100P_0402_50V8J Cover Sheet Rev 0.2 Sheet Friday, June 14, 2013 26 of 40 +3VL CB3 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K 1 CB2 CB5 CB4 0.1U_0402_10V7K 0.1U_0402_10V7K C KSI[0 7] KSI[0 7] KSO[0 17] KSO[0 17] SMBUS1->BATT, Smart Charger SMBUS2->G-Sensor,GPU Thermal Sensor, APU Thermal Sensor EC SMBus2 for S0 , SMBus1 for S5 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 RPB1 +3VL +3VS EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 SLP_S3# SLP_S5# EC_SMI# USB_OC#2 USB_CHG_OC# USB_CHG_EN USB_EN#2 KB_LED FAN_SPEED1 WL_OFF# E51_TXD E51_RXD SYS_PWRGD BT_ON NUM_LED# 2.2K_0804_8P4R_5% B EC_MUTE_INT RTC_CLK ESD@ SYS_PWRGD 0.1U_0402_10V7K SUSP# 180P_0402_50V8J 55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 77 78 79 80 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 14 15 16 17 18 19 25 28 29 30 31 32 34 36 E51_TXD Rshort@ EC_MUTE_INT_R XCLKO RB25 Rshort@ 0_0402_5% RB20 0_0402_5% P.32_SYS_PWRGD OD/L for 1.8V PU APU Close to EC 122 123 RB22 100K_0402_5% 67 DA Output KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 Int K/B KSO6/GPIO26 Matrix KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49 EC_SMB_CK1/GPIO44 EC_SMB_DA1/GPIO45 SM EC_SMB_CK2/GPIO46 EC_SMB_DA2/GPIO47 PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C GPIO0D EC_INVT_PWM/GPIO11 FAN_SPEED1/GPIO14 EC_PME#/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 PCH_PWROK/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A XCLKI/GPIO5D XCLKO/GPIO5E CB16 20P_0402_50V8 E51_TXD EC_ON_R RB28 4.7K_0402_5% EC_MUTE#/GPIO4A USB_EN#/GPIO4B CAP_INT#/GPIO4C EAPD/GPIO4D TP_CLK/GPIO4E TP_DATA/GPIO4F PS2 Interface CPU1.5V_S3_GATE/GPXIOA00 WOL_EN/GPXIOA01 ME_EN/GPXIOA02 VCIN0_PH/GPXIOD00 BATT_PRES USB_OC#0 ADP_I ADP_V 68 70 71 72 83 84 85 86 87 88 SPI Flash ROM GPIO Bus GPIO SPIDI/GPIO5B SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A ENBKL/GPIO40 PECI_KB930/GPIO41 FSTCHG/GPIO50 BATT_CHG_LED#/GPIO52 CAPS_LED#/GPIO53 PWR_LED#/GPIO54 BATT_LOW_LED#/GPIO55 SYSON/GPIO56 VR_ON/GPIO57 PM_SLP_S4#/GPIO59 EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04 PROCHOT_IN/GPXIOA05 H_PROCHOT#_EC/GPXIOA06 VCOUT0_PH/GPXIOA07 GPO BKOFF#/GPXIOA08 PBTN_OUT#/GPXIOA09 PCH_APWROK/GPXIOA10 SA_PGOOD/GPXIOA11 AC_IN/GPXIOD01 EC_ON/GPXIOD02 ON/OFF/GPXIOD03 GPI LID_SW#/GPXIOD04 SUSP#/GPXIOD05 GPXIOD06 PECI_KB9012/GPXIOD07 V18R 9012@ RB36 0_0402_5% TP_CLK TP_DATA S D VGATE GPU_DOWN# POK VCIN0_PH 119 120 126 128 73 74 89 90 91 92 93 95 121 127 100 101 102 103 104 105 106 107 108 110 112 114 115 116 117 118 124 RB35 LID_SW# VCIN0_PH connect to power portion (9012 only) EC_SPIDI EC_SPIDO EC_SPICLK EC_SPICS# ILIM_SEL SYSON VR_ON 1.8_0.95VALW_PWREN Nuvoton EC share ROM ILIM_SEL +3VS 10K_0402_5% @ RB23 +3VALW_APU Rshort@ VCOUT0_PH_L RB34 0_0402_5% VS_ON VCOUT0_PH connect to power portion (9012 only) H_PROCHOT_EC H/L, no PU/PD PBTN_OUT# H/L, no PU/PD BKOFF# PBTN_OUT# 3VALW_APU_PWREN EC_PXCONTROL C 4.7K_0804_8P4R_5% LCD_ENBKL WOL_EN# ILIM_SEL BATT_FULL_LED# CAPS_LED# PWR_SUSP_LED# BATT_CHG_LOW_LED# SYSON VR_ON 1.8_0.95VALW_PWREN EC_RSMRST# EC_LID_OUT# PROCHOT_IN H_PROCHOT_EC VCOUT0_PH_L RPB2 VR_ON SYSON TP_DATA TP_CLK ACIN EC_ON_R B ON/OFFBTN# LID_SW# SUSP# EC_CHG_CB0 EC_CHG_CB1 LID_SW# SUSP# 1.8_0.95VALW_PWREN RB26 10K_0402_5% RB21 10K_0402_5% SUSP# +EC_V18R KB9012QF-A4_LQFP128_14X14 CB15 4.7U_0805_10V4Z DB1 1U_0402_6.3V6K CB50 @ >1.2V H Vin Dectector PC244 0.1U_0402_25V6 VIN PC242 0.1U_0603_16V7K BQ24725RGRR_QFN20_3P5X3P5 BQ24725_ILIM ACIN BQ24725_BATDRV 11 PR227 0.01_1206_1% ILIM SCL BATDRV 10 PR239 +3VL ACOK SDA 12 PR236 10_0603_1% CSOP1 SRP1 PR237 6.8_0603_5% CSON1 SRN1 13 1 SRN BQ24725_ACDRV 14 ACDRV AON7406L SRP DL_CHG CMSRC CHG @EMI@ PC206 @EMI@ PR206 680P_0603_50V8J 4.7_1206_5% GND 16 REGN BTST PQ202 15 BATT+ PC240 0.1U_0402_25V6 PL202 4.7UH_ETQP3W4R7WFN_5.5A_20% BQ24725_LX ACP IOUT PQ201 AON7408L PC205 LODRV BQ24725_CMSRC PC234 0.01U_0402_50V7K PR210 0_0603_5% DH_CHG ACN ACDET 2 BQ24725_BATDRV_1 PD231 RB751V-40_SOD323-2 BQ24725_REGN2 PR229 2.2_0603_5% BQ24725_BST 17 18 19 20 PAD HIDRV PHASE 21 2 1U_0603_25V6K PU200 PR233 4.12K_0603_1% PC237 DH_CHG PR228 10_1206_1% BQ24725_LX 1 BQ24725_VCC BQ24725_BATDRV 0.047U_0402_25V7K VCC PC235 0.1U_0402_25V6 PC238 0.1U_0402_25V6 1 PR235 4.12K_0603_1% 1U_0603_25V6K BQ24725_ACN PD230 BAS40CW_SOT323-3 PC239 BQ24725_ACP PR234 4.12K_0603_1% PC236 0.1U_0402_25V6 BQ24725_ACDRV_1 C yb er Fo ru m ru VIN 1 S TR SI7716ADN PQ207 EMI@ PL201 1UH_NRS4018T1R0NDGJ_3.2A_30% 2 PR211 0.01_1206_1% PC213 10U_0805_25V6K 4 PC230 2200P_0402_50V7K B+ SI7716ADN-T1-GE3_POWERPAK8-5 P2 P1 PQ203 PC231 0.1U_0402_25V6 VIN PQ205 TPCA 8057 EMI Part (47.1) 1 3M_0402_5% @EMI@ PC214 2200P_0402_25V7K 1M_0402_5% PC211 10U_0805_25V6K PR225 PQ209 2N7002FU_SOT23 4 Please locate the RC Near EC chip 2011-02-22 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/09/27 Deciphered Date 2015/09/27 Title CHARGER THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.1 LA-A551P Date: A B C Sheet D 32 of 40 A B C D 1 G D PQ333 2N7002FU_SOT23 S 3VALW_APU_PWREN PR339 0_0402_5% 3/5VALW controller (35.1), Support component (35.2) @ PR350 30K_0402_1% EMI Part (47.1) 3/5V_B+ LDO3 15 LDO5 SECFB 14 13 LG_5V PU330 RT8243AZQW_WQFN20_3X3 PQ352 PC341 4.7U_0603_10V6K FDMC7692S_MLP8-5 2 PC342 1U_0603_10V6K PR338 100K_0402_1% PC344 4.7U_0603_10V6K ENLDO 2 @ PR332 100K_0402_5% @ PR341 0_0402_5% VS_ON LX_5V 16 PR340 2.2K_0402_1% PC343 4.7U_0805_25V6-K 3.3V Peak Current 3.78A OCP current 4.57A Delta I=1.160A ,ripple=1.160 x17m=19.27mV FSW=455kHz ESR 20mohm TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :19mohm , 23.5mohm PC360 0.1U_0603_25V7K EC_ON LGATE1 17 +3VLP PR334 499K_0402_1% 3/5V_B+ EMI Part (35.33) ENLDO VIN AON7406L PQ332 12 11 2 + @EMI@ PR336 @EMI@ PC336 680P_0603_50V8J 4.7_1206_5% SNUB_3V PC354 150U_D2_6.3VY_R15M PHASE1 LGATE2 PL352 2.2UH_MMD-06CZ-2R2M-V1_8A_20% 2 SNUB_5V 10 UG_5V LG_3V PHASE2 BST_5V 18 PC355 0.1U_0402_10V7K BST1_5V 2 1 +3VL + 5V Peak Current 9A OCP current 11.05A FSW=390kHz Delta I=2.791A,ripple=2.791*15m=41.865mV ESR 20mohm TYP MAX H/S Rds(on) ::27mohm , 34mohm L/S Rds(on) :10.8mohm , 13.6mohm @ PJ332 +3VLP +5VALWP EMI Part (47.1) PC353 150U_D2_6.3VY_R15M UGATE1 LX_3V 19 PR355 0_0402_5% FB1 TON UGATE2 20 @EMI@ PC356 @EMI@ PR356 680P_0603_50V8J 4.7_1206_5% +3VALWP 1 BYP1 BOOT2 PGOOD AON7408L UG_3V PQ351 21 BST_3V PAD BOOT1 PL332 4.7UH_ETQP3W4R7WFN_5.5A_20% 2 PR351 19.1K_0402_1% PC361 10U_0805_25V6K FB_5V ENTRIP1 PC335 PR333 0.1U_0402_10V7K 0_0402_5% BST1_3V FB2 ENTRIP2 +3VL FB_3V C yb er Fo ru m ru POK PQ331 AON7408L PC340 10U_0805_25V6K PR331 20K_0402_1% 2 PR337 107K_0402_1% PR342 56K_0402_1% PR357 150K_0402_1% @EMI@ PC339 2200P_0402_50V7K 1 PR330 14K_0402_1% 3/5V_B+ EMI@ PL331 HCB2012KF-121T50_0805 PR335 100K_0402_1% B+ @ +3VALWP JUMP_43X39 1 PJ331 2 +3VALW JUMP_43X118 @ +5VALWP 1 PJ351 2 +5VALW JUMP_43X118 4 LA-A551P Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2011/06/24 Deciphered Date 2012/07/12 Title 3VALW/5VALW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.1 Date: A B C Sheet D 33 of 40 A DDR controller (35.3), Support component (35.4) EMI@ PL151 HCB2012KF-121T50_0805 EMI Part (47.1) 1.5V_B+ +0.75VSP +5VALW 1 2 VTTREF_1.5V +1.5VP FB PC163 0.033U_0402_16V7K PR160 10.2K_0402_1% +1.5VP PR161 825K_0402_1% PR162 10K_0402_1% EN_1.5V @ PJ151 @ PC166 0.1U_0402_10V7K SUSP# PR164 0_0402_5% 1 EN_0.75VSP SYSON FB_1.5V TON_1.5V 1.5V_B+ @ PR163 0_0402_5% PC160 10U_0603_6.3V6M PC164 1U_0603_10V6K VDDQ 2 19 17 20 VTT BOOT 21 VDD +5VALW VTTREF S3 GND RT8207MZQW_WQFN20_3X3 VDDP S5 11 VDD_1.5V CS 12 TON PR159 5.1_0603_5% 2 FDMC7692S_MLP8-5 PQ152 PC162 1U_0603_10V6K PAD VTTSNS PC156 @EMI@ 680P_0402_50V7K PU150 VTTGND PGND 14 PR158 13K_0402_1% 2CS_1.5V PR156 @EMI@ 4.7_1206_5% LGATE VLDOIN 15 UGATE 13 SNUB_+1.5VP PC157 + 220U_D2_2V_Y 16 DL_1.5V 18 SW_1.5V PC159 10U_0603_6.3V6M PC155 0.1U_0603_25V7K PQ151 AON7408L +1.5VP +1.5V BST_1.5V C yb er Fo ru m ru PL152 1UH_PCMB063T-1R0MS_12A_20% PR155 0_0603_5% DH_1.5V PC154 10U_0805_25V6K PC152@EMI@ 2200P_0402_50V7K BST_1.5V-1 PHASE PGOOD 10 B+ JUMP_43X118 +1.5VP +0.75VS JUMP_43X79 S3 S5 1.5VP S0 Hi Hi On On S3 Lo Hi On On Lo Lo S4/S5 1 +1.5V JUMP_43X118 1.5V Peak Current 8.1A OCP current 9.66A FSW=500kHz DCR 8.3 ~ 10mohm TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :10.8mohm , 13.6mohm STATE @ PJ152 VTT_REFP 2 +0.75VSP @ PJ750 0.75VSP On Off (Hi-Z) Off Off Off (Discharge) (Discharge) (Discharge) Compal Electronics, Inc Compal Secret Data Security Classification Issued Date Note: S3 - sleep ; S5 - power off @ PC167 0.1U_0402_10V7K 2011/06/24 Deciphered Date 2012/07/12 Title 1.5VP/0.75VSP/1.8VSP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.1 LA-A551P Date: A Sheet 34 of 40 A B C D 1.8V controller (35.15), Support component (35.16) 1 +3VALW Need create Symbol 1.8V Peak Current 2.5A OCP current 3.5A FSW=800kHz Note:Iload(max)=3A PR451 100K_0402_1% +1.8_EN +1.8VALWP 2 +1.8VALW JUMP_43X79 (2.5A,100mils ,Via NO.=5) H/S Rds(on) :100mohm , L/S Rds(on) :80mohm , PR453 49.9K_0402_1% 1 FB=0.6V EN SY8032ABC_SOT23-6 FB @ PC453 0.1U_0402_16V7K @ PJ451 +1.8VALWP PC451 22U_0603_6.3V6M GND PC452 22U_0603_6.3V6M PG PC450 22P_0402_50V8J IN PL451 1UH_NRS4018T1R0NDGJ_3.2A_30% LX C yb er Fo ru m ru PR452 0_0402_5% 1.8_0.95VALW_PWREN PC458 22U_0603_6.3V6M PU450 0.95V controller (35.27), Support component (35.28) PR404 0_0402_5% 1.8_0.95VALW _PW REN 0.95V Peak Current 7.1A OCP current 16A FSW=800kHz @ PC454 0.01U_0402_16V7K 3 EMI Part (47.1) @EMI@ PR401 @EMI@PC403 4.7_1206_5% 680P_0603_50V7K 2SNB_0.95V1 PL402 EMI@ PU400 PR406 100K_0402_1% PC412 22U_0603_6.3V6M +0.95VALWP PC406 22U_0603_6.3V6M 2 PC401 22U_0603_6.3V6M FB=0.6V 2 SY8208DQNC_QFN10_3X3 PC411 2.2U_0603_6.3V6K +3VALW PC407 22U_0603_6.3V6M LDO FB +3VALW PG PL401 1UH_PCMB063T-1R0MS_12A_20% 2 BYP LX_0.953V PC408 22U_0603_6.3V6M ILMT 10 LX GND PC405 0.1U_0603_25V7K PC409 4700P_0402_50V7K BS PR403 1K_0402_1% EN PC402 4.7U_0603_6.3V6K 1 IN PR402 66.5K_0402_1% B+_0.95V 10U_0805_25V6K PC410 @EMI@ PC404 HCB2012KF-121T50_0805 2200P_0402_50V7K B+ H/S Rds(on) :22mohm L/S Rds(on) :11mohm EMI Part (47.1) @ PJ1 +0.95VALW P 1 +0.95VALW JUMP_43X118 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/09/27 Deciphered Date 2015/09/27 Title +1.8VALWP/+0.95VALWP ZRMAE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C Sheet Friday, June 14, 2013 D 35 of 40 Rev 0.1 B C PC535 PR571 330P_0402_50V7K 2K_0402_1% 2 UGATE_NB1 PC559 @ @ PR501 820P_0402_50V7K 100_0402_1% 2 +APU_CORE PR522 0_0402_5% 2 PC560 0.01U_0402_50V7K APU_VDD_SEN_H PR521 0_0402_5% APU_VDD_SEN_L PR520 10_0402_5% 2012/09/27 Issued Date Title Deciphered Date PC507 33U_25V_M PC508 @EMI@ PC522 2200P_0402_50V7K 2 1 PR540 EMI@ 4.7_1206_5% PR541 3.65K_0402_1% VSUM+ VSUM- PR547 1_0402_1% +CPU_CORE/VDDNBP Date: C +APU_CORE Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC B APU_core TDC 15A(A) 13A(B) Peak Current 21A(A) 18A(B) OCP current > 26.58A Load line -4mV/A FSW=400kHz DCR 0.98mohm +/-5% TYP MAX H/S Rds(on) :11.2mohm , 14mohm L/S Rds(on) :3.8mohm , 4.8mohm Compal Secret Data Security Classification A 33U_25V_M PC506 10U_0805_25V6K PC505 10U_0805_25V6K PR504 PC557 2K_0402_1% 330P_0402_50V7K 2 PR502 10_0402_5% EMI Part (47.1) SNB_APU EMI@ PC527 680P_0603_50V7K PR507 PC554 137K_0402_1% 390P_0402_50V7K 2 PR508 1.87K_0402_1% 4 LGATE1 @ PR503 374_0402_1% NTC near phase choke PR509 @ 32.4K_0402_1% 2 PC553 330P_0402_50V7K PC556 0.1U_0402_16V7K 1 PR505 11K_0402_1% PH504 10K_0402_5%_ERTJ0ER103J 12 PR506 2.61K_0402_1% PC558 0.1U_0603_50V7K PC555 0.1U_0402_16V4Z 2 NTC near CPU_CORE H/S mos PC552 100P_0402_25V8K 2 PL503 0.22UH_MMD-06DZNR22EO1L_25A_20% 25W@ PQ508 TPCA8059-H_PPAK56-8-5 ISEN1 PC551 PR510 1000P_0402_50V7K 301_0402_1% 2 VSUM- PC523 0.22U_0603_25V7K PR511 10K_0402_1% VSUM+ PC519 10U_0805_25V6K PQ506 TPCA8059-H_PPAK56-8-5 PR533 2.2_0603_5% BOOT1-1 BOOT1 ISEN2 0_0402_5% 4.7_1206_5% PQ503 AON7518_DFN8-5 PR570 2.2_0603_5% UGATE1 PR599 PR519 1_0402_1% PC520 10U_0805_25V6K 1 PC549 1000P_0402_50V7K 2 PHASE1 1 APU_B+ 1 VGATE +APU_CORE_NB SNB_APU_NB +3VS 20 19 18 BOOT1 PC548 1U_0603_25V6K UGATE1 21 PHASE1 22 PGOOD COMP FB RTN BOOT1 VSEN IMON 23 UGATE1 LGATE1 PR596 100K_0402_1% +5VS @EMI@PC534 @EMI@ PC534 2200P_0402_50V7K 31 BOOT_NB UGATE_NB 32 34 35 36 37 38 33 PHASE_NB LGATE_NB PGOOD_NB COMP_NB FB_NB 39 40 PWROK 17 10.5K_0402_1% PR597 27.4K_0402_1% 1 PR598 PH503 470K_0402_5%_TSM0B474J4702RE PHASE1 PR590 1_0603_5% 24 PC547 1U_0603_25V6K 10 @ PC561 1000P_0402_50V7K PR595 133K_0402_1% PC550 1000P_0402_50V7K 2 LGATE1 ENABLE 16 SVT ISUMN APU_PWRGD 26 25 VDD 15 VR_ON APU_CORE_NB TDC 13A(A) 12A(B) Peak Current 17A(A) 15A(B) OCP current > 21.39A Load line -4mV/A FSW=400kHz DCR 0.98mohm +/-5% TYP MAX H/S Rds(on) :11.2mohm , 14mohm L/S Rds(on) :3.8mohm , 4.8mohm +5VS 27 VDDP VDDIO ISUMP APU_SVT ISL62771HRTZ-T_TQFN40_5X5 PR516 3.65K_0402_1% VSUMN_NB 28 LGATE2 SVD NTC PR588 0_0402_5% PC545 0.1U_0402_25V6 2 PC546 0.1U_0402_25V6 VR_HOT_L + VSUMP_NB 29 PHASE2 14 APU_SVD SVC ISEN1 APU_PROCHOT# + B+ 30 BOOT2 UGATE2 13 APU_SVC IMON_NB 11 PR585 133K_0402_1% +1.8VS NTC_NB PR584 0_0402_5% SVC PR586 0_0402_5% PR587 0_0402_5% SVD PR589 0_0402_5% VDDIO PR591 0_0402_5% SVT PR592 0_0402_5% ENABLE PR593 0_0402_5% PWROK VSEN_NB PC544 1000P_0402_50V7K 2 ISUMN_NB PU500 ISEN2 470K_0402_5%_TSM0B474J4702RE PH502 12 PR583 10.5K_0402_1% TP 27.4K_0402_1% ISUMP_NB 41 BOOT_NB1 PR582 EMI@ PR517 LGATE_NB1 PHASE_NB1 PL502 0.22UH_MMD-06DZNR22EO1L_25A_20% EMI@ PC514 LGATE_NB1 680P_0603_50V7K PHASE_NB1 25W@ PQ504 TPCA8059-H_PPAK56-8-5 0.22U_0603_25V7K PR512 2.2_0603_5% PC510 BOOT_NB1-1 BOOT_NB11 @ PR581 @ PC543 100_0402_1% 220P_0402_50V7K 2 PQ501 AON7518_DFN8-5 1 PR569 2.2_0603_5% UGATE_NB1 PR580 301_0402_1% VSUMN_NB PC542 0.1U_0603_50V7K PC541 0.1U_0402_16V7K 1 PC540 0.1U_0402_16V4Z 2 PR579 11K_0402_1% C yb er Fo ru m ru PH501 10K_0402_5%_ERTJ0ER103J 12 PR578 2.61K_0402_1% PC539 0.01U_0402_50V7K VSUMP_NB PL504 EMI@ HCB2012KF-121T50_0805 APU_B+ PC538 100P_0402_25V8K PR576 PC537 PR577 0_0402_5% 1000P_0402_50V7K 301_0402_1% 2 PL501 EMI@ HCB2012KF-121T50_0805 PR573 1.5K_0402_1% PQ502 TPCA8059-H_PPAK56-8-5 +APU_CORE_NB EMI Part (47.1) CPU controller (36.1),Driver (36.2) Support component (36.3) 390P_0402_50V7K PC536 PR574 PR575 137K_0402_1% 41.2K_0402_1% 2 PR572 10_0402_5% E APU_VDDNB_SEN_H D ISENA1N-1 A D Rev 1.0 LA-A551P Friday, June 14, 2013 Sheet E 36 of 40 D D VGA controller (43.1),Driver (43.2) Support component (43.3) EMI Part (47.1) +VGA_CORE TDC 21A EDC 31.5A OCP current ??A FSW=??kHz DCR 1.4m ohm +-5% TYP H/S Rds(on) :11.7mohm , L/S Rds(on) :2.7mohm , PR823 10K_0402_1% @ PR830 10K_0402_1% PR831 10K_0402_1% PR832 10K_0402_1% @ PR833 10K_0402_1% PR29 0_0402_5% 2.61K_0402_1% 2 10KB_0402_5%_ERTJ1VR103J B value:4250K±2% 1 PC899 560U_D2_2VM_R4.5M PH7 + 2 PR818 11K_0402_1% PC820 0.047U_0402_16V7K B PC821 0.1U_0402_16V7K PR822 1.2K_0402_1% 2 @ PR836 10K_0402_1% PR837 10K_0402_1% @ PR838 10K_0402_1% PR839 10K_0402_1% PR840 10K_0402_1% PR821 @ @ GPU_VID1 @ GPU_VID2 @ GPU_VID3 @ GPU_VID4 @ 0_0402_5% 0.1U_0402_16V7K 1PC822 PR827 0_0402_5% PR826 0_0402_5% PR825 0_0402_5% PR824 0_0402_5% GPU_ISUM- GPU_VID5 PXS_PWREN + PR815 PC900 330U_D2_2V_Y @ PR811 0_0402_5% GPU_ISUM+ GPU_DPRSLPVR 47K_0402_1% PR828 +VGA_CORE Layout Note: Place near Choke 0.1U_0402_16V7K +3VGS PR810 3.65K_0805_1% 2 PC816 680P_0603_50V7K Rds(on):2.7m ~3.3m PR718 1.8K_0402_1% VGA_PWRGD @EMI@ PC817 2.2U_0603_6.3V6K 1 +5VALW 1 21 PR814 1_0603_5% PQ803 S TR TPCA8059-H 1N PPAK56-8 3 20 PQ802 S TR TPCA8059-H 1N PPAK56-8 DL_GPU 19 VID2 VID3 VID4 14 12 11 10 13 IMON VIN VDD BOOT 18 @EMI@ PR808 4.7_1206_5% PL802 0.36UH_PDME064T-R36MS_24A_20% PC823 @ PR835 120K_0402_1% VID1 17 C PR817 8.06K_0402_1% ISUM- RTN CLK_EN# LX_GPU 22 ISUM+ VID0 +3VS 2 PR816 715_0402_1% PC818 1000P_0402_50V7K PC819 56P_0402_50V8 VCCP PGOOD 23 2 LGATE RBIAS 24 PC814 390P_0402_50V7K 1 147K for CPU 47K for GPU VW PU801 ISL62881CHRTZ-T_TQFN28_4X4 28 2 VSSP DH_GPU 16 PHASE COMP 15 2 PR809 47K_0402_1% PC815 1000P_0402_50V7K PR813 226K_0402_1% PR812 2.37K_0402_1% FB VID5 UGATE 25 PR805 PC810 2.2_0603_5% 0.1U_0603_25V7K 2 BST_GPU PR841 0_0402_1% VSEN VID6 VR_ON DPRSLPVR PR806 10_0402_5% AGND PC811 330P_0402_50V7K PC812 330P_0402_50V7K 26 27 VCC_GPU_SENSE +VGA_CORE C 29 VSS_GPU_SENSE GPU_ISUM- PQ801 S TR TPCA8065-H 1N PPAK56-8 +5VALW GPU_ISUM+ PC809 1000P_0402_50V7K MAX 14mohm 3.3mohm 1 2 PC806 1U_0603_6.3V6M PR804 10_0402_5% B PR802 1_0603_5% PR801 1_0603_5% +5VALW PC807 0.22U_0603_25V7K PC804 10U_0805_25V6K @EMI@ PC802 2200P_0402_50V7K PC803 10U_0805_25V6K 1 GPU_B+ 2 B+ C yb er Fo ru m ru PL801 EMI@ HCB2012KF-121T50_0805 A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/09/27 Deciphered Date 2015/09/27 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title +VPU_COREP Size C Date: Document Number Rev 0.1 LA-A551P Friday, June 14, 2013 Sheet 37 of 40 D C B A 2 2 1U_0402_6.3V6K PC1015 2 1 2 PC1043 10U_0603_6.3V6M 1 PC1036 180P_0402_50V8J 2 2 PC1008 10U_0603_6.3V6M kABINI VDD VDD_NB PC1047 1U_0402_6.3V6K 2 PC1009 10U_0603_6.3V6M 1 1U_0402_6.3V6K PC1022 1U_0402_6.3V6K PC1023 @ 1U_0402_6.3V6K PC1029 1 2 1U_0402_6.3V6K PC1021 +APU_CORE_NB + 10uF (0603) 1U_0402_6.3V6K PC1020 1U_0402_6.3V6K PC1028 1U_0402_6.3V6K PC1024 12 1u (0402) 1 180P (0402) of Compal Electronics, Inc 38 40 PROCESSOR DECOUPLING Sheet LA-A551P Friday, June 14, 2013 Document Number 2 1 + Title Size A3 Date: 22uF (0603) 1U_0402_6.3V6K PC1027 1 330uF 1U_0402_6.3V6K PC1026 @ 560uF*4.5m 1U_0402_6.3V6K PC1025 PC1033 330U_D2_2V_Y GFX output CAP (Including MLCC) 36.5 PC1032 560U_D2_2VM_R4.5M VGA_Core output CAP (Including MLCC 43.9) VGA@ PC1049 1U_0402_6.3V6K 1 PC1079 1U_0402_6.3V6K PC1048 1U_0402_6.3V6K 1 PC1005 10U_0603_6.3V6M PC1007 10U_0603_6.3V6M PC1046 1U_0402_6.3V6K 1 +APU_CORE_NB PC1045 1U_0402_6.3V6K +VDDC PC1041 10U_0603_6.3V6M 2 PC1003 1U_0402_6.3V6K +APU_CORE_NB PC1040 10U_0603_6.3V6M +VGA_CORE PC1042 10U_0603_6.3V6M +VGA_CORE VGA@ PC1044 1U_0402_6.3V6K VGA@ PC1078 1U_0402_6.3V6K VGA@ PC1077 1U_0402_6.3V6K VGA@ VGA@ VGA@ VGA@ PC1059 1U_0402_6.3V6K VGA@ VGA@ PC1058 1U_0402_6.3V6K VGA@ PC1057 1U_0402_6.3V6K VGA@ PC1056 1U_0402_6.3V6K VGA@ PC1055 1U_0402_6.3V6K VGA@ PC1054 1U_0402_6.3V6K VGA@ PC1053 1U_0402_6.3V6K VGA@ PC1052 1U_0402_6.3V6K VGA@ VGA@ VGA@ PC1067 1U_0402_6.3V6K VGA@ VGA@ PC1066 1U_0402_6.3V6K VGA@ VGA@ Deciphered Date Compal Secret Data PC1065 1U_0402_6.3V6K VGA@ VGA@ PC1064 1U_0402_6.3V6K VGA@ VGA@ 2012/09/27 PC1063 1U_0402_6.3V6K VGA@ VGA@ PC1062 1U_0402_6.3V6K VGA@ VGA@ PC1061 1U_0402_6.3V6K VGA@ VGA@ Issued Date Security Classification THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PC1068 1U_0402_6.3V6K PC1051 1U_0402_6.3V6K PC1076 1U_0402_6.3V6K 1 1U_0402_6.3V6K PC1013 ru m ru Fo er yb C VGA@ PC1060 1U_0402_6.3V6K PC1050 1U_0402_6.3V6K 2 4 1 PC1002 22U_0603_6.3V6M 1U_0402_6.3V6K PC1012 1U_0402_6.3V6K PC1018 PC1069 1U_0402_6.3V6K 2 PC1001 22U_0603_6.3V6M 1U_0402_6.3V6K PC1011 1U_0402_6.3V6K PC1017 1U_0402_6.3V6K PC1010 1U_0402_6.3V6K PC1016 +APU_CORE 2 PC1000 10U_0603_6.3V6M + PC1019 180P_0402_50V8J PC1101 330U_D2_2V_Y 1U_0402_6.3V6K PC1004 CPU_Core output CAP (Including MLCC) 36.4 1U_0402_6.3V6K PC1014 +APU_CORE PC1006 1U_0402_6.3V6K +APU_CORE + PC1100 560U_D2_2VM_R4.5M Rev 0.1 D C B A D C yb er Fo ru m ru D C B C B A A 2013/05/15 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2015/09/27 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: PIR (PWR) Rev 0.2 ZRMAE Sheet Friday, June 14, 2013 39 of 40 HW PIR (Product Improve Record) ZEMAE LA-A551P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 to 0.2 D NO DATE PAGE MODIFICATION LIST PURPOSE 05/29 P24 Delete RR2,RR3,RR7,RR6,RR12,RB7 for USB trace Part conut reduce 05/29 P24 Change CR13 to 0603 HW4 Common design 05/29 P24 Delete SLP_CHG_CB0 & SLLP_CHG_CB1 from APU Reduce reserve Design change 05/29 P24,27,28 EC_CHG_CB2(GPIO1A) move to GPIO12 ADD NUM_LED#(JKB5.1 to JUB1.36) 05/30 P08 Add QC2 and connect HDMI_HDP_N to HDMI_HDP For HDMI utility 05/30 P08 Delete T24,T25,T27 For RTC issue 05/30 P08 Add RC3 15K pull down and reserve RC12,RC16,RC17 pull +3VALW_APU and RC5,RC11 pull gnd For RTC issue 06/03 P24 Change CR3&CR2 47u 0805 to CR6&CR10 and CR4&CR5 22u 0603 For hight limit 06/03 P10 Change CD43 from 47u 0805 to CD43&CD44 22u*2 0603 For hight limit 10 06/03 P09 Change CC14 from 47u 0805 to CC14&CC16 22u*2 0603 For hight limit 11 06/07 P22 Reserve varistor DL14 for LANGND to DGND For ESD request 12 06/07 P22 Add diode DL5 for LANGND to DGND For ESD request 13 06/07 P26 Remove RA18 and RA24 Remove reserve ohm 14 06/07 P25 Add C18 0.1uF 0402 on +USB_VCCC close to JSB5 For EMI request 15 06/10 P20 Change C17 form 1500P to 0.015uF For LCD sequence 16 06/10 P25 Remove 0ohm for 14 and 15 and add LR10 and LR9 For part count reduce 17 06/11 P26 Change LA7 and LA6 form 0402 to 0603 size For EMI request 18 06/11 P25 Swap LR7/LR8 pin1&4 and pin3&2 For layout smooth 19 06/11 P24 Add test point for S&C IC T10&T11&T24 For NPI debug 20 06/13 P28 Change H4&H5 form H_3P3 to H_3P2 For ME limite D C C yb er Fo ru m ru 、 B A C B A Title HW PIR Size B Date: Document Number LA-A551P Friday, June 14, 2013 Rev 0.2 Sheet 40 of 40 ... FBMA-L11- 20 1 20 9 - 121 LMA50T _08 05 EMI@ PC8 0. 01U _04 02_ 25V7K PR16 6.49K _04 02_ 1% @ PR2 0_ 0 4 02 _5% @ PR5 0_ 0 4 02 _5% VCIN0_PH PR21 100 _04 02_ 1% PR 20 100 _04 02_ 1% 2 1 1 @ PC11 0. 1U _04 02_ 10V7K 2 PR19 1K _04 02_ 1% PR3 20 K _04 02_ 1%... 1 2 PC 806 1U _06 0 3_6.3V6M PR 804 10_ 0 4 02 _5% B PR 8 02 1 _06 0 3_5% PR 801 1 _06 0 3_5% +5VALW PC 807 0. 22 U _06 0 3 _25 V7K PC 804 10U _08 05 _25 V6K @EMI@ PC 8 02 2 200 P _04 02_ 50V7K PC 803 10U _08 05 _25 V6K 1 GPU_B+ 2 B+ C... 4.7_1 20 6 _ 5% 680P _06 0 3_50V7K 2SNB _0. 95V1 PL 4 02 EMI@ PU 400 PR 406 100 K _04 02_ 1% PC4 12 22U _06 0 3_6.3V6M +0. 95VALWP PC 406 22 U _06 0 3_6.3V6M 2 PC 401 22 U _06 0 3_6.3V6M FB =0. 6V 2 SY8 20 8 DQNC_QFN 10_ 3X3 PC411 2. 2U _06 0 3_6.3V6K