A B C D E 1 Compal Confidential 2 QBL50 Schematics Document AMD Sabine APU Llano / Hudson M2_M3 / Vancouver Whistler UMA only / PX Muxless with BACO 3 2010-02-16 LA-7552P REV: 0.03 4 2010/08/04 Issued Date 2010/08/04 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net A Compal Electronics, Inc Compal Secret Data Security Classification B C D Title Cover Page Size B Date: Document Number Rev 0.03 QBL60 LA-7552P Tuesday, February 22, 2011 Sheet E of 49 A B C D E Compal Confidential Model Name : QBL60 Sabine VRAM 1G/2G 128M16 x 4/8 page 23, 24 DDR3 Thermal Sensor ATI Vancuver Whistler GFX x Gen2 ADM1032 page 19 uFCBGA-962 Page 18~22 GFX x APU HDMI (UMA / Muxless) DP x1 (DP0 TXP/N0) AMD FS1 APU Llano Memory BUS(DDR3) Dual Channel 204pin DDRIII-SO-DIMM X2 Page 11,12 BANK 0, 1, 2, 1.5V DDRIII 800~1333MHz uPGA-722 Package HDMI Conn page 28 Page 6~10 Travis LVDS Translator LVDS LVDS Conn Reserve eDP P_GPP x GEN1 page 26 DP x (DP1 TXP/N 0~4) UMI USB2 page 27 page 27 GPP1 GPP0 FCH Hudson-M2/M3 page 34 page 30 Port Port Port LAN(GbE) BCM57785 page 32 CMOS Camera Card Reader RTS5137 Mini Card (with BT) page 27 page 32 Port2 page 31 Port Port USB 3.3V 48MHz HD Audio 3.3V 24.576MHz/48Mhz uFCBGA-656 MINI Card WLAN USB2 (LS-7322P) page 34 FCH CRT (VGA DAC) CRT Conn USB2 Page 13~17 S-ATA Gen2 LPC BUS port page 29 RJ45 port SATA HDD1 Conn page 29 ODD Conn page page 33 33 HDA Codec ALC269 page 30 ENE KB930 page 36 Touch Pad LED Int.KBD page 38 page 38 page 37 RTC CKT External board page 25 DC/DC Interface CKT.page LS-7326P Power/B page 35 SYS BIOS (2M) 39 Power Circuit page 15 LS-7322P Audio BD http://hobi-elektronika.net page 40~48 A BIOS ROM 2010/08/04 Issued Date page 30 EC BIOS (128K) page 35 B Compal Electronics, Inc Compal Secret Data Security Classification 2010/08/04 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC C D Title Block Diagrams Size B Date: Document Number Rev 0.03 QBL60 LA-7552P Tuesday, February 22, 2011 Sheet E of 49 DISPLAY DISTRIBUTION CLOCK DISTRIBUTION : LVDS PATH : APU HDMI PATH LVDS CONN A_SODIMM B_SODIMM D D TXOUT[0:2]+/TXCLK+/TZOUT[0:2]+/TZCLK+/I2CC_SCL/DA AMD R ATI VGA 1066~1600MHz MEM_MA_CLK1_P/N MEM_MA_CLK7_P/N 1066~1600MHz MEM_MB_CLK1_P/N MEM_MB_CLK7_P/N Whistler CLK_PEG_VGAP/N 100MHz APU_DISP_CLKP/N C AMD 100MHz CPU FS1 SOCKET APU_TXOUT[0:2]+/APU_TXOUT_CLK+/APU_TZOUT[0:2]+/APU_TZOUT_CLK+/APU_LVDS_CLK/DATA APU_CLKP/N 100MHz AMD C LVDS_OUT RTD2132 FCH Hudson-M2/M3 Internal CLK GEN DP0_AUX DP_IN GPP_CLK 100MHz 32.768KHz 25MHz LVDS Transtator C DP0_TXP/N[0:1] DP0_AUXP/N B GPP1 GPP0 WLAN Mini PCI Socket B DP0 APU GbE LAN DP1 PCIE_GFX[0:7] C PCIE_GFX[12:15] C VGA PCIE_GFX[0:7] 25MHz FCH LS R A A CRT CONN Compal Secret Data Security Classification 2010/08/04 Issued Date http://hobi-elektronika.net HDMI CONN 2010/08/04 Deciphered Date Title CLOCK / DISPLAY DISTRIBUTION THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Size Document Number Custom QBL60 LA-7552P Date: Rev 0.03 Tuesday, February 22, 2011 Sheet of 49 A B C D E Voltage Rails Power Plane Description S3 S5 STATE +VALW +V +VS Clock Full ON HIGH HIGH HIGH ON ON ON ON S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF VIN Adapter power supply (19V) N/A N/A N/A B+ AC or battery power rail for power circuit N/A N/A N/A +CPU_CORE Core voltage for CPU ON OFF OFF SIGNAL S1 +CPU_CORE_NB Voltage for On-die VGA of APU ON OFF OFF +VGA_CORE 0.95-1.2V switched power rail ON OFF OFF +0.75VS 0.75V switched power rail for DDR terminator ON ON OFF +1.0VSG 1.0V switched power rail for VGA ON OFF OFF +1.1ALW 1.1V switched power rail for FCH ON ON ON* +1.1VS 1.1V switched power rail for FCH ON OFF OFF +1.2VS 1.2V switched power rail for APU ON OFF OFF +1.5V 1.5V power rail for CPU VDDIO and DDR ON ON OFF +1.5VS 1.5V switched power rail ON OFF OFF +1.8VSG 1.8V switched power rail ON OFF OFF +2.5VS 2.5V for CPU_VDDA ON OFF OFF +3VALW 3.3V always on power rail ON ON ON* +LAN_IO 3.3V power rail for LAN ON ON ON +3VS 3.3V switched power rail ON OFF OFF +5VALW 5V always on power rail ON ON ON* +5VS 5V switched power rail ON OFF OFF +VSB VSB always on power rail ON ON ON* +RTCVCC RTC power ON ON ON Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF SLP_S3# SLP_S4# SLP_S5# BTO Option Table BOM Structure M3@ U25 BTO Item VGA@ Use VGA (Mux) X76@ VRAM ID Table M2@ Use Hudson-M2 M3@ Use Hudson-M3 USB30@ USB30 on M/B USB20@ USB20 on M/B FCH M3 Part Number = SA000043I90 BOM Config x = is read cmd, x= is writee cmd External PCI Devices Device IDSEL# REQ#/GNT# Interrupts 3 EC SM Bus1 address EC SM Bus2 address Device Address HEX Device Address HEX Smart Battery 0001 011X b 16H ADI ADM1032 (VGA) 1001 101X b 9AH (APU) RTD2132S (TL) FCH SM Bus address FCH SM Bus address Device Address HEX DDR DIMM1 1101 000X b D0 DDR DIMM2 1101 001X b D2 Device Address HEX 2010/08/04 Issued Date 2010/08/04 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net A Compal Electronics, Inc Compal Secret Data Security Classification B C D Title Notes List Size B Date: Document Number Rev 0.03 QBL60 LA-7552P Tuesday, February 22, 2011 Sheet E of 49 AMD APU FS1 BATTERY 12.6V PU201 ISL6267HRZ-T PU101 CHARGER BATT+ +CPU_CORE +CPU_CORE_NB +CPU_CORE 0.7~1.475V VDD CORE 54A +CPU_CORE_NB 0.7~1.475V VDDNB 27.5A +2.5VS +2.5VS VDDA 500mA +1.5V +1.5V VDDIO 4.6A +1.2VS +1.2VS VDDR 6.7A +2.5VS +1.5V D AC ADAPTOR 19V 90W PU501 RT8209MGQW VIN PU603 APL5508-25DC D RAM DDRIII SODIMMX2 PU801 RT8209MGQW B+ +1.2VS +1.5V VDD_MEM 4A +0.75VS VTT_MEM 0.5A +0.75VS +0.75VS PU601 APL5336KAI PU901 RT8237CZQW +VGA_CORE +VDDCI +1.0VSG PU602 APL5930KAI +1.0VSG +1.5VSG +1.5VSG U41 AO4430L PU701 RT8209MGQW +1.1VALW PU301 RT8205LZQW +3VALW VGA ATI Whistler/Seymour/Granville +VGA_CORE 0.85~1.1V VDDC 47A 0.9~1.0V VDDCI 4.6A +1.0VSG DPLL_VDDC: 125 mA SPV10: 120 mA PCIE_VDDC: 2000 mA DP[A:E]_VDD10: 680 mA +1.5VSG VDDR1: 3400 mA C +INVPWR_B+ PU401 SY8033BDBC U40 SI4800 +5VALW +1.8VSG +1.8VSG +1.8VSG PJ14 +3VSG +3VSG +3VSG U33 SI4800 U39 AO4430L +1.1VS +1.1VS +3.3 350mA FAN Control APL5607 +1.1VALW VDDAN_11_USB_S: 140 mA VDDCR_11_USB_S: 197 mA VDDAN_11_SSUSB_S: 282 mA VDDCR_11_SSUSB_S: 424 mA VDDCR_11_S: 187 mA VDDPL_11_SYS: 70 mA +5VALW +USB_VCCA +USB_VCCB +3VS +3VS +3VS +1.5VS USB X3 +5V Dual+1 2.5A +3VALW +3VALW +3VALW SATA HDD*2 ODD*1 +5V 3A A2VDD: 130 mA VDDR3: 60 mA VDDPL_11_DAC: mA VDDAN_11_ML: 226 mA VDDCR_11: 1007 mA VDDAN_11_CLK: 340 mA VDDAN_11_PCIE: 1088 mA VDDAN_11_SATA: 1337 mA +5VS +5VS 500mA Audio Codec ALC269-GR EC ENE KB930 +5V 45mA +3.3VALW 30mA +3.3VS 3mA +3.3VS 25mA LAN RTL8111E Mini Card +3.3VALW 201mA +1.5VS 500mA +3.3VS 1A +3.3VALW 330mA RTC Bettary A Issued Date VDDIO_33_PCIGP: 131 mA VDDPL_33_SYS: 47 mA VDDPL_33_DAC: 20 mA VDDPL_33_ML: 20 mA VDDAN_33_DAC: 200 mA VDDPL_33_PCIE: 43 mA VDDPL_33_SATA: 93 mA VDDIO_AZ_S: 26 mA VDDPL_33_SSUSB_S: 20 mA VDDPL_33_USB_S: 17 mA VDDAN_33_USB_S: 658 mA VDDIO_33_S: 59 mA VDDXL_33_S: mA VDDAN_33_HWM_S: 12 mA GND VDDIO_33_GBE_S VDDCR_11_GBE_S VDDIO_GBE_S RTC BAT VDDBT_RTC_G 2010/08/04 Deciphered Date 2010/08/04 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net A Title POWER DELIVERY CHART Size Document Number Custom QBL60 LA-7552P Date: B Compal Secret Data Security Classification C +1.1VS +1.1VALW +3.3V 2.4 A FCH AMD Hudson M2/M3 B+ 300mA U54/U55 AP2301MPG +1.5VSG PLL_PVDD: 75 mA TSVDD: 20 mA AVDD: 70 mA VDD1DI: 100 mA VDD2DI: 50 mA A2VDDQ: 1.5 mA VDD_CT: 110 mA VDDR4: 170 mA PCIE_PVDD: 40 mA MPV18: 150 mA SPV18: 75 mA PCIE_VDDR: 400 mA DP[A:F]_VDD18: 920 mA DP[A:F]_PVDD: 120 mA +3VS LCD panel 15.6" B VRAM 1GB/2GB 64M / 128Mx16 * / Rev 0.03 Tuesday, February 22, 2011 Sheet of 49 A B C D 18 PCIE_GTX_C_FRX_P[0 7] PCIE_FTX_C_GRX_P[0 7] 18 18 PCIE_GTX_C_FRX_N[0 7] PCIE_FTX_C_GRX_N[0 7] 18 JCPU1A E APU To HDMI PCIE_FTX_GRX_P[12 15] 28 CONN@ PCIE_FTX_GRX_N[12 15] 28 PCI EXPRESS AA8 P_GFX_RXP0 P_GFX_TXP0 AA2 PCIE_FTX_GRX_P0 C917VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P0 PCIE_GTX_C_FRX_N0 AA9 P_GFX_RXN0 P_GFX_TXN0 AA3 PCIE_FTX_GRX_N0 C918VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N0 PCIE_GTX_C_FRX_P1 Y7 P_GFX_RXP1 P_GFX_TXP1 Y2 PCIE_FTX_GRX_P1 C919VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P1 PCIE_GTX_C_FRX_N1 Y8 P_GFX_RXN1 P_GFX_TXN1 Y1 PCIE_FTX_GRX_N1 C920VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N1 PCIE_GTX_C_FRX_P2 W5 Y4 PCIE_FTX_GRX_P2 C921VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P2 PCIE_GTX_C_FRX_N2 W6 PCIE_GTX_C_FRX_P3 W8 PCIE_GTX_C_FRX_N3 W9 PCIE_GTX_C_FRX_P4 V7 P_GFX_RXP4 P_GFX_TXP4 PCIE_GTX_C_FRX_N4 V8 P_GFX_RXN4 PCIE_GTX_C_FRX_P5 U5 PCIE_GTX_C_FRX_N5 P_GFX_TXP3 P_GFX_RXN3 P_GFX_TXN3 0.1U_0402_16V7K PCIE_FTX_C_GRX_N2 C923VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P3 W3 PCIE_FTX_GRX_N3 C924VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N3 V2 PCIE_FTX_GRX_P4 C925VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P4 P_GFX_TXN4 V1 PCIE_FTX_GRX_N4 C926VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N4 P_GFX_RXP5 P_GFX_TXP5 V4 PCIE_FTX_GRX_P5 C927VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P5 U6 P_GFX_RXN5 P_GFX_TXN5 V5 PCIE_FTX_GRX_N5 C928VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N5 PCIE_GTX_C_FRX_P6 U8 P_GFX_RXP6 P_GFX_TXP6 U2 PCIE_FTX_GRX_P6 C929VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P6 PCIE_GTX_C_FRX_N6 U9 P_GFX_RXN6 P_GFX_TXN6 U3 PCIE_FTX_GRX_N6 C930VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N6 PCIE_GTX_C_FRX_P7 T7 P_GFX_RXP7 P_GFX_TXP7 T2 PCIE_FTX_GRX_P7 C931VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P7 PCIE_GTX_C_FRX_N7 T8 P_GFX_RXN7 P_GFX_TXN7 T1 PCIE_FTX_GRX_N7 C932VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N7 R5 P_GFX_RXP8 P_GFX_TXP8 T4 R6 P_GFX_RXN8 P_GFX_TXN8 T5 R8 P_GFX_RXP9 P_GFX_TXP9 R2 P_GFX_RXN9 P_GFX_TXN9 R3 P7 P_GFX_RXP10 P_GFX_TXP10 P2 P_GFX_RXN10 P_GFX_TXN10 P1 P_GFX_RXP11 P_GFX_TXP11 P4 P_GFX_RXN11 P_GFX_TXN11 P_GFX_RXP12 P_GFX_TXP12 29 PCIE_DTX_C_FRX_P0 AC5 29 PCIE_DTX_C_FRX_N0 AC6 32 PCIE_DTX_C_FRX_P1 AC8 32 PCIE_DTX_C_FRX_N1 AC9 AB7 AB8 AA5 AA6 13 UMI_MTX_C_FRX_P0 AF8 13 UMI_MTX_C_FRX_N0 AF7 13 UMI_MTX_C_FRX_P1 AE6 13 UMI_MTX_C_FRX_N1 AE5 13 UMI_MTX_C_FRX_P2 AE9 13 UMI_MTX_C_FRX_N2 AE8 13 UMI_MTX_C_FRX_P3 AD8 13 UMI_MTX_C_FRX_N3 AD7 K5 P_GFX_TXP14 P_GFX_RXN14 P_GFX_TXN14 P_GFX_RXP15 P_GFX_TXP15 P_GFX_RXN15 P_GFX_TXN15 P_GPP_RXP0 P_GPP_TXP0 P_GPP_RXN0 P_GPP_TXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_TXP1 P_GPP_TXN1 P_GPP_RXP2 P_GPP_TXP2 P_GPP_RXN2 P_GPP_TXN2 P_GPP_RXP3 P_GPP_TXP3 P_GPP_RXN3 P_GPP_TXN3 P_UMI_RXP0 P_UMI_TXP0 P_UMI_RXN0 P_UMI_TXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_RXN2 P_UMI_TXN2 P_UMI_RXP3 P_UMI_TXP3 P_UMI_RXN3 P_UMI_TXN3 P_ZVDDP P_ZVSS N3 PCIE_FTX_GRX_N12 M2 PCIE_FTX_GRX_P13 M1 PCIE_FTX_GRX_N13 M4 PCIE_FTX_GRX_P14 M5 PCIE_FTX_GRX_N14 L2 PCIE_FTX_GRX_P15 8,14 APU_SID APU_SID Q9 EC_SMB_DA R537 0_0402_5% EC_SMB_DA2 19,26,36 BSH111 1N_SOT23-3 To EC To HDMI 8,14 APU_SIC APU_SIC Q10 EC_SMB_CK R538 0_0402_5% EC_SMB_CK2 19,26,36 BSH111 1N_SOT23-3 CK L3 PCIE_FTX_GRX_N15 AD4 PCIE_FTX_DRX_P0 C950 0.1U_0402_16V7K PCIE_FTX_C_DRX_P0 29 AD5 PCIE_FTX_DRX_N0 C951 0.1U_0402_16V7K PCIE_FTX_C_DRX_N0 29 AC2 PCIE_FTX_DRX_P1 C952 0.1U_0402_16V7K PCIE_FTX_C_DRX_P1 32 AC3 PCIE_FTX_DRX_N1 C953 0.1U_0402_16V7K PCIE_FTX_C_DRX_N1 32 AF1 UMI_FTX_MRX_P0 C956 0.1U_0402_16V7K UMI_FTX_C_MRX_P0 13 AF2 UMI_FTX_MRX_N0 C957 0.1U_0402_16V7K UMI_FTX_C_MRX_N0 13 AF5 UMI_FTX_MRX_P1 C958 0.1U_0402_16V7K UMI_FTX_C_MRX_P1 13 AF4 UMI_FTX_MRX_N1 C959 0.1U_0402_16V7K UMI_FTX_C_MRX_N1 13 AE3 UMI_FTX_MRX_P2 C960 0.1U_0402_16V7K UMI_FTX_C_MRX_P2 13 AE2 UMI_FTX_MRX_N2 C961 0.1U_0402_16V7K UMI_FTX_C_MRX_N2 13 AD1 UMI_FTX_MRX_P3 C962 0.1U_0402_16V7K UMI_FTX_C_MRX_P3 13 AD2 UMI_FTX_MRX_N3 C963 0.1U_0402_16V7K UMI_FTX_C_MRX_N3 13 K4 P_ZVSS GLAN WLAN AB2 AB1 AB4 AB5 Power Sequence of APU R540 +1.5V +2.5VS Group A +1.5VS +CPU_CORE Group B +CPU_CORE_NB 196_0402_1% AMD_TOPEDO_FS-1 +1.2VS 2010/08/04 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010/08/04 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net A PCIE_FTX_GRX_P12 N2 P5 BSH111, the Vgs is: = 0.4V Max = 1.3V 30K_0402_1% D L9 P_GFX_RXP14 31.6K_0402_1% S L8 P_GFX_TXN13 GPP L6 P_GFX_TXP13 P_GFX_RXN13 +3VS R536 G L5 P_GFX_RXP13 R535 0.1U_0402_16V4Z D M8 P_GFX_TXN12 C935 S M7 P_GFX_RXN12 For UMA Mux G N9 CPU TSI interface level shift R9 N8 P_ZVDDP 196_0402_1% GRAPHICS C922VGA@ PCIE_FTX_GRX_P3 N6 R539 P_GFX_RXP3 PCIE_FTX_GRX_N2 P8 +1.2VS P_GFX_TXN2 Y5 N5 P_GFX_TXP2 P_GFX_RXN2 W2 P_GFX_RXP2 UMI-LINK PCIE_GTX_C_FRX_P0 B C D Title AMD FS1 PCIE / UMI / TSI Size Document Number Custom Rev 0.03 QBL60 LA-7552P Date: Tuesday, February 22, 2011 Sheet E of 49 A B C D E 1 JCPU1B 11 DDRA_SMA[15 0] 11 11 11 11 DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13 DDRA_SMA14 DDRA_SMA15 DDRA_SBS0# DDRA_SBS1# DDRA_SBS2# DDRA_SBS0# DDRA_SBS1# DDRA_SBS2# DDRA_SDM[7 0] DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 DDRA_SDQS0 DDRA_SDQS0# DDRA_SDQS1 DDRA_SDQS1# DDRA_SDQS2 DDRA_SDQS2# DDRA_SDQS3 DDRA_SDQS3# DDRA_SDQS4 DDRA_SDQS4# DDRA_SDQS5 DDRA_SDQS5# DDRA_SDQS6 DDRA_SDQS6# DDRA_SDQS7 DDRA_SDQS7# 11 11 11 11 DDRA_CLK0 DDRA_CLK0# DDRA_CLK1 DDRA_CLK1# DDRA_SDQS0 DDRA_SDQS0# DDRA_SDQS1 DDRA_SDQS1# DDRA_SDQS2 DDRA_SDQS2# DDRA_SDQS3 DDRA_SDQS3# DDRA_SDQS4 DDRA_SDQS4# DDRA_SDQS5 DDRA_SDQS5# DDRA_SDQS6 DDRA_SDQS6# DDRA_SDQS7 DDRA_SDQS7# 11 DDRA_CKE0 11 DDRA_CKE1 11 DDRA_ODT0 11 DDRA_ODT1 11 DDRA_SCS0# 11 DDRA_SCS1# 11 DDRA_SRAS# 11 DDRA_SCAS# 11 DDRA_SWE# 11 MEM_MA_RST# 11 MEM_MA_EVENT# +1.5V MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 U24 U21 L23 MA_BANK0 MA_BANK1 MA_BANK2 E14 J17 E21 F25 AD27 AC23 AD19 AC15 G14 H14 G18 H18 J21 H21 E27 E26 AE26 AD26 AB22 AA22 AB18 AA18 AA14 AA15 T21 T22 R23 R24 DDRA_CKE0 DDRA_CKE1 H28 H27 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1 MA_CKE0 MA_CKE1 Y25 AA27 DDRA_SCS0# DDRA_SCS1# V22 AA26 MA_CS_L0 MA_CS_L1 DDRA_SRAS# DDRA_SCAS# DDRA_SWE# V21 W24 W23 MA_RAS_L MA_CAS_L MA_WE_L MEM_MA_RST# MEM_MA_EVENT# H25 T24 MA_RESET_L MA_EVENT_L W20 M_ZVDDIO W21 39.2_0402_1% MA_ODT0 MA_ODT1 M_VREF DDRA_SDQ[63 0] MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 E13 J13 H15 J15 H13 F13 F15 E15 DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 H17 F17 E19 J19 G16 H16 H19 F19 DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 H20 F21 J23 H23 G20 E20 G22 H22 DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 G24 E25 G27 G26 F23 H24 E28 F27 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31 AB28 AC27 AD25 AA24 AE28 AD28 AB26 AC25 DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39 Y23 AA23 Y21 AA20 AB24 AD24 AA21 AC21 DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47 AA19 AC19 AC17 AA17 AB20 Y19 AD18 AD17 DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55 AA16 Y15 AA13 AC13 Y17 AB16 AB14 Y13 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 DDRA_ODT0 DDRA_ODT1 15mil JCPU1C MEMORY CHANNEL A U20 R20 R21 P22 P21 N24 N23 N20 N21 M21 U23 M22 L24 AA25 L21 L20 DDRA_CLK0 DDRA_CLK0# DDRA_CLK1 DDRA_CLK1# +MEM_VREF R541 CONN@ MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63 11 12 DDRB_SMA[15 0] 12 12 12 12 DDRB_SBS0# DDRB_SBS1# DDRB_SBS2# DDRB_SDM[7 0] 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 DDRB_SDQS0 DDRB_SDQS0# DDRB_SDQS1 DDRB_SDQS1# DDRB_SDQS2 DDRB_SDQS2# DDRB_SDQS3 DDRB_SDQS3# DDRB_SDQS4 DDRB_SDQS4# DDRB_SDQS5 DDRB_SDQS5# DDRB_SDQS6 DDRB_SDQS6# DDRB_SDQS7 DDRB_SDQS7# 12 12 12 12 DDRB_CLK0 DDRB_CLK0# DDRB_CLK1 DDRB_CLK1# MEMORY CHANNEL B DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13 DDRB_SMA14 DDRB_SMA15 T27 P24 P25 N27 N26 M28 M27 M24 M25 L26 U26 L27 K27 W26 K25 K24 MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15 DDRB_SBS0# DDRB_SBS1# DDRB_SBS2# U27 T28 K28 MB_BANK0 MB_BANK1 MB_BANK2 DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7 D14 A18 A22 C25 AF25 AG22 AH18 AD14 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 DDRB_SDQS0 DDRB_SDQS0# DDRB_SDQS1 DDRB_SDQS1# DDRB_SDQS2 DDRB_SDQS2# DDRB_SDQS3 DDRB_SDQS3# DDRB_SDQS4 DDRB_SDQS4# DDRB_SDQS5 DDRB_SDQS5# DDRB_SDQS6 DDRB_SDQS6# DDRB_SDQS7 DDRB_SDQS7# C15 B15 E18 D18 E22 D22 B26 A26 AG24 AG25 AG21 AF21 AG17 AG18 AH14 AG14 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 DDRB_CLK0 DDRB_CLK0# DDRB_CLK1 DDRB_CLK1# 12 DDRB_CKE0 12 DDRB_CKE1 12 DDRB_ODT0 12 DDRB_ODT1 12 DDRB_SCS0# 12 DDRB_SCS1# 12 DDRB_SRAS# 12 DDRB_SCAS# 12 DDRB_SWE# 12 MEM_MB_RST# 12 MEM_MB_EVENT# CONN@ R26 R27 P27 P28 MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1 DDRB_CKE0 DDRB_CKE1 J26 J27 DDRB_ODT0 DDRB_ODT1 W27 Y28 DDRB_SCS0# DDRB_SCS1# V25 Y27 MB_CS_L0 MB_CS_L1 DDRB_SRAS# DDRB_SCAS# DDRB_SWE# V24 V27 V28 MB_RAS_L MB_CAS_L MB_WE_L MEM_MB_RST# MEM_MB_EVENT# J25 T25 MB_RESET_L MB_EVENT_L MB_CKE0 MB_CKE1 MB_ODT0 MB_ODT1 MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 A14 B14 D16 E16 B13 C13 B16 A16 DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 C17 B18 B20 A20 E17 B17 B19 C19 DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 C21 B22 C23 A24 D20 B21 E23 B23 DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 E24 B25 B27 D28 B24 D24 D26 C27 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31 AG26 AH26 AF23 AG23 AG27 AF27 AH24 AE24 DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39 AE22 AH22 AE20 AH20 AD23 AD22 AD21 AD20 DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47 AF19 AE18 AE16 AH16 AG20 AG19 AF17 AD16 DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55 AG15 AD15 AG13 AD13 AG16 AF15 AE14 AF13 DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63 DDRB_SDQ[63 0] 12 M_ZVDDIO AMD_TOPEDO_FS-1 Qmbdf!uifn!dmptf!up!BQV!xjuijo!2# AMD_TOPEDO_FS-1 EVENT# pull high 0.75V reference voltage +1.5V +1.5V 4 R542 1K_0402_1% R545 1K_0402_5% MEM_MB_EVENT# 15mil 1K_0402_5% MEM_MA_EVENT# +MEM_VREF R544 1 R543 1K_0402_1% 1000P_0402_50V7K C965 0.1U_0402_16V7K 2010/08/04 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010/08/04 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net A C964 B C D Title AMD FS1 DDRIII I/F Size Document Number Custom Rev 0.03 QBL60 LA-7552P Date: Tuesday, February 22, 2011 Sheet E of 49 B DP0_TXP0 F2 DP0_TXN0_C 0.1U_0402_16V7K DP0_TXN0 F1 DP0_TXP1 E3 DP0_TXN1 E2 DP0_TXN1 C2 DP0_TXN3 C3 DP0_AUXN DP0_AUXN_C 26 DP0_TXP1 DP1_AUXP E5 ML_VGA_AUXP C975 0.1U_0402_16V7K ML_VGA_AUXP_C 15 DP1_AUXN E6 ML_VGA_AUXN C976 0.1U_0402_16V7K ML_VGA_AUXN_C 15 DP0_TXP2 DP0_TXN2 DP0_TXP3 DP0_TXN3 Place near APU 0.1U_0402_16V7K DP1_TXP0 K2 C968 0.1U_0402_16V7K DP1_TXN0 K1 15 ML_VGA_TXP1 C969 0.1U_0402_16V7K DP1_TXP1 J3 DP0_HPD D7 DP0_HPD DP1_HPD E7 DP1_HPD DP2_HPD J7 DP1_TXP3 DP3_HPD H7 DP1_TXN3 DP4_HPD G7 DP5_HPD F7 DP_BLON C6 DP_ENBKL J2 15 ML_VGA_TXP2 H2 DP1_TXP2 15 ML_VGA_TXN2 C979 0.1U_0402_16V7K DP1_TXN2 H1 DP1_TXN2 C980 15 ML_VGA_TXN3 C981 APU_CLKP 13 APU_CLKN 13 APU_DISP_CLKP TSI G3 System DP AH7 APU_CLKN AH6 CLKIN_L APU_DISP_CLKP AH4 DISP_CLKIN_H AH3 B8 APU_SVD APU_SVD G2 APU_CLKP APU_SVC APU_SVC 47 DP1_TXN3 APU_DISP_CLKN 13 APU_DISP_CLKN 47 0.1U_0402_16V7K DP1_TXP3 A8 6,14 APU_SIC 6,14 APU_SID APU_SIC AH11 APU_SID AG11 CLKIN_H CLK 13 0.1U_0402_16V7K DP1_TXN1 R575 R576 1K_0402_5% 1K_0402_5% 13 APU_PWRGD AF10 APU_PWRGD AE10 APU_PROCHOT# AD10 APU_SVC Serial VID APU_SVD APU_THERMTRIP# AG12 ALERT_L AH12 DP_INT_PWM DP_AUX_ZVSS D8 TEST9 SIC TEST10 SID TEST12 RESET_L TEST15 PWROK TEST16 TEST17 PROCHOT_L THERMTRIP_L TEST18 TEST19 ALERT_L C12 R581 1K_0402_5% APU_SID APU_TDO A12 R791 1K_0402_5% ALERT_L APU_TCK A11 APU_TMS D12 B12 TDI TEST21 TEST22 TDO TEST23 TCK TEST24 TMS TEST25_H TRST_L TEST25_L R592 1K_0402_5% APU_TDI APU_DBRDY B11 R593 1K_0402_5% APU_TCK APU_DBREQ# C11 R594 1K_0402_5% APU_TMS TEST28_L R595 1K_0402_5% APU_TRST# TEST30_H K21 47 APU_VDDNB_RUN_FB_L 47 APU_VDD_RUN_FB_L R600 47 APU_VDDNB_SEN 47 APU_VDD_SEN RSVD_2 TEST30_L TEST31 RSVD_3 TEST32_H 0_0402_5% TEST32_L B9 APU_VDDNB_SEN A9 B10 APU_VDD_RUN_FB_L APU_VDD_SEN route as differential RSVD_1 0_0402_5% C8 APU_VDDNB_RUN_FB_L APU_VDDNB_SEN route as differential TEST28_H DBREQ_L APU_VDD_SEN C9 A10 VSS_SENSE TEST35 VDDNB_SENSE VDDIO_SENSE FS1R1 DMAACTIVE_L DP1_HPD 10 CRT M_TEST VDDIO level Need Level shift 39.2_0402_1% R567 39.2_0402_1% R571 10K_0402_5% FS1R1 : Control S5 Dual PWR plane In laptop, seems no use +1.5V VDDIO level Need Level shift R569 150_0402_1% MISC R612 1K_0402_5% ALLOW_STOP R577 1K_0402_5% +1.5VS APU_RST# R578 300_0402_5% APU_PWRGD R580 300_0402_5% Chang to unpop (DG ref.) 20101111 AA10 R573 G10 @ +1.5V 0_0402_5% +3VS Asserted as an input to force the processor into the HTC-active state H10 R574 H12 D9 T6 E9 T7 G9 T8 1K_0402_5% R587 10K_0402_5% R586 1K_0402_5% H9 APU_PROCHOT# T9 H11 G11 APU_TEST19 R583 1K_0402_5% F12 APU_TEST20 R584 1K_0402_5% E11 APU_TEST21 R585 1K_0402_5% D11 APU_TEST22 R589 1K_0402_5% R610 F10 R582 1K_0402_5% VDDR_SENSE +1.5V THERMTRIP shutdown temperature: 125 degree 1K_0402_5% T10 G12 APU_TEST24 AH10 TEST25_H R588 10K_0402_5% Q11 0_0402_5% MMBT3904_NL_SOT23-3 R591 APU_TEST18 R590 1K_0402_5% APU_THERMTRIP# EC_THERM# 13,36,47 Indicates to the FCH that a thermal trip has occurred Its assertion will cause the FCH to transition the system to S5 immediately R609 10K_0402_5% Q12 R611 0_0402_5% H_THERMTRIP# 14 MMBT3904_NL_SOT23-3 TEST25_L AH9 K7 +1.5V HDT Debug conn K8 JP1 AA12 T11 AB12 T12 M_TEST K22 AB11 T13 AA11 T14 APU_TRST# R5981 TEST35 D10 Y11 FS1R1 AB10 ALLOW_STOP C639 THERMDA AE12 THERMDC AD12 T15 0_0402_5% 10K_0402_5% 11 R603 10K_0402_5% 13 R605 10K_0402_5% 15 10 11 12 13 14 APU_TCK APU_TMS APU_TDI APU_TDO Cut on CPU side, Debug mount 10 R5991 @ 0_0402_5% APU_PWRGD 12 R6021 @ 0_0402_5% APU_RST# 14 16 APU_DBRDY APU_DBREQ# 15 16 ALLOW_STOP 13 17 17 18 18 R606 0_0402_5% APU_TEST19 0.1U_0402_16V4Z @ 19 19 20 20 R608 0_0402_5% APU_TEST18 T16 Compal Electronics, Inc Compal Secret Data 2010/08/04 SAMTE_ASP-136446-07-B CONN@ Llano not support this thermal die Security Classification C R601 2010/08/04 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC B +1.5V @ HDMI DP_INT_PWM 10 DP_AUX_ZVSS Issued Date http://hobi-elektronika.net 300_0402_5% R564 DP_ENVDD 10 VDD_SENSE AMD_TOPEDO_FS-1 A LVDS VDDP_SENSE SENSE Route as differential with VSS_SENSE R597 DBRDY RSVD E8 AC11 TEST APU_TDI APU_DBREQ# DP0_HPD 10 DP_ENBKL 10 DP_ENVDD TEST6 JTAG APU_SIC 300_0402_5% 300_0402_5% C 1K_0402_5% R596 R558 @ E R579 APU_TRST# TEST35 R559 DP5_HPD 10 C7 TEST20 Close to Header 510_0402_1% APU_HDMI_DATA 28 B +1.5V 510_0402_1% R557 APU_HDMI_CLK 28 DP5_HPD C5 SVC +1.5V R548 TEST25_H APU_RST# TEST25_L @ CTRL 13 APU_RST# Chang to PU +1.5VS (DG ref.) 20101111 1.8K_0402_5% +3VALW DP_DIGON TEST14 +1.5V FS1R1 DP_VARY_BL DISP_CLKIN_L SVD 1.8K_0402_5% ML_VGA_AUXN R556 +1.5V G6 APU_HDMI_DATA DP1_TXP2 G5 APU_HDMI_CLK DP1_TXN1 1.8K_0402_5% ML_VGA_AUXP R547 VDDIO level Need Level shift H5 F4 0.1U_0402_16V7K 1.8K_0402_5% +1.2VS H4 F5 0.1U_0402_16V7K 15 ML_VGA_TXP3 J6 DP5_AUXP C978 R555 AUX 2~5 are for GFX interface use, they could be selected to I2C or AUX logic DP5_AUXN DP1_TXP1 C970 100MHz 100MHz_NSS DP4_AUXN R554 DP0_AUXN J5 DP1_TXN0 15 ML_VGA_TXN1 To FCH VGA ML DP3_AUXP DP3_AUXN DP1_TXP0 DISPLAY PORT C977 15 ML_VGA_TXN0 DP2_AUXN DP4_AUXP SER 15 ML_VGA_TXP0 DP2_AUXP To FCH DP0_AUXP T22 D1 DP0_TXP3 DP0_TXN0 If not used, pins are left unconnected (DG ref.) 20101111 To LVDS Translator 2 B T21 DP0_TXN2 DP0_AUXP_C 26 0.1U_0402_16V7K E T20 D2 0.1U_0402_16V7K C974 C T19 C972 DP0_AUXN DP0_TXP2 DP0_AUXP 2 T26 D4 D5 T25 DP0_AUXP DP0_TXP0 0.1U_0402_16V7K C973 E C971 D Place near APU 26 DP0_TXP0_C DISPLAY PORT MISC 26 CONN@ DISPLAY PORT To LVDS Translator C JCPU1D Place near APU A D Title AMD FS1 Display / MISC / HDT Size Document Number Custom Rev 0.03 QBL60 LA-7552P Date: Tuesday, February 22, 2011 Sheet E of 49 A Power Name VDD +CPU_CORE 50A VDDNB +CPU_CORE_NB 22.5A VDDIO +1.5V 4A 2 2 2 + + + 2 C5 1 + 330U_D2_2V_Y 180P_0402_50V8J C1024 0.22U_0603_16V4Z C1023 0.22U_0603_16V4Z C1022 0.22U_0603_16V4Z C1021 0.22U_0603_16V4Z C17 4.7U_0603_6.3V6K C16 4.7U_0603_6.3V6K C15 4.7U_0603_6.3V6K C14 22U_0805_6.3V6M C1013 180P_0402_50V8J C1030 180P_0402_50V8J C1029 0.22U_0603_16V4Z Decoupling between CPU and DIMMs across VDDIO and VSS split VDDP decoupling +1.2VS +1.2VS 120mil 2 C1037 1 0.22U_0603_16V4Z C1036 0.22U_0603_16V4Z 160mil 180P_0402_50V8J C1035 A5 A6 B5 B6 180P_0402_50V8J VDDR VDDR VDDR VDDR C1028 A3 A4 B3 B4 C1034 VDDR VDDR VDDR VDDR VDDP_B_1 VDDP_B_2 VDDP_B_3 VDDP_B_4 +1.5V 10U_0603_6.3V6M AG6 AG7 AG8 AG9 R22 R25 R28 T20 T23 T26 U22 U25 U28 V20 V23 V26 W22 W25 W28 Y24 Y26 AA28 C6 VDDP_A_1 VDDP_A_2 VDDP_A_3 VDDP_A_4 VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO + C1038 220U_6.3V_M CONN@ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS T11 T19 U4 U7 U10 U18 V9 V11 V19 W4 W7 W10 W12 W14 W16 W18 Y9 Y22 AA4 AA7 AB9 AB13 AB15 AB17 AB19 AB21 AB23 AB25 AB27 AC4 AC7 AC10 AC12 AC14 AC16 AC18 AC20 AC22 AC24 AC26 AC28 AD9 AD11 AE4 AE7 AE13 AE15 AE17 AE19 AE21 AE23 AE25 AE27 AF3 AF6 AF9 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28 AG10 AH5 AH8 AH13 AH15 AH17 AH19 AH21 AH23 AH25 AMD_TOPEDO_FS-1 C1038 change to SF000002Y00 20101228 VDDA VDDA VDDR decoupling C1051 2 1000P_0402_50V7K C1050 1000P_0402_50V7K C1049 1000P_0402_50V7K 1000P_0402_50V7K C1048 180P_0402_50V8J C1047 Keep trace from Caps to APU within 1.2" 180P_0402_50V8J Keep trace from resistor to APU within 0.6" C1046 AMD_TOPEDO_FS-1 180P_0402_50V8J 390U_2.5V_10M C1011 390U_2.5V_10M C1010 390U_2.5V_10M C1009 180P_0402_50V8J C1001 VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO C1045 C1025 180P_0402_50V8J 180P_0402_50V8J C992 180P_0402_50V8J C991 0.01U_0402_16V7K C990 0.01U_0402_16V7K C998 0.01U_0402_16V7K C1020 C989 0.22U_0603_16V4Z 0.22U_0603_16V4Z C1008 C1019 C988 0.22U_0603_16V4Z 180P_0402_50V8J C1007 0.22U_0603_16V4Z 180P_0402_50V8J 4.7U_0603_6.3V6K C1018 C987 C1006 22U_0805_6.3V6M 0.22U_0603_16V4Z C986 C1005 22U_0805_6.3V6M 0.22U_0603_16V4Z C985 22U_0805_6.3V6M C1004 C1003 22U_0805_6.3V6M 22U_0805_6.3V6M C997 C984 22U_0805_6.3V6M 22U_0805_6.3V6M C1002 +1.5V C1044 160mil AG2 AG3 AG4 AG5 AE11 AF11 +CPU_CORE_NB 180P_0402_50V8J 180P_0402_50V8J C1043 22U_0805_6.3V6M C18 0.22U_0603_16V4Z C1041 3300P_0402_50V7K C1040 40mil +VDDA_APU K11 K12 K13 K14 K16 K17 K18 L18 10U_0603_6.3V6M L1 FBMA-L11-201209-221LMA30T_0805 1 C7 +2.5VS VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB A7 A13 A15 A17 A19 A21 A23 A25 B7 C4 C10 C14 C16 C18 C20 C22 C24 C26 C28 D13 D15 D17 D19 D21 D23 D25 D27 E4 E10 E12 F9 F11 F14 F16 F18 F20 F22 F24 F26 F28 G4 G8 G13 G15 G17 G19 G21 G23 G25 J4 J8 J18 J20 J22 J24 K19 L4 L7 L10 M9 M11 M19 N4 N7 N10 N18 P9 P11 P19 R4 R7 R10 R18 T9 +1.5V C8 160mil +1.2VS 10U_0603_6.3V6M +1.2VS G28 H26 J28 K20 K23 K26 L22 L25 L28 M20 M23 M26 N22 N25 N28 P20 P23 P26 900mil VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB 0.22U_0603_16V4Z 120mil Del C1039 201012061900 JCPU1F +CPU_CORE_NB C1027 +1.5V 22U_0805_6.3V6M 160mil J9 J10 J11 J12 J14 J16 K9 K10 22U_0805_6.3V6M 900mil +CPU_CORE_NB +CPU_CORE T6 T10 T18 U1 U11 U19 V3 V6 V10 V18 W1 W11 W13 W15 W17 W19 Y3 Y6 Y10 Y12 Y14 Y16 Y18 Y20 AA1 AB3 AB6 AC1 AD3 AD6 AE1 C1012 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD C983 CPU_CORE 330uF X 22uF X 11 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 2000mil C1000 C1 D3 D6 E1 F3 F6 F8 G1 H3 H6 H8 J1 K3 K6 L1 L11 L19 M3 M6 M10 M18 N1 N11 N19 P3 P6 P10 P18 R1 R11 R19 T3 CONN@ 22U_0805_6.3V6M +CPU_CORE 3A / 3.5A JCPU1E 22U_0805_6.3V6M 2000mil 0.75A CORE_NB 330uF X 22uF X E +CPU_CORE C996 VDDA +2.5VS D CPU BOTTOM SIDE DECOUPLING 22U_0805_6.3V6M C C982 VDDP / VDDR +1.2VS B Consumption +1.2VS Demo Board Capacitor (include PWM side) C13 2 CPU_CORE 470uF x 22uF x 0.22uF x 180pF x 10nF x 4.7U_0603_6.3V6K C12 4.7U_0603_6.3V6K C11 4.7U_0603_6.3V6K C10 4.7U_0603_6.3V6K 0.22U_0603_16V4Z C1055 0.22U_0603_16V4Z C1054 0.22U_0603_16V4Z C1053 0.22U_0603_16V4Z C1052 2010/08/04 B C VDDIO_SUS (DIMM x2) 100uF x 0.1uF VDDP/R_PWM VDDP 470uF x 10uF x 10uF x 0.22uF x 180pF x VDDR 4.7uF x 0.22uF x 1nF x 180pF x 4 Compal Electronics, Inc 2010/08/04 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net A VDDIO_SUS (CPU side) 680uF x 330uF x 22uF x 4.7uF x 0.22uF x 180pF x Compal Secret Data Security Classification Issued Date CORE_NB 470uF x 22uF x 0.22uF x 180uF x D Title AMD FS1 PWR / GND Size Document Number Custom Rev 0.02 QBL60 LA-7552P Date: Tuesday, February 22, 2011 Sheet E of 49 ˛ˣ˗ ˣ˴́˸˿ʳ˘ˡ˕˞˟ +3VS +3VS D APU_ENBKL C E @ R620 100K_0402_5% +3VS S @ Q14 2N7002_SOT23 1 +1.5VS 1 @ R619 DP_ENBKL MMBT3904_NL_SOT23-3 100K_0402_5% @ Q15 2 2.2K_0402_5% B D G DP0_HPD C R618 @ R614 4.7K_0402_5% 2 Q13 MMBT3904_NL_SOT23-3 LVDS_HPD LVDS_HPD R616 4.7K_0402_5% E 26 B From Translator @ R617 100K_0402_5% @ R615 1K_0402_5% Translator HPD 2 D R613 10K_0402_5% 1 +1.5VS R621 10K_0402_5% R623 4.7K_0402_5% APU_ENBKL R624 @ 0_0402_5% ENBKL 36 B From FCH 2 @ R622 1K_0402_5% CRT HPD E Q16 MMBT3904_NL_SOT23-3 FCH_CRT_HPD DP1_HPD C 15 FCH_CRT_HPD R627 100K_0402_5% ˣ˴́˸˿ʳ˘ˡ˩˗˗ C +3VS C +3VS 2 Q17 MMBT3904_NL_SOT23-3 @ R633 DP_ENVDD @ R634 100K_0402_5% ˣ˴́˸˿ʳˣ˪ˠ S G Q18 @ 2N7002_SOT23 B +3VS B D C E @ Q19 2 2.2K_0402_5% B MMBT3904_NL_SOT23-3 100K_0402_5% DP5_HPD C R659 APU_ENVDD 27 E APU_HDMI_HPD @ R632 4.7K_0402_5% 1 B From HDMI Conn 28 APU_HDMI_HPD @ R631 100K_0402_5% R630 4.7K_0402_5% R628 10K_0402_5% @ R629 1K_0402_5% HDMI HPD 2 1 +1.5VS R636 4.7K_0402_5% 2 R635 47K_0402_5% R637 R638 4.7K_0402_5% C E DP_INT_PWM Q21 2 2.2K_0402_5% B MMBT3904_NL_SOT23-3 APU_INVT_PWM 26,27 D S G Q20 2N7002_SOT23 Q15 / Q19 / Q21 change to SB000006A00 20101228 A A Compal Secret Data Security Classification Issued Date 2010/08/04 Deciphered Date Title AMD FS1 Singal Level Shifter THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net 2010/08/04 Size Document Number Custom Rev 0.03 QBL60 LA-7552P Date: Tuesday, February 22, 2011 Sheet 10 of 49 ON/OFF switch Fan Control Circuit Power Button +3VS 100K_0402_5% D12 FAN_SPEED ON/OFF# 36 51_ON# 40 C702 1000P_0402_50V7K~N C701 C700 U53 R527 ON/OFFBTN# R668 10K_0402_5% D SW SMT1-05-A_4P +5VS +3VALW 7236LGH 1 GND GND GND GND EN VIN VOUT VSET D ACES_85205-0300N 2.2U_0603_106K 1000P_0402_50V7K~N +5VS_FAN APL5607KI-TRG_SO8 2 36 FAN_SPEED FAN_SPEED C703 10U_0603_6.3V6M GND GND 3 JFAN1 DAN202UT106_SC70-3 Change to SC600000B00 C773 36 CONN@ FAN_SET 36 EC_ON EC_ON SW SMT1-05-A_4P R528 Q28 G %RWWRP6LGH D 1000P_0402_50V7K S SSM3K7002FU_SC70-3 10K_0402_5% C C EC BIOS ROM +3VALW R1049 0_0603_5% C1370 ON/OFFBTN# PW R_LED# 32,36 +5VALW LID_SW # 36 +3VALW LID_SW # @ C1374 R1055 U42 EC_SPICS#/FSEL# R1050 4.7K_0402_5% R1052 4.7K_0402_5% 36 EC_SPICS#/FSEL# +3VALW EC_SPI_W P# EC_SPI_HOLD#7 CS# WP# HOLD# GND VCC SCLK SI SO EC_SPICLK_R EC_SO_SPI_SI_R EC_SI_SPI_SO_R @ R1051 R1053 R1054 1 0_0402_5% 33P_0402_50V8K 0_0402_5% EC_SPICLK 36 0_0402_5% EC_SO_SPI_SI 36 0_0402_5% EC_SI_SPI_SO 36 MX25L1606EM2I-12G SOP 8P SA000041N00 ACES_85201-06051 0.1U_0402_16V4Z +SPI_VCC JBTN1 1 2 3 4 5 6 GND GND PJSOT24CH_SOT23-3 D27 B B @ A A Compal Secret Data Security Classification 2010/06/30 Issued Date 2012/06/30 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net Deciphered Date Title Compal Electronics, Inc P31-KB /SW/TP/Lid Size B Date: Document Number Rev 0.03 QBL60 LA-7552P Tuesday, February 22, 2011 Sheet 35 of 49 +3VALW C1347 2 0.1U_0402_16V4Z C1348 2 0.1U_0402_16V4Z L65 2+EC_VCCA BLM18AG601SN1D_2P C1349 1000P_0402_50V7K 1 C1350 1000P_0402_50V7K 13,16 LPC_CLK0_EC R1011 C1353 +3VALW 13 47K_0402_5% 0.1U_0402_16V4Z A_RST# 14 KSO[0 15] EC_SCI# LPC_CLK0_EC A_RST# 12 13 37 EC_SCI# 20 38 @ R1015 10K_0402_5% KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO[0 15] 37 KSI[0 7] KSI[0 7] C 37 @ +3VALW +3VS +3VALW R1020 R1021 R1022 R1023 @ @ @ 2.2K_0402_5% EC_SMB_CK2 2.2K_0402_5% EC_SMB_DA2 2.2K_0402_5% 2.2K_0402_5% GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1 LAD0 LPC & MISC INVT_PWM/PWM1/GPIO0F BEEP#/PWM2/GPIO10 FANPWM1/GPIO12 ACOFF/FANPWM2/GPIO13 PWM Output AD PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 Int K/B KSO6/GPIO26 Matrix KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49 68 70 71 72 FAN_SET IREF CHGVADJ PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D TP_CLK/PSCLK3/GPIO4E TP_DATA/PSDAT3/GPIO4F 83 84 85 86 87 88 EC_MUTE# USB_ON# W LAN_LED# BT_LED# TP_CLK TP_DATA SDICS#/GPXOA00 SDICLK/GPXOA01 SDIDO/GPXOA02 SDIDI/GPXID0 97 98 99 109 EN_W OL VLDT_EN LID_SW # SPIDI/RD# SPIDO/WR# SPICLK/GPIO58 SPICS# 119 120 126 128 CIR_RX/GPIO40 CIR_RLC_TX/GPIO41 FSTCHG/SELIO#/GPIO50 BATT_CHGI_LED#/GPIO52 CAPS_LED#/GPIO53 BATT_LOW_LED#/GPIO54 SUSP_LED#/GPIO55 SYSON/GPIO56 VR_ON/XCLK32K/GPIO57 AC_IN/GPIO59 73 74 89 90 91 92 93 95 121 127 77 78 79 80 SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47 EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04 EC_ON/GPXO05 EC_SWI#/GPXO06 ICH_PWROK/GPXO06 GPO BKOFF#/GPXO08 WL_OFF#/GPXO09 GPXO10 GPXO11 100 101 102 103 104 105 106 107 108 EC_RSMRST# EC_LID_OUT# EC_ON EC_PME# FCH_PW RGD BKOFF# PM_SLP_S4#/GPXID1 ENBKL/GPXID2 GPXID3 GPXID4 GPXID5 GPXID6 GPXID7 110 112 114 115 116 117 118 PE_GPIO1 ENBKL EAPD EC_THERM# SUSP# PBTN_OUT# @ TL_BKOFF# R29 0_0402_5% V18R 124 PS2 Interface 14 14 14 SLP_S3# SLP_S5# EC_SMI# R1036 RTC_CLK 13,16 R1037 100K_0402_5% NUM_LED# OSC OSC NC @ X2 @ C1362 15P_0402_50V8J EC_CRY1 EC_CRY2 0_0402_5% 14 15 16 17 18 19 25 28 29 30 31 32 34 36 122 123 GPIO SM Bus PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C GPIO EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A C1358 22P_0402_50V8J 32.768KHZ_12.5PF_Q13MC14610002 GPI XCLK1 XCLK0 100P_0402_50V8J ECAGND BATT_TEMP 40 ADP_I 39 AD_BID0 37 +3VS FCH_PW RGD R1035 FAN_SET 35 IREF 39 CHGVADJ 39 4.7K_0402_5% 4.7K_0402_5% TP_DATA VGATE 47 EN_W OL 29 VLDT_EN 38,46 LID_SW # 35 R1018 R1019 C EC_SPICLK 35 EC_SPICLK_L R1033 0_0402_5% EC_SI_SPI_SO 35 EC_SO_SPI_SI 35 EC_SPICS#/FSEL# @ C1357 33P_0402_50V8K Reserve for EMI, close to EC 35 Delay EC_PWROK 50ms for VGA criterial FSTCHG 39 CHARGE_LED0# 32 CAPS_LED# 32 CHARGE_LED1# 32 PW R_LED# 32,35 SYSON 38,43 VR_ON 47 ACIN 39 CHARGE_LED0# CAPS_LED# CHARGE_LED1# PW R_LED# SYSON VR_ON ACIN ACIN C1363 100P_0402_50V8J ENBKL 100K_0402_5% R1034 B @ EC_RSMRST# 14 EC_LID_OUT# 14 EC_ON 35 FCH_PW RGD 14 BKOFF# 27 W L_OFF#_EC 32 RF_LED# 32 VGA_ON 25 Delay SUSP# 10ms PE_GPIO1 13,25 ENBKL 10 EAPD 30 EC_THERM# 8,13,47 SUSP# 32,38 PBTN_OUT# 14 TL_BKOFF# 26,27 R1032 10K_0402_5% @ C1359 14,29,32 FCH_PCIE_W AKE# 4.7U_0603_6.3V6K EC_PME# @ R2 0_0402_5% L66 ECAGND FBM-11-160808-601-T_0603 A Compal Electronics, Inc Compal Secret Data 2010/08/04 Deciphered Date 2010/08/04 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC 10K_0402_5% 20mil Security Classification http://hobi-elektronika.net @ +5VS TP_CLK EC_MUTE# 30 USB_ON# 34 W LAN_LED# 32 BT_LED# 32 TP_CLK 37 TP_DATA 37 EC_SPICLK_L KB930QF A1 LQFP 128P Issued Date C1360 +3VALW NC 2 EC_CRY2 @ C1361 15P_0402_50V8J EC_TX_P80_DATA EC_RX_P80_CLK ON/OFF# 32,37 NUM_LED# EC_CRY1 A EC_INVT_PW M FAN_SPEED 32 EC_TX_P80_DATA 32 EC_RX_P80_CLK 35 ON/OFF# EC_SCI# 10K_0402_5% SLP_S3# SLP_S5# EC_SMI# 27 EC_INVT_PW M 35 FAN_SPEED +3VS R1623 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 GND GND GND GND GND BATT APU/VGA EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 ADP_I AD_BID0 SPI Device Interface SPI Flash ROM 39 BATT_TEMP DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D IREF/DA2/GPIO3E DA3/GPIO3F 11 24 35 94 113 B R1027 R1028 R1029 R1030 R37 R1619 @ R1617 R1616 40 40 6,19,26 6,19,26 ACOFF 63 64 65 66 75 76 +3VALW EC_SMB_CK1 2.2K_0402_5% EC_SMB_DA1 2.2K_0402_5% KSO1 47K_0402_5% KSO2 47K_0402_5% LID_SW # 10K_0402_5% USB_ON# 10K_0402_5% EC_SMI# 10K_0402_5% EC_MUTE# 10K_0402_5% ACOFF BATT_TEMP/AD0/GPIO38 BATT_OVP/AD1/GPIO39 ADP_I/AD2/GPIO3A Input AD3/GPIO3B AD4/GPIO42 SELIO2#/AD5/GPIO43 DA Output 55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82 21 23 26 27 AGND 33_0402_5% 10 69 @ C1352 22P_0402_50V8J @ 2 R1014 EC_GA20 EC_KBRST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 D AVCC VCC VCC VCC VCC VCC VCC U31 0.1U_0402_16V4Z 67 22 33 96 111 125 D 14 EC_GA20 14 EC_KBRST# 13 SERIRQ 13,32 LPC_FRAME# 13,32 LPC_AD3 13,32 LPC_AD2 13,32 LPC_AD1 13,32 LPC_AD0 C1351 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z C1346 C1345 ECAGND Title EC ENE KB930 Size B Date: Document Number Rev 0.03 QBL60 LA-7552P Tuesday, February 22, 2011 Sheet 36 of 49 INT_KBD Conn P9 FS1 PWR/GND 36 36 ID ACES_88514-02401-071 26 25 @ 100P_0402_50V8J KSO6 C1547 @ 100P_0402_50V8J KSI2 C1548 @ 100P_0402_50V8J KSO8 C1549 @ 100P_0402_50V8J KSO5 C1550 @ 100P_0402_50V8J KSO13 C1551 @ 100P_0402_50V8J KSI3 C1552 @ 100P_0402_50V8J KSO12 C1553 @ 100P_0402_50V8J KSO14 C1554 @ 100P_0402_50V8J KSO11 C1555 @ 100P_0402_50V8J KSI7 C1556 @ 100P_0402_50V8J KSO10 C1557 @ 100P_0402_50V8J KSI6 C1558 @ 100P_0402_50V8J KSO3 C1559 @ 100P_0402_50V8J KSI5 C1560 @ 100P_0402_50V8J KSO4 C1561 @ 100P_0402_50V8J KSI4 C1562 @ 100P_0402_50V8J KSI0 C1563 @ 100P_0402_50V8J KSO9 C1564 @ 100P_0402_50V8J KSO0 C1565 @ 100P_0402_50V8J KSI1 C1566 @ 100P_0402_50V8J KSO15 KSO0 KSO7 KSO5 KSO2 KSO4 KSO8 KSO6 KSO11 KSO10 KSO12 KSI3 KSI0 KSI2 KSI4 KSI6 KSI7 KSI1 KSI5 KSO13 KSO1 KSO3 KSO9 KSO14 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 CONN PIN define need double check GND2 GND1 R01 SR 100K 0V R02 ER 100K 8.2K 0.25V R03 PR 100K 18K 0.5V R10 MP 100K 33K 0.82V +CPU_CORE 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 JKB1 CONN@ +VGA_CORE 1 C435 + C436 + + + VGA@ C474 VGA@ +3VALW + + + + @ Ra 36 AD_BID0 AD_BID0 330U_D2_2V_Y @ 100P_0402_50V8J C1545 C1014 330U_D2_2V_Y C1544 KSO7 Vab C995 330U_D2_2V_Y KSO1 @ 100P_0402_50V8J Rb C999 330U_D2_2V_Y @ 100P_0402_50V8J C1546 Ra C994 330U_D2_2V_Y C1543 KSO15 BRD ID C993 KSO2 330U_D2_2V_Y KSO[0 15] 330U_D2_2V_Y KSI[0 7] KSO[0 15] 330U_D2_2V_Y KSI[0 7] R1024 100K_0402_5% R1026 0_0402_5% Rb VGA@ +5VS To TP/B Conn ZZZ C1567 0.1U_0402_16V4Z JTP1 @ @ H8 H_3P8 @ H9 H_3P8 @ H10 H_4P3 @ @ H6 H_3P0 H5 H_3P8 GND1 GND2 H4 H_3P0 H2 H_3P8 PCB @ @ C1568 C1569 100P_0402_50V8J 100P_0402_50V8J 2 @ ACES_85201-06051 H12 H_3P0 H13 H_3P0 H14 H_4P3 H15 H_4P3 H16 H_3P0 H18 H_3P8 @ H21 H_3P0 @ @ @ @ 1 @ H22 H_7P0 @ H23 H_3P3 @ @ @ H3 H_10P0X6P0N H7 H_3P0 @ H17 H_2P7N @ 1 H1 H_2P7X5P0N @ 3 D10 @ H20 H_3P0 @ For ESD Close to JSPK1 D9 YSDA0502C 3P C/A SOT-23 @ H19 H_3P0 ACES_85205-04001 CONN@ For ESD Close to JTP1 @ YSDA0502C 3P C/A SOT-23 YSDA0502C 3P C/A SOT-23 G5 G6 1 SPK_R1 SPK_R2 SPK_L1 SPK_L2 SPK_R1 SPK_R2 SPK_L1 SPK_L2 30 30 30 30 @ D28 @ D17 H11 H_4P3 JSPK1 SW/L SW/R 1 1 TP_CLK TP_DATA TP_CLK TP_DATA @ YSDA0502C 3P C/A SOT-23 GND_LAN FD1 FD3 FD4 DTSGZML-63N-Q-T-R_5P 1 SW/R FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 DTSGZML-63N-Q-T-R_5P FD2 SW6 SW5 SW/L 36 36 Close to LED1 C1644 0.1U_0603_25V7K Close to LED2 C1645 0.1U_0603_25V7K Close to LED3 29 +LAN_SROUT1.05 +LAN_SROUT1.05 +LAN_VDD L120 W=60mils W=60mils C1646 C1647 4.7UH_1008HC-472EJFS-A_5%_1008 0.1U_0603_25V7K Close to LED5 C1648 These components close to Pin 36 ( Should be place within 200 mils ) 0.1U_0603_25V7K For ESD Cap to LED gap is 1.2mm Issued Date Compal Electronics, Inc Compal Secret Data Security Classification http://hobi-elektronika.net 0.1U_0603_25V7K Close to LED4 2010/11/25 Deciphered Date 2011/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title P33-Other IO/USB (right) Size Document Number Custom Rev 0.02 QBL50 LA-7551P Date: Tuesday, February 22, 2011 Sheet 37 of 49 2 D S 28,45 SUSP 32,36 SUSP# SUSP D G G S D S SUSP SSM3K7002FU_SC70-3 Q53 G Q58 D SSM3K7002FU_SC70-3 R1108 100K_0402_5% 2 +5VALW C1451 0.1U_0603_25V7K SSM3K7002FU_SC70-3 R1104 100K_0402_5% Q52 G SYSON 1 3 36,43 R1109 10K_0402_5% SSM3K7002FU_SC70-3 R1102 10K_0402_5% SSM3K7002FU_SC70-3 S R1110 470_0603_5% 1 C1452 C1455 1U_0402_6.3V4Z S VLDT_EN# SYSON# U40 SI4800BDY-T1-GE3_SO8 10U_0603_6.3V6M C1453 Q59 SUSP 36,46 VLDT_EN Q57 G D +3VS C1454 10U_0603_6.3V6M 10U_0603_6.3V6M D Q64 G S SSM3K7002FU_SC70-3 3VS_GATE 200K_0402_5% R1112 +VSB 1.1VS_GATE 47K_0402_5% VLDT_EN# S +3VALW R1105 C1450 0.1U_0603_25V7K ʾˆ˩˔˟˪ʳ˧ˢʳʾˆ˩˦ʳʻˆˁˆ˔ʼ D Q51 G R1098 100K_0402_5% +VSB SSM3K7002FU_SC70-3 1 1 3 2 Q56 G S SSM3K7002FU_SC70-3 D VLDT_EN# R1101 470_0603_5% S SUSP 2 C1449 5VS_GATE 100K_0402_5% SUSP C1447 Q55 G 1 1U_0402_6.3V4Z +VSB R1100 1K_0402_5% R1097 100K_0402_5% 10U_0603_6.3V6M D 1 R1103 +5VALW +1.1VS C1448 R1099 470_0603_5% 10U_0603_6.3V6M C1444 1U_0603_10V6K C1446 +1.1VALW U39 AO4430L_SO8 10U_0805_10V4Z C1445 C1443 10U_0805_10V4Z 10U_0805_10V4Z ʾ˄ˁ˄˩˔˟˪ʳ˧ˢʳʾ˄ˁ˄˩˦ʳʻ˄ˁ˄˔ʼ +5VS U38 SI4800BDY-T1-GE3_SO8 E +5VALW +5VALW D ʾˈ˩˔˟˪ʳ˧ˢʳʾˈ˩˦ʳʻˈ˔ʼ C SSM3K7002FU_SC70-3 B A ˩˚˔ʳˣ̂̊˸̅ +1.5V to +1.5VSG (1.5A) C1456 0.1U_0603_25V7K +1.5V +1.5VSG 1 SSM3K7002FU_SC70-3 +5VALW C1462 VGA@ 0.1U_0603_25V7K 1 3 S S SSM3K7002FU_SC70-3 1.5_VDDC_PWREN# G VGA@ SSM3K7002FU_SC70-3 1.5VSG_GATE VGA@ R1118 100K_0402_5% Q74 D 1.5_VDDC_PWREN# 2 VGA@ R1120 47K_0402_5% G VGA@ S SSM3K7002FU_SC70-3 VGA@ C1464 0.1U_0402_16V7K SUSP Q73 R1119 100K_0402_5% VGA_PWR_ON# 25,42,45 VGA_PWR_ON +VGA_CORE +1.8VSG R1123 100K_0402_5% +1.2VS D S G Q68 2N7002_SOT23 2 VLDT_EN# R1131 100K_0402_5% @ PJ14 2 +3VSG 1.5_VDDC_PWREN# JUMP_43X118 25,48 1.5_VDD_PWREN 1 +3VS S SSM3K7002FU_SC70-3 D G S G Q77 2N7002_SOT23 R1134 10K_0402_5% 1 Q70 G S 2010/08/04 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification SUSP SSM3K7002FU_SC70-3 2010/08/04 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net A Q62 2 SUSP SSM3K7002FU_SC70-3 3 S D Q72 G SSM3K7002FU_SC70-3 +5VALW Change to Jump 201012062000 R1137 470_0603_5% 1 SYSON# 3 2 G S D Q71 VGA_PWR_ON# +3VS to +3VSG (3.3A) +0.75VS R1136 470_0603_5% 1 D G VGA@ S SSM3K7002FU_SC70-3 +2.5VS R1135 470_0603_5% D Q65 1.5_VDDC_PWREN# VGA@ S SSM3K7002FU_SC70-3 +1.5V G VGA@ S SSM3K7002FU_SC70-3 D Q66 VGA_PWR_ON# VGA@ Title DC Interface G R1128 470_0603_5% D Q67 1 D R1127 470_0603_5% R1126 470_0603_5% VGA@ R1125 470_0603_5% VGA@ 2 2 +1.0VSG 3 D +VSB C1463 0.22U_0603_16V4Z VGA@ R1114 470_0603_5% 2 G Q61 G VGA@ C1458 1U_0402_6.3V4Z S 1 D D VGA@ C1457 47K_0402_5% 2 10U_0603_6.3V6M Q60 R1117 470_0603_5% VGA@ C1460 R1122 C1461 10U_0603_6.3V6M R1116 100K_0402_5% SUSP# +1.5VS AP2301GN-HF_SOT23-3 Q63 10U_0603_6.3V6M VGA@ C1459 +1.5V 10U_0603_6.3V6M ʾ˄ˁˈ˩ʳ˧ˢʳʾ˄ˁˈ˩˦ʳʻ˄ˁˈ˔ʼ U41 VGA@ AO4430L_SO8 B C D Size B Date: Document Number Rev 0.03 QBL60 LA-7552P Tuesday, February 22, 2011 Sheet E 38 of 49 B C PL1 HCB2012KF-121T50_0805 2 X7R type PC5 0.1U_0603_16V7K PR1 22K_0402_1% 1 PC4 100P_0402_50V8J PU1 VCC TMSNS1 GND RHYST1 OT1 TMSNS2 OT2 RHYST2 OTP_N_001 OTP_N_002 PR2 22.1K_0402_1% 2 VL PC3 1000P_0402_50V7K @ACES_88323-0471 PC2 100P_0402_50V8J 4 PC1 1000P_0402_50V7K 2 1 PH1 under CPU botten side : CPU thermal protection at 92 +-3 degree C Recovery at 80 +-3 degree C VIN PL2 HCB2012KF-121T50_0805 ADPIN PJPDC1 D A OTP_N_003 VMB PJP2 @SUYIN_200275MR009G186ZL VS_ON 42 0_0402_5% BATT+ PC6 1000P_0402_50V7K 2 PD1 PR27 1K_0402_1% PC7 0.01U_0402_25V7K 1 GND GND EC_SMCA EC_SMDA TS_A PH1 100K_0402_1%_NCP15W F104F03RC PR4 PL4 HCB2012KF-121T50_0805 2 @PJSOT24CW_SOT323-3 10 11 G718TM1U_SOT23-8 PL3 HCB2012KF-121T50_0805 2 PD2 PR31 100_0402_1% EC_SMB_DA1 36 VL PR13 100K_0402_1% BATT_TEMP 36 1K_0402_1% 42,45 SPOK PR16 0_0402_5% 2VSB_N_002 G S VSB_N_001 VIN D PQ1 TP0610K-T1-GE3_SOT23-3 PQ2 SSM3K7002FU_SC70-3 PC10 0.1U_0402_16V7K 1 1VSB_N_003 +3VALW 2 100K_0402_5% PR30 PR12 22K_0402_1% PR29 EC_SMB_CK1 36 @PJSOT24CW _SOT323-3 PC8 0.22U_0603_25V7K PR10 100K_0402_1% PR28 100_0402_1% +VSBP PC9 0.1U_0603_25V7K B+ 2 PD3 RLS4148_LL34-2 VS_N_001 1 +VSB (120mA,40mils ,Via NO.= 1) PR18 68_1206_5% VS PC12 0.1U_0603_25V7K 2 PC11 0.22U_0603_25V7K 2 PR21 100K_0402_1% 1 @JUMP_43X39 PQ3 PR17 TP0610K-T1-GE3_SOT23-368_1206_5% N1 1 PD4 RLS4148_LL34-2 2 BATT+ PJ2 +VSBP 4 35 PR22 22K_0402_1% 51_ON# VS_N_002 Issued Date http://hobi-elektronika.net A Compal Electronics, Inc Compal Secret Data Security Classification 2009/01/23 Deciphered Date 2010/01/23 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC B C Title DCIN / BATT CONN / OTP Size Document Number Rev 0.1 NCL61 LA-6321P M/B Date: Tuesday, February 22, 2011 D Sheet 40 of 44 B C PC115 2 1CHG_N_0081 CELLS CSOP 21 ICOMP CSIN 20 VCOMP CSIP 19 ICM PHASE 18 LX_CHG VREF UGATE 17 DH_CHG DCIN CHLIM BOOT 16 6251aclim 10 ACLIM VDDP 15 11 VADJ LGATE 14 GND PGND 13 6251VREF 226K_0402_1% Rtop PR128 20K_0402_1% 36 CHGVADJ PD106 RB751V-40TE17_SOD323-2 6251VDDP 12 DL_CHG PQ110 26251VDD 1 PR102 0.02_1206_1% BATT+ PC101 10U_0805_25V6K CHG_CHLIM ACPRN G PQ109 @SSM3K7002FU_SC70-3 PL101 10UH +-20% MSCDRI-104A-100M-E CHG PC121 0.1U_0603_25V7K BST_CHGA PR127 PR122 2.2_0603_1% PR126 0_0603_5% BST_CHG S PQ108 AON7408L_DFN8-5 1CHG_SNUB2 PC114 @2200P_0402_25V7K PR125 @4.7_1206_5% CSOP CHG_N_006 AON7406L_DFN8-5 PR129 4.7_0603_5% PC123 4.7U_0805_6.3V6K ISL6251AHAZ-T QSOP 24P PC124 @680P_0402_50V7K 6251VREF CHG_N_001 D CSON 1 PC120 0.1U_0402_16V7K PC105 0.1U_0402_25V6 PR111 14.3K_0402_1% PC106 2200P_0402_25V7K PC110 1000P_0402_50V7K 2 22 PR118 20_0603_5% CHG_CSON PC113 0.047U_0603_16V7K CHG_CSOP PR119 20_0603_5% CHG_CSIN PC118 PR120 0.1U_0603_25V7K 20_0603_5% CHG_CSIP 2 PR104 140K_0402_1% CSON PQ106 DTC115EUA_SC70-3 PQ111 DTC115EUA_SC70-3 EN VIN PR115 100K_0402_1% ACPRN ACOFF 23 100_0402_1% CHG_ICM PR103 150K_0402_1% PC122 0.01U_0402_25V7K 2 IREF 36 ADP_I ACSET ACPRN PC120 must close EC pin CHG_VCOMP 36 ACOFF 10K_0402_1% PR123 0.01U_0402_25V7K PACIN PR124 22K_0402_5% 6800P_0402_25V7K CHG_ICOMP 24 PR121 DCIN PC112 1U_0603_25V6K PC117 VDD CHG_N_009 1 PC116 SSM6N7002FU_US6 6251_EN PR130 0_0402_5% PR110 47K_0402_1% PR105 10K_0402_1% 2 PQ107B 2S: Float 3S: GND 10_1206_5% CHG_N_005 PU101 PR112 10K_0402_1% 1 SSM6N7002FU_US6 PR113 CHG_VADJ 3CHG_N_002 PD101 CHG_VIN PC109 2.2U_0603_6.3V6K 1 PQ107A 36 100K_0402_1% PR117 PR116 150K_0402_1% ACSETIN PC111 @10U_0805_25V6K 1 2 FSTCHG CHG_N_001 36 RB751V-40TE17_SOD323-2 ACSETIN PR114 10K_0402_1% 2 PQ105 DTC115EUA_SC70-3 PR108 191K_0402_1% 6251VDD CHG_N_003 PQ103 AO4407AL 1P SO8 CSIN CSIP PR107 200K_0402_1% PC108 0.1U_0603_25V7K 2 PR109 47K_0402_1% 1CHG_N_010 PQ104 DTA144EUA_SC70-3 VIN B+ CHG_B+ PL102 1.2UH_1231AS-H-1R2N=P3_2.9A_30% PC104 10U_0805_25V6K 1 PR101 0.02_1206_1% PC107 5600P_0402_25V7K VIN P3 PQ102 AO4409L_SO8 P2 @10U_0805_25V6K PC102 10U_0805_25V6K B+ (B+ 6A,240mils ,Via NO.= 12) PQ101 AO4435L_SO8 D PC103 4.7U_0805_25V6-K A PR106 22K_0402_1% 3 PR131 47K_0402_1% ACIN PR132 10K_0402_1% 36 PACIN C ACPRN PQ112 B 1 Iada=0~4.737A(90W);CP=4.03A;where Racdet=0.020ohm,where Rtop=12.4K 90W for Dis:Rtop:SD00000AJ80 Iada=0~3.421A(65W);CP=2.91A;where Racdet=0.020ohm,where Rtop=226K 65W for UMA:Rtop:SD034226380 Astro2010_01_15 need confirm P/N CP= 85%*Iada; PR133 10K_0402_1% 1 6251VDD PR136 20K_0402_1% E MMBT3904W H NPN SOT323-3 CP mode Vaclim=VREF*(Rbot//Rinternal/(Rtop//Rinternal+Rbot//Rinternal)) when 90W Vaclim=2.39*(20K//152K/(20K//152K+12.4K//152K))=1.44966V when 65W Vaclim=2.39*(20K//152K/(20K//152K+226K//152K))=0.38914V Iinput=(1/Racdet)*((0.05*Vaclim/VREF+0.05)) when 90W,Iinput=(1/0.02)*(0.05*1.44966/2.39+0.05)=4.02A when 65W,Iinput=(1/0.02)*(0.05*0.38914/2.39+0.05)=2.92A CC=0.25A~3A CHGVADJ=(Vcell-4)/0.10627 IREF=1.016*Icharge Vcell IREF=0.254V~3.048V 4V VCHLIM need over 95mV 4.2V CHGVADJ Issued Date http://hobi-elektronika.net A Compal Electronics, Inc Compal Secret Data Security Classification 0V 1.882V 2009/01/23 Deciphered Date 2010/01/23 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC B C Title CHARGER Size Document Number Rev 0.1 NCL61 LA-6321P M/B Date: Tuesday, February 22, 2011 D Sheet 41 of 44 A B C D E 2VREF_6182 VO1 24 PGOOD 23 VO2 PC306 10U_0805_25V6K PR307 165K_0402_1% PC312 2200P_0402_50V7K ENTRIP1 B++ FB1 REF PR306 20K_0402_1% PQ305 AON7408L_DFN8-5 2 PR305 30.9K_0402_1% ENTRIP1 P PAD 25 TONSEL PU301 PC313 10U_0805_6.3V6M PQ303 AON7408L_DFN8-5 FB2 PC304 4.7U_0805_25V6-K PC310 2200P_0402_50V7K PR303 133K_0402_1% FB_5V ENTRIP2 +3VLP PC309 0.1U_0402_25V6 1 PC322 @680P_0402_50V7K FB_3V ENTRIP2 PL301 HCB2012KF-121T50_0805 PR302 20K_0402_1% B++ B+ PC311 0.1U_0402_25V6 PR301 13.7K_0402_1% 1 PC308 1U_0603_16V6K 19 LG_5V NC 18 17 16 15 SPOK 40,45 SNUB_5V VREG5 VIN PR314 499K_0402_1% LGATE1 RT8205LZQW(2) WQFN 24P PWM PQ306 AO4406AL_SO8 AO4468L_SO8 VL PC318 4.7U_0805_10V6K + PC305 150U_B2_6.3VM_R35M PC320 1U_0603_10V6K +5VALWP 2 PR315 95.3K_0402_1% EN0 PR313 @4.7_1206_5% LGATE2 PL305 4.7UH_FMJ-0630T-4R7 HF_5.5A_20% PC317 @680P_0402_50V7K LX_5V 20 PHASE1 EN UG_5V PHASE2 13 B++ 22 21 14 BOOT1 UGATE1 GND 12 2 LG_3V PQ304 PR309 PC315 2.2_0402_5% 0.1U_0402_10V7K BST_5V BST1_5V UGATE2 BOOT2 + 11 PC303 150U_B2_6.3VM_R35M LX_3V +3VALWP PR312 @4.7_1206_5% PC316 @680P_0402_50V7K SNUB_3V PL303 4.7UH_FMJ-0630T-4R7 HF_5.5A_20% VREG3 SKIPSEL PC314 PR308 0.1U_0402_10V7K BST1_3V 1 2 BST_3V 2.2_0402_5% UG_3V 10 B++ PC319 0.1U_0603_25V7K N_3_5V_001 G D PQ307A SSM6N7002FU_US6 D ENTRIP2 ENTRIP1 2VREF_6182 S PQ307B SSM6N7002FU_US6 G +3VLP +CHGRTC PJP302 S PAD-OPEN 2x2m PJP306 +5VALWP VL +5VALW (5A,200mils ,Via NO.= 10) +5VALW (5A,200mils ,Via NO.= 10) VL PJP301 PQ308 DTC115EUA_SC70-3 +3VALWP PAD-OPEN 2x2m PAD-OPEN 4x4m PJP303 +3VALW (4A,120mils ,Via NO.= 8) PAD-OPEN 4x4m EC:+3VL, reserve PR319, install PR318, PR320 100K EC:+3VALW, reserve PR318, install PR319, PR320 42.2K Compal Secret Data Security Classification 2007/08/02 Issued Date 2008/08/02 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net A PAD-OPEN 4x4m PJP305 PC321 2.2U_0603_10V6K PR317 100K_0402_5% 2 PR319 100K_0402_1% 2 PR320 42.2K_0402_1% VS 40 VS_ON +5VALWP B C D Title Compal Electronics, Inc 3.3VALWP/5VALWP Size Document Number Custom Date: Rev 0.1 LAXXXX Tuesday, February 22, 2011 Sheet E 42 of 44 A B C D 1 PC402 22U_0805_6.3VAM 1 PR402 10K_0402_1% PC401 22U_0805_6.3VAM SY8033BDBC_DFN10_3X3 PR401 20K_0402_1% PC404 68P_0402_50V8J 1.8VSP_FB NC TP PR405 @47K_0402_5% 11 EN_1.8VSP 2 PR404 0_0402_5% FB VFB=0.6V Vo=VFB*(1+PR401/PR402)=0.6*(1+20K/10K)=1.8V +1.8VSGP 2 EN LX PR403 4.7_1206_5% SVIN PC405 @0.1U_0402_10V7K 25,38,46 VGA_PWR_ON PL401 1UH_VLS252012T-1R0N1R7_2.4A_30% 1.8VSP_LX PVIN PC406 680P_0402_50V7K SNUB_1.8VSP LX NC PVIN PC403 22U_0805_6.3VAM 10 1.8VSP_VIN PU401 HCB1608KF-121T30_0603 PG PL402 +5VALW PJP401 +1.8VSGP +1.8VSG (2A, 80mils, Via NO.= 4) PAD-OPEN 3x3m 3 4 Issued Date http://hobi-elektronika.net A Compal Electronics, Inc Compal Secret Data Security Classification 2009/01/23 Deciphered Date 2010/01/23 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC B C Title +1.8VSGP Size Document Number Rev 0.1 NCL61 LA-6321P M/B Date: Tuesday, February 22, 2011 D Sheet 43 of 44 D D 0_0402_5% B+ PR502 2.15K_0402_1% NC LGATE TRIP_1.5V +5VALW LG_1.5V PGOOD 11 10 1 2 +1.5VP C 15.4K_0402_1% +5VALW PC510 4.7U_0805_10V6K PQ502 FDS6690AS-G_SO8 CS VDDP PR508 1SNUB_1.5V FB PL501 2.2UH_PCMC063T-2R2MN_8A_20% 2 2 RT8209MGQW _W QFN14_3P5X3P5 PR509 @4.7_1206_5% 14 15 VDD PHASE LX_1.5V + PC501 220U_6.3VM_R15 PC511 @680P_0402_50V7K 2.21K_0402_1% PC509 4.7U_0603_10V6K FB_1.5V UG_1.5V PQ501 AON7408L_DFN8-5 PR501 13 12 1 PGND +1.5VP V5FILT_1.5V PR507 100_0402_1% +5VALW +5VALW VOUT GND +1.5VP UGATE TON PC508 0.1U_0402_10V7K BOOT C EN/DEM PU501 PR506 255K_0402_1% 2TON_1.5V 2200P_0402_50V7K PC506 PR504 2.2_0402_5% BST_1.5V 2BST1_1.5V PC504 @4.7U_0805_25V6-K PC503 10U_0805_25V6K PC505 @0.1U_0402_10V7K PL502 HCB1608KF-121T30_0603 PC512 @680P_0402_50V7K EN_1.5V PC507 0.1U_0402_25V6 1.5V_B+ PR503 36,38 SYSON PJP502 B B @PAD-OPEN 4x4m PJP501 +1.5VP +1.5V (8A,320mils ,Via NO.= 16) @PAD-OPEN 4x4m A A Compal Secret Data Security Classification 2007/05/29 Issued Date 2008/05/29 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net Deciphered Date Title Compal Electronics, Inc +1.5VP Size Document Number Rev 0.1 LAXXXX Date: Tuesday, February 22, 2011 Sheet 44 of 44 D D 1.1V_B+ PR703 SPOK 0_0402_5% B+ PL702 HCB1608KF-121T30_0603 EN_1.1V PC704 @0.1U_0402_10V7K VDDP 10 LGATE +5VALW LG_1.1V PC711 @680P_0402_50V7K +1.1VALW 15K_0402_1% +5VALW PQ702 PC709 4.7U_0805_10V6K AO4468L_SO8 2 RT8209MGQW _W QFN14_3P5X3P5 PR708 + PR706 @100K_0402_5% TRIP_1.1V 1 11 CS PL701 2.2UH_PCMC063T-2R2MN_8A_20% PR709 @4.7_1206_5% PHASE LX_1.1V 1SNUB_1.1V 14 15 NC BOOT UG_1.1V PC701 220U_D2_2VY_R15M C PC710 @680P_0402_50V7K PGOOD 13 12 PQ701 AON7408L_DFN8-5 FB PR702 10K_0402_1% FB_1.1V UGATE VDD PC707 0.1U_0402_10V7K PR701 4.64K_0402_1% VOUT PGND +1.1VALW PC708 4.7U_0603_6.3V6M 1 PR707 100_0402_1% C V5FILT_1.1V 2 +5VALW TON +1.1VALW +5VALW EN/DEM PR705 255K_0402_1% 2TON_1.1V GND PU701 PC706 0.1U_0402_25V6 2 PC705 2200P_0402_50V7K PR704 2.2_0402_5% BST_1.1V BST1_1.1V PC702 10U_0805_25V6K 40,42 B B A A Compal Secret Data Security Classification 2009/12/01 Issued Date 2010/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net Deciphered Date Title Compal Electronics, Inc PWR+1.1VALWP Size Document Number Custom Rev 0.1 LAXXXX Date: Tuesday, February 22, 2011 Sheet 45 of 44 +1.5V VIN NC GND NC VREF VCNTL VOUT NC TP +3VALW PR601 1K_0402_1% D PC601 4.7U_0805_6.3V6K D 1 PU601 PC603 1U_0603_10V6K APL5336KAI-TRL_SOP8P8 PR602 1K_0402_1% 2 G S 0_0402_5% +0.75VSP 10.75VS_N_002 28,38 SUSP D PQ602 SSM3K7002FU_SC70-3 PR604 PC604 0.1U_0402_16V7K VREF_G2992 PC605 10U_0805_6.3V6M PC606 @0.1U_0402_10V7K PJP601 C (2A,80mils ,Via NO.= 4) +0.75VS PU603 APL5508-25DC-TRL_SOT89-3 +3VS IN OUT +2.5VSP PC607 1U_0402_6.3V6K 2 GND PAD-OPEN 3x3m PR605 @150_1206_5% +0.75VSP PC608 4.7U_0805_6.3V6K C +5VALW 2 1 B 2 PR610 1.82K_0402_1% PR611 7.32K_0402_1% +2.5VS PC615 22U_0805_6.3V6M 2 PC613 0.1U_0402_16V7K PD601 FB PAD-OPEN 3x3m +1.0VSP EN POK PC614 180P_0402_50V8J VOUT VOUT GND VCNTL VIN VIN 1 VGA_PWR_ON PR609 15K_0402_1% +2.5VSP APL5930KAI-TRG_SO8 25,38,43 PJP602 PU602 PC611 4.7U_0805_6.3V6K B PC612 1U_0603_10V6K +1.5V @1SS355_SOD323-2 PJP603 +1.0VSP +1.0VSG (2.5A,100mils ,Via NO.= 5) PAD-OPEN 3x3m A A Compal Secret Data Security Classification Issued Date 2006/11/23 Deciphered Date 2007/11/23 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net Title Compal Electronics, Inc PWR 0.75VSP/1.0VSP/2.5VSP Size Document Number Rev 0.1 LAXXXX Date: Sheet Tuesday, February 22, 2011 46 of 44 A B C D 1 1.2V_B+ 2 LGATE +5VALW LG_1.2V 15K_0402_1% +5VALW PR809 @4.7_1206_5% PC809 4.7U_0805_10V6K PQ802 IRF8707TRPBF_SO8 RT8209MGQW _W QFN14_3P5X3P5 PC810 @680P_0402_50V7K + PC801 10 220U_D2_2VY_R15M 11 BOOT NC PR802 5.36K_0402_1% TRIP_1.2V PR808 CS VDDP +1.2VS PL801 2.2UH_PCMC063T-2R2MN_8A_20% 1SNUB_1.2V PGOOD PHASE LX_1.2V 14 15 FB 3.24K_0402_1% UG_1.2V 12 PQ801 AON7408L_DFN8-5 FB_1.2V VDD 13 VOUT UGATE PC808 4.7U_0603_6.3V6M +1.2VS PR807 100_0402_1% PR801 PGND V5FILT_1.2V 2 +5VALW TON +1.2VS +5VALW EN/DEM PR805 255K_0402_1% 2TON_1.2V GND PU801 PC807 0.1U_0402_10V7K PC811 @680P_0402_50V7K PR804 2.2_0402_5% BST_1.2V 2BST1_1.2V PC806 0.1U_0402_25V6 PC804 @0.1U_0402_10V7K 0_0402_5% B+ PL802 HCB1608KF-121T30_0603 EN_1.2V PC802 10U_0805_25V6K 2 VLDT_EN 2200P_0402_50V7K PC805 PR803 36,38 3 4 Issued Date http://hobi-elektronika.net A Compal Electronics, Inc Compal Secret Data Security Classification 2009/01/23 Deciphered Date 2010/01/23 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC B C Title +1.2VSP Size Document Number Rev 0.1 NCL61 LA-6321P M/B Date: Tuesday, February 22, 2011 D Sheet 47 of 44 PL204 HCB2012KF-121T50_0805 PR213 3.65K_0805_1% VSUMG- PR214 1_0402_1% ENABLE PH1 30 LGATE1 28 PHASE1 2 49 1 PC263 @330P_0402_50V7K PLACE NEAR Phase1 choke PC227 100U_25V_M PC243 2200P_0402_50V7K PC242 0.01U_0402_25V7K TPCA8065-H_PPAK56-8-5 PL201 0.36UH_VMPI1004AR-R36M-Z03_30A_20% PHASE1 PH201 PR247 10K_0402_5%_ERTJ0ER103J 2.2_0603_5% BOOT1 PC260 0.1U_0603_50V7K 1BOOT1_1 PQ202 VSUMLGATE1 1 PC262 0.1U_0603_50V7K 2 PQ201 UGATE1 PC264 1000P_0402_50V7K PR244 976_0402_1% APU_VDD_RUN_FB_L PR252 10_0402_5% PC222 10U_0805_25V6K VSUM+ PR240 4.99_0402_1% ISEN1 PR245 10K_0402_1% VSUM+ PR250 3.65K_0805_1% PR249 4.7_1206_5% PR251 1_0402_1% VSUM- PR246 ISEN2 10K_0402_1% VSUM-_1 PC265 680P_0402_50V7K A A VSUM+_1 B CPU_B+ 24 VIN_CPU 22 23 PR2351 CPU_B+ 0_0603_5% +5VS PR237 1_0603_5% PC261 @330P_0402_50V7K APU_VDD_SEN VSUM-_2 If the layout of each phase to CPU is symmetric, the two res can be removed They are used for phase current balance adjustment VSUM- +CPU_CORE PR222 ISEN1 10K_0402_1% PC246 680P_0402_50V7K SNUB_CPU1 PR248 10_0402_5% PR231 1_0402_1% VSUM- 1 2.26K_0402_1% VSUM+ PR230 3.65K_0805_1% PR242 PR220 10K_0402_1% PR228 4.7_1206_5% TP VIN VDD TPCA8059-H_PPAK56-8-5 +CPU_CORE ISEN2 PQ204 143K_0402_1% PROG1_CPU ISEN2 PC257 0.22U_0402_10V6K 470P_0402_50V7K PR241 25 LGATE2 1PH201_CPU PC252 1000P_0402_50V7K PC256 0.22U_0402_10V6K PC255 1COMP_CPU_12 BOOT1 1FB_CPU_1 324_0402_1% ISEN1 UGATE1 PC259 PR239 2 PC258 PC251 27 26 PC244 0.1U_0603_50V7K 1BOOT2_12 PR234 6.65K_0402_1% 0.22U_0402_16V7K 68P_0402_50V8J PC250 0.22U_0603_25V7K FB_CPU PR238 @10_0402_5% 1U_0603_10V6K VDD_CPU 33P_0402_50V8J PC249 PC248 ISUMN_CPU COMP_CPU Rfset(Kohm)=(Period(uS))-0.29)*2.65 PC247 1000P_0402_50V7K ISEN3_FB2_CPU VW_CPU B PROG1 21 20 19 18 PH202 470K_0402_5%_TSM0B474J4702RE PR236 8.06K_0402_1% ISUMP ISUMN RTN VSEN ISEN1 ISEN2 ISEN3/FB2 17 PLACE NEAR Phase1 L-MOS NTC 16 12 FB PR233 27.4K_0402_1% NTC_CPU 15 COMP 3.83K_0402_1% 1PH202_CPU VW BOOT1 14 PR232 UG1 PROC_HOT PWM3 29 PR226 2.2_0603_5% BOOT2 PC253 2200P_0402_50V7K PGOOD 11 0_0402_5% PC254 0.01U_0402_25V7K 10 VGATE 8,13,36 EC_THERM# 0_0402_5% PR224 PC221 10U_0805_25V6K VR_ON 13 36 36 6267_VCCP1 VSUM+_2 LG1 31 PL202 0.36UH_VMPI1004AR-R36M-Z03_30A_20% PHASE2 PWM3 SVC LGATE2 SNUB_CPU2 PWROK PHASE2 32 TPCA8065-H_PPAK56-8-5 VCCP ISL6267HRZ-T_QFN48_6X6 33 PR219 0_0603_5% TPCA8059-H_PPAK56-8-5 LG2 SVD UGATE2 PGOOD_NB PC223 10U_0805_25V6K 37 LG1_NB 39 40 38 PH1_NB UG1_NB PROG2 NTC_NB 43 44 ISUMP_NB 46 45 RTN_NB 47 PH2 BOOT2 34 APU_SVC VW_NB 35 UG2 PR243 12.1K_0402_1% 13 APU_PWRGD_L PR225 @100K_0402_5% BOOT2 COMP_NB UGATE2 1U_0603_10V6K PR223 0_0402_5% SDA PR227 0_0402_5% ALERT# PR229 0_0402_5% SCLK APU_SVD VSEN_NB 48 FB_NB 36 0.01U_0402_16V7K C PQ203 PWM2_NB 6267_VCCP1 +5VS PC245 VW_NB CPU_B+ PC224 10U_0805_25V6K PC237 680P_0402_50V7K PR215 PC240 2.2_0603_5% 0.1U_0603_50V7K 1BOOST1_NB1 PR218 BOOT1_NB PR221 100K_0402_5% FB2_NB ISUMN_NB FB_NB COMP_NB +3VS ISEN1_NB ISEN2_NB PU201 VSUMG-_1 VSUMG+_1 VSUMG+ Rfset(Kohm)=(Period(uS))-0.29)*2.65 C PC230 @100U_25V_M PR205 4.7_1206_5% SNUB_NB 2 PROG2 41 ISUMN_NB NTC_NB PC241 1000P_0402_50V7K PR216 8.06K_0402_1% 42 2 +5VS +CPU_CORE_NB 1 PC239 1000P_0402_50V7K PR210 324_0402_1% 2 1FB_NB_12 2 LGATE_NB PC238 100P_0402_50V8J PL203 0.36UH_VMPI1004AR-R36M-Z03_30A_20% TPCA8059-H_PPAK56-8-5 PQ206 VSUMG- PH204 470K_0402_5%_TSM0B474J4702RE PC235 0.1U_0603_50V7K PR211 27.4K_0402_1% NTC_NB_1 2 PR212 3.83K_0402_1% PR217 BOOT1_NB 6.65K_0402_1% PR206 845_0402_1% + D PHASE_NB 10K_0402_5%_ERTJ0ER103J @ PR209 @PR209 @10_0402_5% PH203 PR208 2.26K_0402_1% + TPCA8065-H_PPAK56-8-5 PLACE NEAR NB L-MOS PC236 PR207 470P_0402_50V7K 143K_0402_1% 1COMP_NB_1 PC229 2200P_0402_50V7K UGATE_NB PC266 @330P_0402_50V7K B+ PQ205 1 PR201 11K_0402_1% PR203 2.61K_0402_1% 1PH203_NB PR204 10_0402_5% 2 PC232 @330P_0402_50V7K APU_VDDNB_SEN +CPU_CORE_NB PC234 APU_VDDNB_RUN_FB_L 0.047U_0402_16V7K 2 D PC233 PC231 1000P_0402_50V7K 0.1U_0402_10V7K VSUMG+ PR202 10_0402_5% PL205 HCB2012KF-121T50_0805 PC228 0.01U_0402_25V7K PC226 10U_0805_25V6K PLACE NEAR NB choke PC225 10U_0805_25V6K CPU_B+ Issued Date http://hobi-elektronika.net Compal Electronics, Inc Compal Secret Data Security Classification 2010/11/11 Deciphered Date 2011/11/11 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title PWR_+CPU_CORE/+CPU_CORE_NB Size Document Number Rev 0.1 PEQAE LA-7291P M/B Date: Tuesday, February 22, 2011 Sheet 48 of A B PL902 HCB2012KF-121T50_0805 DRVL 1 0_0603_5% +5VALW PQ902 TP 11 RT8237CZQW (2) W DFN PC919 2.2U_0603_6.3V6K 4 PR910 @4.7_1206_5% PC918 + 0.1U_0402_10V7K 2 PC920 @680P_0402_50V7K PR911 470K_0402_1% TPCA8059-H_PPAK56-8-5 PQ903 RF V5IN_VGA DL_VGA PC901 330U_D2_2V_Y V5IN +VGA_CORE VFB PR909 PL901 0.36UH_PDME104T-R36MS0R825_37A_20% SW LX_VGA EN 2BST1_VGA 2.2_0603_5% 0.1U_0603_25V7K 1SNUB_VGA DH_VGA @TPCA8065-H_PPAK56-8-5 BST_VGA RF_VGA 10 DRVH TPCA8059-H_PPAK56-8-5 VBST TRIP FB_VGA PGOOD 2 0_0402_5% 25,38 1.5_VDD_PW REN PC917 @.1U_0402_16V7K PR908 PR9072TRIP_VGA 73.2K_0402_1% EN_VGA PC916 1 13,25 VGA_PW RGD PR906 PU901 PQ906 PQ901 PR905 10K_0402_1% TPCA8065-H_PPAK56-8-5 2 PC913 @4.7U_0805_25V6-K 1 PC915 2200P_0402_50V7K PC914 0.1U_0402_25V6 PC923 @680P_0402_50V7K +3VS 10U_0805_25V6K PC911 1 D VGA_B+ 10U_0805_25V6K PC912 B+ C PR912 +VGA_CORE1 GPU VID0 Whistler Pro X L 1.0V X H 0.9V H L H H 6.19K_0402_1% S PQ905 SSM3K7002FU_SC70-3 PR916 @10K_0402_5% PR914 10K_0402_1% PR917 5.1K_0402_1% 19 GPU_VID0_1 GPU_VID0 2 G PC922 1U_0402_16V7K D PR918 @10K_0402_5% FB0_VGA 1 GPU_VID1 +3VSG 2 GCORE_SEN 21 PC921 @.1U_0402_16V7K S 1 2GPU_VID1_1 G PR913 @10K_0402_1% 100_0402_1% PR902 6.98K_0402_1% GPU VID1 PR915 @5.1K_0402_1% 19 @SSM3K7002FU_SC70-3 PQ904 Rtrip = 73.2K, OCP = 34.42A PR903 +3VSG D Rrf = 470K, FSW = 290KHz PR904 @10K_0402_1% FB1_VGA1 2.94K_0402_1% PR901 4 Compal Secret Data Security Classification Issued Date Deciphered Date 200810/11 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC http://hobi-elektronika.net A 2007/05/29 B C Title Compal Electronics, Inc VGA_CORE Size Document Number Rev 0.1 LAXXXX Date: Tuesday, February 22, 2011 D Sheet 49 of 44 Version change list (P.I.R List) Item Power section Reason for change Page of PG# Modify List Date Phase D D C C B B A A Compal Secret Data Security Classification Issued Date http://hobi-elektronika.net 2008/09/15 2010/12/31 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc Changed-List History Size Document Number Rev 1.0 LA-4902P Date: Sheet Tuesday, February 22, 2011 50 of 47 ... VDDIO C 104 5 C 102 5 180P _04 02_50V8J 180P _04 02_50V8J C992 180P _04 02_50V8J C991 0. 01U _04 02_16V7K C9 90 0 .01 U _04 02_16V7K C998 0. 01U _04 02_16V7K C 102 0 C989 0. 22U _06 03_ 16V4Z 0. 22U _06 03_ 16V4Z C 100 8 C 101 9 C988... C 101 9 C988 0. 22U _06 03_ 16V4Z 180P _04 02_50V8J C 100 7 0. 22U _06 03_ 16V4Z 180P _04 02_50V8J 4.7U _06 03_ 6.3V6K C 101 8 C987 C 100 6 22U _08 05_6.3V6M 0. 22U _06 03_ 16V4Z C986 C 100 5 22U _08 05_6.3V6M 0. 22U _06 03_ 16V4Z... @ 100 P _04 02_50V8J KSI5 C15 60 @ 100 P _04 02_50V8J KSO4 C1561 @ 100 P _04 02_50V8J KSI4 C1562 @ 100 P _04 02_50V8J KSI0 C1563 @ 100 P _04 02_50V8J KSO9 C1564 @ 100 P _04 02_50V8J KSO0 C1565 @ 100 P _04 02_50V8J