Acer aspire e5 551g EA50 KV compal LA b221p rev 0 3 схема

A B C D E 1 Compal Confidential EA50_KV M/B Schematics Document 2 AMD Kaveri(FP3) + Bolton(M3) AMD OPAL / JET 3 2013-02-11 REV : 0.3 4 2012/09/12 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/07/08 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D Cover Page Document Number Rev 0.2 Z5WAK M/B LA-B221P Wednesday, February 12, 2014 Sheet E of 52 A B C D E Compal Confidential Model Name : Z5WAK Memory BUS (DDR3/DDR3L) VRAM 1G/2G 64M16/128M16 x Dual Channel page 23, 24 AMD Kaveri DDR3 AMD JET/OPAL 128Bit DDR3 uFCBGA-962 PCIe x Page 13~19 Gen3 APU HDMI (UMA / Muxless) DP2 AMD FP3 APU Kaveri DP1 Package page 27 USB3.0 Port P_GPP x GEN2 UMA eDP USB30 M/B*1 page 36 Page 5~10 DP0 DP x (DP1 TXP/N 0~4) UMI ML for FCH VGA page 25 CRT Conn page 26 USB3.0 FCH CRT (VGA DAC) GPP0 FCH BOLTON - M3 GPP1 LAN(GbE) Realtek RTL8411B MINI Card (Wireless LAN) page 29 page 25 page 36 Page 20~24 page 13 Port page 28 Port page 29 Port Port page 28 port LPC BUS port SATA HDD Conn page page 30 page 25 TP Bridge SATA Gen3 page 32 RJ45 Conn Mini Card HD Audio 3.3V 24.576MHz/48Mhz LED RTC CKT USB2.0 Port10 Port Port 3.3V 48MHz Touch screen CMOS Camera USB20 Sub/B*2 USB2.0 uFCBGA-656 Page 11,12 BANK 0, 1, 2, 1.5V DDR3/DDR3L fequence support :800~2133MHz HDMI Conn eDP Panel 204pin DDRIII-SO-DIMM X2 33 SATA ODD Conn page 33 HDA Codec ALC283 page 34 SD/MMC IN Card Reader ENE KB9012/KB9022 page 35 page 30 Power On/Off CKT page 32 Touch Pad Fan Control page 31 DC/DC Interface CKT.page page 32 BIOS ROM USB20/B -USB20 x2 2012/09/12 Issued Date page 36 SYS BIOS (8M) page 14 Compal Electronics, Inc Compal Secret Data Security Classification 2015/07/08 Deciphered Date Title Block Diagrams THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC B Rev 0.2 Z5WAK M/B LA-B221P Date: A page 34 37 page 38~52 Speaker page 34 page 31 Sub board LID SW - Power/B Power Circuit D-MIC Int.KBD page 36 C D Wednesday, February 12, 2014 Sheet E of 52 A B C D E ZZZ Voltage Rails Power Plane Description S3 S4 S5 STATE +VALW +V +VS Clock Full ON HIGH HIGH HIGH HIGH ON ON ON ON S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF VIN Adapter power supply (19V) ON ON ON ON B+ AC or battery power rail for power circuit ON ON ON ON +CPU_CORE Core voltage for APU ON OFF OFF OFF +CPU_CORE_NB Voltage for VDDNB ON OFF OFF OFF +VGA_CORE 0.95-1.2V switched power rail DIS OFF OFF OFF +VDDCI 0.95-1.2V switched power rail DIS OFF OFF OFF +0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF OFF +0.95VSDGPU 1.0V switched power rail for VGA DIS OFF OFF OFF +1.1VALW 1.1V switched power rail for FCH ON ON AC/DC AC/DC +1.1VS 1.1V switched power rail for FCH ON OFF OFF OFF +1.05VS 1.05VS switched power rail for APU ON OFF OFF OFF +1.5V 1.5V power rail for CPU VDDIO and DDR ON ON OFF OFF +1.5VS 1.5VS switched power rail ON OFF OFF OFF +1.5VSDGPU 1.5V switched power rail for VGA DIS OFF OFF OFF +1.8VSDGPU 1.8V switched power rail for VGA DIS OFF OFF OFF +1.8VS 1.8VS for CPU_VDDA ON OFF OFF OFF +3VALW 3.3V always on power rail ON ON ON ON +3V_LAN 3.3V power rail for LAN ON ON WOL WOL +3VS_WLAN 3.3V power rail for WLAN ON IOAC IOAC OFF +3VS 3.3V switched power rail ON OFF OFF OFF +5VALW 5V always on power rail ON ON ON ON +5VS 5V switched power rail ON OFF OFF OFF +RTCVCC RTC power ON ON ON ON EC SM Bus1 address SIGNAL S0 SLP_S1# SLP_S3# SLP_S4# SLP_S5# Board ID / SKU ID Table for AD channel Address HEX Device Address HEX Smart Battery 0001 011X 16H SB-TSI (APU) 1001 100X 96H FCH SM Bus address Device Address HEX 1010 000Xb A0H 1010 001Xb A2H DDR DIMM2 Device Address PCB Revision EVT DVT BOM Option Table BOM Structure FCH SM Bus address DDR DIMM1 Board ID VGA Internal Thermal DA60014Q000 BOARD ID Table EC SM Bus2 address Device PCB PCB@ LA-B221P REV0 HEX MINI CARD Description 9022@ Use EC 9022 9012@ Use EC 9012 UMA@ Display output from APU (UMA only) VGA@ Use VGA (PX or DIS only) AL@ Use Auto load EC code function AC@ Support AC Function NOAC@ No Support AC Function TPM@ Support D TPM function CONN@ Connector (Control by ME) HDT@ Debug Connector EMC@ EMC Component XEMC@ Reservec for EMC TPSM@ Use APU SMBus for T/P TPBRI@ Use USB to I2C IC for T/P USBTP@ Use USB T/P MOS@ Use MOSART soluation USB to I2C TP X76@ VRAM ID Table (Load By X76J) 128@ VRAM x 8pcs OPAL@ ATI OPAL VGA CONTROLLER JET@ ATI JET VGA CONTROLLER BL@ BACK LIGHT CIRCUIT @ Unpop X76@ VRAM type select 4 2012/09/12 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2015/07/08 Deciphered Date Title Notes List THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAK M/B LA-B221P Date: A B C D Wednesday, February 12, 2014 Sheet E of 52 AMD APU FP3 BATTERY 11.1V PU801 RT8880AGQW PU301 CHARGER BQ24725ARGRR BATT+ +CPU_CORE PU702 SY8032ABC D AC ADAPTOR 19V 65W/40W PU601 SY8208DQNC VIN +APU_CORE 0.8~1.15V VDD CORE 38A +APU_CORE_NB 0.8~1.15V VDDNB 40A +1.8VS +1.8VS VDDA 0.7A +1.5V +1.5V VDDIO 2.5A +1.05VS +1.05VS VDDR 4.9A VDDP 4.1A +CPU_CORE_NB +1.05VS D RAM DDR3L SODIMMX2 +1.5V B+ +1.5V +1.5V +0.75VS +0.75VS +VGA_CORE PU1201 ISL62883CHRTZ-T +1.5V VDD_MEM 5.6A +0.75VS VTT_MEM 2A VGA ATI Opal/Jet +3VALW PU501 RT8207MZQW +VGA_CORE 0.775V~ 1.125V +1.5VSG PU701 SY8208DQNC +1.1VALW +3VALW PU1001 TPS51212DSCR PU1101 SY8033BDBC +0.95VSG +0.95VSG DP_VCCC: 280 mA SPLL_VDDC: 100 mA BIF_VDDC: 800 mA PCIE_VDDC: 1000 mA +1.5VSG VDDR1: 1500 mA +1.5VSG C PU401 PU402 SY8208BQNC VDDC + VDDCI =28A +3VALW U11 TPS22966DPUR +5VALW U16 TPS22966DPUR +1.8VSG +1.8VSG VRAM X8pcs DDR3 +1.5VSG VDD_CT: 13mA DP_VDDR: 237mA SPLL_PVDD: 75mA MPLL_PVDD: 160mA PCIE_PVDD: 100mA TSVDD: 13mA VDDR4: 30mA AVDD: 70mA VDD1DI: 117mA 3.2 A C +3VSG +INVPWR_B+ +3VS +3VSG +LCDVDD LCD panel 15.6" FCH AMD Bolton M3 U8 G5243T11U B+ 500mA U15 TPS22966DPUR +3.3 1500mA +1.1VS +1.1VS +3VS FAN Control U31 AP2113AMTR +1.1VALW +1.1VALW U29 SY6288D10CAC +5VS 500mA +5VALW +USB_VCCA VDDAN_11_PCIE: 1.088A VDDAN_11_SATA: 1.337A VDDAN_11_CLK: 0.34A VDDCR_11: 1.007A +5VS +5VS B VDDR: 25mA (U66 colay SY6288C20A) +3VS +3VS +3VS VDDCR_11_S_[2:1] : 187mA VDDPL_11_SYS_S: 70mA VDDAN_11_USB_S_[2:1]: 140mA VDDCR_11_USB_S_[2:1]: 42mA VDDAN_11_SSUSB_S_[5:1]: 282mA VDDCR_11_SSUSB_S_[4:1]: 424mA B VDDIO_33_PCIGP: 102 mA VDDPL_33_PCIE: 47 mA VDDPL_33_SATA: 12 mA VDDAN_33_DAC: 30 mA VDDPL_33_SYS: 47 mA USB 3.0 +5V 2.0A +3VALW +3VALW VDDIO_33_S_[8:1]: 59 mA VDDXL_33_S: mA VDDPL_33_USB_S: 17 mA VDDAN_33_USB_S_[12:1]: 470 mA VDDPL_33_SSUSB_S: 11 mA VDDAN_33_HWM_S: 12 mA +1.5VS VDDIO_AZ_S: 26mA RTC BAT VDDBT_RTC_G +3VALW SATA HDD*1 ODD*1 +5V 2.8A +3.3V Audio Codec ALC283-CG EC ENE KB9012/9022 LAN +Cardreader RTL8411B-CG Mini Card +1.5VS +5V 1500mA +3.3VS 594mA +1.5VS 16mA +3.3VALW 30mA +3.3VS 3mA +3.3VALW 1.4A +1.5VS 500mA +3.3VS 1A OR +3.3VALW 1A RTC Bettary A A +1.5VS Compal Secret Data Security Classification Issued Date 2011/07/08 Deciphered Date 2015/07/08 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title POWER DELIVERY CHART Size Document Number Custom Z5WAK LA-B221P Date: Rev 0.2 Wednesday, February 12, 2014 Sheet of 52 13 PEG_GTX_C_HRX_P[7 0] 13 PEG_GTX_C_HRX_N[7 0] PEG_GTX_C_HRX_P[7 0] PEG_HTX_C_GRX_P[7 0] PEG_GTX_C_HRX_N[7 0] PEG_HTX_C_GRX_N[7 0] PEG_HTX_C_GRX_P[7 0] 13 PEG_HTX_C_GRX_N[7 0] 13 U65A PCI EXPRESS D 29 29 28 28 PCIE_PRX_DTX_P0 PCIE_PRX_DTX_N0 PCIE_PRX_DTX_P1 PCIE_PRX_DTX_N1 20 20 20 20 20 20 20 20 UMI_FTX_C_ARX_P0 UMI_FTX_C_ARX_N0 UMI_FTX_C_ARX_P1 UMI_FTX_C_ARX_N1 UMI_FTX_C_ARX_P2 UMI_FTX_C_ARX_N2 UMI_FTX_C_ARX_P3 UMI_FTX_C_ARX_N3 +1.05VS AH4 AH3 AG7 AF6 AE8 AE7 AE5 AF4 AC9 AC8 AC6 AC5 AB9 AB8 AB4 AB5 AJ7 AJ8 AK6 AK7 AK5 AJ5 AL4 AK4 P_ZVDDP AN18 P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_RXP2 P_GPP_RXN2 P_GPP_RXP3 P_GPP_RXN3 P_GPP_RXP4/RSVD P_GPP_RXN4/RSVD P_GPP_RXP5/RSVD P_GPP_RXN5/RSVD P_GPP_RXP6/RSVD P_GPP_RXN6/RSVD P_GPP_RXP7/RSVD P_GPP_RXN7/RSVD P_UMI_RXP0 P_UMI_RXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_RXN2 P_UMI_RXP3 P_UMI_RXN3 U65 A10@ P_GFX_TXP0/DP6_TXP4 P_GFX_TXN0/DP6_TXN4 P_GFX_TXP1/DP6_TXP5 P_GFX_TXN1/DP6_TXN5 P_GFX_TXP2/DP6_TXP6 P_GFX_TXN2/DP6_TXN6 P_GFX_TXP3/RSVD P_GFX_TXN3/RSVD P_GFX_TXP4/DP6_TXP0 P_GFX_TXN4/DP6_TXN0 P_GFX_TXP5/DP6_TXP1 P_GFX_TXN5/DP6_TXN1 P_GFX_TXP6/DP6_TXP2 P_GFX_TXN6/DP6_TXN2 P_GFX_TXP7/DP6_TXP3 P_GFX_TXN7/DP6_TXN3 P_GFX_TXP8/DP5_TXP0 P_GFX_TXN8/DP5_TXN0 P_GFX_TXP9/DP5_TXP1 P_GFX_TXN9/DP5_TXN1 P_GFX_TXP10/DP5_TXP2 P_GFX_TXN10/DP5_TXN2 P_GFX_TXP11/DP5_TXP3 P_GFX_TXN11/DP5_TXN3 P_GFX_TXP12/DP4_TXP0 P_GFX_TXN12/DP4_TXN0 P_GFX_TXP13/DP4_TXP1 P_GFX_TXN13/DP4_TXN1 P_GFX_TXP14/DP4_TXP2 P_GFX_TXN14/DP4_TXN2 P_GFX_TXP15/DP4_TXP3 P_GFX_TXN15/DP4_TXN3 P_GPP_TXP0 P_GPP_TXN0 P_GPP_TXP1 P_GPP_TXN1 P_GPP_TXP2 P_GPP_TXN2 P_GPP_TXP3 P_GPP_TXN3 P_GPP_TXP4/DP3_TXP0 P_GPP_TXN4/DP3_TXN0 P_GPP_TXP5/DP3_TXP1 P_GPP_TXN5/DP3_TXN1 P_GPP_TXP6/DP3_TXP2 P_GPP_TXN6/DP3_TXN2 P_GPP_TXP7/DP3_TXP3 P_GPP_TXN7/DP3_TXN3 P_ZVDDP P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3 P_UMI_TXN3 P_ZVSS R1 196_0402_1% CR V1.03 8/12 mils PH to VDDIO_RUN with 196 ohm B GPP C P_GFX_RXP0/RSVD P_GFX_RXN0/RSVD P_GFX_RXP1/RSVD P_GFX_RXN1/RSVD P_GFX_RXP2/RSVD P_GFX_RXN2/RSVD P_GFX_RXP3/RSVD P_GFX_RXN3/RSVD P_GFX_RXP4/RSVD P_GFX_RXN4/RSVD P_GFX_RXP5/RSVD P_GFX_RXN5/RSVD P_GFX_RXP6/RSVD P_GFX_RXN6/RSVD P_GFX_RXP7/RSVD P_GFX_RXN7/RSVD P_GFX_RXP8/RSVD P_GFX_RXN8/RSVD P_GFX_RXP9/RSVD P_GFX_RXN9/RSVD P_GFX_RXP10/RSVD P_GFX_RXN10/RSVD P_GFX_RXP11/RSVD P_GFX_RXN11/RSVD P_GFX_RXP12/RSVD P_GFX_RXN12/RSVD P_GFX_RXP13/RSVD P_GFX_RXN13/RSVD P_GFX_RXP14/RSVD P_GFX_RXN14/RSVD P_GFX_RXP15/RSVD P_GFX_RXN15/RSVD UMI PEG_GTX_C_HRX_P0 Y8 PEG_GTX_C_HRX_N0 Y9 PEG_GTX_C_HRX_P1 Y4 PEG_GTX_C_HRX_N1 W5 PEG_GTX_C_HRX_P2 W7 PEG_GTX_C_HRX_N2 W8 PEG_GTX_C_HRX_P3 U5 PEG_GTX_C_HRX_N3 V4 PEG_GTX_C_HRX_P4 U7 PEG_GTX_C_HRX_N4 U8 PEG_GTX_C_HRX_P5 T4 PEG_GTX_C_HRX_N5 R5 PEG_GTX_C_HRX_P6 R7 PEG_GTX_C_HRX_N6 R8 PEG_GTX_C_HRX_P7 P8 PEG_GTX_C_HRX_N7 P7 P4 P5 M8 M7 M5 M4 L6 L5 L8 L9 J5 K4 J7 J8 H4 H5 GRAPHICS D AB2 AB1 AB3 AA2 AA1 Y1 Y2 W2 V2 V1 V3 U2 U1 T1 T2 R2 P2 P1 P3 N2 N1 M1 M2 L2 K2 K1 K3 J2 J1 H1 H2 G2 PEG_HTX_GRX_P0 PEG_HTX_GRX_N0 PEG_HTX_GRX_P1 PEG_HTX_GRX_N1 PEG_HTX_GRX_P2 PEG_HTX_GRX_N2 PEG_HTX_GRX_P3 PEG_HTX_GRX_N3 PEG_HTX_GRX_P4 PEG_HTX_GRX_N4 PEG_HTX_GRX_P5 PEG_HTX_GRX_N5 PEG_HTX_GRX_P6 PEG_HTX_GRX_N6 PEG_HTX_GRX_P7 PEG_HTX_GRX_N7 AM2 AM1 AL2 AL1 AK2 AK1 AK3 AJ2 AJ1 AH1 AH2 AG2 AF2 AF1 AF3 AE2 PCIE_PTX_DRX_P0 PCIE_PTX_DRX_N0 PCIE_PTX_DRX_P1 PCIE_PTX_DRX_N1 U65 2 2 2 2 2 2 2 2 VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K AM18 P_ZVSS R34 1 1 C17 C18 C19 C20 AM9 UMI_ATX_FRX_P0 AM10 UMI_ATX_FRX_N0 AN8 UMI_ATX_FRX_P1 AN9 UMI_ATX_FRX_N1 AM7 UMI_ATX_FRX_P2 AM8 UMI_ATX_FRX_N2 AN6 UMI_ATX_FRX_P3 AM6 UMI_ATX_FRX_N3 PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_N7 C21 C22 C23 C24 C25 C26 C27 C28 1 1 1 1 2 2 2 2 2 2 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K PCIE_PTX_C_DRX_P0 PCIE_PTX_C_DRX_N0 PCIE_PTX_C_DRX_P1 PCIE_PTX_C_DRX_N1 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 29 29 28 28 UMI_ATX_C_FRX_P0 UMI_ATX_C_FRX_N0 UMI_ATX_C_FRX_P1 UMI_ATX_C_FRX_N1 UMI_ATX_C_FRX_P2 UMI_ATX_C_FRX_N2 UMI_ATX_C_FRX_P3 UMI_ATX_C_FRX_N3 LAN WLAN 20 20 20 20 20 20 20 20 196_0402_1% CR V1.03 8/12 mils PH to VDDIO_RUN with 196 ohm @ KAVERI-FP3-2.7G_BGA854 A8@ 1 1 1 1 1 1 1 1 C FP3 REV 0.52 U65 C153 C164 C154 C151 C155 C152 C157 C156 C166 C167 C168 C169 C170 C171 C172 C173 2367@ U65 B 4467@ A A SA00007S300 A10-7300_854P_19W SA00007S200 A8-7100_854P_19W SA00007D100 KAVERI_1.8G BGA 854P SA00007D000 KAVERI_1.8G BGA 854P Change to PC sample PN 02/11 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/09/12 2012/07/29 Deciphered Date Title FP3 PCIE/UMI THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAK M/B LA-B221P Date: Wednesday, February 12, 2014 Sheet of 52 U65C U65B 11 DDRA_SMA[15 0] DDRA_SMA0 AB31 DDRA_SMA1 U33 DDRA_SMA2 U32 DDRA_SMA3 R30 DDRA_SMA4 T34 DDRA_SMA5 R31 DDRA_SMA6 R33 DDRA_SMA7 P33 DDRA_SMA8 P32 DDRA_SMA9 P30 DDRA_SMA10AD34 DDRA_SMA11 P34 DDRA_SMA12 M30 DDRA_SMA13AF33 DDRA_SMA14 M31 DDRA_SMA15 L32 D 11 11 11 11 C B 15mil DDRA_SBS0#AC33 DDRA_SBS1#AB30 DDRA_SBS2# M34 DDRA_SBS0# DDRA_SBS1# DDRA_SBS2# DDRA_SDM[0 7] 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 DDRA_SDQS0 DDRA_SDQS0# DDRA_SDQS1 DDRA_SDQS1# DDRA_SDQS2 DDRA_SDQS2# DDRA_SDQS3 DDRA_SDQS3# DDRA_SDQS4 DDRA_SDQS4# DDRA_SDQS5 DDRA_SDQS5# DDRA_SDQS6 DDRA_SDQS6# DDRA_SDQS7 DDRA_SDQS7# 11 11 11 11 DDRA_CLK0 DDRA_CLK0# DDRA_CLK1 DDRA_CLK1# DDRA_SDM0 E13 DDRA_SDM1 D18 DDRA_SDM2 H22 DDRA_SDM3 H27 DDRA_SDM4 AG30 DDRA_SDM5 AK26 DDRA_SDM6 AK20 DDRA_SDM7 AF14 F34 DDRA_SDQS0 F14 DDRA_SDQS0#G14 DDRA_SDQS1 H19 DDRA_SDQS1#J19 DDRA_SDQS2 D24 DDRA_SDQS2#E24 DDRA_SDQS3 F28 DDRA_SDQS3#E28 DDRA_SDQS4AJ30 AK30 DDRA_SDQS4# DDRA_SDQS5AH24 AG24 DDRA_SDQS5# DDRA_SDQS6AG19 AF19 DDRA_SDQS6# DDRA_SDQS7AH14 AJ14 DDRA_SDQS7# G31 F31 DDRA_CLK0 DDRA_CLK0# DDRA_CLK1 DDRA_CLK1# DDRA_CKE0 DDRA_CKE1 Y30 Y29 Y32 Y33 W33 W34 W30 W31 L33 L30 K34 J30 11 11 DDRA_CKE0 DDRA_CKE1 11 11 DDRA_ODT0 DDRA_ODT1 DDRA_ODT0 AH34 DDRA_ODT1 AH33 AE30 AJ34 11 11 DDRA_SCS0# DDRA_SCS1# DDRA_SCS0#AE31 DDRA_SCS1#AG31 AC30 AF32 DDRA_SRAS#AC32 DDRA_SCAS#AF34 DDRA_SWE# AE33 11 11 11 DDRA_SRAS# DDRA_SCAS# DDRA_SWE# 11 11 MEM_MA_RST# MEM_MA_EVENT# MEM_MA_RST# J33 AB33 MEM_MA_EVENT# V36 H11 U30 +MEM_VREF M33 AB34 +MA_VREFDQ R3 +1.5V MEMORY CHANNEL A MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 MA_BANK0 MA_BANK1 MA_BANK2 AJ31DDRA_SDQ32 AK32 DDRA_SDQ33 AK28 DDRA_SDQ34 AF27 DDRA_SDQ35 AJ33DDRA_SDQ36 AK33 DDRA_SDQ37 AH28 DDRA_SDQ38 AJ28DDRA_SDQ39 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 AF25 DDRA_SDQ40 AH25 DDRA_SDQ41 AG22 DDRA_SDQ42 AJ22DDRA_SDQ43 AH27 DDRA_SDQ44 AJ27DDRA_SDQ45 AE24 DDRA_SDQ46 AF22 DDRA_SDQ47 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1 MA_CLK_H2 MA_CLK_L2 MA_CLK_H3 MA_CLK_L3 AH21 DDRA_SDQ48 AJ21DDRA_SDQ49 AF17 DDRA_SDQ50 AJ17DDRA_SDQ51 AK22 DDRA_SDQ52 AF21 DDRA_SDQ53 AJ19DDRA_SDQ54 AE17 DDRA_SDQ55 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_CKE0 MA_CKE1 MA_CKE2 MA_CKE3 AF16 DDRA_SDQ56 AJ16DDRA_SDQ57 AF13 DDRA_SDQ58 AE13 DDRA_SDQ59 AH17 DDRA_SDQ60 AE16 DDRA_SDQ61 AJ13DDRA_SDQ62 AG13 DDRA_SDQ63 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63 MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1 MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1 E33 F33 H31 J31 D32 D34 H33 H34 MA_CHECK0 MA_CHECK1 MA_CHECK2 MA_CHECK3 MA_CHECK4 MA_CHECK5 MA_CHECK6 MA_CHECK7 MA_RAS_L MA_CAS_L MA_WE_L MA_RESET_L MA_EVENT_L M_VREF MA_VREFDQ MA_ZVDDIO E19 D28 AK24 AG16 RSVD_5 RSVD_6 RSVD_7 RSVD_8 RSVD_3 RSVD_4 12 12 12 12 E27DDRA_SDQ24 G27DDRA_SDQ25 E30DDRA_SDQ26 G30DDRA_SDQ27 F25 DDRA_SDQ28 H25DDRA_SDQ29 D30DDRA_SDQ30 H28DDRA_SDQ31 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 MA_DQS_H8 MA_DQS_L8 11 12 D22DDRA_SDQ16 E22DDRA_SDQ17 D26DDRA_SDQ18 E25DDRA_SDQ19 G21DDRA_SDQ20 F22 DDRA_SDQ21 G24DDRA_SDQ22 H24DDRA_SDQ23 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 MA_DM8 DDRA_SDQ[63 0] DDRB_SMA[15 0] J17 DDRA_SDQ8 F17 DDRA_SDQ9 H21DDRA_SDQ10 E21DDRA_SDQ11 E16DDRA_SDQ12 G17DDRA_SDQ13 F19 DDRA_SDQ14 D20DDRA_SDQ15 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 DDRB_SBS0# DDRB_SBS1# DDRB_SBS2# DDRB_SDM[0 7] 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 DDRB_SDQS0 DDRB_SDQS0# DDRB_SDQS1 DDRB_SDQS1# DDRB_SDQS2 DDRB_SDQS2# DDRB_SDQS3 DDRB_SDQS3# DDRB_SDQS4 DDRB_SDQS4# DDRB_SDQS5 DDRB_SDQS5# DDRB_SDQS6 DDRB_SDQS6# DDRB_SDQS7 DDRB_SDQS7# 12 12 12 12 DDRB_CLK0 DDRB_CLK0# DDRB_CLK1 DDRB_CLK1# 12 12 DDRB_CKE0 DDRB_CKE1 12 12 DDRB_ODT0 DDRB_ODT1 12 12 DDRB_SCS0# DDRB_SCS1# MEMORY CHANNEL B DDRB_SMA0 AC36 U36 DDRB_SMA1 U37 DDRB_SMA2 T35 DDRB_SMA3 T37 DDRB_SMA4 T36 DDRB_SMA5 R36 DDRB_SMA6 P37 DDRB_SMA7 P36 DDRB_SMA8 N36 DDRB_SMA9 DDRB_SMA10 AD36 P35 DDRB_SMA11 N37 DDRB_SMA12 DDRB_SMA13 AH37 DDRB_SMA14 M36 L36 DDRB_SMA15 DDRB_SBS0# DDRB_SBS1# DDRB_SBS2# AD35 AD37 M37 DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7 A20 C24 A30 B35 AL35 AN32 AN26 AN21 E37 MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15 K36 K37 K35 J37 DDRB_ODT0 DDRB_ODT1 AH36 AJ37 AF35 AK35 DDRB_SCS0# DDRB_SCS1# AF36 AJ36 AE36 AH35 DDRB_SRAS# DDRB_SCAS# DDRB_SWE# 12 12 MEM_MB_RST# MEM_MB_EVENT# MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_CKE0 MB_CKE1 MB_CKE2 MB_CKE3 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63 MB0_ODT0 MB0_ODT1 MB1_ODT0 MB1_ODT1 MB0_CS_L0 MB0_CS_L1 MB1_CS_L0 MB1_CS_L1 MB_CHECK0 MB_CHECK1 MB_CHECK2 MB_CHECK3 MB_CHECK4 MB_CHECK5 MB_CHECK6 MB_CHECK7 MB_RAS_L MB_CAS_L MB_WE_L MEM_MB_RST# J36 AB36 MEM_MB_EVENT# MB_RESET_L MB_EVENT_L MB_VREFDQ MB_ZVDDIO M35 AB35 +MB_VREFDQ MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1 MB_CLK_H2 MB_CLK_L2 MB_CLK_H3 MB_CLK_L3 B17 V37 15mil MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 MB_DQS_H8 MB_DQS_L8 DDRB_SRAS# AE37 DDRB_SCAS# AG36 DDRB_SWE# AF37 12 12 12 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 MB_DM8 AA37 AA36 Y37 Y36 Y34 Y35 V35 W36 DDRB_CKE0 DDRB_CKE1 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_BANK0 MB_BANK1 MB_BANK2 DDRB_SDQS0 C20 DDRB_SDQS0# B20 DDRB_SDQS1 B25 DDRB_SDQS1# A25 DDRB_SDQS2 C30 DDRB_SDQS2# B30 DDRB_SDQS3 B36 DDRB_SDQS3# A36 DDRB_SDQS4 AN36 DDRB_SDQS4# AM36 DDRB_SDQS5 AN31 DDRB_SDQS5# AM31 DDRB_SDQS6 AM25 DDRB_SDQS6# AL26 DDRB_SDQS7 AM20 DDRB_SDQS7# AL20 F37 F36 DDRB_CLK0 DDRB_CLK0# DDRB_CLK1 DDRB_CLK1# MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 RSVD_11 RSVD_12 RSVD_13 RSVD_14 RSVD_9 RSVD_10 FP3 REV 0.52 MA_ZVDDIO 39.2_0402_1% KAVERI-FP3-2.7G_BGA854 @ DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7 B24 A24 B27 A28 B22 B23 B26 C26 DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15 A29 B29 B32 C32 B28 C28 B31 A32 DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23 C34 A34 C36 C37 A33 B33 D35 B37 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31 DDRB_SDQ[63 0] 12 D AL36DDRB_SDQ32 AM37DDRB_SDQ33 AN34DDRB_SDQ34 AM34DDRB_SDQ35 AK37DDRB_SDQ36 AK36DDRB_SDQ37 AN35DDRB_SDQ38 AL34DDRB_SDQ39 C AL32DDRB_SDQ40 AM32DDRB_SDQ41 AN29DDRB_SDQ42 AL28DDRB_SDQ43 AM33DDRB_SDQ44 AN33DDRB_SDQ45 AM30DDRB_SDQ46 AM29DDRB_SDQ47 AM27DDRB_SDQ48 AM26DDRB_SDQ49 AN24DDRB_SDQ50 AM24DDRB_SDQ51 AN28DDRB_SDQ52 AM28DDRB_SDQ53 AN25DDRB_SDQ54 AL24DDRB_SDQ55 AN22DDRB_SDQ56 AL22DDRB_SDQ57 AK18DDRB_SDQ58 AL18DDRB_SDQ59 AM23DDRB_SDQ60 AM22DDRB_SDQ61 AN20DDRB_SDQ62 AM19DDRB_SDQ63 B E36 F35 H36 H37 D36 D37 G36 H35 A26 B34 AL30 AM21 R4 MB_ZVDDIO 39.2_0402_1% @ KAVERI-FP3-2.7G_BGA854 Place them close to APU within 3" 0.75V reference voltage +1.5V +1.5V C18 B19 C22 A22 A18 B18 A21 B21 FP3 REV 0.52 +1.5V Place them close to APU within 3" EVENT# pull high H13DDRA_SDQ0 F13 DDRA_SDQ1 H16DDRA_SDQ2 F16 DDRA_SDQ3 G11DDRA_SDQ4 E11DDRA_SDQ5 E14DDRA_SDQ6 J14 DDRA_SDQ7 MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 A A R5 1K_0402_1% 1K_0402_5% MEM_MA_EVENT# R7 1K_0402_5% MEM_MB_EVENT# +MEM_VREF 15mil 1 R6 R8 1K_0402_1% 2 C29 1000P_0402_50V7K Issued Date Compal Electronics, Inc Compal Secret Data Security Classification C30 0.1U_0402_16V7K 2012/09/12 2012/07/29 Deciphered Date Title FP3 DDRIII MEMORY I/F THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAK M/B LA-B221P Date: Wednesday, February 12, 2014 Sheet of 52 U65D ANALOG/DISPLAY/MISC Place near APU 0.1U_0402_16V7K 0.1U_0402_16V7K DP0_TXP2 AN4 DP0_TXN2 AN3 DP0_TXP2 DP0_TXN2 1 0.1U_0402_16V7K 0.1U_0402_16V7K DP0_TXP3 AM3 DP0_TXN3 AN2 DP0_TXP3 DP0_TXN3 F2 F1 DP1_TXP0 DP1_TXN0 27 27 CLK net has no test points 20 20 20 20 45 45 45 27 27 APU_DP2_P1 APU_DP2_N1 27 27 APU_DP2_P2 APU_DP2_N2 27 27 APU_DP2_P3 APU_DP2_N3 CLK_APU R147 CLK_APU# R148 CLK_APU CLK_APU# APU_SVC APU_SVD APU_SVT APU_SVC APU_SVD APU_SVT 22_0402_5% 22_0402_5% CLK_APU_R CLK_APU_R# R445 R446 APU_RST# APU_PWRGD 20 R150 R149 0_0402_5% 0_0402_5% RS@ 0_0402_5% RS@ 0_0402_5% APU_PROCHOT# APU_SVC_R APU_SVD_R APU_RST#_R APU_PWRGD_R APU_PROCHOT# APU_THERMTRIP# APU_ALERT# APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ# 45 45 45 Route as differential with VSS_SENSE A2 A3 DP2_TXP0 DP2_TXN0 B4 A4 DP2_TXP1 DP2_TXN1 C4 B5 DP2_TXP2 DP2_TXN2 AM13 AN13 AM11 AN11 AJ10 APU_SIC APU_SID 20 20,45 DP1_TXP3 DP1_TXN3 A5 A6 CLK_APU_DISP CLK_APU_DISP# CLK_APU_DISP CLK_APU_DISP# C APU_DP2_P0 APU_DP2_N0 B16 C16 A16 CLKIN_H CLKIN_L SIC SID AM14 AL12 RESET_L PWROK AL10 AK11 AN15 A14 C14 B15 B14 D14 A13 B13 B6 B7 DP3_AUXP DP3_AUXN H7 G7 TDI TDO TCK TMS TRST_L DBRDY DBREQ_L APU_HDMI_CLK APU_HDMI_DATA 27 27 APU_VGA_AUXP_C APU_VGA_AUXN_C 21 21To FCH To eDP Conn To HDMI D +1.5VS U64 DP_ENBKL AD2 AC2 DP5_AUXP DP5_AUXN NC VCC +1.5VS AH7 B3 D7 F8 AB6 AD1 FCH_CRT_HPD DP1_HPD 25 DP2_HPD 27 21 FCH/CRT eDP HDMI Y ENBKL 35 APU_SVC GND DP_ENVDD D12 DP_ENBKL B11 DP_ENVDD C12 DP_INT_PWM APU_SVT SA00005U600 APU_RST# +1.5VS U67 VDDIO level Need Level shift NC VCC APU_PWRGD +3VS A Y APU_ENVDD RP16 25 APU_ENVDD ENBKL GND 74AUP1G07GW_TSSOP5 D3 R13 DP_AUX_ZVSS 150_0402_1% L27 P27 P28 C10 APU_TEST14 R15 @ B9 APU_TEST15 T3 A10 APU_TEST16 R16 @ B10 APU_TEST17 R17 @ A12 APU_TEST18 B12 APU_TEST19 C8 APU_TEST20 D8 APU_TEST24 AM12 APU_TEST25_H R22 AN12 APU_TEST25_L R23 A8 APU_TEST28_H T4 B8 APU_TEST28_L T5 AA27 R25 AA28 V28 APU_TEST31 R26 Y27 Y28 R27 TEST6 TEST9 TEST10 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST24 TEST25_H TEST25_L TEST28_H TEST28_L TEST30_H TEST30_L TEST31 TEST32_H TEST32_L AK10 APU_RSVD_15 AM15 APU_ALLOW_STOP APU_INVT_PWM SA00005U600 4.7K_0804_8P4R_5% +1.5VS U68 1K_0402_5% 1K_0402_5% 1K_0402_5% DP_INT_PWM NC VCC A Y +1.5V RP2 APU_INVT_PWM APU_SID APU_SIC APU_ALLOW_STOP APU_ALERT# 25 GND 1K_0804_8P4R_5% 74AUP1G07GW_TSSOP5 510_0402_5% 510_0402_5% @ @ R28 39.2_0402_1% 39.2_0402_1% SA00005U600 RP15 DP_ENVDD DP_ENBKL +1.05VS DP_INT_PWM +1.5V @ 210K_0402_5% @ 210K_0402_5% +1.5V 2300_0402_5% +1.5V APU_TEST18 APU_TEST19 APU_TEST20 APU_TEST24 C 100K_0804_8P4R_5% RP7 1K_0804_8P4R_5% T27 APU_TEST4 T28 APU_TEST5 TEST4 TEST5 A9 DP_STEREOSYNC T10 T11 DP_STEREOSYNC D16 APU_COREYYPE CORETYPE A17 APU_RSVD_1 K28 APU_RSVD_2 RSVD_1 RSVD_2 R30 R31 @ 2300_0402_5% R32 @ 0_0402_5% DP_STEREOSYNC change to PU for HDMI can not output 20131126 +3VLP T12 T13 F7 E4 E5 E7 D5 RSVD_17 RSVD_18 RSVD_19 RSVD_20 RSVD_21 +1.5V FP3 REV 0.52 KAVERI-FP3-2.7G_BGA854 Q3 @ APU_ALLOW_STOP D @ R120 @ 1K_0402_5% R65 @ 1K_0402_5% R35 @ 1K_0402_5% R36 300_0402_5% R37 300_0402_5% APU_SVD A 74AUP1G07GW_TSSOP5 RSVD_15 DMAACTIVE_L VSS_SENSE_A VDD_SENSE VDDNB_SENSE VDDIO_SENSE VDDP_SENSE VDDR_SENSE VSS_SENSE_B 25 25 DP_AUX_ZVSS PROCHOT_L THERMTRIP_L ALERT_L 0.1U_0402_16V7K 0.1U_0402_16V7K APU_EDP1_AUXP APU_EDP1_AUXN Y6 Y5 DP4_AUXP DP4_AUXN DP_BLON DP_DIGON DP_VARY_BL DISP_CLKIN_H DISP_CLKIN_L RSVD_16 SVC SVD SVT DP2_AUXP DP2_AUXN DP0_HPD DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD DP2_TXP3 DP2_TXN3 AL14 AK14 E10 D9 D10 F10 AE10 AF11 AF10 APU_VDD_SEN_L APU_VDD_SEN_H APU_VDDNB_SEN_H DP1_TXP2 DP1_TXN2 D2 C1 DISPLAY PORT E1 D1 DP1_TXP1 DP1_TXN1 CLK F3 E2 APU_EDP1_TXP1 APU_EDP1_TXN1 TEST 25 25 SER APU_EDP1_TXP0 APU_EDP1_TXN0 25 25 1 C35 C36 G 1 C43 C44 APU_VGA_AUXP APU_VGA_AUXN B2 B1 DP1_AUXP DP1_AUXN ALLOW_STOP ALLOW_STOP S C41 C42 AG8 AG10 DP0_AUXP DP0_AUXN DISPLAY PORT DP0_TXP1 DP0_TXN1 DISPLAY PORT MISC DP0_TXP0 DP0_TXN0 DP0_TXP1 AN5 DP0_TXN1 AM4 DISPLAY PORT DP0_TXP0 AL6 DP0_TXN0 AM5 0.1U_0402_16V7K 0.1U_0402_16V7K CTRL APU_VGA_TXP3 APU_VGA_TXN3 0.1U_0402_16V7K 0.1U_0402_16V7K 1 MISC APU_VGA_TXP2 APU_VGA_TXN2 21 21 1 C39 C40 JTAG 21 21 C37 C38 RSVD APU_VGA_TXP1 APU_VGA_TXN1 SENSE APU_VGA_TXP0 APU_VGA_TXN0 21 21 AUDIO D 21 21 20 BSH111 1N_SOT23-3 R24 For debug, place the Caps close to APU B APU_ALLOW_STOP C53 XEMC@ 27P_0402_50V8J APU_PWRGD C54 EMC@ 27P_0402_50V8J APU_RST# C55 EMC@ 27P_0402_50V8J RS@ 0_0402_5% B +1.5VS HDT+ Debug conn 1 R121 R122 +1.5V +1.5V Asserted as an input to force the processor into the HTC-active state R29 1K_0402_5% +1.5V 1 +3VS 1 R537 31.6K_0402_1% R538 30K_0402_1% THERMTRIP shutdown temperature: 115 degree R40 @ 0_0402_5% C935 0.1U_0402_16V4Z R33 When APU High -> MOS OFF (Vgs < 0.4V ) APU Low -> MOS ON (Vgs > 1.3V) 2 D S EC_SMB_DA2 PROCHOT# 35,45 Indicates to the FCH that a thermal trip has occurred Its assertion will cause the FCH to transition the system to S5 immediately 14,35 11 13 15 17 RP1 10 11 12 13 14 15 16 17 18 19 20 Q12 R623 MMBT3904_SOT23-3 R621 1K_0804_8P4R_5% APU_TDO 10 APU_PWRGD_BUF 12 APU_RST#_BUF 14 APU_DBRDY DB2J31400L_SOD323-2 D29 APU_PWRGD_HDT HDT@ D30 APU_RST#_HDT HDT@ DB2J31400L_SOD323-2 16 18 APU_TEST19 20 APU_TEST18 @ 0_0402_5% H_THERMTRIP# EVT check can remove RP1 or not MAINPWON A 22 APU_PWRGD_HDT 35,39,41 APU_RST#_HDT G 2 SAMTE_ASP-136446-07-B HDT@ RS@ 0_0402_5% To power protect HDT@ R41 0_0402_5% HDT@ R42 0_0402_5% APU_PWRGD APU_RST# Q10 S D APU_SIC APU_TCK APU_TMS APU_TDI APU_DBREQ# R620 10K_0402_5% C EC_SMB_DA2 LBSS138LT1G_SOT-23-3 E Vg = 1.607 V B G Q9 APU_THERMTRIP# APU_SID RS@ 0_0402_5% 19 R622 1K_0402_5% A +1.5V APU_TRST# HDT@ R39 1K_0402_5% 0_0402_5% R47 HDT@ 10K_0402_5% R48 HDT@ 10K_0402_5% R50 HDT@ 10K_0402_5% +1.5VS R38 APU_PROCHOT# BSH111, the Vgs is: = 0.4V Max = 1.3V +1.5V JHDT1 CPU TSI interface level shift HDT@ HDT@ 21K_0402_5% 1K_0402_5% EC_SMB_CK2 LBSS138LT1G_SOT-23-3 14,35 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification EC_SMB_CK2 2012/09/12 Deciphered Date 2012/07/29 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title FP3 Display/MISC/HDT Size C Date: Document Number Rev 0.2 Z5WAK M/B LA-B221P Wednesday, February 12, 2014 Sheet of 52 Consumption Power Name U65F +1.5V POWER 40A VDDIO +1.5V 2.5A VDDP / VDDR +1.05VS 4.0A / 3.9A D 0.7A +APU_CORE_NB U65E POWER 2 C73 C72 C71 C70 C68 C66 C65 C64 C62 C61 C60 C59 C58 C69 2 0.22U_0402_10V4Z 0.22U_0402_10V4Z 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22u x3 0.22u x2 180P x2 22U_0805_6.3V6M VDDP: 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 0.22U_0402_10V4Z 0.22U_0402_10V4Z 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M +1.05VS C63 +1.05VS VDDR: 22u x4 0.22u x2 180P x2 +1.05VS VDDP_CAPAC11 VDDP_CAP 2 C76 C74 AC27 VDDR_CAP 3300P_0402_50V7K VDDR_CAP VDDR_CAP +1.8VS AK17 AM17 AN17 0.22U_0402_6.3V6K VDDR_1 VDDR_2 VDDR_3 4.7U_0603_6.3V6K AK16 VDDP_1 AL16 VDDP_2 AM16 VDDP_3 AN16 VDDP_4 C75 +1.05VS C77 @ 22U_0805_6.3V6M VDDA: 4.7u x1 0.22u x1 3.3n x1 VDDR_CAP: 22u x1 x1@ 1 22U_0805_6.3V6M 22u C78 AH11 VDDA_1 AJ11 VDDA_2 RSVD_22 D6 1 22U_0805_6.3V6M KAVERI-FP3-2.7G_BGA854 @ C80 38A VDDNB +APU_CORE_NB +APU_CORE C C79 @ 22U_0805_6.3V6M Check list CH47 +APU_CORE Decoupling Power Side 22uF x11 @ x2 0.22uF x2 0.01uF x3 180pF x3 VDDA +1.8VS C57 D +APU_CORE_NB Decoupling Power Side 22uF x10 @ x2 0.22uF x3 180pF x4 VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 VDDIO_5 VDDIO_6 VDDIO_7 VDDIO_8 VDDIO_9 VDDIO_10 VDDIO_11 VDDIO_12 VDDIO_13 VDDIO_14 VDDIO_15 VDDIO_16 VDDIO_17 VDDIO_18 VDDIO_19 VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29 VDDIO_30 VDDIO_31 VDDIO_32 VDDIO_33 VDDIO_34 VDDIO_35 VDDIO_36 VDDIO_37 0.22U_0402_10V4Z L29 L31 L34 L37 M29 M32 N27 N34 P29 P31 R29 R32 R34 R37 U29 U31 U34 V27 V34 W29 W32 W37 Y31 AA34 AB29 AB32 AB37 AC29 AC31 AC34 AC37 AE32 AE34 AF30 AF31 AG34 AG37 VDD +APU_CORE FP3 REV 0.52 R54 0_0402_5% @ +1.5VS C81 22U_0805_6.3V6M 2 2 C108 C107 C106 C105 C104 C103 C100 C99 C96 C95 C94 C93 22U_0805_6.3V6M 22U_0805_6.3V6M C90 C88 C85 C84 C83 22U_0805_6.3V6M C89 1 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 180P_0402_50V8J 180P_0402_50V8J 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K B 4.7U_0603_6.3V6K C82 +1.5V T11 T14 T17 T21 T24 V10 V13 V16 V19 V22 V24 Y7 Y10 Y13 Y16 Y19 Y22 Y25 AA4 AA11 AA14 AA17 AA21 AA24 AB7 AC4 AC10 AC13 AC16 AC19 AC22 AC25 AD4 AD11 AD14 AD17 AD21 AD24 AE6 AE22 AE25 AF5 AF8 AG11 AH5 AH8 AH10 AK8 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 VDDNB_6 VDDNB_7 VDDNB_8 VDDNB_9 VDDNB_10 VDDNB_11 VDDNB_12 VDDNB_13 VDDNB_14 VDDNB_15 VDDNB_16 VDDNB_17 VDDNB_18 VDDNB_19 VDDNB_20 VDDNB_21 VDDNB_22 VDDNB_23 VDDNB_24 VDDNB_25 VDDNB_26 VDDNB_27 VDDNB_28 VDDNB_29 VDDNB_30 VDDNB_31 VDDNB_32 VDDNB_33 VDDNB_34 VDDNB_35 VDDNB_36 VDDNB_37 VDDNB_38 VDDNB_39 VDDNB_40 VDDNB_41 VDDNB_42 E8 F4 F5 G4 G8 G10 H3 H6 H10 J10 J13 J22 J25 K11 K14 K17 K21 K24 L4 L7 L10 L13 L16 L19 L22 L25 M3 N11 N14 N17 N21 N24 P10 P13 P16 P19 P22 P25 R4 R6 R9 T3 C B FP3 REV 0.52 @ KAVERI-FP3-2.7G_BGA854 VDDIO Decoupling 22uF x3 4.7uFx4 0.22uF x6 0.22uF x4 (return path) 180pF x2 (return path) APU sequence : GROUP A need ramp before GROUP B SYSON APU_VDDIO_SUS SUSP# Group A +5/+3.3 VS +1.1/+1.5/+1.8 VS VDDA_PWRGD VR_ON A A +APU_CORE +APU_CORE_NB Group B +1.05VS 1.05VS_PWRGD Issued Date Compal Electronics, Inc Compal Secret Data Security Classification FCH_PWRGD 2012/09/12 2012/07/29 Deciphered Date Title FP3 Power THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAK M/B LA-B221P Date: Wednesday, February 12, 2014 Sheet of 52 U65G U65H VSS A1 A7 A11 A15 A19 A23 A27 A31 A35 A37 C2 C3 C6 C35 D4 D11 D13 D15 D17 D19 D21 D23 D25 D27 D29 D31 D33 E17 E31 E34 F11 F21 F24 F27 F30 G1 G13 G16 G19 G22 G25 G28 G34 G37 H8 H14 H17 H30 H32 J4 J6 J11 J16 J21 J24 J27 J28 J32 J34 K10 D C VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 K13 K16 K19 K22 K25 L1 L11 L14 L17 L21 L24 L28 M6 M9 N4 N10 N13 N16 N19 N22 N25 N28 P6 P9 P11 P14 P17 P21 P24 R1 T10 T13 T16 T19 T22 T25 U4 U6 U9 V11 V14 V17 V21 V25 W1 W4 W6 W9 Y3 Y11 Y14 Y17 Y21 Y24 AA10 AA13 AA16 AA19 AA22 AA25 AC1 AC7 AC14 AC17 AC21 AC24 AC28 AD3 AD10 AD13 AD16 AD19 AD22 AD25 AD28 AE1 AE4 AE14 AE19 AE21 AE27 AE28 AF7 AF24 AF28 AG1 AG4 AG14 AG17 AG21 AG25 AG27 AG28 AH13 AH16 AH19 AH22 AH30 AH31 AJ4 AJ24 AJ25 AK9 AK12 AK13 AK15 AK19 AK21 AK23 AK25 AK27 AK29 AK31 AK34 AL3 AL8 AL37 AM35 AN1 AN7 FP3 REV 0.52 @ VSS VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 AN10 AN14 AN19 AN23 AN27 AN30 AN37 AD27 K27 AE11 D C FP3 REV 0.52 KAVERI-FP3-2.7G_BGA854 @ KAVERI-FP3-2.7G_BGA854 B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/09/12 2012/07/29 Deciphered Date Title FP3 GND THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAK M/B LA-B221P Date: Wednesday, February 12, 2014 Sheet of 52 Panel ENBKL D D Panel ENVDD C C B B Panel PWM A A Compal Secret Data Security Classification Issued Date 2011/07/08 2015/07/08 Deciphered Date Title AMD FS1R2 Singal Level Shifter THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.2 Z5WAK M/B LA-B221P Date: Wednesday, February 12, 2014 Sheet 10 of 52 A @ PJP201 SUYIN_200275GR008G13GZR 10 GND GND 8 7 6 5 4 3 2 1 C D 35,40 @ PR204 10K_0402_1% +3VLP BATT_TEMP 35 @ PU201 @ PR206 100K_0402_1% 2 PR211 MAINPWON 1K_0402_1% EMI@ PL201 HCB2012KF-121T50_0805 BATT_S1 -Battery Con_pin define PIN8 GND PIN7 GND PIN6 SMD PIN5 SMC PIN4 TS PIN3 B/I PIN2 Batt+ PIN1 Batt+ @ PH201 100K_0402_1%_NCP15WF104F03RC For KB9022 OTP Active VCIN0_PH(V) 92C, 1V 56C, 2.044V PH202(ohm) 6.99K 26.03K Recovery For KB9012 sense 20mΩ Active Recovery 40W 42.8W, 0.73V 34.4W,0.59V 65W 69.55W, 0.73V 55.9W,0.59V ADP_I 1 2 PR202 10K_0402_1% VCIN1_PROCHOT @ PR223 100K_0402_1% EC_THERM 35 35 35 40W@ PR203 44.2K_0402_1% PR226 1_0402_1% 65W@ PR203 10K_0402_1% 35 @ VCIN1_BATT_DROP For 65W adapter==>action 69.55W , Recovery 55.9W PH202 100K_0402_1%_B25/50 4250K 69.55W: B value:4250K±1% Iada= 0~3.661A (69.55W/19V=3.661A) PH1203 from SL200000V00 change to ADP_I=20*Iada*Rsense common part SL200002H00 2013/10/23 ADP_I=20*3.661*0.02=1.464 55.9W: Iada= 0~2.942A (55.9W/19V=2.942A) @ ADP_I=20*Iada*Rsense ADP_I=20*2.942*0.02=1.177 35,40 26.1K_0402_1% MAINPWON 1 35,41,7 CP=40W*0.85=34W PR225 0_0402_5% @9022@ PR229 0_0402_5% @9022@ PR228 10K_0402_1% PH201 under CPU botten side : CPU thermal protection at 92 degree C ( shutdown ) Recovery at 56 degree C +EC_VCCA For 40W adapter==>action 42.8W , Recovery 34.4W 42.8W: Iada= 0~2.253A (42.8W/19V=2.253A) ADP_I=20*Iada*Rsense PR216 ADP_I=20*2.253*0.02=0.901 16.9K_0402_1% 34.4W: Iada= 0~1.811A (34.4W/19V=1.811A) 35 VCIN0_PH ADP_I=20*Iada*Rsense ADP_I=20*1.811*0.02=0.724 @ PR227 @9022@ PR230 80.6K_0402_1% 2013/10/28 update PH201 chang Common part SL200002H00 B+ @ PR207 47K_0402_1% EMI@ PC201 1000P_0402_50V7K Battery is 3-cell design B+=9V OT2 RHYST2 BATT+ 2013/10/02 Add for ENE9022 Battery Voltage drop detection Connect to ENE9022 pin64 AD1 @9022@ PC203 0.1U_0402_25V6 OT1 TMSNS2 G718TM1U_SOT23-8 -Battery_pin define PIN1 GND PIN2 GND PIN3 SMD PIN4 SMC PIN5 TS PIN6 B/I PIN7 Batt+ PIN8 Batt+ GND RHYST1 EMI@ PL202 HCB2012KF-121T50_0805 2 VCC TMSNS1 BI @ PR205 10K_0402_1% 2 PR201 6.49K_0402_1% PR210 0_0402_5% TH @ PC202 0.1U_0603_25V7K EC_SMB_CK1 35,40 100_0402_1% PR208 EC_SMB_DA1 EC_SMCK 100_0402_1% PR209 2 EC_SMDA +3VLP 1 B ECAGND CP=65W*0.85=55.25W Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Deciphered Date 2013/10/01 Title BATTERY CONN / OTP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: B C Rev 0.3 Wednesday, February 12, 2014 D Sheet 39 of 53 A B C D PQ301 Protection for reverse input G B+ S 2N7002KW _SOT323-3 BQ24725A_BATDRV PC318 0.1U_0603_16V7K 10 @ PR320 0_0402_5% 2 PC320 0.01U_0402_25V7K PR317 100K_0402_1% BQ24725A_IOUT BQ24725A_ACDET PR316 316K_0402_1% EC_SMB_CK1 35,39 EC_SMB_DA1 35,39 ADP_I 35,39 PC322 100P_0402_50V8J PC321 0.22U_0402_16V7K PR319 66.5K_0402_1% PR318 422K_0402_1% VIN +3VALW BQ24725A_ILIM PC307 0.01U_0402_50V7K 2 CSOP1 PR311 0.01_1206_1% **Design Notes** #For 65 /90W system, 3S1P/3S2P battery Maximum Charging current 3.5A Maximum Battery discharge power 55W #Register Setting 0X12 bit8 set (default 1) to disable IFAULT HI if add ISN choke #Circuit Design ACOK,ILIM pull high voltage need base on 3/5V enable control Use 10X10 choke and 3X3 H/L Side MOSFET Charge current 3.5A Power loss : 1.82W Power density : 0.81 (15X15) If use 4S per cell 4.35V battery, need additional circuit for ACDET(PR218/PR220/PR222 change to 0.1%, parallel resistors with PR222 for ACDET setting) PC223 0.22U can't be changed (Wrong adapter concern) For the design, need double confirm PQ202,PQ203,PQ204 rating #Protect function ACOVP : ACDET voltage > 3.14V Charger timeout : No communication within 175s(default) ACOC : 3.33 X Input current DAC setting(default) CHGOCP : 3/4.5/6A based on current current setting BATOVP : 103-106% BATLOWV : 2.5V TSHUT : 155C IFAULT HI : 750mV (default) IFAULT LOW : 150mV (default) ACIN BATT+ PC315 10U_0805_25V6K 11 ILIM BATDRV SCL ACOK SDA PR315 SRN 35 100K_0402_1% SRP ACDRV IOUT +3VLP CMSRC ACDET BQ24725A_ACDRV PQ306 AON7408L_DFN8-5 12 PR313 10_0603_1% CSOP1 SRP1 PR314 6.8_0603_1% CSON1 SRN1 14 13 GND BQ24725ARGRR_QFN20_3P5X3P5 ACP DL_CHG 2 BQ24725A_CMSRC CHG 15 LODRV PC314 10U_0805_25V6K BQ24725A_LX PC313 1U_0603_25V6K 2 PQ305 PL302 AON7408L_DFN8-5 10UH_3.5A_20%_7X7X3_M PC316 0.1U_0402_25V6 0_0402_5% ACN Power loss: 0.32W for 3.5A CSR rating: 1W VSRP-VSRN spec < 81.28mV 7X7X3 Isat: 3.8A CSON1 @ PR308 PL302 from SH00000M600 change to common part SH00000YB00 2013/10/23 PC317 0.1U_0402_25V6 DH_CHG 2BQ24725A_BATDRV_1 PR305 4.12K_0603_1% BQ24725A_REGN PD302 RB751V-40_SOD323-2 16 PR307 2.2_0603_5% BQ24725A_BST2 VF = 0.37V @EMI@ PC319 @EMI@ PR312 680P_0402_50V7K 4.7_1206_5% PAD 1 2 BQ24725A_BATDRV REGN 21 BTST PU301 17 1U_0603_25V6K DH_CHG PC312 PQ304 from AON4466 change to AON4406 2014/01/08 Rds(on) = 30mohm max Vgs = 20V Vds = 30V ID = 7A (Ta=70C) PC311 0.047U_0402_25V7K 18 2 1 PC309 0.1U_0402_25V6 PD301 BAS40CW _SOT323-3 HIDRV PR310 4.12K_0603_1% BQ24725A_ACN BQ24725A_ACP PR309 4.12K_0603_1% PC308 0.1U_0402_25V6 BQ24725A_ACDRV_1 VF = 0.5V PQ304 AO4406AL_SO8 @EMI@ PC306 0.1U_0402_25V6 VIN PQ303 from AON4466 change to AON4406 2014/01/08 PR306 10_1206_1% PQ303 AO4406AL_SO8 Isat: 4A DCR: 27mohm EMI@ PC305 2200P_0402_25V7K Rds(on) = 35mohm max Vgs = 20V Vds = 30V ID = 7.7A (Ta=70C) CHG_B+ EMI@ PL301 1UH_2.8A_30%_4X4X2_F PR303 0.02_1206_1% PC304 10U_0805_25V6K 1 PC302 0.1U_0402_25V6 @ PR304 0_0402_5% PQ302 AON6414AL_DFN8-5 PC301 2200P_0402_50V7K P2 BQ24725A_LX P1 19 VIN PHASE Need check the SOA for inrush max Power loss 0.22W for 90W; 0.12W for 65W system PL301 from SH00000MW00 change to CSR rating: 1W common part SH00000YG00 VACP-VACN spec < 80.64mV 2013/10/23 PC303 10U_0805_25V6K Rds(on) typ=35mohm max Vgs=20V Vds=30V ID= 7.7A (Ta=70C) 3M_0402_5% BQ24725A_VCC2 1M_0402_5% 20 VCC PC310 0.1U_0402_25V6 Vgs = 20V Vds = 60V Id = 250mA PR302 PR301 D @ PC323 100P_0402_50V8J Close EC chip 4 Vin Dectector L >H H >L Min 17.16V 16.76V Typ 17.63V 17.22V Max 18.12V 17.70V Compal Secret Data Security Classification VILIM = 20*ILIM*Rsr ILIM = 3.3*100/(100+107)/20/0.02 = 3.986 A Issued Date 2014/07/02 Deciphered Date 2013/10/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C Compal Electronics, Inc CHARGER Document Number Rev 0.3 W ednesday, February 12, 2014 D Sheet 40 of 53 A B C D E Module model information SY8208B_V2.mdd SY8208C_V2.mdd PR401 FAE review : change from 2.2_0603_5% to 1_0603_5% HW request add PR413, and PC428-un-pop PR402 499K_0402_1% ENLDO_3V5V 1 PC406 10U_0805_25V6K EN2 IN EN1 FB BS 3V_FB PR401 BST_3V 1_0603_5% PC402 PR403 0.01U_0402_25V7K 1K_0402_5% 2 PC403 0.1U_0603_25V7K PL402 3.3V LDO 150mA~300mA 35 SPOK PC410 22U_0603_6.3V6M PC409 22U_0603_6.3V6M 1 PC408 22U_0603_6.3V6M 2 PR412 100K_0402_5% 2 +3VLP PC411 4.7U_0603_6.3V6M +3VALWP PC407 22U_0603_6.3V6M PR405 LDO 3V_SN PG SY8208BQNC_QFN10_3X3 1.5UH_PCMB053T-1R5MS_6A_20% 680P_0603_50V7K 4.7_1206_5% OUT @EMI@ GND LX_3V PC412 10 @EMI@ LX @ +3VALWP Check pull up resistor of SPOK at HW side 35 @ PC428 0.1U_0402_10V7K PC405 10U_0805_25V6K EMI@ PC404 2200P_0402_50V7K 3V_VIN 3V_EN 0_0402_5% PU401 EMI@ PL401 HCB2012KF-121T50_0805 @EMI@ PC401 0.1U_0402_25V6 B+ @ PR413 B+ PR404 150K_0402_1% EN1 and EN2 dont't floating Vout is 3.234V~3.366V TDC=6A @ PJ401 +3VALWP 2 +3VALW JUMP_43X118 EN1 and EN2 dont't floating EMI@ PL403 HCB2012KF-121T50_0805 5V_VIN @EMI@ PC418 0.1U_0402_25V6 1 5V_FB BST_5V @ PR407 0_0603_5% @ PJ402 Vout is 4.998V~5.202V +5VALWP 2 +5VALW JUMP_43X118 TDC=6A PC416 0.1U_0603_25V7K PC427 22U_0603_6.3V6M PC423 22U_0603_6.3V6M PC422 22U_0603_6.3V6M PC421 22U_0603_6.3V6M 1 PR414 @ 0_0402_5% PC420 22U_0603_6.3V6M VL +5VALWP LDO 680P_0603_50V7K 4.7_1206_5% PG SY8208CQNC_QFN10_3X3 1.5UH_PCMB053T-1R5MS_6A_20% PR408 OUT LX_5V PC425 5V_SN VCC 10 @EMI@ LX PC424 4.7U_0603_6.3V6M SPOK_5V GND EC_ON MAINPWON PC413 PR406 6800P_0402_25V7K 1K_0402_5% 2 PL404 SPOK 35 35,39,7 PR409 2.2K_0402_5% EN FB PC419 4.7U_0603_6.3V6M IN BS VCC_3V PR407 FAE review : change from 2.2_0603_5% to 0_0603_5% PU402 @ EMI@ PC417 2200P_0402_50V7K PC415 10U_0805_25V6K PC414 10U_0805_25V6K 3V5V_EN @EMI@ B+ Add PC427 for 22U_0603 size 5V LDO 150mA~300mA @PR415 @ PR415 0_0402_5% PC426 4.7U_0402_6.3V6M PR411 1M_0402_1% 3V5V_EN 4 Compal Secret Data Security Classification 2011/06/15 Issued Date 2013/10/01 Deciphered Date Title Compal Electronics, Inc +3VALW/+5VALW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D Rev 0.3 Wednesday, February 12, 2014 Sheet E 41 of 53 Module model information RT8207M_V1.mdd RT8207M_V2.mdd For Single layer For Dual layer D D BOOT_1.5V +0.675VSP off off on VTTREF_1.35V off on on PC507 10U_0805_6.3V6K VTT 2 VTTREF_1.5V +1.5VP FB 20 PC506 10U_0805_6.3V6K PC510 0.033U_0402_16V7K S3 EN_0.75VSP TON 10 S5 VDDQ VDD C PR507 887K_0402_1% FB_1.5V PR506 10.2K_0402_1% +1.5VP B MOSFET: 3x3 DFN H/S Rds(on): 27mohm(Typ), 34mohm(Max) Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C 19 VTTREF @ PR505 100K_0402_5% 1.5V_B+ VLDOIN VDDP 11 GND RT8207MZQW _W QFN20_3X3 EN_1.5V VTTSNS 21 35,37 L/S Rds(on): 9.9mohm(Typ), 13mohm(Max) Idsm: 13.5A@Ta=25C, 11A@Ta=70C @ PR509 0_0402_5% SYSON @ PC514 0.1U_0402_10V7K Choke: 7x7x3 Rdc=8.3mohm(Typ), 10mohm(Max) PR508 10K_0402_1% Level L L H CS +5VALW +3VS PC509 from SF000002Z00 change to common part SF000006S00 2013/10/23 Mode S5 S3 S0 PC513 1U_0603_10V6K VDD_1.5V 13 12 PAD VTTGND PGND @EMI@ PC512 680P_0402_50V7K +5VALW + PR504 5.1_0603_5% 18 LGATE PU501 B PQ502 AON7506_DFN33-8-5 ESR=17m ohm @EMI@ PR503 4.7_1206_5% H=4.5 PC509 330U_2.5V_ESR17M_6.3X4.5 SF000006S00 BOOT 15 TON_1.5V 1 PR502 13.7K_0402_1% CS_1.5V PC508 1U_0603_10V6K 17 PHASE DL_1.5V PGOOD UGATE 16 PC501 0.1U_0603_25V7K 14 +1.5VP +0.75VSP SW _1.5V PQ501 AON7408L_DFN8-5 PL502 1UH_11A_20%_7X7X3_M +1.5VP DH_1.5V C PC502 from SF00000KS00 change to common part SF00000YE00 2013/10/23 0.675Volt +/- 5% TDC 0.7A Peak Current 1A 1 PR501 2.2_0603_5% BST_1.5V PC505 10U_0805_25V6K PC504 10U_0805_25V6K EMI@ PC503 2200P_0402_50V7K 1.5V_B+ @EMI@ PC502 0.1U_0402_25V6 B+ Pin19 need pull separate from +1.35VP If you have +1.35V and +0.675V sequence question, you can change from +1.35VP to +1.35VS EMI@ PL501 HCB2012KF-121T50_0805 Note: S3 - sleep ; S5 - power off Switching Frequency: 285kHz Ipeak=10A Iocp~13A OVP: 110%~120% VFB=0.75V, Vout=1.515V MOSFET footprint: SIS412DN SUSP# @ PR510 0_0402_5% @ PJ501 +1.5VP 35,37,44 2 +1.5V JUMP_43X118 @ PJ502 2 @ PC515 0.1U_0402_10V7K JUMP_43X118 PJ503 @ +0.75VSP 2 +0.75VS JUMP_43X39 A Compal Secret Data Security Classification Issued Date 2010/07/20 Deciphered Date 2013/10/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title A Compal Electronics, Inc +1.5VP/+0.75VSP Size Document Number Custom Date: Wednesday, February 12, 2014 Rev 0.3 Sheet 42 of 53 Module model information EN pin don't floating If have pull down resistor at HW side, pls delete PR2 SY8208D_V1.mdd APL5930_V1.mdd D @ PR602 VR_ON D 35,45 @ PC602 0.22U_0402_10V6K PL602 from SH00000PJ00 change to common part SH00000YE00 2013/10/23 TDC 8A PL602 1UH_11A_20%_7X7X3_M SY8208DQNC_QFN10_3X3 PR606 part count reduce 2 @ PR608 0_0402_5% C The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high Pin BYP is for CS Common NB can delete FB = 0.6V 2 PC611 22U_0603_6.3V6M +3VALW 1.05VS_LDO_3V Rup PR609 20K_0402_1% Rdown C LDO BYP PG ILMT PC614 4.7U_0603_6.3V6K FB ILMT_1.05V3 +1.05VSP PC610 22U_0603_6.3V6M LX_1.05V 10 LX @ PR605 PC604 0_0603_5% 0.1U_0603_25V7K 2 BST_1.05V 1 GND EN PC608 330P_0402_50V7K IN BS ILMT_1.05V PR607 15.4K_0402_1% 10U_0805_25V6K PC607 10U_0805_25V6K PC606 B+_1.05V PC613 4.7U_0603_6.3V6K @ 0_0402_5% PR606 PC609, PC610 from 47U_0603_6.3V6M change to 22U_0603_6.3V6M 2013/10/23 PU601 @EMI@ PC605 0.1U_0402_25V6 1 1.05VS_LDO_3V EMI@ PC601 2200P_0402_50V7K B+ @EMI@ PR604 @EMI@ PC603 4.7_1206_5% 680P_0603_50V7K 2SNB_1.05V EMI@ PL601 HCB2012KF-121T50_0805 PC612 22U_0603_6.3V6M 2 1M_0402_1% PR603 PC609 22U_0603_6.3V6M 0_0402_5% @ PJ601 +1.05VSP +3VALW and PC714 2 +1.05VS JUMP_43X118 VFB=0.6V Vout=0.6V* (1+Rup/Rdown) Vout=1.062V B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2011/06/13 Deciphered Date 2013/10/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title 1.05VSP Size C Date: Document Number Rev 0.3 Wednesday, February 12, 2014 Sheet 43 of 53 Module model information EN pin don't floating If have pull down resistor at HW side, pls delete PR2 @ PR702 35 SY8208D_V1.mdd 1.1V_EN 1 0_0402_5% PL702 from SH00000PJ00 change to common part SH00000YE00 2013/10/23 D @ PC702 0.22U_0402_10V6K 1M_0402_1% PR703 2 PC712 22U_0603_6.3V6M 1 Pin BYP is for CS Common NB can delete The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high FB = 0.6V PR709 115K_0402_1% Rdown 2 C PC714 4.7U_0603_6.3V6K SY8208DQNC_QFN10_3X3 @ PR708 0_0402_5% +3VALW PC711 22U_0603_6.3V6M Rup 1.1VALW_LDO_3V PR706 part count reduce PC713 4.7U_0603_6.3V6K LDO FB ILMT_1.1V PC710 22U_0603_6.3V6M PG +1.1VALWP BYP LX_1.1V ILMT 10 PC709, PC710 from 47U_0603_6.3V6M change to 22U_0603_6.3V6M 2013/10/23 TDC 8A PL702 1UH_11A_20%_7X7X3_M PC709 22U_0603_6.3V6M LX @ PR705 PC706 0_0603_5% 0.1U_0603_25V7K 2 BST_1.1V 1 GND EN PC708 330P_0402_50V7K IN BS ILMT_1.1V PR707 100K_0402_1% 10U_0805_25V6K PC707 B+_1.1V 10U_0805_25V6K PC705 @ 0_0402_5% PR706 PU701 @EMI@ PC704 0.1U_0402_25V6 1 1.1VALW_LDO_3V @EMI@ PR704 @EMI@ PC703 4.7_1206_5% 680P_0603_50V7K 2SNB_1.1V EMI@ PL701 HCB2012KF-121T50_0805 EMI@ PC701 2200P_0402_50V7K B+ D @ PJ701 +1.1VALWP +3VALW and PC714 2 +1.1VALW C JUMP_43X118 VFB=0.6V Vout=0.6V* (1+Rup/Rdown) Vout=1.12V Module model information @ PJ703 SY8032_V2.mdd +1.8VSP 1 2 +1.8VS JUMP_43X79 Imax= 2A, Ipeak= 3A FB=0.6V PC721 22U_0603_6.3V6M B B PL703 +1.8VSP 1UH_2.8A_30%_4X4X2_F @EMI@ PR722 4.7_0603_5% PU702 SY8032ABC_SOT23-6 Rup @ FB_1.8V @EMI@ PC726 680P_0402_50V7K PR726 10K_0402_1% Rdown 2 2 1 0_0402_5% PR725 1M_0402_1% PR723 20.5K_0402_1% @ PR724 2+1.8VSP_ON 1 35,37,42 PC725 0.1U_0402_16V7K SUSP# PC724 22U_0603_6.3V6M EN FB LX GND PG PC723 22U_0603_6.3V6M IN LX_1.8V PC722 68P_0402_50V8J +3VS JUMP_43X79 2 @ PR721 100K_0402_5% @ PJ702 1 +3VALW Note: When design Vin=5V, please stuff snubber to prevent Vin damage Vout=0.6V* (1+Rup/Rdown)=1.83V A A Compal Secret Data Security Classification Issued Date 2011/06/15 Deciphered Date 2013/10/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: +1.1VALWP/+1.8VSP Rev 0.3 Wednesday, February 12, 2014 Sheet 44 of 53 CPU_B+ 4.7_1206_5% PWM_NB PR819 CPU_B+ 100K_0402_1% PQ803 PD801 RB491D_SOT23-3 UGATE1 VGATE 2 @ PR820 0_0603_5% PHASE1 PR823 2.2_0603_1% BOOT1-1 BOOT1 +3VS PR826 100K_0402_5% S2 D1 S2 G1 S2 S1/D2 2 2 10_0402_5% APU_VCC APU_VDDNB_SEN_H 45,7 APU_VDD_SEN_L PQ804 APU_core TDC 25A Peak Current 38A OCP current > 46A Load line -2.1mV/A FSW=450kHz DCR 1.4mohm +/-5% TYP H/S Rds(on) :11.7mohm , L/S Rds(on) :2.7mohm , @ PR860 0_0603_5% UGATE2 S2 D1 S2 G1 S2 S1/D2 G2 PC811 0.1U_0402_25V6 ISENA1N-1 EMI@ PC837 2200P_0402_50V7K @EMI@ PC838 0.1U_0402_25V6 ISEN1P ISEN1N PR838 910_0402_1% PL805 0.36UH_PDME064T-R36MS_24A_20% PHASE2 PR864 2.2_0603_1% BOOT2 MAX 14mohm 3.3mohm AON6932A_DFN5X6-8-7 BOOT2-1 PC840 0.22U_0603_25V7K LGATE2 A @ PR831 4.12K_0402_1% Issued Date Compal Secret Data 2012/10/15 Deciphered Date 2013/10/01 Title PC843 1U_0402_16V7K @ PR859 4.12K_0402_1% ISEN2P ISEN2N Security Classification +APU_CORE PR861 2.61K_0402_1% PR862 910_0402_1% A 0.1U_0402_25V6 PC830 0.01U_0402_50V7K B @ PC846 PR848 124K_0402_1% 2 ISEN1N-2 PR845 124K_0402_1% SET2 PR846 470_0402_1% PR842 1 PC821 1U_0402_16V7K 330P_0402_50V7K @ PC829 680P_0402_50V7K +APU_CORE_NB +APU_CORE PC845 10U_0805_25V6K APU_VCC @ PR837 2K_0402_1% PR829 2.61K_0402_1% PC827 SET1 PR843 20.5K_0402_1% @ 10K_0402_1% 105K_0402_1% CPU_B+ @ PR841 20K_0402_5% layour area not enough, chang H and L mos to Dual N MOS 2013/10/19 @ PR840 120_0402_1% 2 PL803 0.36UH_PDME064T-R36MS_24A_20% PC848 10U_0805_25V6K @ PR839 6.2K_0402_5% 2 @ PR836 20K_0402_5% PR833 @ PR835 120_0402_1% 470P_0402_50V8J OFSA @ PR834 6.2K_0402_5% PC826 PR832 OFS PH801 and PH802 from SL200000U00 change to common part SL200002H00 2013/10/23 68P_0402_50V8J PC841 0.1U_0402_25V6 PC825 + LGATE1 35,43 AON6932A_DFN5X6-8-7 PC820 0.22U_0603_25V7K VR_ON PC833 10U_0805_25V6K CPU_B+ ISENA1P ISENA1N APU_VCC @ @ PR814 2.2_0603_5% 35 PC831 BOOT_NB1 PR851 910_0402_1% @ PC828 42 41 APU_VCC ISENA2N layour area not enough, chang H and L mos to Dual N MOS 2013/10/19 0.1U_0402_25V6 UGATE_NB1 @ PR852 0_0402_5% ISENA2P EMI@ PC819 2200P_0402_50V7K 43 APU_PVCC ISEN1N-1 PHASE_NB1 C PC832 1U_0402_16V7K @EMI@ PC818 0.1U_0402_25V6 LGATE_NB1 44 PR813 2.2_0603_5% +APU_CORE_NB 0.1U_0402_25V6 LGATE_NB2 PR853 2.61K_0402_1% ISENA1N-2 PHASE_NB2 4.7_1206_5% G2 PROCHOT# PC836 10U_0805_25V6K 0.22U_0603_25V7K RT9610BZQW_WDFN8_2X2 @ PL804 0.36UH_PDME064T-R36MS_24A_20% +5VS 45 40 LGATE AON6932A_DFN5X6-8-7 PC815 BOOT1 GND 680P_0603_50V7K UGATE1 46 PHASE S1/D2 G2 PC834 BOOT_NB2-1 @EMI@ PC835 @EMI@ PR850 2 PHASE1 47 PWM 48 PWM_NB BOOT PR854 2.2_0603_1% BOOT_NB2 TP LGATE1 PC839 1U_0603_16V6K APU_PVCC 49 EN @EMI@ PR863 4.7_1206_5% 38 EN 37 ISENA1P 36 35 ISENA2P 34 33 VCC 28 27 Pull high at HW side 50 UGATE PR812 910_0402_1% 68U_25V_M TONSETA PGOODA SET2 ISENA1N PWMA2 ISENA2N BOOTA1 SET1 LGATE2 S2 PC817 10U_0805_25V6K UGATEA1 OFSA 51 G1 VCC S2 @EMI@ PC842 680P_0603_50V7K OFS PHASE2 S2 D1 @ PR811 0_0402_5% CPU_B+ PC816 10U_0805_25V6K PHASEA1 52 @EMI@ PR828 4.7_1206_5% UGATE2 BOOT2 BOOT2 TONSET PWM3 ISEN2P ISEN2P TONSET ISEN2N ISEN1N ISEN2N ISEN1N APU_VCC ISEN1P ISEN3P ISEN3N ISEN1P FB 10 VSEN LGATEA1 SVT OCP_L 26 SVD IBIAS COMPA 0_0402_5% SET2 25 BOOT1 ISENA2N 24 SET1 SVC ISENA2P OFSA UGATE1 VSENA 23 PHASE1 PWROK FBA OFS VDDIO 100K_0402_1% PR827 35,7 PC823 0.1U_0402_25V6 PH802 100K_0402_1%_B25/50 4250K 0_0402_5% @ PR818 @ PR817 6.04K_0402_1% PR816 1 18K_0402_1% PC822 0.1U_0402_25V6 PR825 12.7K_0402_1% PR824 2 22 LGATE1 COMPA 21 APU_SVT PVCC IMONA 32 APU_SVD V064 31 20 GND LGATE2 FBA APU_SVC IMON IBIAS 19 PR822 12K_0402_1% 2 19.6K_0402_1% PR815 1 PH801 100K_0402_1%_B25/50 4250K B VREF 18 APU_PWRGD PR821 6.8K_0402_1% 16 17 UGATE_NB2 @ PR849 0_0603_5% D ISENA1P PQ802 APU_VCC 53 ISENA1N MAX 14mohm 3.3mohm PC808 1U_0402_16V7K layour area not enough, chang H and L mos to Dual N MOS 2013/10/19 PU802 PHASE2 30 VREF PC812 IMONA 1U_0402_6.3V6K+1.5VS VDDIO 11 12 13 C FB COMP 15 PU801 RT8880BGQW_WQFN52_6X6 RGND 29 IMON 100K_0402_1% COMP PC807 68P_0402_50V8J APU_CORE_NB TDC 27A Peak Current 40 A OCP current > 48A Load line -2.1mV/A FSW=450kHz DCR 1.4mohm +/-5% TYP H/S Rds(on) :11.7mohm , L/S Rds(on) :2.7mohm , CPU_B+ PR810 2.61K_0402_1% @EMI@ PC824 680P_0603_50V7K PR808 2.2U_0603_10V7K PR807 105K_0402_1% 14 PL802 0.36UH_PDME064T-R36MS_24A_20% +APU_CORE_NB LGATE_NB1 AON6932A_DFN5X6-8-7 layour area not enough, chang H and L mos to Dual N MOS 2013/10/19 PC809 470P_0402_50V8J 20,7 PHASE_NB1 UGATE2 PR806 10K_0402_1% BOOT_NB1-1 G2 0.22U_0603_25V7K PGOOD @ PC805 330P_0402_50V7K PC806 S1/D2 39 2K_0402_1% @ PR804 2 D PR805 2.2_0603_1% BOOT_NB1 RT8880A_V1B.mdd for SW portion @ PC803 680P_0402_50V7K +APU_CORE S2 @EMI@ PC810 @EMI@ PR809 2 PR803 S2 G1 B+ @EMI@ PL806 HCB2012KF-121T50_0805 680P_0603_50V7K PR802 D1 RT8880A_V1A.mdd for IC portion PC814 10_0402_5% 2 10_0402_5% UGATE_NB1 S2 @ PR801 0_0603_5% Module model information PC802 0.01U_0402_50V7K PC801 10U_0805_25V6K APU_VDD_SEN_H PC813 2.2U_0603_10V7K APU_VDD_SEN_L PQ801 45,7 PC804 10U_0805_25V6K EMI@ PL801 HCB2012KF-121T50_0805 Compal Electronics, Inc +CPU_COREP/+CPU_CORE_NB THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.3 Z5WAK Date: Wednesday, February 12, 2014 Sheet 45 of 53 A + + PC923 330U_D2_2VM_R9M + PC924 330U_D2_2VM_R9M 1 PC921 180P_0402_50V8J PC920 180P_0402_50V8J PC919 180P_0402_50V8J APU_CORE 330uF*3 22uF*13+0.22uF*2 0.01uF*3+180pF*3 B Security Classification Issued Date 2012/10/15 + + Deciphered Date + 2013/10/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Compal Secret Data Title Size Date: PC949 180P_0402_50V8J PC948 180P_0402_50V8J PC942 22U_0603_6.3V6M PC941 22U_0603_6.3V6M W ednesday, February 12, 2014 Sheet PC940 22U_0603_6.3V6M 2 PC939 22U_0603_6.3V6M PC938 22U_0603_6.3V6M PC937 22U_0603_6.3V6M PC936 22U_0603_6.3V6M PC935 22U_0603_6.3V6M PC934 22U_0603_6.3V6M PC933 22U_0603_6.3V6M PC932 22U_0603_6.3V6M PC931 22U_0603_6.3V6M PC910 22U_0603_6.3V6M PC909 22U_0603_6.3V6M PC908 22U_0603_6.3V6M PC907 22U_0603_6.3V6M PC906 22U_0603_6.3V6M PC905 22U_0603_6.3V6M PC947 180P_0402_50V8J PC946 180P_0402_50V8J PC945 0.22U_0402_10V6K PC944 0.22U_0402_10V6K PC943 0.22U_0402_10V6K PC903 22U_0603_6.3V6M PC913 22U_0603_6.3V6M PC904 22U_0603_6.3V6M PC902 22U_0603_6.3V6M PC912 22U_0603_6.3V6M D PC952 330U_D2_2VM_R9M PC918 0.01U_0402_25V7K PC915 0.22U_0402_10V6K PC901 22U_0603_6.3V6M PC911 22U_0603_6.3V6M +APU_CORE PC951 330U_D2_2VM_R9M PC917 0.01U_0402_25V7K PC914 0.22U_0402_10V6K PC950 330U_D2_2VM_R9M PC916 0.01U_0402_25V7K C PC922 330U_D2_2VM_R9M +APU_CORE +APU_CORE_NB +APU_CORE_NB D APU_CORENB 330uF*3 22uF*12+0.22uF*3 180pF*4 C B +APU_CORE A Compal Electronics, Inc Document Number Processor Decoupling VS50_AMD 46 of 53 Rev 0.3 Module model information TPS51212_V1.mdd for Single layer TPS51212_V2.mdd for Dual layer D VGA@ PC1007 1U_0603_6.3V6M L/S Rds(on): 13.5mohm(Typ), 16.5mohm(Max) Idsm: 12A@Ta=25C, 9.5A@Ta=70C @VGA@ PC1005 10U_0805_25V6K VGA@ PC1004 10U_0805_25V6K VGA_EMI@ PC1003 2200P_0402_50V7K 1 C VGA@ PC1009 330U_2.5V_ESR17M_6.3X4.5 TPS51212DSCR_SON10_3X3 @VGA_EMI@ PR1005 4.7_1206_5% LG_+1.5VSDGPUP 11 +1.5VSDGPUP PC1010 @VGA_EMI@ 680P_0402_50V7K VGA@ PR1006 470K_0402_1% TP +5VALW VGA@ PQ1002 AON7506_DFN33-8-5 DRVL SW _+1.5VSDGPUP + ESR=17m ohm PC1009 from SF000002Z00 change to common part SF000006S00 2013/10/23 VGA@ PR1007 11.5K_0402_1% VGA@ PR1008 10K_0402_1% Choke: 7x7x3 Rdc=15.5mohm +/-15% B @VGA@ PJ1001 2 +1.5VSDGPUP +1.5VSDGPU JUMP_43X118 @VGA@ PJ1002 2 +1.2V +1.05V +1.5V Switching Frequency: 290kHz Imax=8A OCP~10.5A OVP: 120%~130% VFB=0.704V, Vout=1.207V Switching Frequency: 290kHz Imax=5.4A Ipeak=6.5A Iocp=7.8A OVP: 120%-130% VFB=0.704V, Vout=1.055V Switching Frequency: 290kHz Imax=8A OCP~10.5A OVP: 120%~130% VFB=0.704V, Vout=1.514V Vout VRAM MOSFET: 3x3 DFN H/S Rds(on): 24mohm(Typ), 30mohm(Max) Id: 8.7A@Ta=25C, 7A@Ta=70C B TST PC1002 from SH00000MR00 change to common part SH00000YV00 2013/10/23 VGA@ PL1002 2.2UH_7.8A_20%_7X7X3_M 290 340 380 430 V5IN @VGA_EMI@ PC1002 0.1U_0402_25V6 VGA@ PQ1001 AON7408L_DFN8-5 Frequency(KHz) 470 200 100 39 SW VFB UG_+1.5VSDGPUP B+ Resistance(KΩ) RF_+1.5VSDGPUP EN 10 C @VGA@ PC1006 0.1U_0402_16V7K FB_+1.5VSDGPUP DRVH EN_+1.5VSDGPUP VBST TRIP VGA_PG PGOOD 22,37,48,49 VGA@ PR1003 105K_0402_1% 2TRIP_+1.5VSDGPUP2 @VGA@ PR1004 0_0402_5% VGA@ PR1001 VGA@ PC1001 2.2_0603_5% 0.1U_0603_25V7K 2 BST_+1.5VSDGPUP VGA@ PU1001 D VGA_EMI@ PL1001 HCB2012KF-121T50_0805 +1.5VSDGPUP_B+ JUMP_43X118 PR1007 PR1008 PR1003 +1.2V 7.15K 10k 105K +1.05V 4.99k 10k 93.1k +1.5V 11.5K 10k 105K A A Compal Secret Data Security Classification 2011/07/29 Issued Date Title Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Compal Electronics, Inc 1.5VSDGPUP Size Date: Document Number W ednesday, February 12, 2014 Rev 0.3 Sheet 47 of 53 Module model information D D SY8033_V1.mdd @VGA@ PJ1102 JUMP_43X79 2 +0.95VSDGPUP +0.95VSDGPU FB=0.6V Note:Iload(max)=3.5A PC1101 from SH00000MN00 change to common part SH00000YG00 2013/10/23 Note: When design Vin=5V, please stuff snubber to prevent Vin damage B Rdown 2 FB_0.95V VGA@ PC1104 22U_0603_6.3V6M SY8033BDBC_DFN10_3X3 VGA@ PR1103 6.04K_0402_1% VGA@ PC1103 22U_0603_6.3V6M NC NC TP VGA@ PR1105 1M_0402_5% HW request Add PR1107, and unpop PR1104 11 VGA@ PR1107 0_0402_5% VGA_PG @VGA@ PR1104 0_0402_5% 2+0.95V_ON 22,37,47,49 VGA_ON_R VGA@ PC1105 0.1U_0402_16V7K 37,49 FB EN +0.95VSDGPUP Rup VGA@ PC1102 68P_0402_50V8J SVIN LX VGA@ PL1101 1UH_2.8A_30%_4X4X2_F PVIN LX_0.95V C VGA@ PR1106 10K_0402_1% VGA@ PC1101 22U_0603_6.3V6M LX 1 PVIN 10 PG @VGA@ PJ1101 JUMP_43X79 2 +3VALW @VGA_EMI@ PR1102 4.7_0603_5% VGA@ PU1101 @VGA_EMI@ PC1106 680P_0402_50V7K C Vout=0.6V* (1+Rup/Rdown) B A A Compal Secret Data Security Classification 2013/01/02 Issued Date Deciphered Date 2013/10/01 Title Compal Electronics, Inc 0.95VSDGPU THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Rev 0.3 Sheet W ednesday, February 12, 2014 48 of 53 A B GPIO21 GPIO30 GPIO20 GPIO15 VID5 VID4 VID3 VID2 VID1 1 1 1.125V 0 0 1.100V 0 1.075V 0 1.050V 0 1 1.025V 1 0 1.000V 1 0.975V 1 0.950V 1 1 Remark: PWM3 (Pin24) tie to 5V & CLK# (Pin40) external pull high => phase CPU VR config PWM3 (Pin24) tie to 5V & CLK# (Pin40) tie to GND or floating => phase GPU VR config When Phase GPU config a DPSLPVR (Pin39)=0 PSI# (Pin2)=0 =>1 phase CCM operation mode b DPSLPVR (Pin39)=0 PSI# (Pin2)=1 =>2 phase CCM operation mode c DPSLPVR (Pin39)=1 PSI# (Pin2)=0 or =>1 phase DE operation mode 0 0.900V 0 0.875V 1 0.850V 1 1 0.825V 1 0 0.800V 1 1 0.775V MARS XT MARS PRO MARS LP VDDC 0.775~1.175V 0.775~1.125V 0.775~1.050V TDC 32A (TDC) 25A (TDC) 21A (TDC) EDC 48A 37.5A 31.5A 26A 24A OCP 57.6A 45A 37.8A 31.2A Vboot 0.85V 0.85V 0.85V 0.85V Load line 1mohm 1mohm 1mohm 1.13K Ohm 887 Ohm SUN PRO SUN XT NA 0.775~1.000V 0.775~1.125V 0.800~1.075V 0.800~1.150V NA 17A (TDC) 16A (TDC) 19A (TDC) 25A (TDC) NA 28.5A 37.5A NA 28.8A 34.2A 45A NA 0.9V 0.9V 0.9V NA - - - 1mohm NA 750 Ohm - - - 887 Ohm 1.43K Ohm 1.13K Ohm 953 Ohm - - - 1.13K Ohm for LoadLine Setting 147K Ohm 124K Ohm - - - 147K Ohm for Compensation PR1236 51.1K Ohm 51.1K Ohm 51.1K Ohm - - - 51.1K Ohm for Positive offset PC1205 VGA@ 10U_0805_25V6K Module model information: ISL62883C_V1A for IC ISL62883C_V1B for SW Choke/MOS on BTN ISL62883C_V2B for SW Choke on BTN, MOS on TOP VGA@ PR1248 976_0402_1% VGA@ PR1247 10_0402_1% ISEN1_VGA +VGA_CORE TDC 28A Peak Current 40 A OCP current > 48A Load line 1mohm FSW=400kHz DCR 0.98mohm +/-5% TYP H/S Rds(on) :11.7mohm , L/S Rds(on) :2.6mohm , VGA@ PC1218 10U_0805_25V6K VGA@ PC1217 10U_0805_25V6K VSUM+_VGA ISEN1_VGA Ri +VGA_CORE ISEN2_VGA VSUM-_VGA Rdroop=Io*LL/Idroop VGA@ PC1234 1U_0402_16V7K Layout Note: PH1202 should place near Phase1 Choke Compal Secret Data Security Classification Issued Date 2013/01/03 Deciphered Date 2013/10/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: B MAX 14.5mohm 3.2mohm VSUM-_VGA PH1202 from SL200000W00 change to common part SL200002F00 2013/10/23 A PR1242 1_0402_1% VGA@ PR1241 10K_0402_1% 1 VGA@ PR1239 3.65K_0402_1% @VGA_EMI@ PR1238 4.7_1206_5% SNUB1_VGA @VGA_EMI@ PC1229 680P_0603_50V7K Transient response : Rntcnet=(Rntcs+Rntc)*Rp/(Rntcs+Rntc+Rp) Cn=L*(Rntcnet+Rsum/N)/[Rntcnet*DCR*(Rsum/N)] N is the number of phases Rntc VSUM-_VGA VGA@ PL1203 0.22UH_PCME064T-R22MS_28A_20% Rntcs VGA@ PH1202 10K_0402_1%_B25/50 3370K VGA@ PR1224 1_0402_1% VGA@ PR1222 10K_0402_1% VGA@ PR1221 3.65K_0402_1% VSUM+_VGA ISEN2_VGA 1NTC_VGA 2 VGA@ PR1245 11K_0402_1% VGA@ PC1232 0.033U_0402_16V7K 2 0_0402_5% VGA@ PC1231 0.15U_0603_16V7K 1 2 VGA@ PC1233 1000P_0402_50V7K @VGA@ PC1230 330P_0402_50V7K Rp VGA@ PR1244 2.61K_0402_1% Cn +VGA_CORE Ro VGA@ PR1240 10K_0402_1% 2 BOOT1_1_VGA PR1235 VGA@ PC1220 2.2_0603_5% 0.22U_0603_25V7K LGATE1_VGA VSUM+_VGA VGA@ PC1228 1000P_0402_50V7K @VGA@ PR1246 VGA@ PQ1202 AON6554_DFN5X6-8-5 VGA@ @VGA@ PR1243 C Rsum PHASE1_VGA VGA@ PR1237 10_0402_1% 0_0402_5% @VGA_EMI@ PC1210 @VGA_EMI@ PR1219 680P_0603_50V7K 4.7_1206_5% 2 SNUB2_VGA 1 UGATE1_VGA PR1230 Pop: for Loadline disable PR1230 @: for Loadline enable and LL=1mohm +5VS @VGA@ PR1232 0_0603_5% VGA@ PQ1203 AON6552_DFN5X6-8-5 +5VS VGA@ PQ1204 AON6554_DFN5X6-8-5 VGA@ PC1223 1U_0603_10V6K 2 2 @VGA@ PR1230 10K_0402_1% +VGA_B+ VGA@ PR1234 1_0402_5% 1 2 VGA@ PC1221 0.22U_0402_16V7K VGA@ PR1236 51.1K_0402_1% +VGA_B+ VSUM-_VGA +VGA_CORE ISL62883CHRTZ-T_TQFN40_5X5 VGA@ @VGA@ PR12310_0402_5% B+ VGA@ PL1202 0.22UH_PCME064T-R22MS_28A_20% +5VS VIN_VGA ISEN2_VGA for positive offset VGA@ VGA@ PC1206 0.22U_0603_25V7K GPU_VID_0 11 12 13 14 15 16 17 18 19 20 VSEN_VGA Rdroop ISEN1_VGA 30 29 28 27 26 25 24 23 22 21 BOOT1_VGA VGA@ PR1229 1.24K_0402_1% PL1201 HCB2012KF-121T50_0805 VGA@ PR1223 10K_0402_1% VGA@ PR1217 2.2_0603_5% BOOT2_VGA BOOT2_2_VGA PC1204 VGA@ 10U_0805_25V6K @VGA@ PR1216 0_0603_5% UGATE2_VGA VGA_EMI@ PC1203 2200P_0402_50V7K 10K_0402_1% VGA@ PR1212 GPU_VID_1 @VGA_EMI@ PC1202 0.1U_0402_25V6 10K_0402_1% VGA@ PR1211 GPU_VID_2 10K_0402_1% VGA@ PR1210 GPU_VID_3 VGA_EMI@ VGA@ PC1213 1U_0603_10V6K AGND VGA@ PR1228 VGA@ PC1215 499_0402_1% 390P_0402_50V7K 2FB1_VGA VGA@ PC1219 VGA@ PR1233 150P_0402_50V8J 147K_0402_1% 2FB2_VGA1 VSS_GPU_SENSE Choke: 0.22uH (Size:7*7*4) Rdc=0.98mohm +-5% Heat Rating Current=28A Saturation Current=28A VGA@ PQ1201 AON6552_DFN5X6-8-5 10K_0402_1% @VGA@ PR1209 GPU_VID_4 +VGA_B+ 10K_0402_1% @VGA@ PR1208 GPU_VID_5 GPU_VID_1 @VGA@ PC1235 1U_0402_16V7K 14 10K_0402_1% GPU_VID_2 10K_0402_1% @VGA@ PR1206 GPU_VID_1 14 10K_0402_1% @VGA@ PR1205 GPU_VID_2 14 10K_0402_1% @VGA@ PR1204 GPU_VID_3 GPU_VID_3 10K_0402_1% VGA@ PR1203 GPU_VID_4 Vboot regulation VDD_VGA VGA@ PC1214 1000P_0402_50V7K 41 BOOT2 UGATE2 PHASE2 VSSP2 LGATE2 VCCP PWM3 LGATE1 VSSP1 PHASE1 PGOOD PSI# RBIAS VR_TT# NTC VW COMP FB ISEN3 ISEN2 RTN_VGA ISUM-_VGA VGA@ PC1211 22P_0402_50V8J VGA@ PC1216 33P_0402_50V8J 16 for OCP and LoadLine Setting 187K Ohm VGA@ PC1212 1U_0603_10V6K COMP_VGA FB_VGA 2ISEN3_VGA 10 VGA@ PC1224 0.22U_0603_25V7K VW_VGA VCC_GPU_SENSE L-side MOS:TPCA8057 Rds(on): 2.0mohm@Vgs=10V 2.6~3.2mohm@Vgs=4.5V Id :42A@Ta=25 degC Rdroop PR1229 PU1201 2 H-side MOS:TPCA8065 Rds(on): 9.4mohm@Vgs=10V 11.7mohm@Vgs=4.5V Id :16A@Ta=25 degC PR1233 40 39 38 37 36 35 34 33 32 31 VGA@ PR1225 100K_0402_5% VGA@ PR1226 6.98K_0402_1% PH1201 16 Description SUN UL LGATE2_VGA CLK_EN# DPRSLPVR VR_ON VID6 VID5 VID4 VID3 VID2 VID1 VID0 +3VSDGPU VGA@ PR1220 147K_0402_1% 470K_0402_5%_B25/50 4700K VGA@ PR1227 5.9K_0402_1% MARS XTX ISEN1 VSEN RTN ISUMISUM+ VDD VIN IMON BOOT1 UGATE1 Rbias RthVGA@ AMD SUN series GPU Ri PR1248 VRON_VGA GPU_VID6 VGA@ PR1218 100K_0402_5% +3VSDGPU Layout Note: PH1201 should place near phase1 H-side MOS Rfset Vboot E UL: DDR3 Pro/XT/XTX: GDDR5 PHASE2_VGA PH1201 from SL200000J00 change to common part SL200002E00 2013/10/23 14 14 VGA_PG GPU_VID_4 22,37,47,48 Switching frequency set : Rfset(kohm)=[period(us)-0.29]*2.65 =5.9Kohm fsw=1/period(us)=400KHZ PSI#_VGA Recovery T 96C +-3 VGA@ PC1222 0.22U_0402_16V7K Recovery T 105C +-3 @VGA@ PR1215 1.91K_0402_1% +3VSDGPU RBIAS_VGA protect T 100C +-3 GPU_VID_5 VGA@ PR1214 2DPRSLPVR_VGA-1 VGA@ PR1202 GPU_VID_5 +3VSDGPU VGA@ PC1201 1U_0402_16V7K VGA_ON_R PR1226=1.5K protect T 110C +-3 0.925V 10K_0402_1% PR1226=6.98K AMD MARS series VDDC @VGA@ PR1201 0_0402_5% Thermal throttling: Protect: (6.98K+Rth)*60uA=1.2V => Rth=13.02K =>Tp=110C (+-3C) Recovery:(6.98K+Rth)*56uA=1.24V => Rth=15.16K => Tr=105C (+-3C) 14 GPU_DPRSLPVR D LP: DDR3 Pro/XT/XTX: GDDR5 Remark: MARS LP/ SUN UL/ SUN PRO don't use this 2-phase solution Rbias=147K =>overshoot reduction function disable Rbias=47k =>overshoot reduction function enable 37,48 C GPIO29 D Compal Electronics, Inc VGA_CORE Document Number Rev 0.3 Wednesday, February 12, 2014 E Sheet 49 of 53 VGA@ PC1331 2.2U_0402_6.3V6M VGA@ PC1332 10U_0402_6.3V6M VGA@ PC1342 22U_0603_6.3V6M VGA@ PC1343 22U_0603_6.3V6M VGA@ PC1326 560U_2.5V_M + Issued Date + @VGA@ PC1327 330U_X_2VM_R6M VGA@ PC1338 10U_0402_6.3V6M VGA@ PC1325 560U_2.5V_M VGA@ PC1337 10U_0402_6.3V6M VGA@ PC1314 10U_0402_6.3V6M VGA@ PC1324 2.2U_0402_6.3V6M + VGA@ PC1336 10U_0402_6.3V6M VGA@ PC1313 2.2U_0402_6.3V6M VGA@ PC1323 10U_0402_6.3V6M VGA@ PC1318 10U_0402_6.3V6M VGA@ PC1317 2.2U_0402_6.3V6M VGA@ PC1316 2.2U_0402_6.3V6M VGA@ PC1315 2.2U_0402_6.3V6M VGA@ PC1312 10U_0402_6.3V6M VGA@ PC1322 10U_0402_6.3V6M 1 VGA@ PC1335 2.2U_0402_6.3V6M VGA@ PC1334 10U_0402_6.3V6M VGA@ PC1311 10U_0402_6.3V6M VGA@ PC1321 2.2U_0402_6.3V6M 1 VGA@ PC1310 2.2U_0402_6.3V6M 2 VGA@ PC1320 2.2U_0402_6.3V6M 1 VGA@ PC1309 10U_0402_6.3V6M 2 C VGA@ PC1319 2.2U_0402_6.3V6M 1 VGA@ PC1308 2.2U_0402_6.3V6M VGA@ PC1307 10U_0402_6.3V6M VGA@ PC1306 2.2U_0402_6.3V6M VGA@ PC1305 10U_0402_6.3V6M VGA@ PC1304 2.2U_0402_6.3V6M VGA@ PC1303 10U_0402_6.3V6M VGA@ PC1302 10U_0402_6.3V6M VGA@ PC1301 2.2U_0402_6.3V6M 2 D VGA@ PC1333 10U_0402_6.3V6M VGA@ PC1330 2.2U_0402_6.3V6M VGA@ PC1341 22U_0603_6.3V6M 1 VGA@ PC1329 10U_0402_6.3V6M 2 VGA@ PC1340 22U_0603_6.3V6M 1 VGA@ PC1328 10U_0402_6.3V6M 2 B VGA@ PC1339 22U_0603_6.3V6M +VGA_CORE +VGA_CORE Security Classification 2011/06/24 Deciphered Date 2013/10/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC AMD MARS GPU_CORE 560uF*2+330uF*1 10uF*11+2.2uF*13 D C AMD MARS meet ripple 22uF*5+10uF*8+2.2uF*3 B A A Compal Secret Data Title Compal Electronics, Inc Size Document Number Custom VGA_CORE CAP Date: Wednesday, February 12, 2014 Rev 0.3 Sheet 50 of 53 Version change list (P.I.R List) Item D layout area not enought EMI bead "HCB2012KF-121T50_0805" derating 5A, need 2pcs for APU_CORE and APU_CORENB RT8880A FAE review HW: EC share ROM, modify 3VALW and 1.1VALW enable net-name Choke, OS-CON cap, Thermistor change to standard part C B Page of for PWR Reason for change Fixed Issue Rev PG# Modify List Date Phase PQ801;PQ803;PQ807;PQ808 FDMS7698 and PQ802;PQ804;PQ806;PQ809 MDU1511 APU_CORE change to Dual N AON6932A 10/09 EVT Add PL806 EMI bead "HCB2012KF-121T50_0805" from 1pcs to 2pcs at B+, APU_CORE for APU_CORE and APU_CORENB APU_CORE PR813 from 0402 change to 0603, delete PR844, PR847 3VALW change 3VALW enable net name from 3V5V_EN to 3V_EN 5VALW change 1.1VALW enable net name from SUSP# to 1.1V_EN 10/15 EVT 10/16 EVT 10/17 EVT 10/23 EVT D RT8880A vendor EOL, change to RT8880B CPU_CORE IC from RT8880A SA000066V00 change to APU_CORE RT8880B SA000066V10 10/23 EVT Battery connector BATT+ bead, 1pcs for UMA, 2pcs for DIS BATT CONN 10/28 EVT 22U_0603_6.3V6M cheaper than 47U_0603_6.3V6M +1.05VS PC609, PC610 and PC709, PC710 from +1.1VALW 47U_0603_6.3V6M change to 22U_0603_6.3V6M 10/30 EVT HW request Add PR1107, and unpop PR1104, VGA_PG is default setting for VGA sequence control +0.95V Add location PR1107 0_0402_5%, and unpop PR1104 0_0402_5% 10/31 EVT 10 HW request add RC at 3VALW enable +3VALW Add PR413 0_0402_5%, and PC428 0.1U_0402_10V7K _ un-pop 10/31 EVT 11 adjust 1.05V output voltage change PR607 from 100K ohm to 15.4K ohm, +1.05VSP change PR609 from 133K ohm to 20K ohm, change 1.05V output from 1.05V to 1.062V 12/02 DVT 12 adjust 1.8VSP output voltage +1.8VSP 12/10 DVT 13 adjust 1.1VALW output voltage change PR709 from 118K ohm to 115K ohm, +1.1VALW change 1.1VALW output from 1.108V to 1.121V 12/10 DVT 14 Part count reduce 15 adjust VGA Vboot voltage 16 reserve PD801 17 delete VCIN0 and VCIN1 hysteresis 18 ABO request BI pin short to GND 19 65W and 40W VCIN0 set at the same voltage active and recovery Add PL202 HCB2012KF-121T50_0805 for DIS only VGA CPU_CORE change PR723 from 20K ohm to 20.5K ohm, change 1.05V output from 1.8V to 1.83V B change enable resistor PR413, PR602, PR702, PR724 from ohm to R-Short, change EMI High side and Low side resistor PR308, PR407, PR605, PR705, PR801, PR820, PR849, PR860, PR1216, PR1232 from ohm to R-Short 12/10 DVT change PR1205 from pop to un-pop, change PR1211 from un-pop to pop 12/13 DVT reserve PD801 for AMD CPU lekage voltage from APU_SVD 12/13 DVT 12/24 DVT 12/26 DVT MEMO 12/26 DVT MEMO change change change change OTP C PR216 PR227 PR202 PR223 from from from from 22.6K to 16K, 26.1K to un-pop, UMA/10.5K and DIS/11.3K to 10K, UMA/162K and DIS/100K to un-pop BATT CONN change PR210 from 1k to ohm A A OTP change UMA SKU PR203 from 10K to 44.2K Add PC426 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 2013/10/01 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PWR_PIR1 Rev 0.3 Z5WAK Date: Wednesday, February 12, 2014 Sheet 51 of 53 Version change list (P.I.R List) Item Page of for PWR Reason for change Fixed Issue back to back damage, change to low Rds(on) Mos 20 Rev PG# Modify List 0.3 Charger Date PQ303, PQ304 change from AON4466 to AON4406 Phase PVT 01/08 D D 21 delete PD401 cost down 0.3 3VALW/ 5VALW 22 change PD801 to low Vf diode 0.3 CPU_CORE change PD301 to R-short PR415 01/08 PVT change PD801 from RB751V-40_SOD323-2 to RB491D_SOT23-3 01/20 PVT 23 C C B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 2013/10/01 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PWR_PIR2 Rev 0.3 Z5WAK Date: Wednesday, February 12, 2014 Sheet 52 of 53 A B C D E 1 2 3 4 2012/07/10 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/10/01 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PIR-HW Rev 0.3 Z5WAK Date: C D Sheet Wednesday, February 12, 2014 E 53 of 53 ... 10U _06 03_ 6.3V6M C 100 7 10U _06 03_ 6.3V6M C 1 03 4 10U _06 03_ 6.3V6M 2 C 1 03 3 10U _06 03_ 6.3V6M C 1 03 2 10U _06 03_ 6.3V6M VGA@ C 1 03 1 10U _06 03_ 6.3V6M VGA@ VGA@ VGA@ C 100 6 10U _06 03_ 6.3V6M VGA@ C 100 0 1U _04 02_6.3V6K... 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 180P _04 02_50V8J 180P _04 02_50V8J 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 0. 22U _04 02_10V4Z 4.7U _06 03_ 6.3V6K 4.7U _06 03_ 6.3V6K... 100 0P _04 02_50V7K 20mil SPK_R+ SPK_RSPK_L+ SPK_L- 0_ 0 6 03 _5% C 606 JSPK1 40mil 0_ 0 6 03 _5% 0_ 0 6 03 _5% 0_ 0 6 03 _5% 0_ 0 6 03 _5% 100 0P _04 02_50V7K R1 13 RS@ 0_ 0 6 03 _5% +3VS +VDDA 2 2 100 0P _04 02_50V7K 0. 1U _04 02_16V4Z +3VS_DVDD