5 M50Vm Montevina Block Diagram Penryn D D FAN + SENSOR CPU VCORE PAGE 50 PAGE 3,4,5 SYSTEM PWR PAGE 80 PAGE 81 VGA Daughter BD BAT & CHARGER CLOCK GEN ICS/9LPR363 FSB 1066MHz VGA VCORE PAGE 88 PAGE 29 Other PWR PAGE 82, 83, 84, 85, 90, 91, 92, 93, 94 HDMI Nvidia NB9P-GE2 NB9M-GS2 PAGE 48 CRT & TV OUT PAGE 45,47 LVDS & INV DDR2 667/800MHz (G)MCH Cantiga PCI-E x16 Dual Channel DDR2 SO-DIMM x2 PAGE 7,8,9 1394 PAGE 42 IEEE1394 RICOH R5C833 PAGE 10,11,12,13,14,15 PAGE 46 C PAGE 67 C PAGE 40,41 CARD READER DMI Interface PAGE 42 10/100/1000 LAN PHY RealTek RTL8111C PCI 33MHz PAGE 33 LPC 33MHz ICH9-M Azalia MINICARD Robson LCI/GLCI DC Daughter BD MINICARD Shirley/ Echo Peak PCI-E INTERNAL KEYBOARD PAGE 20,21,22,23,24 EC ITE/IT8512 PAGE 31 BIOS SPI ROM PAGE 53 DC_IN, RJ11 PAGE 53 PAGE 60 PAGE 30,31 PAGE 31 ITPM B B NewCard/DebugCard MIC IN Azalia Codec Realtek/ALC663 PAGE 38 USB PAGE 37 SATA PAGE 43,44 HP_OUT PAGE 36, 37, 38, 39 SPDIF _OUT USB 2.0 CON x4 PAGE 37 PAGE 52 Azalia MDC Header TP Daughter BD Fingerprint PAGE 35 Camera USB SATA ODD Touchpad, Fingerprint Touchpad PAGE 46 PAGE 51 A A LED Board PAGE 56 SATA HDD PAGE 51 INSTANT KEY CON PAGE 56 ESATA CON Touchpad Daughter BD PAGE 66 Title : Block Diagram Fingerprint ASUSTeK COMPUTER INC NB4 PAGE 56 Bluetooth Size Custom Engineer: Jace_Kuo Project Name Rev M50Vm 1.0 Date: Tuesday, April 15, 2008 Sheet 1 of 96 A B C D E M50V Schematic Index Page 01 02 03-05 07-09 10-15 20-24 25 29 30-31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 50 51 52 53 54 55 56 57 58 60 61 62 65 66 68 80 81 82 83 84 85 88 90 91 92 93 94 System page Ref Block Diagram Schematic Information CPU-Penryn DDR II SO-DIMM Cantiga ICH9M SPI ROM CLK-ICS9LPR363CGLF-T EC_IT8752 POWER-ON SEQUENCE PCI-E LAN-RTL8111C RJ45 MDC CODEC-ALC663 AUDIO_AMP-G1431 FM2010 DSP CARDBUS R5C833(PCI I/F) CARDBUS R5C833(1394 & SD) IN1 CON NewCard PWR SW & CON Debug CRT LVDS & INVERTER CONNECTOR TV OUT CONN THER SENSOR & FAN HDD & CDROM USB Port x MINICARD(Ebron/Robson/3G) PORT Docking Super I/O & FIR LED/TP/SW DISCHARGE UMB DC power jack, Batter conn Blue Tooth TPM MDC NUT & Hinksink NUT E-SATA XDP POWER_VCORE POWER_SYSTEM POWER_I/O_1.5V & 1.05VM POWER_I/O_DDR & VTT POWER_I/O_+3VM&+2.5VS&+1.25VM NONE POWER_CHARGER POWER_DETECT POWER_LOAD SWITCH POWER_PROTECT POWER_SIGNAL POWER_FLOWCHART ICH9-M GPIO GPIO 00 GPIO 01 GPIO [2:5] GPIO 06 GPIO 07 GPIO 08 GPIO 09 GPIO 10 GPIO 11 GPIO 12 GPIO 13 GPIO 14 GPIO 15 GPIO 16 GPIO 17 GPIO 18 GPIO 19 GPIO 20 GPIO 21 GPIO 22 GPIO 23 GPIO 24 GPIO 25 GPIO 26 GPIO 27 GPIO 28 GPIO 29 GPIO 30 GPIO 31 GPIO 32 GPIO 33 GPIO 34 GPIO 35 GPIO 36 GPIO 37 GPIO 38 GPIO 39 GPIO 40 GPIO 41 GPIO 42 GPIO 43 GPIO 44 GPIO 45 GPIO 46 GPIO 47 GPIO 48 GPIO 49 GPIO 50 GPIO 51 GPIO 52 GPIO 53 GPIO 54 GPIO 55 GPIO 56 GPIO 57 GPIO 58 GPIO 59 GPIO 60 Use As GPI GPI GPI GPI GPI GPI GPI GPI GPI GPO GPI GPI Native Native GPI GPO GPI GPO GPI GPI Native GPO Native Native GPO GPO Native Native Native GPO GPO GPO GPO GPI GPI GPI GPI Native Native Native Native Native Native Native Native GPI GPO Native Native Native Native Native Native GPI GPI Native Native Signal Name PM_SYNC# PCI_INT[E:H]# SIO_SMI# WLAN_LED_ON EXT_SMI# LAN_WOL_EN SUSPWR_ACK EXT_SCI# AC_PRESENT STP_PCI# PM_DPRSLPVR WLAN_ON# PD_RST# LPC_DRQ1# PD_EN STP_CPU# PM_S4_STATE# BT_ON CB_SD# USB_OC#5 USB_OC#6 USB_OC#7 PM_CLKRUN# EMAIL_LED# PCB_ID0 PCB_ID1 PCB_ID2 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC8# USB_OC9# USB_OC10# USB_OC11# HDTV_EN# PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 SPI_CS#1 USB_OC0# Power +3VS +3VS +3VS +3VS +3VS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VSUS +3VSUS +3VSUS +3VSUS N/A N/A N/A N/A +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VSUS +3VSUS +3VSUS +3VSUS +3VSUS EC GPIO Use As GPA0 GPA1 GPA2 GPA3 GPA4 GPA5 GPA6 GPA7 GPB0 GPB1 GPB2 GPB3 GPB4 GPB5 GPB6 GPB7 GPC0 GPC1 GPC2 GPC3 GPC4 GPC5 GPC6 GPC7 GPD0 GPD1 GPD2 GPD3 GPD4 GPD5 GPD6 GPD7 GPE0 GPE1 GPE2 GPE3 GPE4 GPE5 GPE6 GPE7 GPF0 GPF1 GPF2 GPF3 GPF4 GPF5 GPF6 GPF7 GPG0 GPG1 GPG2 - GPO GPO GPO GPO GPO GPO GPO GPO GPO GPI ALT ALT OD OD GPO GPI ALT ALT GPO ALT GPO ALT GPO GPI ALT ALT OD OD GPO ALT GPI GPO GPO GPO GPO ALT ALT GPI GPO GPI GPI ALT ALT ALT ALT GPO GPO GPI ALT GPO - Signal Name Power PWR_LED_UP# CHG_LED_UP# BATSEL_3S# LCD_BL_PWM FAN0_PWM BAT1_CNT1# BAT2_CNT1# CHG_EN# PRECHG DISTP# SMB0_CLK SMB0_DAT A20GATE RCIN# PM_RSMRST# MARATHON# SMB1_CLK SMB1_DAT PM_PWRBTN# AC_IN_OC# OP_SD# BAT1_IN_OC# 3G_ON# PWRLIMIT# PM_S4_STATE# BUF_PLT_RST# EXT_SCI# EXT_SMI# LCD_BACKOFF# FAN0_TACH COLOREN# VSUS_ON SUSC_EC# SUSB_EC1# CPU_VRON PWR_SW# BAT2_IN_OC# LID_SW# PM_THERM# BLUETOOTH# WIRELESS# PS2_CLK_5S_PD PS2_DATA_5S_PD TP_CLK TP_DAT THRO_CPU PS_SHDN# INSTANT_ON# PM_SUSB# BAT1_CNT2# - EC GPIO Use As Signal Name GPG6 GPH0 GPH1 GPH2 GPH3 GPH4 GPH5 GPH6 GPI0 GPI1 GPI2 GPI3 GPI4 GPI5 GPI6 GPI7 GPJ0 GPJ1 GPJ2 GPJ3 GPJ4 GPJ5 GPK0 GPK1 GPK2 GPK3 GPK4 GPK5 GPL0 GPL1 GPL2 GPL3 GPL4 GPL5 GPL6 GPL7 GPK6 GPK7 GPO OD ALT ALT GPO GPO GPO GPO GPI GPI GPI GPI GPI GPI GPI GPI GPO GPO GPI GPO GPO GPI GPI GPI GPI GPI GPI GPI GPI GPO GPO GPO GPO GPO GPO GPO GPI BAT2_CNT2# PM_CLKRUN# BAT_LEARN NUM_LED CAP_LED SUS_PWRGD ALL_SYSTEM_PWRGD VRM_PWRGD PWR_MON PD_DET# KB_ID0 KB_ID1 EC_CLK_EN PM_PWROK UNDOCK#_PD BL_DA FAN_DA PM_SLP_M# SUSPWR_ACK PM_SUSC# +3VM_PG C +1.05VM_+3VMCLK_PG LAN_WOL_EN AC_APR_UC# LAN_RST# CL_PWROK EC_WLAN_PWR SLP_M_ON S4_STATE_ON AC_PRESENT PS_CPPE# Title : Schematic Information ASUSTeK COMPUTER INC NB6 Size Engineer: Raphael_Chen Project Name Rev M50Vm 1.1 Date: Wednesday, February 13, 2008 B Custom A Power D Sheet E of 96 10 H_A#[35:3] 10 H_REQ#[4:0] H_D#[63:0] H_D#[63:0] 10 H_A#[35:3] H_REQ#[4:0] T0318 T0319 D D M4 N5 T2 V3 B2 C3 D2 D22 D3 F6 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 HIT# HITM# G6 E4 H_HIT# H_HITM# AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 10 10 10 THERMTRIP# H_PREQ# H_TCK H_TDI H_TDO H_TMS H_TRST# H_DBR# +VCCP_CPU R0315 1KOhm 1% CPU_THRM_DA 50 CPU_THRM_DC 50 C7 H_THRMTRIP# 5,20,32 T0302 BCLK[0] BCLK[1] 10 10 10 C0301 0.1UF/10V @ H_DSTBN#1 H_DSTBP#1 H_DINV#1 A22 A21 R0316 2KOhm 1% CLK_CPU_BCLK 29 CLK_CPU_BCLK# 29 29 29 29 T0313 T0314 1 GTL_REF2 H_TDO_M H_TDI_M +VCCP_CPU SOCKET478B R0335 1KOhm 1% Pin T2 V3 change to QC Thermal Diode detect (THRMDA_2 THRMDC_2) R0301 2KOhm 1% D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]# AD26 C23 D25 C24 AF26 AF1 A26 GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 B22 B23 C21 BSEL[0] BSEL[1] BSEL[2] @ D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]# DSTBN[3]# DSTBP[3]# DINV[3]# AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 MISC COMP[0] COMP[1] COMP[2] COMP[3] R26 U26 AA1 Y1 DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI# E5 B5 D24 D6 D7 AE6 C Comp 0,2: Zo=27.4 Ohm, trace length < 0.5" Comp 1,3: Z0=55 Ohm, trace length < 0.5" H_DSTBN#3 10 H_DSTBP#3 10 H_DINV#3 10 H_COMP0 H_COMP1 H_COMP2 H_COMP3 R0311 R0312 R0313 R0314 1 1 2 2 27.4Ohm 54.9Ohm 27.4Ohm 54.9Ohm 1% 1% 1% 1% H_DPRSTP# 11,20,80 H_DPSLP# 20 H_DPWR# 10 H_PWRGD 20 H_CPUSLP# 10 PM_PSI# 80 DC Default Strapping When Not Used BCLK FSB BSEL2 166 667 L BSEL1 H H 200 800 L H L 266 1067 L L L B BSEL0 +VCCP_CPU 200Ohm @ R0319 +VCCP_CPU +VCCP_CPU H_PREQ# H_TDI H_TDO H_TMS R0302 R0303 R0304 R0305 1 1@ 2 2 54.9Ohm 54.9Ohm 54.9Ohm 54.9Ohm 1% 1% 1% 1% H_DBR# R0306 1@ 1KOhm H_TCK H_TRST# R0307 R0308 1 54.9Ohm 1% 54.9Ohm 1% R0310 68Ohm H_PROCHOT_S# 1% @ +3VS 30,88 PWRLIMIT# D0301 RB751V-40 D Q0301 H2N7002 11 1 C0302 0.1UF/10V @ 1 1 N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24 H_DSTBN#2 10 H_DSTBP#2 10 H_DINV#2 10 SOCKET478B Pin B2 M4 N5 left as NC for QC design (BPM_2# [2] BPM_2#[1] BPM_2[0]) @ CPU_BSEL0 CPU_BSEL1 CPU_BSEL2 Zo=55 Ohm, 0.5" max for GTL_REF T0303 RESERVED B GTL_REF 1% 1KOhm 1% 1KOhm T0304 T0305 T0306 T0307 R0317 @ R0318 @ D21 H_PROCHOT_S# A24 B25 H CLK H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 10 10 THERMAL PROCHOT# THRMDA THRMDC H_DSTBN#0 H_DSTBP#0 H_DINV#0 DATA GRP H_CPURST# 10 H_RS#0 10 H_RS#1 10 H_RS#2 10 H_TRDY# 10 DATA GRP CONTROL C1 F3 F4 G3 G2 STPCLK# LINT0 LINT1 SMI# H_LOCK# 10 RESET# RS[0]# RS[1]# RS[2]# TRDY# D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]# DSTBN[2]# DSTBP[2]# DINV[2]# H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 D5 C6 B4 A3 H4 BPM[0]# BPM[1]# BPM[2]# BPM[3]# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR# +VCCP_CPU 56Ohm 20 D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]# Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22 H_STPCLK# H_INTR H_NMI H_SMI# A20M# FERR# IGNNE# H_INIT# 10 20 20 20 20 T0321 A6 A5 C4 H_BR0# R0309 1 H_A20M# H_FERR# H_IGNNE# F1 D20 H_IERR# B3 LOCK# ICH 20 20 20 T0320 A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]# H_DEFER# 10 H_DRDY# 10 H_DBSY# 10 H_ADSTB#1 REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]# IERR# INIT# H5 F21 E1 10 10 10 10 BR0# H_ADS# H_BNR# H_BPRI# E22 F24 E26 G22 F23 G25 E25 E23 K24 G24 J24 J23 H22 F26 K22 H23 J26 H26 H25 DATA GRP C Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 DEFER# DRDY# DBSY# ADDR GROUP H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 K3 H2 K2 J3 L1 ADS# BNR# BPRI# H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]# XDP/ITP SIGNALS H_ADSTB#0 U0301B H1 E2 G5 DATA GRP 10 J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1 ADDR GROUP H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 U0301A G THRO_CPU 30 S Place R0304 & R0306 for XDP function A A QC Default Strapping When Not Used +VCCP_CPU /QC only QC mount /QC@ DC mount Title : Penryn CPU (1) ASUSTeK COMPUTER INC NB4 H_TDO_M H_TDI_M R0330 R0331 1@ 1@ 54.9Ohm 1% 54.9Ohm 1% Size Custom Engineer: Jace_Kuo Project Name Rev M50Vm 1.0 Date: Tuesday, March 04, 2008 Sheet of 96 U0301D +VCORE +VCORE U0301C Pin AA7 left NC for QC design (QC BR1#) B R0407 0Ohm /QC@ VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 VCCA1 VCCA2 B26 C26 VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] AD6 AF5 AE5 AF4 AE3 AF3 AE2 VCCSENSE AF7 VSSSENSE AE7 R0403 0Ohm /QC@ Pin F8 left as GTLREF_Control for QC design +VCCP_CPU R0410 2GTLREF_CTRL_R 0Ohm /QC@ +VCCA_CPU 120 mA +1.5VS +VCCA_CPU AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 C0402 0.01UF/16V H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 7 R0401 0Ohm 0Ohm 0Ohm 0Ohm 0Ohm 0Ohm 0Ohm 0Ohm 8 RNX0401A RNX0401B RNX0401C RNX0401D RNX0402A RNX0402B RNX0402C RNX0402D 100Ohm 1% VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 C A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18 C0401 10UF/6.3V VR_VID0 VR_VID1 VR_VID2 VR_VID3 VR_VID4 VR_VID5 VR_VID6 80 80 80 80 80 80 80 +VCORE VCCSENSE 80 VSSSENSE 80 D SOCKET478B R0402 100Ohm 1% A4 A8 A11 A14 A16 A19 A23 AF2 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 R0404 AA8 0Ohm AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 R0405 0Ohm AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 R0406 AE8 0Ohm AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25 D /QC@ Pin AA8 AC8 D8 left as reserved for QC design C /QC@ /QC@ Pin AE8 left as NC for QC design (BPM_2#[3]) B SOCKET478B A A Title : Penryn CPU (2) ASUSTeK COMPUTER INC NB4 Size Custom Engineer: Jace_Kuo Project Name Rev M50Vm 1.0 Date: Friday, March 07, 2008 Sheet of 96 +VCCP Decoupling Capacitor (Place near CPU) 38A for Penryn C0537 0.1UF/16V D 1 C0534 0.1UF/16V C0535 0.1UF/16V 1 C0538 0.1UF/16V C0514 0.1UF/16V C0536 0.1UF/16V C0533 10UF/6.3V C0509 10UF/6.3V Decoupling guide from Intel VCORE 22uF/10V r 10uF * 32pcs 330uF/2V * 6pcs VCCP 0.1uF * 6pcs 150uF * 1pcs ? 10uF * 1pcs ? C0526 10UF/6.3V 2 C0513 10UF/6.3V C0510 10UF/6.3V C0503 10UF/6.3V C0506 10UF/6.3V C0501 10UF/6.3V C0520 10UF/6.3V 1 C0507 10UF/6.3V 2 C0504 10UF/6.3V C0511 10UF/6.3V 2 C0522 10UF/6.3V 1 C0528 10UF/6.3V C0516 10UF/6.3V 2 C0539 10UF/6.3V 2 C0524 10UF/6.3V 1 C0517 10UF/6.3V 150UF/4V CE0501 C0529 10UF/6.3V +VCORE Mid-Frequency Capacitor Intel: 22UF *32 F3S: 10UF *16 A7S: 10UF *10 11/17 V1V: ? +VCCP Decoupling Capacitor Intel: 270UF *1, 0.1UF *6 F3S: 100UF *1, 0.1UF *4 V1V: ? C0505 10UF/6.3V 2 1 C0512 10UF/6.3V 2 C0525 10UF/6.3V + 1 C0527 10UF/6.3V C0519 10UF/6.3V +VCCP_CPU JP0501 2MM_OPEN_5MIL @ 1 2 C0521 10UF/6.3V 1 C0530 10UF/6.3V C0502 10UF/6.3V 1 C0523 10UF/6.3V 2 C0515 10UF/6.3V 1 C0518 10UF/6.3V C0531 10UF/6.3V C0508 10UF/6.3V 2 1 +VCCP D +VCORE C0532 10UF/6.3V C C ? DEGREE C THERMAL PROTECTION PLACE UNDER CPU +5VA B +VCCP B R0501 22.1KOhm 1% D Q0501 2N7002 +5VA 0.1UF/16V Q0503 2N7002 81,92 FORCE_OFF# 11,21,30,33,38,43,50,53,58,62,64,70 FORCE_OFF# G @ 3 Q0502 PMBS3904 FORCE_OFF# D S 3,11,20,32 H_THRMTRIP# @ C PST9013NR 100KOhm E NC VCC SUB GND VOUT C0542 R0502 @ U0601 S 330Ohm PM_SUSC# 22,30 0.01UF/16V R0505 56Ohm B C0540 11 G R0504 2 100KOhm @ RT0501 @ 1 +VCCP BUF_PLT_RST# @ Thermal Trip signal (From CPU to ICH-9M and sequence) A A Title : CPU CAPS ASUSTeK COMPUTER INC NB4 Size Custom Engineer: Jace_Kuo Project Name Rev M50Vm 1.0 Date: Friday, March 07, 2008 Sheet of 96 D D C C B B A A Title : ASUSTeK COMPUTER INC NB6 Size Engineer: Project Name Rev A 1.0 Date: Wednesday, February 13, 2008 Sheet of 96 D D 9,12 M_A_A[0 14] M_A_DQ[0 63] 12 J0701A 1 2 12 M_A_DM[0 7] 12 M_A_DQS[0 7] B 12 M_A_DQS#[0 7] SO-DIMM is placed farther from the GMCH than SO-DIMM M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 10 26 52 67 130 147 170 185 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 13 31 51 70 131 148 169 188 11 29 49 68 129 146 167 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 C0712 2.2UF/6.3V C0713 0.1UF/10V 11 RX0702 PM_EXTTS#0 0Ohm @ M_VREF_MCH C0715 2.2UF/6.3V 114 119 CN0703A CN0703B CN0703C CN0703D 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V M_ODT0 M_ODT1 M_CLK_DDR#1 +3VS 9,11 9,11 C0702 10PF/50V @ C0704 10UF/10V SMB_CLK_S SMB_DAT_S M_CLK_DDR1 R0704 10KOhm ODT0 ODT1 8,24,29,38,43,53 8,24,29,38,43,53 Place near SO-DIMM_0 R0703 10KOhm BA0 BA1 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA 107 106 110 115 30 32 164 166 79 80 113 108 109 198 200 197 195 9,12 M_A_BS0 9,12 M_A_BS1 9,11 M_CS#0 9,11 M_CS#1 11 M_CLK_DDR0 11 M_CLK_DDR#0 11 M_CLK_DDR1 11 M_CLK_DDR#1 9,11 M_CKE0 9,11 M_CKE1 9,12 M_A_CAS# 9,12 M_A_RAS# 9,12 M_A_WE# M_CLK_DDR#0 C M_A_BS2 J0701B 9,12 Layout Note: Place these caps near SO DIMM +1.8V C0701 10PF/50V @ DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 M_A_DQ1 M_A_DQ6 M_A_DQ2 M_A_DQ4 M_A_DQ0 M_A_DQ5 M_A_DQ3 M_A_DQ7 M_A_DQ12 M_A_DQ9 M_A_DQ11 M_A_DQ10 M_A_DQ13 M_A_DQ8 M_A_DQ14 M_A_DQ15 M_A_DQ21 M_A_DQ17 M_A_DQ23 M_A_DQ22 M_A_DQ20 M_A_DQ16 M_A_DQ19 M_A_DQ18 M_A_DQ24 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ28 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ37 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ36 M_A_DQ35 M_A_DQ39 M_A_DQ38 M_A_DQ42 M_A_DQ47 M_A_DQ40 M_A_DQ46 M_A_DQ44 M_A_DQ45 M_A_DQ43 M_A_DQ41 M_A_DQ48 M_A_DQ53 M_A_DQ54 M_A_DQ52 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ55 M_A_DQ56 M_A_DQ61 M_A_DQ58 M_A_DQ59 M_A_DQ57 M_A_DQ60 M_A_DQ62 M_A_DQ63 2 M_CLK_DDR0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16_BA2 17 19 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 SMBus Slave Address: A0H 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 85 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 C0714 0.1UF/10V VREF -> 10/10 mils 112 111 117 96 95 118 81 82 87 103 88 104 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 199 VDDSPD 83 120 50 69 163 NC1 NC2 NC3 NC4 NCTEST VREF 201 202 GND0 GND1 203 204 NP_NC1 NP_NC2 47 133 183 77 12 48 184 78 71 72 121 122 196 193 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 21 33 155 34 132 144 156 168 15 27 39 149 161 28 40 138 150 162 C B DDR2_DIMM_200P DDR2_DIMM_200P A A Title : DDR2 SO-DIMM_0 ASUSTeK COMPUTER INC NB4 Size Custom Engineer: Jace_Kuo Project Name Rev M50Vm 1.0 Date: Friday, March 07, 2008 Sheet of 96 D D M_B_DQ[0 63] 12 9,12 M_B_A[0 14] J0801A +3VS R0803 10KOhm R0804 7,24,29,38,43,53 7,24,29,38,43,53 9,11 9,11 114 119 ODT0 ODT1 12 M_B_DM[0 7] M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 10 26 52 67 130 147 170 185 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 B 12 M_B_DQS[0 7] M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 13 31 51 70 131 148 169 188 11 29 49 68 129 146 167 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 12 M_B_DQS#[0 7] M_ODT2 M_ODT3 10KOhm SMB_CLK_S SMB_DAT_S C0807 10UF/10V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V CN0808A CN0808B CN0808C CN0808D +3VS C0811 2.2UF/6.3V C0812 0.1UF/10V 11 RX0802 @ 0Ohm PM_EXTTS#1 112 111 117 96 95 118 81 82 87 103 88 104 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 199 VDDSPD 83 120 50 69 163 NC1 NC2 NC3 NC4 NCTEST VREF 201 202 GND0 GND1 203 204 NP_NC1 NP_NC2 47 133 183 77 12 48 184 78 71 72 121 122 196 193 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 M_VREF_MCH C0818 2.2UF/6.3V M_CLK_DDR#2 J0801B C0802 10PF/50V @ +1.8V M_CLK_DDR2 BA0 BA1 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA Layout Note: Place these Caps near SO DIMM Place near SO-DIMM_1 107 106 110 115 30 32 164 166 79 80 113 108 109 198 200 197 195 M_B_BS2 9,12 M_B_BS0 9,12 M_B_BS1 9,11 M_CS#2 9,11 M_CS#3 11 M_CLK_DDR2 11 M_CLK_DDR#2 11 M_CLK_DDR3 11 M_CLK_DDR#3 9,11 M_CKE2 9,11 M_CKE3 9,12 M_B_CAS# 9,12 M_B_RAS# 9,12 M_B_WE# M_B_DQ4 M_B_DQ1 M_B_DQ6 M_B_DQ2 M_B_DQ5 M_B_DQ0 M_B_DQ7 M_B_DQ3 M_B_DQ13 M_B_DQ12 M_B_DQ15 M_B_DQ10 M_B_DQ8 M_B_DQ9 M_B_DQ11 M_B_DQ14 M_B_DQ17 M_B_DQ20 M_B_DQ22 M_B_DQ21 M_B_DQ16 M_B_DQ18 M_B_DQ23 M_B_DQ19 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ29 M_B_DQ28 M_B_DQ31 M_B_DQ30 M_B_DQ34 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ33 M_B_DQ32 M_B_DQ39 M_B_DQ35 M_B_DQ45 M_B_DQ41 M_B_DQ46 M_B_DQ40 M_B_DQ47 M_B_DQ44 M_B_DQ42 M_B_DQ43 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ54 M_B_DQ53 M_B_DQ52 M_B_DQ55 M_B_DQ51 M_B_DQ61 M_B_DQ60 M_B_DQ63 M_B_DQ58 M_B_DQ56 M_B_DQ57 M_B_DQ59 M_B_DQ62 9,12 M_CLK_DDR#3 C 17 19 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 C0801 10PF/50V @ DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 2 M_CLK_DDR3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16_BA2 SMBus Slave Address:A4H 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 85 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 C0819 0.1UF/10V Layout Note: Place these Caps near SO DIMM VREF -> 10/10 mils 18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 21 33 155 34 132 144 156 168 15 27 39 149 161 28 40 138 150 162 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 C B DDR_DIMM_200P DDR_DIMM_200P A A Title : DDR2 SO-DIMM_1 ASUSTeK COMPUTER INC NB4 Size Custom Engineer: Jace_Kuo Project Name Rev M50Vm 1.0 Date: Friday, March 07, 2008 Sheet of 96 +0.9VS L0901 120Ohm/100Mhz D 83 0.9V_VTT_REF by power 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 7 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 16 15 14 13 12 11 10 RN0901A RN0901B RN0901C RN0901D RN0901E RN0901F RN0901G RN0901H M_CS#1 M_A_A7 M_A_A13 M_ODT1 M_A_WE# M_A_CAS# M_A_A10 M_A_BS0 CN0905A CN0905B CN0905C CN0905D 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 7 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 16 15 14 13 12 11 10 RN0902A RN0902B RN0902C RN0902D RN0902E RN0902F RN0902G RN0902H M_A_A12 M_A_A11 M_A_A5 M_A_A8 M_A_A9 M_A_A1 M_A_A3 CN0906A CN0906B CN0906C CN0906D 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 7 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 16 15 14 13 12 11 10 RN0903A RN0903B RN0903C RN0903D RN0903E RN0903F RN0903G RN0903H M_ODT0 M_CS#0 M_A_RAS# M_A_BS1 M_A_A0 M_A_A2 M_A_A4 M_A_A6 CN0907A CN0907B CN0907C CN0907D 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 7 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 16 15 14 13 12 11 10 RN0904A RN0904B RN0904C RN0904D RN0904E RN0904F RN0904G RN0904H M_ODT3 M_CS#3 M_ODT2 M_CS#2 M_B_RAS# M_B_A13 M_B_A0 M_B_BS1 CN0908A CN0908B CN0908C CN0908D 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 7 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 16 15 14 13 12 11 10 RN0905A RN0905B RN0905C RN0905D RN0905E RN0905F RN0905G RN0905H M_B_CAS# M_B_WE# M_B_BS0 M_B_A10 M_B_A2 M_B_A4 M_B_A1 M_B_A3 2 R0901 10KOhm 1% @ 1 +1.8V CN0904A CN0904B CN0904C CN0904D C0903 0.1UF/16V @ M_VREF_MCH L0902 N/A 120Ohm/100Mhz 2 C0902 0.1UF/16V @ R0902 10KOhm 1% @ 1 M_VREF D C M_A_A14 7,12 C M_A_A[0 13] 7,12 M_A_BS[0 2] 7,12 M_A_CAS# 7,12 M_A_RAS# 7,12 M_A_WE# 7,12 M_B_A[0 13] 8,12 M_B_BS[0 2] 8,12 B B M_B_CAS# 8,12 M_B_RAS# 8,12 M_B_WE# 8,12 CN0909A CN0909B CN0909C CN0909D 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 16 15 14 13 12 11 10 RN0906A RN0906B RN0906C RN0906D RN0906E RN0906F RN0906G RN0906H M_B_A5 M_B_A8 M_B_A7 M_B_A6 M_B_A11 M_B_BS2 M_B_A12 M_B_A14 8,12 M_CS#[0 3] 7,8,11 M_ODT[0 3] 7,8,11 C0910 0.1UF/16V M_CKE[0 3] 7,8,11 C0911 0.1UF/16V 2 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm RN0908A RN0908B RN0908C RN0908D RN0909A RN0909B RN0909C RN0909D M_B_A9 M_CKE2 M_CKE3 M_CKE1 M_A_BS2 M_CKE0 A A Title : DDR2 termination ASUSTeK COMPUTER INC NB4 Size Custom Engineer: Jace_Kuo Project Name Rev M50Vm 1.0 Date: Tuesday, March 04, 2008 Sheet of 96 U1001A D R1001 24.9Ohm 1% H_RCOMP C +VCCP R1002 221Ohm 1% C1002 0.1UF/10V R1003 100Ohm 1% H_SWING B H_SWING H_RCOMP H_CPURST# H_CPUSLP# R1006 0Ohm H_VREF H_SWING H_RCOMP 3 R1004 1KOhm 1% R1005 2KOhm 1% C12 E11 A11 B11 H_CPURST# H_CPUSLP# H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35 A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20 H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_BNR# H_BPRI# H_BREQ# H_DEFER# H_DBSY# HPLL_CLK HPLL_CLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9 H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK 29 CLK_MCH_BCLK# 29 H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 J8 L3 Y13 Y1 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 L10 M7 AA5 AE6 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 3 3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 L9 M8 AA6 AE5 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 3 3 H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 B15 K13 F13 B13 B14 H_RS#_0 H_RS#_1 H_RS#_2 B6 F12 C8 D H_A#[35:3] H_REQ#[4:0] H_D#[63:0] H_A#[35:3] H_REQ#[4:0] H_D#[63:0] C 3 3 B H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2 3 H_AVREF H_DVREF CANTIGA_CHIPSET C5 E3 H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63 T1001 +VCCP C1001 0.1UF/10V @ F2 G8 F8 E6 G2 H6 H2 F6 D4 H3 M9 M11 J1 J2 N12 J6 P2 L2 R2 N9 L6 M5 J3 N2 R1 N5 N6 P13 N8 L7 N10 M3 Y3 AD14 Y6 Y10 Y12 Y14 Y7 W2 AA8 Y9 AA13 AA9 AA11 AD11 AD10 AD13 AE12 AE9 AA2 AD8 AA3 AD3 AD7 AE14 AF3 AC1 AE3 AC3 AE11 AE8 AG2 AD6 HOST H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 A A Cap 0.1uF within 500 mils from GMCH Title : Cantiga - CPU (1) ASUSTeK COMPUTER INC NB4 Size Custom Engineer: Michael_Wang Project Name Rev M50Vm 1.0 Date: Friday, March 07, 2008 Sheet 10 of 96 2 +5VO D D R8330 10Ohm AC_BAT_SYS 2 1 2.0 JP8303 SHORT_PIN C8319 1000PF/50V MLCC/+/-10% @ D8303 FS1J4TP Q8301 IRF7832ZPBF + + +1.8V 3MM_OPEN_5MIL C C8313 0.1UF/25V MLCC/+/-10% C8320 1UF/25V MLCC/+/-10% JP8301 1.8UH Irat=9.5A R8327 10Ohm @ 1 CE8301 220UF/2V PANASONIC/EEFSX0D221ER 2 C8301 0.1UF/50V MLCC/+/-10% FB=0.7V C8315 0.033UF/16V MLCC/+/-10% C8318 0.1UF/25V MLCC/+/-10% R8325 10KOhm 1% @ R8318 15.8KOhm 1% @ C8316 4700PF/50V @ MLCC/+/-10% (80mil) B CE8300 10UF/25V c1210 1 2 1 R8305 22KOhm 1% 1 C8323 1UF/16V MLCC/+/-10% C8321 4700PF/50V MLCC/+/-10% 2 R8312 0Ohm 2 D8300 1SS355 70,81,82,91,93 SUSB#_PWR L8300 1 3MM_OPEN_5MIL (9.5A) R8329 10Ohm +-18mA 0.9V_VTT_REF 21 20 19 18 17 16 15 F=300KHz 10 11 12 13 14 TPC28T T8315 92 DDR_PWRGD C8324 4.7UF/6.3V MLCC/+/-10% 29 28 27 26 25 24 23 22 SS VTTS VTTR PGND2 VTT VTTI REFIN C8317 0.22UF/10V MLCC/+/-10% DL BST LX DH VIN OUT FB 071018 1 R8322 100KOhm 1% TON OVP/UVP REF U8300 ILIM MAX8632ETI POK1 POK2 STBY# S REF=2V TPC28T T8326 G For foldback current limit R8326 270KOhm 1% 2 +1.8VO JP8302 D R8319 0Ohm @ C R8323 0Ohm @ +1.8VO D8302 RB751V-40 R8321 0Ohm GND2 TPO SHDN# AVDD SKIP# GND1 PGND1 VDD R8324 0Ohm 2 C8302 0.047UF/16V MLCC/+/-10% 2 R8317 100KOhm 1% S G 1 91,93 SUSC#_PWR Q8300 IRF7413ZPBF D D8301 1SS355 C8310 0.1UF/50V MLCC/+/-10% CE8302 150UF/2V PANASONIC/EEFCD0D151ER R8320 0Ohm @ 1 C8325 1UF/25V MLCC/+/-10% R8328 0Ohm SUSB#_PWR (80mil) +0.9VO B (1A) C8322 10UF/6.3V MLCC/+/-10% TPC28T T8311 TPC28T T8312 TPC28T T8310 +1.8VO TPC28T T8322 TPC28T T8323 TPC28T T8321 TPC28T T8320 TPC28T T8319 TPC28T T8318 TPC28T T8300 TPC28T T8317 TPC28T T8316 TPC28T T8325 TPC28T T8314 1 TPC28T T8313 TPC28T T8309 TPC28T T8308 TPC28T T8307 +0.9VS +0.9VO TPC28T T8306 TPC28T T8305 TPC28T T8304 TPC28T T8303 TPC28T T8302 1 TPC28T T8301 071115 C8305 10UF/6.3V MLCC/+/-10% 1 C8308 10UF/6.3V MLCC/+/-10% C8311 10UF/6.3V MLCC/+/-10% 2 C8312 0.1UF/25V MLCC/+/-10% 2 1MM_OPEN_5MIL 1 1 JP8300 +0.9VS +1.8V A A Title : POWER_I/O_DDR & VTT ASUSTeK COMPUTER INC NB Size Custom Engineer: Amos_Yu Project Name Rev M50VM Date: Wednesday, April 16, 2008 1.1 Sheet 83 of 94 D D C C B B A A 071002 Title : POWER_I/O_ +2.5VS ASUSTeK COMPUTER INC NB Size Custom Engineer: Amos_Yu Project Name Rev M50VM Date: Wednesday, April 16, 2008 1.0 Sheet 84 of 94 D D C C B B A A 071002 Title : POWER_I/O_1.5VS & 1.05VS ASUSTeK COMPUTER INC NB Size Custom Engineer: Amos_Yu Project Name Rev M50VM Date: Wednesday, April 16, 2008 1.0 Sheet 85 of 94 D D C C B B 071002 A A Title : N/A ASUSTeK COMPUTER INC NB Size B Project Name Rev M50VM Date: Wednesday, April 16, 2008 Engineer: Amos_Yu 1.0 Sheet 86 of 94 D D 071002 C C B B A A 071002 Title : POWER_SHUTDOWN# ASUSTeK COMPUTER INC NB Size Custom Engineer: Amos_Yu Project Name Rev M50VM Date: Wednesday, April 16, 2008 1.0 Sheet 87 of 94 T8816 TPC28T T8814 TPC28T POWER PATH & BAT_LEARN JP8804 SHORT_PIN CSSP JP8800 SHORT_PIN CSSN add second source T8812 T8803 2 90W->10m Ohm 65W->20m Ohm 1 2 C8817 0.01UF/50V MLCC/+/-10% TPC28T TPC28T TPC28T TPC28T T8800 T8808 T8801 T8807 BAT JP8801 BAT 1 2 D BAT_CON 3MM_OPEN_5MIL R8823 6.8KOhm 1% R8822 18KOhm 1% TPC8107 D Q8800 G 1 3MM_OPEN_5MIL S Q8811 TPC8107 JP8806 AC_BAT_SYS G R8802 10mOhm r1508 1% D D8803 1SS355 071112 T8809 G Q8801 TPC8107 T8802 D D S T8810 TPC28T TPC28T TPC28T TPC28T TPC28T S A/D_DOCK_IN T8813 1 1 1 1 T8817 MLCC/+/-10% T8815 TPC28T TPC28T TPC28T TPC28T C8810 0.047UF/50V T8804 60,90 A/D_DOCK_IN CHG_PDL CHG_PDS add second source AC_BAT_SYS JP8805 SHORT_PIN AC_BAT_SYS_INV AC_BAT_SYS_INV to Inverter connect, Power trace =60mil(min), Put JP8805 close to Q8800 CSSP AC_BAT_SYS 2.991V 2.5341V 0.5% R8807 10KOhm 1 1 1 BAT 071002 2 2 CE8802 10UF/25V MLCC/+/-10% c1210 @ + CE8801 15UF/25V c7343d_h75 SHORT_PIN JP8803 1 JP8802 SHORT_PIN 1 D8801 FS1J4TP SHORT_PIN JP8807 1 IINP CLS ICTL VCTL CCI CCV CCS Q8807 SI4800BDY CHG_GND C8815 0.047UF/50V MLCC/+/-10% TPC28T T8820 B +5VO +2.5VREF U8801 V+ C8821 @ 2 R8824 100KOhm @ S 47UF/6.3V @ C8819 1 @ R8825 143KOhm @ C8820 0.1UF/25V @ Q8812 2N7002 @ G VLMV321IDBVR @ D 11 - 0.1UF/25V + 2 S 071002 1SS355 D8804 @ D Q8803 2N7002 11 G AD_IINP 1.98V C8818 0.1UF/25V C8807 1UF/10V MLCC/+80%-20% 2 S G R8826 107KOhm @ PKPRES# Q8805 2N7002 CHG_EN# D 90W->30K Ohm 65W->137K Ohm 11 T8822 TPC28T 30 2 071018 071018 10UH Irat=4.4A PWRLIMIT# 3,30 S T8821 TPC28T PRECHG R8801 20KOhm 1% G 071018 30 R8806 97.6KOhm 1% 11 BATSEL_2P# R8819 30KOhm 1% 30 Q8808 2N7002 @ D 2 B AD_IINP R8820 1.91KOhm 1% CHG_CCV R8816 36.5KOhm 1% @ R8803 25mOHM r1508 1% 0.188V C 1.SI4431BDY-> 07G005140011 2.SI9435BDY-> 07G005921010 3.FDS9435A -> 07G005720010 L8802 CHG_CCS 1.588V 1.68V TPC28T T8819 2 29 28 27 26 25 24 23 22 U8800 MAX8725ETI 21 20 19 18 17 16 15 10 11 12 13 14 1 C8814 1UF/10V MLCC/+80%-20% 2 C8800 4.7UF/25V MLCC/+/-20% 2 R8813 33.2KOhm 1% DLOV DLO PGND CSIP CSIN BATT GND1 S R8809 40.2KOhm 1% DCIN LDO ACIN REF GND/PKPRES# ACOK MODE SI4431BDY C8812 1UF/25V MLCC/+80%-20% G R8805 20KOhm 1% Q8802 R8800 33Ohm D R8818 13.3KOhm 1% C8801 1UF/10V MLCC/+80%-20% MAX8725_REF Precgarge current=150mA GND2 PDL PDS CSSP CSSN SRC DHI DHIV REF : 4.2235V C8805 0.1UF/25V MLCC/+/-10% C8803 0.01UF/50V MLCC/+/-10% CHG_CCI C8809 R8815 0.1UF/25V 10KOhm MLCC/+/-10% 1 r0402 LDO : 5.4V VICTL< 0.8V or DCIN < 7V >Charger Disable C8816 1UF/25V MLCC/+/-10% 1 R8817 100KOhm 2 CHG_GND D D8802 1SS355 MAX8725_REF G R8812 100KOhm 1% TPC28T T8806 S Mode pin : Vmode > 2.8V (trie to LDO pin) > Cells 2.0 > Vmode > 1.6V (floating) > Cells 0.8 > Vmode (trie to GND) > Learning mode MAX8725_LDO CHG_GND CE8800 10UF/25V c1210 T8811 TPC28T Vbatt = Cell * { Vref +[ (VCTL- 1.8V) / 9.52 ] } VCTL= 1.588V => Vbatt = 4.2V MAX8725_LDO A/D_DOCK_IN A/D_DOCK_IN Charge Current Ichg = [0.075V/Rsense(CHG)]*[VICTL/3.6V] Rsense(CHG)=0.025 ohm VICTL= 3V => Ichg = 2.5A VICTL= 1.68V => Ichg = 1.4A C8806 1UF/25V MLCC/+80%-20% C8808 0.1UF/25V MLCC/+/-10% CHG_PDL Adapter Iin(max) = [0.075V/Rsense(ADin)]*[VCLS/VREF] Rsense(ADin)=0.010ohm VCLS=2.5341V => Iin(max)=4.5A => Constant Power = 19 * 4.5 = 85.5W => R8805=20K,R8819=30K C TPC28T T8818 CHG_PDS C8811 0.1UF/25V MLCC/+80%-20% AC_IN Threshold 2.048Vmax A/D_DOCK_IN > 17.44V active C8813 0.1UF/25V MLCC/+80%-20% CSSN MAX8725_LDO Q8809 2N7002 3 D Q8810 2N7002 11 11 S A G G S 2 BAT_LEARN 30 D R8814 100KOhm 1% 3 T8823 TPC28T A PKPRES# For EC(ITE8752): Delete net AC_APR_UC, R8804, Q8806 071018 R8821 470KOhm Q8804 2N7002 D 1 11 G S TS1# 60,90 C8802 0.22UF/10V MLCC/+/-10% Title : POWER_CHARGER Engineer: Amos_Yu ASUSTeK COMPUTER INC NB Size C Date: Project Name Rev M50VM Wednesday, April 16, 2008 1.1 Sheet 88 of 94 D D C C B B A A 071002 Title : N/A ASUSTeK COMPUTER INC NB Size Custom Engineer: Amos_Yu Project Name Rev M50VM Date: Wednesday, April 16, 2008 1.0 Sheet 89 of 94 BATTERY IN DETECT +5VO ADAPTER IN DETECT +5VAO TPC28T T9002 1 BAT1_IN_OC# 30 A/D_DOCK_IN Q9000B TPC28T T9003 Second Battery: BAT2_IN_OC# 30 UM6K1N AC_IN_OC# Master Battery: TS1# 2 C9003 1000PF/50V MLCC/+/-10% C9002 0.1UF/25V MLCC/+80%-20% 1 R9003 10.2KOhm 1% E Q9001 PMBS3904 2 B Q9000A UM6K1N TS1# R9004 243KOhm 1% C 60,88 D Master Battery: BAT1_IN_OC# R9001 100KOhm r0402 R9002 100KOhm r0402 D Second Battery: TS2# C C +2.5VREF B B +5VO R9000 1KOhm +2.5VREF C9001 1UF/10V MLCC/+/-10% TPC28T T9001 1 TPC28T T9000 071002 U9001 MM1431ANRE @ C9000 1UF/10V MLCC/+/-10% 2 U9000 LM4040BIM3 add second source CATHODE SUB NC REFERENCE ANODE U9000 & U9001 colay A A U9000 06G006002412 (tolerence:0.2%) add second source 06G006002610 (tolerence:1%) and 06G006002414(tolerence:1%) Title : POWER_DETECT ASUSTeK COMPUTER INC NB Size Custom Engineer: Amos_Yu Project Name Rev M50VM Date: Wednesday, April 16, 2008 1.1 Sheet 90 of 94 SUSC#_PWR POWER 0Ohm 1 C9105 0.033UF/16V MLCC/+/-10% add second source TPC28T T9120 1 R9107 0Ohm C9109 0.033UF/16V MLCC/+/-10% R9112 47KOhm 1% C 1 100KOhm 1% 10K R9103 B B 47K E C (3.088A) 071002 TPC28T T9131 47K TPC28T T9102 +12VS E R9102 100KOhm 1% 30,43,57,92 SUSB_EC# TPC28T T9135 70,81,82,83,93 SUSB#_PWR Q9105 R9105 1KOhm B C 10K B 47K E 47K B B SUSB#_PWR C 47K +5VS C9107 0.1UF/25V MLCC/+/-10% add second source UMC4N TPC28T T9129 +12VSUS C N TPC28T T9128 Q9107 (5.2A) TPC28T TPC28T T9101 T9127 2.0 DRAIN_2 SOURCE_3 SOURCE_4 GATE_2 1 Q9106 DRAIN_1 FDW2501NZ_NL SOURCE_1 SOURCE_2 GATE_1 +5VO C9104 0.1UF/25V MLCC/+/-10% +3VS C9102 0.1UF/25V MLCC/+/-10% SI4800BDY TPC28T TPC28T T9105 T9115 0Ohm R9108 2 G SUSB#_PWR POWER S 1 Q9108 D 1 +3VO TPC28T TPC28T T9109 T9114 47K 071002 C TPC28T T9112 +12V SUSC#_PWR TPC28T T9119 TPC28T TPC28T T9104 T9118 (2.5A) C9113 0.1UF/25V MLCC/+/-10% E +12VSUS R9106 22KOhm 1% +5V UMC4N D TPC28T T9113 1 N R9110 (2.925A) C9106 0.1UF/25V MLCC/+/-10% TPC28T T9124 2.0 DRAIN_2 SOURCE_3 SOURCE_4 GATE_2 +3V 1 0Ohm C9110 0.033UF/16V MLCC/+/-10% Q9101 DRAIN_1 FDW2501NZ_NL SOURCE_1 SOURCE_2 GATE_1 +5VO TPC28T T9108 2 C9112 0.033UF/16V MLCC/+/-10% R9109 SI4800BDY TPC28TTPC28T T9117 T9132 1 0Ohm G C9101 0.1UF/25V MLCC/+/-10% S 1 1 S 11 R9100 +1.8VS TPC28T T9126 Q9103 D +3VO (0.1A) G TPC28T T9116 TPC28T T9137 D +1.8VO D TPC28T TPC28T T9111 T9133 Q9102 SI2304BDS TPC28T TPC28T T9136 T9106 30,57 SUSC_EC# 83,93 SUSC#_PWR TPC28T T9121 TPC28T T9134 R9104 1KOhm A A Title : POWER_LOAD SWITCH ASUSTeK COMPUTER INC NB Size Custom Engineer: Amos_Yu Project Name Rev M50VM Date: Wednesday, April 16, 2008 1.1 Sheet 91 of 94 D D POWER GOOD DETECTER 071002 EC +3VS ALL_SYSTEM_PWRGD 30 R9205 100KOhm r0402 071002 30,43,57,91 SUSB_EC# FORCE_OFF# T9204 TPC28T D9200 1SS355 071018 TPC28T 70 PWR_OK_VGA C B GND Q9200B UM6K1N Y NC7SZ08P5X UM6K1N T9200 TPC28T U9200 A VCC D9201 1SS355 R9203 0Ohm r0402_h16 T9202 R9201 560KOHM +3VO Q9200A 82 1.05V_1.5V_PWRGD TPC28T 30,81 SUS_PWRGD T9203 R9202 0Ohm r0402_h16 1 1 83 DDR_PWRGD C 5,50,70,81 1 R9206 100KOhm @ r0402 2 R9200 100KOhm r0402 SUSB_EC# +3VO C9200 4.7UF/6.3V MLCC/+/-10% R9204 0Ohm r0402_h16 N/A (05/11/07) B 30,32,80 VRM_PWRGD R9207 100KOhm r0402 B T9201 TPC28T +3VS A A Title : POWER_PROTECT ASUSTeK COMPUTER INC NB Size Custom Engineer: Amos_Yu Project Name Rev M50VM Date: Wednesday, April 16, 2008 1.1 Sheet 92 of 94 AC_BAT_SYS AC_BAT_SYS 70,80,81,82,83,88 D BAT BAT BAT_CON 60,88 +2.5VREF +2.5VREF 88,90 D FOR POWER TEST 88 BAT_CON 1017 JP9300 +3VA +3VA 20,30,56,57,81 +5VAO +5VAO 81,82,90 +5VO +5VO 81,82,83,88,90,91 +5VSUS +5VSUS 23,31,81 +5V 36,46,52,56,57,63,65,70,91 +5VS +5VS 23,31,37,45,48,50,51,56,57,63,80,91 +3VO +3VO 81,82,91,92 +3VSUS +3VSUS 20,21,22,23,30,33,37,46,56,70,81 +3V 21,35,43,53,57,61,64,91 +3VS 3,7,8,11,14,15,20,21,22,23,24,25,29,30,32,33,36,37,40,41,42,43,44,45,46,48,50,51,53,56,57,63,64,65,70,80,91,92 +3VO 2 CPU_VRON_PWR 80 SGL_JUMP JP9301 +5V +3V +3VS 1 2 SUSB#_PWR SUSB#_PWR 70,81,82,83,91 SGL_JUMP JP9302 1 2 SUSC#_PWR SUSC#_PWR 83,91 SGL_JUMP JP9303 +3VA C +12VSUS +12VS +12V 37,91 +12VS 24,42,46,70,91 +1.8VO +1.8VO 83,91 +1.8V +1.8V 7,8,9,11,13,57,83 +1.8VS +1.8VS 14,20,38,57,70,91 +0.9VS +0.9VS 9,57,70,83 +0.9VO +0.9VO 83 +1.05VO +1.05VO 80,82 +VCCP +VCCP 5,10,11,13,14,20,23,29,57,82 +1.5VO +1.5VO 82 +1.5VS +1.5VS 4,14,20,23,43,53,57,64,70,82 2 VSUS_ON VSUS_ON 30,81 C SGL_JUMP +12VSUS 70,81,91 +12V B B +VCORE +VCORE 4,5,80 A A Title : POWER_SIGNAL ASUSTeK COMPUTER INC NB Size Custom Engineer: Amos_Yu Project Name Rev M50VM Date: Wednesday, April 16, 2008 1.1 Sheet 93 of 94 M50VM Design rating Non-IAMT UMC4N (SWITCH) SUSC#_PWR AC_BAT_SYS +12VSUS D SUSB#_PWR MIC5235 UMC4N (SWITCH) VSUS_ON SUSC#_PWR +3VO +12VSUS (10mA) +12V (10mA) +12VS (10mA) +3VSUS (0.74A) SI4800 +3V (2.9A) SI2304 +3VS_TVDC (0.2A) SI4800 +3VS D SUSB#_PWR SUSB#_PWR LM4040BIM (Regulator) TPS51020 VSUS_ON +2.5VREF (8A) (5.0A) (10mA) +5VSUS (0.01A) +5V (2.5A) SUSC#_PWR S4_STATE_PWR +5VO FDW2501 C FORCE_OFF# C (6A) SUSB#_PWR +5VS FDW2501 +5VAO +3VAO SI9183 (3.1A) +5VAO (0.01A) +3VA (0.01A) +1.5VS (5.7A) +VCCP (6.0A) +VGFX_CORE (6.0A) +1.8VS (0.1A) SUS_PWRGD SUSB#_PWR +5VO +1.5VO MAX8743 (5.7A) +1.05VO SUSB#_PWR 1.05V_1.5V_PWRGD (12A) SUSB#_PWR B SI2304 B (9.5A) +1.8VO SUSC#_PWR +0.9VO +1.8V (9A) +0.9VS (2A) MAX8632 +5VO (2A) DDR_PWRGD SUSB#_PWR A A +5VS +VCORE ISL6262A (38A) CPU_VRON VR_VID0~VR_VID6, H_DPRSTP#, MCH_OK, PM_DPRSLPVR,PM_PSI#, VCCSENSE,VSSSENSE,STP_CPU#, PWR_MON VRM_PWRGD,CLK_EN# Title : POWER_FLOWCHART Engineer: Amos_Yu ASUSTeK COMPUTER INC NB Size Custom Project Name Rev M50VM Date: Wednesday, April 16, 2008 1.1 Sheet 94 of 94 I/O Board USB Port +5V_USB_IO IOJ102 IO_C101 0.1UF/16V GND_IO GND_IO P_GND4 P_GND3 P_GND2 P_GND1 USB_CON_1X4P 1 IO_CE01 47UF/6.3V D 2.0-15 GND_IO GND_IO USB Port 22 IOJ103 R1.1-31 GND_IO IO_CE02 47UF/6.3V GND_IO WTOB_CON_20P +5V_USB_IO USB_PN1_IO USB_PP1_IO IO_C102 0.1UF/16V GND_IO GND_IO 4 P_GND4 P_GND3 P_GND2 P_GND1 USB_CON_1X4P HP1_JD_IO HP1_R_IO HP1_L_IO SPDIF_JD_IO SPDIF1_OUT_IO HP2_JD_IO HP2_R_IO HP2_L_IO MIC_JD_IO MIC_IO 21 USB_PN1_IO USB_PP1_IO SIDE2 10 11 12 13 14 15 16 17 18 19 SIDE1 20 + 10 11 12 13 14 15 16 17 18 19 20 USB_PN0_IO USB_PP0_IO D +5V_USB_IO USB_PN0_IO USB_PP0_IO IOJ101 +3VS_IO + R1.1-17 2.0-15 GND_IO GND_IO C HP1_IN#_IO JACK_IN#_IO R1.1-17 C Headphone & S/PDIF Jack IOJ104 GND_IO GND_IO 2 0Ohm 0Ohm 1 IO_C104 100PF/50V @ SPDIFOUT_IO GND_IO 10K C IO_R107 IO_R108 IO_Q02 IO_C105 0.1UF/16V C S E IO_C103 100PF/50V @ 11 12 +3VS_SPDIF_IO B 47K IO_Q01B UM6K1N JACK_IN#_IO G SPDIF1_OUT_IO B HP1_IN#_IO 47K 2 IO_Q01A UM6K1N HP1_JD_IO IO_Q03 2N7002 11 IO_R113 100KOhm E UMC4N 47K IO_R112 100KOhm D 1 SPDIF_JD_IO +3VS_SPDIF_IO +3VS_IO HP1_R_CON_IO HP1_L_CON_IO 0Ohm 0Ohm 1 +5V_USB_IO IO_R105 IO_R106 +5V_USB_IO HP1_R_IO HP1_L_IO GND VCC Vin A B C MS 10 PHONE_JACK_8P IO_C106 100PF/50V @ GND_IO R1.1-17 Headphone Jack B B IOJ105 HP2_JD_IO 0Ohm HP2_R_CON_IO HP2_L_IO IO_R110 0Ohm HP2_L_CON_IO NP_NC1GND5 NP_NC2GND4 GND2 GND3 Right Screw Hole IO_H1 Left Screw Hole IO_C107 100PF/50V @ IO_R109 HP2_R_IO IO_C108 100PF/50V @ R L 10 AUDIO JACK PHONE_JACK_6P IO_H2 GND_IO GND_IO 2DRILL_D110N_D85N NP_NC1GND5 NP_NC2GND4 GND2 GND3 GND_IO GND_IO MIC In Jack GND_IO IOJ106 DO85X104N_D110N MIC_JD_IO IO_R111 0Ohm MIC_CON_IO MIC_IO A IO_C109 100PF/50V @ R L 10 AUDIO JACK PHONE_JACK_6P A GND_IO Title : USB & Audio Jack ASUSTeK COMPUTER INC NB1 Size Custom Engineer: Rev M50Vm 2.0 Date: Tuesday, April 15, 2008 Wenchi_Shen Project Name Sheet 95 of 96 Rev Date Description Rev Date Description 13.With EMI RD's confirmation, remove reserved e-SATA/USB combo port USB common choke circuit Page 41 R1.0 First Release! R1.1 ** Merge IO board into main board PCB Page 95 Green Block 01.Remove VR_VID[6:0] testing series 0hm Page 14.Reserve R8023 for shortage issue of ISL6262A Page 80 15.QTR USB plug test failed, change USB connector Page 95 02.Change 6pcs +VCORE capacitors to No-Stuff for cost down Page D D 03.Change 3pcs +0.9VS capacitors to No-Stuff for cost down Page 04.Change N1Sv USB port to follow N2Sv, and modify USB_OC# Page 21,43,45 05.PM Request: Change Bluetooth LED E-Mail LED Page 22,56 06.Follow Intel to change C2304 to 1uF/16V(XR) Page 23 07.Follow R1E to change R2904 to 270ohm Page 29 08.Follow IT8752/8512 EC Common Hardware Pin Assignment v0.005, change GPE7 to INSTANT_ON# and GPG0 to PM_THERM# Page 30 09.PM REquest: Remove USB port charger function Page 30,65 10.PM change WWAN LED to touch-pad lock LED Page 30,56 11.Change IR to 36KHz to meet Vista remote control Min range requirement Page 31 12.Remove testing 2nd CIR design Page 31 13.Change X3301 to 49S type for cost down Page 33 14.LAN chip version change Page 33 15.Audio codec chip change version Page 36 C C 16.N1Sv/X55 will not supprot 3G function Page 36,67 17.Add S/PDIF & HDMI jack detect by Realtek sugesstion Page 36,65,70,95 18.Modify audio de-pop circuit Page 36,37 19.Modify LVDS power sequence failed bug Page 45 20.Modify LCD abnormal display bug due to LVDS pair mismatch Page 45,70 21.Remove HDTV support function Page 47,70 22.Remove HDMI EMI filter design Page 48 23.X55 need two pwer LEDs Page 56 24.PM change WLAN LED to RF LED Page 56,63 25.Bluetooth pin define error Page 61 26.Remove co-layout sequence logic control circuit Page 68 27.ME change parts: J3401,J5102,J6002,J6501 Page 34,51,60,65 28.EMI modification Page 34,36,65 29.Crystal accuracy fine-tune Page 30.USB droop test fail Page 65 31.Remove IO board USB common choke design Page 95 B B 32.Speaker fine-tune Page 37 33.Cost down for 4-wire PWM fan Page 50 34.Cost down: Change RB717F to BAT54AW Page 37,45,48,56 R2.0 01.Change +1.25VS_MPLL, +1.25VS_PEGPLL & +1.8V_SM_CK PLL design Page 15 Pink Block 02.Add CMOS crack protection circuit Page 22 03.Reserve C2337 (10UF/16V) for +5VREF_ICH Page 23 04.With EMI RD's confirmation, remove reserved LAN common choke circuit Page 34 05.With EMI RD's confirmation, change R3612, R3614, R3615, R3616, R3622, R3624,R3626 to short-pad Page 36 06.With EMI RD's confirmation, remove reserved 1394 common choke circuit Page 41 07.With EMI RD's confirmation, remove reserved NewCard USB common choke circuit Page 43 A A 08.Add NewCard debug card co-layout circuit Page 44 09.EMI modification: change reserved common choke circuit from USB port to internal camera port Page 45 10.HDMI jack detection modification Page 48,70 Title : Revision History 11.Change FAN capacitors to 10UF Page 50 ASUSTeK COMPUTER INC NB1 12.Modify X55 power LED design Page 56 Size Custom Project Name Engineer: Rev M50Vm Date: Wednesday, February 13, 2008 John Hung 1.0 Sheet 96 of 96 www.s-manuals.com ... 100 PF/50V CN3 102 D 100 PF/50V CN3 103 A 100 PF/50V CN3 103 B 100 PF/50V CN3 103 C 100 PF/50V CN3 103 D 100 PF/50V CN3 104 A 100 PF/50V CN3 104 B 100 PF/50V CN3 104 C 100 PF/50V CN3 104 D 100 PF/50V CN3 105 A 100 PF/50V CN3 105 B... 10 RN0 905 A RN0 905 B RN0 905 C RN0 905 D RN0 905 E RN0 905 F RN0 905 G RN0 905 H M_B_CAS# M_B_WE# M_B_BS0 M_B_A 10 M_B_A2 M_B_A4 M_B_A1 M_B_A3 2 R0 901 10KOhm 1% @ 1 +1.8V CN0 904 A CN0 904 B CN0 904 C CN0 904 D C0 903 ... 1 2 2 2 2 2 2 2 2 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V 0. 1UF/10V /PM /PM /PM /PM