Acer aspire 7738g DDR3

5 JM70 -MV Block Diagram 46 ISL62392 INPUTS OUTPUTS 5V_S5(6A) 3D3V_S5(7A) 5V_AUX_S5 3D3V_AUX_S5 SYSTEM DC/DC 46 TPS51124 EMC2102 Penryn ICS9LPRS365BKLFT SYSTEM DC/DC DCBATOUT SMSC Mobile CPU CLK GEN D Project code: 91.4AN01.001 PCB P/N : 48.4AN01.0SA REVISION : SB 08246 38 INPUTS D OUTPUTS 1D05V_S0(10A) DCBATOUT 1D5V_S3(10A) 4, HOST BUS DDR3 PCIex16 AGTL+ CPU I/F DDR Memory I/F DDR3 3D3V_S5 20 C-Link0 CHARGER 35 INPUTS 35 PCIe ports 32 TXFM INPUTS 12 USB 2.0/1.1 ports DCBATOUT High Definition Audio AZALIA LPC I/F New Card Serial Peripheral I/F ALC888 36 Matrix Storage Technology(DO) 30 Active Managemnet Technology(DO) MIC In PCIe 12,13,14,15 B OUTPUTS VCC_CORE 0~1.3V 38A GFX DC/DC ISL6263 INPUTS DCBATOUT Mini Card TV TUNER 37 OP AMP 32 PWR SW TPS2231 36 Mini Card Wire LAN 37 32 51 29 ETHERNET (10/100/1000MbE) Int MIC C 6.0A ADP3208C RJ45 29 BCM5764MKMLG 28 SATA CHG_PWR 18V CPU DC/DC LAN Giga LAN ACPI 2.0 32 OUTPUTS DCBATOUT PCI/PCI BRIDGE 50 ISL88731A MS/MS Pro/xD /MMC/SD CardBus ICH9M LINE IN Codec 1D5V_S5 (300mA) 19 AU6433 G1442RD 32 14 G9198-15 21 LCD CRT SUBWOOFER AMP INT.SUBWOOFER HDMI 6,7,8,9,10,11 USB 32 Level shift PS8101 18 LVDS, CRT I/F X4 DMI 400MHz C VGA Borad (MXM 3.0 Connector) INTEGRATED GRAHPICS 800/1066 16,17 MHz DDR_VREF_S3 (1.2A) 1.5V_S3 Cantiga 800/1066 16,17 MHz 49 RT9026 667/800/1066MHz@1.05V 48 OUTPUTS VCC_GFXCORE 0~1.3V 6.5A G1454R INT.SPKR 31 B LPC BUS 1.5W PCB STACKUP TOP 32 Line Out (SPDIF) MODEM MDC Card RJ11 USB SATA Mini USB Blue Tooth HDD SATA 22 34 SATA Finger Printer ODD SATA 24 SATA ESATA KBC Winbond Camera 26 41 19 USB Port WPCE773LA0DG 39 27 Touch Pad 41 SPI BIOS (2MB) 40 LPC GND DEBUG CONN.40 S S MEDIA KEY 42 GND BOTTOM INT KB 39 25 SATA 2nd HDD 23 A A UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title BLOCK DIAGRAM Size A2 Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 Sheet of 55 A B ICH9M Functional Strap Definitions ICH9 EDS 642879 Rev.1.5 ICH9M Integrated Pull-up and Pull-down Resistors Usage/When Sampled HDA_SDOUT XOR Chain Entrance/ PCIE Port Config1 bit1, Rising Edge of PWROK Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h) This signal has weak internal pull-down CL_CLK[1:0] PULL-UP 20K CL_DATA[1:0] PULL-UP 20K HDA_SYNC PCIE config1 bit0, Rising Edge of PWROK This signal has a weak internal pull-down Sets bit0 of RPC.PC(Config Registers:Offset 224h) CL_RST0# PULL-UP 20K GNT2#/ GPIO53 PCIE config2 bit2, Rising Edge of PWROK DPRSLPVR/GPIO16 PULL-DOWN 20K ENERGY_DETECT PULL-UP 20K GPIO20 Reserved This signal has a weak internal pull-up Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) This signal should not be pulled high HDA_BIT_CLK PULL-DOWN 20K GNT1#/ GPIO51 ESI Strap (Server Only) Rising Edge of PWROK HDA_DOCK_EN#/GPIO33 PULL-UP 20K HDA_RST# PULL-DOWN 20K HDA_SDIN[3:0] PULL-DOWN 20K HDA_SDOUT PULL-DOWN 20K GNT0#: SPI_CS1#/ GPIO58 SPI_MOSI GPIO49 SATALED# SPKR TP3 GPIO33/ HDA_DOCK _EN# page 92 D Signal GNT3#/ GPIO55 C Top-Block Swap Override Rising Edge of PWROK Comment ESI compatible mode is for server platforms only This signal should not be pulled low for desttop and mobile Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space) Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down ICH9 EDS 642879 SIGNAL GLAN_DOCK# GNT[3:0]#/GPIO[55,53,51] PULL-UP 20K GPIO[20] PULL-DOWN 20K Integrated TPM Enable, Rising Edge of CLPWROK Sample low: the Integrated TPM will be disabled Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable GPIO[49] PULL-UP 20K LDA[3:0]#/FHW[3:0]# PULL-UP 20K LAN_RXD[2:0] PULL-UP 20K LDRQ[0] PULL-UP 20K LDRQ[1]/GPIO23 PULL-UP 20K PME# PULL-UP 20K PWRBTN# PULL-UP 20K PCI Express Lane Reversal Rising Edge of PWROK Signal has weak internal pull-up Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8) SATALED# PULL-UP 15K No Reboot Rising Edge of PWROK If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timer system reboot feature) The status is readable via the NO REBOOT bit SPI_CS1#/GPIO58/CLGPIO6 PULL-UP 20K SPI_MOSI PULL-DOWN 20K SPI_MISO PULL-UP 20K This signal should not be pull low unless using XOR Chain testing SPKR PULL-DOWN 20K TACH_[3:0] PULL-UP 20K TP[3] PULL-UP 20K USB[11:0][P,N] PULL-DOWN 15K Flash Descriptor Security Override Strap Rising Edge of PWROK Sampled low:the Flash Descriptor Security will be overridden If high,the security measures will be in effect.This should only be enabled in manufacturing environments using an external pull-up resister Pin Name CFG[2:0] CFG[4:3] CFG8 CFG[15:14] CFG[18:17] Strap Description FSB Frequency Select 0.5 Configuration 000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved Reserved CFG5 DMI x2 Select CFG6 iTPM Host Interface = DMI x2 = DMI x4 (Default) 0= The iTPM Host Interface is enabled(Note2) 1=The iTPM Host Interface is disalbed(default) = Transport Layer Security (TLS) cipher suite with no confidentiality = TLS cipher suite with confidentiality (default) CFG7 Intel Management engine Crypto strap CFG9 PCIE Graphics Lane = Reverse Lanes,15->0,14->1 ect 1= Normal operation(Default):Lane Numbered in order CFG10 PCIE Loopback enable = Enable (Note 3) 1= Disabled (default) PULL-DOWN 20K Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10) GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC XOR Chain Entrance Rising Edge of PWROK page 218 The pull-up or pull-down active when configured for native GLAN_DOCK# functionality and determined by LAN controller Boot BIOS Destination Selection 0:1 Rising Edge of PWROK DMI Termination Voltage, The signal is required to be low for desktop Rising Edge of PWROK applications and required to be high for mobile applications Montevina Platform Design guide 22339 Rev.1.5 Resistor Type/Value HDA_SYNC E Cantiga chipset and ICH9M I/O controller Hub strapping configuration CFG[13:12] CFG16 CFG19 00 10 01 11 XOR/ALL = = = = Reserve XOR mode Enabled ALLZ mode Enabled (Note 3) Disabled (default) FSB Dynamic ODT = Dynamic ODT Disabled = Dynamic ODT Enabled (Default) DMI Lane Reversal = Normal operation(Default): Lane Numbered in Order = Reverse Lanes DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3) DMI x2 mode[MCH -> ICH]:(3->0,2->1) CFG20 Digital Display Port (SDVO/DP/iHDMI) Concurrent with PCIe = Only Digital Display Port or PCIE is operational (Default) =Digital display Port and PCIe are operting simulataneously via the PEG port =No SDVO Card Present (Default) SDVO_CTRLDATA SDVO Present = SDVO Card Present = LFP Disabled (Default) L_DDC_DATA Local Flat Panel (LFP) Present 1= LFP Card Present; PCIE disabled NOTE: All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware This 'Soft-Strap' is activated only after enabling iTPM via CFG6 Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Reference Size A3 Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 Sheet of 55 A B C D E 3D3V_S0 R402 0R0603-PAD C239 C250 2 2 2 2 2 2 C226 SCD1U16V2ZY-2GP C566 SCD1U16V2ZY-2GP SC4D7U6D3V3KX-GP 3D3V_48MPWR_S0 3D3V_CLKGEN_S0 C582 SCD1U16V2ZY-2GP C576 SCD1U16V2ZY-2GP C569 SCD1U16V2ZY-2GP 3D3V_CLKGEN_S0 C554 SC4D7U10V5ZY-3GP C557 SCD1U16V2ZY-2GP C199 SCD1U16V2ZY-2GP DY R393 Do Not Stuff C580 SCD1U16V2ZY-2GP 3D3V_S0 C581 SCD1U16V2ZY-2GP 3D3V_CLKPLL_S0 C222 SCD1U16V2ZY-2GP SC1U16V3ZY-GP Do Not Stuff R384 0R0603-PAD C555 C560 SCD1U16V2ZY-2GP C556 SCD1U16V2ZY-2GP 3D3V_48MPWR_S0 R383 0R0603-PAD 1D05V_S0 3D3V_S0 3D3V_CLKPLL_S0 2008.12.08 SB CL=20pF±0.2pF C260 GEN_XTAL_IN 1 SC33P50V2JN-3GP C238 X2 R158 DY Do Not Stuff R157 0R0402-PAD X-14D31818M-44GP 35 CLK48_Cardreader 13 CLK48_ICH 4,7 CPU_SEL0 GEN_XTAL_OUT_R GEN_XTAL_OUT R378 R381 R374 22R2J-2-GP 22R2J-2-GP 2K2R2J-2-GP CLK48 17 19 27 43 52 33 56 VDD96_IO VDDPLL3_IO VDDSRC_IO VDDSRC_IO VDDSRC_IO VDDCPU_IO VDDREF VDD48 VDDPCI VDDSRC VDDCPU VDDPLL3 U54 16 46 62 23 DY X1 X2 15,16,17 SMBC_ICH 15,16,17 SMBD_ICH Do Not Stuff RN56 13 CLK_ICH14 39 PCLK_KBC 13 PCLK_ICH 13 CLK_PWRGD CPU_SEL2_R PCLKCLK4 PCLKCLK5 40 PCLK_FWH SRN33J-7-GP CK_PWRGD/PD# 10 11 12 13 14 PCI0/CR#_A PCI1/CR#_B PCI2/TME PCI3 PCI4/27_SELECT PCI_F5/ITP_EN 64 FSLB/TEST_MODE REF0/FSLC/TEST_SEL CPU_SEL2_R 55 NC#55 GND48 GNDPCI GNDREF DY 2 2 PCLKCLK2 22R2J-2-GP PCLKCLK3 PCLKCLK4 PCLKCLK5 Do Not Stuff DY Do Not Stuff SC10P50V2JN-4GP 4,7 CPU_SEL1 63 DY R403 EC56 EC61 EC59 EC57 DY Do Not Stuff CLK48 PCLKCLK2 PCLKCLK4 PCLKCLK5 R399 TP150 AFTE14P-GP SCLK SDATA 71.09365.A03 EMI capacitor CPUT1_F CPUC1_F 58 57 CLK_MCH_BCLK CLK_MCH_BCLK# CPUT2_ITP/SRCT8 CPUC2_ITP/SRCC8 54 53 CLK_PCIE_ICH 13 CLK_PCIE_ICH# 13 SRCT7/CR#_F SRCC7/CR#_E 51 50 CLK_PCIE_NEW 36 CLK_PCIE_NEW# 36 SRCT6 SRCC6 48 47 CLK_PCIE_MINI1 37 CLK_PCIE_MINI1# 37 SRCT10 SRCC10 41 42 CLK_PCIE_LAN 28 CLK_PCIE_LAN# 28 SRCT11/CR#_H SRCC11/CR#_G 40 39 SRCT9 SRCC9 37 38 CLK_PCIE_PEG 18 CLK_PCIE_PEG# 18 SRCT4 SRCC4 34 35 CLK_MCH_3GPLL CLK_MCH_3GPLL# SRCT3/CR#_C SRCC3/CR#_D 31 32 CLK_PCIE_MINI2 37 CLK_PCIE_MINI2# 37 SRCT2/SATAT SRCC2/SATAC 28 29 CLK_PCIE_SATA 12 CLK_PCIE_SATA# 12 UMA 27MHZ_NONSS/SRCT1/SE1 27MHZ_SS/SRCC1/SE2 24 25 DREFSSCLK_1 DREFSSCLK_1# RN52 SRN0J-6-GP DREFSSCLK DREFSSCLK# SRCT0/DOTT_96 SRCC0/DOTC_96 20 21 DREFCLK_1 DREFCLK_1# RN53 SRN0J-6-GP DREFCLK DREFCLK# GND 3D3V_S0 SRN10KJ-6-GP CLK_CPU_BCLK CLK_CPU_BCLK# UMA 65 PCLKCLK2 CPU_SEL2_R PCLKCLK4 PCLKCLK5 PCI_STOP# CPU_STOP# GND GNDSRC GNDSRC GNDSRC GNDCPU GND RN57 4,7 CPU_SEL2 45 44 18 15 13 PM_STPPCI# 13 PM_STPCPU# 22 30 36 49 59 26 82.30005.951 2nd = 82.30005.891 61 60 USB_48MHZ/FSLA SC27P50V2JN-2-GP 3D3V_S0 CPUT0 CPUC0 ICS9LPRS365BKLFT-GP-U 2nd = 71.08513.003 ICS9LPRS365YGLFT setting table PIN NAME DESCRIPTION PCI0/CR#_A Byte 5, bit = PCI0 enabled (default) 1= CR#_A enabled Byte 5, bit controls whether CR#_A controls SRC0 or SRC2 pair Byte 5, bit = CR#_A controls SRC0 pair (default), 1= CR#_A controls SRC2 pair PCI1/CR#_B Byte 5, bit = PCI1 enabled (default) 1= CR#_B enabled Byte 5, bit controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit = CR#_B controls SRC1 pair (default) 1= CR#_B controls SRC4 pair PCI2/TME = Overclocking of CPU and SRC Allowed = Overclocking of CPU and SRC NOT allowed PCI3 PCI4/27M_SEL = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0# PCI_F5/ITP_EN =SRC8/SRC8# = ITP/ITP# SRCT3/CR#_C Byte 5, bit = SRC3 enabled (default) 1= CR#_C enabled Byte 5, bit controls whether CR#_C controls SRC0 or SRC2 pair Byte 5, bit = CR#_C controls SRC0 pair (default), 1= CR#_C controls SRC2 pair SEL2 SEL1 SEL0 FSC FSB FSA PIN NAME DESCRIPTION SRCC3/CR#_D Byte 5, bit = SRC3 enabled (default) 1= CR#_D enabled Byte 5, bit controls whether CR#_D controls SRC1 or SRC4 pair Byte 5, bit 0 = CR#_D controls SRC1 pair (default) 1= CR#_D controls SRC4 pair SRCC7/CR#_E Byte 6, bit = SRC7# enabled (default) 1= CR#_F controls SRC6 SRCT7/CR#_F Byte 6, bit = SRC7 enabled (default) 1= CR#_F controls SRC8 SRCC11/CR#_G Byte 6, bit = SRC11# enabled (default) 1= CR#_G controls SRC9 SRCT11/CR#_H Byte 6, bit = SRC11 enabled (default) 1= CR#_H controls SRC10 0 0 0 1 1 0 B C FSB 100M 133M 166M 200M 266M X 533M 667M 800M 1067M UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Clock Generator Size Document Number Rev JM70-MV Date: Saturday, December 20, 2008 A CPU D Sheet E SB of 55 A B C D E H_A#[35 3] H_DINV#[3 0] B1 QC = 64.49R95.6DL BPM0# BPM1# BPM2# BPM3# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR# PROCHOT# THRMDA THRMDC STPCLK# LINT0 LINT1 SMI# THERMTRIP# AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 H_DSTBN#0 H_DSTBP#0 H_DINV#0 D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0# H_DSTBN#1 H_DSTBP#1 H_DINV#1 H_D#16 N22 H_D#17 K25 H_D#18 P26 H_D#19 R23 H_D#20 L23 H_D#21 M24 H_D#22 L22 H_D#23 M23 H_D#24 P25 H_D#25 P23 H_D#26 P22 H_D#27 T24 H_D#28 R24 H_D#29 L25 H_D#30 T25 H_D#31 N25 L26 M26 N24 D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1# H_THERMDA H_THERMDC XDP_BPM#5 XDP_TCK XDP_TDI TP52 AFTE14P-GP TP53 AFTE14P-GP 1D05V_S0 TP56 AFTE14P-GP XDP_TMS XDP_TRST# XDP_DBRESET# TP55 AFTE14P-GP TP54 AFTE14P-GP TP93 AFTE14P-GP C514 Do Not Stuff DY Close to CPU R111 68R2-GP HCLK BCLK0 BCLK1 CPU_PROCHOT#_2 D21 A24 B25 C7 H_D#[63 0] H_THERMDA 38 H_THERMDC 38 PM_THRMTRIP-A#_CPU 1 R112 Do Not Stuff R362 Do Not Stuff 51 PM_THRMTRIP-A# 7,12,44 PM_THRMTRIP# ICH9 and MCH PH @ page48 0R2J-2-GP R119 CLK_CPU_BCLK CLK_CPU_BCLK# A22 A21 CPU_PROCHOT#_R DY should connect to without T-ing 1D05V_S0 DY QC = 64.10005.6DL Layout Note: "CPU_GTLREF0" 0.5" max length 1KR2F-3-GP R81 R79 2KR2F-3-GP QC = 64.17415.6DL KEY_NC CPU_GTLREF0 DY TEST1 TEST2 C128 TEST4 AD26 C23 D25 C24 AF26 AF1 A26 B22 B23 C21 3,7 CPU_SEL0 3,7 CPU_SEL1 3,7 CPU_SEL2 62.10079.001 2nd = 62.10053.401 GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 MISC BSEL0 BSEL1 BSEL2 D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DSTBN2# DSTBP2# DINV2# Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DSTBN3# DSTBP3# DINV3# AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 COMP0 COMP1 COMP2 COMP3 R26 U26 AA1 Y1 DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI# E5 B5 D24 D6 D7 AE6 H_DSTBN#2 H_DSTBP#2 H_DINV#2 H_DSTBN#3 H_DSTBP#3 H_DINV#3 COMP0 COMP1 COMP2 COMP3 R3051 R2881 R80 R82 H_DPRSTP# 7,12,51 H_DPSLP# 12 H_DPWR# Do Not Stuff DY XDP FOR QUAD CORE CPU XDP_TMS R74 54D9R2F-L1-GP XDP_TDI R78 54D9R2F-L1-GP XDP_BPM#5 R71 54D9R2F-L1-GP H_CPURST# R106 1D05V_S0 R103 1 DY Do Not Stuff R100 TDI_TDO_M DY Do Not Stuff TDI_1 DY Do Not Stuff TDO_2 R86 DY Do Not Stuff R105 XDP_DBRESET# R116 R94 DY Do Not Stuff DY Do Not Stuff TEST1 Do Not Stuff DY TEST2 R113 Do Not Stuff C428 2DY DY 3D3V_S0 TEST4 Do Not Stuff Net "TEST4" as short as possible, make sure "TEST4" routing is reference to GND and away other noisy signals H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGD H_CPUSLP# H_INIT# H_CPURST# Do Not Stuff XDP_TCK R73 54D9R2F-L1-GP XDP_TRST# R70 54D9R2F-L1-GP -BPM1_1 R107 Layout Note: Comp0, connect with Zo=27.4 ohm, make trace length shorter than 0.5" Comp1, connect with Zo=55 ohm, make trace length shorter than 0.5" Do Not Stuff DY -BPM1_0 DY R114 1 1 1 TP108 TP99 TP95 TP86 TP96 TP98 TP89 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP Place these TP on button-side, easy to measure UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title CPU (1 of 2) Size All place within 2" to CPU -BPM1_2 Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 A B H_PWRGD 12,44 BGA479-SKT6-GPU6 1D05V_S0 QC = 64.24R95.6DL QC = 64.49R95.6DL QC = 64.24R95.6DL QC = 64.49R95.6DL H_CPUSLP# H_PSI# 51 C467 DY 27D4R2F-L1-GP 54D9R2F-L1-GP 27D4R2F-L1-GP 54D9R2F-L1-GP 2 2 C181 Close to CPU 38 H_THC_Q OF E22 F24 E26 G22 F23 G25 E25 E23 K24 G24 J24 J23 H22 F26 K22 H23 J26 H26 H25 H_TRDY# H_HIT# H_HITM# BGA479-SKT6-GPU6 38 H_THA_Q H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 DATA GRP2 G6 E4 CPU1B DATA GRP3 HIT# HITM# H_RS#0 H_RS#1 H_RS#2 C1 F3 F4 G3 G2 H_INIT# 12 H_LOCK# H_CPURST# 6,54 H_RS#[2 0] RESET# RS0# RS1# RS2# TRDY# H_DSTBP#[3 0] H_IERR# H4 LOCK# H_DSTBN#[3 0] AFTE14P-GP TP90 AFTE14P-GP TP94 H_GTUREF_2 H_BREQ#0 F1 D20 B3 Do Not Stuff 38 H_THA_Q 38 H_THC_Q BR0# IERR# INIT# THERMAL A20M# FERR# IGNNE# RSVD#M4 RSVD#N5 RSVD#T2 RSVD#V3 RSVD#B2 RSVD#C3 RSVD#D2 RSVD#D22 RSVD#D3 RSVD#F6 R110 56R2J-4-GP H_D#[63 0] Place testpoint on H_IERR# with a GND 0.1" away -BPM1_1 M4 -BPM1_0 N5 H_THA_Q T2 H_THC_Q V3 -BPM1_2 B2 C3 1RSVD_CPU_C3 D2 1RSVD_CPU_D2 D22 TDO_2 D3 TDI_1 F6 H_DEFER# H_DRDY# H_DBSY# 1 2H_STPCLK#_RD5 0R2J-2-GP C6 B4 A3 H5 F21 E1 12 H_STPCLK# 12 H_INTR 12 H_NMI 12 H_SMI# R115 H_ADS# H_BNR# H_BPRI# DATA GRP1 12 H_A20M# 12 H_FERR# 12 H_IGNNE# A6 A5 C4 A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# ADSTB1# ICH H_ADSTB#1 Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 DEFER# DRDY# DBSY# REQ0# REQ1# REQ2# REQ3# REQ4# ADDR GROUP H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_DSTBP#[3 0] 1D05V_S0 H1 E2 G5 DATA GRP0 H_REQ#0 K3 H_REQ#1 H2 H_REQ#2 K2 H_REQ#3 J3 H_REQ#4 L1 ADS# BNR# BPRI# XDP/ITP SIGNALS H_ADSTB#0 H_REQ#[4 0] A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB0# RESERVED J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1 H_DINV#[3 0] H_DSTBN#[3 0] TP85 AFTE14P-GP ADDR GROUP H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 OF CONTROL CPU1A Do Not Stuff H_A#[35 3] C D Sheet E of 55 A B C DY QC = 64.10015.6DL waiting QUAD CORE symbol 1D05V_S0 DY Do Not Stuff 3D3V_S5 GQ8 S QC = 84.00138.F31 R96 R102 Do Not Stuff DY Do Not Stuff DY ACLKPH_2 QC = 63.10334.1DL B26 C26 VID0 VID1 VID2 VID3 VID4 VID5 VID6 AD6 AF5 AE5 AF4 AE3 AF3 AE2 VCCSENSE AF7 VCC_SENSE_1 AE7 VSS_SENSE_1 DY DY GTLREF_Control C R95 Do Not Stuff QC = 63.10334.1DL GAP-CLOSE-PWR R92 QC = 63.R0034.1DL DCLKPH_2 layout note: "1D5V_VCCA_S0" as short as possible 2 C140 R91 0R2J-2-GP 1D5V_S0 1 DY Do Not Stuff C171 100R2F-L1-GP-U R67 C510 QC = DY FCM1608KF-1-GP L12 C5022nd = 68.00248.061 SC10U6D3V5MX-3GP 51 H_VID[6 0] VCC_CORE H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 SCD01U16V2KX-3GP 1D5V_VCCA_S0 R63 0R2J-2-GP QC VCC_SENSE 51 R64 0R2J-2-GP Layout Note: VSS_SENSE 51 = 64.12115.6DL QC = 64.12115.6DL R68 2 Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line C158 Do Not Stuff C146 SC4D7U6D3V3KX-GP DY C143 Do Not Stuff DY C154 SCD1U10V2KX-4GP C159 SCD1U10V2KX-4GP C139 Do Not Stuff 1D05V_S0 VCCSENSE and VSSSENSE lines should be of equal length 100R2F-L1-GP-U BGA479-SKT6-GPU6 CPU TYPE TABLE HFPLL_2 R75 TEST55 0R2J-2-GP VCCA VCCA E G8 G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 Q7 B Do Not Stuff 1D05V_S0 R108 0R2J-2-GP QC = 84.T3904.C11 1D05V_S0_CPU 0R2J-2-GP QC = 63.10434.1DL DY Do Not Stuff D QC = 64.17415.6DL R104 H_GTUREF_2 P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25 1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AFTE14P-GP TP48 OF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS CPU1D A4 A8 A11 A14 A16 A19 A23 AF2 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3 R72 2 2 C138 SC10U6D3V5MX-3GP C131 SC10U6D3V5MX-3GP C183 SC10U6D3V5MX-3GP C168 SC10U6D3V5MX-3GP C176 SC10U6D3V5MX-3GP C182 SC10U6D3V5MX-3GP C185 SC10U6D3V5MX-3GP C120 SC10U6D3V5MX-3GP C184 SC10U6D3V5MX-3GP C123 SC10U6D3V5MX-3GP C119 SC10U6D3V5MX-3GP C175 SC10U6D3V5MX-3GP C121 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP C122 R99 Do Not Stuff VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VSSSENSE C129 1D05V_S0 SCD1U10V2KX-4GP VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC SCD1U10V2KX-4GP AA7 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 C173 SCD1U10V2KX-4GP 3 OF C130 SCD1U10V2KX-4GP CPU1C A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18 SCD1U10V2KX-4GP SCD1U10V2KX-4GP VCC_CORE C133 C132 VCC_CORE E VCC_CORE VCC_CORE D TP47 AFTE14P-GP 1 TP51 AFTE14P-GP TP107 AFTE14P-GP 1 TP103 AFTE14P-GP TP50 AFTE14P-GP BGA479-SKT6-GPU6 CPU GTLREF_CONTROL H_GTLREF GND PIN 0V DAUL CORE VCC_CORE AA7 R76 QUAD CORE 0R2J-2-GP FLOATING PIN Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C 0.63*VTT Title QC = DY CPU (2 of 2) Size DY Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 A B C D Sheet E of 55 1 OF 10 NB1A H_A#[35 3] H_D#[63 0] H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 1D05V_S0 H_SWING routing Trace width and Spacing use 10 / 20 mil D R126 221R2F-2-GP H_SWING Resistors and Capacitors close MCH 500 mil ( MAX ) R125 100R2F-L1-GP-U 2 C192 SCD1U10V2KX-4GP H_SWING QC = 64.75R05.6DL C H_RCOMP routing Trace width and Spacing use 10 / 20 mil R132 H_RCOMP 24D9R2F-L-GP QC = 64.16R95.6DL Place them near to the chip ( < 0.5") B F2 G8 F8 E6 G2 H6 H2 F6 D4 H3 M9 M11 J1 J2 N12 J6 P2 L2 R2 N9 L6 M5 J3 N2 R1 N5 N6 P13 N8 L7 N10 M3 Y3 AD14 Y6 Y10 Y12 Y14 Y7 W2 AA8 Y9 AA13 AA9 AA11 AD11 AD10 AD13 AE12 AE9 AA2 AD8 AA3 AD3 AD7 AE14 AF3 AC1 AE3 AC3 AE11 AE8 AG2 AD6 H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63 HOST H_D#[63 0] R123 1KR2F-3-GP 4,54 H_CPURST# H_CPUSLP# H_AVREF C189 H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_BNR# H_BPRI# H_BREQ# H_DEFER# H_DBSY# HPLL_CLK HPLL_CLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9 H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 J8 L3 Y13 Y1 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 L10 M7 AA5 AE6 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 L9 M8 AA6 AE5 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_SWING H_RCOMP H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 B15 K13 F13 B13 B14 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_CPURST# H_CPUSLP# H_RS#_0 H_RS#_1 H_RS#_2 B6 F12 C8 H_RS#0 H_RS#1 H_RS#2 H_AVREF H_DVREF H_A#[35 3] D H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BREQ#0 H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# H_DSTBN#[3 0] H_DSTBP#[3 0] C H_DINV#[3 0] H_DSTBN#[3 0] H_DSTBP#[3 0] H_REQ#[4 0] H_RS#[2 0] B 4 CANTIGA-GM-GP-U-NF 71.CNTIG.00U 2 C12 E11 A11 B11 SCD1U16V2ZY-2GP R121 2KR2F-3-GP C5 E3 A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20 H_DINV#[3 0] 1D05V_S0 H_SWING H_RCOMP H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35 UMA A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size Document Number Cantiga (1 of 6) JM70-MV Date: Saturday, December 20, 2008 Sheet Rev SB of 55 2 OF 10 NB1B M_RCOMPP CFG16 M_RCOMPN CFG20 3D3V_S0 13,38 PWROK DY Do Not Stuff CFG9 13,18,28,36,37,39,40 PLT_RST1# 100R2J-2-GP R160 C257 R129 Do Not Stuff DY Do Not Stuff CFG16 DY 2008.12.08 SB R260 R141 4,12,44 PM_THRMTRIP-A# 0R2J-2-GP B 2PM_DPRSLPVR_MCH 0R2J-2-GP R139 BG48 BF48 BD48 BC48 BH47 BG47 BE47 BH46 BF46 BG45 BH44 BH43 BH6 BH5 BG4 BH3 BF3 BH2 BG2 BE2 BG1 BF1 BD1 BC1 F1 A47 NC#BG48 NC#BF48 NC#BD48 NC#BC48 NC#BH47 NC#BG47 NC#BE47 NC#BH46 NC#BF46 NC#BG45 NC#BH44 NC#BH43 NC#BH6 NC#BH5 NC#BG4 NC#BH3 NC#BF3 NC#BH2 NC#BG2 NC#BE2 NC#BG1 NC#BF1 NC#BD1 NC#BC1 NC#F1 NC#A47 NC 13,51 PM_DPRSLPVR PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR PM_EXTTS#0 PM_EXTTS#1 PM R29 B7 N33 P32 AT40 RSTIN# AT11 NB_THERMTRIP# T20 PM_DPRSLPVR_MCH R32 13 PM_SYNC# 4,12,51 H_DPRSTP# 16,17 PM_EXTTS#0 16 16 17 17 SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1 BD17 AY17 BF15 AY13 M_ODT0 M_ODT1 M_ODT2 M_ODT3 16 16 17 17 SM_RCOMP SM_RCOMP# BG22 BH21 M_RCOMPP M_RCOMPN SM_RCOMP_VOH SM_RCOMP_VOL BF28 BH28 SM_RCOMP_VOH SM_RCOMP_VOL SM_VREF SM_PWROK SM_REXT SM_DRAMRST# AV42 AR36 BF17 BC36 DDR2 : connect to GND SM_REXT R1701 499R2F-2-GP DDR3_DRAMRST# 16,17 19 19 19 19 SM_PWROK 44 DDR_VREF_S3_1 C274 0.75V DREFCLK DREFCLK# DREFSSCLK DREFSSCLK# CLK_MCH_3GPLL CLK_MCH_3GPLL# DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 AE41 AE37 AE47 AH39 DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3 AE40 AE38 AE48 AH40 DMI_TXP0 13 DMI_TXP1 13 DMI_TXP2 13 DMI_TXP3 13 DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 AE35 AE43 AE46 AH42 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3 AD35 AE44 AF46 AH43 DMI_RXP0 13 DMI_RXP1 13 DMI_RXP2 13 DMI_RXP3 13 GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4 B33 B32 G33 F33 E33 19 GMCH_TXAOUT019 GMCH_TXAOUT119 GMCH_TXAOUT2- H47 E46 G40 A40 LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3 19 GMCH_TXAOUT0+ 19 GMCH_TXAOUT1+ 19 GMCH_TXAOUT2+ H48 D45 F40 B40 LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3 19 GMCH_TXBOUT019 GMCH_TXBOUT119 GMCH_TXBOUT2- A41 H38 G37 J37 LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3 19 GMCH_TXBOUT0+ 19 GMCH_TXBOUT1+ 19 GMCH_TXBOUT2+ B42 G38 F37 K37 LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3 F25 H25 K25 TVA_DAC TVB_DAC TVC_DAC H24 TV_RTN C31 E32 TV_DCONSEL_0 TV_DCONSEL_1 GMCH_BLUE E28 CRT_BLUE GMCH_GREEN G28 CRT_GREEN TV_DACA TV_DACB TV_DACC 13 13 13 13 20 GMCH_BLUE 13 13 13 13 20 GMCH_GREEN GMCH_RED 20 GMCH_RED GMCH_DDCCLK GMCH_DDCDATA 20 GMCH_DDCCLK 20 GMCH_DDCDATA 20 GMCH_HSYNC 20 GMCH_VSYNC GFX_VID[4 0] GFX_VR_EN C34 48 CL_CLK CL_DATA CL_PWROK CL_RST# CL_VREF AH37 AH36 AN36 AJ35 AH34 DDPC_CTRLCLK DDPC_CTRLDATA SDVO_CTRLCLK SDVO_CTRLDATA CLKREQ# ICH_SYNC# N28 M28 G36 E36 K36 H36 TSATN# B12 CRT_RED CRT_IRTN H32 J32 J29 E29 L29 CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC Close to GMCH as 500 mils PEG_COMPI PEG_COMPO PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15 H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39 PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15 PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40 PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15 PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15 J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46 PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15 J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46 49D9R2F-GP PEG_RXN[15 0] D PEG_RXP[15 0] 18 PEG_TXN[15 0] 18 PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15 C PEG_TXP[15 0] 18 PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15 CANTIGA-GM-GP-U-NF 71.CNTIG.00U FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm CRT_IREF routing Trace width use 20 mil GFXVR_EN R152 1KR2F-3-GP CL_CLK0 13 CL_DATA0 13 PWROK 13,38 CL_RST#0 13 MCH_CLVREF UMA UMA UMA UMA PEG_TXN01 PEG_TXN11 PEG_TXN21 PEG_TXN31 2 2 SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP HDMI_DATA2- 21 HDMI_DATA1- 21 HDMI_DATA0- 21 HDMI_CLK- 21 UMA UMA UMA UMA PEG_TXP01 PEG_TXP11 PEG_TXP21 PEG_TXP31 C108 SCD1U10V2KX-5GP C110 SCD1U10V2KX-5GP C109 SCD1U10V2KX-5GP C113 SCD1U10V2KX-5GP HDMI_DATA2+ 21 HDMI_DATA1+ 21 HDMI_DATA0+ 21 HDMI_CLK+ 21 PEG_RXP3 0R2J-2-GP R77 C107 C112 C111 C114 HDMI_DETECT# 21 UMA RN26 C243 for HDMI port C GMCH_HDMI_CLK 21 GMCH_HDMI_DATA 21 MCH_ICH_SYNC# 13 MCH_TSATN# GMCH_BL_ON GMCH_LCDVDD_ON R156 499R2F-2-GP HDA_BCLK HDA_RST# HDA_SDI HDA_SDO HDA_SYNC B28 B30 B29 C29 A28 HDA_BCLK HDA_RST# HDA_SDI HDA_SDO HDA_SYNC R120 UMA LIBG FOR Cantiga:500 ohm Teenah: 392 ohm ACZ_SDIN3 DIS 12 RN22 ACZ_SYNC_R 12 ACZ_BIT_CLK 12 ACZ_SDATAOUT_R 12 ACZ_RST#_R 12 Do Not Stuff DREFSSCLK DREFSSCLK# Do Not Stuff 1 SCD01U16V2KX-3GP 2 C277 UMA SCD01U16V2KX-3GP 2 C289 FOR Discrete change RN to ohm (66.R0036.A8L) RN27 SC2D2U6D3V3MX-1-GP TV_DACC TV_DACB TV_DACA C290 SRN75J-1-GP SC2D2U6D3V3MX-1-GP UMA A FOR Discrete,change to ohm (66.R0036.A8L) SRN150J-1-GP C282 SM_RCOMP_VOL R178 1KR2F-3-GP GFXVR_EN 48 RN25 SM_RCOMP_VOH R174 3K01R2F-3-GP DY RN21 DREFCLK DREFCLK# DY R167 1KR2F-3-GP MCH_TSATN# GMCH_RED GMCH_GREEN GMCH_BLUE DY 1D5V_S3 GFXVR_EN R124 Do Not Stuff layout take note UMA LCTLA_CLK LCTLB_DATA PM_EXTTS#0 PM_EXTTS#1 SRN10KJ-5-GP RN23 Do Not Stuff 33R2J-2-GP 1D05V_S0 A B RN20 2008.11.27 SB SRN33J-7-GP R122 56R2J-4-GP R127 2UMA 2K37R2F-GP CRT_IREF RN19 HDA_SYNC HDA_BCLK HDA_SDO HDA_RST# UMA SRN100KJ-6-GP UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Cantiga (2 of 6) Size SRN10KJ-5-GP Document Number Rev SB JM70-MV Date: 18 GMCH_VSYNC GMCH_HSYNC 71.CNTIG.00U 3D3V_S0 J28 G29 CRT_IREF UMA R128 1K02R2F-1-GP GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 1D05V_S0 CANTIGA-GM-GP-U-NF RN24 L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK GRAPHICS M_CS0# M_CS1# M_CS2# M_CS3# GMCH_LCDVDD_ON M29 LIBG C44 B43 E37 E38 C41 GMCH_TXACLKC40 GMCH_TXACLK+ B37 GMCH_TXBCLKA37 GMCH_TXBCLK+ 19 GMCH_LCDVDD_ON PCI-EXPRESS BA17 AY16 AV16 AR13 L_CTRL_DATA L_DDC_CLK L_DDC_DATA PEG_CMP R142 T37 T36 CFG20 ME Do Not Stuff MISC DY SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1 F43 E43 HDA R130 R182 80D6R2F-L-GP 16 16 17 17 19 CLK_DDC_EDID 19 DAT_DDC_EDID M33 K33 J33 VGA R181 80D6R2F-L-GP CFG CFG9 M_CKE0 M_CKE1 M_CKE2 M_CKE3 PEG_CLK PEG_CLK# DMI 1D5V_S3 BC28 AY28 AY36 BB36 B38 A38 E41 F41 GRAPHICS VID C CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20 SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1 16 16 17 17 LCTLB_DATA CLK_DDC_EDID DAT_DDC_EDID TV T25 R25 P25 P20 P24 C25 N24 M24 E21 C23 C24 N21 P21 T21 R20 M20 L21 H21 P29 R28 T28 3,4 CPU_SEL0 3,4 CPU_SEL1 3,4 CPU_SEL2 M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3 DPLL_REF_CLK DPLL_REF_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK# CLK RESERVED#BG23 RESERVED#BF23 RESERVED#BH18 RESERVED#BF18 AR24 AR21 AU24 AV20 L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK BG23 BF23 BH18 BF18 SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1 LCTLA_CLK L32 G32 M32 RESERVED#AY21 19 L_BKLTCTL 39 GMCH_BL_ON LVDS AY21 M_CLK_DDR0 16 M_CLK_DDR1 16 M_CLK_DDR2 17 M_CLK_DDR3 17 RESERVED#B31 RESERVED#B2 RESERVED#M1 AP24 AT21 AV24 AU20 SCD1U10V2KX-4GP B31 B2 M1 RSVD D SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1 SCD1U10V2KX-4GP DDR CLK/ CONTROL/COMPENSATION RESERVED#M36 RESERVED#N36 RESERVED#R33 RESERVED#T33 RESERVED#AH9 RESERVED#AH10 RESERVED#AH12 RESERVED#AH13 RESERVED#K12 RESERVED#AL34 RESERVED#AK34 RESERVED#AN35 RESERVED#AM35 RESERVED#T24 1D05V_S0 OF 10 NB1C M36 N36 R33 T33 AH9 AH10 AH12 AH13 K12 AL34 AK34 AN35 AM35 T24 Saturday, December 20, 2008 Sheet of 55 B SA_RAS# SA_CAS# SA_WE# BB20 BD20 AY20 M_A_RAS# 16 M_A_CAS# 16 M_A_WE# 16 SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7 AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7 AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_DQS[7 0] M_A_DQS#[7 0] M_A_A[14 0] M_A_DM[7 0] 16 M_A_DQS[7 0] 16 M_A_DQS#[7 0] 16 M_A_A[14 0] 16 M_B_DQ[63 0] M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 AK47 AH46 AP47 AP46 AJ46 AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43 BF43 BE45 BC41 BF40 BF41 BG38 BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11 BG8 BH12 BF11 BF8 BG7 BC5 BC6 AY3 AY1 BF6 BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1 AL1 AL2 AJ1 AH1 AM2 AM3 AH3 AJ3 OF 10 SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63 SB_BS_0 SB_BS_1 SB_BS_2 BC16 BB17 BB33 SB_RAS# SB_CAS# SB_WE# AU17 BG16 BF14 M_B_BS#0 17 M_B_BS#1 17 M_B_BS#2 17 M_B_RAS# 17 M_B_CAS# 17 M_B_WE# 17 D M_B_DM[7 0] B M_A_BS#0 16 M_A_BS#1 16 M_A_BS#2 16 MEMORY BD21 BG18 AT25 SYSTEM A NB1E 17 M_B_DQ[63 0] SA_BS_0 SA_BS_1 SA_BS_2 M_A_DM[7 0] MEMORY SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 SYSTEM C AJ38 AJ41 AN38 AM38 AJ36 AJ40 AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36 AW36 BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12 BB9 BA9 AU10 AV9 BA11 BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5 AN10 AM11 AM5 AJ9 AJ8 AN12 AM13 AJ11 AJ12 DDR D M_A_DQ[63 0] M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 OF 10 NB1D 16 M_A_DQ[63 0] DDR CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF 71.CNTIG.00U 71.CNTIG.00U SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7 AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33 M_B_DM[7 0] 17 M_B_DQS[7 0] M_B_DQS[7 0] 17 M_B_DQS#[7 0] M_B_DQS#[7 0] 17 M_B_A[14 0] C M_B_A[14 0] 17 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 B A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Cantiga (3 of 6) Size Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 Sheet of 55 VCC_GFXCORE OF 10 1D5V_S3 UMA UMA 0R2J-2-GP R514 0R2J-2-GP R508 UMA 0R2J-2-GP R513 UMA 0R2J-2-GP R507 UMA UMA 2008.12.14 SB 0R2J-2-GP R509 UMA C225 0R2J-2-GP R515 C214 Coupling CAP AE33 AC33 AA33 Y33 W33 V33 U33 AH28 AF28 AC28 AA28 AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24 AJ23 AH23 AF23 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC T32 VCC G9 UMA 1 DY C215 C255 2 DY 1 2 UMA Coupling CAP VCC NCTF 1 2 C252 1D5V_S3 1 2 2 Place on the Edge DY C SC1U10V3KX-3GP C287 SC1U10V3KX-3GP C273 C275 SCD22U10V2KX-1GP C245 C276 SCD22U10V2KX-1GP 71.CNTIG.00U C256 SCD1U10V2KX-4GP 1 C271 AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23 VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF CANTIGA-GM-GP-U-NF C280 SCD1U10V2KX-4GP VCC SM LF VCC GFX AV44 SM_LF1_GMCH BA37 SM_LF2_GMCH AM40 SM_LF3_GMCH AV21 SM_LF4_GMCH AY5 SM_LF5_GMCH AM10 SM_LF6_GMCH BB13 SM_LF7_GMCH C262 Do Not Stuff VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF C268 SC10U6D3V5MX-3GP DY C281 SCD1U10V2KX-4GP C283 1D05V_S0 SCD1U10V2KX-4GP Place on the Edge UMA C232 Do Not Stuff UMA UMA C241 SC1U10V3ZY-6GP C221 Do Not Stuff C220 SC10U6D3V5MX-3GP DY VCC_GMCH_35 GAP-CLOSE-PWR VCC_GFXCORE C240 D VCC CORE 2 2 Coupling CAP 370 mils from the Edge VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC POWER 1 C194 SCD1U10V2KX-4GP C230 SCD1U10V2KX-4GP VCC GFX NCTF C237 SCD1U10V2KX-4GP VCC SM C234 0R2J-2-GP R510 UMA SCD1U10V2KX-4GP 71.CNTIG.00U UMA C235 AG34 AC34 AB34 AA34 Y34 V34 U34 AM33 AK33 AJ33 AG33 AF33 FOR VCC SM CANTIGA-GM-GP-U-NF U60(ISL6263ACRZ-T-GP) place near Cantiga UMA SC10U6D3V5MX-3GP VCC_AXG_SENSE VSS_AXG_SENSE UMA 0R2J-2-GP R511 0R2J-2-GP R516 Do Not Stuff AJ14 AH14 0R2J-2-GP R512 UMA SC10U6D3V5MX-3GP 48 VCC_AXG_SENSE 48 VSS_AXG_SENSE VCC_GFXCORE 0R2J-2-GP R517 SCD47U16V3ZY-3GP B VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG 1D05V_S0 0R2J-2-GP R518 Do Not Stuff C Y26 AE25 AB25 AA25 AE24 AC24 AA24 Y24 AE23 AC23 AB23 AA23 AJ21 AG21 AE21 AC21 AA21 Y21 AH20 AF20 AE20 AC20 AB20 AA20 T17 T16 AM15 AL15 AE15 AJ15 AH15 AG15 AF15 AB15 AA15 Y15 V15 U15 AN14 AM14 U14 T14 VCC_GFXCORE SCD22U10V2KX-1GP VCC_GFXCORE 1D05V_S0 OF 10 NB1F FOR VCC CORE DIS SC10U6D3V5MX-3GP VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC 1D05V_S0 R146 Do Not Stuff SC10U6D3V5MX-3GP BA36 BB24 BD16 BB21 AW16 AW13 AT13 VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16 SC10U6D3V5MX-3GP D VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM POWER NB1G AP33 AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32 AY32 AW32 AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29 AW29 AV29 AU29 AT29 AR29 AP29 B place near Cantiga A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Cantiga (4 of 6) Size Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 Sheet of 55 C203 SC10U6D3V5MX-3GP UMA C562 SCD47U6D3V2KX-GP C216 SCD1U10V2KX-4GP 1 2 2 UMA UMA R382 DIS Do Not Stuff 1 2 1D05V_S0 UMA B 2 UMA 1D05V_S0 C585 C246 1 C213 1782mA A Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Cantiga (5 of 6) Size Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 C 1D8V_S3 2 VTTLF1 VTTLF2 VTTLF3 C190 SCD47U6D3V2KX-GP C200 UMA SC10U6D3V5MX-3GP SCD1U10V2KX-4GP 1 A8 L1 AB2 C201 SCD47U6D3V2KX-GP VTTLF VTTLF VTTLF C228 SCD47U6D3V2KX-GP 71.CNTIG.00U UMA C233 456mA CANTIGA-GM-GP-U-NF 1 60.3mA AH48 AF48 AH47 AG47 C583 VCC_DMI VCC_DMI VCC_DMI VCC_DMI V48 U48 V47 U47 U46 C193 SCD1U10V2KX-4GP VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG 3D3V_S0 106mA C35 B35 A35 C198 C263 SC4D7U6D3V3KX-GP 1 AXF K47 VCC_HV VCC_HV VCC_HV VTTLF LVDS 1D8V_S3 VCCD_LVDS VCCD_LVDS 74.09198.C7F 2nd = 74.09091.G3F C548 C295 C586 M38 L37 C550 119mA HV SM CK BF21 BH20 BG20 BF20 PEG VCCD_PEG_PLL 200mA AA47 NC#4 1D5V_S3 B22 B21 A21 VCC_TX_LVDS DMI VCCD_HPLL D TV/CRT VCCD_QDAC HDA L28 AF1 C217 SC2D2U6D3V3MX-1-GP 2 C206 SC4D7U6D3V3KX-GP C218 SC4D7U6D3V3KX-GP 1 VTT CRT A PEG A CK 2 2 VCCD_TVDAC SC10U6D3V5MX-3GP C227 50mA M25 VOUT 1D8V_S3 SC10U6D3V5MX-3GP 1D05V_RUN_PEGPLL SCD1U10V2KX-4GP 157.2mA SCD1U10V2KX-4GP 1 2 2 1D5VRUN_QDAC SCD1U10V2KX-4GP SCD01U16V2KX-3GP VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK C536 SCD1U10V2KX-4GP C224 1D5V_S0 68.00206.041 VCC_AXF VCC_AXF VCC_AXF VIN GND EN/EN# RT9198-18PBR-GP UMA SC10U6D3V5MX-3GP C579 C202 SCD1U10V2KX-4GP Do Not Stuff DY TV VCC_HDA 1D5VRUN_QDAC C249 A SM 2 2 A32 C544 322mA SCD1U10V2KX-4GP C205 L4 2nd = 68.00214.101 180ohm 100MHz 1D05V_S0 SC10U6D3V5MX-3GP VCCA_TV_DAC VCCA_TV_DAC R371 0R2J-2-GP UMA DY SC4D7U6D3V3KX-GP 58.7mA B24 A24 PM_SLP_S4# SC1U10V3KX-3GP C207 3D3V_S0_DAC_1 1D05V_S0 PBY160808T-181Y-GPC209 13,36,39,44,47,49 POWER VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF 1D8V_S3 U51 SC10U6D3V5MX-3GP AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25 AL25 AM24 AL24 AM23 AL23 1D5V_S0 SCD1U10V2KX-4GP SCD1U10V2KX-4GP 1D5V_S0 3D3V_S5 SCD1U10V2KX-4GP VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM R363 10R2J-2-GP BAT54-5-GP SC1KP50V2KX-1GP C197 C568 SCD1U10V2KX-4GP C247 R366 0R0402-PAD C191 A AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16 VCCA_PEG_PLL 1D05V_HV_S0 2 SC1U16V3ZY-GP 3D3V_S0_DAC UMA VCCA_PEG_BG 2nd = 83.00054.Z81 3D3V_S0 C286 68.00217.521 2nd = 68.00084.A81 VSSA_LVDS 83.BAT54.D81 D20 SCD1U10V2KX-4GP C223 220ohm 100MHz J47 VCCA_HPLL D SC1U10V3KX-3GP C570 SCD1U10V2KX-4GP 1D05V_RUN_PEGPLL FCM1608CF-221T02-GP VCCA_LVDS SCD1U10V2KX-4GP VCCA_MPLL J48 SC1U10V3KX-3GP 24mA 139.2mA C242 SC2D2U6D3V3MX-1-GP C208 L15 B SC4D7U6D3V3KX-GP 1D05V_S0 SC10U6D3V5MX-3GP 1D05V_S0 AE1 50mAAA48 C261 SC10U6D3V5MX-3GP SC4D7U6D3V3KX-GP SC10U6D3V5MX-3GP 2nd = 68.00248.061 M_VCCA_MPLL 1D05V_S0 C565 SCD1U10V2KX-4GP M_VCCA_MPLL C572 AD1 1D05V_RUN_PEGPLL C267 C251 24mA 120ohm 100MHz M_VCCA_HPLL 13.2mA 1D05V_S0 M_VCCA_HPLL FCM1608KF-1-GP L16 VCCA_DPLLB C574 SCD1U10V2KX-4GP DY UMA 1D05V_S0 2nd = 68.00248.061 L48 AD48 R376 Do Not Stuff 1 C549 480mA C567 VCCA_DPLLA M_VCCA_DPLLB M_VCCA_DPLLB C FCM1608KF-1-GP L14 F47 Do Not Stuff M_VCCA_DPLLA 2 C196 VCCA_DAC_BG VSSA_DAC_BG 1D5V_S0 2 UMA DY A25 B25 U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1 852mA Do Not Stuff SCD1U10V2KX-4GP SC10U6D3V5MX-3GP C547 1D8V_S3 DY UMA UMA VCCA_CRT_DAC VCCA_CRT_DAC VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT R369 Do Not Stuff M_VCCA_DAC_BG B27 A26 PLL 1 C540 2 C542 SCD1U10V2KX-4GP SC10U6D3V5MX-3GP 65mA R375 0R0603-PAD M_VCCA_DPLLA OF 10 NB1H A LVDS UMA 65mA R370 0R0603-PAD R364 0R0402-PAD C525 1D05V_S0 UMA 3D3V_S0_DAC 5mA C521 UMA UMA UMA 2 C524 BC4 74.09198.G7F UMA UMA SC22U6D3V5MX-2GP NC#4 C522 3D3V_CRTDAC_S0 SCD1U10V2KX-4GP RT9198-33PBR-GP BC3 73mA SCD01U16V2KX-3GP VOUT SC1U16V3ZY-GP SC1U16V3ZY-GP D 1D05V_S0 3D3V_S0_DAC R365 0R0603-PAD VIN GND EN/EN# 3D3V_S0_DAC Imax = 300 mA U52 3 SCD1U10V2KX-4GP 5V_S0 Sheet 10 of 55 D D Finger printer Touch Pad 5V_S0 5V_S0 RN29 SRN10KJ-5-GP TP1 4 13,54 USBPP6 13,54 USBPN6 39 FP_DETECT# 54 TP_LEFT 54 TP_RIGHT C SRN33J-5-GP-U 39,54 TPDATA 39,54 TPCLK 54 TP_RIGHT 54 TP_LEFT 10 TP_DATA TP_CLK 4 RN28 PTWO-CON8-6-GP C PTWO-CON6-8-GP FP 20.K0381.008 F/P T/P 1 5V_S0 FP1 20.K0322.006 2nd = 20.K0403.006 2nd = 20.K0315.008 2008.12.08 SB 42,54 PWR_CON_BTN#_1 3D3V_S0 RN32 39 PWR_CON_BTN# 39 TP_LOCK_BTN# RN33 PWR_CON_BTN#_1 TP_LOCK_BTN#_1 SRN10KJ-5-GP SRN470J-4-GP-U B B 2 Do Not Stuff DY EC34 EC35 DY Do Not Stuff Note main with 2nd symbol pin define different Do Not Stuff Do Not Stuff DY EC33 EC32 TP_LOCK key 2 TP_DATA TP_CLK TP_LEFT TP_RIGHT DY TP_LOCK1 TP_LOCK_BTN#_1 SW-TACT-119-GP UMA A A 62.40009.671 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C 2nd = 62.40012.101 Title Touch PAD and FP Size Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 Sheet 41 of 55 5V_S0 PWR_SAVING_CN1 13 LAUN_CN1 15 2008.12.12 SB D 54 BACKUP_BTN#_1 54 BLT_BTN#_1 54 WIRELESS_BTN#_1 BACKUP_BTN#_1 BLT_BTN#_1 WIRELESS_BTN#_1 3D3V_AUX_S5 10 11 12 13 14 3D3V_S0 43,54 WLAN_LED#_R 43,54 BLT_LED#_1_R 43,54 BACKUP_LED# 12,54 MEDIA_LED# 43,54 NUM_LED# 43,54 CAP_LED# 5V_S0 39,50,52,54 BAT_SCL 39,54 MEDIA_Touch_INT# 39,50,52,54 BAT_SDA 39 MEDIA_Touch_Xres# 2008.12.10 SB 41,54 PWR_CON_BTN#_1 43,54 PWR_CON_LED# 3D3V_S0 D PWR_BT_CN1 7 10 11 12 5V_S5 39,43,54 FRONT_PWRLED 39,43,54 STDBY_LED 43,54 KBC_PWRBTN#_CN 39,54 AC_IN_LED PTWO-CON6-12-GP 16 14 ACES-CON14-2-GP-U 2nd = 20.K0320.006 PTWO-CON12-3-GP-U 20.K0370.012 2nd = 20.K0315.012 20.K0315.014 20.K0382.006 C C 2nd = 20.K0370.014 2008.12.08 SB 2008.12.08 SB FRONT_PWRLED STDBY_LED KBC_PWRBTN#_CN AC_IN_LED PWR_CON_BTN#_1 PWR_CON_LED# MEDIA_Touch_Xres# MEDIA_Touch_INT# 3D3V_S0 Do Not Stuff Do Not Stuff Do Not Stuff 2 EC19 2 EC21 1 1 2 1 EC20 EC18 SC1000P50V3JN-GP DY SC1000P50V3JN-GP DY DY SC1000P50V3JN-GP SRN10KJ-6-GP DY EC31 SC1000P50V3JN-GP DY DY EC13 Do Not Stuff DY EC62 SRN470J-3-GP EC103 EC102 Do Not Stuff EC63 2008.12.16 SB Do Not Stuff EC64 Do Not Stuff B 39 BT_BTN# 39 WIRELESS_BTN# BACKUP_BTN#_1 BLT_BTN#_1 WIRELESS_BTN#_1 39 BACKUP_BTN# RN61 RN58 B UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C A Title Launch CN Size A4 Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 A Sheet 42 of 55 LED BLT_LED#_R 3 FRONT_PWRLED#_Q Q22 DTC143ZUB-GP R2 Q34 DTC143ZUB-GP 5V_S5 2nd = 84.00143.D1K 84.00143.G1K 2nd = 84.00143.D1K D 1 R1 84.00143.G1K R1 R2 D 39 BT_LED PWR_LED1 39,42,54 FRONT_PWRLED FRONT_PWRLED#_R STDBY_LED#_R4 WLAN_LED#_1 R342 LED-OB-2-GP SRN300J-1-GP Q33 DTC143ZUB-GP R337 33R2J-2-GP 37 WLAN_LED# 83.19223.A70 R2 S R1 G 39 WLAN_TEST_LED 5V_AUX_S5 2nd = 84.00143.D1K 39,42,54 STDBY_LED 2nd = 84.27002.N31 DC_BATFULL#_R CHARGE_LED#_R RN47 NUM_LED#_R LED-OB-2-GP Q26 DTC143ZUB-GP NUM_LED# 42,54 CAP_LED# 42,54 BLT_LED#_1_R 42,54 BACKUP_LED# 42,54 C 84.00143.G1K R1 Charger LED 2nd = 84.00143.D1K 39 NUM_LED 39 DC_BATFULL 8NUM_LED# 7CAP_LED# BACKUP_LED# SRN75J-3-GP R2 83.19223.A70 2nd = 84.00143.D1K R1 84.00143.G1K BLT_LED#_R BACKUP_LED#_R R2 2 CHARGER_LED1 Q31 DTC143ZUB-GP C WLAN_LED#_R 42,54 Q20 2N7002-11-GP Power LED 84.00143.G1K WLAN_LED#_R 75R2J-1-GP D RN71 STDBY_LED#_Q2 Q32 DTC143ZUB-GP R1 2nd = 84.00143.D1K R2 CAP_LED#_R 84.00143.G1K Q25 DTC143ZUB-GP R2 39 CHARGE_LED 2nd = 84.00143.D1K R1 84.00143.G1K 5V_S0 TP_LOCK_LED1 39 CAP_LED TP_LOCK_LED# R224 TP_LOCK_LED#_1 75R2J-1-GP R2 Q21 DTC143ZUB-GP R1 A B 83.01921.P70 2ND = 83.00190.S7A 84.00143.G1K 2nd = 84.00143.D1K 39 TP_LOCK_LED R1 2nd = 84.00143.D1K R2 84.00143.G1K K LED-Y-57-GP Q11 DTC143ZUB-GP 2 BACKUP_LED#_R B PWR_CON_LED#_R 39 BACKUP_LED 75R2J-1-GP PWR_CON_LED# 42,54 R47 Q5 DTC143ZUB-GP R2 84.00143.G1K 2nd = 84.00143.D1K 1 R1 3D3V_AUX_S5 39 PWR_CON_LED R166 10KR2J-3-GP R164 470R2J-2-GP KBC_PWRBTN# 39 UMA A 1 G33 GAP-OPEN KBC_PWRBTN#_CN 42,54 KBC_PWRBTN#_CN A Wistron Corporation C272 SCD1U16V2ZY-2GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size LED&POWERBD CONN Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 Sheet 43 of 55 Aux Power 5V_AUX_S5 3D3V_AUX_S5 5V_AUX_S5 I max = 300 mA Run Power 3D3V_AUX_S5 U58 5V_S5 5V_S0 C369 2nd = 84.00610.C31 DCBATOUT Q12 NDS0610-NL-GP Z_12V 10KR2J-3-GP R229 3D3V_S0 S G Z_12V_D4 3D3V_runpwr 2 Z_12V_D3 Z_12V_D3 G D D D D 2nd = 84.04800.D37 D13 UDZ9V1B-7-GP 84.04468.037 3D3V_S0 83.9R103.F3F 2nd = 83.9R103.C3F U26 S S S G D D D D 3D3V_S5 AO4468-GP 2nd = 84.04800.D37 U37 Q13 Do Not Stuff D DY R231 330KR2J-L1-GP R233 100KR2J-1-GP C368 SCD22U25V3KX-GP Z_12V_G3 330KR2J-L1-GP R230 U36 S S S G AO4468-GP D 10KR2J-3-GP DY Do Not Stuff RUN_POWER_ON 84.S0610.B31R232 R234 Do Not Stuff K Do Not Stuff DY BC5 DY A DY Do Not Stuff Do Not Stuff Do Not Stuff NC#4 BC7 VOUT VIN GND EN/EN# DY C597 Do Not Stuff DY DY R417 3D3V_AUX_EN Do Not Stuff 1 84.04468.037 PM_SLP_S3# 13,18,31,36,38,39,47,48 S 2008.12.14 SB 2N7002DW-1-GP 84.27002.D3F 1D5V_S3 1D5V_S0 2nd = 84.27002.C3F 1D05V_S0 1 83.00016.F11 2nd = 84.04800.D37 DY PM_SLP_S3# 2 13,18,31,36,38,39,47,48 D D D D AO4468-GP R415 Do Not Stuff BAS16-1-GP U56 S S S G 84.04468.037 D24 3D3V_S5 C 2008.12.08 SB DY DY 14 DY R85 R411 56R2J-4-GP 2nd = 84.03906.H11 SM_PWROK QC = 64.49R95.6DL 1D5V_S3_PWROK 47 PM_SLP_S4# 10,13,36,39,47,49 TSLCX08MTCX-GP U17A PM_THRMTRIP-A# 4,7,12 12K1R2F-L1-GP R83 10KR2J-3-GP E R414 Do Not Stuff C594 Do Not Stuff DY R506 10KR2J-3-GP 3D3V_S5 Do Not Stuff 1D05V_S0 Q30 Do Not Stuff B H_PWRGD# E R412 H_PWRGD# PMBT2222A-1GP Q29 B 1KR2J-1-GP C 4,12 H_PWRGD 1 R413 4,12 H_PWRGD C593 SC1U10V2ZY-GP 84.02222.R11 2nd = 84.02222.V11 D23 BAS16-1-GP 46 3V/5V_EN UMA RSMRST# 38,39 Wistron Corporation 83.00016.B11 2nd = 83.00016.F11 / 83.00016.G11 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size RUN POWER and 3D3V_AUX_S5 Document Number Rev JM70-MV Date: Saturday, December 20, 2008 Sheet SB 44 of 55 CPU_CORE ADP3208C VID0 D VID1 VID2 VID3 VID4 VID5 VID6 VID Setting Output Signal VID0(I / 3.3V) PGOOD DCBATOUT_51125 VSS_SENSE D PM_SLP_S4# VID2(I / 3.3V) VID3(I / 3.3V) Output Power VID4(I / 3.3V) VCC_CORE_PWR(O) VCC_CORE(Imax=38A) ALW_PWRGD_3V_5V 3D3V_S0 EN0 3D3V(O) 3D3V_S5 (7A) DDR 3.0 0D75V_S0 Output Signal RT9026 PGOOD 5V_S5 VIN 1D5V_S3 VID6(I / 3.3V) GFX_CORE ISL6263A EN (I / 3.3V) VID Setting VID0 Voltage Sense VID1 VSEN(I / Vcore) VID2 RGND(I / Vcore) VID3 VCC(I) PGOOD S3 S5 CPUCORE_ON C VID2(I / 3.3V) VID3(I / 3.3V) VID4(I / 3.3V) Input Power Output Power Charger ISL88731A VDD DCBATOUT VGFXCORE (O) VIN VCC_GFXCORE(5.5A) Input Signal Output Signal VCC(I) PM_SLP_S3# 5V_S5 DCBATOUT_51124 PM_SLP_S4# PM_SLP_S3# A Input Power VDD VCC Input Signal 1D5V (O) 1D05V(O) Input Signal BATT_SENSE VR_ON VCC_AXG_SENSE 1D5V_S3 (10A) VSS_AXG_SENSE Voltage Sense AD+ RGND(I / Vcore) Output Power ACN Input Signal EN1 AD_OFF VOUT (O) Output Signal (O) (I) AD_IN# BT+ VOUT (O) Adapter 1D05V_S0 (10.5A) EN2 Input Power VSEN(I / Vcore) B AD_IA SRSET FBS GFXVR_EN Output Power AC_IN# ACGOOD# B TPS51124 1D5V/1D05V DDR_VREF_S3_1 VTTREF VID1(I / 3.3V) 5V_S0 VCC(I) Output Signal 0D75V_S3 (1.2A) VTT VLDOIN PM_SLP_S4# VID0(I / 3.3V) Input Power 5V_S0 Input Signal VID5(I / 3.3V) VID4 DCBATOUT_VCORE 5V_S5 (6A) 5V(O) VIN VID1(I / 3.3V) C VCC_SENSE Output Power Input Power VGATE_PWRGD Input Signal CPUCORE_ON ISL62392 5V/3D3V DCBATOUT UMA Wistron Corporation CPUCORE_ON Output Signal Input Power PGOOD1 AD_JK PGOOD2 5V_AUX_S5 VCC(I) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Output Power VCC(O) Title AD+ Power Block Diagram Size B VCC(I) Document Number Rev Date: Saturday, December 20, 2008 SB JM70-MV Sheet 45 of 55 A DCBATOUT DCBATOUT_62392 GAP-CLOSE-PWR G56 GAP-CLOSE-PWR G36 D GAP-CLOSE-PWR G37 79.68612.30L GAP-CLOSE-PWR G58 20081217 GAP-CLOSE-PWR G38 GAP-CLOSE-PWR G57 GAP-CLOSE-PWR G43 TC9 2 GAP-CLOSE-PWR G41 GAP-CLOSE-PWR 2 3V/5V_EN1 3V/5V_EN2 GAP-CLOSE-PWR G60 R201 R207 0R2J-2-GP 200KR2F-L-GP D GAP-CLOSE-PWR G62 GAP-CLOSE-PWR DCBATOUT_62392 DCBATOUT_62392 DCBATOUT_62392 GAP-CLOSE-PWR G64 PVCC VCC 19 PGND 36K5R2F-GP SC4700P25V2KX-LGP 20081219 C296 SC1200P50V2KX-1GP TC6 2nd = 77.92271.021 79.22710.6AL 62392_VCC R210 0R2J-2-GP 20081030 20081030 G47 1 Polymer 220uF,6.3V,25mohm,Iripple=2.236A OS-CON 220uF,6.3V,10mohm,Iripple=3.9A 2 R202 19K6R2F-GP R215 C312 24K3R2F-1-GP SCD01U50V2KX-1GP A C305 SCD01U50V2KX-1GP 20081104 C311 1 GAP-CLOSE-PWR-3-GP R216 0R0402-PAD 20081219 R218 9K09R2F-GP 2 B R198 750R2F-GP DY C307 SC1U25V3KX-1-GP 62392_FB1_R 1 R212 Do Not Stuff 62392_VCC 20081030 R219 68K1R2F-1-GP 18,38,47,48,51 5V_AUX_S5 CPUCORE_ON 2 20081219 Polymer 220uF,6.3V,25mohm,Iripple=2.236A OS-CON 220uF,6.3V,10mohm,Iripple=3.9A C292 C327 Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm 20081219 SC4D7U10V3KX-GP 62392_FB2_R R220 750R2F-GP R193 10KR2F-2-GP 2 2 SC4D7U10V3KX-GP GAP-CLOSE-PWR-3-GP C326 R199 45K3R2F-L-GP B 2 1 G S S S D D D D G S S S R195 3V/5V_EN1 3V/5V_EN2 68.3R310.20A 2nd = 68.3R31A.10E R222 18 11 24 C 5V_PWR 1 EN1 EN2 LDO3EN FCCM FSET1 FSET2 84.04812.A37 PGOOD 20081030 28 FB2 LDO3 20081104 ISL62392HRTZ-T-GP 20081219 25 26 27 16 OCSET2 ISEN2 VOUT2 2nd = 84.06690.E37 17 VIN FB1 GND 84.04812.A37 2nd = 84.06690.E37 20 8 LGATE2 20081219 Iomax=6A OCP>9A L6 IND-3D3UH-57GP U33 29 LGATE1 GAP-CLOSE-PWR Cyntec 7*7*3 DCR=30mohm, Irating=6A Isat=13.5A 23 36K5R2F-GP 3D3V_AUX_S5 C325 SC1200P50V2KX-1GP G54 R221 PHASE2 OCSET1 ISEN1 VOUT1 36K5R2F-GP Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm 15 10 PHASE1 D D D D 2 G S S S 36K5R2F-GP 200812119 SI4812BDY-T1-E3-GP SC4700P25V2KX-LGP 12 C300SCD22U25V3KX-GP SE220U6D3VM-7GP U35 BOOT2 UGATE2 R197 2D2R2F-GP GAP-CLOSE-PWR G65 SCD1U10V2KX-4GP R196 D D D D SCD1U10V2KX-4GP ST220U6D3VDM-15GP C297 BOOT1 UGATE1 2nd = 84.08884.037 21 22 SI4812BDY-T1-E3-GP 68.3R310.20A 2nd = 68.3R31A.10E C363 1 L7 IND-3D3UH-57GP 14 13 C310 SCD01U50V2KX-1GP 20081220 U32 SCD22U25V3KX-GP C328 1 R223 2D2R2F-GP 84.04800.D37U30 Id=7A SI4800BDY-T1 Qg=8.7~13nC Rdson=23~30mohm C309 SC10U25V6KX-1GP 3D3V_PWR G S S S Cyntec 7*7*3 DCR=30mohm, Irating=6A Isat=13.5A C C308 SC10U25V6KX-1GP 2nd = 84.08884.037 Id=7A U34 Qg=8.7~13nC SI4800BDY-T1 Rdson=23~30mohm C313 SCD01U50V2KX-1GP 84.04800.D37 Do Not Stuff DY C324 D D D D Iomax=7A OCP>10.5A C338 SC10U25V6KX-1GP SCD01U50V2KX-1GP GAP-CLOSE-PWR C329 SC10U25V6KX-1GP C339 GAP-CLOSE-PWR G40 TC10 GAP-CLOSE-PWR G61 2 GAP-CLOSE-PWR G63 GAP-CLOSE-PWR G39 3V/5V_EN 1 2KR2F-3-GP 5V_S5 G59 2 39,54 S5_ENABLE GAP-CLOSE-PWR G42 79.68612.30L 5V_PWR R194 1 TC12 3V/5V_EN 44 R209 0R2J-2-GP 2 1 TC13 2 ST15U25VDM-1-GP 1 1 GAP-CLOSE-PWR G35 2 SE68U25VM-3-GP 20081030 DCBATOUT_62392 G44 1 DCBATOUT G55 SE68U25VM-3-GP G34 3D3V_S5 3D3V_PWR 20081219 UMA 20081104 A Wistron Corporation Vout=0.6*(1+R1/R2) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title ISL62392_5V/3D3V Size A3 Document Number Date: Saturday, December 20, 2008 Rev SB JM70-MV Sheet 46 of 55 1D5V_PWR DCBATOUT DCBATOUT_51124 G48 GAP-CLOSE-PWR G49 DCBATOUT_51124 GAP-CLOSE-PWR G50 2 2 51124_VBST2 51124_VFB2 Do Not Stuff 1 R427 30KR2F-GP TC19 2nd = 84.07672.037 84.57N03.A37 TONSEL OPEN V5FILT 240k/CH1 300k/CH2 300k/CH1 360k/CH2 360k/CH1 420k/CH2 2 GAP-CLOSE-PWR G94 GAP-CLOSE-PWR G86 20081214 GAP-CLOSE-PWR G87 20081030 GND B GAP-CLOSE-PWR G93 SCD1U16V2KX-3GP 51124_V5FILT GAP-CLOSE-PWR G92 C600 Do Not Stuff C575 SCD1U10V2KX-4GP 2 DY Do Not Stuff IND-D88UH-GP R424 11K8R3F-GP 2 DY R433 DY R428 51124_LL2_1 U27 BSC057N03MSG-GP GAP-CLOSE-PWR G91 Voutsetting=1.0561V 2nd = 68.R8810.10B 1 0R2J-2-GP 1D05V Iomax=10A OCP>15A 1D05V_PWR L17 GAP-CLOSE-PWR G90 S S S G 51124_LL2 C598 GAP-CLOSE-PWR G89 2nd = 84.08692.037 84.12003.A37 68.R8810.201 51124_VBST1 SCD1U16V2KX-3GP R419 C590 C264 SC10U25V6KX-1GP SCD1U50V3KX-GP U24 BSC120N03MS-G-GP 1D05V_S0 G88 TPS51124RGER-GPU1 C612 C 2 C265 SC10U25V6KX-1GP 2 GAP-CLOSE-PWR 20081214 24 1 51124_DRVH2 51124_LL2 51124_DRVL2 10 11 12 74.51124.073 10KR3F-GP 51124_LL1_1 ST330U2D5VDM-13GP R440 0R2J-2-GP GAP-CLOSE-PWR G113 Cyntec 10*10*4 DCR=2.7~3mohm,Irating=20A Isat=38A Id=21.7A Qg=21.5~33nC, Rdson=5.5~6.3mohm D D D D 51124_LL1 TC24 1D05V_PWR DRVH2 LL2 DRVL2 R423 B DCBATOUT_51124 51124_TRIP1 51124_TRIP2 R437 10KR3F-GP S S S G 2nd = 84.08672.A37 84.04168.037 GAP-CLOSE-PWR G111 GAP-CLOSE-PWR G112 R436 21K5R3F-GP D D D D BC6 Do Not Stuff 51124_DRVH1 51124_LL1 51124_DRVL1 21 20 19 51124_TONSEL DY 18,38,46,48,51 DY 1 1KR2J-1-GP CPUCORE_ON GND GND PGND2 PGND1 PGOOD1 PGOOD2 EN1 EN2 25 13 18 TONSEL 23 DRVH1 LL1 DRVL1 51124_EN1 51124_EN2 VO1 VO2 VFB1 VFB2 V5FILT V5IN TRIP1 TRIP2 15 16 22 51124_V5FILT 17 14 R420 1KR2J-1-GP BC8 DY Do Not Stuff VBST1 VBST2 SC1U10V3KX-3GPU59 PM_SLP_S3# R441 1D5V_S3_PWROK 44 C602 13,18,31,36,38,39,44,48 PM_SLP_S4# 0R2J-2-GP R421 0R2J-2-GP 51124_VFB1 51124RGER_PG1 51124RGER_PG2 2 10,13,36,39,44,49 1 ST330U2D5VDM-13GP C 1D05V_PWR 1D5V_PWR 51124_VFB2 51124_VFB1 21K5R3F-GP S S S G C603 SC4D7U10V5KX-1GP 2008.12.08 SB R442 D D D D R434 3D3R3J-L-GP U29 SI4168DY-T1-GE3-GP 20081214 1 68.1R510.10J 2nd = 68.1R51A.10G R435 5V_S5 C608 Do Not Stuff 1IND-1D5UH-34-GP 2 GAP-CLOSE-PWR G110 1D5V_PWR L19 GAP-CLOSE-PWR 2 GAP-CLOSE-PWR G109 1D5V Iomax=10A OCP>15A 20081009 1 D 84.04686.037 Id=7A 2nd = 84.08880.037 Qg=8.7~13nC, Rdson=23~30mohm GAP-CLOSE-PWR G53 C298 SC10U25V6KX-1GP C299 SCD1U50V3KX-GP U31 SI4686DY-T1-E3-GP C621 SCD1U10V2KX-4GP GAP-CLOSE-PWR G52 1 C607 SC10U25V6KX-1GP 2 GAP-CLOSE-PWR G51 GAP-CLOSE-PWR G108 1 GAP-CLOSE-PWR G107 S S S G 2nd = 79.10112.3JL D D D D D SE100U25VM-L1-GP 1 TC25 GAP-CLOSE-PWR G106 Vtrip(mV)=Rtrip(Kohm)*10(uA) Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin)) 1D5V_S3 G105 1 GAP-CLOSE-PWR UMA A A Vout=0.758V*(R1+R2)/R2 > PWM mode Vout=0.764V*(R1+R2)/R2 > Skip Mode Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title TPS51124_1D5V_1D05V Size A3 Document Number Date: Saturday, December 20, 2008 Rev SB JM70-MV Sheet 47 of 55 UMA SE100U25VM-L1-GP TC18 DY Do Not1Stuff R532 DY Do Not1Stuff R533 DY R188 Do Not Stuff PM_SLP_S3# 2nd = 79.10112.3JL DY Do Not1Stuff R531 13,18,31,36,38,39,44,47 UMA UMA R192 10KR2F-2-GP 3D3V_S0 UMA GFX_VID3 GFX_VID1 DY R176 0R2J-2-GP DY UMA VSEN BOOT 17 6236A_BOOT R177 2D2R3J-2-GP SC10U25V6KX-1GP SC10U25V6KX-1GP D D D D G S S S 20081214 5V_S0 U57 SI4172DY-T1-GE3-GP UMA G104 GAP-CLOSE-PWR G103 GAP-CLOSE-PWR 6236A_VDD C VGFXCORE 2 16 14 6236A_VIN 15 13 6236A_VSUM DY Cyntec 7*7*3 DCR=8mohm, Irating=13A Isat=24A UMA R179 Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm 5V_S5 Do Not Stuff 20081214 UMA DCBATOUT R418 Close to choke and on the same layer UMA SCD033U50V3KX-1GP C601 1 6236A_VSUM_R UMA UMA G32 GAP-OPEN-PWR SCD022U25V2KX-GP 2UMA 4K53R2F-1-GP UMA R416 NTC-10K-9-GP G30 GAP-OPEN-PWR R425 B UMA 7K68R2F-GP C599 UMA 20081214 UMA 2 TC22 R426 0R0402-PAD C294 UMA SCD01U25V2KX-3GP 10R2F-L-GP R430 1KR3F-GP SCD1U25V3KX-GP 1 UMA C284 SCD22U16V3KX-2-GP RTN UMA R190 10R3F-GP DY Do Not1Stuff R527 UMA R185 2K55R2F-GP SC330P50V2KX-3GP 2 R191 10R3F-GP C606 VGFXCORE Iomax=7A OCP>10.5A DY UMA UMA DY SE220U2VDM-8GP GAP-CLOSE-PWR UMA DY Do Not1Stuff R526 C591 Do Not Stuff 10R2F-L-GP SC1U16V3KX-2GP R432 DY C589 L18 COIL-1UH-34-GP-U R172 C588 UMA ISL6263ACRZ-T-GP 1 C609 Do Not Stuff C604 G45 UMA UMA UMA Id=7A Qg=8.7~13nC Rdson=23~30mohm S S S G C613 VSS_AXG_SENSE 6236A_UGATE SC1KP50V2KX-1GP 18 C288 DY VCC_AXG_SENSE 25 UGATE C611 GAP-CLOSE-PWR VID2 VDIFF UMA G46 VID3 6236A_PHASE 6236A_RTN Do Not Stuff 26 32 33 27 VID4 PMON VR_ON AF_EN PGOOD FDE GND_T 20 UMA UMA SC2D2U10V3KX-1GP 19 SC560P50V2KX-2GP LGATE 6236A_LGATE PGND 6236A_VSEN 6236A_FB_R 6236A_PVCC 21 PHASE C303 UMA 4K99R2F-L-GP 22 UMA D D D D UMA PVCC FB 6236A_VDIFF DY Do Not1Stuff R525 DCBATOUT_6263A 6236A_PMON 6236A_VR_ON 28 R175 Do Not Stuff C285 6236A_BOOT_R UMA 22K21R3F-L-GP 23 COMP VDD 6236A_FB VW 24 VID0 VSS UMA Do Not1Stuff R524 U55 SI4800BDY-T1 VID1 VIN 6236A_COMP VSUM SC1KP50V2KX-1GP R211 6K98R3F-GP SC180P50V2JN-1GP UMA R208 OCSET VO 6236A_COMP_R C306 6236A_VW UMA DFB UMA UMA SC68P50V2JN-1GP 12 C304 SOFT 11 1 10KR2F-2-GP RBIAS 6263A_VCC_PRM C301 6236A_DROOP 10 6263A_VCC_PRM 6236A_RBIAS C3021 2UMA 6236A_SOFT SCD01U50V2KX-1GP 6236A_OCSET DROOP R204 6236A_DFB R2051 20081214 DY 5V_S0 6236A_AF_EN 29 R203 Do Not Stuff DY 5V_S5 6236A_GOOD CPUCORE_ON U28 R2061 DY Do Not1Stuff R522 GFX_VID0 Do Not1Stuff R523 150KR2F-L-GPUMA R213 374KR3-GP DY Do Not1Stuff R521 GFX_VID2 UMA 18,38,46,47,51 C Do Not1Stuff R520 GFX_VID4 UMA R200 1K91R2F-1-GP 3D3V_S0 D DY 6236A_VID4 R184 0R2J-2-GP 6236A_VID3 R183 UMA 0R2J-2-GP 6236A_VID2 R180 UMA 0R2J-2-GP 6236A_VID1 R173 UMA 0R2J-2-GP 6236A_VID0 R171 UMA 0R2J-2-GP UMA R189 Do Not Stuff DY VCC_GFXCORE Do Not1Stuff R519 Do Not1Stuff R530 VGFXCORE GFX_VID[4 0] SCD01U50V2KX-1GP R186 10KR2J-3-GP DY DY 30 D B C291 POWER_MONITOR 2 R187 0R2J-2-GP GFXVR_EN DY Do Not1Stuff R529 DCBATOUT Do Not1Stuff R528 31 DCBATOUT_6263A 6236A_VSUM_R_VCC_PRM R422 3K57R2F-GP UMA VSS_AXG_SENSE_OUTCAP Parallel VCC_AXG_SENSE_OUTCAP A A UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title ISL6263A_GFX CORE Size A2 Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 Sheet 48 of 55 D D G116 U63 C651 SC1U10V2KX-1GP GAP-CLOSE-PWR RT9026PFP-GP C656 SC10U10V5KX-2GP 9026_S3 C GAP-CLOSE-PWR G117 2 R479 VIN VDDQSNS S5 VLDOIN GND VTT S3 PGND VTTREF VTTSNS 0R0402-PAD DDR_VREF_S3_1 10 9026_S5 GND R477 11 0R0402-PAD 2 GAP-CLOSE-PWR G118 C 10,13,36,39,44,47 PM_SLP_S4# DDR_VREF_S3 DDR_VREF_PWR C646 Do Not Stuff DY C644 SC10U10V5KX-2GP C642 SC1U10V2KX-1GP Iomax=1.2A OCP>2A 1D5V_S3 5V_S5 C655 SC10U10V5KX-2GP 74.09026.079 B B UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C A A Title 0D75V Size A Document Number SB JM70-MV Date: Saturday, December 20, 2008 Rev Sheet of 49 55 AD+ AD+_TO_SYS U2 DCBATOUT BT+ 23 LGATE 20 PGND 19 CSOP 18 CSON 17 2nd = 68.1001B.10R C393 Do Not Stuff C403 SCD015U25V2KX-GP 2 DY Cherry Modify 2008.12.15 SB NC#16 16 VFB 15 SCD1U50V3KX-GP D D D D 10R2F-L-GP 84.04800.D37 2nd = 84.08884.037 ISL88731_CSIP VCOMP NC#5 ICOMP VREF NC#7 GND C418 C453 R255 GND 12 ISL88731_CCS C414 SCD22U50V3ZY-1GP D01R2512F-4-GP BATT_SENSE_R B BATT_SENSE 52 100R2J-2-GP ISL88731AHRZ-T-GP 29 ISL88731_CCV U44 SI4800BDY-T1 G S S S ICM ISL88731_CSIN R246 10KR2F-2-GP 1 1KR2F-3-GP C402 SCD01U50V2KX-1GP 1ISL88731_CCV1 B SCD01U16V2KX-3GP C405 39 AD_IA ISL88731_IINP R254 ISL88731_CSIP_R 1 IND-10UH-119-GP ISL88731_DLO 2 NC#14 CHG_AGND R252 C419 R247 68.1001B.10S 14 470KR2J-2-GP G72 GAP-CLOSE-PWR-2U G71 GAP-CLOSE-PWR-2U 2nd = 79.10112.3JL SE100U25VM-L1-GP 2 G76 GAP-CLOSE-PWR-2U D D D D L8 SDA ISL88731_LX C401 SC10U25V6KX-1GP PHASE SC1U10V3KX-4GP C411 SCD1U50V3KX-GP C409 SC10U25V6KX-1GP 24 39,42,52,54 BAT_SDA UGATE C SCL Do Not Stuff ISL88731_DHI 2nd = 84.08884.037 C406 SC10U25V6KX-1GP 10 C417 39,42,52,54 BAT_SCL C410 SC10U25V6KX-1GP ACOK 84.04800.D37 DY 13 25 21 U43 SI4800BDY-T1 CHG_AGND ISL88731_ACOK BOOT VDDP D15 2nd = 84.04407.F37 GAP-CLOSE-PWR-2U G67 27 26 R249 4D7R3F-L-GP ISL88731_CSSN_R ISL88731_VCC R248 0R3-0-U-GP ISL88731_BST 2ISL88731_BST1 ISL88731_LDO D CHRG_IN C404 SC1U10V3KX-4GP G S S S 28 VDDSMB CSSN VCC CHG_AGND CHG_AGND CSSP CHG_AGND 11 5V_S5 C408 SCD1U10V2KX-4GP 2 C390 SCD01U50V2KX-1GP ACIN C407 84.04425.D37 SC10U25V6KX-1GP DCIN CHG_AGND C400 SCD047U25V2KX-GP R253 SC10U25V6KX-1GP R243 49K9R2F-L-GP 22 C394 SCD1U50V3KX-GP ISL88731_ACIN C U40 R242 215KR3F-1-GP ISL88731_CSSP C416 SC1U25V5KX-1GP NC#1 CH521S-30-GP-U1 R245 10R2J-2-GP 2 1 C391 SCD1U25V3KX-GP SCD1U25V3KX-GP ISL88731_ACOK D16 R244 10R2J-2-GP R256 10KR2F-2-GP G74 GAP-CLOSE-PWR-2U 2 TC14 Q3 2N7002EDW-GP C415 SCD01U50V2KX-1GP 2nd = 84.04407.F37 D D D D ME4425-GP 100KR2J-1-GP 10KR2J-3-GP 1 84.04425.D37 G1 GAP-CLOSE-PWR-2U R10 AD+_G_1 U42 S S S G AD+ D01R2512F-4-GP R11 ME4425-GP D 2 R7 G66 GAP-CLOSE-PWR-2U 1ISL88731_CSSN S S S G D D D D G2 GAP-CLOSE-PWR-2U G68 GAP-CLOSE-PWR-2U CHG_AGND 3D3V_AUX_S5 Cherry Modify ISL88731_LDO Q6 2N7002-11-GP G ISL88731_ACOK_1 R55 ISL88731_ACOK UMA A 0R2J-2-GP R57 15KR2F-GP S A 10KR2F-2-GP R59 D AC_IN# 39 AC_IN# 10KR2F-2-GP R60 AC_IN# to KBC Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title ISL88731A Charger Size A3 Document Number Rev JM70-MV Date: Saturday, December 20, 2008 SB Sheet 50 of 55 2 GAP-CLOSE-PWR G73 DCBATOUT_VCORE_1 1 1 SCD1U50V3ZY-GP SC10U25V6KX-1GP SC10U25V6KX-1GP SC10U25V6KX-1GP 8 4 1 1 SCD1U50V3ZY-GP SC10U25V6KX-1GP SC10U25V6KX-1GP 2 8 SC10U25V6KX-1GP C135 SCD33U10V3KX-3GP 84.57N03.A37 1 1 SCD1U50V3ZY-GP SC10U25V6KX-1GP SC10U25V6KX-1GP 84.57N03.A37 2nd = C488 C487 SC10U25V6KX-1GP 8 2nd = GAP-CLOSE-PWR-3-GP 2 2 BSC057N03MSG-GP 3207_DL3 G7 S S S G U49 D D D D Id=35A Qg=17~26nC Rdson=11~14mohm S S S G U19 Id=19.5A Qg=21.5~33nC, Rdson=5.5~6.7mohm 2nd = 84.12003.A37 C161 3207_DH3 CPU_PHASE3 BSC057N03MSG-GP 2ndCyntec = 68.R3610.20A 10*10*4 DCR=1.05+-5%mohm Irating=30A Isat=60A G6 GAP-CLOSE-PWR-3-GP 2nd = 84.57N03.A37 C162 D D D D 10 ADP3611JRMZ-REEL-GP 330uF,2V,ESR=9mohm A IN BST SD# DRVH DRVLSD# SW CROWBAR GND VCC DRVL TC16 SE330U2VDM-L-GP SE330U2VDM-L-GP 2nd = 77.C3371.051 TC15 2 3207_PWM3 3207_OD# U21 S S S G SC1KP50V2KX-1GP TC3 SE330U2VDM-L-GP Do Not Stuff TC4 SE330U2VDM-L-GP DY DY SE330U2VDM-L-GP R65 TC2 3207_BST3 D8 Do Not Stuff C153 SC10U10V5KX-2GP R97 1D5R3-GP U20 C485 3207_AGND TC1 Do Not Stuff De-populate when CPU is present VCC_CORE L10 R261 IND-D36UH-9-GP 10R2F-L-GP 68.R3610.20C B DY 1 R330 1KR3F-GP DY Do Not Stuff C459 130KR3F-GP 3207_AGND VCC_CORE C137 DCBATOUT_VCORE_3 20081214 5V_S0 3207_RAMPAD1 GAP-CLOSE R62 1 2 R338 71K5R2F-1-GP R250 NTC-220K-1-GP C484 SC1200P50V2KX-1GP 130KR3F-GP U46 3207_DL2 2nd = DCBATOUT_VCORE_1 U15 130KR3F-GP C155 SCD33U10V3KX-3GP C477 SC1KP50V2KX-1GP 1 1 R321 R317 BSC120N03MS-G-GP G77 Id=19.5A Qg=21.5~33nC, Rdson=5.5~6.7mohm D D D D 3207_VRTT ADP3611JRMZ-REEL-GP 165KR2F-GP Id=35A Qg=17~26nC Rdson=11~14mohm 3207_DH2 CPU_PHASE2 20081214R331 3207_AGND R327 499KR2F-1-GP S G 3207_AGND Do Not Stuff 2ND = 84.2N702.E31 2 D Q18 10 2nd = 84.12003.A37 S S S G R326 110KR2F-L-GP R339 IN BST SD# DRVH DRVLSD# SW CROWBAR GND VCC DRVL U18 BSC057N03MSG-GP 3207_CSSUM B C C136 C460 D D D D DY 84.57N03.A37 S S S G 3207_AGND CPU_PROCHOT#_R 3207_AGND R315 0R0402-PAD C481 G5 GAP-CLOSE-PWR-3-GP D D D D 3207_AGND SC330P50V2KX-3GP Dummy Because R1229, R1232 are dummy 3207_BST2 D6 Do Not Stuff C134 SC10U10V5KX-2GP R84 1D5R3-GP U16 DY VSS_SENSE 2nd = 84.57N03.A37 DY 1 R311 0R2J-2-GP 3207_CSREF 2ndCyntec = 68.R3610.20A 10*10*4 DCR=1.05+-5%mohm Irating=30A Isat=60A 5V_S0 3207_CSCOMP R325 D DCBATOUT_VCORE_2 BSC057N03MSG-GP C480 Do Not Stuff R324 80K6R2F-GP Iomax=60A OCP>90A 20081214 GND 3207_VRTT 3207_DCM# 3207_OD# 3207_PWM1 3207_PWM2 3207_PWM3 3207_SW1 R300 3207_SW2 0R2J-2-GP 3207_SW3 R304 0R2J-2-GP 41 11 12 3207_RRPM 13 3207_RT 14 3207_RAMPAD15 16 17 18 19 20 2 3207_AGND VCC_SENSE 1 40 39 38 37 36 35 34 33 32 31 VID0 VID1 VID2 VID3 VID4 VID5 VID6 DPSTP# PSI# VCC Do Not Stuff 13207_STSET C471 Do Not Stuff 1 30 29 28 27 26 25 24 23 22 21 3207_ILIMIT 3207_VRPM 8K06R2F-GP 0R3-0-U-GP DY Reversed for R309 loop gain 0R3-0-U-GP measurement purpose DY 2nd = S S S G 23207_COMP1 R306 28K7R3F-GP C468 SC220P50V2JN-3GP C472 R313 R310 C463 SC1KP50V2KX-1GP 3207_FB 3207_COMP 3207_SS TTSN VRTT DCM# OD# PWM1 PWM2 PWM3 SW1 SW2 SW3 C412 C413 VCC_CORE R251 L9 2 IND-D36UH-9-GP 68.R3610.20C10R2F-L-GP U41 3207_DL1 BSC120N03MS-G-GP SCD1U16V2KX-3GP 2 SC18P50V2JN-1-GP R301 1K65R2F-GP 3207_AGND C469 Id=19.5A Qg=21.5~33nC, Rdson=5.5~6.7mohm U9 D D D D 3207_AGND ADP3611JRMZ-REEL-GP DY 3207_AGND EN PWRGD IMON CLKEN# FBRTN ADP3207CJCPZ-REEL-GP FB COMP NC#8 RPM DPRSLP 71K5R2F-1-GP GAP-CLOSE-PWR 3207_FB1 2 C466 SC150P50V2JN-3GP C461 10 IREF ILIMP ILIMN RT RAMP LLINE CSREF CSSUM CSCOMP GND R286 3207_DH1 CPU_PHASE1 R280 23207_EN 0R2J-2-GP ADP3207_PMON U47 TPAD30 10 VID0_P 0R2J-2-GP R275 R278 Do Not Stuff Do Not Stuff H_VID0 R264 DY 3207_AGND VID1_P 18,38,46,47,48 CPUCORE_ON 13,18,38 VGATE_PWRGD 5K9R2F-GP VID2_P 0R2J-2-GP IN BST SD# DRVH DRVLSD# SW CROWBAR GND VCC DRVL S S S G TP59 GAP-CLOSE-PWR G82 C 0R2J-2-GP H_VID1 R265 1 3207_VTTSENSE DY DCBATOUT_VCORE_3 GAP-CLOSE-PWR G83 H_VID2 R266 RN41 SRN2K2J-2-GP GAP-CLOSE-PWR G84 VID3_P G85 0R2J-2-GP 3D3V_S0 499R3F-GP GAP-CLOSE-PWR DCBATOUT VID4_P H_VID3 R267 BSC057N03MSG-GP 2PM_DPRSLPVR1 7,13 PM_DPRSLPVR VID5_P 0R2J-2-GP C115 Id=35A Qg=17~26nC Rdson=11~14mohm D D D D R320 GAP-CLOSE-PWR G81 0R2J-2-GP H_VID4 R268 U11 R281 7K32R3F-GP 2nd = 84.12003.A37 S S S G H_VID5 R269 R69 1D5R3-GP D D D D GAP-CLOSE-PWR G80 VID6_P SC10U10V5KX-2GP U10 BSC057N03MSG-GP 0R2J-2-GP GAP-CLOSE-PWR G79 DY H_VID[6 0] H_VID6 R270 C456 SC1U10V3KX-3GP R296 Do Not Stuff C116 3207_VCC 3207_AGND DCBATOUT_VCORE_2 G78 3207_BST1 S S S G DCBATOUT DY C117 D5 Do Not Stuff 10R3J-3-GP Do Not Stuff GAP-CLOSE-PWR DY 3207_EN R276 5V_S0 Populate ohm for phase De-pop for phase R274 DY H_DPRSTP#_1 D D D D R272 H_CPUPSI#_1 20081214 BSC120N03MS-G-GP 0R2J-2-GP 0R2J-2-GP Do Not Stuff C457 Do Not Stuff R271 3D3V_S0 2 R262 4,7,12 H_DPRSTP# GAP-CLOSE-PWR G69 R273 H_PSI# 5V_S0 DYDo2 Not Stuff GAP-CLOSE-PWR G70 1 3D3V_S0 C118 SCD33U10V3KX-3GP 2 D 1 DCBATOUT_VCORE_1 G75 DCBATOUT VCC_CORE L11 R308 IND-D36UH-9-GP 68.R3610.20C10R2F-L-GP Cyntec 10*10*4 2nd = 68.R3610.20A DCR=1.05+-5%mohm Irating=30A Isat=60A 84.57N03.A37 A 2nd = 77.C3371.051 2nd = 77.C3371.051 2nd = 77.C3371.051 2nd = 77.C3371.051 2nd = 77.C3371.051 UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title ADP3207C_CPU CORE Size Custom Date: Document Number Rev SB JM70-MV Sheet Saturday, December 20, 2008 51 of 55 A B C D Adaptor in to generate DCBATOUT 1Pin=3A ACES-CON5-7-GP-U1 AD+ AD_JK+ 2nd = 20.F1170.005 Q2 2 DTA124EUB-GP 84.00124.T1K 2nd = 84.00124.K1K R8 2008.11.27 SB Q1 DTC124EUB-GP U3 S S S G D D D D ME4425-GP 84.04425.D37 2nd = 84.04407.F37 KB Conn Test Point keep on connector side AD_JK+ R2 3 100KR2J-1-GP 200KR2J-L1-GP A R9 C14 SC1U50V5ZY-1-GP 1 83.P6SBM.AAG 2nd = 83.P6SMB.AAG AD_OFF#_JK 20.F1002.005 C11 R1 DCIN1 AD+_2 D1 C12 P6SBMJ24APT-GP R2 SCD1U50V3ZY-GP SCD1U50V3ZY-GP K E R1 AD_JK+ 84.00124.S1K 2nd = 84.00124.H1K 39 AD_OFF TP9 TP10 AFTE14P-GP AFTE14P-GP TP8 AFTE14P-GP TP7 AFTE14P-GP MAIN BATTERY CONNECTOR EC30 DY DY EC28 2 EC24 DY BAT1 Conn Test Point keep on connector side 2008.12.16 SB BATA_SCL_1 TP28 AFTE14P-GP BATA_SDA_1 TP27 AFTE14P-GP BAT_IN#_1 TP29 AFTE14P-GP BATT_SENSE TP32 AFTE14P-GP BT+ TP31 AFTE14P-GP BT+ TP30 AFTE14P-GP TP33 AFTE14P-GP TP34 AFTE14P-GP Do Not Stuff Do Not Stuff Do Not Stuff BAT1 SRN33J-7-GP 5BATA_SDA_1 6BATA_SCL_1 8BAT_IN#_1 39,42,50,54 BAT_SDA 39,42,50,54 BAT_SCL 39 BAT_IN# BT+ DY 2 EC29 SCD1U50V3ZY-GP EC27 Do Not Stuff 1 1 A EC26 SC1000P50V3JN-GP DY SCD1U50V3ZY-GP EC25 DY DY EC22 Do Not Stuff D4 Do Not Stuff Do Not Stuff K EC23 RN13 ALP-CON7-15-GP 20.81181.007 UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title 50 BATT_SENSE R56 0R2J-2-GP AD&BTY CONNECTER Size Document Number JM70-MV Sheet Date: Saturday, December 20, 2008 A B C D Rev SB 52 of E 55 2 2 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP EC86 SCD1U50V3KX-GP D EC45 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP EC87 EC88 EC89 VCC_CORE 1D05V_S0 3D3V_S0 SCD1U16V2ZY-2GP SCD1U50V3KX-GP EC43 5V_S0 EC16 DY Do Not Stuff 3D3V_S0 EC41 SCD1U16V2ZY-2GP EC42 SCD1U16V2ZY-2GP EC44 3D3V_S5 3D3V_S0 SCD1U16V2ZY-2GP 5V_S5 EC40 DCBATOUT SCD1U16V2ZY-2GP EC90 EC91 EC100 EC101 D 2 SCD1U50V3KX-GP SCD1U50V3KX-GP EC95 SCD1U50V3KX-GP EC94 SCD1U50V3KX-GP SCD1U50V3KX-GP EC93 2 SCD1U50V3KX-GP EC92 SCD1U50V3KX-GP SCD1U50V3KX-GP DCBATOUT EC96 EC97 EC98 EC99 2008.12.16 SB C 34.43G01.001 1 34.43G01.001 34.43G01.001 34.43G01.001 SPR11 SPR12 SPR13 SPR14 SPR15 SPRING-9-GP SPRING-4 SPRING-4 SPRING-4 SPRING-4 34.49U23.001 Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff C Do Not Stuff SPR1 SPR2 SPR3 SPR4 SPR5 SPR6 SPR8 SPR9 SPR10 Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff 2008.12.16 SB DY DY DY DY DY DY DY DY DY 3D3V_S5 B 5V_S0 14 ZZ.00PAD.571 ZZ.00PAD.571 ZZ.00PAD.571 ZZ.00PAD.571 ZZ.00PAD.571 ZZ.00PAD.571 ZZ.00PAD.571 ZZ.00PAD.571 ZZ.00PAD.571 ZZ.00PAD.571 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP B U6C 10 14 TSLCX08MTCX-GP U17B H20 HOLE U6D 13 14 TSAHCT125PW-GP 2nd = 73.74125.L12 3D3V_S5 12 11 14 TSAHCT125PW-GP 12 34.4Z901.001 HOLE355X355R111-S1-GP ZZ.00PAD.571 STFT256BR75H219-GP HOLE256R142-GP H19 2008.12.16 SB 11 13 STFT256BR117H119-GP 34.4B502.001 34.4G502.001 HOLE256R142-GP 34.42Y01.011 H27 STFT256BR117H119-GP 34.4B502.001 H18 H17 H26 HOLE256R142-GP 34.4B602.001 34.42Y01.011 HOLE256R142-GP 34.42Y01.011 H16 H25 HOLE256R142-GP H24 ZZ.00PAD.571 1 STFT256BR89H178-GP H23 34.4B417.001 34.4B417.001 STFT256BR89H178-GP H22 H15 HOLE355X355R111-S1-GP Do Not Stuff DIS H14 34.42Y01.011 Do Not Stuff Do Not Stuff ZZ.00PAD.571 H21 HOLE A 34.4Z901.001 DIS Do Not Stuff 2008.11.27 SB H1 H12 H13 HOLE355X355R111-S1-GP TSLCX08MTCX-GP U17D UMA A Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size Date: EMI/Spring/Boss Document Number JM70-MV Saturday, December 20, 2008 Sheet Rev SB 53 of 55 A B C Check test point 3D3V_S0 TP184 AFTE14P-GP 3D3V_AUX_S5 TP177 AFTE14P-GP 3D3V_S5 TP178 AFTE14P-GP TP180 AFTE14P-GP 5V_S5 TP183 AFTE14P-GP 13,39 PM_PWRBTN# 39,46 S5_ENABLE 4,6 H_CPURST# TP179 AFTE14P-GP TP182 AFTE14P-GP 31,33 SPKR_L- TP15 AFTE14P-GP 31,33 SPKR_L+ TP16 AFTE14P-GP 31,33 SPKR_R- TP17 AFTE14P-GP 31,33 SPKR_R+ TP18 AFTE14P-GP TP2 AFTE14P-GP TP4 AFTE14P-GP 13,19 USBPN4 TP5 AFTE14P-GP 13,19 USBPP4 TP6 AFTE14P-GP 19,30 DMIC_CLK TP11 AFTE14P-GP 19,30 DMIC_12 TP12 AFTE14P-GP TP3 BT Conn Test Point keep on connector side TP168 AFTE14P-GP 13,26 USBPP7 TP166 AFTE14P-GP TP161 AFTE14P-GP TP164 AFTE14P-GP 3D3V_BT_S0 TP73 AFTE14P-GP TP77 AFTE14P-GP 42,43 WLAN_LED#_R TP81 AFTE14P-GP 42,43 BLT_LED#_1_R TP78 AFTE14P-GP 42,43 BACKUP_LED# TP82 AFTE14P-GP TP83 AFTE14P-GP 42,43 NUM_LED# TP84 AFTE14P-GP 42,43 CAP_LED# TP88 AFTE14P-GP 42 BACKUP_BTN#_1 TP87 AFTE14P-GP 42 BLT_BTN#_1 TP92 AFTE14P-GP 42 WIRELESS_BTN#_1 TP91 AFTE14P-GP TP109 AFTE14P-GP TP106 AFTE14P-GP 3D3V_S0 12,42 MEDIA_LED# KB1 Conn Test Point keep on connector side AFTE14P-GP 13,26 USBPN7 5V_S0 CCD_DMIC_CN1 Conn Test Point keep on connector side CCD_PWR 39 KCOL1 39 KCOL2 39 KCOL3 39 KCOL4 39 KCOL5 39 KCOL6 39 KCOL7 39 KCOL8 39 KCOL9 39 KCOL10 39 KCOL11 39 KCOL12 39 KCOL13 39 KCOL14 39 KCOL15 39 KCOL16 39 KCOL17 39 KCOL18 1 1 1 1 1 1 1 1 1 TP125 TP128 TP115 TP129 TP116 TP130 TP117 TP131 TP118 TP136 TP114 TP137 TP119 TP132 TP120 TP133 TP121 TP134 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP 39 39 39 39 39 39 39 39 1 1 1 1 TP122 TP135 TP123 TP126 TP113 TP127 TP124 TP111 TP112 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 KROW8 PWR_SAVING_CN1 Conn Test Point keep on connector side TP104 AFTE14P-GP 13,41 USBPP6 TP97 AFTE14P-GP 13,41 USBPN6 TP102 AFTE14P-GP 41 TP_LEFT TP101 AFTE14P-GP 41 TP_RIGHT TP100 AFTE14P-GP TP105 AFTE14P-GP 5V_S0 TP66 AFTE14P-GP TP65 AFTE14P-GP TP60 AFTE14P-GP TP69 AFTE14P-GP TP64 AFTE14P-GP 39,42,50,52 BAT_SDA TP68 AFTE14P-GP 41,42 PWR_CON_BTN#_1 TP67 AFTE14P-GP 42,43 PWR_CON_LED# TP61 AFTE14P-GP TP62 AFTE14P-GP TP58 AFTE14P-GP TP57 AFTE14P-GP 5V_S0 3D3V_S0 39,42,50,52 BAT_SCL 39,42 MEDIA_Touch_INT# FP test Point keep on connector side PWR_BT_CN1 Conn Test Point keep on connector side 1 TP19 AFTE14P-GP 39,42,43 FRONT_PWRLED TP23 AFTE14P-GP 39,42,43 STDBY_LED TP24 AFTE14P-GP 42,43 KBC_PWRBTN#_CN TP22 AFTE14P-GP TP21 AFTE14P-GP TP20 AFTE14P-GP 5V_S5 TOUCH PAD Conn Test Point keep on connector side TP170 AFTE14P-GP 3D3V_AUX_S5 USB_CN1 Conn Test Point keep on connector side 5V_S5 E LAUN_CN1 Conn Test Point keep on connector side SPKR1 Conn Test Point keep on connector side Test Point放在Dimm Door打開可量測處 3D3V_S0 D TP171 AFTE14P-GP 13,27 USBPN1 TP160 AFTE14P-GP 13,27 USBPP1 TP162 AFTE14P-GP 13,27 USBPN2 TP163 AFTE14P-GP TP139 AFTE14P-GP 13,27 USBPP2 TP165 AFTE14P-GP 41 TP_RIGHT TP146 AFTE14P-GP 13,27 USB_OC#1 TP158 AFTE14P-GP 41 TP_LEFT TP149 AFTE14P-GP 27,39 USB_PWR_EN# TP169 AFTE14P-GP 39,41 TPDATA TP140 AFTE14P-GP TP159 AFTE14P-GP 39,41 TPCLK TP147 AFTE14P-GP Wistron Corporation TP167 AFTE14P-GP TP138 AFTE14P-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C 5V_S5 39,42 AC_IN_LED 5V_S0 UMA Title AFTE_TP Size A3 Document Number Rev JM70-MV Date: Saturday, December 20, 2008 A B C D SB Sheet E 54 of 55 D D C C B B A A UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title HISTORY Size A2 Document Number Rev SB JM70-MV Date: Saturday, December 20, 2008 Sheet 55 of 55 ... JM70-MV Date: Saturday, December 20, 2008 B C D Sheet E 15 of 55 A B C D E DDR3 SOCKET_1 4 DM1 C351 SCD1U16V2ZY-2GP 30 7,17 DDR3_ DRAMRST# 203 204 1 C352 SC10U6D3V5MX-3GP DY SC1U10V3ZY-6GP C342 DDR_VREF_S3... 0] DY DDR3- 204P-9-GP 62.10017.G11 2nd = 62.10017.K11 High 5.2mm Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size Document Number DDR3 Socket... Saturday, December 20, 2008 A B C D Sheet E Rev SB 16 of 55 A B C D E DDR3 SOCKET_2 DM2 M_ODT2 M_ODT3 DDR_VREF_S3_1 7,16 DDR3_ DRAMRST# 203 204 1 1 C336 SC10U6D3V5MX-3GP SC1U10V3ZY-6GP DDR_VREF_S3