5 (S)JM11_MS (ZH7) BLOCK DIAGRAM PCB STACK UP 8L HDI LAYER : TOP LAYER : GND LAYER : IN1 LAYER : VCC LAYER : IN2 LAYER : IN3 LAYER : GND LAYER : BOT D POWER SYSTEM 5V/3V RT8206B P24 CLOCK CK505 (QFN-64) PG2 XTAL Y2 14.318MHZ FAN & THERMAL P3 CPU Penryn SFF ULV DC/SC P3,4 Micro-FCBGA956/10W C P15 DDR2-SODIMM LVDS NORTH BRIDGE cahnge A 667/800MHZ DDR II cahnge B LED Panel Connector VGA Cantiga SFF GS45 P16 PG 5,6,7,8,9,10 P25 DDR Power RT8207A P26 VCCP 1.05V RT8202A P27 1.5V G9334/AO4466 P28 800/1066 MHz FSB DDR2-SODIMM CPU Core ISL6261A D TMDS HDMI Level Shifter P22 1.5V_S5 RT9025 P22 CRT Connector P21 HDMI Connector P22 P28 C Discharge P28 GFX ISL6263A P29 DMI x 2.5HDD SOUTH BRIDGE SATA0 P20 On Board USB0 P20 PCIE Port Port ICH9-M SFF P19 MINI CARD MINI CARD Connector P19 PCIE5 MINI CARD Connector P19 PCIE1 Connector P21 B MINI CARD PCIE4 Port Port USB Realtek ALC269X Connector Speaker Speaker Connector P21 Digital MIC LED Panel Connector P22 Bule Tooth Port PG 11,12,13,14 P21 On Board USB3 A XTAL Y1 12MHZ Card Reader Alcor AU6433 LPC Port Connector On Board USB2 EC Winbond WPCE775LA0DG P18 Port Port XTAL Y3 32.768KHZ P21 SPI FLASH 2Mbytes P18 XTAL Y4 32.768KHZ 8x16 P17 Keyboard Connector P21 P22 P21 A PS/2 Title TouchPAD Connector P21 QUANTA COMPUTER Schematic Block Diagram Size Document Number Rev ZH7 Date: B Line Out/MIC CODEC CCD P19 XTAL Y2 25MHZ GLAN Atheros AR8131L IHDA P19 SIM CARD Connector Tuesday, June 16, 2009 1A Sheet 1 of 31 +3V Clock Generator (CLK) +3V Q9 Q10 R132 4.7K_4 N-2N7002E [15,16] SMBDT1 2 R133 4.7K_4 PDAT_SMB PDAT_SMB [13,19] [15,16] SMBCK1 N-2N7002E PCLK_SMB PCLK_SMB [13,19] D D +3V U9 L18 PBY160808T-301Y-N/2A/300ohm_6 +3V_VDD_CLK C234 C217 C215 C231 C224 10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 +1.05V L17 C PBY160808T-301Y-N/2A/300ohm_6 +1.05V_VDD_CLK C237 C223 C229 C236 C235 C226 10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 16 23 VDD_PCI VDD_48 VDD_PLL3 VDD_REF 46 62 VDD_SRC VDD_CPU 19 27 33 52 43 56 VDD_96_IO VDD_PLL3_IO VDD_SRC_IO_1 VDD_SRC_IO_3 VDD_SRC_IO_2 VDD_CPU_IO [13] CLKREQ#_SATA CLKREQ#_SATA R136 475/F_4 CR#_A PCI0/CR#_A [21] CLKREQ#_LAN CLKREQ#_LAN R145 475/F_4 CR#_B 10 PCI1/CR#_B PCLK_DEBUG [19] PCLK_DEBUG [18] PCICLK_EC [12] PCLK_ICH 11 PCI2/TME NC 12 PCI3 PCICLK_EC R139 33_4 PCICLK_EC_R 13 PCI4/LCDCLK_SEL PCLK_ICH R148 33_4 PCLK_ICH_R 14 PCIF5/ITP_EN CG_XIN No Stuff R162 FOR EMI XTAL_IN XTAL_OUT SRC5/PCI_STOP# SRC5#/CPU_STOP# 45 44 PM_STPPCI# PM_STPCPU# PM_STPPCI# [13] PM_STPCPU# [13] CPU0 CPU0# 61 60 CLK_CPU_BCLK CLK_CPU_BCLK# CLK_CPU_BCLK [3] CLK_CPU_BCLK# [3] CPU1 CPU1# 58 57 CLK_MCH_BCLK CLK_MCH_BCLK# CLK_MCH_BCLK [5] CLK_MCH_BCLK# [5] SRC8/ITP SRC8#/ITP# 54 53 SRC10 SRC10# 41 42 PECLK_3GPLL PECLK_3GPLL# PECLK_3GPLL [6] PECLK_3GPLL# [6] SRC11/CR#_H SRC11#/CR#_G 40 39 CR#_H CR#_G SRC9 SRC9# 37 38 PECLK_MINI1 PECLK_MINI1# SRC7/CR#_F SRC7#/CR#_E 51 50 CR#_E SRC6 SRC6# 48 47 PECLK_MINI2 PECLK_MINI2# PECLK_MINI2 [19] PECLK_MINI2# [19] SRC4 SRC4# 34 35 PECLK_LAN PECLK_LAN# PECLK_LAN [21] PECLK_LAN# [21] SRC3/CR#_C SRC3#/CR#_D 31 32 PECLK_ICH PECLK_ICH# PECLK_ICH [12] PECLK_ICH# [12] 28 29 PECLK_SATA PECLK_SATA# PECLK_SATA [11] PECLK_SATA# [11] 24 25 DREFSSCLK DREFSSCLK# DREFSSCLK [6] DREFSSCLK# [6] 20 21 DREFCLK DREFCLK# DREFCLK [6] DREFCLK# [6] 63 VR_PWRGD_CK410 VR_PWRGD_CK410 CLK48_CARD R162 *22_4 CG_XOUT CLK48_ICH R160 22_4 CLK48_ICH_R 17 USB_48/FSA FSB 64 FSB/TEST/MODE [13] CLK14_ICH CLK14_ICH R149 CLK14_ICH_R 65 15 18 22 26 59 30 36 49 REF0/FSC/TESTSEL VSS_BODY SRC2/SATA VSS_PCI SRC2#/SATA# VSS_48 VSS_IO SRC1/SE1 VSS_PLL3 SRC1#/SE2 VSS_CPU VSS_SRC1 SRC0/DOT96 VSS_SRC2 SRC0#/DOT96# VSS_SRC3 VSS_REF CKPWRGD/PWRDWN# 33_4 REV: B change R183 & R184 to 27P B 27P/50V_4 CG_XIN C197 27P/50V_4 C183 Y2 +3V SMBCK1 SMBDT1 SCLK SDA [13] CLK48_ICH [21] CLK48_CARD 55 CK505 QFN 14.318MHZ CG_XOUT R168 R170 475/F_4 475/F_4 PM_STPPCI# PM_STPCPU# CLKREQ#_MCH CLKREQ#_MINI1 CPU_BSEL0 R153 R144 2.2K_4 CLK48_ICH_R 1K_4 MCH_BSEL0 MCH_BSEL0 [6] [3] CPU_BSEL1 CPU_BSEL1 R163 R161 *Short_4 FSB 1K_4 MCH_BSEL1 MCH_BSEL1 [6] [3] CPU_BSEL2 CPU_BSEL2 R135 R131 10K_4 CLK14_ICH_R 1K_4 MCH_BSEL2 MCH_BSEL2 [6] [3] CPU_BSEL0 A FSC FSB FSA 0 0 1 1 0 1 0 1 1 1 CPU (MHz) 266.6 133.3 200.0 166.6 333.3 100.0 400.0 SRC (MHz) 100.0 100.0 100.0 100.0 100.0 100.0 100.0 PCI REF (MHz) (MHz) 33.3 14.318 33.3 14.318 33.3 14.318 33.3 14.318 33.3 14.318 33.3 14.318 33.3 14.318 Reserved DOT96 (MHz) 96.0 96.0 96.0 96.0 96.0 96.0 96.0 USB (MHz) 48.0 48.0 48.0 48.0 48.0 48.0 48.0 R146 10K_4 PCLK_DEBUG R138 10K_4 PCICLK_EC_R ITP_EN R165 3G@475/F_4 CLKREQ#_MINI2 10K_4 B CR#_A CR#_B CR#_E CR#_G CR#_H [13] R137 R150 R166 R171 R169 10K_4 10K_4 3G@10K_4 10K_4 10K_4 Clock Request Table MAPPING CLKREQ# Control SRC0 SRC2 CR#_A SATA LCDCLK SRC4 CR#_B LAN SRC0 SRC2 CR#_C N/A LCDCLK SRC4 CR#_D N/A SRC6 CR#_E MINI2 SRC8 CR#_F N/A SRC9 CR#_G MINI1 SRC10 CR#_H MCH *33p/50V_4 *33p/50V_4 *33p/50V_4 *33p/50V_4 *33p/50V_4 PCLK_ICH_R Title QUANTA COMPUTER A CLOCK GENERATOR CK505 LCDCLK_SEL Pin 20/21 DOT_96/DOT96# SRC_0/SRC_0# Size Pin 24/25 LCDCLK/LCDCLK# 27M/27M_SS Document Number Rev ZH7 Date: [19] +3V Pin 53/54 SRC_8/SRC_8# ITP/ITP# R147 C PECLK_MINI1 [19] PECLK_MINI1# [19] +3V PCLK_ICH C206 PCICLK_EC C205 CLK48_ICH C216 CLK48_CARD C222 CLK14_ICH C182 2.2K_4 2.2K_4 CLKREQ#_MCH [6] CLKREQ#_MINI1 [19] SLG8SP513 REV: B Change R161 to short pad R167 R173 Tuesday, June 16, 2009 1A Sheet of 31 Penryn SFF - Host Bus (CPU) [5] H_ADSTB#0 [5] H_REQ#[0 4] H_REQ#[0 4] H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 R1 R5 U1 P4 W5 H_A#[17 35] [5] H_A#[17 35] A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]# ADDR GROUP [5] H_ADSTB#1 C7 D4 F10 A20M# FERR# IGNNE# F8 C9 C5 E5 H_STPCLK# H_INTR H_NMI H_SMI# ICH [11] [11] [11] [11] N5 F38 J1 H_DEFER# [5] H_DRDY# [5] H_DBSY# [5] BR0# M2 IERR# INIT# B40 D8 LOCK# N1 H_LOCK# RESET# RS[0]# RS[1]# RS[2]# TRDY# G5 K2 H4 K4 L1 H_RESET# [5] H_RS#0 [5] H_RS#1 [5] H_RS#2 [5] H_TRDY# [5] HIT# HITM# H2 F2 H_HIT# [5] H_HITM# [5] [5] [11] [5] [5] H_DSTBN#0 [5] H_DSTBP#0 [5] H_DINV#0 [13] R143 [5] H_DSTBN#1 [5] H_DSTBP#1 [5] H_DINV#1 1K/F_4 PROCHOT# THERMDA THERMDC THERMTRIP# H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 +1.05V SYS_RST# D38 BB34 BD34 H_PROCHOT#_D H_THERMDA H_THERMDC B10 H_PM_THRMTRIP# V_CPU_GTLREF R142 2K/F_4 H CLK CLK_CPU_BCLK [2] CLK_CPU_BCLK# [2] [2] CPU_BSEL0 [2] CPU_BSEL1 [2] CPU_BSEL2 P44 V40 V44 AB44 R41 W41 N43 U41 AA41 AB40 AD40 AC41 AA43 Y40 Y44 T44 U43 W43 R43 D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]# AW43 E37 D40 C43 AE41 AY10 AC43 GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 A37 C37 B38 BSEL[0] BSEL[1] BSEL[2] D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]# DSTBN[2]# DSTBP[2]# DINV[2]# AP44 AR43 AH40 AF40 AJ43 AG41 AF44 AH44 AM44 AN43 AM40 AK40 AG43 AP40 AN41 AL41 AK44 AL43 AJ41 H_D#[32 47] H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 A H_DSTBN#2 [5] H_DSTBP#2 [5] H_DINV#2 [5] AV38 AT44 AV40 AU41 AW41 AR41 BA37 BB38 AY36 AT40 BC35 BC39 BA41 BB40 BA35 AU43 AY40 AY38 BC37 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 COMP[0] COMP[1] COMP[2] COMP[3] AE43 AD44 AE1 AF2 COMP0 COMP1 COMP2 COMP3 DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI# G7 B8 C41 E7 D10 BD10 D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]# DSTBN[3]# DSTBP[3]# DINV[3]# MISC [5] H_D#[48 63] [5] H_DSTBN#3 [5] H_DSTBP#3 [5] H_DINV#3 [5] R156 R157 R265 R264 27.4/F_4 54.9/F_4 27.4/F_4 54.9/F_4 Layout note: comp0,2: Zo=27.4ohm, L