Acer aspire switch alpha 12 SA5 271 pegatron P2JCC (HAWAII) rev 0 0 схема

5 HAWAII BLOCK DIAGRAM D C B SYSTEM PAGE REF 01 Block Diagram 02 SKU Table / Mount Table 03 CPU(1) _DDI / eDP 04 CPU(2)_LPDDR3 05 CPU(3)_+VCCCORE 06 CPU(4)_+VCCGT 07 CPU(5)_+VDDQ/IO/SA 08 CPU(6)_CPU GND 09 CPU(7)_CFG/RSVD 16 LPDDR3(1)_MEMORY DOWN 17 LPDDR3(2)_MEMORY DOWN 18 LPDDR3(3)_CA/DQ Voltage 20 PCH(1)_SPI / LPC 21 PCH(2)_ISH / GPIO / I2C 22 PCH(3)_HDA / DMIC / SDIO 23 PCH(4)_USB / PCIE / SATA 24 PCH(5)_CLK / RTC/ CSI-2 25 PCH(6)_POWER MANAGEMENT 26 PCH(7)_POWER 28 PCH(9)_SPI / SMB 30 EC_IT8587E/FX 32 RST_Reset Circuit 36 Codec / Jack / SpK / DMIC 40 Micro SD CONN 41 ISH CONN 44 Debug CONN 45 LCM_EDP 50 THERMAL / NUT 51 SSD NGFF 52 USB 3.0 Port 53 WLAN / WiGig / BT NGFF 55 Camera 2M / 5M 56 IO CONN / POGO PIN 57 Discharge 60 DC_DC / BAT CONN 62 TPM 68 BYPASS EC SEQUENCE 70 Sensor / GMR 80_POWER_VCORE for U22 81_POWER_SYSTEM 82_POWER_+1.0VSUS 83_POWER_ DDR & VTT_UMA 84_POWER_1.8VSUS 88_POWER_CHARGER 89_POWER_ AC_PD_WC Input 90_POWER_DETECT 91_POWER_LOAD SWITCH 92_POWER_PROTECT 93_POWER_SIGNAL 94_POWER_FLOWCHART 95_USB_TYPE-C ANX7428 96_USB Type-C Receptacle A01 Power Tree D Panel (CONN) eDPx4 (1.3) 12'' 2160x1440 eDPx4 LPDDR3 LPDDR3 1600 / 1866 MHz 2Ch 4G/8G Page 45 Page 16~18 Touch Controller Elan 5515 (CONN) I2C(1) Skylake U SATA(8) Gb/s ( gen ) CSI-2(0) I2C(2) Page 55 CPU PCIe(10) WiGig PCIe(9) WLAN USB2.0(5) MIPI ISP REALTEK / RTS5830-GR I2C O.S Win10 Page 16~18 Camera CONN R-5M Camera CONN F-2M Battery 2S1P 36W SSD CONN (M2 2280) 64 / 128 / 256 GB Page 45 Page 55 AC Adapter 19V @ 2.37A USB2.0(7) WIGig / WiFi / BT Module Card (M2 2230) BT + Gyro+A Page 55 SPI InvenSense/MPU-6500 PCH USB2.0(2) SPI ROM 512KB USB3.0(2) Light Sensor Capella/CM32181EA3OP Page 55 DMIC KINGSTATE / KMM40301026-11DH C Page 70 USB3.0 USB CONN x1 Page 70 DMIC_CLK(0), DMIC_DAT(0) ISH_I2C(0) e-Compass HDA DMIC KINGSTATE / KMM40301026-11DH AKM/AK09911C Page 70 Page 36 Charger IC TI / BQ24725ARGRR SM Bus(0) Combo Jack Audio Codec Realtek / ALC255 Speaker (CONN) R/L 2W x2 LPC Page 36 Battery CONN Smart Battery 37.6Whr EC ITE / IT8587 Page 36 GPIO Shutdown IC GMT / G709T1UF uSD CONN ( SDR104 ) SDIO Card Reader Realtek / RTS5229-GR PCIe(5) SM Bus(1) GPIO GMR Sensor Page 40 Page 40 ALPS / HGDEDM013A USB3.0(3) TPM Nuvoton / NPCT650 LPC DDI(2) Cross Point Swtich Analogix / ANX7428 B Page 62 USB3.0 Type C CONN USB2.0(3) USB2.0(4) KeyBoard (POGO Pin) Page 56 SPI SPI ROM 8MB W25Q64FVSSIQ (MB+BIOS+EC) I/O DB Battery LED Dual Coloer (B/O) Docking Cable Touch (I2C) Debug CONN Power Buttom A A Volume Up WTB CONN Volume Down Pins USB2.0 +/- POGO CONN DET 0/1 Pins Power Home Key EC KSI / KSO EC KSI6 + KSI7 LPC 80 Port ALS Title : Block Diagram Page 64 PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: NB R D C /HW S ize D P ro je c t Nam e D ate : T hurs d ay, Marc h , Willy_Liao Rev 0 HAWAII S he e t of 100 EC GPIO Use As Signal Name EC GPIO Use As Signal Name EC GPIO Use As Signal Name EC GPIO Use As Signal Name D D SKU Table (B2 build) C C Mount Table B A Optional Mount? /1st_SSD V /2nd_SSD X /MEM-CH1 V /MEM-CH2 V /E_SENSOR_HUB V /TPM V /Debug V /NON-IOAC V /USBSLP V /IOAC X /SEQS_EC X /BYPAS_EC V /ADSP V /RTL X B A Title : SKU / Mount Table PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: BG1-NB4 Size C Date: Willy_Liao Project Name Rev HAWAII 1.1 Thursday, March 31, 2016 Sheet of 100 +VCCIO +VCCIO [7,9,91] +VCCST_CPU +VCCST_CPU +VCCSTG +3VS D [5,7,9,25,32] +VCCSTG [5,7] +3VS [4,20,21,22,23,24,30,32,36,40,41,44,45,50,51,53,55,56,57,62,70,91,92] D SKYLAKE-U symbol ReV0.53 #545316 / Ballout_Rev0_71 #543787 / PEGA local PN is 4201-0062000 U0301A E55 F55 E58 F58 F53 G53 F56 G56 Remove DDI1 Port : HDMI [95] [95] [95] [95] [95] [95] [95] [95] DDI Port 2: USB_TYPE C_DP DDI1_TXN[0] DDI1_TXP[0] DDI1_TXN[1] DDI1_TXP[1] DDI1_TXN[2] DDI1_TXP[2] DDI1_TXN[3] DDI1_TXP[3] C50 D50 C52 D52 A50 B50 D51 C51 DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3 DDI2_TXN[0] DDI2_TXP[0] DDI2_TXN[1] DDI2_TXP[1] DDI2_TXN[2] DDI2_TXP[2] DDI2_TXN[3] DDI2_TXP[3] EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3] DDI EDP_AUXN EDP_AUXP EDP EDP_DISP_UTIL DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP RSVD_1 RSVD_2 DISPLAY SIDEBANDS L13 L12 [56] TP_RST +VCCIO R0301 tx_r0402 1% 24.9Ohm GPP_E18/DDPB_CTRLCLK GPP_E19/DDPB_CTRLDATA N7 N8 DDPC_CTRLCLK DDPC_CTRLDATA TP_RST N11 N12 DP_COMP E52 C GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3 GPP_E17/EDP_HPD GPP_E20/DDPC_CTRLCLK GPP_E21/DDPC_CTRLDATA GPP_E22 GPP_E23 eDP_BKLTEN eDP_BKLTCTL eDP_VDDEN eDP_RCOMP C47 C46 D46 C45 A45 B45 A47 B47 EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3 E45 F45 [45] [45] [45] [45] [45] [45] [45] [45] +3VS eDP x WQHD Lane FHD Lane DDPC_CTRLDATA DDPC_CTRLCLK EDP_AUXN [45] EDP_AUXP [45] R0305 tx_r0402 R0340 tx_r0402 2.2kOHM R0307 tx_r0402 R0308 tx_r0402 10KOHM DDPB_CTRLDATA DDPC_CTRLDATA DDPD_CTRLDATA - Internal weak pull down 20k ohm - : port is not detected : port is deteccted 2.2kOHM AUX For eDP B52 G50 F50 E48 F48 G46 F46 L9 L7 L6 N9 L10 No Connect 543016 page 824 DDI2_AUXN [95] DDI2_AUXP [95] +3VS EXT_SCI# DDI1_HPD DDI2_HPD EXT_SMI#_R EXT_SCI#_R eDP_HPD EXT_SMI# R0302 R0303 1 0Ohm 0Ohm tx_r0402 tx_r0402 DDI2_HPD [95] EXT_SMI# [30,44] EXT_SCI# [30] eDP_HPD [45] EXT_SMI# EXT_SCI# R12 R11 U13 10KOHM LCD_BKLTEN_PCH [21,45] LCD_BL_PWM_PCH [45] EDP_VDD_EN [45] C 940432 01T010000015 H_PROCHOT# R0314 1 499Ohm 1% 43Ohm R0313 49.9Ohm tx_r0402 1% @ tx_r0402 tx_r0402 SP0301 [32] H_THRMTRIP# T0306 +3VS TP_CATERR#_R H_PECI H_PROCHOT#_R H_THRMTRIP#_R SKTOCC# Remove XDP_BPM# T0311 [56] TP_INT T0313 T0314 R0316 R0317 R0318 R0319 1 U0301D D63 A54 C65 C63 A65 @ R9617 10KOhm tx_r0402 B 1 1 1% 1% 1% 1% 2 2 49.9Ohm 49.9Ohm 49.9Ohm 49.9Ohm tx_r0402 tx_r0402 tx_r0402 tx_r0402 1 CPU_GP0 TP_INT CPU_GP2 CPU_GP3 CPU_POPIRCOMP PCH_POPIRCOMP EDRAM_OPIO_RCOMP EOPIO_RCOMP C55 D55 B54 C56 A6 A7 BA5 AY5 AT16 AU16 H66 H65 CATERR# PECI PROCHOT# THERMTRIP# SKTOCC# +VCCSTG JTAG XDP Less Default Mount CPU MISC PROC_TCK PROC_TDI PROC_TDO PROC_TMS PROC_TRST# BPM#[0] BPM#[1] BPM#[2] BPM#[3] GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3 PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS PCH_TRST# JTAGX PROC_POPIRCOMP PCH_OPIRCOMP OPCE_RCOMP OPC_RCOMP B61 D60 A61 C60 B59 XDP_TCLK XDP_TDI_CPU XDP_TDO_CPU XDP_TMS_CPU XDP_TRST_CPU_N B56 D59 A56 C59 C61 A59 PCH_JTAG_TCLK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS PCH_TRST_CPU_N XDP_TCLK_JTAGX PCH_JTAG_TMS XDP_TDO_CPU R0323 tx_r0402 XDP_TMS_CPU PCH_TRST_CPU_N XDP_TRST_CPU_N PCH_JTAG_TDI XDP_TDI_CPU XDP_TCLK_JTAGX XDP_TCLK PCH_JTAG_TDO T0315 R0324 tx_r0402 51Ohm R0320 @ tx_r0402_0ohm T0316 T0317 T0318 B 51Ohm XDP Less Default Mount 940432 01T010000015 [80] VR_HOT# DDPB_HPD0 DDPC_HPD1 DP: 100Kohm pull down on PCH Side HDMI: 20Kohm pull down R0337 100KOHM tx_r0402 Closeer EC R0312 1KOhm tx_r0402 5% R0315 [30] H_PECI_EC DDI2_HPD R0342 20KOhm tx_r0402 @ +VCCST_CPU 2 R0311 1KOhm tx_r0402 R0346 100KOHM tx_r0402 R0345 10KOhm tx_r0402 @ 141024 follow PDG V1.0 Table 10-4 Rpu = 1K ohm 5% Rs = 500 ohm 5% +VCCSTG +VCCST_CPU 2 DDI1_HPD eDP_HPD R0343 10KOhm tx_r0402 @ R0344 10KOhm tx_r0402 @ +3VS +3VS +3VS Modify to XDP less 0Ohm R1.1 由 H_PROCHOT# 觸觸觸觸觸觸觸觸觸觸觸觸觸 ohm 預預70-200 0ohm觸是是是是 R0341 EC control (depends on under-shoot measurement result), R0341 0Ohm tx_r0402_0ohm A Q0301 NX7002AK A D G THRO_CPU [30] S Title : CPU(1)_DDI/eDP PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size C Date: Willy_Liao Project Name Rev HAWAII 0.0 Thursday, March 31, 2016 Sheet of 100 +1.2V +1.2V [7,16,17,18,83] +3VSUS T25S used Non-Interleave M_A_DQS#[7:0] M_A_DQS[7:0] [16] [17] M_B_D[63:0] M_B_DQS#[7:0] [16] [16] M_B_CAA[9:0] [17] M_A_CAB[9:0] [16] M_B_CAB[9:0] [17] SKL_ULT U0301C DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3] DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_MA[3] DDR0_MA[4] NIL Channel B[0 15] NIL Channel B[32 47] IL Channel A DQS[0 7] NIL Channel A DQS[0,1,4,5] DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1] DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5] NIL Channel B DQS[0,1,4,5] DDR CH - A DDR0_ALERT# DDR0_PAR DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ DDR_VTT_CNTL AU53 AT53 AU55 AT55 M_A_DIM0_CLK#0 [16] M_A_DIM0_CLK0 [16] M_A_DIM0_CLK#1 [16] M_A_DIM0_CLK1 [16] BA56 BB56 AW56 AY56 AU45 AU43 AT45 AT43 M_A_DIM0_CKE0 M_A_DIM0_CKE1 M_A_DIM0_CKE2 M_A_DIM0_CKE3 M_A_CAA0 M_A_CAA1 M_A_CAA2 M_A_CAA3 M_A_CAA4 M_A_CAA5 M_A_CAA6 M_A_CAA7 M_A_CAA8 M_A_CAA9 AU46 AU48 AT46 AU50 AU52 AY51 AT48 AT50 BB50 AY50 BA50 BB52 M_A_CAB0 M_A_CAB1 M_A_CAB2 M_A_CAB3 M_A_CAB4 M_A_CAB5 M_A_CAB6 M_A_CAB7 M_A_CAB8 M_A_CAB9 AM70 AM69 AT69 AT70 BA64 AY64 AY60 BA60 BA38 AY38 AY34 BA34 BA30 AY30 AY26 BA26 M_A_DIM0_CS#0 [16] M_A_DIM0_CS#1 [16] M_A_DIM0_ODT0 [16] M_A_DIM0_ODT0 BA51 BB54 BA52 AY52 AW52 AY55 AW54 BA54 BA55 AY54 [16] [16] [16] [16] M_A_DQS#0 M_A_DQS0 M_A_DQS#1 M_A_DQS1 M_A_DQS#4 M_A_DQS4 M_A_DQS#5 M_A_DQS5 M_B_DQS#0 M_B_DQS0 M_B_DQS#1 M_B_DQS1 M_B_DQS#4 M_B_DQS4 M_B_DQS#5 M_B_DQS5 AW50 AT52 AY67 AY68 BA67 AW67 DIMM_VREF_CA DIMM0_VREF_DQ DIMM1_VREF_DQ [18] [18] [18] DDR_PG_CTRL_S AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69 AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60 AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30 AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21 M_A_D16 M_A_D17 M_A_D18 M_A_D19 M_A_D20 M_A_D21 M_A_D22 M_A_D23 M_A_D24 M_A_D25 M_A_D26 M_A_D27 M_A_D28 M_A_D29 M_A_D30 M_A_D31 M_A_D48 M_A_D49 M_A_D50 M_A_D51 M_A_D52 M_A_D53 M_A_D54 M_A_D55 M_A_D56 M_A_D57 M_A_D58 M_A_D59 M_A_D60 M_A_D61 M_A_D62 M_A_D63 M_B_D16 M_B_D17 M_B_D18 M_B_D19 M_B_D20 M_B_D21 M_B_D22 M_B_D23 M_B_D24 M_B_D25 M_B_D26 M_B_D27 M_B_D28 M_B_D29 M_B_D30 M_B_D31 M_B_D48 M_B_D49 M_B_D50 M_B_D51 M_B_D52 M_B_D53 M_B_D54 M_B_D55 M_B_D56 M_B_D57 M_B_D58 M_B_D59 M_B_D60 M_B_D61 M_B_D62 M_B_D63 NIL Channel A[16 31] NIL Channel A[0 15] NIL Channel A[32 47] DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1] NIL Channel A[48 63] IL Channel A[0 63] DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15] DDR0_DQ[16]/DDR0_DQ[32] DDR0_DQ[17]/DDR0_DQ[33] DDR0_DQ[18]/DDR0_DQ[34] DDR0_DQ[19]/DDR0_DQ[35] DDR0_DQ[20]/DDR0_DQ[36] DDR0_DQ[21]/DDR0_DQ[37] DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQ[26]/DDR0_DQ[42] DDR0_DQ[27]/DDR0_DQ[43] DDR0_DQ[28]/DDR0_DQ[44] DDR0_DQ[29]/DDR0_DQ[45] DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQ[32]/DDR1_DQ[0] DDR0_DQ[33]/DDR1_DQ[1] DDR0_DQ[34]/DDR1_DQ[2] DDR0_DQ[35]/DDR1_DQ[3] DDR0_DQ[36]/DDR1_DQ[4] DDR0_DQ[37]/DDR1_DQ[5] DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQ[61]/DDR1_DQ[45] DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQ[63]/DDR1_DQ[47] NIL Channel B[16 31] AL71 AL68 AN68 AN69 AL70 AL69 AN70 AN71 AR70 AR68 AU71 AU68 AR71 AR69 AU70 AU69 BB65 AW65 AW63 AY63 BA65 AY65 BA63 BB63 BA61 AW61 BB59 AW59 BB61 AY61 BA59 AY59 AY39 AW39 AY37 AW37 BB39 BA39 BA37 BB37 AY35 AW35 AY33 AW33 BB35 BA35 BA33 BB33 AY31 AW31 AY29 AW29 BB31 BA31 BA29 BB29 AY27 AW27 AY25 AW25 BB27 BA27 BA25 BB25 [17] M_A_CAA[9:0] NIL Channel B[48 63] NIL Channel A[0 15] NIL Channel A[32 47] NIL Channel B[0 15] NIL Channel B[32 47] C M_A_D0 M_A_D1 M_A_D2 M_A_D3 M_A_D4 M_A_D5 M_A_D6 M_A_D7 M_A_D8 M_A_D9 M_A_D10 M_A_D11 M_A_D12 M_A_D13 M_A_D14 M_A_D15 M_A_D32 M_A_D33 M_A_D34 M_A_D35 M_A_D36 M_A_D37 M_A_D38 M_A_D39 M_A_D40 M_A_D41 M_A_D42 M_A_D43 M_A_D44 M_A_D45 M_A_D46 M_A_D47 M_B_D0 M_B_D1 M_B_D2 M_B_D3 M_B_D4 M_B_D5 M_B_D6 M_B_D7 M_B_D8 M_B_D9 M_B_D10 M_B_D11 M_B_D12 M_B_D13 M_B_D14 M_B_D15 M_B_D32 M_B_D33 M_B_D34 M_B_D35 M_B_D36 M_B_D37 M_B_D38 M_B_D39 M_B_D40 M_B_D41 M_B_D42 M_B_D43 M_B_D44 M_B_D45 M_B_D46 M_B_D47 940432 01T010000015 +3VS [3,20,21,22,23,24,30,32,36,40,41,44,45,50,51,53,55,56,57,62,70,91,92] [17] M_B_DQS[7:0] U0301B D +3VSUS [24,25,26,28,30,51,53,62,68,81,84,92,95] +3VS [16] M_A_D[63:0] IL Channel B[0 63] DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] DDR1_DQ[4]/DDR0_DQ[20] DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3] DDR1_DQ[9]/DDR0_DQ[25] DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] DDR1_DQ[14]/DDR0_DQ[30] DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_DQ[25]/DDR0_DQ[57] DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4] DDR1_DQ[38]/DDR1_DQ[22] DDR1_DQ[39]/DDR1_DQ[23] IL Channel B DQS[0 7] DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] NIL Channel A DDR1_DQ[51] DDR1_DQSN[6] DQS[2,3,6,7] DDR1_DQ[52] DDR1_DQSP[6] DDR1_DQ[53] DDR1_DQSN[7] DDR1_DQ[54] DDR1_DQSP[7] DDR1_DQ[55] DDR1_DQ[56] DDR1_ALERT# DDR1_DQ[57] DDR1_PAR NIL Channel B DDR1_DQ[58] DRAM_RESET# DQS[2,3,6,7] DDR1_DQ[59] DDR_RCOMP[0] DDR1_DQ[60] DDR_RCOMP[1] DDR1_DQ[61] DDR_RCOMP[2] DDR1_DQ[62] DDR CH - B DDR1_DQ[63] NIL Channel A[16 31] NIL Channel A[48 63] NIL Channel B[16 31] NIL Channel B[48 63] D AN45 AN46 AP45 AP46 M_B_DIM0_CLK#0 [17] M_B_DIM0_CLK#1 [17] M_B_DIM0_CLK0 [17] M_B_DIM0_CLK1 [17] AN56 AP55 AN55 AP53 BB42 AY42 BA42 AW42 M_B_DIM0_CKE0 M_B_DIM0_CKE1 M_B_DIM0_CKE2 M_B_DIM0_CKE3 M_B_CAA0 M_B_CAA1 M_B_CAA2 M_B_CAA3 M_B_CAA4 M_B_CAA5 M_B_CAA6 M_B_CAA7 M_B_CAA8 M_B_CAA9 BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47 M_B_CAB0 M_B_CAB1 M_B_CAB2 M_B_CAB3 M_B_CAB4 M_B_CAB5 M_B_CAB6 M_B_CAB7 M_B_CAB8 M_B_CAB9 AH66 AH65 AG69 AG70 AR66 AR65 AR61 AR60 AT38 AR38 AT32 AR32 AR25 AR27 AR22 AR21 M_B_DIM0_CS#0 [17] M_B_DIM0_CS#1 [17] M_B_DIM0_ODT0 [17] M_B_DIM0_ODT0 AY48 AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52 [17] [17] [17] [17] C M_A_DQS#2 M_A_DQS2 M_A_DQS#3 M_A_DQS3 M_A_DQS#6 M_A_DQS6 M_A_DQS#7 M_A_DQS7 M_B_DQS#2 M_B_DQS2 M_B_DQS#3 M_B_DQS3 M_B_DQS#6 M_B_DQS6 M_B_DQS#7 M_B_DQS7 AN43 AP43 AT13 DRAM_RESET# AR18 SM_RCOMP_0 R0402 AT18 SM_RCOMP_1 R0403 AU18 SM_RCOMP_2 R0404 Controls reset to the memory subsystems, and is used on DDR3L, DDR4 (not applicable to LPDDR3) 1 1% 1% 1% 200Ohm 80.6Ohm 162Ohm tx_r0402 tx_r0402 tx_r0402 T0401 940432 01T010000015 B B @ R0407 220KOhm tx_r0402 @ DDR_PG_CTRL @ C0402 10PF/50V tx_c0402 [83] DDR_VTT_CNTL to VTT power ready < 35us (tCPU18) SN74AUP1G07DCKR 06T030000021 R0412 220KOhm tx_r0402 ChannelB DQ[32 47] DQS/DQS#[4,5] R0406 10KOhm tx_r0402 Y ChannelB DQ[0 15] DQS/DQS#[0,1] VCC 1 NC A GND +3VSUS U0401 ChannelADQ[32 47] DQS/DQS#[4,5] C0401 0.1UF/16V tx_c0402 2 Non-interleaved ChannelA DQ[0 15] DQS/DQS#[0,1] +3VS +1.2V Symbol U0301 B interleaved(Symbol default) BYTE BYTE BYTE BYTE ChannelA DQ[0 63] DQS/DQS#[0 7] BYTE BYTE BYTE BYTE R0411 2MOhm tx_r0402 @ Symbol U0301 C interleaved(Symbol default) BYTE BYTE BYTE BYTE ChannelB DQ[0 63] DQS/DQS#[0 7] BYTE BYTE BYTE BYTE Non-interleaved ChannelA DQ[16 31] DQS/DQS#[2,3] ChannelADQ[48 63] DQS/DQS#[6,7] ChannelB DQ[16 31] DQS/DQS#[2,3] ChannelB DQ[48 63] DQS/DQS#[6,7] RF reserve A A Title : CPU(2)_DDR3L PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: BG1-NB4 Size C Date: Willy_Liao Project Name Rev HAWAII 0.0 Thursday, March 31, 2016 Sheet of 100 +VCORE +VCCSTG +VCORE [80] +VCCSTG [3,7] +VCCST_CPU D +VCORE +VCCST_CPU [3,7,9,25,32] D +VCORE U0301L AK32 T0510 Remove R0528/R0529/R0530/R0531/R0532 R0533/R0534/R0535 Resistor change to Test Point Delete for power layout limitation AB62 P62 V62 T0511 H63 T0512 G61 T0513 T0514 1 AC63 AE63 T0515 AE62 AG62 T0516 T0517 1 AL63 AJ62 RSVD_4 VCCOPC_1 VCCOPC_2 VCCOPC_3 VIDALERT# VIDSCK VIDSOUT VCCSTG 0Ohm VR_SVID_ALERT# [80] +VCCST_CPU Pull H/L near CPU side R0537 1% tx_r0402 VIDALERT# R0517 VIDSCK R0518 VIDSOUT R0519 B63 A63 D64 100Ohm +VCORE [80] VCORE_VSSSENSE [80] 100Ohm 1 220Ohm tx_r0402 0Ohm tx_r0402_0ohm 0Ohm tx_r0402_0ohm 1% +VCCSTG G20 VCC_OPC_1P8_1 +VCCFUSEPRG SP0505 NB_R0402_20MIL_SMALL VCC_OPC_1P8_2 VIDALERT#_R VIDSCK_R R0522 45.3Ohm tx_r0402 1% C0505 1UF/6.3V tx_c0402 C R0525 tx_r0402 +VCCST_CPU +VCCST_CPU 51Ohm 1% VR_SVID_CLK [80] @ VCCOPC_SENSE VSSOPC_SENSE VCCEOPIO_1 VCCEOPIO_2 R0520 56Ohm tx_r0402 1% VCORE_VCCSENSE E32 E33 1% R0536 tx_r0402 VCC_SENSE VSS_SENSE RSVD_3 R0524 tx_r0402_0ohm +VCCST_CPU K32 VR side RSVD NC CPU side RF reserve R0521 100Ohm tx_r0402 1% From Intel, SKL-U 2+2 reserve these pins PD to GND C0507 10PF/50V tx_c0201 C G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43 SKL 2+2, +V1.8VS_EDRAM / +V_EDRAM_VR / +V_EOPIO_VR VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 RF reserve VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 A30 A34 A39 A44 AK33 AK35 AK37 AK38 AK40 AL33 AL37 AL40 AM32 AM33 AM35 AM37 AM38 G30 C0506 10PF/50V tx_c0201 CPU POWER OF VIDSOUT_R VCCEOPIO_SENSE VSSEOPIO_SENSE R0523 100Ohm tx_r0402 1% R0526 tx_r0402 1% 10Ohm VR_SVID_DATA [80] 940432 01T010000015 B B A A Title :CPU(3)_+VCCCORE PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size C Date: Willy_Liao Project Name Rev HAWAII 0.0 Thursday, March 31, 2016 Sheet of 100 +VCCGT +VCCGT +VCCGT +VCCGT [80] U0301M CPU POWER OF RF reserve C R0609 100Ohm tx_r0402 1% +VCCGT Pull H/L near CPU side J70 J69 R0610 100Ohm tx_r0402 1% VCCGT_SENSE VSSGT_SENSE VCCGT_56 VCCGT_57 VCCGT_58 VCCGT_59 VCCGT_60 VCCGT_61 VCCGT_62 VCCGT_63 VCCGT_64 VCCGT_65 VCCGT_66 VCCGT_67 VCCGT_68 VCCGT_69 VCCGT_70 VCCGT_71 VCCGT_72 VCCGT_73 VCCGT_74 VCCGT_75 VCCGT_76 VCCGT_77 VCCGT_78 VCCGT_79 VCCGT_80 VccGTx_1 VccGTx_2 VccGTx_3 VccGTx_4 VccGTx_5 VccGTx_6 VccGTx_7 VccGTx_8 VccGTx_9 VccGTx_10 VccGTx_11 VccGTx_12 VccGTx_13 VccGTx_14 VccGTx_15 VccGTx_16 VccGTx_17 VccGTx_18 VccGTx_19 VccGTx_20 VccGTx_21 VccGTx_22 VccGTx_23 VccGTx_24 VccGTx_25 VccGTx_26 VccGTx_27 VccGTx_28 VccGTx_29 VCCGTx_SENSE VSSGTx_SENSE N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62 D C0600 10PF/50V tx_c0201 RF reserve AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66 T0601 T0602 1 1 T0603 T0604 T0605 T0606 AK62 AL61 1 T0607 T0608 C VccGTx is for 2+3e From Intel, SKL-U 2+2 reserve these pins PD to GND 2015/01/20 Remove R0601-R0608 Resistor change to Test Point Delete for power layout limitation 940432 01T010000015 [80] VCCGT_VCCSENSE [80] VCCGT_VSSSENSE VCCGT_1 VCCGT_2 VCCGT_3 VCCGT_4 VCCGT_5 VCCGT_6 VCCGT_7 VCCGT_8 VCCGT_9 VCCGT_10 VCCGT_11 VCCGT_12 VCCGT_13 VCCGT_14 VCCGT_15 VCCGT_16 VCCGT_17 VCCGT_18 VCCGT_19 VCCGT_20 VCCGT_21 VCCGT_22 VCCGT_23 VCCGT_24 VCCGT_25 VCCGT_26 VCCGT_27 VCCGT_28 VCCGT_29 VCCGT_30 VCCGT_31 VCCGT_32 VCCGT_33 VCCGT_34 VCCGT_35 VCCGT_36 VCCGT_37 VCCGT_38 VCCGT_39 VCCGT_40 VCCGT_41 VCCGT_42 VCCGT_43 VCCGT_44 VCCGT_45 VCCGT_46 VCCGT_47 VCCGT_48 VCCGT_49 VCCGT_50 VCCGT_51 VCCGT_52 VCCGT_53 VCCGT_54 VCCGT_55 A48 A53 A58 A62 A66 AA63 AA64 AA66 AA67 AA69 AA70 AA71 AC64 AC65 AC66 AC67 AC68 AC69 AC70 AC71 J43 J45 J46 J48 J50 J52 J53 J55 J56 J58 J60 K48 K50 K52 K53 K55 K56 K58 K60 L62 L63 L64 L65 L66 L67 L68 L69 L70 L71 M62 N63 N64 N66 N67 N69 C0601 10PF/50V tx_c0201 D Pull H/L near CPU side B B A A Title : CPU(4)_+VCCGT PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size C Date: Willy_Liao Project Name Rev HAWAII 0.0 Thursday, March 31, 2016 Sheet of 100 +1.2V +1.2V [4,16,17,18,83] +VCCST_CPU +VCCST_CPU +VCCSTG [3,5,9,25,32] +VCCSTG [3,5] +VCCIO +VCCIO [3,9,91] +VCCSA +VCCSA [80] D D +VCCST_CPU VDDQC A18 C0711 0.1UF/16V tx_c0201 VCCST A22 VCCSTG AL23 VCCPLL_OC K20 K21 C0712 1UF/6.3V VccPLL_1 VccPLL_2 tx_c0201 VCCIO_SENSE VSSIO_SENSE +VCCSTG C VSSSA_SENSE VCCSA_SENSE C0713 0.1UF/16V tx_c0201 C0723 10PF/50V tx_c0201 C0722 10PF/50V tx_c0201 tx_c0201 C0720 1UF/6.3V 1 tx_c0201 +VCCIO RF reserve VCCIO_VR_FB VSSIO_VR_FB R0714 1KOhm tx_r0402 @ Reserved PH/PD VCCSA_VSSSENSE R0702 tx_r0402 1% 100Ohm R0703 tx_r0402 1% 100Ohm [80] R0715 1KOhm tx_r0402 @ C +VCCSA VCCSA_VCCSENSE C0719 1UF/6.3V [80] Pull H/L near CPU side +VCCSFR_OC 2 1 tx_c0201 RF reserve H21 H20 940432 01T010000015 C0718 1UF/6.3V +VCCSA AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30 AM23 AM22 tx_c0201 AM40 0Ohm R0701 tx_r0402_0ohm C0717 1UF/6.3V RF reserve VCCSA_1 VCCSA_2 VCCSA_3 VCCSA_4 VCCSA_5 VCCSA_6 VCCSA_7 VCCSA_8 VCCSA_9 VCCSA_10 VCCSA_11 VCCSA_12 VCCSA_13 VCCSA_14 AK28 AK30 AL30 AL42 AM28 AM30 AM42 +VDDQ_CPU_CLK VCCIO_1 VCCIO_2 VCCIO_3 VCCIO_4 VCCIO_5 VCCIO_6 VCCIO_7 tx_c0201 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 C0710 1UF/6.3V @ +VDDQ_CPU +VCCIO CPU POWER OF AU23 AU28 AU35 AU42 BB23 BB32 BB41 BB47 BB51 tx_c0201 C0709 1UF/6.3V tx_c0201 C0708 1UF/6.3V 2 2 2 1 1 1 C0701 C0702 C0703 C0704 C0705 C0706 C0707 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 1UF/6.3V tx_c0603_t02_h39 tx_c0603_t02_h39 tx_c0603_t02_h39 tx_c0603_t02_h39 tx_c0603_t02_h39 tx_c0603_t02_h39 tx_c0201 C0721 10PF/50V tx_c0201 @ JP0702 3MM_OPEN_5MIL 2 U0301N C0701 - C0704 : Near by package C0705 - C0710 : Underneath the package JP0701 3MM_OPEN_5MIL 2 +VDDQ_CPU +1.2V C0714 0.1UF/16V tx_c0201 +1.0V +VCCST_CPU +1.2V +VCCSFR_OC Refer to CRB 0.53 R0710 tx_r0402_0ohm +VCCSFR 0Ohm 2 +1.0V C0715 0.1UF/16V tx_c0201 C0716 0.1UF/16V tx_c0201 R0709 tx_r0402_0ohm +VCCSFR R0711 tx_r0402_0ohm 0Ohm 141127 65u sec full load ready 141030 Merge Power PDDG0.91 Table5-1 0Ohm Remove +1.35V_LS +VCCIO B +VCCSTG R0713 tx_r0402_0ohm B 0Ohm 141030 Merge Power PDDG0.91 Table5-1 141127 65u sec full load ready Remove +1.35V_LS A A CPU(5)_+VDDQ/IO/SA Title : PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: reference 543977_543977_SKL_PDDG_Rev0_91 Size C Date: Willy_Liao Project Name Rev HAWAII 0.0 Thursday, March 31, 2016 Sheet of 100 U0301P U0301Q GND OF A5 A67 A70 AA2 AA4 AA65 AA68 AB15 AB16 AB18 AB21 AB8 AD13 AD16 AD19 AD20 AD21 AD62 AD8 AE64 AE65 AE66 AE67 AE68 AE69 AF1 AF10 AF15 AF17 AF2 AF4 AF63 AG16 AG17 AG18 AG19 AG20 AG21 AG71 AH13 AH6 AH63 AH64 AH67 AJ15 AJ18 AJ20 AJ4 AK11 AK16 AK18 AK21 AK22 AK27 AK63 AK68 AK69 AK8 AL2 AL28 AL32 AL35 AL38 AL4 AL45 AL48 AL52 AL55 AL58 AL64 D C VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 U0301R GND OF VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 AL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58 AT63 AT68 AT71 AU10 AU15 AU20 AU32 AU38 AV1 AV68 AV69 AV70 AV71 AW10 AW12 AW14 AW16 AW18 AW21 AW23 AW26 AW28 AW30 AW32 AW34 AW36 AW38 AW41 AW43 AW45 AW47 AW49 AW51 AW53 AW55 AW57 AW6 AW60 AW62 AW64 AW66 AW8 AY66 B10 B14 B18 B22 B30 B34 B39 B44 B48 B53 B58 B62 B66 B71 BA1 BA10 BA14 BA18 BA2 BA23 BA28 BA32 BA36 F68 BA45 940432 01T010000015 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 GND OF VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41 F8 G10 G22 G43 G45 G48 G5 G52 G55 G58 G6 G60 G63 G66 H15 H18 H71 J11 J13 J25 J28 J32 J35 J38 J42 J8 K16 K18 K22 K61 K63 K64 K65 K66 K67 K68 K70 K71 L11 L16 L17 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 L18 L2 L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W13 W6 W9 Y17 Y19 Y20 Y21 D 940432 01T010000015 C 940432 01T010000015 B B A A Title : CPU(6)_CPU GND PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size C Date: Willy_Liao Project Name Rev HAWAII 0.0 Thursday, March 31, 2016 Sheet of 100 +VCCIO U0301S 1 CFG16 CFG17 E63 F63 T0921 T0922 1 CFG18 CFG19 E66 F66 R0901 tx_r0402 Reserve TP for XDP 1% 49.9Ohm CFG_RCOMP T0901 D1 D3 RSVD_5 RSVD_6 RSVD_32 RSVD_33 RSVD_7 RSVD_8 RSVD_34 RSVD_35 TP4 RSVD_36 RSVD_37 RSVD_38 F60 RSVD_39 RSVD_40 RSVD_15 RSVD_41 RSVD_42 RSVD_16 BA70 BA68 RSVD_TP_1 RSVD_TP_2 J71 J68 F65 G65 Remove SNN RSVD_30 RSVD_31 RSVD_13 RSVD_14 A52 Intel confirm NC ITP_PMODE RSVD_11 RSVD_12 C71 B70 RSVD_VSS_F65 RSVD_VSS_G65 RSVD_27 RSVD_28 RSVD_9 RSVD_10 AL25 AL27 1 RSVD_23 RSVD_24 RSVD_25 RSVD_26 CFG_RCOMP K46 K45 T0917 T0918 TP5 TP6 RSVD_29 AY2 AY1 C RSVD_21 RSVD_22 CFG[18] CFG[19] E8 Remove SNN RSVD_TP_5 RSVD_TP_6 CFG[16] CFG[17] E60 ITP_PMODE RSVD_TP_3 RSVD_TP_4 F61 E61 TP1 TP2 RSVD_17 RSVD_18 VSS_362 ZVM# VSS_360 VSS_361 RSVD_TP_7 RSVD_TP_8 RSVD_19 RSVD_20 MSM# PROC_SELECT# BB68 BB69 AK13 AK12 +VCCST_CPU [3,5,7,25,32] +1.8VSUS [26,84] Remove SNN BB2 BA3 AU5 AT5 U0301T D SPARE D5 D4 B2 C2 AW69 AW68 AU56 AW48 C7 U12 U11 H11 +1.8VSUS B3 A3 R0930 R0931 1 0Ohm tx_r0402_0ohm 0Ohm tx_r0402_0ohm @ @ AW1 VCC_1P8_U12 VCC_1P8_U11 E1 E2 @ C0901 0.1UF/25V tx_c0402 T0919 T0920 CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] E68 B67 D65 D67 E70 C68 D68 C67 F71 G69 F70 G68 H70 G71 H69 G70 +1.8VSUS D CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 +VCCIO [3,7,91] +VCCST_CPU RESERVED SIGNALS-1 @ C0902 0.1UF/25V tx_c0402 RSVD_51 RSVD_52 RSVD_53 RSVD_54 RSVD_55 RSVD_56 RSVD_57 RSVD_58 F6 E3 C11 B11 A11 D12 C12 F52 940432 01T010000015 BA4 BB4 A4 C4 RSVD_43 RSVD_44 RSVD_45 RSVD_46 RSVD_47 RSVD_48 RSVD_49 RSVD_50 PDG 1.2 Placeholder only Does not need to be stuffed Placement are required for future platform compatibility purpose only BB5 A69 B69 AY3 D71 C70 R0902 tx_r0402_0ohm RSVD_AY3 0Ohm Remove SNN C54 D54 AY4 BB3 AY71 AR56 AW71 AW70 AP56 C64 R0903 tx_r0402_0ohm VSS_AY71 0Ohm C +VCCST_CPU From Intel, SKL-U 2+2 remove these pins Remove SNN R0904 tx_r0402 SKL_CNL# 940432 01T010000015 @ 100KOHM MOW WW48 Ball C64 which is PROC_SELECT# needs to be pulled to VCCST for Cannonlake support via 100K ohm resistor and with no resistor populated (floating pin) for Skylake +VCCIO R0905 0Ohm tx_r0402_0ohm @ +VCCIO_OUT_CFG_PU B R0906 tx_r0402 @ 1% 10KOhm CFG0 R0922 tx_r0402 @ 1KOhm R0907 tx_r0402 @ 1% 10KOhm CFG1 R0923 tx_r0402 @ 1KOhm R0908 tx_r0402 @ 1% 10KOhm CFG2 R0924 tx_r0402 @ 1KOhm @ 1% 10KOhm CFG3 R0925 tx_r0402 @ 1KOhm R0910 tx_r0402 @ 1% 10KOhm CFG4 R0926 tx_r0402 R0911 tx_r0402 @ 1% 10KOhm CFG5 R0927 tx_r0402 @ 1KOhm R0912 tx_r0402 @ 1% 10KOhm CFG6 R0928 tx_r0402 @ 1KOhm R0913 tx_r0402 @ 1% 10KOhm CFG7 R0929 tx_r0402 @ 1KOhm R0914 tx_r0402 @ 1% 10KOhm CFG8 R0915 tx_r0402 @ 1% 10KOhm CFG9 R0916 tx_r0402 @ 1% 10KOhm CFG10 R0917 tx_r0402 @ 1% 10KOhm CFG11 R0918 tx_r0402 @ 1% 10KOhm CFG12 R0919 tx_r0402 @ 1% 10KOhm CFG13 R0920 tx_r0402 @ 1% 10KOhm CFG14 R0921 tx_r0402 @ 1% 10KOhm CFG15 R0909 tx_r0402 A B 1KOhm A Title :CPU(7)_CFG/RSVD PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size C Date: Willy_Liao Project Name Rev HAWAII 0.0 Thursday, March 31, 2016 Sheet of 100 LPDDR3 Channel A NC_2 NC_3 NC_1 R1601 R1602 C4 K9 R3 GND GND C1816 1UF/6.3V tx_c0402 C1817 1UF/6.3V tx_c0402 C1601 0.047UF/16V tx_c0402 GND GND C1602 0.047UF/16V tx_c0402 GND C1603 0.047UF/16V tx_c0402 GND R1605 R1606 R1607 R1608 R1609 R1610 R1611 R1612 R1613 R1614 1 1 1 1 1 2 2 2 2 2 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm M_A_CAB0 M_A_CAB1 M_A_CAB2 M_A_CAB3 M_A_CAB4 M_A_CAB5 M_A_CAB6 M_A_CAB7 M_A_CAB8 M_A_CAB9 R1615 R1616 R1617 R1618 R1619 R1620 R1621 R1622 R1623 R1624 1 1 1 1 1 2 2 2 2 2 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm 68Ohm M_A_DIM0_ODT0 M_A_DIM0_CS#0 M_A_DIM0_CS#1 M_A_DIM0_CKE0 M_A_DIM0_CKE1 M_A_DIM0_CKE2 M_A_DIM0_CKE3 R1629 R1628 R1627 R1625 R1626 R1635 R1634 1 1 1 2 2 2 80.6Ohm 80.6Ohm 80.6Ohm 80.6Ohm 80.6Ohm 80.6Ohm 80.6Ohm M_A_DIM0_CLK0 M_A_DIM0_CLK#0 M_A_DIM0_CLK1 M_A_DIM0_CLK#1 R1630 R1631 R1632 R1633 1 1 2 2 37.4Ohm 37.4Ohm 37.4Ohm 37.4Ohm 2 C1806 10UF/6.3V tx_c0603_t02_h39 1 C1809 1UF/6.3V tx_c0402 C1808 1UF/6.3V tx_c0402 2 1 C1807 1UF/6.3V tx_c0402 Close To Memory Die C1810 1UF/6.3V tx_c0402 GND +1.2V C1661 10PF/50V tx_c0402 @ C1811 10UF/6.3V tx_c0603_t02_h39 C1853 10UF/6.3V tx_c0603_t02_h39 2 Close To Memory Die GND C +1.2V C1878 1UF/6.3V tx_c0402 C1877 1UF/6.3V tx_c0402 2 C1875 1UF/6.3V tx_c0402 C1822 1UF/6.3V tx_c0402 1 1 C1821 1UF/6.3V tx_c0402 C1820 1UF/6.3V tx_c0402 2 +1.2V F2 G2 H3 L2 M2 1 GND C1819 1UF/6.3V tx_c0402 C1876 1UF/6.3V tx_c0402 C1832 0.1UF/6.3V tx_c0201 C1831 0.1UF/6.3V tx_c0201 C1830 0.1UF/6.3V tx_c0201 1 C1886 1UF/6.3V tx_c0402 2 C1884 1UF/6.3V tx_c0402 1 C1885 1UF/6.3V tx_c0402 C1883 1UF/6.3V tx_c0402 +1.2V 1 GND A11 C12 E8 E12 G12 H8 H9 H11 J9 J10 K8 K11 L12 N8 N12 R12 U11 C1833 0.1UF/6.3V tx_c0201 GND C1841 1UF/6.3V tx_c0402 C1842 22UF/6.3V X5R/+/-20% tx_c0603_t02_h39 1 C1840 1UF/6.3V tx_c0402 C1839 1UF/6.3V tx_c0402 2 C1838 1UF/6.3V tx_c0402 1 C1837 1UF/6.3V tx_c0402 C1836 1UF/6.3V tx_c0402 C1835 1UF/6.3V tx_c0402 C1834 1UF/6.3V tx_c0402 1 +0.6VS +0.6VS H4 J11 GND M_A_DIM0_ODT0 ZQ0 ZQ1 NC_2 NC_3 NC_1 B3 B4 R1603 R1604 243OHM tx_r0402 1% 243OHM tx_r0402 1% C1652 22uF/6.3V tx_r0402_h28 @ C1653 22uF/6.3V tx_r0402_h28 @ C1654 22uF/6.3V tx_r0402_h28 @ 1 C1655 22uF/6.3V tx_r0402_h28 @ C1656 22uF/6.3V tx_r0402_h28 @ ODT J8 +V_VREF_CA_DIMM0 +V_VREF_DQ_DIMM0 Vref(CA) Vref(DQ) B C1843 22uF/6.3V tx_r0402_h28 @ C1657 22uF/6.3V tx_r0402_h28 @ GND R1.1 Follow CRB RVP5, Only one 22uF Mount Per Channel C4 K9 R3 GND H9CCNNNBLTMLAR-NTM 0315-011Q000 SKU1 0315-01GR0PB SKU2 0315-01960PB SKU3 0315-01GJ0PB SKU4 0315-01A20PB C1604 0.047UF/16V tx_c0402 M_A_CAA0 M_A_CAA1 M_A_CAA2 M_A_CAA3 M_A_CAA4 M_A_CAA5 M_A_CAA6 M_A_CAA7 M_A_CAA8 M_A_CAA9 GND C1660 10PF/50V tx_c0402 @ GND +1.2V +V_VREF_DQ_DIMM0 C1814 10UF/6.3V tx_c0603_t02_h39 +V_VREF_CA_DIMM0 C1805 10UF/6.3V tx_c0603_t02_h39 [4] 243OHM tx_r0402 1% 243OHM tx_r0402 1% VSSQ_1 VSSQ_14 VSSQ_2 VSSQ_15 VSSQ_3 VSSQ_4 VSSQ_16 VSSQ_5 VSSQ_10 VSSQ_12 VSSQ_13 VSSQ_11 VSSQ_6 VSSQ_17 VSSQ_7 VSSQ_18 VSSQ_8 VSSQ_9 VSSQ_19 C1804 10UF/6.3V tx_c0603_t02_h39 M_A_DIM0_ODT0 B3 B4 VDDQ_8 VDDQ_12 VDDQ_1 VDDQ_13 VDDQ_14 VDDQ_2 VDDQ_5 VDDQ_9 VDDQ_6 VDDQ_7 VDDQ_3 VDDQ_10 VDDQ_15 VDDQ_4 VDDQ_16 VDDQ_17 VDDQ_11 VSSCA_1 VSSCA_2 VSSCA_5 VSSCA_3 VSSCA_6 VSSCA_7 VSSCA_8 VSSCA_4 D +0.6VS J8 VDDCA_1 VDDCA_2 VDDCA_5 VDDCA_3 VDDCA_4 [18] +1.8V_DDR3 +V_VREF_CA_DIMM0 +V_VREF_DQ_DIMM0 VSS_1 VSS_10 VSS_11 VSS_6 VSS_12 VSS_13 VSS_2 VSS_19 VSS_3 VSS_18 VSS_14 VSS_7 VSS_15 VSS_8 VSS_16 VSS_4 VSS_5 VSS_9 VSS_17 2 H4 J11 B6 B12 C6 D12 E6 F6 F12 G6 G9 H10 K10 L9 M6 M12 N6 P12 R6 T6 T12 DQS3_t DQS3_c [4] C3 D3 F4 G3 G4 J4 M4 P3 DQS2_t DQS2_c M_A_D[63:56] +1.8V_DDR3 A8 A9 D4 D5 D6 G5 H5 H6 H12 J5 J6 K5 K6 K12 L5 P4 P5 P6 U8 U9 [18] +V_VREF_DQ_DIMM0 1MM_OPEN_M1M2 @ +1.2V DQS1_t DQS1_c [4] A11 C12 E8 E12 G12 H8 H9 H11 J9 J10 K8 K11 L12 N8 N12 R12 U11 VDD2_15 VDD2_17 VDD2_1 VDD2_3 VDD2_10 VDD2_4 VDD2_5 VDD2_11 VDD2_19 VDD2_6 VDD2_12 VDD2_7 VDD2_13 VDD2_20 VDD2_8 VDD2_2 VDD2_9 VDD2_14 VDD2_16 VDD2_18 M_A_D[55:48] +1.2V DQS0_t DQS0_c A3 A4 A5 A6 A10 U3 U4 U5 U6 U10 +V_VREF_CA_DIMM0 JP1602 F2 G2 H3 L2 M2 B2 B5 C5 E4 E5 F5 H2 J12 K2 L6 M5 N4 N5 R4 R5 T2 T3 T4 T5 VDD1_1 VDD1_3 VDD1_5 VDD1_7 VDD1_9 VDD1_2 VDD1_4 VDD1_6 VDD1_8 VDD1_10 +0.6VS [17,57,83] +V_VREF_CA_DIMM0 +V_VREF_DQ_DIMM0 B7 P10 P11 D10 D11 DNU_1 DNU_5 DNU_7 DNU_9 DNU_2 DNU_10 DNU_3 DNU_11 DNU_4 DNU_6 DNU_8 DNU_12 +1.8V_DDR3 [17] +1.2V [4,7,17,18,83] [4] Close To Memory Die [4] M_A_DQS7 [4] M_A_DQS#7 B7 +1.8V M_A_D[47:40] [4] M_A_DQS6 [4] M_A_DQS#6 1 C1813 10UF/6.3V tx_c0603_t02_h39 B6 G10 G11 DM0 DM1 DM2 DM3 B6 +1.8V_DDR3 +0.6VS +1.2V C1818 1UF/6.3V tx_c0402 C1851 10UF/6.3V tx_c0603_t02_h39 C1852 10UF/6.3V tx_c0603_t02_h39 A ZQ0 ZQ1 C1659 10PF/50V tx_c0402 @ GND +1.2V 2 C1815 1UF/6.3V tx_c0402 ODT B5 [4] M_A_DQS5 [4] M_A_DQS#5 H9CCNNNBLTMLAR-NTM 0315-011Q000 SKU1 0315-01GR0PB SKU2 0315-01960PB SKU3 0315-01GJ0PB SKU4 0315-01A20PB +1.2V A Vref(CA) Vref(DQ) +1.2V CS0_n CS1_n +1.8V [57,91] +1.8V_DDR3 C1824 1UF/6.3V tx_c0402 VSSQ_1 VSSQ_14 VSSQ_2 VSSQ_15 VSSQ_3 VSSQ_4 VSSQ_16 VSSQ_5 VSSQ_10 VSSQ_12 VSSQ_13 VSSQ_11 VSSQ_6 VSSQ_17 VSSQ_7 VSSQ_18 VSSQ_8 VSSQ_9 VSSQ_19 VDDQ_8 VDDQ_12 VDDQ_1 VDDQ_13 VDDQ_14 VDDQ_2 VDDQ_5 VDDQ_9 VDDQ_6 VDDQ_7 VDDQ_3 VDDQ_10 VDDQ_15 VDDQ_4 VDDQ_16 VDDQ_17 VDDQ_11 L10 L11 [4] M_A_DQS4 [4] M_A_DQS#4 B4 A8 A9 D4 D5 D6 G5 H5 H6 H12 J5 J6 K5 K6 K12 L5 P4 P5 P6 U8 U9 CKE0 CKE1 [4] +1.2V VSSCA_1 VSSCA_2 VSSCA_5 VSSCA_3 VSSCA_6 VSSCA_7 VSSCA_8 VSSCA_4 Close To Memory Die GND VDDCA_1 VDDCA_2 VDDCA_5 VDDCA_3 VDDCA_4 GND A1 A2 A12 A13 B1 B13 T1 T13 U1 U2 U12 U13 B5 CK_t CK_c M_A_D[39:32] M_A_D32 M_A_D37 M_A_D39 M_A_D38 M_A_D33 M_A_D36 M_A_D35 M_A_D34 M_A_D47 M_A_D43 M_A_D46 M_A_D44 M_A_D41 M_A_D40 M_A_D42 M_A_D45 M_A_D53 M_A_D50 M_A_D48 M_A_D54 M_A_D51 M_A_D52 M_A_D49 M_A_D55 M_A_D63 M_A_D59 M_A_D57 M_A_D60 M_A_D62 M_A_D58 M_A_D56 M_A_D61 B6 B12 C6 D12 E6 F6 F12 G6 G9 H10 K10 L9 M6 M12 N6 P12 R6 T6 T12 VSS_1 VSS_10 VSS_11 VSS_6 VSS_12 VSS_13 VSS_2 VSS_19 VSS_3 VSS_18 VSS_14 VSS_7 VSS_15 VSS_8 VSS_16 VSS_4 VSS_5 VSS_9 VSS_17 C1658 10PF/50V tx_c0402 @ B DQS3_t DQS3_c GND B4 P9 N9 N10 N11 M8 M9 M10 M11 F11 F10 F9 F8 E11 E10 E9 D9 T8 T9 T10 T11 R8 R9 R10 R11 C11 C10 C9 C8 B11 B10 B9 B8 C3 D3 F4 G3 G4 J4 M4 P3 DQS2_t DQS2_c L8 G8 P8 D8 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 B2 B5 C5 E4 E5 F5 H2 J12 K2 L6 M5 N4 N5 R4 R5 T2 T3 T4 T5 DQS1_t DQS1_c M_A_DIM0_CS#0 M_A_DIM0_CS#1 [4] L3 L4 CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 P10 P11 D10 D11 VDD2_15 VDD2_17 VDD2_1 VDD2_3 VDD2_10 VDD2_4 VDD2_5 VDD2_11 VDD2_19 VDD2_6 VDD2_12 VDD2_7 VDD2_13 VDD2_20 VDD2_8 VDD2_2 VDD2_9 VDD2_14 VDD2_16 VDD2_18 K3 K4 [4] M_A_DIM0_CKE2 [4] M_A_DIM0_CKE3 B2 [4] M_A_DQS2 [4] M_A_DQS#2 DQS0_t DQS0_c [4] M_A_D[23:16] R2 P2 N2 N3 M3 F3 E3 E2 D2 C2 J3 J2 [4] M_A_DIM0_CLK1 [4] M_A_DIM0_CLK#1 M_A_D[31:24] +1.8V_DDR3 [4] M_A_DQS3 [4] M_A_DQS#3 VDD1_1 VDD1_3 VDD1_5 VDD1_7 VDD1_9 VDD1_2 VDD1_4 VDD1_6 VDD1_8 VDD1_10 A3 A4 A5 A6 A10 U3 U4 U5 U6 U10 B3 G10 G11 DNU_1 DNU_5 DNU_7 DNU_9 DNU_2 DNU_10 DNU_3 DNU_11 DNU_4 DNU_6 DNU_8 DNU_12 B0 [4] M_A_DQS0 [4] M_A_DQS#0 C L10 L11 [4] M_A_DQS1 [4] M_A_DQS#1 B2 B1 A1 A2 A12 A13 B1 B13 T1 T13 U1 U2 U12 U13 DM0 DM1 DM2 DM3 M_A_CAB0 M_A_CAB1 M_A_CAB2 M_A_CAB3 M_A_CAB4 M_A_CAB5 M_A_CAB6 M_A_CAB7 M_A_CAB8 M_A_CAB9 [4] GND B3 CS0_n CS1_n U1602 [4] M_A_CAB[9:0] L8 G8 P8 D8 CKE0 CKE1 [4] M_A_D[7:0] [4] M_A_DIM0_CS#0 [4] M_A_DIM0_CS#1 B0 CK_t CK_c M_A_D[15:8] M_A_D8 M_A_D11 M_A_D13 M_A_D12 M_A_D14 M_A_D15 M_A_D9 M_A_D10 M_A_D4 M_A_D2 M_A_D5 M_A_D6 M_A_D7 M_A_D0 M_A_D3 M_A_D1 M_A_D28 M_A_D25 M_A_D27 M_A_D30 M_A_D24 M_A_D29 M_A_D26 M_A_D31 M_A_D22 M_A_D16 M_A_D17 M_A_D18 M_A_D21 M_A_D20 M_A_D23 M_A_D19 L3 L4 B1 P9 N9 N10 N11 M8 M9 M10 M11 F11 F10 F9 F8 E11 E10 E9 D9 T8 T9 T10 T11 R8 R9 R10 R11 C11 C10 C9 C8 B11 B10 B9 B8 K3 K4 [4] M_A_DIM0_CKE0 [4] M_A_DIM0_CKE1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 J3 J2 CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 R2 P2 N2 N3 M3 F3 E3 E2 D2 C2 M_A_CAA0 M_A_CAA1 M_A_CAA2 M_A_CAA3 M_A_CAA4 M_A_CAA5 M_A_CAA6 M_A_CAA7 M_A_CAA8 M_A_CAA9 [4] M_A_DIM0_CLK0 [4] M_A_DIM0_CLK#0 D +1.8V U1601 [4] M_A_CAA[9:0] C1825 1UF/6.3V tx_c0402 GND GND GND GND Title LPDDR3(1)_Channel : A Engineer: Size C Date: Willy_Liao Project Name Rev HAWAII 0.0 Thursday, March 31, 2016 Sheet 16 of 100 R8204 84.5KOHM 10T220000388 D For Bristol Output Voltage=1.05V For Stoney Output Voltage=0.95V 1.0VO_BST 2 1 +1.0VSUS 1 CE8200 @ 100uF/6.3V 1BT080000058 JP8204 3MM_OPEN_5MIL 2 C8224 22UF/6.3V vx_c0603_h39_small X5R/+/-10% C8223 22UF/6.3V vx_c0603_h39_small X5R/+/-10% C8222 22UF/6.3V vx_c0603_h39_small X5R/+/-10% C8220 22UF/6.3V vx_c0603_h39_small X5R/+/-10% 1 C8221 22UF/6.3V vx_c0603_h39_small X5R/+/-10% C （1.799A） +0.85VSUS C8225 22UF/6.3V vx_c0603_h39_small X5R/+/-10% JP8200 SHORT_PIN R1.1 C8217 1UF/6.3V vx_c0402_small X5R/+/-10% C8218 5% 100PF/50V vx_c0402_small 1AT200000002 1 2 C8215 22UF/6.3V vx_c0603_h39_small X5R/+/-10% R8219 0Ohm 10T340000001 11.0VO_BST_R 063T/DCR=9mOHM C8219 10% 0.1UF/25V vx_c0603_small 1AT300000007 1.0VO_VCC R1.1 1.0VO_EN B R8207 5.11KOhm 10T220000082 R1.1 C8216 10% 0.01UF/16V vx_c0402_small @ +0.95VS/1.05VS TDC OCP Frequency PWR Cap EE Cap Total Cap 2 1.0VO_FB C8205 0.1UF/16V vx_c0402_small 10% 0.95VO_FB_R R8201 47KOhm vx_r0402_small 1% ） C8204 10% 0.01UF/16V vx_c0402_small R1.1 （4.326A） R1.1 VSUS_ON （ L8201 30,83,93 JP8201 3MM_OPEN_5MIL 2 1UH R8211 2.2Ohm vx_r0402_small 5% B 1 10 T8200 TPC28T +1.0VO 6.125A Irat=7A +1.0VO + 1.0VO_SS +5VO +1.0VSUS 1.0VO_LX 06T880000034 T8202 TPC28T 12 13 14 15 16 17 23 22 21 20 19 18 R8202 0Ohm vx_r0402_0ohm_small C PGND1 PGND2 PGND3 PGND4 LX2 LX3 T8204 TPC28T TON FB AGND PFM# EN PGOOD LX1 1.0VO_EN 92 1.0VSUS_PW RGD IN1 U8200 AOZ2260QI-18 SS IN2 VCC BST PGND5 LX4 T8207 T8208 TPC28T TPC28T R8205 @ 100KOhm vx_r0402_small 1% 1.0VO_FB +1.0VS POWER SUPPLY C8200 @ 10UF/25V X5R/+/-10% vx_c0805_h57_small +5VO C8203 10UF/25V X5R/+/-10% vx_c0805_h57_small D 2 R1.1 +AC_BAT_SYS C8201 @ 1500PF/50V vx_c0402_small X7R/+/-10% 1 （0.74A） R8203 1% 20.5KOhm tx_r0402 :5.1A :7A :545KHz :232uF :60uF :292uF VRef=0.8V +/-1% For Bristol R8207=6.2KOHM(10V220000088), Output Voltage=1.05V For Stoney R8207=3.74KOHM(10V220000233), Output Voltage=0.95V A A Title : +0.95VS/+1.0VS PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size Custom Date: Simon_Liao Project Name Rev P2JCC Thursday, March 31, 2016 Sheet 1.0 82 of 96 DDR & VTT POWER SUPPLY D +0.6VO T8301 TPC28T C8303 @ 0.1UF/16V tx_c0402 X7R/+/-10% （6A） C8308 @ 0.1UF/16V tx_c0402 X7R/+/-10% SR8303 Setting OCP GND6 GND5 GND4 GND3 1 U8300B RT8231BGQW Mike_0602 1% +0.6VS R8301 10KOhm VDDQ=VREF*(1+(R1/R2)) SKU Low-side MOSFET (pcs) Output 22uF/6.3V MLCC (pcs) UMA Load current (A) 0~5 DSC 0~8 :4.14A :500KHz :22uF*4 :22uF*4 B R1 DDR_FB T8315 T8311 TPC28T TPC28T R8300 8.06KOHM 1% tx_r0402 T8302 TPC28T 1% C8306 @ 0.01UF/16V tx_c0402 X7R/+/-10% 0.75 Low 0.675 Reference Voltage (V) High VID +1.2V C8323 @ 0.1UF/16V X7R/+/-10% tx_c0402 T8308 T8310 TPC28T TPC28T S5 1 +1.2V （ 172A ） C8322 22UF/6.3V tx_c0603_t02_h39 X5R/+/-20% +1.2VO TDC Frequency PWR Cap Total Cap DDR_FB_R [91,93] SUSC#_PWR JP8304 @ 2mm_open_5mil_m1m2 2 JP8305 SHORT_PIN B T8314 TPC28T C8321 22UF/6.3V tx_c0603_t02_h39 X5R/+/-20% C8319 22UF/6.3V tx_c0603_t02_h39 X5R/+/-20% 2 25 24 23 22 R8318 10KOhm 1% 1 C8318 22UF/6.3V tx_c0603_t02_h39 X5R/+/-20% JP8302 SHORT_PIN R8303 300KOHM （ 172A ） +1.2VO DDR_VDDQ C8309 1UF/6.3V tx_c0402 X5R/+/-10% 1 2 1DDR_RC C8307 @ 1500PF/50V tx_c0402 X7R/+/-10% 2 R8321 @ 0Ohm tx_r0402_0ohm S3 [91,93] SUSB#_PWR OCP=?A C JP8300 @ 2mm_open_5mil_m1m2 2 1UH Q8302 SM2206NSQGC-TRG G R8305 N/A 0Ohm tx_r0402_0ohm T8313 T8309 TPC28T TPC28T 17mOhm R8302 @ Irat=7A 2.2Ohm tx_r0603_h24 5% RDSon=24.6mOhm [4] DDR_PG_CTRL T8307 061H/DCR=Max TPC28T L8300 U8300A RT8231BGQW F=500KHz NB_R0402_20MIL_SMALL R8320 N/A 0Ohm tx_r0402_0ohm Q8300 RF4E080BNTB S DDR_VID DDR_VDD DDR_CS S C8314 @ 1uF/25V tx_c0402 X5R/+/-10% (Typ:1.229V ; Max:1.252V ; Min:1.205V) 2 C8313 @ 10UF/25V tx_c0603_t02_h39 X5R/+/-10% G SR8302 C8310 0.1UF/25V X7R/+/-10% tx_c0603 DDR_BST_R VLDOIN DDR_BST DDR_HG DDR_LX C8312 10UF/25V tx_c0603_t02_h39 X5R/+/-10% VDDQ VTTREF GND1 VTTSNS VTTGND 21 20 19 18 17 16 +AC_BAT_SYS C8316 @ 1500PF/50V tx_c0402 X7R/+/-10% D D SR8300 +5VO +1.2V DDR_LG [92] DDR_PWRGD FB S3 S5 TON PGOOD （0.54A） VID VDD CS PGND LGATE 10 DDR_FB S3 S5 GND2 VTT VLDOIN BOOT UGATE PHASE 11 12 13 14 15 +AC_BAT_SYS 1 C8300 N/A 10UF/6.3V tx_c0603_t02_h39 X5R/+/-20% 1AT300000018 C R8306 499K OHM tx_r0402 1% SR8304 DDR_VTTSNS DDR_VDDQ +AC_BAT_SYS 2 +V_SM_VREF_R C8304 0.033UF/16V tx_c0402 C8302 N/A 10UF/6.3V tx_c0603_t02_h39 X5R/+/-20% C8301 10UF/6.3V tx_c0603_t02_h39 X5R/+/-20% 2 1 JP8301 1MM_OPEN_M1M2 2 1 +0.6VS （0.6A） JP8303 SHORT_PIN D C8305 @ 0.01UF/16V tx_c0402 X7R/+/-10% R2 1% 94.04.10 need to change A A Title : POWER_DDR & VTT PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size Custom Date: Simon_Liao Project Name Rev 1.0 P2JCC Thursday, March 31, 2016 Sheet 83 of 96 1.8VSUS POWER SUPPLY D D (Typ:1.816V ; Max:1.866V ; Min:1.767V) +3VSUS +1.8VO C8410 10UF/6.3V tx_c0603_t02_h39 X5R/+/-20% U8402 G9661-25ADJF11U 06T280000040 1 NPO/+/-5% C +1.8VO: Current :0.67A PWR Cap :10uF +1.8VO T8402 T8405 TPC26T TPC26T 1 Iout =0.232A R8409 10KOhm 1% tx_r0402 GND Mike_0424 T8408 T8400 TPC26T TPC26T C8401 @ 0.1UF/16V tx_c0402 1.8VSUS_FB 1.8VSUS_PWRGD [92] 1.8VSUS_PWRGD C8400 10UF/6.3V tx_c0603_t02_h39 X5R/+/-20% 2 NC VO ADJ GND1 SHORT_PIN C8413 @ 56PF/50V tx_c0402 VPP VIN VEN POK 2 C8403 1UF/6.3V tx_c0402 X5R/+/-10% C8405 @ 0.1UF/16V X7R/+/-10% tx_c0402 EN_1V8 1% R8410 12.7KOHM 1% tx_r0402 2 R8403 10KOhm [30,81,82,93] VSUS_ON GND2 D8402 @ 1SS355AGP C +1.8VSUS JP8400 1.8VSUS_FB_R 1 2 SR8405 NB_R0402_20MIL_SMALL 1% R8400 10Ohm JP8401 1MM_OPEN_M1M2 2 Iout =0.672A Iout =0.67A GND Mike_0427 +5VSUS B B A A Title : PAGE 84 POWER PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size B Date: Thursday, March 31, 2016 Simon_Liao Project Name Rev P2JCC Sheet 1.0 84 of 96 BQ24715_NVDC BATTERY CHARGER D D Q8801 D R8814 AC_BAT_SYS_Q8801 JP8800 SHORT_PIN JP8802 SHORT_PIN C8827 0.1UF/25V X7R/+/-10% 1AT300000007 1 CHG_RC C8805 @ 0.1UF/25V 1AT300000007 1 X7R/+/-10% SR8807 R0603 0.1UF/25V MLCC 0.1UF/25V(0603) X7R 10% C8819 @ 10UF/25V X5R/+/-10% RDSON: VGS:-4.5V,Id:-7A Typ:24.5m ohm Max:30m ohm H:1.95mm C8816 C8821 0.1UF/25V tx_c0603 C8818 10UF/25V X5R/+/-10% 07T040000027 JP8803 SHORT_PIN JP8804 SHORT_PIN 5% +BAT C8817 10UF/25V X5R/+/-10% D G S 2 BAT_GATE SR8808 R0603 C8804 0.1UF/25V tx_c0603 X7R/+/-10% B CHG_SRN 30 BQ24715RGRT S T8829 T8830 TPC28T TPC28T 1 1 06T370000012 X7R/+/-10% T8831 T8832 T8833 TPC28T TPC28T TPC28T 1 2 G C8829 0.022UF/16V tx_c0402 T8826 T8827 T8828 TPC28T TPC28T TPC28T D 1 Q8820 5% 22 23 24 25 GND3 GND4 GND5 GND6 +BAT_CON T8834 T8835 TPC28T TPC28T SR8809 R0603 U8800B +BAT 1 1 T8841 T8842 T8843 TPC28T TPC28T TPC28T T8839 T8840 TPC28T TPC28T 1 1 RDSON: VGS:5.0V,Id:0.05A Typ:3.2 ohm Max:7.5 ohm T8836 T8837 T8838 TPC28T TPC28T TPC28T T8844 T8845 TPC28T TPC28T NX7002AK 5% 1 RDSON: Id:6.8A Typ:20m ohm Max:25m ohm H:0.9mm CHG_SRP BAT_LEARN S Q8804 SIA432DJ-T4-GE3 1% P2003EVG R8810 2.2Ohm 10T220000069 B D G +AC_BAT_SYS 2 SR8810 NB_R0402_20MIL_SMALL R8815 4.02KOHM 1% R8820 100KOhm tx_r0402 REF D8800 BAT54CW 07T030000001 10mOhm tx_r1206_h31 1% 2 U8800A BQ24715RGRT CHG_LG BAT_GATE C8823 0.047UF/16V T8824 TPC28T 1 CELL: Float: 2cell High: 3cell GND: disable LEARN (pulse) 06T370000012 11 12 13 14 15 0912 SR8801 C8812 R0603 1UF/25V X5R/+/-10% tx_c0603_t015_h37 +BAT_CON Q8806 R8805 2.2UH 09T030000059 2 SR8806 NB_R0402_20MIL_SMALL AC_IN_OC R8822 1MOhm C8807 1500PF/50V @ L8800 CHG_BST_R SMB0_CLK 30,60 07T030000001 CHG_VCC R8803 22Ohm 5% tx_r0805_h24 D8801 BAT54CW 21 20 19 18 17 16 GND2 VCC PHASE HIDRV BTST REGN +BAT ACDET IOUT SDA SCL CELL Rdc: Typ:31m ohm Max:35m ohm Idc:6A/Isat:13A 10 1 SMB0_DAT Q8803 SIA432DJ-T4-GE3 C8808 10UF/25V X5R/+/-10% T8825 TPC28T 30,60 S C8820 0.47UF/25V X5R/+/-10% tx_c0603_t015_h37 CHG_VCC 2 BATDRV# SRN SRP GND1 LODRV ACOK ACDRV CMSRC ACP ACN C8801 100PF/50V NPO/+/-5% AD_IINP 1 30 1% C D G 2 3 C8826 10UF/25V X5R/+/-10% T8819 TPC28T SR8805 NB_R0402_20MIL_SMALL ACDRV ACDRV AC_IN_OC R8802 12.4KOhm tx_r0402 C8824 @ 100PF/50V 1% R8816 121KOhm tx_r0402 RDSON: Id:6.8A Typ:20m ohm Max:25m ohm H:0.9mm 1% AC_IN_OC C8825 1500PF/50V MLCC 1500PF/50V (0402) X7R 10% EMI Request,Close Q8806 ACG_R 30 CHG_ACP 2 C JP8801 3MM_OPEN_5MIL +BAT C8802 0.1UF/25V tx_c0603 X7R/+/-10% CHG_ACN R8811 10KOhm tx_r0402 1AT300000056 C8834 2200PF/50V MLCC 2200PF/50V(0402)X7R 10% 1AT200000026 0.1UF/25V X7R/+/-10% 1 10T220000069 C8815 0.1UF/25V tx_c0603 1% R8809 4.02KOHM REF 1% C8833 68PF/50V NPO/+/-5% 1AT200000062 C8830 10T220000069 R8808 432KOhm tx_r0402 C8832 10UF/25V X5R/+/-10% 2 1AT300000056 R8801 4.02KOHM 1% R8821 2MOhm C8831 10UF/25V X5R/+/-10% MLCC 0.1UF/25V(0603) X7R 10% 07T040000099 C8822 2.2UF/25V X7R/+/-10% tx_c1206_h49 07T040000099 C8810 2200PF/50V MLCC 2200PF/50V(0402)X7R 10% 10mOhm 1% tx_r1206_h31 P1203BV C8811 0.1UF/25V 1 P1203BV R8807 2.2ohm 5% tx_r1206 RES FILM 2.2 ohm 1/2W 1206 5% G S G AC_BAT_SYS_Q8800 2 S 1 D 2 1 +AC_USBPD_W CT_IN 1 89 +AC_USBPD_W CT_IN T8805 T8806 T8807 TPC28T TPC28T TPC28T Q8800 T8803 T8804 TPC28T TPC28T @ Adapter :2.37A/19V/(45W) Battery:2S1P / 7.2V RDSON: Id:8.8A Typ:14.2m ohm Max:17.5m ohm H:2mm RDSON: Id:8.8A Typ:14.2m ohm Max:17.5m ohm H:2mm +AC_BAT_SYS A A Title : POWER_CHARGER PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Simon_Liao Size Project Name Rev P2JCC Custom Date: Thursday, March 31, 2016 Sheet 1.0 88 of 94 Size:3*3;Spec.:8.6A 2nd Input(USB PD 20V) Typ: (5.646V) Max: (6.014V) Min: (5.287V) R8930 300KOHM tx_r0402 1% R8927 100KOhm tx_r0402 1% R8983 100KOhm tx_r0402 1% D8902 RB520S-30_G_TE61 C8951 0.1UF/25V R8931 118KOhm tx_r0402 1% D tx_si7900edn Typ: (10V) Max: (10.605V) Min: (9.405V) tx_c0402 X5R/+/-10% Q8910 D 07T030000026 Q8918 G D +A/D_DOCK_IN S G Reset Out 2 C8904 0.1UF/25V tx_c0402 X5R/+/-10% R8907 249KOhm tx_r0402 1% NX7002AK C8947 0.01UF/25V tx_c0402 X7R/+/-10% S C8945 2.2UF/25V tx_c1206_h49 X7R/+/-10% tx_si7900edn C8930 0.1UF/25V tx_c0402 Typ: (9.071V) Max: (9.629V) Min: (8.523V) R8978 2.2ohm tx_r1206 5% 2 1 R8908 300KOHM tx_r0402 1% Q8900 D G C8953 @ C8952 @ 10UF/25V 10UF/25V tx_c0603_t02_h39 tx_c0603_t02_h39 X5R/+/-10% X5R/+/-10% nb_tpc28t_68 1 +USB_PD_IN [30] USBPD_DET# TPC28T T8905 EE pull High 10K ohm +USB PD_IN DETECT 45W(5V-20V) Q8916 SI7121DN-T1-GE3 S D G (3A) +USB_PD_IN Q8914 SI7121DN-T1-GE3 D S G USB PD input D Input switch Circuit AC & USB_PD & Wireless Charger Detect NX7002AK S Mike_0428 NX7002AK +AC_IN DETECT(45W,19V) +A/D_DOCK_IN Q8903 SI7121DN-T1-GE3 C8903 0.1UF/25V tx_c0402 X5R/+/-10% R8905 249KOhm tx_r0402 1% R8920 2.2ohm tx_r1206 5% NX7002AK 2 S G tx_si7900edn C8946 0.01UF/25V tx_c0402 X7R/+/-10% R8918 10KOhm tx_r0402 1% R8986 100KOhm tx_r0402 1% R8985 100KOhm tx_r0402 1% Typ=5.029V C8921 0.1UF/25V tx_c0402 X5R/+/-10% (2.37A) 2 Q8909 SI7121DN-T1-GE3 Mike_0427 S +A/D_DOCK_IN Typ: (8.617V) Max: (9.147V) Min: (8.097V) 1 D Max:5.359V;Min:4.708V R8921 @ 0Ohm 0.05 tx_r0402_0ohm S D C +AC_USBPD_WCT_IN G To Charger input tx_si7900edn Typ: (9.5V) Max: (10.075V) Min: (8.935V) Q8902 D G Main Input(AC Adapter 19V) R8906 300KOHM tx_r0402 1% C nb_tpc28t_68 1 [30] AC_DET# TPC28T T8904 EE pull High 10Kohm Q8917 D CD NC U8901 G696L438T1UF tx_sot23_s5_2d4_h57 C8926 @ 0.01UF/25V tx_c0402 X7R/+/-10% S R8923 430KOhm NX7002AK tx_r0402 RESET#/RESET VCC GND G 1 C8925 0.1UF/25V tx_c0402 X5R/+/-10% R8919 3.6KOHM tx_r0402 1% C8920 2.2UF/25V tx_c0805_t02_h57 X7R/+/-10% 2 1 R8922 0Ohm 0.05 tx_r0402_0ohm Reset Out Three input Wireless charger Input(20W, 20V/1A) B A B USBPD_DET# AC_DET# WCT_DET# WCT_EN BQ24715 Charger EN DAT&CLK DPM Power Limit 0 L H AC_Adapter 45W*90% 0 L H AC_Adapter L H 1 L H 0 L H AC_Adapter 45W*90% 1 L H AC_Adapter 45W*90% 1 H H WCT 1 X X X 45W*90% USB_PD 45W*90%?? USB_PD 45W*90%?? A 20W*90% X Title : AC&PD&Wireless S.W PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size C Date: Simon_Liao Project Name Rev 1.0 P2JCC Sheet Thursday, March 31, 2016 89 of 96 D D C C BATTERY IN DETECT [60] TS1# BAT1_IN_OC# [30] R9000 1KOhm 1% tx_r0402 C9000 @ 0.1UF/16V X7R/+/-10% tx_c0402 B B Title : POWER_DETECT A PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size A Project Name Rev P2JCC Date: Thursday, March 31, 2016 Simon_Liao Sheet 1.0 90 of 96 A SUSC#_PWR POWER SUSB#_PWR POWER Q9101 IRFML8244TRPBF （0.3A） C9106 0.1UF/16V tx_c0402 X7R/+/-10% 1 +5VS R9106 4.7KOhm tx_r0402 1% C9121 0.1UF/16V tx_c0402 X7R/+/-10% (4.3751A) +3VO Q9107 IRFML8244TRPBF +3VS 1 C9122 0.1UF/16V X7R/+/-10% tx_c0402 11 G R9107 22KOhm 1% tx_r0402 +3VS_SW_R (4.751A) T9108 TPC26T VGS=10V,RDSon=24mOHM 3 10mil Mike_0616 C X7R/+/-10% S C9107 X7R/+/-10% tx_r0402 10T220000074 0.033UF/16V tx_c0402 C9108 0.1UF/16V tx_c0402 D （0A） +3V 1 G 11 R9103 4.7KOhm +5VS_SW_R C9120 0.033UF/16V tx_c0402 X7R/+/-10% VGS=10V,RDSon=24mOHM 1 VGS=10V,RDSon=24mOHM T9103 TPC26T (4A) T9107 TPC26T G Mike_0616 D S 3 D Mike_0424 R9105 22KOhm 1% R9116 22KOhm tx_r0402 1% @ Q9106 IRFML8244TRPBF Q9104 IRFML8244TRPBF C9119 0.1UF/16V X7R/+/-10% tx_c0402 (1.197A) +5VO 10T220000040 X7R/+/-10% +3VO （0.469A） 1 C9118 0.068UF/16V @ X7R/+/-10% 11 11 C9105 0.033UF/16V tx_c0402 C9117 @ 1UF/6.3V X5R/+/-10% tx_c0402 +1.8V G R9102 22KOhm 1 T9102 TPC26T VGS=10V,RDSon=24mOHM D S 3 SIRA10DP-T1-GE3 +VCCIO 2 Q9103 IRFML8244TRPBF C9104 @ 1UF/6.3V X5R/+/-10% tx_c0402 S G +1.8VO （0.4A） 1% D (3.56A) T9106 TPC26T Q9102 +1.0VO R9101 X7R/+/-10% 47KOhm tx_r0402 X7R/+/-10% Rdson = 2.8m OHM (2.1A) C9102 @ 0.033UF/16V tx_c0402 D 2 1 （0.12A） +1.0V C9103 0.1UF/16V tx_c0402 S 11 G C9101 @ 1UF/6.3V X5R/+/-10% tx_c0402 VGS=10V,RDSon=24mOHM D S 3 T9101 TPC26T D （0.07A） +1.0VO C9123 0.1UF/16V tx_c0402 C X7R/+/-10% T9104 TPC26T Q9108 IRFML8244TRPBF R9108 22KOhm 1% tx_r0402 2 +1.8VS_SW_R C9126 0.1UF/16V tx_c0402 [83,93] SUSC#_PWR [83,93] SUSB#_PWR C 47K E 10mil B +12VS R9111 560KOhm tx_r0402 5% B 10K B C C9143 @ 0.033UF/16V tx_c0402 X7R/+/-10% 47K R9110 0Ohm tx_r0402_0ohm SR9100 nb_r0402_short_5mil_small T9110 TPC26T 47K SUSB_EC# E [30,57,68,92] SR9101 nb_r0402_short_5mil_small 1 T9100 TPC26T SUSB#_PWR SUSC_EC# SUSB#_PWR POWER Control (0.01A) 10mil Q9109 [30,57,68] B +12VSUS X7R/+/-10% C9125 0.1UF/16VX7R/+/-10% tx_c0402 (0.01A) SUSC#_PWR POWER Control +1.8VS VGS=10V,RDSon=24mOHM G C9124 @ 1UF/6.3V X5R/+/-10% tx_c0402 11 Q9105 T9109 TPC26T 3 S (0.01A) R9112 560KOhm tx_r0402 5% D 10K (0.05A) +1.8VO +12V B C 47K E 47K SUSC#_PWR (0.04A) 10mil C B 47K +12VSUS E (0.01A) A A Title : POWER_LOAD SWITCH PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size C Date: Simon_Liao Project Name Rev P2JCC Thursday, March 31, 2016 Sheet 1.0 91 of 96 POWER GOOD DETECTER +3VS R9205 100KOhm 1% D D T9202 TPC28T SR9200 1 [83] DDR_PWRGD +3VSUS U9200 B VCC T9200 TPC28T GND Y ALL_SYSTEM_PWRGD [25,30] A TC7SH08FU 06T030000005 @ R9207 N/A 0Ohm T9204 TPC28T 1 [84] 1.8VSUS_PWRGD C R9214 N/A 0Ohm C +3VSUS 1 [82] 1.0VSUS_PWRGD 2 R9212 N/A 0Ohm [50] CPU_THERM# 1% D9201 1 R9206 100KOhm R9213 N/A 0Ohm T9206 TPC28T [30,81] SUS_PWRGD T9210 TPC28T CH751H-40AGP R9200 @ 0Ohm [30,57,68,91] SUSB_EC# CH751H-40AGP VCC GND Y TC7SH08FU 06T030000005 @ A A ALL_SYSTEM_PWRGD Q9200B UM6K1N +3VSUS Q9200A UM6K1N B D9202 R9209 75KOhm 1% @ 1% 2 R9211 0Ohm 10T240000001 U9201 R9204 1.91KOHM R9201 560KOhm 5% 1 D9200 @ 1SS355AGP [25,80] VRM_PWRGD FORCE_OFF# [32] +3VS T9208 TPC26T B T9201 TPC26T SUSB_EC# B C9200 2.2UF/6.3V X5R/+/-10% FORCE_OFF_PWR [81] A Title : POWER_PROTECT PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size Custom Date: Simon_Liao Project Name Rev 1.0 P2JCC Thursday, March 31, 2016 Sheet 92 of 96 +AC_USBPD_WCT_IN +AC_BAT_SYS D 80,81,83,87,88 +BAT_CON 88 +BAT +BAT 88 +5VA +5VA 81 +3VA +3VA 81,88 +5VO +5VO 81,83,91 +3VO +3VO 81,82,84,86,91 +1.8VO C 88 +1.8VO D +1.2VO 83,91 +1.0VO +1.0VO 82 +0.6VO +0.6VO 83 +12VSUS +12VSUS 81,91 +5VSUS +5VSUS 81 +3VSUS +3VSUS 81,92 +3V +3VA 84 +1.2VO +3V FOR POWER TEST T9300 TPC28T JP9300 SGL_JUMP 2 CPU_VRON_PWR +BAT_CON 80 T9301 TPC28T JP9301 SGL_JUMP 2 +AC_BAT_SYS SUSB#_PWR 82,83,84,91 SUSC#_PWR 83,91 T9302 TPC28T JP9302 SGL_JUMP 2 +AC_USBPD_WCT_IN C T9303 TPC28T JP9303 SGL_JUMP 2 VSUS_ON 81 91 B B +1.2V +1.2V 83 +12VS +12VS 91 +5VS +5VS 80,87,91 +3VS +3VS 80,91,92 +0.6VS +0.6VS 83 A A Title : POWER_SIGNAL PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: +VCORE +VCORE Size Project Name Custom 80 Date: Thursday, March 31, 2016 Simon_Liao Rev 1.0 P2JCC 93 Sheet of 96 Design rating charge pump(triple volatger) +5VO VSUS_ON UMC4N (SWITCH) +12V (10mA) SUSC#_PWR +12VS (10mA) SUSB#_PWR UMC4N (SWITCH) +12VSUS OCP setting Current Limit:200mA TDC 5.95A +3VO +3VSUS (0.999A) IRFML8244TRPBF +3V (0.469A) IRFML8244TRPBF +3VS (4.3751A) +3VA (0.1072A) +5VSUS (4.788A) +5VS (1.197A) +5VA (0A) +1.0VSUS (2.401A) +VCCIO (2.1A) D D SUSC#_PWR SUSB#_PWR OCP>10.63A +AC_BAT_SYS TPS51225CRUKR +A/D_DOCK_IN +3VA BQ24717 TDC 5.98A VSUS_ON +5VO BAT FORCE_OFF_PWR +5VAO SUSB#_PWR IRFML8244TRPBF OCP>11.34A SUS_PWRGD TDC 6.37A C +1.0VO SIRA10DP-T1-GE3 SUSB#_PWR NB671GQ-Z 1.0VSUS_PWRGD VSUS_ON SUSC#_PWR C Current Limit:8.5A IRFML8244TRPBF +0.85VSUS (1.799A) +1.0V (0.07A) +1.2V (4.14A) OCP>8.58A +0.6VS (0.54A) Current Limit:2.6A +1.8VSUS (0.232A) Current Limit:3.1A TDC 4.14A +1.2VO +5VO RT8231AGQW SUSC#_PWR +0.6VO DDR_PG_CTRL DDR_PWRGD TDC 0.672A +3VO +1.8VO RT9042-25GSP VSUS_ON B B TDC 21A +5VS +5VS CPU_VRON,CPU_VRON_PWR VR_SVID_CLK, VR_SVID_ALERT#, VR_SVID_DATA ISL95859HRTZ VCORE_VCCSENSE, VCORE_VSSSENSE PWM_A, FCCM_A, PWM1_B, FCCM_B, PWM_C,, FCCM_C, ISUMP_A, ISUMN_A, ISUMP_B, ISUMN_B, ISUMP_C, ISUMN_C PWM_A, FCCM_A SIC631CD-T1-GE3 (21A) OCP>29A +VCCGT (18A) OCP>31A +VCCSA (4A) OCP>4.5A TDC 18A +5VS PWM1_B, FCCM_B +VCORE SIC631CD-T1-GE3 VCCGT_VCCSENSE, VCCGT_VSSSENSE TDC 4A +5VS VCCSA_VCCSENSE, VCCSA_VSSSENSE VRM_PWRGD, VR_HOT# PWM_C, FCCM_C ISL95808HRZ A A Title :POWER_FLOWCHART PEGATRON PROPRIETARY AND CONFIDENTIAL Engineer: Size D Date: Rev 1.0 P2JCC Thursday, March 31, 2016 Simon_Liao Project Name Sheet 94 of 96 +3VDB_PD +3VA_PD R9534 0Ohm tx_r0402_0ohm VBUS_USB_TYPE_C +3VA VBUS_USB_TYPE_C +3VA +3VSUS R9530 0Ohm tx_r0402_0ohm @ [96,97] +3VA [24,30,36,53,56,57,70,81,93] +3VA_PD +3VA_PD [96] +3VSUS +3VSUS [4,24,25,26,28,30,51,53,62,68,81,84,92] +3VDB_PD +3VDB_PD [97] R9526 0Ohm tx_r0402_0ohm @ +5VSUS V5_VCONN R9529 0Ohm tx_r0402_0ohm D TBD D +3VA_PD R9523 100KOHM tx_r0402 ANX7428 DDI2_AUXN_C 0.1UF/16V 0.1UF/16V tx_c0402 tx_c0402 [3] DDI2_HPD PD_HPD (P.P) 37 11 12 USB3_TXN3 USB3_TXP3 USB3_RXN3 USB3_RXP3 33 [30] PD_RST# R9525 tx_r0201_h10 (From EC:) 100KOhm 23 R9533 tx_r0402_0ohm 0Ohm R9532 0Ohm tx_r0402_0ohm [30] SMB1_DAT_CFG [30] SMB1_CLK_CFG [96] PD_VBUS_CTRL 1 13 24 Reverse voltage protection is required It might be necessary to add a diode to protect the power supply 40 DVDD_IO SSTXP1 SSTXN1 SSRXN2 SSRXP2 SSTXP2 SSTXN2 AUXP AUXN SSRXN1 SSRXP1 HPD SBU1 SBU2 SSTX_N SSTX_P SSRX_N SSRX_P CC1 VCONN1_EN/GPIO_0 25 26 UTC_A2_SSTXp1 [96] UTC_A3_SSTXn1 [96] 35 36 UTC_A10_SSRXn2 UTC_A11_SSRXp2 30 29 Requirement of Q3: 1) Id >= 500mA (Vgs = - 4.5V) 2) Ron < 120 mOhm (Vgs = - 4.5V) 3) Max Vds >= -10V [96] [96] Connect to UTC_B2_SSTXp2 [96] UTC_B3_SSTXn2 [96] 32 31 UTC_B10_SSRXn1 UTC_B11_SSRXp1 19 18 UTC_A8_SBU1_AUX UTC_B8_SBU2_AUX 21 CHIP_CC1 45 VCONN1_EN C [96] [96] 0Ohm R9502 USB Type-C connector [96] [96] tx_r0402_0ohm V5_VCONN CC_CAP 22 CC_CAP NC C9506 1000PF/16V tx_c0201 @ R9503 100KOHM tx_r0402 CC2 CHIP_CC2 44 VCONN2_EN R9505 Logic 1: Normal Charger Mode, charge voltage = 5V and charge current = 1.5A VCONN2_EN/GPIO_1 PD_CAB_DET C9507 2200PF/16V tx_c0402 @ [30] 2 43 42 M_SDA/GPIO_5 pin: Connect to AP/CPU/Charge IC as a charge mode indicator CFG_SDA CFG_SCL 38 39 R9527 tx_r0402_0ohm 0Ohm @ SMB_DAT_PD R9528 @ SMB_CLK_PD 0Ohm tx_r0402_0ohm SMB0_DAT SMB0_CLK 1 [30,60,88] [30,60,88] IN TPS2041BDBVR 06T290000047 0629-007K000 VIN: 2.7V-5.5V Iq:Max 190uA Ishut-down: Max 1uA Active Low:= +/-25V 3) Id >= 5A 4) Ron < 100 mOhm (Vgs = - 4.5V, Id = -5A) D1 G1 N S2 G2 S1 U9600 AO4805 07T040000175 0704-03F8000 P D2 VBUS_USB_TYPE_C IN OUT GND EN/EN# OC# (O.D) G524C1T11U 06T290000080 0629-00NG000 VIN: 2.7V-5.5V Iq:Max 190uA Ishut-down: Max 1uA Active Low:= 30V 2) Max Vgs >= 30V 3) Vgs(th) = 30V 2) Max Vgs >= 5V 3) Max Vgs(th) =30V is necessary Q9601A UM6K1N B B U9605 RNX9600B UTC_A11_SSRXp2_CONN [23] USB_PP3_PD UTC_A2_SSTXp1_CONN R9608 4.7KOhm tx_r0402 0OHM RNX9602A UTC_B11_SSRXp1_CONN UTC_A3_SSTXn1_CONN @ [95] UTC_B10_SSRXn1 [95] UTC_B3_SSTXn2 UTC_B3_SSTXn2_C C9605 0.1UF/16V tx_c0201 VBUS_DISCHARGE_CTRL = logic 1, enable discharge VBUS_DISCHARGE_CTRL = logic 0, disable discharge 0OHM UTC_B10_SSRXn1_CONN 0OHM RNX9603A UTC_B3_SSTXn2_CONN @ C9606 0.1UF/16V tx_c0201 UTC_B2_SSTXp2_C 0OHM 0OHM RNX9605B USB_PP9_PD_CONN 0OHM @ 09T090000001 90Ohm/100MHz L9605 CH1 n.c.4 CH2 n.c.3 GND1GND2 CH3 n.c.2 CH4 n.c.1 10 UTC_A2_SSTXp1_CONN UTC_A3_SSTXn1_CONN UTC_B3_SSTXn2_CONN UTC_B2_SSTXp2_CONN PUSB3F96 07T220000032 For working voltage 5v use 0718-0181000 CL = 0.6 pF U9606 UTC_B11_SSRXp1_CONN UTC_B10_SSRXn1_CONN UTC_A10_SSRXn2_CONN UTC_A11_SSRXp2_CONN RNX9605A D9600 USB_PN9_PD_CONN CH1 n.c.4 CH2 n.c.3 GND1GND2 CH3 n.c.2 CH4 n.c.1 10 UTC_B11_SSRXp1_CONN UTC_B10_SSRXn1_CONN UTC_A10_SSRXn2_CONN UTC_A11_SSRXp2_CONN PUSB3F96 07T220000032 For working voltage 5v use 0718-0181000 CL = 0.6 pF VBUS_USB_TYPE_C_CONN AZ4024-01F 07T180000052 0718-0118000 U9602 UTC_B8_SBU2_AUX UTC_A8_SBU1_AUX RNX9603B USB_PN3_PD_CONN L9603 90OHM 09T090000023 tx_2r4p_choke1243_4p_co_h55 A [95] UTC_B2_SSTXp2 RNX9604A [23] USB_PN9_PD L9602 90OHM 09T090000023 tx_2r4p_choke1243_4p_co_h55 RNX9602B R9607 0Ohm tx_r0402_0ohm RNX9601B Q9603 CPH3457-TL-W 07T040000177 0704-03FC000 0OHM S [95] UTC_B11_SSRXp1 [23] USB_PP9_PD L9601 90OHM 09T090000023 tx_2r4p_choke1243_4p_co_h55 4 G UTC_A3_SSTXn1_C 1 [95] UTC_A3_SSTXn1 C9604 0.1UF/16V tx_c0201 2 RNX9601A 0OHM 4 0OHM 0OHM 0Ohm tx_r0402_0ohm @ Q9600A UM6K1N [95] VBUS_DISCHARGE_CTRL UTC_A2_SSTXp1_CONN UTC_A3_SSTXn1_CONN UTC_B3_SSTXn2_CONN UTC_B2_SSTXp2_CONN UTC_A2_SSTXp1_C [23] USB_PN3_PD USB_PP3_PD_CONN @ 09T090000001 90Ohm/100MHz L9604 C9603 0.1UF/16V tx_c0201 Requirement of NMOSFET Q9603: 1) Max Vds >= 30V 2) Max Vgs >= 5V 3) Max Pd >=1W 4) Max Id >= 1A 5) Id >= 0.5A when Vgs = 1.6V 6) Max Vgs(th) 12V 2) Pd >= 0.025W if VBUS max