acer aspire 5742 compal la 6582p pew7181 uma schematic diagram

A B C D E 1 Compal Confidential 2 PEW71_81_91 UMA M/B Schematics Document Intel Arrandale Processor with DDRIII + Ibex Peak-M 2010-06-18 REV:0.2 3 www.masteram.su 4 2009/5/12 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010/04/15 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATIC,MB A6582 Rev A 401939 Date: A B C D Sheet Friday, July 02, 2010 E of 48 A B C D E Compal Confidential Model Name PEW71_81 UMA File Name : LA-6582P 1 ZZZ1 M/B PCB Memory BUS(DDRIII) 204pin DDRIII-SO-DIMM X2 Dual Channel Intel Arrandale (UMA) Fan Control DA60000IQ00 page 26 Processor rPGA988A 6.4G/8.5G/10.6G 100M/133M/166M(CFD) USB conn x3 page 4,5,6,7,8,9 (UMA) FDI x8 100MHz 100MHz 1GB/s x4 USB port (Left Low) USB Port (Left High) USB port (sub board) DMI x4 LVDS Conn LVDS(UMA) page 22 CRT(UMA) CRT Conn page 23 Level Shift HDMI Conn page 24 page 24 HDMI(UMA) PCI-Express x (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S) 100MHz port 2,4 MINI Card x1 WLAN port GIGA LAN BCM57780 page 26 Intel Ibex Peak-M USBx14 3.3V 48MHz HD Audio 3.3V 24MHz CMOS Camera USB port 11 USB port page 29 Mini card USB port page 22 page 26 page 29 HDA Codec ALC272X SPI page 33 port SPI ROM page 27 Card Reader USB port 12 SATA x (GEN1 1.5GT/S ,GEN2 3GT/S) 100MHz PCH page 13,14,15,16,17 18,19,20,21 SATA HDD Conn page 13 RJ45 Conn Bluetooth Conn page 29 2.7GT/s page 10,11 BANK 0, 1, 2, 1.5V DDRIII 800/1066/1333 port SATA ODD Conn page 25 Audio AMP TPA6017 page 25 page 34 page 28 LPC BUS 3 Int Speaker 33MHz page 34 RTC CKT ENE KB926 LS-6581P USB/B page 30 Power ON/Off CKT LS-6582P PWR/B DC/DC Interface CKT LS-6583P ODD/B Touch Pad Int.KBD page 31 Clock Generator page 31 BIOS ROM Power Circuit DC/DC CKT IDT: 9LRS3199AKLFT SILEGO: SLG8SP587 133/120/100/96/14.318MHZ to PCH 48MHZ to CardReader page 31 page 12 4 2009/5/12 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2010/04/15 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATIC,MB A6582 Document Number Rev A 401939 Sheet Friday, July 02, 2010 E of 48 A B C SIGNAL STATE Voltage Rails D Description S1 S3 S5 VIN Adapter power supply (19V) N/A N/A N/A B+ AC or battery power rail for power circuit N/A N/A N/A +CPU_CORE Core voltage for CPU ON ON OFF +0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF +1.05VS 1.05V switched power rail for PCH ON OFF OFF +1.05VS_VTT 1.05V switched power rail (1.05 for AUB CPU) ON OFF OFF +1.5V 1.5V power rail for DDRIII ON ON OFF +1.5VS 1.5V switched power rail ON OFF OFF +1.8VS 1.8V switched power rail ON OFF OFF +3VALW 3.3V always on power rail ON ON ON* +3V_LAN 3.3V power rail for LAN ON ON ON* +3VS 3.3V switched power rail ON OFF OFF +5VALW 5V always on power rail ON ON ON* +5VS 5V switched power rail ON OFF OFF +VSB VSB always on power rail ON ON ON* +RTCVCC RTC power ON ON ON +VALW +V +VS Clock HIGH HIGH HIGH HIGH ON ON ON ON S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF Full ON Power Plane SLP_S1# SLP_S3# SLP_S4# SLP_S5# E Project ID / Board ID Table for EC-AD channel Vcc Ra/Rc 3.3V +/- 5% 100K +/- 5% Rb / Rd 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% NC V AD_BID V 0.216 V 0.436 V 0.712 V 1.036 V 1.453 V 1.935 V 2.500 V VAD_BID typ V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V V AD_BID max V 0.289 V 0.538 V 0.875 V 1.264 V 1.759 V 2.341 V 3.300 V Board ID 0.1 0.2 0.3 1.0 Project ID Original NEW70/80/90/50/71/91 PEW71/81/91 Audio Mono/Crystal PEW71/81/91 Audio Mono/SUSCLK NEW71/91 Optumis 2 Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF External PCI Devices Device IDSEL# REQ#/GNT# EC SM Bus1 address Device Address Smart Battery 0001 011X b EC SM Bus2 address Device Device Address Clock Generator (9LRS3199AKLFT, SLG8SP587) 1101 0010b DDR DIMM0 1001 000Xb DDR DIMM2 1001 010Xb BOM Structure HDMI@ Interrupts Address Ibex SM Bus address BTO Option Table BTO Item HDMI USB Port Table USB 2.0 USB 1.1 Port UHCI0 External USB Port Ext1 Left Low USB Ext2 Left High USB Ext3 Right USB External USB Port Ext1 Left Low USB Ext2 Left High USB Ext3 Right USB Camera Card Reader Camera Card Reader Blue Tooth 1st Min-Card Blue Tooth 1st Min-Card UHCI1 EHCI1 UHCI2 UHCI3 UHCI4 EHCI2 UHCI5 UHCI6 10 11 12 13 Compal Electronics, Inc Compal Secret Data Security Classification 2009/08/01 Issued Date Deciphered Date 2010/08/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATIC,MB A6582 Document Number Rev A 401939 Friday, July 02, 2010 Sheet E of 48 JCPU1E JCPU1A DMI_PTX_HRX_P0 DMI_PTX_HRX_P1 DMI_PTX_HRX_P2 DMI_PTX_HRX_P3 B24 D23 B23 A22 DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3] DMI_HTX_PRX_N0 DMI_HTX_PRX_N1 DMI_HTX_PRX_N2 DMI_HTX_PRX_N3 D24 G24 F23 H23 DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] DMI_HTX_PRX_P0 DMI_HTX_PRX_P1 DMI_HTX_PRX_P2 DMI_HTX_PRX_P3 D25 F24 E23 G23 DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3] E22 D21 D19 D18 G21 E19 F21 G18 FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7] H_FDI_TXP0 H_FDI_TXP1 H_FDI_TXP2 H_FDI_TXP3 H_FDI_TXP4 H_FDI_TXP5 H_FDI_TXP6 H_FDI_TXP7 D22 C21 D20 C18 G22 E20 F20 G19 FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7] H_FDI_FSYNC0 H_FDI_FSYNC1 F17 E17 FDI_FSYNC[0] FDI_FSYNC[1] H_FDI_INT C17 FDI_INT H_FDI_LSYNC0 H_FDI_LSYNC1 F18 D17 FDI_LSYNC[0] FDI_LSYNC[1] C Intel(R) FDI H_FDI_TXN0 H_FDI_TXN1 H_FDI_TXN2 H_FDI_TXN3 H_FDI_TXN4 H_FDI_TXN5 H_FDI_TXN6 H_FDI_TXN7 B PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS B26 A26 B27 A25 PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15] K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31 PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15] J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30 PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26 PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15] L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25 PEG_IRCOMP R1 49.9_0402_1% EXP_RBIAS R3 750_0402_1% AP25 AL25 AL24 AL22 AJ33 AG9 M27 L28 J17 H17 G25 G17 E31 E30 R5 3.01K_0402_1% @ CFG0 R6 3.01K_0402_1% R7 3.01K_0402_1% @ @ 2 CFG3 CFG4 R8 3.01K_0402_1% @ CFG7 WW41 Recommend not pull down PCIE2.0 Jitter is over on ES1 R11 0_0402_5% @ @ H_RSVD17_R H_RSVD18_R R12 0_0402_5% DMI_PTX_HRX_N[0 3] DMI_PTX_HRX_P[0 3] CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86 B19 A19 RSVD15 RSVD16 A20 B20 RSVD17 RSVD18 U9 T9 RSVD19 RSVD20 AC9 AB9 RSVD21 RSVD22 C1 A3 DMI_HTX_PRX_N[0 3] DMI_HTX_PRX_P[0 3] H_FDI_TXN[0 7] H_FDI_TXP[0 7] AM30 AM28 AP31 AL32 AL30 AM31 AN29 AM32 AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30 H16 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 SA_DIMM_VREF (CFD Only) SB_DIMM_VREF (CFD Only) RSVD11 RSVD12 RSVD13 RSVD14 RESERVED DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3] PCI EXPRESS GRAPHICS A24 C23 B22 A21 DMI D DMI_PTX_HRX_N0 DMI_PTX_HRX_N1 DMI_PTX_HRX_N2 DMI_PTX_HRX_N3 RSVD32 RSVD33 AJ13 AJ12 RSVD34 RSVD35 AH25 AK26 RSVD36 RSVD_NCTF_37 AL26 AR2 RSVD38 RSVD39 AJ26 AJ27 RSVD_NCTF_40 RSVD_NCTF_41 AP1 AT2 RSVD_NCTF_42 RSVD_NCTF_43 AT3 AR1 RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57 RSVD58 AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 RSVD_TP_59 RSVD_TP_60 KEY RSVD62 RSVD63 RSVD64 RSVD65 E15 F15 A2 D15 C15 AJ15 AH15 RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75 AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3 RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85 V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9 RSVD_NCTF_23 RSVD_NCTF_24 J29 J28 RSVD26 RSVD27 A34 A33 RSVD_NCTF_28 RSVD_NCTF_29 C35 B35 RSVD_NCTF_30 RSVD_NCTF_31 IC,AUB_CFD_rPGA,R1P0 CONN@ VSS D C R9 0_0402_5% @ RSVD64_R @ RSVD65_R R10 0_0402_5% 1 B AP34 IC,AUB_CFD_rPGA,R1P0 CONN@ A eDP Signals Mapping eDP Singal PEG Singals PEG_HTX_C_GRX_P15 eDP_TX0 eDP_TX#0 PEG_HTX_C_GRX_N15 eDP_TX1 PEG_HTX_C_GRX_P14 eDP_TX#1 PEG_HTX_C_GRX_N14 eDP_TX2 PEG_HTX_C_GRX_P13 eDP_TX#2 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_P12 eDP_TX3 eDP_TX#3 PEG_HTX_C_GRX_N12 eDP_AUX PEG_GTX_C_HRX_P13 eDP_AUX# PEG_GTX_C_HRX_N13 eDP_HPD# PEG_GTX_C_HRX_P12 Lane Reversal PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3 PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2 PEG_GTX_C_HRX_P3 CFG0 - PCI-Express Configuration Select CFG4 - Display Port Presence *1:Single PEG 0:Bifurcation enabled *1:Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port CFG3 - PCI-Express Static Lane Reversal *:Default *1 :Normal Operation :Lane Numbers Reversed 15 -> 0, 14 -> 1, A Compal Electronics, Inc Compal Secret Data Security Classification 2009/08/01 Issued Date Deciphered Date 2010/08/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC,MB A6582 Document Number Rev A 401939 Friday, July 02, 2010 Sheet of 48 JCPU1B COMP3 R19 20_0402_1% H_COMP2 AT24 COMP2 R20 49.9_0402_1% H_COMP1 G16 COMP1 R21 49.9_0402_1% H_COMP0 AT26 COMP0 SKTOCC#_R @ T24 PAD D AH24 H_CATERR# H_PECI_R AT15 H_PROCHOT# H_PROCHOT# R36 0_0402_5% H_THERMTRIP# AN26 H_THERMTRIP#_R AK15 CATERR# THERMAL R26 0_0402_5% H_PECI AK14 SKTOCC# PECI PROCHOT# THERMTRIP# BCLK BCLK# AR30 AT30 PEG_CLK PEG_CLK# E16 D16 CLK_CPU_DMI CLK_CPU_DMI# DPLL_REF_SSCLK DPLL_REF_SSCLK# A18 A17 CLK_CPU_DP CLK_CPU_DP# SM_DRAMRST# AN14 VCCPWRGOOD_1 H_PM_SYNC_R R44 0_0402_5% H_CPUPWRGD_1 R50 0_0402_5% PM_DRAM_PWRGD PM_SYNC R47 0_0402_5% H_CPUPWRGD AL15 R42 0_0402_5% H_CPUPWRGD_0 AK13 SM_DRAMPWROK H_VTTPWRGD_R 0_0402_5% AM15 VTTPWRGOOD AM26 TAPPWRGOOD AL14 RSTIN# del net for XDP remove R56 1.5K_0402_1% PLT_RST#_R del net for XDP remove F6 SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 AL1 AM1 AN1 SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 PM_EXT_TS#[0] PM_EXT_TS#[1] AN15 AP15 PM_EXTTS#0 PM_EXTTS#1_R R28 100K_0402_5% R32 R34 R35 1 del R27 / R29 / R30 / R31 / R33 for XDP remove +1.05VS_VTT 10K_0402_5% 10K_0402_5% 0_0402_5% PM_EXTTS#0_1 XDP_TRST# R37 XDP_TDO AT28 AP27 @ @ PAD T25 PAD T26 PAD T27 20100610 Add TCK TMS TRST# AN28 AP28 AT27 H_TCK H_TMS XDP_TRST# TDI TDO TDI_M TDO_M AT29 AR27 AR29 AP29 H_TDI XDP_TDO XDP_TDI_M XDP_TDO_M @ DBR# AN25 XDP_DBR#_R R46 BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7] AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23 100_0402_1% 24.9_0402_1% 130_0402_1% 1 D 2009/08/14 #425302 CP_S3PowerReduction WhitePaper_Rev0.9 SM_DRAMRST# SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2] R38 R39 R40 R70 51_0402_5% 51_0402_5% +1.05VS_VTT XDP_TDO_M R45 0_0402_5% XDP_TDI_M 0_0402_5% XDP_DBRESET# XDP_DBRESET# del R41 / R43 / R48 / R49 XDP remove XDP_DBRESET# R67 1K_0402_5% +3VS C del net for XDP remove PLT_RST# VCCPWRGOOD_0 PM_DRAM_PWRGD_R H_VTTPWRGD @ R52 AN27 JTAG & BPM C RESET_OBS# PWR MANAGEMENT H_PM_SYNC AP26 CLK_CPU_BCLK CLK_CPU_BCLK# BCLK_ITP BCLK_ITP# PRDY# PREQ# H_CPURST# A16 B16 AT23 H_COMP3 CLOCKS 20_0402_1% DDR3 MISC MISC R18 2009/2/4 #414044 DG Update Rev1.11 IC,AUB_CFD_rPGA,R1P0 CONN@ R57 750_0402_1% +1.05VS_VTT R58 R59 R60 49.9_0402_1% 68_0402_5% @ 68_0402_5% 2 H_CATERR# H_PROCHOT# H_CPURST# B B +3VALW P U1 H_VTTPWRGD B A MC74VHC1G08DFT2G_SC70-5 R61 2K_0402_1% H_VTTPWRGD_R 1 G Y R62 H_VTTPWRGD 2009/8/14 change back to 2K 1K_0402_1% U1 / U2 change to SA00000OH00 #425302 CP_S3PowerReduction WhitePaper_Rev0.7 +3VALW R69 P R68 @ 1.1K_0402_1% H_VTTPWRGD MC74VHC1G08DFT2G_SC70-5 1.5K_0402_1% A A Y 1 U2 B G Need to check Voltage Level +1.5V_1 A 1 PM_DRAM_PWRGD_R R72 2009/04/23 Intel CRB 1.55 Update Change R68 to 1.1K_1%, R71 to 3.01K_1% Compal Electronics, Inc Compal Secret Data Security Classification 750_0402_1% R71 @ 3.01K_0402_1% 2009/08/01 Issued Date Deciphered Date 2010/08/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC,MB A6582 Document Number Rev A 401939 Friday, July 02, 2010 Sheet of 48 B DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 DDR_A_CAS# DDR_A_RAS# DDR_A_WE# A10 C10 C7 A7 B10 D10 E10 A8 D8 F10 E6 F7 E9 B7 E7 C6 H10 G8 K7 J8 G7 G10 J7 J10 L7 M6 M8 L9 L6 K8 N8 P9 AH5 AF5 AK6 AK7 AF6 AG5 AJ7 AJ6 AJ10 AJ9 AL10 AK12 AK8 AL7 AK11 AL8 AN8 AM10 AR11 AL11 AM9 AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 AC3 AB2 U7 DDR_A_CAS# DDR_A_RAS# DDR_A_WE# AE1 AB3 AE9 SA_CK[0] SA_CK#[0] SA_CKE[0] SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63] SA_BS[0] SA_BS[1] SA_BS[2] SA_CAS# SA_RAS# SA_WE# AA6 AA7 P7 Y6 Y5 P6 DDR_A_CLK1 DDR_A_CLK1# DDR_A_CKE1 SA_CS#[0] SA_CS#[1] AE2 AE8 DDR_A_CS0# DDR_A_CS1# SA_ODT[0] SA_ODT[1] AD8 AF9 DDR_A_ODT0 DDR_A_ODT1 B9 D7 H7 M7 AG6 AM7 AN10 AN13 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 DDR_A_CLK0 DDR_A_CLK0# DDR_A_CKE0 SA_CK[1] SA_CK#[1] SA_CKE[1] SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7] DDR SYSTEM MEMORY A C DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7 SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7] C9 F8 J9 N9 AH7 AK9 AP11 AT13 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7] C8 F9 H9 M9 AH8 AK10 AN11 AR13 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 DDR_B_CAS# DDR_B_RAS# DDR_B_WE# JCPU1D DDR_B_D[0 63] DDR_B_DM[0 7] DDR_B_DQS#[0 7] DDR_B_DQS[0 7] DDR_B_MA[0 15] JCPU1C DDR_A_D[0 63] DDR_A_DM[0 7] DDR_A_DQS#[0 7] DDR_A_DQS[0 7] DDR_A_MA[0 15] D B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2 J6 J3 G1 G5 J2 J1 J5 K2 L3 M1 K5 K4 M4 N5 AF3 AG1 AJ3 AK1 AG4 AG3 AJ4 AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9 AR10 AT10 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 AB1 W5 R7 SB_BS[0] SB_BS[1] SB_BS[2] DDR_B_CAS# DDR_B_RAS# DDR_B_WE# AC5 Y7 AC6 SB_CAS# SB_RAS# SB_WE# DDR SYSTEM MEMORY - B SB_CK[0] SB_CK#[0] SB_CKE[0] W8 W9 M3 DDR_B_CLK0 DDR_B_CLK0# DDR_B_CKE0 SB_CK[1] SB_CK#[1] SB_CKE[1] V7 V6 M2 DDR_B_CLK1 DDR_B_CLK1# DDR_B_CKE1 SB_CS#[0] SB_CS#[1] AB8 AD6 DDR_B_CS0# DDR_B_CS1# SB_ODT[0] SB_ODT[1] AC7 AD1 DDR_B_ODT0 DDR_B_ODT1 SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7] D4 E1 H3 K1 AH1 AL2 AR4 AT8 DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7 SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7] D5 F4 J4 L4 AH2 AL4 AR5 AR8 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7] C5 E3 H4 M5 AG2 AL5 AP5 AR7 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 D C B IC,AUB_CFD_rPGA,R1P0 CONN@ IC,AUB_CFD_rPGA,R1P0 CONN@ A A Compal Electronics, Inc Compal Secret Data Security Classification 2009/08/01 Issued Date Deciphered Date 2010/08/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC,MB A6582 Document Number Rev A 401939 Friday, July 02, 2010 Sheet of 48 JCPU1F WW15 MOW +CPU_CORE Peak 21A A POWER B CPU VIDS C +1.05VS_VTT 10U_0805_6.3V6M 10U_0805_6.3V6M +CPU_CORE 1 C66 C67 C68 C69 10U_0805_6.3V6M 1 C70 C71 10U_0805_6.3V6M 10U_0805_6.3V6M C72 10U_0805_6.3V6M 10U_0805_6.3V6M C73 10U_0805_6.3V6M C74 10U_0805_6.3V6M C75 C76 10U_0805_6.3V6M 10U_0805_6.3V6M C77 C78 10U_0805_6.3V6M 10U_0805_6.3V6M C79 C80 10U_0805_6.3V6M 10U_0805_6.3V6M (Place these capacitors between inductor and socket on Bottom) +CPU_CORE 10U_0805_6.3V6M + C83 330U_2.5V_M_R15 1 C84 10U_0805_6.3V6M C85 C86 10U_0805_6.3V6M C87 C88 C89 + C82 2 2 2 330U_2.5V_M_R15 Change to OS-CON 20100414 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M (Place these capacitors under CPU socket, top layer) CSC (Current Sense Configuration) 8/25 +1.05VS_VTT C91 C92 2 22U_0805_6.3V6M PSI# AN33 H_PSI# VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] PROC_DPRSLPVR AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34 CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 H_DPRSLPVR VTT_SELECT G15 H_VTTVID1 @ PAD T14 H_VTTVID1 = high, 1.05V VCC_SENSE VSS_SENSE VTT_SENSE VSS_SENSE_VTT AN35 1 @ 1K_0402_1% 1K_0402_1% R75 R76 1 @ 1K_0402_1% 1K_0402_1% CPU_VID2 R77 R78 1 @ 1K_0402_1% 1K_0402_1% CPU_VID3 R79 R80 @ 1K_0402_1% 1K_0402_1% CPU_VID4 R81 R82 @ 1K_0402_1% 1K_0402_1% CPU_VID5 R83 R84 1 @ 1K_0402_1% 1K_0402_1% CPU_VID6 R85 R86 @ 1K_0402_1% 1K_0402_1% H_DPRSLPVR R87 R88 1 @ 1K_0402_1% 1K_0402_1% H_PSI# @ 1K_0402_1% 1K_0402_1% R89 R90 C +CPU_CORE 22U_0805_6.3V6M C98 C96 1 C97 2 22U_0805_6.3V6M 22U_0805_6.3V6M (Place these capacitors on CPU cavity, Bottom Layer) +CPU_CORE 22U_0805_6.3V6M C99 C100 22U_0805_6.3V6M C101 C102 22U_0805_6.3V6M C103 C104 22U_0805_6.3V6M 22U_0805_6.3V6M (Place these capacitors on CPU cavity, Bottom Layer) B +CPU_CORE x 470uF(4.5mohm@100kHz; 4.0mohm@SRF) R94 100_0402_1% +CPU_CORE VCCSENSE VSSSENSE 100_0402_1% C105 + C272 + C273 + C275 + Del C106 330U_D2E_2.5VM_R6M 2 330U_D2E_2.5VM_R6M 2 330U_D2E_2.5VM_R6M 330U_D2E_2.5VM_R6M 0_0402_5% TOP side (under inductor) +CPU-CORE Decoupling SPCAP,Polymer 2009/08/01 Issued Date C,uF ESR, mohm 4X470uF 4m ohm/4 16X22uF 3m ohm/12 16X10uF 3m ohm/16 Stuffing Option 2X470uF A Compal Electronics, Inc Compal Secret Data Security Classification IC,AUB_CFD_rPGA,R1P0 CONN@ C95 2 Auburndale +1.1VS_VTT=1.05V Clarksfield +1.1VS_VTT=1.1V VTT_SENSE 1 22U_0805_6.3V6M R91 VCCSENSE VSSSENSE R95 C94 22U_0805_6.3V6M IMVP_IMON VSS_SENSE_VTT 22U_0805_6.3V6M VTT Rail AJ34 AJ35 B15 A15 R73 R74 CPU_VID1 20090915 Modify H_VTTVID1 = low, 1.1V ISENSE CPU_VID0 22U_0805_6.3V6M MLCC 0805 X5R 2010/08/01 Deciphered Date Title SCHEMATIC,MB A6582 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401939 Date: D C81 +1.05VS_VTT VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44 AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15 10U_0805_6.3V6M VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8 VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32 AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 +1.05VS_VTT SENSE LINES D VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 CPU CORE SUPPLY AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 Continuous 18A 1.1V RAIL POWER 48A Sheet Friday, July 02, 2010 of 48 +VGFX_CORE JCPU1G C112 C113 + 330U_D2E_2.5VM_R6M 2 2 22U_0805_6.3V6M 10U_0805_6.3V6M J24 J23 H25 VTT1_45 VTT1_46 VTT1_47 15A GRAPHICS C VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 3A 2 C123 FDI C122 22U_0805_6.3V6M AR22 AT22 GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6] AM22 AP22 AN22 AP23 AM23 AP24 AN24 GFX_VR_EN GFX_DPRSLPVR GFX_IMON AR25 AT25 AM24 VCC_AXG_SENSE VSS_AXG_SENSE D GFXVR_VID_0 GFXVR_VID_1 GFXVR_VID_2 GFXVR_VID_3 GFXVR_VID_4 GFXVR_VID_5 GFXVR_VID_6 GFXVR_EN GFXVR_DPRSLPVR_R R97 GFXVR_EN PD 470ohm AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1 VTT0_59 VTT0_60 VTT0_61 VTT0_62 P10 N10 L10 K10 1U_0402_6.3V6K C114 C115 C116 1U_0402_6.3V6K C117 C118 C119 C120 2 2 2 C121 330U_D2E_2.5VM_R6M 22U_0805_6.3V6M 1.1V VTT1_48 VTT1_49 VTT1_50 VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55 VTT1_56 VTT1_57 VTT1_58 J3 2 1 +1.5VS @ JUMP_43X118 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K C 22U_0805_6.3V6M Reserved for +1.5VS to +1.5V_1 11/03 add four 0.1u 0402 Intel suggest +1.05VS_VTT VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68 J22 J20 J18 H21 H20 H19 VCCPLL1 VCCPLL2 VCCPLL3 L26 L27 M26 +1.5V C670 C671 C672 C673 C124 10U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C127 22U_0805_6.3V6M B +1.8VS 0.6A 1.8V K26 J27 J26 J25 H27 G28 G27 G26 F26 E26 E25 PEG & DMI 22U_0805_6.3V6M B +1.5V_1 22U_0805_6.3V6M C126 @ JUMP_43X118 + 2 +1.5V 22U_0805_6.3V6M +1.05VS_VTT +1.5V_1 Reserved for +1.5V to +1.5V_1 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 +1.05VS_VTT C125 470_0402_5% 20091105 GFXVR_EN GFXVR_DPRSLPVR GFXVR_IMON 0_0402_5% 1 R167 J1 +1.05VS_VTT VAXG_SENSE VSSAXG_SENSE - 1.5V RAILS C111 DDR3 D GRAPHICS VIDs C107 C110 POWER AT21 AT19 AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16 AL21 AL19 AL18 AL16 AK21 AK19 AK18 AK16 AJ21 AJ19 AJ18 AJ16 AH21 AH19 AH18 AH16 SENSE LINES 10U_0805_6.3V6M 22U_0805_6.3V6M +1.8VS_VCCSFR C128 1U_0402_6.3V6K IC,AUB_CFD_rPGA,R1P0 CONN@ R99 0_0805_5% 2.2U_0603_6.3V6K C129 C130 2 1U_0402_6.3V6K C131 1 2 22U_0805_6.3V6M C132 4.7U_0805_10V4Z A A Compal Electronics, Inc Compal Secret Data Security Classification 2009/08/01 Issued Date Deciphered Date 2010/08/01 Title SCHEMATIC,MB A6582 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401939 Date: Friday, July 02, 2010 Sheet of 48 D C B VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 JCPU1I VSS VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30 K27 K9 K6 K3 J32 J30 J21 J19 H35 H32 H28 H26 H24 H22 H18 H15 H13 H11 H8 H5 H2 G34 G31 G20 G9 G6 G3 F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11 E8 E5 E2 D33 D30 D26 D9 D6 D3 C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11 B8 B6 B4 A29 A27 A23 A9 IC,AUB_CFD_rPGA,R1P0 CONN@ VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 D C VSS NCTF JCPU1H AT20 AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12 AR9 AR6 AR3 AP20 AP17 AP13 AP10 AP7 AP4 AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11 AM8 AM5 AM2 AL34 AL31 AL23 AL20 AL17 AL12 AL9 AL6 AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11 AJ8 AJ5 AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13 AH9 AH6 AH3 AG10 AF8 AF4 AF2 AE35 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 AT35 AT1 AR34 B34 B2 B1 A35 H_NCTF1 H_NCTF2 @ @ PAD T2 PAD T3 H_NCTF6 H_NCTF7 @ @ PAD T4 PAD T5 B IC,AUB_CFD_rPGA,R1P0 CONN@ A A Compal Electronics, Inc Compal Secret Data Security Classification 2009/08/01 Issued Date Deciphered Date 2010/08/01 Title SCHEMATIC,MB A6582 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401939 Date: Friday, July 02, 2010 Sheet of 48 +1.5V DIMMA VREFDQ M1 Circuit JDIMM1 DDR_A_DQS#[0 7] +1.5V +DIMM_VREFDQA DDR_A_D[0 63] DDR_A_D0 DDR_A_D1 DDR_A_DM[0 7] +DIMM_VREFDQA R101 DDR_A_DQS[0 7] DDR_A_DM0 DDR_A_MA[0 15] DDR_A_D2 DDR_A_D3 1K_0402_1% M1 Circuit DDR_A_D8 DDR_A_D9 +DIMM_VREFDQA R104 D DDR_A_DQS#1 DDR_A_DQS1 1K_0402_1% C134 0.1U_0402_16V4Z 1 2 C133 DDR_A_D10 DDR_A_D11 2.2U_0603_6.3V6K DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2 DIMMA & DIMMB VREFCA circuit +1.5V DDR_A_D18 DDR_A_D19 DDR_A_D24 DDR_A_D25 +DIMM_VREFCA R106 DDR_A_DM3 +1.5V #425302 CP_S3PowerReduction WhitePaper_Rev1.0 R102 0_0402_5% @ 1K_0402_1% DDR_A_CKE0 DDR_A_CKE0 D S DIMM_DRAMRST# Q2 BSS138LT1G_SOT23-3 SM_DRAMRST# G C RST_GATE DIMM_DRAMRST# DDR_A_BS2 DDR_A_BS2 DDR_A_MA12 DDR_A_MA9 C617 RST_GATE DDR_A_MA8 DDR_A_MA5 0.047U_0402_16V7K DDR_A_MA3 DDR_A_MA1 DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK0 DDR_A_CLK0# DDR_A_MA10 DDR_A_BS0 DDR_A_BS0 DDR_A_WE# DDR_A_CAS# DDR_A_WE# DDR_A_CAS# DDR_A_MA13 DDR_A_CS1# DDR_A_CS1# DDR_A_D32 DDR_A_D33 Layout Note: Place near JDIMM1 DDR_A_DQS#4 DDR_A_DQS4 DDR_A_D34 DDR_A_D35 Layout Note: Place these Caps near Command and Control signals of DIMMA DDR_A_D40 DDR_A_D41 B +1.5V DDR_A_DM5 10U_0805_6.3V6M 10U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_A_D42 DDR_A_D43 10U_0805_6.3V6M C138 C139 10U_0805_6.3V6M C140 C141 10U_0805_6.3V6M C142 10U_0805_6.3V6M 1 2 C143 0.1U_0402_16V4Z C144 C145 + C146 @ C147 330U_2.5V_M_R15 DDR_A_D48 DDR_A_D49 C137 DDR_A_DQS#6 DDR_A_DQS6 DDR_A_D50 DDR_A_D51 0.1U_0402_16V4Z DDR_A_D56 DDR_A_D57 DDR_A_DM7 DDR_A_D58 DDR_A_D59 Layout Note: Place near JDIMM1.203 & JDIMM1.204 R109 10K_0402_5% C148 2.2U_0603_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1 2 C149 +3VS +0.75VS 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 DDR_A_D4 DDR_A_D5 DDR_A_DQS#0 DDR_A_DQS0 DDR_A_D6 DDR_A_D7 DDR_A_D12 DDR_A_D13 D DDR_A_DM1 DIMM_DRAMRST# DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D21 DDR_A_DM2 DDR_A_D22 DDR_A_D23 DDR_A_D28 DDR_A_D29 DDR_A_DQS#3 DDR_A_DQS3 DDR_A_D30 DDR_A_D31 R103 1K_0402_1% DDR_A_D26 DDR_A_D27 1K_0402_1% R107 +1.5V R110 0.1U_0402_16V4Z 10K_0402_5% 205 G1 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 G2 206 DDR_A_CKE1 DDR_A_CKE1 DDR_A_MA15 DDR_A_MA14 DDR_A_MA11 DDR_A_MA7 C DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 DDR_A_CLK1 DDR_A_CLK1# DDR_A_CLK1 DDR_A_CLK1# DDR_A_BS1 DDR_A_RAS# DDR_A_BS1 DDR_A_RAS# DDR_A_CS0# DDR_A_ODT0 DDR_A_CS0# DDR_A_ODT0 DDR_A_ODT1 C150 C151 C152 C153 1 2 DDR_VREF_CA_DIMMA R108 DDR_A_DM4 DDR_A_D38 DDR_A_D39 C135 2.2U_0603_6.3V6K DDR_A_D44 DDR_A_D45 2010/08/01 2 C136 0.1U_0402_16V4Z DDR_A_D46 DDR_A_D47 DDR_A_D52 DDR_A_D53 DDR_A_DM6 DDR_A_D54 DDR_A_D55 DDR_A_D60 DDR_A_D61 DDR_A_DQS#7 DDR_A_DQS7 DDR_A_D62 DDR_A_D63 PM_EXTTS#0_1 D_CK_SDATA D_CK_SCLK PM_EXTTS#0_1 D_CK_SDATA D_CK_SCLK +0.75VS FOX_AS0A626-U8RN-7F Deciphered Date B DDR3 SO-DIMM A Change to Reverse Type 8mm High Compal Electronics, Inc Compal Secret Data 2009/08/01 Issued Date DDR_A_DQS#5 DDR_A_DQS5 10U_0805_6.3V6M 1U_0402_6.3V6K 0_0402_5% DDR_A_D36 DDR_A_D37 C154 Security Classification 1U_0402_6.3V6K +DIMM_VREFCA DDR_A_ODT1 A CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 Title SCHEMATIC,MB A6582 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401939 Date: Sheet Friday, July 02, 2010 10 of 48 A A B Ri 90k 70k 45k 25k D +5VAMP 0.1U_0402_16V4Z C706 10 dB +5VAMP 16 15 C705 10U_0805_10V4Z R678 100K_0402_5% VDD PVDD1 PVDD2 C707 0.47U_0603_10V7K R680 C709 AMP_LEFT C710 0.47U_0603_10V7K R683 RIN- 0.47U_0603_10V7K AMP_C_LEFT 0_0603_5% EC_MUTE# 19 GAIN1 ROUT+ 18 SPKR+ ROUT- 14 SPKR- LOUT+ SPKL+ LOUT- SPKL- @ R681 100K_0402_5% R682 100K_0402_5% LIN+ LIN- NC 12 BYPASS 10 SHUTDOWN Keep 10 mil width GND5 GND1 GND2 GND3 GND4 EC_MUTE# GAIN1 AMP_C_RIGHT 17 0_0603_5% GAIN0 GAIN0 RIN+ 2 AMP_RIGHT 0.47U_0603_10V7K 1 @ R679 100K_0402_5% U37 C708 E GAIN0 GAIN1 AV(inv) 0 6dB 10dB 15.6dB 1 21.6dB C C711 0.47U_0603_10V7K 21 20 13 11 1 2 TPA6017A2PWPR_TSSOP20 C712 330P_0402_50V7K HP_LEFT R686 56.2_0603_1% HPOUT_L_1 HP_RIGHT R685 56.2_0603_1% HPOUT_R_1 L55 L56 (Use NAL00 PCB Footprint) C713 330P_0402_50V7K Headphone Out JHP1 2 HPOUT_L_2 FBMA-L11-160808-700LMT_2P HPOUT_R_2 FBMA-L11-160808-700LMT_2P HP_PLUG# HP_PLUG# Int Speaker Conn 3 MIC1_VREFO Left Side D27 CH751H-40PT_SOD323-2 0_0603_5% 0_0603_5% SPK_R+ SPK_R- @ @ SPKR+ R690 SPKR- R691 1 MIC1_L R694 MIC1_R R695 MIC1_L_1 1K_0603_1% MIC1_R_1 1K_0603_1% 2 G1 G2 MIC1_L_R MIC1_R_R C715 220P_0402_50V7K MIC_PLUG# MIC_PLUG# @ D30 PJDLC05C_SOT23-3 SINGA_2SJ-A960-C01 CONN@ 1 ACES_88266-02001 CONN@ @ D25 PJDLC05C_SOT23-3 L57 FBMA-L11-160808-700LMT_2P L58 FBMA-L11-160808-700LMT_2P C714 220P_0402_50V7K JMIC1 4.7K_0402_5% JSPK2 MIC JACK R693 R692 4.7K_0402_5% Right Side @ D24 PJDLC05C_SOT23-3 ACES_88266-02001 CONN@ @ D26 PJDLC05C_SOT23-3 Headphone Out D28 CH751H-40PT_SOD323-2 G1 G2 SINGA_2SJ-0960-C01 CONN@ HP_PLUG# 1 2 20mil 2 SPK_L+ SPK_L- 0_0603_5% 0_0603_5% R688 R689 MIC_PLUG# JSPK1 SPKL+ SPKL- D25 / D26 Change to SCA00001100 for ESD 20090921 2008/08/10 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/08/10 Deciphered Date Title SCHEMATIC,MB A6582 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401939 Date: A B C D Sheet Friday, July 02, 2010 E 34 of 48 A B C D E +5VALW +5VALW SUSP 470_0603_5% 1 +1.05VS SYSON# SYSON# @ JUMP_43X118 PJ12 2 1 Q57A @ JUMP_43X118 SYSON SYSON 2N7002DW-T/R7_SOT363-6 1 2 +1.05VS_VTT R933 R934 100K_0402_5% Q56B 2N7002DW-T/R7_SOT363-6 5VS_GATE SUSP 2 R935 200K_0402_5% +VSB SI4800BDY-T1-GE3_SO8 C842 1U_0603_10V6K C844 1 C845 10U_0805_10V4Z PJ13 10U_0805_10V4Z 10U_0805_10V4Z C843 1 R932 100K_0402_5% +5VS U25 +5VALW TO +5VS C846 0.1U_0603_25V7K Q56A 2N7002DW-T/R7_SOT363-6 +3VALW TO +3VS +3VS C48 1 C50 1 560P_0402_50V7K 560P_0402_50V7K C49 R937 100K_0402_5% SUSP SUSP G Q59 2N7002_SOT23 S 5VS_GATE C47 560P_0402_50V7K 560P_0402_50V7K 560P_0402_50V7K 560P_0402_50V7K D C46 SUSP For EC B+ 20100507 Q57B SUSP# For LAM Common mode noise 200911102330 10U_0805_10V4Z 2 10U_0805_10V4Z SUSP C854 R939 470_0603_5% Q31B 2N7002DW-T/R7_SOT363-6 1.5VS_GATE R940 28K_0402_1% +VSB 10U_0805_10V4Z 2 C851 SI4800BDY-T1-GE3_SO8 1U_0603_10V6K 3 C853 SUSP C852 +1.5VS U24 2N7002DW-T/R7_SOT363-6 R938 10K_0402_5% +1.5V to +1.5VS +1.5V R936 1 +5VALW C45 470_0603_5% C850 SI4800BDY-T1-GE3_SO8 1U_0603_10V6K 1 C849 10U_0805_10V4Z 2 C848 10U_0805_10V4Z 10U_0805_10V4Z C847 B+ +3VS U26 +3VALW C855 0.1U_0603_25V7K Q31A 2N7002DW-T/R7_SOT363-6 R941 2.2M_0402_1% @ 2N7002_SOT23 Q60 @ S 3 S 1 D SUSP G Q61 2N7002_SOT23 R944 470_0603_5% D SUSP G Q62 2N7002_SOT23 S D +1.5V 2 1 R943 22_0402_5% R942 470_0603_5% +1.8VS R945 470_0603_5% @ S D G +0.75VS +1.05VS_VTT ACIN U24 / U25 / U26 Change to SB548000320 20090922 D SUSP G Q63 2N7002_SOT23 S 2 SYSON# G Q64 2N7002_SOT23 @ 2009/5/12 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/12/31 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATIC,MB A6582 Document Number Rev A 401939 Sheet Friday, July 02, 2010 E 35 of 48 A B C D VIN 1 PL24 SMB3025500YA_2P PC207 100P_0402_50V8J PC208 100P_0402_50V8J PC206 1000P_0402_50V7K 2 ACES_50305-00441-001 1 GND GND 2DC_IN_S2 DC_IN_S1 PJP1 PC209 1000P_0402_50V7K 2 PJ6 +3VALWP VIN PJ2 1 +3VALW +VGFX_COREP 2 1 +5VALW PJ5 JUMP_43X118 PR304 68_1206_5% 2 1 51ON# +VSB JUMP_43X118 VS 1 +1.5V 1 JUMP_43X39 PJ9 +1.05VS_VTTP PC213 0.1U_0603_25V7K +1.8VSP 2 1 1 +1.05VS_VTT JUMP_43X118 PJ10 2 1 PJ14 PC212 0.22U_0603_25V7K PR308 22K_0402_1% 2 PR307 100K_0402_1% JUMP_43X118 PJ7 2 1 PJ11 +VSBP PR305 68_1206_5% N1 1 +1.5VP PQ42 TP0610K-T1-E3_SOT23-3 +VGFX_CORE PJ8 +5VALWP BATT+ PD3 LL4148_LL34-2 1 JUMP_43X118 PD2 LL4148_LL34-2 JUMP_43X118 PJ4 2 1 JUMP_43X118 +1.8VS JUMP_43X118 JUMP_43X118 PJ17 +0.75VSP 2 1 +0.75VS JUMP_43X79 +3VLP +CHGRTC PR310 0_0603_5% Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/09/20 Deciphered Date 2008/09/20 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATIC,MB A6582 Rev A 401939 Date: A B C Friday, July 02, 2010 Sheet D 36 of 48 A TH PI PR542 100_0402_1% PR543 100_0402_1% VL VCC TMSNS1 GND RHYST1 OT1 TMSNS2 OT2 RHYST2 PR549 9.53K_0402_1% PH1 100K_0402_1%_NCP15WF104F03RC G718TM1U_SOT23-8 @ PR551 @PR551 47K_0402_1% PR550 1K_0402_1% @ PR547 @PR547 100K_0402_1% PU30 +3VALWP PR546 21K_0402_1% PR545 10K_0402_1% PC381 0.1U_0402_10V7K PR548 6.49K_0402_1% 2 PR544 1K_0402_5% PC380 0.01U_0402_25V7K EC_SMB_CK1 2 PC379 1000P_0402_50V7K VL EC_SMB_DA1 1 BATT+ PL44 SMB3025500YA_2P BATT_S1 1 VMB CONN@ PH1 under CPU botten side : CPU thermal protection at 92 degree C Recovery at 56 degree C EC_SMCA D PJP2 SUYIN_200275GR008G13GZR EC_SMDA C 10 2 GND GND B BATT_TEMP MAINPWON 2 @ PH2 @PH2 100K_0402_1%_NCP15WF104F03RC +VSBP 1 PC222 0.1U_0603_25V7K PR327 22K_0402_1% VL 3 2 PR325 100K_0402_1% 1 B+ PC221 0.22U_0603_25V7K PQ44 TP0610K-T1-E3_SOT23-3 PC224 1U_0402_6.3V6K PQ45 G D S 2N7002W-T/R7_SOT323-3 PR330 1K_0402_5% 1 SPOK PR329 100K_0402_1% 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/09/20 Deciphered Date 2008/09/20 Title SCHEMATIC,MB A6582 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401939 Date: A B C Friday, July 02, 2010 Sheet D 37 of 48 Note: Use TPS51125 IC can remove RTC refernece LDO Use TPS51427 IC must keep RTC refernece LDO PC1000 1U_0603_10V6K 2VREF_8205 RT8205_B+ PR559 30K_0402_1% PR560 20K_0402_1% PR561 20K_0402_1% RT8205_B+ LG_5V 2 RT8205EGQW_WQFN24_4X4 RT8205_B+ D PQ100B DMN66D0LDW-7_SOT363-6 G 2VREF_8205 S PC1016 4.7U_0805_10V6K VL PC1017 0.1U_0603_25V7K G S Typ: 175mA +5VALWP PC1014 220U_6.3V_M + B RT8205 TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP) (2)SMPS2=375KHZ(+3VALWP) TPS51125A TONSEL=VREF (1)SMPS1=245KHZ (+5VALWP) (2)SMPS2=305KHZ(+3VALWP) 3.3VALWP Delta I = 1.902A (Freq=305KHz) Iocp = 5.931A ~ 7.100A 5VALWP Delta I = 3.199A (Freq=245KHz) Iocp = 8.759A ~ 10.449A 1 PR570 100K_0402_1% AO4712_SO8 PQ99 PC1015 1U_0603_10V6K 1 ENTRIP2 18 17 16 19 PR567 4.7_1206_5% LGATE1 PL47 4.7UH_SIL104R-4R7PF_5.7A_30% LGATE2 NC LX_5V VREG5 UG_5V 20 VIN 21 PHASE1 13 PC1007 0.1U_0603_25V7K PC1006 2200P_0402_50V7K PC1005 10U_1206_25V6M ENTRIP1 FB1 ENTRIP1 REF TONSEL UGATE1 PHASE2 GND UGATE2 B+ D ENTRIP2 PR565 PC1010 2.2_0603_5% 0.1U_0603_25V7K BST_5V 2 PC1013 680P_0402_50V7K PC1012 680P_0402_50V7K 22 B VL 23 BOOT1 VFB=2.0V C SPOK PGOOD PR568 499K_0402_1% ENTRIP1 PQ100A DMN66D0LDW-7_SOT363-6 24 PQ97 AO4466_SO8 BOOT2 EN 12 PR563 154K_0402_1% VREG3 + LG_3V PQ98 AO4468_SO8 PR569 100K_0402_1% PC1011 220U_6.3V_M PR566 4.7_1206_5% PL46 4.7UH_SIL104R-4R7PF_5.7A_30% VO1 15 PR564 2 BST_3V 2.2_0603_5% UG_3V 10 PC1009 0.1U_0603_25V7K LX_3V 11 VO2 SKIPSEL +3VALWP P PAD FB2 PC1008 4.7U_0805_10V6K 25 14 C PU1000 PC1004 2200P_0402_50V7K PQ96 AO4466_SO8 PR562 137K_0402_1% ENTRIP2 +3VLP PC1003 10U_1206_25V6M 1 PR558 13K_0402_1% Typ: 175mA PC1002 0.1U_0603_25V7K @ 2 PC1001 680P_0402_50V7K B+ PC1028 0.1U_0603_25V7K PL48 FBMA-L18-453215-900LMA90T_1812 D D MAINPWON PQ102 PDTC115EUA_SC70-3 2 1 +3.3VALWP Ipeak=4.72A ; Imax=4.00A Delta I=1.547A=>1/2Delta I=0.773A (F=375K Hz) Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Ilimit_min=(137K*10uA)/(10*22m*1.2)=5.18A Ilimit_max=(133K*10uA)/(10*17.4m*1.2)=6.56A Iocp=5.962A~7.334A +5VALWP Ipeak=7A ; Imax=4.9A Delta I=2.613A=>1/2Delta I=1.306A (F=300K Hz) Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Ilimit_min=(154K*10uA)/(10*18m*1.2)=7.12A Ilimit_max=(154K*10uA)/(10*15m*1.2)=8.555A Iocp=Ilimit+1/2Delta I =8.426A ~ 9.861A PR592 ACPRN200K_0402_1% PQ101 PDTC115EUA_SC70-3 PC1019 2.2U_0603_10V6K PR571 100K_0402_1% PR572 40.2K_0402_1% VS 1 A A PQ103 PDTC115EUA_SC70-3 Compal Secret Data Security Classification EC_ON 2009/02/04 Issued Date 2010/02/04 Deciphered Date Title Compal Electronics, Inc SCHEMATIC,MB A6582 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Friday, July 02, 2010 Date: Rev A 401939 Sheet 38 of 48 B PR368 100_0402_1% VCOMP CSIP 19 ICM PHASE 18 VREF UGATE 17 CHLIM BOOT 16 ACLIM VDDP 15 VADJ LGATE 14 GND PGND 13 12 PC247 2200P_0402_25V7K 1 1 CV mode PR376 4.7_0603_5% PC265 4.7U_0603_6.3V6K @ @P ISL6251AHAZ-T_QSOP24 PR379 15.4K_0402_1% 6251VDD PR589 10K_0402_1% 1 PR381 31.6K_0402_1% PACIN 2 PR587 47K_0402_1% PR590 14.3K_0402_1% PQ111 PDTC115EU_SOT323 ACPRN Kv Rinternal ic=514K Rec=3K R1=PR379=15.4K R2=PR381=31.6K R=514K//31.6K//(15.4K+3k)=11.372K r=514K//514K//31.6K=28.14K Vcell=0.175*Vadj+3.99v 4.2V=0.175*Vadj+3.99V =>Vadj=1.2V Vadj=Vref*(R/(R+514K))+CALIBRATE*(r/(r=514K)) 1.1483=CALIBRATE*0.6046 =>CALIBRATE=1.899 1.899=(4.2-(Vcell+A*0.175))*Kv=(4.2-(4.2+A*0.175))*Kv A=Vref*(R/(R+514K))=0.052 Kv=9.451 ACIN PR588 10K_0402_1% BATT Type 2 RB751V-40_SOD323-2 26251VDD 2N7002W-T/R7_SOT323-3 Ki Vchlim=Iref*(PR374/(PR372+PR374)) =Iref*(100K/(80.6K+100K)) =Iref*0.5537 Ichanrge=(165mV/PR369)*(Vchlim/3.3V) =(165m/20m)*(1/3.3V)*Iref*0.5537 =1.3842*Iref Iref=0.7224*Ichanrge =>Ki=0.7224 Charging Voltage (0x15) @ 6251VDDP DL_CHG BATT+ PR369 0.02_1206_1% PQ64 AO4468_SO8 PC260 0.1U_0603_25V7K BST_CHGA PD13 11 TCR=50ppm / C PL29 10UH_PCMB104T-100MS_6A_20% CHG CALIBRATE# CC=0.6~4.48A IREF=0.7224*Icharge Ki=0.7224 IREF=0.43V~3.24V S 10 CP mode Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) where Vaclm=1.502V, Iinput=4.07A D 6251aclim 20K_0402_1% PR378 S 65W/90W# PQ66 G 3 12.1K_0402_1% 6251VREF 1 PR374 100K_0402_1% PR375 DH_CHG PR373 0_0603_5% BST_CHG 0.1U_0402_16V7K PC261 0.01U_0402_25V7K IREF PR377 2.55K_0402_1% ACOFF ACOFF PQ65 PDTC115EU_SOT323 6251VREF PC259 PR372 80.6K_0402_1% 1 ADP_I PR371 47K_0402_5% PACIN @ PQ61 2N7002W-T/R7_SOT323-3 PACIN G S @ D PC264 10U_1206_25V6M 2 10K_0402_1% D PC253 0.1U_0603_25V7K 20 PQ112 2N7002W-T/R7_SOT323-3 ACPRN PQ62 G AO4466_SO8 PC1027 2200P_0402_50V7K CSIN CSOP ICOMP PC254 0.047U_0402_16V7K PR364 20_0402_5% PR365 20_0402_5% PC257 0.1U_0603_25V7K PR367 2_0402_5% LX_CHG VIN_1 CSON 21 PR363 20_0402_5% CSOP ACPRN CSON CELLS @ PR357 @PR357 200K_0402_1% VIN PC263 10U_1206_25V6M 1 PR366 PC256 0.01U_0402_25V7K 2 1 EN PR574 14.3K_0402_1% PC252 0.1U_0603_25V7K 1 2 23 22 S 1 6800P_0402_25V7K ACPRN ACSET ACPRN @PD19 @ PD19 BAS40CW_SOT323-3 2 PR370 4.7_1206_5% PC255 DCIN ACOFF PQ57 PDTC115EU_SOT323 S PQ59B DMN66D0LDW-7_SOT363-6 DCIN VIN PR356 10K_0402_1% PQ59A G DMN66D0LDW-7_SOT363-6 G D 3 PDTC115EU_SOT323 D 6251_EN VDD 24 PR362 2 PQ60 3S/4S# 1 PR352 47K_0402_1% ACSETIN PC1020 1000P_0402_25V8J 1 1 PR361 150K_0402_1% PR576 10_1206_5% PR591 100K_0402_5% @PR575 @ PR575 PR573 191K_0402_1% 191K_0402_1% PD18 RB751V-40_SOD323-2 PU17 1 PR359 0_0402_5% PR360 47K_0402_5% PreCHG PC246 0.1U_0603_25V7K CSIP VIN FSTCHG 6251VDD CSIN 47K PQ58 PDTC115EU_SOT323 PQ53 AO4407A_SO8 PC245 10U_1206_25V6M CHG_B+ PL45 HCB4532KF-800T90_1812 PC244 10U_1206_25V6M 2 ACSETIN PC249 0.1U_0603_25V7K PC248 5600P_0402_25V7K 4 VIN_1 PQ56 PDTA144EU_SOT323-3 47K PR354 200K_0402_1% B+ PR351 0.02_2512_1% PR353 200K_0402_1% P3 PQ52 AO4407A_SO8 B+ P2 6251VDD PC250 2.2U_0603_6.3V6K PQ51 AO4407A_SO8 VIN D CP = 85%*Iada ; CP = 4.07A CP = 85%*Iada ; CP = 2.91A ADP_I = 19.9*Iadapter*Rsense 100K_0402_1% Iada=0~4.74A(90W/19V=4.736A) Iada=0~3.42A(90W/19V=3.421A) C PC262 C262 680P_0402_50V7K A 4 Normal 3S LI-ON Cells 12600mV 12.60V Issued Date Compal Electronics, Inc Compal Secret Data Security Classification - 2007/09/20 Deciphered Date 2008/09/20 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATIC,MB A6582 Rev A 401939 Date: A B C Friday, July 02, 2010 Sheet D 39 of 48 D D PreCHG PR386 1K_1206_5% TP0610K-T1-E3_SOT23-3 PQ67 PD14 LL4148_LL34-2 B+ C PR393 PR391 1K_1206_5% C PR392 PR390 1K_1206_5% 100K_0402_5% PR388 1K_1206_5% 100K_0402_5% VIN ACOFF PD20 +5VALWP PR396 100K_0402_5% PQ68 PDTC115EU_SOT323 PQ70 PDTC115EU_SOT323 BAS40CW_SOT323-3 3 B B A A 2007/09/20 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2008/09/20 Title SCHEMATIC,MB A6582 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev A 401939 Date: Sheet Friday, July 02, 2010 40 of 48 FB=0.6V Note:Iload(max)=3.5A 1 PR405 4.99K_0402_1% @ SY8033BDBC_DFN10_3X3 PC382 680P_0603_50V7K PC1026 0.1U_0402_10V7K PC274 0.47U_0603_16V7K 2 NC FB_1.8V TP NC 11 1.8V_EN PR407 10K_0402_1% PC279 22U_0805_6.3VAM FB EN +1.8VSP PC278 22U_0805_6.3VAM SVIN D PL30 2.2UH_MSCDRI-74A-2R2M-E_6.5A_20% PC1022 68P_0402_50V8J LX LX_1.8V PVIN 2 LX PVIN PR553 4.7_1206_5% SUSP# PR401 22K_0402_5% 10 PC282 22U_0805_6.3VAM PU20 +3VALW PG D C C B B PJ20 JUMP_43X79 1 +1.5VP NC VREF VCNTL VOUT NC TP +3VALW NC GND 2 PR408 1K_0402_1% PC284 4.7U_0603_6.3V6K VIN 2 PU21 PC285 1U_0402_6.3V6K 1K_0402_1% 2007/09/20 Deciphered Date PC288 10U_0805_6.3V6M A Compal Electronics, Inc Compal Secret Data Security Classification Issued Date +0.75VSP PR410 2N7002W-T/R7_SOT323-3 S PC286 0.1U_0402_16V7K PC287 0.033U_0402_16V7K A D PQ72 G PR409 28K_0402_1% SUSP UP7711U8 PSOP 8P 2008/09/20 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATIC,MB A6582 Rev A 401939 Date: Sheet Friday, July 02, 2010 41 of 48 A B C D PL31 FBMA-L18-453215-900LMA90T_1812 LX_1.5V 11 VDDP 10 2 2 + PC295 4.7U_0805_10V6K PC293 330U_6.3V_M PC294 680P_0603_50V7K RT8209BGQW_WQFN14_3P5X3P5 PQ74 AO4712_SO8 PGND LGATE PR415 4.7_1206_5% +5VALW LG_1.5V +1.5VP 12 CS 0.1U_0603_25V7K PC296 4.7U_0603_6.3V6K Rds=4.5mȍ(Typ) 5.6mȍ(Max) VFB=0.75V PR418 5.9K_0402_1% PL32 1.8UH_1164AY-1R8N=P3_9.5A_30% PC292 14 15 NC GND PHASE UGATE FB open-drain PGOOD UG_1.5V VDD 13 PR417 18.2K_0402_1% PR414 2.2_0603_5% 2BST_1.5V-1 BOOT VOUT EN/DEM TON PR416 100_0603_1% +5VALW PC383 560P_0402_50V7K BST_1.5V PU22 1.5V_EN @ PC291 @PC291 0.1U_0402_16V7K @ PR413 @PR413 47K_0402_5% PR412 0_0402_5% SYSON PR411 280K_0402_1% B+ PC290 4.7U_0805_25V6-K PQ73 AO4466_SO8 Because +1.5VSP has 17.74A power budget, it includes DDR3, VGA chip, VRAM, so must use molding choke EN_PSV GND=>Disable SMPS FLOAT=>PWM_only mode HIGH=>Auto_skip mode PC289 4.7U_0805_25V6-K 51117_1.5V_B+ PR419 5.76K_0402_1% VFB=0.75V Vo=VFB*(1+PR418/PR419)=1.52V Freq=282KHz(min) , 300KHz(typ) Cesr=15m ohm Iocp=9.94A~13A 3 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2008/08/10 Deciphered Date 2009/08/10 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATIC,MB A6582 Rev A 401939 Date: A B C Friday, July 02, 2010 Sheet D 42 of 48 PL37 FBMA-L18-453215-900LMA90T_1812 PR470 280K_0402_1% PR466 80.6K_0402_1% PR461 1.05V_EN BST_1.05VS_VTT 2.2_0603_5% VFB PGOOD DRVH 13 LL 12 TRIP 11 V5DRV 10 DH_1.05VS_VTT LX_1.05VS_VTT +5VALW TP PR465 4.7_1206_5% RT8209BGQW_WQFN14_3P5X3P5 PC329 4.7U_0805_10V6K PQ83 TPCA8028-H_SOP-ADVANCE8-5 + PC332 680P_0603_50V7K 2 PR467 8.66K_0402_1% C DL_1.05VS_VTT PGND DRVL +1.05VS_VTTP PL38 1UH_FDUE1040D-1R0M-P3_21.3A_20% 1 VTT_SENSE V5FILT VBST VFB=0.75V PR473 10_0402_5% 14 VOUT PC330 4.7U_0603_6.3V6K TON GND +5VALW PR463 100_0603_1% PQ82 TPCA8030-H 1N SOP-ADV EN_PSV PU999 15 PC331 0.22U_0603_16V7K 2 @ PR468 10K_0402_5% PC328 0.1U_0603_25V7K SUSP# PC384 560P_0402_50V7K D VTTP_B+ PC385 560P_0402_50V7K PC326 10U_1206_25V6M 2 B+ PC327 10U_1206_25V6M D C PC333 390U_2.5V_M PR472 2.4K_0402_1% Rdson=2.3mȍ/3.2mȍ Material Note: 330uF/9 mȍ, number are 3, Power 1, HW 2 PR476 5.9K_0402_1% Change from APW7138 to RT8209 at 2010-0428 night 1 @ PR462 1K_0402_1% VFB=0.75V Vo=VFB*(1+PR308/PR309)=1.05V Ton=19E-12*Ron*(((2/3)*Vo+100mV)/Vin)+50ns=2.74E-07 Freq=282KHz , 300KHz(typ) PR459 2K_0402_1% PGOOD=1V @ H_VTTPWRGD +3VS PR460 2K_0402_1% B +5VS PR458 0_0402_5% B Cesr=15m ohm Ipeak=19.6A Imax=13.72A Iocp=23.52A Delta I=((19-1.05)*(1.05/19))/(L*Freq)=1.837A =>1/2 Delta I=0.918A Vtrip=Rtrip*10uA=0.0866V Iocp-min=Vtrip/(Rds(on)(max)*1.2)+1/2 Delta I = 23.471A Iocp-max=Vtrip/(Rds(on)(typ)*1.2)+1/2 Delta I =32.295A Iocp=22.4A~30.8A A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/4/15 2010/04/15 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATIC,MB A6582 Rev A 401939 Date: Friday, July 02, 2010 Sheet 43 of 48 Intel Auburndale CPU(Integrate Graphics) Ipeak=22A Imax=15A OCP calculation : Assume DCR=1.1m ohm G1=Rn/(Rn+Rsum)=0.617 where Rn=PR277 // (PR274+PH3)=5.875k ohm Rsum=PR269=3.65k ohm LL=2*Rdroop*G1*DCR/Ri= 6.96m V/A where Rdroop=PR271=8.66k ohm, Ri=PR283=1.69k ohm Iocp=OCP Threshold*Rdroop/LL=24.89A PC191 0.22U_0402_6.3V6K GFXVR_IMON ISUMBST_GFX 1 PC200 150P_0402_50V8J PR275 17.8K_0402_1% PL10 0.45UH_PCMB104T-R45MN_25A_20% VID1 21 2 PR274 1 PC198 2.2U_0603_6.3V6K PC199 680P_0603_50V7K Rds=4.5mOHM(typ) Rds=5.6mOHM(max) + PC130 330U_X_2VM_R6M Layout Note: Place near Choke PH3 2 2.61K_0402_1% 10K +-5% TSM0A103J4302RE 0402 PR276 8.06K_0402_1% PR270 0_0402_5% +5VALW PR269 3.65K_0805_1% PQ41 AO4456_SO8 PR273 0_0603_5% PR268 4.7_1206_5% +VGFX_COREP VID0 20 PQ40 AO4456_SO8 VCCP 1 17 18 DL_GFX 16 LX_GFX 13 14 12 C 15 DH_GFX 19 VID2 VID3 PQ39 TPCA8030-H 1N SOP-ADV BOOT IMON 10 11 VDD RTN ISUM VIN VID4 VID5 PC201 22P_0402_50V8J CLK_EN# 22 PGOOD 23 RBIAS 24 2 VSSP LGATE 25 147K for CPU 47K for GPU PC196 100P_0402_50V8J VW VID6 COMP UGATE VR_ON PC193 0.22U_0603_25V7K DCR=1.1 mOHM PU12 ISL62881HRZ-T_QFN28_4X4 PHASE DPRSLPVR PC197 1000P_0402_50V7K FB 26 PR271 2.87K_0402_1% PR294 47K_0402_1% VSEN 27 PR272 825K_0402_1% ISUM+ 29 AGND PC195 330P_0402_50V7K 28 PR293 10_0402_1% 2 PR266 2.2_0603_5% PC194 330P_0402_50V7K VCC_AXG_SENSE VSS_AXG_SENSE ISUM+ PC192 1000P_0402_50V7K C +VGFX_COREP 2 PR265 7.5K_0402_1% PR292 10_0402_1% PC189 1U_0402_6.3V6K VSS_AXG_SENSE 1 PR263 0_0603_5% PR264 1_0603_5% 2 +5VALW PC190 0.22U_0603_25V7K @ PC188 0.1U_0402_25V6 1 PC126 10U_1206_25V6M PC125 10U_1206_25V6M 1 PC187 2200P_0402_50V7K 1 PC386 560P_0402_50V7K D PL23 FBMA-L11-322513-201LMA40T_1210 GFX_B+ 2 B+ PC1029 0.1U_0603_25V7K D PR277 11K_0402_1% Material Note: 330uF/6 mȍ, number are 3, PW 1, HW 1, of HW is backup PC202 0.1U_0402_16V7K @ PR555 0_0402_5% B PR283 @ PR288 562_0402_1% 82.5_0402_1% 2 @ PC204 0.01U_0402_16V7K 2 PC203 0.1U_0402_16V7K GFXVR_VID_0 GFXVR_VID_1 GFXVR_VID_2 GFXVR_VID_3 GFXVR_VID_4 GFXVR_VID_5 GFXVR_VID_6 GFXVR_EN GFXVR_DPRSLPVR @ PR284 100_0402_1% PR280 PR281 PR282 PR285 PR286 PR287 PR289 PR290 PR291 1 1 1 1 1 2 2 2 2 2 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% GFX_CORE_PWRGD B ISUM+ @ PC205 180P 50V J NPO 0402 ISUM- +1.05VS_VTT 2009-1214 common circiut modify A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2009/4/15 Deciphered Date 2010/04/15 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC,MB A6582 Document Number Rev A 401939 Sheet Friday, July 02, 2010 44 of 48 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 H_PSI# H_DPRSLPVR CPU_VID1 CPU_VID0 HFM_VID H PH0 PH1 # of PH 1 HFM_Icc LL Icc_TDC Auburndale 45W 1.075 50 1.9m 37 35 Auburndale 35W 0.975 38 1.9m 29 27 Clarksfield SV 0.95 51 1.9m 38 39 Clarksfield XE 0.95 65 TBD 48 TBD +5VALW 29 VARFREQ SWFB2 28 SW2 27 DRVH2 26 BST2 25 3212_DRVH2 PC358 0.1U_0603_25V7K TP 2 PC387 560P_0402_50V7K 1 2 1 PR523 165K_0402_1% 2 D PR513 10_0402_5% PC359 680P_0603_50V7K CSREF 3212_CS_PH2 PR522 73.2K_0402_1% PC363 1200P_0402_50V7K PC362 330P_0402_50V7K 1 1K_0402_1% PC360 0.01U_0402_50V7K PH6 100K_0402_1%_NCP15WF104F03RC C 1 +CPU_B+ PR520 PC361 1000P_0402_50V7K PR524 2 TTSense PR512 4.7_1206_5% 2 Place PH1 close to PHASE inductor on the same layer PR517 649K_0402_1% PL41 0.36UH +-20% ETQP4LR36WFC 24A PQ92 TPCA8028-H_SOP-ADVANCE8-5 PR519 2.05K_0402_1% Connect to input caps E 3212_DRVH2 3212_CSCOMP 3212_CSCOMP S PQ90 TPCA8030-H_SOP-ADV8-5 PR557 2.2_0603_5% 13212_DRVH2_1 PR509 2.2_0603_5% 49 SWFB3 24 PWM3 OD3 ILIM 22 23 21 CSCOMP 20 CSSUM 19 CSREF LLINE 3212_SW2 3212_DRVL2 3212_VRTT G C PR521 0_0402_5% +CPU_B+ PC350 4.7U_0603_6.3V6K 2.05K PR515 69.8K_0402_1% D PR518 7.32K_0402_1% 18 13 +5VALW Avoid high dV/dt 2N7002W-T/R7_SOT323-3 PQ94 2 PR514 80.6K_0402_1% PR516 162K_0402_1% 1 1 H_PROCHOT# 3212_DRVL2 PR506 100_0402_1% 3212_CS_PH2 3212_SW2 PR510 @ 499_0402_1% PR511 0_0402_5% D 17 +3VS PR508 0_0402_5% RAMP GND 16 TTSNS 12 RT 11 15 TTSense RPM VRTT IREF 10 PR507 0_0402_5% 3212_VRTT 3212_CS_PH1 +5VALW 3212_DRVL1 30 DRVL2 F PC347 680P_0603_50V7K PGND TRDET +CPU_CORE PC355 4.7U_0805_25V6-K COMP 14 2 E PH1 PH0 PSI VID6 VID5 VID4 VID3 CSREF 32 31 PC341 4.7U_0805_25V6-K 2 38 37 39 40 41 42 43 44 45 46 VID2 VCC PVCC DRVL1 PR502 1 NCP3218MNR2G_QFN48_6X6 3212_SW1 100_0402_1% 3212_CS_PH1 2 FB 33 G + PR500 10_0402_5% FBRTN SWFB1 3212_DRVL1 3212_DRVH1 B+ PR499 4.7_1206_5% 34 PQ88 TPCA8028-H_SOP-ADVANCE8-5 CLKEN 35 SW1 PC346 0.1U_0603_25V7K PC354 4.7U_0805_25V6-K 2 CLK_EN# DRVH1 PR498 2.2_0603_5% B+ DCR=1.1m OHM IMON 36 PC349 1000P_0402_50V7K PL40 0.36UH +-20% ETQP4LR36WFC 24A PWRGD AGND BST1 2 EN IMVP_IMON PC348 3212_FBRTN 0.068U_0402_16V7K PC351 150P_0402_50V8J 3212_FB PC353 PC352 150P_0402_50V8J PR504 12P_0402_50V8J PR503 39.2K_0402_1% 1.65K_0402_1% 21 2 PR505 5.11K_0402_1% +5VALW 1 PL39 FBMA-L18-453215-900LMA90T_1812 PR501 5.49K_0402_1% PR491 0_0603_5% 2 IMVP_IMON DPRSLP PR496 0_0402_5% 2 @ 47 48 PU27 F VID1 VGATE PR556 2.2_0603_5% 3212_DRVH1 13212_DRVH1_1 3212_SW1 VID0 +1.05VS_VTT PQ87 TPCA8030-H_SOP-ADV8-5 PC344 1U_0603_16V6K PGND PR494 CLK_EN# PR497 0_0402_5% PC339 4.7U_0805_25V6-K PR489 0_0402_5% 499_0402_1% 0_0402_5% 1 PR493 3K_0402_5% 1 CLK_ENABLE# PR481 10_0603_5% PR490 2 +3VS PR495 0_0402_5% +CPU_B+ +3VS PR492 3K_0402_5% H VR_ON G Icc_Dyn PC343 220U_25V_M PC342 4.7U_0805_25V6-K CSREF 3212_CS_PH1 3212_CS_PH2 137K_0603_1% 2 PR525 137K_0603_1% PC364 1U_0603_16V6K PH7 100K_0402_1%_NCP15WF104F03RC B B @ PR526 100_0402_1% VCCSENSE VCCSENSE VSSSENSE +CPU_CORE VSSSENSE PR527 100_0402_1% @ A A Compal Secret Data Security Classification 2009/02/04 Issued Date Deciphered Date 2010/02/04 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: Compal Electronics, Inc SCHEMATIC,MB A6582 Document Number Rev A 401939 Friday, July 02, 2010 Sheet 45 of 48 Version change list (P.I.R List) Item Page of for PWR Fixed Issue Reason for change Rev PG# Modify List Date Phase Change PR353 from SD034470280 to SD034200380 D Change PR587 from SD034100380 to SD034470280 Pre-Charge circiut update Pre-Charge circiut disable in EVT, now modify and enable it 0.1 39 C Change PQ111 from SB000006800 to SB301150200 Pre-Charge circiut update Pre-Charge circiut disable in EVT, now modify and enable it Pre-Charge circiut update Pre-Charge circiut disable in EVT, now modify and enable it 0.1 38 0.1 40 EMI fail, add 3/5V snubber and Boost Resister to silve it 2010/06/08 to PVT Add PR592 SD034200380 2010/06/08 to PVT Add PR388, PR390, PR391 SD011100180 Add PD14 SC100001Y80 LL4148_LL34-2 Add PR566 and PR567 SD001470B80 S RES 4.7 1206 EMI request to solve EMI issue 0.1 38 5% Add PC1012 and PC1013 SE074681K80 S CER CAP 680P 0402 50V7K 2010/06/08 to PVT Change PR564 and PR565 from SD013000080 to SD013220B80 EMI request to solve EMI issue 0.1 42 Add PR415 SD001470B80 4.7 1206 5% C 2010/06/08 to PVT Add PC294 SE025681K80 S CER CAP 680P 50V K X7R 0603 Add PR465 SD001470B80 4.7 1206 5% EMI fail, add 1.05V snubber and Boost Resister EMI request to solve EMI issue 0.1 43 10 12 Add PQ102 and PQ103 SB301150200 Change PR386 from SD011000080 to SD011100180 EMI fail, add 1.5V snubber 11 2010/06/08 to PVT Add PC1027 SE074222K80(S CER CAP 2200P 0402 50V7K) Change PR590 from SD034200280 to SD034143280 Change PR591 from SD028470280 to SD028100380 D Change PR371 from SD034220280 to SD034470280 Add PC332 SE025681K80 S CER CAP 680P 50V K X7R 0603 2010/06/08 to PVT Change PR461 from SD013000080 to SD013220B80 EMI fail, add GFX_CORE snubber EMI request to solve EMI issue 0.1 44 Add PR268 SD001470B80 4.7 1206 5% 2010/06/08 to PVT Add PC199 SE025681K80 S CER CAP 680P 50V K X7R 0603 Change PR466 from SD034576280 S RES 1/16W 57.6K +-1% 0402 to SD034806280 S RES 80.6K 0402 1%) HW power sequence modify HW request 0.1 43 13 Change PC331 from SE076104K80 S CER CAP 1U 16V K X7R to SE00000R700 S CER CAP 0.22U 16V K X7R 0402 2010/06/08 to PVT 14 BOM unique BOM unique 0.1 38 Chnage PQ101 from SB301150000 to SB301150200 2010/06/08 to PVT 15 EMI request EMI request 0.1 38 Add PC1028 SE042104K80 S CER CAP 1U 25V K X7R 0603 2010/06/08 to PVT 16 EMI request EMI request 0.1 44 Add PC1029 SE042104K80 S CER CAP 1U 25V K X7R 0603 2010/06/08 to PVT Sourcer request to change a common part Sourcer request 0.1 38 Change PC1019 from SE00000GC00 S CER CAP 2.2U 10V K X7R 0603 to SE000003H00 S CER CAP 2.2UF 10V K X5R 0603 2010/06/08 to PVT 18 Per sourcer request Sourcer request to change PC331 from SE00000R700 to SE026224K80 for common part 0.1 43 19 CPU transient issue Need modify PC362 to 330P due to transient fail 0.1 45 20 Per sourcer request Per sourcer request 0.1 21 Cost down Cost down 3VALWP and Charger Low Side MOS 0.1 B B 17 A 22 Cost down Cost down +1.5VP Low side MOS and choke 0.1 23 Cost down re-caculate 1.5VP OCP 0.1 44 38 39 42 42 2010/06/08 to PVT Change PC362 from SE074561K80 S CER CAP 560P 50V K X7R 0402 to SE074331K80 S CER CAP 330P 50V K X7R 0402 Chnage PQ39/PQ82 from SB000008L80 to SB00000HL00 2007/09/20 Change PQ64 from SB00000CG00 to SB000009580(AO4468) Chnage PQ74 from SB000009F80 to SB00000AJ00(AO4712) CHnage PL32 from SH000009U00 to SH000009680 Change PR417 from SD034110280 to SD034182280 Deciphered Date 2008/09/20 2010/06/08 to PVT A 2010/06/08 to PVT Title Date: 2010/06/08 to PVT Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC 2010/06/08 to PVT 2010/06/08 to PVT Change PQ98 from SB00000AJ00 to SB000009580(AO4468) Compal Secret Data Security Classification Issued Date 43 change PC331 from SE00000R700 to SE026224K80 SCHEMATIC,MB A6582 Rev A 401939 Friday, July 02, 2010 Sheet 46 of 48 Version change list (P.I.R List) Item D 24 Page of for PWR Fixed Issue Cost down Reason for change Rev PG# re-caculate +3VALWP OCP 0.1 38 Modify List Date Change PR562 from SD034107380 to SD034137380 Phase 2010/06/08 to PVT D 25 26 27 28 29 30 C 31 C 32 33 34 35 36 37 38 B B 39 40 41 42 43 44 45 A A 46 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2007/09/20 Deciphered Date 2008/09/20 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC,MB A6582 Friday, July 02, 2010 Rev A 401939 Sheet 47 of 48 Version change list (P.I.R List) Item Phase PAGE DATE Modifycatio list EVT 04 / 08 04 / 16 N/A Modify RTC SCH Change LAN to AR8152 Update Power SCH Update AND Gate symbol - U1 / U2 / U6 / U7 / U19 Update Power MOS symbol - U24 / U25 / U26 C196 change to 1U for INTEL disign CLK GEN del C35 / C36 / C30 / C31 / C32 / C33 / C34 / L3 (for 3G@ and @ function) Q4+Q6 change to 2N7002DW Update U8 symbol Add DMIC function Modify USB define Update Power SCH Add R17 for DMIC power Update Power SCH Change LAN to GIGA&10/100 co-lay Del R307 (LVDS conn.) Change +1.05VS_VTT to +1.05VS (CLK GEN) Change C842 / C850 / C854 / C656 to SE080105K80 1U_0603_10V6K Change R940 to 28K (S3 Power sequence) SW T1 pin define (LAN) Change R907 (0_0603) to 0_1206 5% Remove C40 / C41 / C42 / C43 / C44 Change FAN Conn Update Power SCH Change LAN to BCM57780 GIGA Del R637 / R639 / R640 / R645 / R647 / R648 (AUDIO) Del DMIC Update Power SCH Update Power SCH Add C49 / C50 (EC B+) Update Power SCH C764 / C765 change to 18P_0402_50V8J (EC) Reserve D13 / D24 / D30 (ESD) U17 change to RTS5137 (SA000043500) Card reader Update Power SCH 04 / 21 D 04 / 26 04 / 27 04 / 29 04 / 29 05 / 03 05 / 03 05 / 06 05 / 07 05 / 10 05 / 11 05 / 12 05 / 13 06 / 01 C 06 / 02 06 / 03 06 / 04 06 / 10 Purpose D Unpop L11 / C247 & Pop R304 for cost down Unpop C764 / X2 & Pop R13 & C765 Change to 100K for EC remove Crystal Pop R834 & R835 change to 200K for Project ID Unpop D24 / D30 Unpop R690 / R691 Pop C49 / C50 For HDMI Unpop R753 / R757 , Add R754 / R758 to ohm Change R759 to 3.9K Change R755 to 4.7K ohm , Unpop R748 Unpop R778 C R833 / R292 0_0805 change to 0_0603 C190 / C191 & C1135 / C1136 change to 33P 0402 50V8J for Vender test report Unpop C774~C799 for EMI cost down Update Power SCH Add T25 / T26 / T27 B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2008/07/01 Deciphered Date 2009/12/31 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC SCHEMATIC,MB A6582 Rev A 401939 Date: Friday, July 02, 2010 Sheet 48 of 48 ... LAN_MIDI3- TRD3_P 38 LAN_MIDI3+ TRD2_N 35 LAN_MIDI2- TRD2_P 34 LAN_MIDI2+ TRD1_N 31 LAN_MIDI1- TRD1_P 32 LAN_MIDI1+ TRD0_N 29 LAN_MIDI0- TRD0_P 28 LAN_MIDI0+ LAN_MIDI3- LAN_MIDI3+ LAN_MIDI2-... AT24C02 1 +3V_LAN LAN_MIDI2+ C1118 GPHY_PLLVDDL For EMI 20091211 +LAN_PCIEPLLVDD 18 PCIE_PLLVDDL 21 PCIE_PLLVDDL LAN_MIDI1- R902 1K_0402_1% @ LAN_MIDI1+ LAN_MIDI0- LAN_MIDI0+... 0.1U_0402_16V4Z +LAN_PCIEPLLVDD C1127 +3V_LAN 20mil PAD LAN_CLKREQ# 10 SR_VDD L101 BLM18AG601SN1D_2P B +1.2V_LAN R914 0.1U_0402_16V4Z +LAN_AVDDH 1 C1123 C1124 L102 LAN_XTALO_R 20mil LOW_PWR +3V_LAN L100