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Acer aspire 3100 COMPAL LA 3121p HCW51 REV 1 0

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A B C D E 1 Compal Confidential 2 HCW51 Schematics Document AMD/Sempron/ATI RS485MC/SB460 2006 / 04 / 27 Rev:1.0 FOR MP 3 4 Compal Secret Data Security Classification 2005/05/09 Issued Date Deciphered Date 2006/03/08 B C Compal Electronics, inc SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A Title D Size Document Number Custom 401411 Date: , 08, 2006 Rev D Sheet E of 51 Compal confidential Project Code: HCW51 File Name : LA-3121P Thermal Sensor ADM1032ARM page D AMD Turion/Sempron CPU Socket S1 638P Clock Generator ICS951462 533/667 DDRII DDRII-SO-DIMM X2 page 10,11 page 6,7,8,9 Dual Channel page 17 D H_A#(3 31) H_D#(0 63) HT 16x16 800MHZ CRT & TV-OUT ATI-RS485MC page 24 465 BGA LCD CONN page 12,13,14,15,16 page 25 A-Link Express x PCIE USB conn x / New card USB 2.0 page 34 C ATI-SB460 BT Conn USB 2.0 page 38 549 BGA PCI BUS Audio CKT ALC883 AC-LINK Mini PCI Socket Mini card page 31 page 18,19,20,21,22 Realtek RTL8100CL RTL8110SCL ENE Controller CB714 page 26 1394 Controller VT6311S B page 27 6in1 CardReader Slot page 33 page 33 page 40 MDC Conn page 41 page 35 page 32 Slot AMP & Audio Jack page 39 SATA HDD Conn SATA RJ45 CONN C page 23 LPC BUS 1394 Conn B page 35 PATA One Channel HDD Conn CDROM Conn page 23 Power On/Off CKT / LID switch / Power OK CKT page 37 DC/DC Interface CKT page 41 CIR/LED SMsC LPC47N207 RTC CKT page 38 ENE KB910 page 36 page 28 page 18 Power Circuit DC/DC Int KBD FIR module page 42~48 page 29 Touch Pad CONN page page 36 29 BIOS page 30 A Compal Secret Data Security Classification 2005/05/09 Issued Date 2006/03/08 Deciphered Date Title Compal Electronics, inc SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A Size Document Number Custom 401411 Date: , R ev D Sheet 08, 2006 of 51 SIGNAL STATE Voltage Rails D Full ON SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock HIGH HIGH HIGH HIGH ON ON ON ON Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF B+ AC or battery power rail for power circuit N/A N/A N/A +CPU_CORE Core voltage for CPU ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF D +0.9V 0.9V switched power rail for DDR terminator ON ON OFF +1.2VS 1.05V switched power rail ON OFF OFF +1.5VS 1.5V switched power rail ON OFF OFF +1.8VALW 1.8V always on power rail ON ON ON* +1.8V 1.8V power rail for DDR ON ON OFF +1.8VS 1.8V switched power rail ON OFF OFF Vcc Ra/Rc/Re +2.5VS 2.5V switched power rail ON OFF OFF Board ID +3VALW 3.3V always on power rail ON ON ON* +3VS 3.3V switched power rail ON OFF OFF +5VALW 5V always on power rail ON ON ON* +5VS 5V switched power rail ON OFF OFF +VSB VSB always on power rail ON ON ON* +RTCVCC RTC power ON ON ON Board ID / SKU ID Table for AD channel C Board ID External PCI Devices IDSEL# Ca rdBus(SD) AD20 REQ#/GNT# PIRQE/PIRQH 394 AD16 PIRQE LAN(10/100) AD17 PIRQF Mini-PCI(WLAN/TV-Tuner) AD18 PIRQG/PORQH V AD_BID V 0.216 V 0.436 V 0.712 V 1.036 V 1.453 V 1.935 V 2.500 V V AD_BID typ V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V Device Address Smart Battery 0001 011X b Interrupts EEPROM(24C16/02) 1010 000X b (24C04) EC SM Bus2 address Device ADM1032 BTO Item WITH TV-OUT WITH FIR WITH CARD READER WITH 1394 WITH EXPRESS CARD WITH CIR WITH LAN(10/100) WITH LAN(10/100/1000) WITH GIGA LAN(8110SBL) WITH GIGA LAN(8110SCL) WITH PATA HDD WITH SATA HDD WITH BLUETOOTH WITH USBx2 WITH LPC47N207 WITH SIO1036 WITH SIO BOTH WITH SSC W/O SSC DIP CAP SKU ID Table Address SKU ID 1001 100X b 1011 000X b SB460 SM Bus address A Device Address Clock Generator (ICS951462) 1101 001Xb DDR DIMM0 1001 000Xb DDR DIMM2 1001 001Xb SKU W / O SATA WITH SATA BOM Structure TV@ FIR@ 61@ 1394@ EXPRESS@ CIR@ 100@ GIGA@ 8110SB@ 8110SC@ PATA@ SATA@ BT@ USB2@ SIO1@ SIO2@ SIOALL@ SPREAD@ NOSPREAD@ 45@ B A Compal Secret Data Security Classification 2005/05/09 Issued Date 2006/03/08 Deciphered Date Title Compal Electronics inc SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC C BTO Option Table PCB Revision UMA DISCRETE B EC SM Bus1 address V AD_BID max V 0.289 V 0.538 V 0.875 V 1.264 V 1.759 V 2.341 V 3.300 V BOARD ID Table Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF Device 3.3V +/- 5% 100K +/- 5% Rb / Rd / Rf 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% NC Size Document Number Custom 401411 Date: , R ev D Sheet 08, 2006 of 51 D D HTREFCLK 66MHZ NB-OSC 14.318MHZ SB460 SB-OSCIN 14.318MHZ PAIR MEM CLK REV SO-DIMM PAIR MEM CLK C NB PCIE CLK 100MHZ SB PCIE CLK 100MHZ SB-OSCIN 14.318MHZ EXTERNAL PCIE CLK 100MHZ PAIR CPU CLK 200MHZ PCI CLK1 33MHZ EC-CB714 PCI CLK2 33MHZ MINI PCI SLOT PCI CLK3 33MHZ SD CLK 48MHZ Cardbus CB714 PCI CLK4 33MHZ SB-OSCIN 14.318MHZ TP_CLK TOUCH PAD C 1394 VT6311S PCI CLK5 33MHZ CLK GEN ATHLON64 S1 CPU LAN RTL8100CL ATI SB ATI NB - RS485MC NEAR SO-DIMM PCI CLK0 33MHZ SIO CLK 14.318MHZ SUPER IO PCI EXPRESS CARD - LANE LGA638 PACKAGE PCIE CLK 100MHZ MINI CARD - LANE AZALIA_BITCLK PCIE CLK 100MHZ USB CLK 48MHZ B 25M Hz B AZALIA CODEC SD CLK 48MHZ 32.768K Hz SIO CLK 14.318MHZ 14.31818MHz A A Compal Secret Data Security Classification 2005/05/09 Issued Date 2006/10/10 Deciphered Date Compal Electronics inc SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom 401411 Date: , R ev D Sheet 08, 2006 of 51 D D C C B B A A Compal Secret Data Security Classification 2005/05/09 Issued Date 2006/10/10 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics inc SCHEMATIC, M/B LA-3121P Size Document Number Custom 401411 Date: , R ev D Sheet 08, 2006 of 51 PROCESSOR HYPERTRANSPORT INTERFACE D D VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE +1.2V_HT JP23A +1.2V_HT R38 R37 (12) (12) (12) (12) H_CLKIP1 H_CLKIN1 H_CLKIP0 H_CLKIN0 51_0402_1% 51_0402_1% (12) H_CTLIP0 (12) H_CTLIN0 L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0 T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1 H_CADOP15 H_CADON15 H_CADOP14 H_CADON14 H_CADOP13 H_CADON13 H_CADOP12 H_CADON12 H_CADOP11 H_CADON11 H_CADOP10 H_CADON10 H_CADOP9 H_CADON9 H_CADOP8 H_CADON8 H_CADOP7 H_CADON7 H_CADOP6 H_CADON6 H_CADOP5 H_CADON5 H_CADOP4 H_CADON4 H_CADOP3 H_CADON3 H_CADOP2 H_CADON2 H_CADOP1 H_CADON1 H_CADOP0 H_CADON0 H_CLKOP1 H_CLKON1 H_CLKOP0 H_CLKON0 H_CLKIP1 H_CLKIN1 H_CLKIP0 H_CLKIN0 J5 K5 J3 J2 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 L0_CLKOUT_H0 L0_CLKOUT_L0 Y4 Y3 Y1 W1 H_CTLIP1 H_CTLIN1 P3 P4 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLOUT_H1 L0_CTLOUT_L1 T5 R5 H_CTLIP0 H_CTLIN0 N1 P1 L0_CTLIN_H0 L0_CTLOUT_H0 L0_CTLIN_L0 L0_CTLOUT_L0 FOX_PZ63823-284S-41F R2 R3 B H_CTLOP0 H_CTLON0 H_CADOP15 (12) H_CADON15 (12) H_CADOP14 (12) H_CADON14 (12) H_CADOP13 (12) H_CADON13 (12) H_CADOP12 (12) H_CADON12 (12) H_CADOP11 (12) H_CADON11 (12) H_CADOP10 (12) H_CADON10 (12) H_CADOP9 (12) H_CADON9 (12) H_CADOP8 (12) H_CADON8 (12) H_CADOP7 (12) H_CADON7 (12) H_CADOP6 (12) H_CADON6 (12) H_CADOP5 (12) H_CADON5 (12) H_CADOP4 (12) H_CADON4 (12) H_CADOP3 (12) H_CADON3 (12) H_CADOP2 (12) H_CADON2 (12) H_CADOP1 (12) H_CADON1 (12) H_CADOP0 (12) H_CADON0 (12) H_CLKOP1 H_CLKON1 H_CLKOP0 H_CLKON0 +5VS L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0 FAN Conn U1 +5VS +VCC_FAN1 (28) EN_DFAN1 EN_DFAN1 VEN VIN VO VSET GND GND GND GND D3 CH355PT_SOD323 W=40mils +VCC_FAN1 N5 P5 M3 M4 L5 M5 K3 K4 H3 H4 G5 H5 F3 F4 E5 F5 N3 N2 L1 M1 L3 L2 J1 K1 G1 H1 G3 G2 E1 F1 E3 E2 FAN1 G993P1U_SOP8L C83 H_CADIP15 H_CADIN15 H_CADIP14 H_CADIN14 H_CADIP13 H_CADIN13 H_CADIP12 H_CADIN12 H_CADIP11 H_CADIN11 H_CADIP10 H_CADIN10 H_CADIP9 H_CADIN9 H_CADIP8 H_CADIN8 H_CADIP7 H_CADIN7 H_CADIP6 H_CADIN6 H_CADIP5 H_CADIN5 H_CADIP4 H_CADIN4 H_CADIP3 H_CADIN3 H_CADIP2 H_CADIN2 H_CADIP1 H_CADIN1 H_CADIP0 H_CADIN0 C47 10U_0805_10V4Z 10U_0805_10V4Z 1000P_0402_50V7K C D4 1N4148_SOT23 C90 C H_CADIP15 H_CADIN15 H_CADIP14 H_CADIN14 H_CADIP13 H_CADIN13 H_CADIP12 H_CADIN12 H_CADIP11 H_CADIN11 H_CADIP10 H_CADIN10 H_CADIP9 H_CADIN9 H_CADIP8 H_CADIN8 H_CADIP7 H_CADIN7 H_CADIP6 H_CADIN6 H_CADIP5 H_CADIN5 H_CADIP4 H_CADIN4 H_CADIP3 H_CADIN3 H_CADIP2 H_CADIN2 H_CADIP1 H_CADIN1 H_CADIP0 H_CADIN0 AE5 AE4 AE3 AE2 JP20 +3VS 3 GND GND (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) C455 4.7U_0805_10V4Z VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0 VLDT_A3 VLDT_A2 VLDT_A1 VLDT_A0 R34 10K_0402_5% D4 D3 D2 D1 C92 1000P_0402_50V7K ACES_85205-03001 (28) FAN_SPEED1 (12) (12) (12) (12) H_CTLOP0 (12) H_CTLON0 (12) B Athlon 64 S1 Processor Socket +1.2V_HT C164 C156 C158 C163 2 2 4.7U_0805_10V4Z 0.22U_0402_10V4Z 4.7U_0805_10V4Z 0.22U_0402_10V4Z C145 180P_0402_50V8J 2 C152 180P_0402_50V8J LAYOUT: Place bypass cap on topside of board NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS A A Compal Secret Data Security Classification 2005/05/09 Issued Date 2006/10/11 Deciphered Date Compal Electronics inc SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom 401411 Date: , R ev D Sheet 08, 2006 of 51 A B C D E Processor DDR2 Memory Interface JP23C (11) DDR_B_D[63 0] +1.8V +0.9VREF_CPU +0.9V JP23B VTT_SENSE TP3 M_ZN M_ZP PLACE THEM CLOSE TO CPU WITHIN 1" Y10 AE10 AF10 10:8:10:8:10 R22 39.2_0402_1%~D 2 PAD (10) (10) (10) (10) DDR_CS3_DIMMA# DDR_CS2_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMA# (11) (11) (11) (11) DDR_CS3_DIMMB# DDR_CS2_DIMMB# DDR_CS1_DIMMB# DDR_CS0_DIMMB# (11) DDR_CKE1_DIMMB (11) DDR_CKE0_DIMMB (10) DDR_CKE1_DIMMA (10) DDR_CKE0_DIMMA (10) DDR_A_MA[15 0] DDR_CS3_DIMMA# DDR_CS2_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMA# M_VREF VTT_SENSE M_ZN M_ZP VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10 DDR_A_CLK2 DDR_A_CLK#2 DDR_A_CLK1 DDR_A_CLK#1 V19 J22 V22 T19 MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0 MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1 Y16 AA16 E16 F16 DDR_CS3_DIMMB# Y26 DDR_CS2_DIMMB# J24 DDR_CS1_DIMMB# W24 DDR_CS0_DIMMB# U23 MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0 MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1 AF18 DDR_B_CLK2 AF17 DDR_B_CLK#2 A17 DDR_B_CLK1 A18 DDR_B_CLK#1 DDR_B_CLK2 (11) DDR_B_CLK#2 (11) DDR_B_CLK1 (11) DDR_B_CLK#1 (11) DDR_CKE1_DIMMB DDR_CKE0_DIMMB DDR_CKE1_DIMMA DDR_CKE0_DIMMA H26 J23 J20 J21 MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0 MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0 W23 W26 V20 U19 DDR_B_ODT1 DDR_B_ODT0 DDR_A_ODT1 DDR_A_ODT0 DDR_A_MA15 DDR_A_MA14 DDR_A_MA13 DDR_A_MA12 DDR_A_MA11 DDR_A_MA10 DDR_A_MA9 DDR_A_MA8 DDR_A_MA7 DDR_A_MA6 DDR_A_MA5 DDR_A_MA4 DDR_A_MA3 DDR_A_MA2 DDR_A_MA1 DDR_A_MA0 K19 K20 V24 K24 L20 R19 L19 L22 L21 M19 M20 M24 M22 N22 N21 R21 MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0 MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10 MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0 J25 J26 W25 L23 L25 U25 L24 M26 L26 N23 N24 N25 N26 P24 P26 T24 DDR_B_MA15 DDR_B_MA14 DDR_B_MA13 DDR_B_MA12 DDR_B_MA11 DDR_B_MA10 DDR_B_MA9 DDR_B_MA8 DDR_B_MA7 DDR_B_MA6 DDR_B_MA5 DDR_B_MA4 DDR_B_MA3 DDR_B_MA2 DDR_B_MA1 DDR_B_MA0 DDR_A_BS#2 DDR_A_BS#1 DDR_A_BS#0 K22 R20 T22 MA_BANK2 MA_BANK1 MA_BANK0 MB_BANK2 MB_BANK1 MB_BANK0 K26 DDR_B_BS#2 T26 DDR_B_BS#1 U26 DDR_B_BS#0 DDR_B_BS#2 (11) DDR_B_BS#1 (11) DDR_B_BS#0 (11) DDR_A_RAS# DDR_A_CAS# DDR_A_WE# T20 U20 U21 MB_RAS_L MB_CAS_L MB_WE_L U24 DDR_B_RAS# V26 DDR_B_CAS# U22 DDR_B_WE# DDR_B_RAS# (11) DDR_B_CAS# (11) DDR_B_WE# (11) (10) DDR_A_BS#2 (10) DDR_A_BS#1 (10) DDR_A_BS#0 (10) DDR_A_RAS# (10) DDR_A_CAS# (10) DDR_A_WE# MA_RAS_L MA_CAS_L MA_WE_L FOX_PZ63823-284S-41F Athlon 64 S1 Processor Socket DDR_A_CLK2 DDR_B_ODT1 (11) DDR_B_ODT0 (11) DDR_A_ODT1 (10) DDR_A_ODT0 (10) DDR_B_MA[15 0] (11) (11) DDR_B_DM[7 0] DDR_B_CLK2 DDR_A_CLK#2 C66 1.5P_0402_50V8C DDR_B_CLK#2 DDR_A_CLK1 C35 1.5P_0402_50V8C DDR_B_CLK1 DDR_A_CLK#1 C132 1.5P_0402_50V8C DDR_B_CLK#1 PLACE CLOSE TO PROCESSOR WITHIN 1.2 INCH DDR_A_CLK2 (10) DDR_A_CLK#2 (10) DDR_A_CLK1 (10) DDR_A_CLK#1 (10) To reverse SODIMM socket W17 R13 39.2_0402_1%~D C173 1.5P_0402_50V8C PLACE CLOSE TO PROCESSOR WITHIN 1.2 INCH (11) (11) (11) (11) (11) (11) (11) (11) (11) (11) (11) (11) (11) (11) (11) (11) DDR_B_DQS7 DDR_B_DQS#7 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS0 DDR_B_DQS#0 DDR_B_D63 DDR_B_D62 DDR_B_D61 DDR_B_D60 DDR_B_D59 DDR_B_D58 DDR_B_D57 DDR_B_D56 DDR_B_D55 DDR_B_D54 DDR_B_D53 DDR_B_D52 DDR_B_D51 DDR_B_D50 DDR_B_D49 DDR_B_D48 DDR_B_D47 DDR_B_D46 DDR_B_D45 DDR_B_D44 DDR_B_D43 DDR_B_D42 DDR_B_D41 DDR_B_D40 DDR_B_D39 DDR_B_D38 DDR_B_D37 DDR_B_D36 DDR_B_D35 DDR_B_D34 DDR_B_D33 DDR_B_D32 DDR_B_D31 DDR_B_D30 DDR_B_D29 DDR_B_D28 DDR_B_D27 DDR_B_D26 DDR_B_D25 DDR_B_D24 DDR_B_D23 DDR_B_D22 DDR_B_D21 DDR_B_D20 DDR_B_D19 DDR_B_D18 DDR_B_D17 DDR_B_D16 DDR_B_D15 DDR_B_D14 DDR_B_D13 DDR_B_D12 DDR_B_D11 DDR_B_D10 DDR_B_D9 DDR_B_D8 DDR_B_D7 DDR_B_D6 DDR_B_D5 DDR_B_D4 DDR_B_D3 DDR_B_D2 DDR_B_D1 DDR_B_D0 AD11 AF11 AF14 AE14 Y11 AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24 G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11 MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0 DDR_B_DM7 DDR_B_DM6 DDR_B_DM5 DDR_B_DM4 DDR_B_DM3 DDR_B_DM2 DDR_B_DM1 DDR_B_DM0 AD12 AC16 AE22 AB26 E25 A22 B16 A12 MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0 DDR_B_DQS7 DDR_B_DQS#7 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS0 DDR_B_DQS#0 AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26 F26 E26 A24 A23 D16 C16 C12 B12 MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0 MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10 MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0 AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12 DDR_A_D63 DDR_A_D62 DDR_A_D61 DDR_A_D60 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56 DDR_A_D55 DDR_A_D54 DDR_A_D53 DDR_A_D52 DDR_A_D51 DDR_A_D50 DDR_A_D49 DDR_A_D48 DDR_A_D47 DDR_A_D46 DDR_A_D45 DDR_A_D44 DDR_A_D43 DDR_A_D42 DDR_A_D41 DDR_A_D40 DDR_A_D39 DDR_A_D38 DDR_A_D37 DDR_A_D36 DDR_A_D35 DDR_A_D34 DDR_A_D33 DDR_A_D32 DDR_A_D31 DDR_A_D30 DDR_A_D29 DDR_A_D28 DDR_A_D27 DDR_A_D26 DDR_A_D25 DDR_A_D24 DDR_A_D23 DDR_A_D22 DDR_A_D21 DDR_A_D20 DDR_A_D19 DDR_A_D18 DDR_A_D17 DDR_A_D16 DDR_A_D15 DDR_A_D14 DDR_A_D13 DDR_A_D12 DDR_A_D11 DDR_A_D10 DDR_A_D9 DDR_A_D8 DDR_A_D7 DDR_A_D6 DDR_A_D5 DDR_A_D4 DDR_A_D3 DDR_A_D2 DDR_A_D1 DDR_A_D0 MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0 Y13 AB16 Y19 AC24 F24 E19 C15 E12 DDR_A_DM7 DDR_A_DM6 DDR_A_DM5 DDR_A_DM4 DDR_A_DM3 DDR_A_DM2 DDR_A_DM1 DDR_A_DM0 MA_DQS_H7 MA_DQS_L7 MA_DQS_H6 MA_DQS_L6 MA_DQS_H5 MA_DQS_L5 MA_DQS_H4 MA_DQS_L4 MA_DQS_H3 MA_DQS_L3 MA_DQS_H2 MA_DQS_L2 MA_DQS_H1 MA_DQS_L1 MA_DQS_H0 MA_DQS_L0 W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13 DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS0 DDR_A_DQS#0 DDR_A_D[63 0] (10) To normal SODIMM socket VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE DDR_A_DM[7 0] (10) DDR_A_DQS7 (10) DDR_A_DQS#7 (10) DDR_A_DQS6 (10) DDR_A_DQS#6 (10) DDR_A_DQS5 (10) DDR_A_DQS#5 (10) DDR_A_DQS4 (10) DDR_A_DQS#4 (10) DDR_A_DQS3 (10) DDR_A_DQS#3 (10) DDR_A_DQS2 (10) DDR_A_DQS#2 (10) DDR_A_DQS1 (10) DDR_A_DQS#1 (10) DDR_A_DQS0 (10) DDR_A_DQS#0 (10) FOX_PZ63823-284S-41F Athlon 64 S1 Processor Socket A1 A26 +1.8V Athlon 64 S1g1 R33 1K_0402_1% uPGA638 +0.9VREF_CPU Top View CPU_VREF_REF C32 C33 C34 1 2 C29 C28 AF1 R23 1K_0402_1% 1000P_0402_50V7K 0.1U_0402_16V4Z 1U_0402_6.3V4Z 1 1000P_0402_50V7K 1000P_0402_50V7K VDD_VREF_SUS_CPU Compal Secret Data Security Classification LAYOUT:PLACE CLOSE TO CPU Issued Date 2005/05/09 Deciphered Date 2006/10/11 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title Compal Electronics inc SCHEMATIC, M/B LA-3121P Size Document Number Custom 401411 Date: , Rev D 08, 2006 Sheet E of 51 ATHLON Control and Debug +1.8V LAYOUT: ROUTE VDDA TRACE APPROX 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG R7 300_0402_5% +2.5VS C506 + FCM2012C-800_0805 150U_D2_6.3VM C189 4.7U_0805_10V4Z D F8 F9 C187 0.22U_0603_16V7K R372 C136 3300P_0402_50V7K 300_0402_5% R582 R583 +1.8VS R584 R585 (18) CPU_SIC (18) CPU_SID CPU_HT_RESET# CPU_ALL_PWROK CPU_LDTSTOP# CPU_SIC_R CPU_SID_R @ 0_0402_5% @ 0_0402_5% R36 R35 +1.2V_HT 12/22 Modify @ 300_0402_5% @ 300_0402_5% 1 1 44.2_0603_1% 44.2_0603_1% CPU_HTREF1 CPU_HTREF0 B7 A7 F10 RESET_L PWROK LDTSTOP_L AF4 AF5 SIC SID P6 R6 HTREF1 HTREF0 F6 E6 VDD_FB_H VDD_FB_L 5:10 +3VS +1.8V R64 4.7K_0402_5% R63 300_0402_5% CPU_ALL_PWROK 0_0402_5% (17) CPUCLK# R543 0_0402_5% @ C5021 TP2 TP1 W9 Y9 CPU_CLKIN_SC_P CPU_CLKIN_SC_N NC7SZ08P5X_NL_SC70-5 A R70 G (18,19) CPU_PWRGD Y C5011 3900P_0402_50V7K R389 169_0402_1% P B (17) CPUCLK U5 2 PAD PAD C147 0.1U_0402_16V4Z 2 place them to CPU within 1" @ CPU_VCC_SENSE CPU_VSS_SENSE (48) CPU_VCC_SENSE (48) CPU_VSS_SENSE +1.8VS A9 A8 C R544 0_0402_5% TEST24 TEST23 TEST22 TEST21 TEST20 AE7 AD7 AE8 AB8 AF7 C3 AA6 W7 W8 Y6 AB6 TEST7 TEST6 THERMDC THERMDA TEST3 TEST2 TEST28_H TEST28_L TEST27 TEST26 TEST10 TEST8 J7 H8 AF8 AE6 K8 C4 P20 P19 N20 N19 RSVD0 RSVD1 RSVD2 RSVD3 +1.8VS R71 300_0402_5% +1.8V R82 (18) LDT_RST# SB_PWROK_R 0_0402_5% LDT_RST# DBREQ_L E10 CPU_DBREQ# TDO AE9 CPU_TDO C282 0.1U_0402_16V4Z U6 B P 1 A G (19,37) SB_PWROK Y R65 CPU_HT_RESET# 0_0402_5% R26 R25 P22 R22 NC7SZ08P5X_NL_SC70-5 R545 0_0402_5% PSI# (48) CLKIN_H CLKIN_L TEST29_H TEST29_L 10:10 D (48) (48) (48) (48) (48) (48) VDDIO_FB_H VDDIO_FB_L TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12 CPU_THERMDC CPU_THERMDA @ CPU_PRESENT# PSI# E9 E8 G9 H10 AA7 C2 D7 E7 F7 C7 AC8 CPU_LDTSTOP# 0_0402_5% VID5 VID4 VID3 VID2 VID1 VID0 A3 TMS TCK TRST_L TDI NC7SZ08P5X_NL_SC70-5 A R79 G (14,19) LDT_STOP# Y R78 300_0402_5% VID5 VID4 VID3 VID2 VID1 VID0 AC6 DBRDY U8 B PSI_L AA9 AC9 AD9 AF9 P CPU_PRESENT_L A5 C6 A6 A4 C5 B5 CPU_TMS CPU_TCK CPU_TRST# CPU_TDI C155 0.1U_0402_16V4Z R88 300_0402_5% VID5 VID4 VID3 VID2 VID1 VID0 AF6 H_THERMTRIP_S# AC7 CPU_PROCHOT#_1.8 G10 CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1 +1.8V THERMTRIP_L PROCHOT_L C PU_DBRDY 3900P_0402_50V7K +1.8VS VDDA2 VDDA1 JP23D W=50mils L4 1 RSVD4 RSVD5 RSVD6 RSVD7 C9 C8 R68 80.6_0402_1% CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1" 5:5:5 RSVD8 RSVD9 H16 B18 RSVD10 RSVD11 B3 C1 RSVD12 RSVD13 RSVD14 H6 G6 D5 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 R24 W18 R23 AA8 H18 H19 CPU_TEST21_SCANEN C CPU_TEST26_BURNIN# @ FOX_PZ63823-284S-41F AMD NPT S1 SOCKET Processor Socket 1 2 2 R3 10K_0402_5% 2 H_THERMTRIP_S# G 3V_LDT_RST# 1K_0402_5% R5 300_0402_5% R572 220_0402_5% R2 @ 1K_0402_5% +3VALW +3VS +3VALW R4 Q3 1H_THERMTRIP# MMBT3904_SOT23 Q2 @ MMBT3904_SOT23 MAINPWON (42,43,45) H_THERMTRIP# (19) CPU_HT_RESET# Q33 SAMTEC_ASP-68200-07 @ @ 2N7002_SOT23 +1.8V CPU_TEST26_BURNIN# R366 CPU_PRESENT# R369 CPU_TEST25_H_BYPASSCLK_H R47 300_0402_5% 1K_0402_5% 510_0402_5% +1.8V NOTE: HDT TERMINATION IS REQUIRED FOR REV Ax SILICON ONLY 10 12 14 16 18 20 22 24 26 S R365 1@ 220_0402_5% B 11 13 15 17 19 21 23 D R364 1@ 220_0402_5% +3VALW +1.8V JP4 R363 1@ 220_0402_5% +1.8V +1.8V R362 1@ 220_0402_5% HDT Connector @ R361 1@ 220_0402_5% CPU_DBREQ# C PU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO B +1.8V +3VS R8 +3VS D+ VDD1 CPU_THERMDC D- ALERT# THERM# GND EC_SMB_CK2 SCLK EC_SMB_DA2 SDATA 300_0402_5% 510_0402_5% 300_0402_5% 300_0402_5% Q4 R6 4.7K_0402_5% @ A CPU_PROCHOT#_1.8 MMBT3904_SOT23 EC_THERM# (19,28) C (28) EC_SMB_DA2 CPU_THERMDA 2 2 E (28) EC_SMB_CK2 R368 R54 R92 R91 2200P_0402_50V7K CPU_TEST21_SCANEN CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1 B U38 A R374 @ 10K_0402_5% 0.1U_0402_16V4Z 2 C454 C451 1 CPU_PH_G 10K_0402_5% ADM1032ARM_RM8 Compal Secret Data Security Classification U4524 CLOSE CPU, CPU_THERMDA&CPU_THERMDC PLACE CLOSE TO PROCESSOR WITHIN 1" INCH Issued Date 2005/05/09 Deciphered Date 2006/03/08 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc SCHEMATIC, M/B LA-3121P Size C Document Number Date: , Rev D 401411 10, 2006 Sheet of 51 +CPU_CORE 1 1 + C505 + C504 + C453 + C452 @ @ 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9 2 2 D D +CPU_CORE +CPU_CORE 10U_0805_10V6M 10U_0805_10V6M 10U_0805_10V6M 1 1 1 C17 C194 C193 C192 C97 C16 C195 + 10U_0805_10V6M 2 10U_0805_10V6M C AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 +CPU_CORE VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25 +1.8V FOX_PZ63823-284S-41F Athlon 64 S1 Processor Socket B VSS1 VSS66 VSS2 VSS67 VSS3 VSS68 VSS4 VSS69 VSS5 VSS70 VSS6 VSS71 VSS7 VSS72 VSS8 VSS73 VSS9 VSS74 VSS10 VSS75 VSS11 VSS76 VSS12 VSS77 VSS13 VSS78 VSS14 VSS79 VSS15 VSS80 VSS16 VSS81 VSS17 VSS82 VSS18 VSS83 VSS19 VSS84 VSS20 VSS85 VSS21 VSS86 VSS22 VSS87 VSS23 VSS88 VSS24 VSS89 VSS25 VSS90 VSS26 VSS91 VSS27 VSS92 VSS28 VSS93 VSS29 VSS94 VSS30 VSS95 VSS31 VSS96 VSS32 VSS97 VSS33 VSS98 VSS34 VSS99 VSS35 VSS100 VSS36 VSS101 VSS37 VSS102 VSS38 VSS103 VSS39 VSS104 VSS40 VSS105 VSS41 VSS106 VSS42 VSS107 VSS43 VSS108 VSS44 VSS109 VSS45 VSS110 VSS46 VSS111 VSS47 VSS112 VSS48 VSS113 VSS49 VSS114 VSS50 VSS115 VSS51 VSS116 VSS52 VSS117 VSS53 VSS118 VSS54 VSS119 VSS55 VSS120 VSS56 VSS121 VSS57 VSS122 VSS58 VSS123 VSS59 VSS124 VSS60 VSS125 VSS61 VSS126 VSS62 VSS127 VSS63 VSS128 VSS64 VSS129 VSS65 FOX_PZ63823-284S-41F 2 + C450 820U_E9_2.5V_M_R7 45@ C449 820U_E9_2.5V_M_R7 45@ CPU SOCKET S1 DECOUPLING JP23F +CPU_CORE JP23E AC4 VDD1 AD2 VDD2 G4 VDD3 H2 VDD4 J9 VDD5 J11 VDD6 J13 VDD7 K6 VDD8 K10 VDD9 K12 VDD10 K14 VDD11 L4 VDD12 L7 VDD13 L9 VDD14 L11 VDD15 L13 VDD16 M2 VDD17 M6 VDD18 M8 VDD19 M10 VDD20 N7 VDD21 N9 VDD22 N11 VDD23 P8 VDD24 P10 VDD25 R4 VDD26 R7 VDD27 R9 VDD28 R11 VDD29 T2 VDD30 T6 VDD31 T8 VDD32 T10 VDD33 T12 VDD34 T14 VDD35 U7 VDD36 U9 VDD37 U11 VDD38 U13 VDD39 V6 VDD40 V8 VDD41 V10 VDD42 2 10U_0805_10V6M 10U_0805_10V6M J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 +CPU_CORE C73 22U_0805_6.3V6M C76 22U_0805_6.3V6M C86 10U_0805_10V6M C118 22U_0805_6.3V6M C109 10U_0805_10V6M +CPU_CORE 2 C96 10U_0805_10V6M C89 10U_0805_10V6M C113 10U_0805_10V6M C124 22U_0805_6.3V6M +1.8V C70 0.22U_0402_10V4Z C120 0.22U_0402_10V4Z C100 180P_0402_50V8J 2 C91 0.01U_0402_16V7K C82 10U_0805_10V6M C102 10U_0805_10V6M C72 0.22U_0402_10V4Z C C116 0.22U_0402_10V4Z DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE +1.8V 2 C472 4.7U_0805_10V4Z C471 4.7U_0805_10V4Z C127 0.22U_0402_10V4Z 2 C479 4.7U_0805_10V4Z C128 0.01U_0402_16V7K 2 C480 4.7U_0805_10V4Z C85 0.01U_0402_16V7K C104 0.22U_0402_10V4Z 1 C68 180P_0402_50V8J 2 C84 0.22U_0402_10V4Z C129 0.22U_0402_10V4Z B C105 180P_0402_50V8J +0.9V Athlon 64 S1 Processor Socket 2 A1 C188 4.7U_0805_10V4Z C30 4.7U_0805_10V4Z C39 1000P_0402_50V7K 2 C36 4.7U_0805_10V4Z C41 1000P_0402_50V7K 2 C181 4.7U_0805_10V4Z C178 1000P_0402_50V7K 2 C184 0.22U_0402_10V4Z C22 1000P_0402_50V7K C185 0.22U_0402_10V4Z C27 0.22U_0402_10V4Z C23 0.22U_0402_10V4Z 1 1 C179 180P_0402_50V8J C26 180P_0402_50V8J C175 180P_0402_50V8J C182 180P_0402_50V8J A26 Athlon 64 S1g1 uPGA638 Top View PROCESSOR POWER AND GROUND A A AF1 Compal Secret Data Security Classification Issued Date 2005/05/09 Deciphered Date 2006/03/08 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics inc SCHEMATIC, M/B LA-3121P Size C Date: Document Number Rev D 401411 , 10, 2006 Sheet of 51 +DIMM_VREF DDR_A_D2 DDR_A_D3 DDR_A_D8 DDR_A_D9 DDR_A_DQS#1 DDR_A_DQS1 4.7U_0805_10V4Z + C477 220U_D2_4VM_R15 C58 C463 4.7U_0805_10V4Z C57 C473 2 2 1 C636 + 2 150U_D2_6.3VM C51 C101 C65 C45 C88 C74 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_A_BS#0 DDR_A_WE# DDR_A_DQS#5 DDR_A_DQS5 DDR_A_CAS# DDR_CS1_DIMMA# DDR_A_D46 DDR_A_D47 DDR_A_ODT1 R32 DDR_CS3_DIMMA# R28 DDR_A_D52 DDR_A_D53 DDR_A_MA15 DDR_CKE1_DIMMA 47_0404_4P2R_5% DDR_A_MA7 DDR_A_MA14 47_0404_4P2R_5% DDR_A_MA6 DDR_A_MA11 47_0404_4P2R_5% DDR_A_MA2 DDR_A_MA4 47_0404_4P2R_5% DDR_A_BS#1 DDR_A_MA0 47_0404_4P2R_5% DDR_CS0_DIMMA# DDR_A_RAS# 47_0404_4P2R_5% DDR_A_MA13 DDR_A_ODT0 47_0404_4P2R_5% RP22 RP17 RP14 RP10 RP6 RP2 RP1 +0.9V 2 2 2 2 C623 C622 C621 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_A_DQS#7 DDR_A_DQS7 C620 DDR_A_D60 DDR_A_D61 0.1U_0402_16V4Z DDR_A_D54 DDR_A_D55 B +1.8V 0.1U_0402_16V4Z DDR_A_CLK2 (7) DDR_A_CLK#2 (7) DDR_A_DM6 A Layout Note: Place one 0.1uF cap close to every pullup resistors terminated to +0.9V DDR_A_D62 DDR_A_D63 Compal Secret Data Security Classification 2005/05/09 2006/10/11 Deciphered Date Title Compal Electronics inc SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC 4.7U_0805_10V4Z DDR_A_MA1 DDR_A_MA10 DDR_A_D44 DDR_A_D45 47_0404_4P2R_5% 47_0404_4P2R_5% 47_0404_4P2R_5% 47_0404_4P2R_5% 47_0404_4P2R_5% 47_0404_4P2R_5% 47_0404_4P2R_5% 47_0402_1% 47_0402_1% C56 0.1U_0402_16V4Z 4.7U_0805_10V4Z DDR_A_MA5 DDR_A_MA3 10K_0402_5% 10K_0402_5% 0.1U_0402_16V4Z DDR_A_DM4 1 C69 DDR_A_MA9 DDR_A_MA8 Issued Date P-TWO_A5692C-A0G16 C55 C448 DDR_CS3_DIMMA# (7) DDR_A_D38 DDR_A_D39 R12 R10 0.1U_0402_16V4Z 1 RP28 RP25 RP21 RP18 RP13 RP9 RP5 1 DDR_A_BS#2 DDR_A_MA12 DDR_A_D36 DDR_A_D37 DDR_A_CLK2 DDR_A_CLK#2 C619 SB_CK_SDAT SB_CK_SCLK +3VS DDR_CS3_DIMMA# DDR_CKE0_DIMMA DDR_CS2_DIMMA# DDR_A_ODT0 (7) C618 (11,17,19,31,34) SB_CK_SDAT (11,17,19,31,34) SB_CK_SCLK DDR_A_ODT0 DDR_A_MA13 0.1U_0402_16V4Z DDR_A_D58 DDR_A_D59 1 +0.9V DDR_A_BS#1 (7) DDR_A_RAS# (7) DDR_CS0_DIMMA# (7) C617 A Layout Note: Place one cap close to every pullup resistors terminated to +0.9V DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA# 0.1U_0402_16V4Z DDR_A_DM7 DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 C616 DDR_A_D56 DDR_A_D57 0.1U_0402_16V4Z DDR_A_D50 DDR_A_D51 0.1U_0402_16V4Z DDR_A_DQS#6 DDR_A_DQS6 C475 DDR_A_D48 DDR_A_D49 4.7U_0805_10V4Z DDR_A_D42 DDR_A_D43 C95 DDR_A_DM5 0.1U_0402_16V4Z DDR_A_D40 DDR_A_D41 4.7U_0805_10V4Z DDR_A_D34 DDR_A_D35 DDR_A_MA15 DDR_A_MA14 C107 DDR_A_DQS#4 DDR_A_DQS4 DDR_CKE1_DIMMA (7) 0.1U_0402_16V4Z B C98 DDR_A_D32 DDR_A_D33 DDR_CKE1_DIMMA C114 DDR_A_ODT1 (7) DDR_A_ODT1 DDR_A_D30 DDR_A_D31 0.1U_0402_16V4Z DDR_A_CAS# DDR_CS1_DIMMA# C C80 (7) DDR_A_CAS# (7) DDR_CS1_DIMMA# +0.9V C71 DDR_A_MA10 DDR_A_BS#0 DDR_A_WE# (7) DDR_A_BS#0 (7) DDR_A_WE# DDR_A_DQS#3 DDR_A_DQS3 0.1U_0402_16V4Z DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 DDR_A_DQS#[0 7] C67 DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_A_MA[0 15] 0.1U_0402_16V4Z DDR_CS2_DIMMA# DDR_A_BS#2 (7) DDR_A_DQS#[0 7] C63 (7) DDR_CS2_DIMMA# (7) DDR_A_BS#2 DDR_A_D28 DDR_A_D29 DDR_A_DQS[0 7] (7) DDR_A_DQS[0 7] (7) DDR_A_MA[0 15] 0.1U_0402_16V4Z (7) DDR_CKE0_DIMMA DDR_CKE0_DIMMA (7) DDR_A_DM[0 7] DDR_A_D22 DDR_A_D23 DDR_A_DM[0 7] 0.1U_0402_16V4Z DDR_A_D26 DDR_A_D27 DDR_A_DM2 DDR_A_D[0 63] (7) DDR_A_D[0 63] 4.7U_0805_10V4Z DDR_A_DM3 +1.8V DDR_A_CLK1 (7) DDR_A_CLK#1 (7) DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D21 D R397 C77 C C652 0.22U_0603_16V7K 2 2 2 2 2 2 2 C639 C641 C643 C645 C647 C649 C651 4.7U_0805_6.3V6K4.7U_0805_6.3V6K0.01U_0402_16V7K10P_0402_25V8K 0.22U_0603_16V7K0.22U_0603_16V7K0.22U_0603_16V7K 1K_0402_1% DDR_A_DM1 DDR_A_CLK1 DDR_A_CLK#1 1K_0402_1% 4.7U_0805_10V4Z DDR_A_D24 DDR_A_D25 VSS DQ20 DQ21 VSS NC DM2 VSS DQ22 DQ23 VSS DQ28 DQ29 VSS DQS3# DQS3 VSS DQ30 DQ31 VSS NC/CKE1 VDD NC/A15 NC/A14 VDD A11 A7 A6 VDD A4 A2 A0 VDD BA1 RAS# S0# VDD ODT0 NC/A13 VDD NC VSS DQ36 DQ37 VSS DM4 VSS DQ38 DQ39 VSS DQ44 DQ45 VSS DQS5# DQS5 VSS DQ46 DQ47 VSS DQ52 DQ53 VSS CK1 CK1# VSS DM6 VSS DQ54 DQ55 VSS DQ60 DQ61 VSS DQS7# DQS7 VSS DQ62 DQ63 VSS SAO SA1 DDR_A_D12 DDR_A_D13 C62 DDR_A_D18 DDR_A_D19 VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 NC VSS DQ26 DQ27 VSS CKE0 VDD NC BA2 VDD A12 A9 A8 VDD A5 A3 A1 VDD A10/AP BA0 WE# VDD CAS# NC/S1# VDD NC/ODT1 VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS NC,TEST VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SDA SCL VDDSPD DDR_A_D6 DDR_A_D7 C470 DDR_A_DQS#2 DDR_A_DQS2 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 DDR_A_DM0 4.7U_0805_10V4Z DDR_A_D16 DDR_A_D17 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 DDR_A_D4 DDR_A_D5 4.7U_0805_10V4Z DDR_A_D10 DDR_A_D11 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS DQ12 DQ13 VSS DM1 VSS CK0 CK0# VSS DQ14 DQ15 VSS C640 C642 C644 C646 C648 C650 4.7U_0805_6.3V6K4.7U_0805_6.3V6K0.01U_0402_16V7K10P_0402_25V8K 0.22U_0603_16V7K0.22U_0603_16V7K 1 1 1 1 1 1 R398 DDR_A_DQS#0 DDR_A_DQS0 VREF VSS DQ0 DQ1 VSS DQS0# DQS0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS 4.7U_0805_10V4Z D 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 +1.8V C503 DDR_A_D0 DDR_A_D1 C507 0.1U_0402_16V4Z JP19 +1.8V +1.8V +1.8V Size Document Number Custom 401411 Date: , Rev D Sheet 10, 2006 10 of 51 A B +3VS +3VALW +3VALW U10B SN74LVC14APWR_TSSOP14 C203 1U_0603_10V4Z I C204 1U_0805_25V4Z I 14 I SB_PWROK (8,19) +3V POWER R105 100K_0402_5% @ R108 10_0402_5% NB_PWROK (14) U10D SN74LVC14APWR_TSSOP14 O I O G R109 10_0402_5% @ G 13 P P 14 2006/02/22 Change R100 to 47K O 10 +3V POWER +3VALW 14 +3VALW P 14 11 7 O +3V POWER G I G U10F SN74LVC14APWR_TSSOP14 R104 10_0402_5% O 12 P O +3V POWER U10E SN74LVC14APWR_TSSOP14 P R112 100K_0402_1% I G 1 R106 10K_0402_5% E +3VALW 14 14 U10A SN74LVC14APWR_TSSOP14 G VLDT_EN (28) VLDT_EN D5 1N4148_SOT23 R100 47K_0402_1% D R111 10K_0402_5% @ P +3VALW @ +3VALW Power ON Circuit C @ R113 180K_0402_5% U10C SN74LVC14APWR_TSSOP14 note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms, SUSP# goes to low after SB_PWRGD goes to low for power down T1 2 VLDT_EN NB_PWRGD SB_PWRGD T2 SUSP# +1.8VS TOP Side JOPEN JOPEN +3VALW Power Button J3 J4 R281 Bottom Side 100K_0402_5% D10 ON/OFFBTN# (38) ON/OFFBTN# ON/OFF (28) 51ON# 3 51ON# (42) CHN202UPT_SC70 RD 11/2 Modify EC_ON G R290 10K_0402_5% S C358 1000P_0402_50V7K D11 RLZ20A_LL34 (28) EC_ON D 2N7002_SOT23 Q17 4 Compal Secret Data Security Classification 2005/05/09 Issued Date Deciphered Date 2006/03/08 B C Compal Electronics inc SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A Title D Size B Date: Document Number Rev D 401411 , 11, 2006 Sheet E 37 of 51 MDC Conn JP3 +5VS R538 300_0402_5% (19) AC_SYNC (19) ACZ_SDIN1 (19) AC_RST# LED5 AC _SYNC 33_0402_5% R357 AC_RST# 1 D C3 +3VALW AC_BITCLK C432 Connector for MDC Rev1.5 R331 300_0402_5% LED4 PWR_SUSP_LED# +5VALW PWR_SUSP_LED# (28) HT-110UD_1204 C435 + R332 300_0402_5% BATT_FULL_LED# +5VS BATT_FULL_LED# (28) JP2 R537 300_0402_5% (28) MEDIA_LED# (28) CAPS_LED# (28) NUM_LED# (28) E-MAIL_LED# (37) ON/OFFBTN# (28) E-MAIL_BTN# (28) IE_BTN# (28) USER_BTN# (28) EMPWR_BTN# BATT_CHGI_LED# BATT_CHGI_LED# (28) OUT GND RCIRRX (31) CVBS_IN (31) S_YIN (31) S_CIN TSOP36236TR_4P CIR@ 2 +5VS RCIRRX (28) 11 13 15 17 19 21 23 25 27 29 C615 CIR@ 1000P_0402_50V7K 10 12 14 16 18 20 22 24 26 28 30 10 12 14 16 18 20 22 24 26 28 30 31 32 33 34 35 36 Vs GND LED6 HT-110UD_1204 IR2 C614 CIR@ 4.7U_0805_10V4Z +5VALW 11 13 15 17 19 21 23 25 27 29 PWR_LED# +3VALW CIR 150U_D2_6.3VM LED2 HT-110UYG_1204 Update Part Number to SCR36236000 GND GND GND GND GND GND +5VALW C436 0.1U_0402_16V4Z To LED/B Conn 22P_0402_50V8J S +5VALW R539 100_0805_5% CIR@ AC_BITCLK (19) ACES_88018-124G 13 14 15 16 17 18 1U_0603_10V4Z 2N7002_SOT23 Q1 G 20mil +3VALW PWR_LED# HT-110UYG_1204 (28) PWR_LED 10 12 GND1 RES0 IAC_SDATA_OUT RES1 GND2 3.3V IAC_SYNC GND3 IAC_SDATA_IN GND4 IAC_RESET# IAC_BITCLK GND GND GND GND GND GND PWR_LED# 11 AC_SDOUT (19) AC_SDOUT +5VALW USB20_N4 USB20_P4 USB20_N6 USB20_P6 USB20_N4 (19) USB20_P4 (19) USB20_N6 (19) USB20_P6 (19) USB_EN# (28,34) AUDIO_INL (31) AUDIO_INR (31) ACES_88018-304G Bluetooth Conn +5VS 1 LED3 HT-110UD_1204 WL_ON_LED# Q21 BT@ SI2301BDS_SOT23 WL_ON_LED# (28) BT_ON_LED# (28) +BT_VCC L65 USB20_P5 (19) USB20_N5 USB20_N5 BT@ WCM2012F2S-900T04_0805 2 JP31 USB20_P5_R USB20_N5_R (31) WLAN_BT_DATA (31) WLAN_BT_CLK D BT_ON_LED# C395 BT@ 1U_0603_10V4Z (19) USB20_P5 (28) BT_ON# R564 100K_0402_5% BT@ G LED1 HT-110NBQA_BULE_1204 C634 0.1U_0402_16V4Z @ 2 300_0402_5% R329 300_0402_5% R330 S +3VALW W=40mils ACES_87212-0800 BT@ +BT_VCC 2005/09/12 1 2 2 3 3 4 4 SW8 HSS110_4P BTSW_EN# (28) BTSW_EN# 2006/02/27 Added C398 BT@ 0.1U_0402_16V4Z WL_SW 6 5 BT_SW C399 BT@ 4.7U_0805_10V4Z WLSW_EN# WLSW_EN# (28) SW9 HSS110_4P Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2005/05/09 Deciphered Date 2006/06/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title SCHEMATIC, M/B LA-3121P Size B Document Number Date: , Rev D 401411 08, 2006 Sheet 38 of 51 A B C D E F G H +VDDA 28.7K for Module Design (VDDA = 4.702) +5VAMP R309 10K_0402_5% C372 1U_0603_10V4Z C 2 B E 560_0402_5% ERROR SD CNOISE GND 30K_0402_1% +VDDA SENSE or ADJ 40mil C397 10U_0805_10V4Z R313 4.85V C388 10U_0805_10V4Z 0.1U_0402_16V4Z C396 MONO_IN R312 10K_0402_1% 0.1U_0402_16V4Z 1U_0603_10V4Z Q20 R308 2SC2411K_SC59 2.4K_0402_5% C376 1U_0603_10V4Z (19) SB_SPKR R302 560_0402_5% 47K_0402_5% R300 R299 C390 C380 560_0402_5% (32) PCM_SPK# DELAY SI9182DH-AD_MSOP8 2 47K_0402_5% R295 R304 VOUT VIN D12 CH751H-40PT _SOD323 R301 10K_0402_5% 47K_0402_5% R303 2 C378 1U_0603_10V4Z BEEP# (28) L21 KC FBM-L11-201209-221LMAT_0805 R307 10K_0402_5% U34 1U_0603_10V4Z C387 (output = 250 mA) 60mil L19 KC FBM-L11-201209-221LMAT_0805 +5VS HD Audio Codec +AVDD_AC97 1 1 1 20K_0402_5% R316 @ 0_0402_5% R317 6.8K_0402_5% C394 C377 (40) MIC1_L (40) MIC1_R CD_AGND_R C379 MIC1_L C386 MIC1_R C392 2 2 2 R328 0_0603_5% 35 R606 0_0402_5% AMP_LEFT FRONT_OUT_R 36 R607 0_0402_5% AMP_RIGHT 16 MIC2_L SURR_OUT_L 39 17 MIC2_R SURR_OUT_R 41 LINE1_L SIDESURR_OUT_L 45 LINE1_R 10 SIDESURR_OUT_R 46 CD_L CEN_OUT 43 CD_R LFE_OUT 44 BIT_CLK R608 47K_0402_5% @ SDATA_IN MIC1_R R566 0_0603_5% GND 22P_0402_50V8J AZ_BITCLK (19) PCBEEP PIN37_VREFO 37 LINE1_VREFO 29 LINE2_VREFO 31 RESET# SYNC (40) NBA_PLUG GPIO0 GPIO1 SENSE A SENSE B EAPD 47 SPDIFI/EAPD SPDIF 48 MIC1_VREFO_L 28 MIC1_VREFO_R 32 MIC2_VREFO 30 SDATA_OUT VREF 27 JDREF 40 VAUX 33 AVSS1 AVSS2 26 42 R297 33_0402_5% SPDIFO DVSS1 DVSS2 DGND ACZ_SDIN0 (19) 10mil MIC1_VREFO_L MIC1_VREFO_R AC97_VREF 10mil R306 20K_0402_1% @ ALC883-LF_LQFP48 0_0603_5% R609 47K_0402_5% @ MIC1_L 13 34 AMP_RIGHT (40) 2006/02/27 Added C374 CD_GND AMP_LEFT (40) FRONT_OUT_L LINE2_R LINE2_L (40) 10U_0805_10V4Z 15 11 0_0603_5% R565 DVDD2 DVDD1 0.1U_0402_16V4Z 1 R324 (19) AZ_SDOUT (28) +3VS C369 14 2005/09/12 (19) AZ_SYNC 0_0603_5% U33 LINE_C_L 23 1U_0603_10V4Z LINE_C_R 24 1U_0603_10V4Z CD_L_RC 18 1U_0603_10V4Z C D_R_RC 20 1U_0603_10V4Z CD_AGND_RC19 1U_0603_10V4Z MIC1_C_L 21 1U_0603_10V4Z MIC1_C_R 22 1U_0603_10V4Z MONO_IN 12 (19) AZ_RST# R319 C373 LINE_R C385 R314 (23) CD_AGND (40) LINE_R 20K_0402_5% 6.8K_0402_5% CD_L_R 6.8K_0402_5% 20K_0402_5% CD_R_R (23) INT_CD_R 2 2 C375 C384 0.1U_0402_16V4Z 1 C391 10U_0805_10V4Z R310 R311 R320 R318 C393 L50 FBM-L11-160808-800LMT_0603 0.1U_0402_16V4Z LINE_L (40) LINE_L (23) INT_CD_L 38 C381 10U_0805_10V4Z 20mil 25 0.1U_0402_16V4Z 1 C389 AVDD2 L18 FBM-L11-160808-800LMT_0603 AVDD1 +VDDA 40mil AGND GNDA 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2005/05/09 2006/06/20 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D E F Title SCHEMATIC, M/B LA-3121P Size B Document Number Rev D 401411 Date: , G 08, 2006 Sheet 39 H of 51 A B C D E JP12 SPKL+ SPKLSPKR+ SPKR- +5VAMP L20 L22 L29 L30 1 1 2 2 20mil R531 FBM-11-160808-700T_0603 FBM-11-160808-700T_0603 FBM-11-160808-700T_0603 FBM-11-160808-700T_0603 SPK_L+ SPK_LSPK_R+ SPK_R- ACES_85204-0400 Speaker Conn 10K_0402_5% +5VAMP R535 100K_0402_5% (39) AMP_LEFT (39) AMP_RIGHT C610 C612 VOLMAX 0_0402_5% NBA_PLUG 1U_0603_10V4Z 1U_0603_10V4Z VOLMAX 13 SE/BTL# BYPASS 20mil NBA_PLUG (39) NBA_PLUG EC_MUTE (28) SPDIF_PLUG# Q31 SI2301BDS_SOT23 D LOUT- SPKL- 16 SPKR- LOUT+ 11 SPKL+ ROUT+ 14 SPKR+ GND GND 12 LINRINBYPASS EC_MUTE ROUT- VOLUME AMP_LEFT_C AMP_RIGHT_C SPDIF_PLUG# G Q32 2N7002_SOT23 S +5VSPDIF 20mil APA2068KAI-TRL_SOP16 MUTE SHUTDOWN# VOL_AMP R530 VDD VDD R533 100K_0402_5% 1 0.1U_0402_16V4Z 10 15 +5VAMP R536 100K_0402_5% U43 C608 2 C613 4.7U_0805_10V4Z 2 2 S C609 0.1U_0402_16V4Z 1 1 SPDIF_PLUG# Q30 G 2N7002_SOT23 @ D R532 1.5K_0402_1% +5VAMP W=40mil D R534 @ 5.1K_0402_1% +5VAMP S VOL_AMP (0.65V -> 10dB ) G C611 4.7U_0805_10V4Z C400 330P_0402_50V7K 2 1 C401 S/PDIF Out JACK 330P_0402_50V7K + C383 SPKR+ C382 + JP32 SPKL+ HPOUT_L_1 150U_D_6.3VM HPOUT_R_1 150U_D_6.3VM R321 R322 HPOUT_L_2 47_0603_5% HPOUT_R_2 47_0603_5% HPOUT_L_3 FBM-11-160808-700T_0603 HPOUT_R_3 FBM-11-160808-700T_0603 SPDIF_PLUG# +5VAMP R323 100K_0402_5% L51 FBM-L11-160808-800LMT_0603 SPDIF1 (39) SPDIF +5VSPDIF 1 L27 L28 @ C306 220P_0402_50V7K 10 01/03 Added ACES_20234-0101 LINE-IN JACK JP33 (39) LINE_R (39) LINE_L LINE_R LINE_L L26 FBM-11-160808-700T_0603 L25 FBM-11-160808-700T_0603 C402 220P_0402_50V7K LINE_R_R LINE_L_R R326 2.2K_0402_5% 2005/09/06 15mil R325 0_0402_5% 2 INT_MIC_L (39) MIC1_R (39) MIC1_L ACES_85204-0200 C404 220P_0402_50V7K 1 C405 220P_0402_50V7K SUYIN_010164FR006G118ZL Compal Electronics, Inc Compal Secret Data Security Classification 2005/05/09 Issued Date MIC1_R_1 MIC1_L_1 FBM-11-160808-700T_0603 JP34 R327 2.2K_0402_5% FBM-11-160808-700T_0603 L24 L23 MIC JACK 1 MIC1_VREFO_R JP13 SUYIN_010164FR006G118ZL C403 220P_0402_50V7K MIC1_VREFO_L Int MIC Conn 3 1 2006/06/20 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title SCHEMATIC, M/B LA-3121P Size B Document Number Date: , Rev D 401411 Sheet 08, 2006 E 40 of 51 A B C D E +1.8VALW TO +1.8V +3VALW TO +3VS +1.8V +3VS R508 100K_0402_5% 5VS_GATE 20K_0402_5% +VSB D D D D S S S G SUSP G Q29 2N7002_SOT23 1 R289 100K_0402_5% SYSON_ALW SI4856ADY-T1-E3_SO8 1 D S 10U_0805_10V4Z C119 10U_0805_10V4Z +VSB C359 0.1U_0603_25V7K D R288 @ 1M_0402_1% SYSON# G Q18 2N7002_SOT23 S C570 0.1U_0603_25V7K 10U_0805_10V4Z R500 @ 1M_0402_1% C560 2 SI4800BDY_SO8 U3 +1.8VS +3VS 12/30 Change U3 to SI4856ADY +5VS 2 R562 C122 D SUSP G Q15 2N7002_SOT23 S 3 +5VALW D SUSP G Q14 2N7002_SOT23 S +1.8VALW 1 D +5VALW TO +5VS +1.8VALW TO +1.8VS R181 470_0402_5% R270 470_0402_5% R224 470_0402_5% SUSP G Q10 2N7002_SOT23 S 2 1U_0805_25V4Z S S S G +1.8VALW D D D D 1U_0805_25V4Z C121 10U_0805_10V4Z C562 U41 C559 1 +3VALW +5VS U7 C446 SI4800BDY_SO8 4.7U_0805_10V4Z 1U_0805_25V4Z SI4800BDY_SO8 C166 4.7U_0805_10V4Z C165 +5VALW 1U_0805_25V4Z C143 4.7U_0805_10V4Z +1.8V 5VS_GATE 5VS_GATE 12/30 Change R563 to 60.4K R26 470_0402_5% C658 0.1U_0603_25V7K (46) SUSP SUSP D C632 0.1U_0603_25V7K G Q12 (28,30,34) SUSP# 1 R563 60.4K_0402_1% R167 10K_0402_5% 2 C443 4.7U_0805_10V4Z C447 S S S G 1 D D D D SYSON# G Q6 2N7002_SOT23 S D S 2N7002_SOT23 2006/2/22 Add C658 0.1uF R586 100K_0402_5% +1.8VS 3 S S S G D D D D U37 2006/4/13 modify package for lead-free part 3 12/22 Added +5VALW SYSON (28,34) SYSON S SUSP G Q35 2N7002_SOT23 R589 100K_0402_5% D S 2N7002_SOT23 S D SUSP G Q34 2N7002_SOT23 D SYSON# G Q36 2N7002_SOT23 @ 3 S 1 D G Q5 SYSON# (46) SYSON# R588 470_0402_5% 1 R587 470_0402_5% R604 470_0402_5% @ R31 10K_0402_5% +1.5VS +2.5VS 2 +0.9V Near PU12 Near PU8 4 12/22 Change Q5,Q12 to 2N7002 Compal Secret Data Security Classification 2005/05/09 Issued Date Deciphered Date 2006/03/08 B C Compal Electronics inc SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A Title D Size B Date: Document Number Rev D 401411 , 11, 2006 Sheet E 41 of 51 A B PL1 VIN PR1 10_1206_5% PR2 1K_1206_5% 2 PD1 RLZ24B_LL34 2 PR7 1K_1206_5% B+ PR4 1K_1206_5% 1 RLS4148_LLDS2 100K_0402_5% PQ1 TP0610K_SOT23 PR3 1K_1206_5% PD2 VIN PR6 560P_0402_50V7K PC4 12P_0402_50V8J PC3 12P_0402_50V8J PC2 2 PC1 560P_0402_50V7K G G 1 FBMA-L18-453215-900LMA90T_1812 PR5 ADPIN D 100K_0402_5% PJP1 SINGA_2DC-G756-I06 C VIN PD3 PR8 100K_0402_5% (28,44) ACOFF PR9 33_1206_5% PQ4 TP0610K_SOT23 VS PQ3 DTC115EUA_SC70 2 PQ2 DTC115EUA_SC70 RLS4148_LLDS2 BATT+ 1 PD4 RB751V-40TE17_SOD323-2 51ON# 3 PC6 0.1U_0603_25V7K 2 B+ PR12 2.2M_0402_5% VL (37) PR11 22K_0402_5% 2 PR10 100K_0402_5% 0.22U_1206_25V7K PC5 1 CHGRTCP PR13 499K_0402_1% ACIN RTCVREF B 2005/05/09 PC9 0.01U_0402_25V7K G PR21 47K_0402_5% PACIN (44,45) S PQ6 DTC115EUA_SC70 @ PR22 66.5K_0402_1% +5VALW 2 Deciphered Date Compal Electronics, Inc 2006/0926 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A 1 D Compal Secret Data Security Classification Issued Date PQ5 2N7002W T/R7 1N SOT-323 PR20 34K_0402_1% BATT ONLY Precharge detector Min typ Max H >L 6.138V 6.214V 6.359V L >H 7.196V 7.349V 7.505V PR19 499K_0402_1% Precharge detector Min typ Max H >L 14.589V 14.84V 15.243V L >H 15.562V 15.97V 16.388V PR18 191K_0402_1% PC10 0.1U_0603_25V7K PRG++ 2 32.3 RB715F_SOT323 - PC7 1U_0805_25V4Z + O PC11 1000P_0402_50V7K (44) ACON P GND 2 PU2A LM393DR_SO8 IN OUT 2 560_0603_5% 560_0603_5% PD5 G (8,43,45) MAINPWON PR17 2 PC8 +CHGRTC 4.7U_0805_6.3V6K PR16 PR14 100K_0402_1% PR15 200_0805_5% PU1 G920AT24U_SOT89 RTCVREF 3.3V 1 VS C Title SCHEMATIC, M/B LA-3121P Size B Document Number Date: , Rev D 401411 Sheet 11, 2006 D 42 of 51 A B C D BST5B PD6 CHP202UPT_SOT323-3 PC12 0.1U_0603_25V7K PC13 0.1U_0603_25V7K BST3B B+++ 30.6 PC18 4.7U_1206_25V6K 2 D2 G2 D2 D1/S2/K G1 D1/S2/K S1/A D1/S2/K AO4916_SO8 3HG BST3A LX3 28 26 24 27 22 PL4 10UH_SIL104R-100PF_4.4A_30% PR31 0_0603_5% PR33 499K_0402_1% PR30 100K_0402_1% 2 DL3 DH3 PC25 150U_D_6.3VM @ PR39 3.57K_0402_1% PR42 0_0402_5% (45) PR41 0_0402_5% +3VALWP PRO# GND LDO3 4.7U_0805_10V4Z 10 PR43 25 0_0402_5% 2 PC24 0.047U_0603_16V7K REF PC27 PR38 12 2VREF_19998 PZD1 PR37 RLZ5.1B_LL34 47K_0402_5% 2 23 PR35 0_0402_5% 11 PR29 100K_0402_1% 2 PC20 1U_0805_16V7K 17 LX5 DL5 ILIM5 OUT5 PU3 FB5 BST3 N.C.MAX8734AEEI+_QSOP28 DH3 DL3 SHDN# LX3 ON5 OUT3 ON3 FB3 SKIP# PGOOD PR28 0_0603_5% PQ8 PC17 2200P_0402_50V7K PR24 47_0402_5% 15 19 21 ILIM3 1 PR40 100K_0402_5% 2 PR26 DH5 VS @ + PR36 0_0402_5% PC23 150U_D_6.3VM BST5 16 PC26 0.22U_0603_16V7K PR34 10.2K_0402_1% +5VALWP PC22 0.1U_0603_25V7K 14 PR32 499K_0402_1% BST5A VCC PL3 10UH_SIL104R-100PF_4.4A_30% B+++ PC16 0.1U_0603_25V7K 2VREF_1999 TON PC21 4.7U_0805_10V4Z VL LX5 @ 13 DH5 V+ 5HG PR27 0_0603_5% 4.7_1206_5% B+++ 20 PR23 0_0603_5% AO4916_SO8 18 DL5 LD05 G2 D2 D1/S2/K D2 D1/S2/K G1 D1/S2/K S1/A PC19 PR25 1U_1206_25V7K 4.7_1206_5% 2 VL 4.7U_1206_25V6K PC15 PQ7 PC14 2200P_0402_50V7K 1 PL2 FBMA-L11-322513-151LMA50T_1210 B+ SPOK + 47K_0402_5% PC28 0.047U_0603_16V7K +3.3V Iocp = 5.36A ~ 9.03A Ipeak=4.5A +5V Iocp = 5.35A ~ 8.65A Ipeak=4.5A Imax=3.5A Imax=3.5A MAINPWON (8,42,45) PC29 1U_0603_16V6K 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2005/05/09 Deciphered Date 2006/09/26 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C Title SCHEMATIC, M/B LA-3121P Size Document Number Custom Date: , Rev D 401411 Sheet 11, 2006 D 43 of 51 A B C D E Charger Iadp=0~3.25A(65W) P2 23 charger_LX VCTL ICTL 11 10 ACOK# SHDN# ACIN ICHG 28 IINP CCV 21 charger_DLO BST 24 charger_BST DLOV 22 charger_DLOV DLO PR48 10K_0402_1% 2 PR56 0_0402_5% PC41 0.1U_0603_25V7K PL6 15 13 19 18 16 CSIP CSIN BATT PD10 1SS355_SOD323 PR57 33_1206_5% 20 14 BATT+ 2 PC46 1U_0603_10V6K PGND GND CCS CCI PC47 1U_0805_25V4Z MAX1908-CCS PC49 0.01U_0402_25V7K ACON 1908LDO PC50 0.1U_0402_16V7K 1 PR61 22K_0402_5% LDO PC44 4.7U_1206_25V6K LX PU4 MAX1908ETI+T_QFN28 REFIN PR52 0.015_2512_1% PC43 4.7U_1206_25V6K charger_DHI PC42 4.7U_1206_25V6K 25 10U_LF919AS-100M-P3_4.5A_20% DHI @ PC39 1000P_0402_50V7K 26 ACOFF (28,42) CSSN PQ17 SI4810BDY-T1-E3_SO8 CLS PR60 10K_0402_1% PR59 100K_0402_1% (42) REF PR54 15K_0402_1% PR58 24.9K_0402_1% PQ19 2N7002W T/R7 1N SOT-323 (28) IREF PD11 RLS4148_LLDS2 ACOFF# (42,45) PACIN 29 ACOFF PR53 9.31K_0402_1% TP CELLS 12 27 CSSP D D D D PR55 64.9K_0402_0.1% S 1 DCIN 1908LDO D G 17 PC45 0.01U_0402_25V7K 1 S PC40 0.1U_0402_16V7K PR50 10K_0402_0.1% PR51 150K_0402_5% PQ18 2N7002W T/R7 1N SOT-323 G CSIP CSIN 3 BATT+ 1 - 2 D LM358ADR_SO8 PR69 200K_0402_1% PC53 0.01U_0402_25V7K PQ20 2N7002W T/R7 1N SOT-323 G S - D PR67 10K_0402_5% P + G PQ21 2N7002W T/R7 1N SOT-323 6C/8C# (45) G S PR68 511K_0402_1% (28) BATT_OVP PU5B LM358ADR_SO8 PU5A + VS G P IREF=0.73~3.3V +3VALW PR66 300K_0603_0.1% IREF=0.832*Icharge PR65 845K_0603_1% BATT-OVP=0.111*BATT+ 2P4S:4800mAH/cell 0.8C=3.84A 4S CC-CV MODE : 16.8V 1 PC51 0.1U_0402_16V7K PR63 100K_0402_5% LI-4S:17.8V -BATT-OVP=1.9785 BATT+ VS (28) FSTCHG Charge voltage Iinput=(64.9K/74.9K)*(75/20)=3.249A PR62 0_0402_5% PR64 10K_0402_5% CP Point: PC52 0.01U_0402_25V7K D PQ16 DTC115EUA_SC70 0_0402_5% @ PR49 G S S S 1 S PC38 1U_0603_10V6K ACOFF# PQ14 DTC115EUA_SC70 D PQ15 SI2301BDS_SOT23 VIN D D D D G S S S (45) 6C/8C# PR45 47K_0402_1% G 1 VIN PQ12 SI4810BDY-T1-E3_SO8 1 CSSN CSSP PD9 PC48 0.01U_0402_25V7K 2 PC35 0.1U_0603_25V7K PC33 2200P_0402_50V7K 1SS355_SOD323 PC37 0.1U_0603_25V7K PQ11 AO4407_SO8 3 PQ13 47K DTA144EUA_SC70 47K PC34 0.1U_0603_25V7K PR46 200K_0402_1% PC36 0.1U_0603_25V7K PR47 47K_0402_5% PC32 0.1U_0603_25V7K PC31 4.7U_1206_25V6K 1 1 CHG_B+ PL5 FBMA-L18-453215-900LMA90T_1812 B+ PR44 0.02_2512_1% P3 VIN PQ10 AO4407_SO8 PC30 4.7U_1206_25V6K PQ9 AO4407_SO8 4 OVP voltage : LI-3S :17.8V BATT-OVP=1.9758V BATT-OVP=0.111*BATT+ 2005/05/09 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2006/09/26 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C D Title SCHEMATIC, M/B LA-3121P Size B Document Number Date: , Rev D 401411 Sheet 11, 2006 E 44 of 51 A B BATT+ BATT++ PR70 100K_0402_5% BATT+ PL7 FBMA-L18-453215-900LMA90T_1812 C D PH1 under CPU botten side : CPU thermal protection at 90 degree C Recovery at 70 degree C +3VALWP PR71 1K_0402_5% 6C/8C# (44) BATT++ VL 1 PC57 1000P_0402_50V7K PR81 100_0402_5% PR73 150K_0402_1% + - P O G TM_REF1 MAINPWON (8,42,43) PU2B LM393DR_SO8 PR80 150K_0402_1% VL EC_SMB_DA1 (28,30) PR77 82.5K_0603_1% PH1 100K_0603_1%_TH11-4H104FT +3VALWP SUYIN_200275MR007G161ZL PJP2 PR76 442K_0603_1% PR83 100_0402_5% PR82 150K_0402_1% EC_SMB_CK1 (28,30) 2 PR79 6.49K_0402_1% PC56 0.1U_0603_25V7K 2 BATT_TEMP (28) SM ART Batter y: GND SMC 3.SMD 4.TS B/I ID BA TT+ 1 PR74 9.76K_0402_1% PC58 1U_0805_16V7K PR75 1K_0402_5% BATT_TEMP PR78 1K_0402_5% PJP2 battery connector VL VS @PR72 1K_0402_5% PC54 0.01U_0402_25V7K PC55 1000P_0402_50V7K 2 Vin Detector Min typ Max H >L 16.976V 17.257V 17.728V L >H 17.430V 17.901V 18.384V +VSBP PR84 1M_0402_1% PU6A ACIN (19,28) O PC62 0.1U_0603_25V7K AC IN PACIN PACIN (42,44) LM393DR_SO8 1 - PR89 10K_0402_5% P + 2 PR87 10K_0402_5% PZD2 RLZ4.3B_LL34 PR94 10K_0402_5% S PR92 20K_0402_1% PC61 1000P_0402_50V7K PQ23 2N7002W T/R7 1N SOT-323 PR91 22K_0402_5% PR95 10K_0402_5% RTCVREF @ PC63 0.1U_0402_16V7K D G 1 PR93 0_0402_5% SPOK 1 (43) VS PR86 84.5K_0402_1% PR90 100K_0402_5% VIN VIN PC60 0.1U_0603_25V7K 2 PC59 0.22U_1206_25V7K VL PR88 22K_0402_5% 2 PR85 100K_0402_5% 1 1 G B+ PQ22 TP0610K_SOT23 + - PU6B P G O LM393DR_SO8 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2005/05/09 Deciphered Date 2006/09/26 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC A B C Title SCHEMATIC, M/B LA-3121P Size B Document Number Date: , Rev D 401411 Sheet 11, 2006 D 45 of 51 1 +3VALW PJP3 JUMP_43X79 PJP4 JUMP_43X79 NC TP +2.5VSP PGND VFB AGND VTT VCCA VTT REFEN PC72 0.1U_0603_25V7K D C S PJP5 2 PJP6 1 +3VALW +1.8VALWP 2 PQ25 2N7002W T/R7 1N SOT-323 2 G PR163 0_0402_5% SUSP (41) C +1.8VALW 1 +1.8VALW JUMP_43X113 JUMP_43X113 PJP7 PJP8 +5VALW +2.5VSP PJP10 PJP11 1 +1.2V_HT +1.5VSP JUMP_43X113 2 RTCVREF VIN PGND VFB AGND VTT VCCA VTT REFEN PJP14 +0.9V +VSBP B 1 +VSB +1.5VSP JUMP_43X113 2 PR165 60.4K_0402_1% 1 PC125 22U_1206_10V6M JUMP_43X113 PC124 1U_0603_16V6K PC126 0.047U_0402_16V7K 1 +5VALW PU12 CM8562IS_PSOP8 PR166 51K_0402_1% +0.9VP +1.5VS PJP12 B 1 JUMP_43X113 AGND +2.5VS 1 PR164 10_0603_1% +1.2VP_HT JUMP_43X113 PC123 4.7U_1206_25V6K PC127 0.1U_0603_25V7K JUMP_43X113 2 +5VALWP PJP13 JUMP_43X79 1 +3VALWP PR98 60.4K_0402_1% 1 1 PC70 22U_1206_10V6M 2 PC68 22U_1206_10V6M APL5331KAC-TRL_SO8 +0.9VP @ PC69 0.1U_0402_16V7K S G PQ24 2N7002W T/R7 1N SOT-323 PR99 1K_0402_1% 1 (41) SYSON# D @ PR162 0_0402_5% VIN PC67 1U_0603_16V6K VOUT PR96 1K_0402_1% PC71 0.047U_0402_16V7K NC PC66 1U_0603_6.3V6M VREF PU8 CM8562IS_PSOP8 PR100 200K_0402_1% NC +3VALW PR97 10_0603_1% GND RTCVREF VCNTL 2 PC65 10U_1206_25VAK VIN 1 PU7 AGND +1.8V D +5VALW D PC64 4.7U_1206_25V6K 1 2 +1.8VALW D S PQ40 2N7002W T/R7 1N SOT-323 2 G PR167 0_0402_5% SUSP (41) A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2005/05/09 2006/09/26 Deciphered Date SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom Date: |, Rev D 401411 11, 2006 Sheet 46 of 51 PL8 FBMA-L11-322513-151LMA50T_1210 PC83 2200P_0402_25V7K PC82 10U_1206_25VAK 2 2 BOOT2 23 UGATE1 UGATE2 24 DH_1.8VP PHASE1 PHASE2 25 LX_1.8VP D D D D PR107 0_0603_5% BST_1.8VP-1 PC90 0.1U_0402_16V7K C PU10 ISL6227CAZ-T_SSOP28 ISEN2 22 LGATE1 LGATE2 27 PGND1 PGND2 26 10 15 VOUT1 VSEN1 EN1 PG1 VOUT2 VSEN2 EN2 PG2/REF 20 19 21 16 OCSET2 18 DL_1.2VSP ISEN1 PR111 1.5K_0402_1% ISE_1.8VP + PQ30 SI4810BDY-T1-E3_SO8 DL_1.8V G S S S PC94 0.01U_0402_25V7K PR113 10.2K_0402_1% +3VALW @ PR118 0_0402_5% +5VALW PR117 10K_0402_1% PR168 10K_0402_5% B PR121 56.2K_0402_1% @ 10K_0402_1% 2 13 1 PR120 56.2K_0402_1% PC95 0.1U_0402_16V7K PR115 OCSET1 DDR 11 VSE_1.8VP PC96 0.1U_0402_16V7K 1 B @ PR119 0_0402_5% PR116 10K_0402_1% VSE_1.2VSP PR114 10K_0402_1% (28) VLDT_EN_P GND 2 PC92 220U_D2_4VM_R15 PR110 1.27K_0402_1% ISE_1.2VSP +1.8VALWP PL10 1.8UH_SIL104R-1R8PF_9.5A_30% LX_1.2VSP PR112 0_0402_5% 1 S S S G DH_1.2VSP PR109 0_0402_5% PQ28 SI4800BDY-T1-E3_SO8 S S S G 28 VCC 14 VIN BST_1.2VSP SOFT2 PC93 0.01U_0402_25V7K PR108 3.48K_0402_1% SOFT1 PR106 0_0603_5% 2BST_1.2VSP-1 BOOT1 PC88 0.01U_0402_25V7K 17 PQ29 SI4810BDY-T1-E3_SO8 PC89 0.1U_0402_16V7K PC87 0.01U_0402_25V7K 12 D D D D + PC86 2.2U_0805_10V6K D D D D S S S G PC91 220U_D2_4VM_R15 PR105 2.2_0603_5% D D D D C PL9 1.8UH_SIL104R-1R8PF_9.5A_30% +5VALW D BST_1.8VP +1.2VP_HT PC81 2200P_0402_25V7K PC80 10U_1206_25VAK 1 PC85 0.1U_0603_25V7K PD12 DAP202U_SOT323 PQ27 SI4800BDY-T1-E3_SO8 PR104 51_1206_5% B+ PC84 4.7U_0805_6.3V6K PC79 PC78 10U_1206_25VAK D 10U_1206_25VAK ISL6227B+ Ipeak=8.5A, Imax=6A Iocpmin=8.76A Iocpmax=13.46A Ipeak=6.47A, Imax=6.47*0.7=4.53A Iocpmin=7.79A Iocpmax=11.83A A A Compal Secret Data Security Classification 2005/05/09 Issued Date Deciphered Date 2006/09/26 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Compal Electronics, Inc SCHEMATIC, M/B LA-3121P Size Document Number Custom Rev D 401411 Date: , 11, 2006 Sheet 47 of 51 B+ CPU_B+ +5VS DH2 21 TON LX2 22 LX2 OFS DL2 24 DL2 PGND2 23 CSP2 13 CSN2 14 VRHOT# +3VS PR152 200K_0402_1% PC118 4700P_0603_50V7K PR153 100_0402_1% 2 PR154 200K_0402_1% D PQ35 SI7840DP-T1-E3_SO8 PR155 0_0603_5% S PR158 10_0402_5% 2 (8) PSI# @ PC121 4700P_0402_25V7K PQ37 FDV301N_NL 1N SOT23-3 (8) PC101 100U_25V_M PC100 2200P_0402_50V7K PC99 0.01U_0402_25V7K 1 PD13 SKS30-04AT_TSMA PR134 4.22K_0402_1% 2 CPU_B+ PQ38 FDS6676AS_SO8 G D S D S D S D PQ36 2N7002W T/R7 1N SOT-323 G CSP2 SKIP# C PR146 0_0402_5% CPU_VSS_SENSE (8) CPU_VCC_SENSE B PL13 0.36UH_PCMC104T-R36MN1R17_30A_20% SKS30-04AT_TSMA 2 PR137 10_0402_5% PC109 0.22U_0603_16V7K PC117 0.01U_0402_25V7K 1 0_0402_5% REF 39 20 DH2 10 BST2 PR144 PD14 POUT 2 PC111 PR136 PH2 2.1K_0402_1% 10KB_0603_5%_ERTJ1VR103J 2 2200P_0402_50V7K PC115 4.7U_1206_25V6K PC116 4.7U_1206_25V6K PC114 11 CCI PR156 3.3_1206_5% FB CCV PC120 1000P_0603_50V7K TIME PC108 4700P_0402_25V7K PR143 20K_0402_1% 2 470P_0402_50V8J PR150 0_0402_5% PR141 2K_0603_1% FB 40 PQ39 FDS6676AS_SO8 G D S D S D S D MAX8774_REF 0.1U_0603_16V7K 200K_0402_1% B IC S G SHDN# 1 D PR149 169K_0603_1% 38 @ AGND 1 PC113 18 CPU_B+ MAX8774_REF PR148 31.6K_0402_1% 71.5K_0402_1% PC110 150P_0402_50V8J PR147 GND EP PC112 0.1U_0402_16V7K TWO-PH 41 (28) POUT 15 37 2 100K_0402_5% PR145 10K_0402_1% CSN1 PR142 100_0402_1% PR140 CSP1 PHASEGD 0_0603_5% @ PR139 PC97 4.7U_1206_25V6K PC98 4.7U_1206_25V6K 16 PWRGD 17 For EC ATE 27 PGND1 FDS6676AS_SO8 D5 PC107 PR131 1000P_0603_50V7K 3.3_1206_5% 1 DL1 36 SHORT PADS FDS6676AS_SO8 PQ33 G D S D S D S D 26 PL12 0.36UH_PCMC104T-R36MN1R17_30A_20% LX1 DL1 28 D4 D D D D D3 MAX8774GTL+_TQFN40 LX1 35 PQ32 34 D +CPU_CORE G S S S DH1 + PR128 0_0603_5% PC106 4700P_0402_25V7K 29 PC105 0.22U_0603_16V7K DH1 PU11 28) VR_ON D2 MAX8774_VCC PQ34 2N7002W T/R7 1N SOT-323 C 33 PQ31 SI7840DP-T1-E3_SO8 0.22U_0603_16V7K PR138 0_0402_5% 30 PR151 +3VS BST1 (28) VGATE J1 D1 PC119 (8) VID5 32 (8) VID4 THRM GNDS (8) VID3 PR126 0_0603_5% D0 12 (8) VID2 VDD 31 (8) VID1 VCC PC104 0.01U_0402_25V7K 2 PR124 0_0402_5% PR125 0_0402_5% PR127 0_0402_5% PR129 0_0402_5% PR130 0_0402_5% PR132 0_0402_5% PR133 0_0402_5% PR135 100K_0402_1% (8) VID0 25 MAX8774_VCC 19 PC103 2.2U_0603_10V6K @ PR123 10K_0402_5% PC102 2.2U_0603_6.3V6K PR122 10_0402_5% +3VS D PL11 FBMA-L18-453215-900LMA90T_1812 PR157 4.22K_0402_1% PH3 PR159 10KB_0603_5%_ERTJ1VR103J 2.1K_0402_1% 2 PC122 0.22U_0603_16V7K CSP2 PR160 A A 0_0402_5% Compal Secret Data Security Classification 2005/05/09 Issued Date Deciphered Date 2006/09/26 Compal Electronics, Inc SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom Date: , 11, 2006 Rev D 401411 Sheet 48 of 51 Version change list (P.I.R List) Item D Fixed Issue Reason for change Rev Schematic update Because schematic update, we don't need this two parts Schematic update Because schematic update, we don't need this two parts 0.1 BOM error BOM error PG# Page of for PWR VER Phase Delete PQ24 SB000005M10 46 Delete PR162 SD028000080 0.1 EVT 0.1 EVT 0.1 46 BOM error 0.1 44 Change PQ15 from SB923010010 to SB923010020 0.1 EVT BOM error 0.1 48 Change PQ37 from SB503010004 to SB503010010 0.1 EVT 0.1 48 0.1 EVT Because we need to reduce MOSFET teperature of MOSFET thermal issue Modify List high side mos D Change PQ31 and PQ35 from SB562940000 to SB578400080 Change PL1,PL5,PL7 and PL11 form SM010018210 to C BOM error BOM error BOM error 0.1 47 BOM error BOM error 0.1 48 BOM error 0.1 44 10 BOM error 11 BOM error BOM error 42 0.1 EVT SM010020720 0.1 Change PR121 from SD000001500 to SD000001580 0.1 EVT 0.1 EVT 0.1 EVT Change PR50 from SD034576280 to SD034140280 0.1 EVT Change PR148 from SD034316200 to SD034316280 0.1 EVT 0.1 EVT 0.1 EVT C BOM error BOM error 0.1 44 Change PR149 from SD014169300 to SD014169380 Change PR55 from SD034100380 to SD034100280 BOM error 0.1 48 BOM error 0.1 44 BOM error 0.1 46 0.1 48 Change PC101 from SF22004M210 to SF10004M080 0.1 EVT 0.1 48 Add PR137 and PR158 SD028100A80 0.1 EVT Add PR168 SD034100280 0.1 EVT Change PC52,PC53,PC54,PC87,PC88,PC93 and PC94 from B 12 BOM error 13 BOM error 14 High limit issue 15 BOM error 16 Power sequence adjust Power sequence adjust 0.1 47 17 Power sequence adjust Power sequence adjust 0.1 47 0.1 42 18 Because the high is limited, we need to reduce space BOM error BOM cost issue SE075103Z00 to SE075103K80 B Change PC70 from SE153106K80 to SE116226M80 Delete PR115 SD034100280 0.1 EVT 0.1 EVT Change PQ5,PQ18,PQ19,PQ20,PQ21,PQ23,PQ25,PQ34,PQ36,PQ40 BOM cost issue from SB000005M10 to SB000006800 A A Compal Electronics, Inc Title SCHEMATIC, M/B LA-3121P Size Date: Document Number |, 11, 2006 Rev D 401411 Sheet 49 of 51 Version change list (P.I.R List) Item D Rev PG# Charger accuracy issue Charger accuracy issue Increase changer accuracy to meet customer request 0.2 44 Charger accuracy issue Increase changer accuracy to meet customer request 0.2 44 Increase changer accuracy to meet customer request 0.2 Improve IC risk 44 Improve IC risk 0.2 44 Modify List Page of for PWR EVT Change PR50 form SD034140280 to SD000008B00 0.1 EVT Change PR55 from SD034100280 to SD00000CL80 0.1 EVT Change PR60 from SD034100180 to SD034100280 0.1 EVT 0.1 EVT Improve OCP point 0.3 43 Change PR29 and PR30 from SD034200380 to SD034100380 Improve OCP point Improve OCP point 0.3 47 Change PR120 from SD034499280 to SD000001580 Improve ripple voltage Incresr +1.2VP_HT voltage Incresr +1.8VALWP voltage 12 13 14 Phase 0.1 Improve OCP point 11 VER Change PR44 from SE000001E00 to SE000001F00 10 B Reason for change C Fixed Issue D EVT 0.1 C Improve ripple voltage 0.4 46 Incresr +1.2VP_HT voltage 0.4 47 0.4 47 0.4 48 Incresr +1.8VALWP voltage Improve thermal issue Improve thermal issue Change PC68 and PC125 from SE142475K80 to SE116226M80 0.2 DVT Change PR108 from SD034340180 to SH034348180 0.2 DVT Change PR113 from SD034100280 to SD028102280 0.2 DVT 0.2 DVT 0.2 DVT 0.2 DVT 0.2 DVT Change PQ32, PQ33, 38, PQ39 from SB000003W00 to SB578320010 Improve thermal issue Improve +CPU_CORE OCP point Improve +CPU_CORE OCP point Improve +CPU_CORE OCP point Improve thermal issue Improve +CPU_CORE OCP point Improve +CPU_CORE OCP point 0.4 48 Change PL12, PL13 from SH12056BM00 to SH000005680 0.4 48 Change PR134, PR157 from SD034150280 to SD034422180 0.4 Improve +CPU_CORE OCP point 48 B Change PR136 and PR159 from SD034150280 to SH034210180 0.4 48 Change PC109 and PC122 from SE042333K80 to SE026224K80 0.2 DVT 15 Improve CPU load line Improve CPU load line 0.4 48 Change PR141 from SD014255180 to SD014200180 0.2 DVT 16 Improve CPU load line Improve CPU load line 0.4 48 Change PR142 and PR153 from SD034100A80 to SD034100080 0.2 DVT 17 18 A A Compal Electronics, Inc Title SCHEMATIC, M/B LA-3121P Size Date: Document Number |, 11, 2006 Rev D 401411 Sheet 50 of 51 Page of for RD Modify Item D Fixed Issue ATI Recommand TV-OUT Modify List VER Phase 13 Change R376 82.5 ohm to 100 ohm 0.2 DVT 14 Increase R590,R591,R592 150 ohm pull down resister 0.2 DVT 18 Change U15,U16 voltage source +3VS to +3VALW 0.2 DVT Fixed USB2.0 EYE Diagram 19 Change R164 11.8K ohm to 11.3K ohm 0.2 DVT IMPROVE TV-OUT SIGNAL QUALITY 24 Change C417,C418,C419,C425,C428,C430 to 220P 0.2 DVT SB_INT_FLASH_SEL# 28 Add R594 0.2 DVT 41 Add R586,R589,Q5,Q12 change to 2N7002 0.2 DVT 41 Add R587,Q34(+2.5VS),R588,Q35(+1.5VS),R604,Q36(+0.9V) 0.2 DVT 41 Add C658 0.1uF 0.3 PVT 37 Change R100 to 47K(Ori : 100K) 0.3 PVT 26 C281 change to 10uF 0.3 PVT 27 Change R387,R390,R391,R395,C494,C500 placement to near Transformer 0.3 M AC EC , LED +1.5VS, +2.5VS, +0.9V ¹w 10 Sometimes run S3 test program will interrupt 11 B PCI_RST# C PG# ?+2.5V_LAN Power 12 LAN 13 Speaker 14 ? ( ) 39 Add R606(0 ohm),R607(0 ohm),R608(47K Add Camera Connect 31 15 Bluetooth 16 ),R609(47K ) D C PVT 0.3 PVT Add R605,C657,JP35 0.3 PVT 38 Add L65 0.3 PVT For EMI request 15 Add C330 0.4 PVT2 17 JP25 5-in-1 connector Spec update (Pin18 from NC to SD-GND) 33 Add R610 0.4 PVT2 18 Modify Package for Lead-free part 41 Modify C658 package from 0402 to 0603 0.4 PVT2 19 Reserve 28 Add R611, R612, EC_Pin-100 1.0 MP 20 for solve MS detect issue 33 Remove C197 1.0 MP chock B A A Compal Secret Data Security Classification 2005/05/09 Issued Date 2006/10/10 Deciphered Date Compal Electronics, Inc SCHEMATIC, M/B LA-3121P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom 401411 Date: , R ev D Sheet 11, 2006 51 of 51 ... 98 10 0 10 2 10 4 10 6 10 8 11 0 11 2 11 4 11 6 11 8 12 0 12 2 12 4 12 6 12 8 13 0 13 2 13 4 13 6 13 8 14 0 14 2 14 4 14 6 14 8 15 0 15 2 15 4 15 6 15 8 16 0 16 2 16 4 16 6 16 8 17 0 17 2 17 4 17 6 17 8 18 0 18 2 18 4 18 6 18 8 19 0 19 2 19 4... 10 0 10 2 10 4 10 6 10 8 11 0 11 2 11 4 11 6 11 8 12 0 12 2 12 4 12 6 12 8 13 0 13 2 13 4 13 6 13 8 14 0 14 2 14 4 14 6 14 8 15 0 15 2 15 4 15 6 15 8 16 0 16 2 16 4 16 6 16 8 17 0 17 2 17 4 17 6 17 8 18 0 18 2 18 4 18 6 18 8 19 0 19 2 19 4 19 6... 10 U _08 05 _ 10 V6M C89 10 U _08 05 _ 10 V6M C 113 10 U _08 05 _ 10 V6M C124 22U _08 05_6.3V6M +1. 8V C 70 0.22U _04 02 _ 10 V4Z C1 20 0.22U _04 02 _ 10 V4Z C 100 18 0P _04 02_50V8J 2 C 91 0. 01U _04 02 _16 V7K C82 10 U _08 05 _ 10 V6M C 102 10 U _08 05 _ 10 V6M

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