COMPUTER ARITHMETIC (tổ CHỨC và KIẾN TRÚC máy TÍNH, SLIDE TIẾNG ANH)

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COMPUTER ARITHMETIC (tổ CHỨC và KIẾN TRÚC máy TÍNH, SLIDE TIẾNG ANH)

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Trắc nghiệm, bài giảng pptx các môn chuyên ngành Y dược và các ngành khác hay nhất có tại “tài liệu ngành Y dược hay nhất”; https://123doc.net/users/home/user_home.php?use_id=7046916. Slide bài giảng môn tổ chức và kiến trúc máy tính ppt dành cho sinh viên chuyên ngành công nghệ - kỹ thuật và các ngành khác. Trong bộ sưu tập có trắc nghiệm kèm đáp án chi tiết các môn, giúp sinh viên tự ôn tập và học tập tốt môn tổ chức và kiến trúc máy tính bậc cao đẳng đại học chuyên ngành công nghệ - kỹ thuật và các ngành khác

NLU-FIT Basic Computer Networks Computer Organization and Architecture Chapter 09 COMPUTER ARITHMETIC KEY POINTS  The two principal concerns for computer arithmetic are the way in which numbers are represented (the binary format) and the algorithms used for the basic arithmetic operations (add, subtract, multiply, divide) These two considerations apply both to integer and floating- NLU-FIT Basic Computer Networks point arithmetic  Floating-point numbers are expressed as a number (significand) multiplied by a constant (base) raised to some integer power (exponent) Floating point numbers can be used to represent very large and very small numbers  Most processors implement the IEEE 754 standard for floating-point representation and floating-point arithmetic IEEE 754 defines both a 32-bit and a 64-bit format 9.1 Arithmetic and Logic Unit (ALU)  The ALU is that part of the computer that actually performs arithmetic and logical operations on data  All of the other elements of the computer system—control unit, registers, memory, NLU-FIT Basic Computer Networks I/O—are there mainly to bring data into the ALU for it to process and then to take the results back out  An ALU and, indeed, all electronic components in the computer are based on the use of simple digital logic devices that can store binary digits and perform simple Boolean logic operations 9.1 Arithmetic and Logic Unit (ALU)  Figure 9.1 indicates, in general terms, how the ALU is interconnected with the rest of the processor • Data are presented to the ALU in registers, and the results of an operation are NLU-FIT Basic Computer Networks stored in registers • These registers are temporary storage locations within the processor that are connected by signal paths to the ALU • The ALU may also set flags as the result of an operation The flag values are also stored in registers within the processor Basic Computer Networks 9.1 Arithmetic and Logic Unit (ALU) Figure 9.1 ALU Inputs and Outputs For example, an overflow flag is set to if the result of a computation exceeds the length of the register into which it is to be stored • The control unit provides signals that control the operation of the ALU and the NLU-FIT movement of the data into and out of the ALU NLU-FIT Basic Computer Networks Computer Arithmetic 9.2 Integer Representation 9.2.1 Sign-Magnitude Representation  In the binary number system, arbitrary numbers can be represented with just the digits zero and one, the minus sign, and the period, or radix point NLU-FIT Basic Computer Networks -1101.01012 = -13.312510  For purposes of computer storage and processing, however, we not have the benefit of minus signs and periods  Only binary digits (0 and 1) may be used to represent numbers 9.2.1 Sign-Magnitude Representation  If we are limited to nonnegative integers, the representation is straightforward • An 8-bit word can represent the numbers from to 255, including NLU-FIT Basic Computer Networks 00000000 = 00000001 = … 10000000 = 128 11111111 = 255  In general, if an n-bit sequence of binary digits a a n-1 n-2… a1a0 is interpreted as an unsigned integer A, its value is 9.2.1 Sign-Magnitude Representation  There are several alternative conventions used to represent negative as well as positive integers, all of which involve treating the most significant (leftmost) bit in the word as a sign bit NLU-FIT Basic Computer Networks • If the sign bit is 0, the number is positive; if the sign bit is 1, the number is negative  The simplest form of representation that employs a sign bit is the signmagnitude representation • In an n-bit word, the rightmost n-1 bits hold the magnitude of the integer 9.2.1 Sign-Magnitude Representation 10 + 18 = 00010010 - 18 = 10010010 (sign magnitude) Basic Computer Networks  The general case can be expressed as follows: (9.1) NLU-FIT Problems • • Need to consider both sign and magnitude in arithmetic Two representations of zero (+0 and -0) NLU-FIT Basic Computer Networks 16 9.2.2 Twos Complement Representation Table 9.2 Alternative Representations for 4-Bit Integers 17 9.2.3 Converting between Different Bit Lengths  It is sometimes desirable to take an n-bit integer and store it in m bits, where m > n • In sign-magnitude notation, this is easily accomplished: simply move the sign bit Basic Computer Networks to the new leftmost position and fill in with zeros NLU-FIT  This procedure will not work for twos complement negative integers 18 9.2.3 Converting between Different Bit Lengths NLU-FIT Basic Computer Networks  Instead, the rule for twos complement integers is to move the sign bit to the new leftmost position and fill in with copies of the sign bit • For positive numbers, fill in with zeros, and for negative numbers, fill in with ones This is called sign extension NLU-FIT Basic Computer Networks 19 Computer Arithmetic 9.3 Interger Arithmetic 20 9.3.1 Negation  In sign-magnitude representation, the rule for forming the negation of an integer is simple: invert the sign bit NLU-FIT Basic Computer Networks  In twos complement notation, the negation of an integer can be formed with the following rules: • Take the Boolean complement of each bit of the integer (including the sign bit).That is, set each to and each to • Treating the result as an unsigned binary integer, add 21 9.3.1 Negation  This two-step process is referred to as the twos complement operation, NLU-FIT Basic Computer Networks or the taking of the twos complement of an integer  As expected, the negative of the negative of that number is itself: 9.3.1 Negation Basic Computer Networks 22  Equation (9.2) interpret an n-bit sequence of binary digits as a twos complement integer A, so that its value is  Now form the bitwise complement, a a …a and, treating this is an unsigned n-1 n-2 integer, add Finally, interpret the resulting n-bit sequence of binary digits as a twos complement integer B, so that its value is NLU-FIT  Now, we want A=-B, which means A+B=0 23 9.3.2 Addition and Subtraction  Addition in twos complement is illustrated in Figure 9.3  Addition proceeds as if the two numbers were unsigned integers Basic Computer Networks • If the result of the operation is positive, we get a positive number in twos complement form, which is the same as in unsigned-integer form • If the result of the operation is negative, we get a negative number in twos complement form  Note that, in some instances, there is a carry bit beyond the end of the word NLU-FIT which is ignored NLU-FIT Basic Computer Networks 24 9.3.2 Addition and Subtraction Figure 9.3 Addition of Numbers in Twos Complement Representation 25 9.3.2 Addition and Subtraction  On any addition, the result may be larger than can be held in the word size being used.This condition is called overflow NLU-FIT Basic Computer Networks  When overflow occurs, the ALU must signal this fact so that no attempt is made to use the result  To detect overflow, the following rule is observed: • If two numbers are added, and they are both positive or both negative, then overflow occurs if and only if the result has the opposite sign 26 9.3.2 Addition and Subtraction  Subtraction Rule: To subtract one number (subtrahend) from another (minuend), take the twos complement (negation) of the subtrahend and NLU-FIT Basic Computer Networks add it to the minuend  Thus, subtraction is achieved using addition, as illustrated in Figure 9.4 • The last two examples demonstrate that the overflow rule still applies NLU-FIT Basic Computer Networks 27 9.3.2 Addition and Subtraction Figure 9.4 Subtraction of Numbers in Twos Complement Representation (M - S) NLU-FIT Basic Computer Networks 28 9.3.2 Addition and Subtraction Figure 9.6 Block Diagram of Hardware for Addition and Subtraction NLU-FIT Basic Computer Networks 29 9.3.2 Addition and Subtraction Figure 9.5 Geometric Depiction of Twos Complement Integers 30 Computer Arithmetic  9.3.3 Multiplication (Reference)  9.3.4 Division (Reference) Basic Computer Networks  9.4 Floating Point Representation (Reference) Reference: Computer Organization and Architecture Designing for Performance (8th NLU-FIT Edition), William Stallings, Prentice Hall, Upper Saddle River, NJ 07458 ... floating-point arithmetic IEEE 754 defines both a 32-bit and a 64-bit format 3 9.1 Arithmetic and Logic Unit (ALU)  The ALU is that part of the computer that actually performs arithmetic and... numbers, fill in with ones This is called sign extension NLU-FIT Basic Computer Networks 19 Computer Arithmetic 9.3 Interger Arithmetic 20 9.3.1 Negation  In sign-magnitude representation, the... the ALU and the NLU-FIT movement of the data into and out of the ALU NLU-FIT Basic Computer Networks Computer Arithmetic 9.2 Integer Representation 9.2.1 Sign-Magnitude Representation  In the

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  • 9.1. Arithmetic and Logic Unit (ALU)

  • 9.1. Arithmetic and Logic Unit (ALU)

  • 9.1. Arithmetic and Logic Unit (ALU)

  • 9.2.3. Converting between Different Bit Lengths

  • 9.2.3. Converting between Different Bit Lengths

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