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Xơy d ng H th ng nhúng H C VI N CÔNG NGH B U CHệNH VI N THÔNG Khoa Công ngh thông Tin B môn Khoa h c máy Tính IT XÂY D NG CÁC P T H TH NG NHÚNG Hà N i, tháng 11 n m 2013 (b n s a b sung) Xơy d ng H th ng nhúng L i nói đ u IT D y vƠ h c h th ng nhúng lƠ đ c p t i m t ch đ có ph m vi r ng bao g m thi t k , môi tr ng ng d ng, lo i hình cơng ngh , qui t c c n thi t đ ti p c n m t cách có h th ng L nh v c thi t k vƠ ng d ng h th ng nhúng bao g m : h th ng vi u n (microcontroller) nh vƠ đ n gi n, h th ng u n, h th ng nhúng phơn tán, h th ng chip, m ng máy tính (có dơy vƠ khơng dơy), h th ng PC nhúng, h th ng rƠng bu c th i gian, robotic, thi t b ngoƠi c a máy tính, x lỦ tín hi u, h th ng l nh vƠ u nầ N n t ng công ngh hi n đ i lƠ k thu t vi n t v i m t đ tích h p l n vƠ r t l n Khi mu n thi t k h th ng nhúng, có nhi u y u t c n tuơn th gi ng nh thi t k máy tính, nh ng l i b rƠng bu c b i đ c thù ng d ng Thêm vƠo lƠ s đan chéo c a k n ng r t c n thi t cho thi t k h th ng nhúng, đ c l p v n hƠnh, thi t k v i tiêu chí tiêu hao n ng l ng th p, công ngh ph n c ng, công ngh ph n m m (h th ng vƠ ng d ng), h th i gian th c, t ng tác ng i máy vƠ c v n đ an ninh h th ng Nh v y đƠo t o vƠ h c h th ng nhúng c n m t kh i l ng ki n th c t p h p nh t t b môn khác nh khoa h c máy tính (computer science), khoa h c truy n thông (communication), k thu t thi t k n t : m ch t ng t vƠ s , s d ng t t ph n m m thi t k bo m ch (nh Protel, Proteus, DXPầ), ki n th c v ch t o bán d n Vì lƠ b mơn cơng ngh có tính ng d ng cao v i bƠi tốn c th , nên l i c n có chun mơn c a ngƠnh ngh , mƠ h th ng nhúng s ng d ng Tóm l i đơy lƠ m t ch đ h p nh t vƠ vi c th c hi n ch đ nƠy th c không d dƠng P T V i l ng th i gian nh t đ nh, môn h c XỂY D NG CÁC H TH NG NHỎNG s mang l i cho ng i h c nh ng v n đ c b n nh t v h th ng nhúng Ch ng Ch ng đ c p t i ki n trúc ph n c ng h th ng, cách thi t k m t s kh i ch c n ng c s có tính th c t cao Ch ng ch y u gi i thi u v ph n m m cƠi đ t h th ng nhúng, bao g m trình u n thi t b , ph n m m trung gian, vƠ ph n m m h th ng đ c cƠi đ t c bi t nh c l i m t s yêu c u v khái ni m c a h th ng th i gian th c vƠ h u hƠnh th i gian th c Ch ng gi i thi u tiêu chí vƠ ph ng pháp thi t k h thông nhúng Cu i ch ng lƠ m t s bƠi t p l n ki u D án thi t k , có th l a ch n cho th c hƠnh v i ki u ki n trúc h th ng nhúng khác Nh đư nêu, đơy lƠ ch đ r ng, mang tính k thu t vƠ ki n th c l i đ c t ng h p t môn khác, nên tƠi li u nƠy ch c không th th t s đ y đ Các ph n ki n th c nƠo không đ c đ c p sơu đơy, ng i h c c n tham kh o thêm tƠi li u khác, hay t môn h c liên quan Tác gi xin chơn thƠnh cám n cán b , gi ng viên Khoa Công ngh thông tin vƠ b mơn Khoa h c máy tính, H c vi n Cơng ngh BCVT HƠ N i đư góp Ủ đ tác gi hoƠn thƠnh giáo trình Tác gi c ng xin đón nh n Ủ ki n đóng góp, phê bình t ng i đ c, ng i h c, cho tƠi li u nƠy có ích h n a ch theo e-mail: htcuoc@ioit.ac.vn Xơy d ng H th ng nhúng HƠ N i, tháng 10 n m 2013 Hu nh Thúc C c, P T IT Vi n Công ngh thông tin, VAST, 18, HoƠng Qu c Vi t, HƠ N i Xơy d ng H th ng nhúng L i nói đ u .2 M t s ch vi t t t Danh sách hình v Ch ng GI I THI U CHUNG V CÁC H TH NG NHÚNG 15 1.1 KHÁI NI M V H TH NG NHÚNG (HTN) 15 1.2 C I M C A HTN .15 1.3 CÁC YÊU C U V I HTN .18 1.4 MƠ HÌNH T NG TH HTN 19 1.4.1 Mơ hình c u trúc ph n c ng c a máy tính 19 1.4.2 Ki n trúc c a CPU .23 1.4.3 Mơ hình t ng qt c a m t HTN 25 1.4 PHÂN LO I HTN .27 1.5 K T CH 1.6 CÂU H I CU I CH IT NG 33 ng CÁC THÀNH PH N PH N C NG C A H TH NG NHÚNG 34 B X LÍ TRUNG TÂM (Central Processing Unit-CPU) .34 T 2.1 2.2.1 Các lo i CPU nguyên lí ho t đ ng 34 2.2.2 Ví d v m t CPU nguyên lí ho t đ ng 35 2.2 P Ch NG 32 CPU 8085 VÀ H TH NG BUS 44 2.2.1 Khái ni m b n ch t v t lý c a BUS 45 2.2.2 Khuy ch đ i BUS (bus driver) 47 2.2.3 Bus đ ng b (Synchronous bus): 48 2.2.4 Bus không đ ng b (Asynchronous bus) .50 2.2.5 Tr ng tài BUS (bus arbitration) 51 2.2.6 Bus m r ng (Expansion bus) EISA, MCA, Bus c c b , PCI 54 2.2.7 Bus SPI (Serial Peripheral Interface ) 55 2.2.8 Bus I2C (Inter-Integrated Circuit) .56 2.2.9 Th c hi n k thu t c a BUS 62 2.3 BO M CH m t HTN V I C U HÌNH T I THI U 66 2.4 HTN V I CÁC CPU KHÁC NHAU 69 2.4.1 CPU đa n ng 16 bit 69 2.4.2 Bo m ch v i CPU HARVARD (microcontroller Unit-MCU) h Intel 8051/8052/8xC25173 Xơy d ng H th ng nhúng 2.4.3 2.5 Vi m ch H th ng kh trình m t Chip (Programmable System on chip-PsoC) Máy tính thơng minh kh trình (Programmable Intelligent Computer-PIC) 84 B NH VÀ THI T K B NH 98 2.5.1 M t s thơng s c a m ch nh 99 2.5.2 Phân lo i b nh 101 2.5.3 Phân c p b nh 108 2.5.4 T ch c b nh v t lý thi t k b nh 110 2.6 GHÉP N I V I THI T B NGO I VI 121 2.6.1 T ng quan 121 2.6.2 Ghép n i CPU ch đ ng 125 2.6.3 Ghép n i I/O ch đ ng 130 2.6.4 C ng vào/ra 144 2.6.5 Ghép n i v i tín hi u t 2.6.6 Bi n đ i t 2.6.7 Bi n đ i s thƠnh t ng t thành s (s hóa) 152 IT 2.7 K T CH ng t (analog signal) 150 ng t (DAC) 153 NG 153 2.8 CÂU H I VÀ BÀI T P 153 2.8.2 Bài t p cu i ch ng 153 T Câu h i cu i ch ng 154 ng CÁC THÀNH PH N PH N M M C A H TH NG NHÚNG 156 3.1 P Ch 2.8.1 TRỊNH I U KHI N THI T B ( vi t t t: T KTB) .156 3.1.1 T ng quan 156 3.1.2 Các lo i T KTB 160 3.1.3 3.1.3 Ho t đ ng c a T KTB .161 3.1.4 Phát tri n T KTB 161 3.1.5 M t s ví d v T KTB 163 3.2 H TH NG NHÚNG TH I GIAN TH C 165 3.2.1 H u hành đa nhi m (multitasking) .165 3.2.2 H th ng th i gian th c .184 3.2.3 H u hành th i gian th c (RTOS) 189 3.2.4 H th i gian th c khơng có h u hành th i gian th c 195 3.3 PH N M M TRUNG GIAN (middleware) 198 3.4 PH N M M NG D NG .200 Xơy d ng H th ng nhúng 3.5 K T CH 3.6 CÂU H I CU I CH NG 201 THI T K VÀ CÀI T CÁC H TH NG NHÚNG 203 ng 4.1 THI T K H TH NG 203 4.1.1 Các n n t ng c b n xây d ng ki n trúc HTN 207 4.1.2 Phân ho ch thi t k ph n c ng, ph n m m 211 4.1.3 Xây d ng bo m ch phát tri n h th ng 217 4.2 CÀI T VÀ TH NGHI M HTN 221 4.2.1 Ch n CPU cho thi t k 221 4.2.2 B nh cho HTN 223 4.2.3 Ghép n i v i thi t b 225 4.2.4 Phát tri n ph n m m cho HTN 225 4.2.5 G r i mô ph ng 235 4.2.6 Phát tri n HTN 240 4.2.7 Ví d phát tri n HTN 266 K T CH NG 267 4.4 CÂU H I CU I CH NG 267 T 4.3 IT Ch NG 201 TÀI LI U THAM KH O 267 P PH L C Các ví d 270 Xơy d ng H th ng nhúng M t s ch vi t t t n v x lý trung tâm CPU Central Processing Unit ROM Read Only Memory B nh chi đ c EPROM Erasable programmable read-only memory B nh ch đ c, xóa l p trình l i đ RAM Random Access Memory b nh truy c p ng u nhiên non-volatile computer storage B nh bán d n không b m t n i dung c không cung c p ngu n nuôi c (memory cards, USB flash drives, solid-state drives -SSD) OS Operating System H u hành RTOS Real Time Operating System H u hành th i gian th c ES Embedded System HTN Embedded System OS hay H H Operating System T KTB Device Driver PLC Programmable Logic Controller b u n logic kh trình PIC Programmable Intelligent Computer Máy tính kh trình thơng minh PSoC Programmable System - on - Chip H th ng kh trinh vi m ch ASIC Application-Specific Integrated Circuit ASIC m t vi m ch đ c thi t k dành cho m t ng d ng c th theo yêu c u cá bi t MCU Microcontroller Unit Vi u n CICS Complex Instruction Set T p l nh đ y đ RISC Reduced Instruction Set T p l nh rút g n SPI Serial Peripheral Interface ng liên k t d li u n i ti p, đ ng b , ho t đ ng theo ki u Ch /t (Master/Slave) I2C Inter-Integrated Circuit Bus dùng đ n i gi a vi m ch n t ầ IT FLASH H th ng nhúng P T H th ng nhúng H i u Hành Trình u n thi t b Xơy d ng H th ng nhúng USART Universal Serial Aynchronous Receiver/Transmitter B thu/phát n i ti p di b đa n ng ISR Interrupt Service Routine Ch MAC Media Access Control i u n truy nh p môi tr ng (m ng máy tính) Ví d : MAC address: a ch v t lí c a thi t b m ng MIPS Million instructions per second Tri u l nh máy m t giây Integrated Development Environment, ho c: Là t p ph n m m h tr công c , ti n ích đê phát tri n ph n m m máy tính, bao g m: Integrated Design Environment So n th o mã ngu n, trình thơng d ch, trình biên d ch, trình g r i IDE ng trình x lí ng t hay D ch v x lí ng t ho c: T In-Circuit Emulator P ICE IT Integrated Debugging Environment Là lo i thi t b ph n c ng dùng đ g r i phát tri n ph n c ng ph n m m h p nh t, nh HTN Vid d nh Logic anlyzer, ph n m m MPLAB c a Microchip Xơy d ng H th ng nhúng Danh sách hình v Hình 1.1 Mơ hình t ng qt bo m ch ch Hình 1.2 Ngu n ni cho h máy tính Hình 1.3 HTN xây d ng t xây d ng t vi x lý(Microprocessor-based) vƠ vi u n (microcontroller based) Hình 1.4 Microcontroller thành ph n c b n, BUS k t n i bên trong.T t c m t chip Hình 1.5 Hình1.6 Hai ki u HTN v i lo i ki n trúc CPU Havard CPU ARM 920T c a Amtel Hình 1.7 Mơ hình t ng qt HTN-Mơ hình v i kh i ch c n ng Hình 1.8 M t cách nhìn khác v mơ hình t ng qt HTN:V i kh i ngo i vi ph n m m Ki n trúc tr u t Hình 1.10 S đ kh i CPU DSP-MP3 Hình 1.11 B MP3 v i CPU BlackFin c a ANALOG DEVICES Hình 1.12 M t s HTN th Hình 2.1 Intel CPU 8085 Hình 2.2 Các kh i ch c n ng c a CPU 8080/8085 Hình 2.3 Các khái ni n qui chi u theo CPU Clock Hình 2.4 L u đ th i gian c s c a CPU 8085 (Theo tài li u c a hãng Intel) Hình 2.5 Bi u đ th i gian c a chu kì tìm l nh Hình 2.6 C u hình t i thi u: CPU 8085 t o BUS h th ng Hình 2.7 CPU Bus BUS h th ng Hình2.8 Hình 2.9 ng HTN IT Hình 1.9 P T ng m i Chu kì đ c đ ng b BUS khơng đ ng b , ho t đ ng đ ng b b i “đ i tho i” gi a tín hi u u n Hình 2.10 BUS chu i quay vịng (daisy chaining) Hình 2.11 Tr ng tài BUS Hình 2.12 Tr ng tài Bus khơng t p trung multibus Hình 2.13 Liên k t qua bus SPI Hình 2.14 Liên k t qua bus I2C Xơy d ng H th ng nhúng Hình 2.15 Ngun lí n i BUS I2C Hình 2.16 Ghi/đ c BUS I2C Hình 2.17 Ví d d li u thu/phát BUS I2C Hình 2.18 Các m ch logic th Hình 2.19 Các ki u n i đ u ra, đ u tr kháng cao Hình 2.20 Vi m ch tr ng thái: hai tr ng thái logic ng dùng thi t k k thu t s tr ng thái th HZ: đ u b “tách” kh i BUS Hình 2.21 M ch ch t (hay nh , g i l i) ki u D, làm vi c theo m c hay s n lên c a xung đ ng h CK (Xem thêm chi ti t mach SN 7474) Ch t bit v i D-Flip/flop Hình 2.23 C ng khuy ch đ i (driver) ch t hai chi u Hình 2.24 C u hình t i thi u bo m ch CPU 8085, RAM/ROM/Ports Hình 2.25 M ch in cho hình 2.24 Hình 2.26 CPU Intel x86 Hình 2.27 Bo m ch v i t i thi u v i CPU 8086:BUS controller, Ng t controller, RAM Hình 2.28 CPU 8086 timing: l nh đ c Hình 2.29 Mơ hình ki n trúc Havard: P T IT Hình2.22 BUS cho b nh ch ng trình: Code Bus vƠ Code Address; BUS cho RAM d li u: Data Bus Data Address; SRC1, SRC2:ngu n, DST: đích, lƠ Bus n i b Hình 2.30 Các kh i ch c n ng c a CPU 8051/8052 Hình 2.31 CPU 8051: EEPROM, RAM bên kh n ng m r ng b nh t i 128 KB (64 KB code+64 KB data) Hình 2.32 Bo m ch v i CPU 8051/8052 Hình 2.33 Các kh i ch c n ng c a nhân 8XC251Sx Hình 2.34 CPU 8051 Hình 2.35 Phân ho ch đ a ch CPU 8051 Hình 2.36 Bo m ch v i CPU Intel 8051 RAM, ROM m r ng bên ngồi Hình 2.37 Mơ hình m t vi u n ki u PSoC hay PIC ki u Vi x lí m t Chip (Microprocessor-based system on a chip) 10 Xơy d ng H th ng nhúng 0°C to 100°C LM35D Note: The project code calculates the temperature in Fahrenheit and generates both Centigrade and Fahrenheit outputs to the serial port Temperature recorder : LM35 pinout Temperature recorder : pinout for the LM35DZ (from the top) Temperature recorder Circuit IT The LM35 is connected to analogue input AN0 which is also the data input line for programming the 12F675 using ICSP so you need a way of connecting the sensor and the programming input at the same time with the programming input overriding the sensor output (and not damaging the sensor!) T This is done here by using 1k resistor that reduces the current flowing back into the sensor and at the same time is not too large (so that the ADC can easily convert the sensor output value - the impedance must be equal to or smaller than 10k Ohm from the sensor) P The voltage reference for the circuit is taken from pin using a resistor divider giving a 2.5V reference This is simply done to increase the resolution of the ADC as for the LM35 only 0-1V is generated so you loose ADC range when using a 5V reference You could use a lower reference value but this value gives reasonable results Alternatively you could use an amplifier to scale the LM35 output up which would make the ADC less sensitive to noise but for this project it is simpler not to so Note: The large decoupling capacitor on the supply input of the 12F675 This reduces noise overall and gives a more consistent reading However using a plug block and ADC is not a very good idea as there is no ground plane and no control over current paths which you would be able control in a pcb In a commercial system the internal ADC is often not used at all as it is essential to separate the noise introduced to the ADC using separate grounds and shielding - some designs encase the ADC in a custom metal shield and along with a ground plane connecting to the shield gives the best possible result To overcome noise problems on the ADC the software averages the input readings so you get a better result Solderless breadboard 278 Xơy d ng H th ng nhúng P T IT Add the components (at top right to) the temperature recorder - wires and R3,R4,R5 and the LM35 temperature sensor (U4) and the decoupling capacitor C4 Learn about the tool used for creating this diagram LM35 Temperature Recorder Circuit diagram 279 P T IT Xơy d ng H th ng nhúng 280 P T IT Xơy d ng H th ng nhúng 281 Xơy d ng H th ng nhúng Learn about the tool used for creating this diagram Temperature recorder measurement accuracy The analogue reference for the ADC is taken from the power supply via a resistive divider to the 12F675 input pin and for the 7805 its accuracy is specified as ±5% so the accuracy of the ADC is only 5% due to the reference -the divider also introduces a 1% error giving a 6% error overall Note: Since the 7805 is only accurate to ±5% the accuracy of the temperature reading will be accurate to ±5% (plus errors in the ADC and temperature sensor itself and any noise introduced the the analogue input and the reference) However the reference source gives you the biggest error - the overriding accuracy - if you used a more accurate voltage supply then the ADC accuracy would become more important as well as the temperature sensor accuracy etc Temperature recorder Software IT Buy all the 12F675 Tutorial source code P Click here for more information T .with the MikroC project files and compiled hex files The software uses the Soft USART (transmit only) described in the previous tutorial and uses the built in MikroC routines to get the data from analogue input pin AN0 // Temperature recorder analogue input val = ADC_Read(0); // more code adds up 10 readings of ADC val = ((val/MAX_AVG)*122)/50; val = ((val*18)/10)+320; Software operation 282 Xơy d ng H th ng nhúng The most interesting parts of the software are shown above The variable val is an unsigned int so the maximum value it can store is 65535 The reference in use is 2.5V so for the 10bit ADC each ADC bit is worth 2.5/1023 = 2.44mV If you work out values generated for a maximum temperature of 100°C using the scale factor 2.44mV (or 244/100) 100 * 10mV = 1.0V 1.0V/2.44mV = 410 410 * 244 = 100,040 which will not fit into an unsigned int IT So this scale factor does not work for all input values By using a little maths it can be made to fit -you need to reduce the top number to fit e.g T 410 * 122 = 50,020 which does fit Dividing by 50 gets back to the correct scale factor of 244 P So the scale 122/50 works for all input values This is an example of avoiding the use of floating point variables which take up too much resources You can still make the system work but you have to be careful when using fixed types and you have to check all input values and outputs to make sure they fit Averaging Averaging would be better done in the PC as it has more resources - the same goes for calculating and displaying the temperature in Fahrenheit but this gives a demonstration of what you can Note: The RAM is used up since a bug in MikroC 5.0.0.3 puts strings int RAM - in future versions this will be corrected Typical output from the temperature recorder 283 Xơy d ng H th ng nhúng 96 RAW 234 C 741 F The left most value is the RAW ADC value, the next is the temperature sensor output in degrees centigrade and the next is the temperature sensor output in degrees Fahrenheit Note: You have to put in the decimal point so the above readings are: 234 C 23.4°C 741 F 74.1°F Bài đ c thêm: E380: Design of Embedded Systems Exercises IT Krzysztof Kuchcinski Department of Computer Science Lund Institute of Technology T The questions and exercise included in this material represent typical questions which can be asked to the contents of the lectures given through the course Design of Embedded Systems (E380) The structure of chapters follows directly the structure of the lectures P Most of the questions are typical for the course and can be asked during the examinations, however, it is not the intention to supply the examination questions The purpose is to give the guidance for students for preparation to examinations Introduction Give a short definition of embedded systems and discuss main features of such systems Illustrate your discussion with examples of embedded systems Discuss differences and similarities between embedded systems and general purpose workstations, desktop computers and portable computers What are basic characteristics of embedded systems? Discuss both inherent features of such systems as well as specific design process challenges Discuss and give a motivation why implementation of embedded systems using a single processor running a software implementation is not usually possible What are advantages and disadvantages of such a solution? Explain the term ``design space exploration'' What does it mean for embedded system design? What are typical design parameters which are included in a design space 284 Xơy d ng H th ng nhúng P T IT Design process is often controlled by the time-to-market requirement Explain this requirement and possible consequences on the design methodology Design Methodology Input to a system design is usually defined as system specifications and a set of functional and non-functional requirements Discuss system specification methods as well as different types of requirements What are basic features of good requirements? Discuss them briefly Discuss how design requirements can be created What is design flow? Give an example of design flow paradigm used for embedded system design Discuss different design flow approaches Compare them and point out similarities and differences between them Explain the ideas behind the following design flow models: o waterfall model, o spiral model, o stepwise refinement model, o top-down model, o bottom-up model Hardware/Software co-design methodology becomes popular for embedded systems Discuss basic ideas behind this methodology and compare it to a traditional design methodologies What are basic design steps in hardware/software co-design? Why this methodology can improve design process and design quality? Discuss a typical design methodology for embedded systems Where different design activities, such as design specification, design partitioning, component allocation, and communication synthesis are performed? 10 What are main design activities in communication synthesis? 11 What are IP-components Discuss briefly hard and soft IP-components and their role in a design process 12 Discuss different design verification methods and their advantages and disadvantages 13 Design automation tools are used in many design methodologies to help designer in solving tedious design activities Discuss theoretical limitations of design automation tools 14 Many design automation problems belong to the class of NP-complete or NP-hard problems Discuss briefly how this inherent complexity problem is solved in design automation tools What kind of algorithm are used? Specification Languages Discuss briefly what languages can be used for specification and implementation of embedded systems What are their related advantages and disadvantages VHDL is a hardware description language which is often used to specify, simulate and synthesis hardware for embedded systems Discuss basic VHDL constructs Hardware is inherently parallel and this need to be modeled in specification and design languages How VHDL supports parallelism for hardware specification 285 Xơy d ng H th ng nhúng VHDL simulator is implemented as an event-driven simulator Describe briefly the main idea of event-driven simulation How time is handled in this simulation paradigm Discuss how different modeling styles, such as structural, behavioral, and data-flow can be mixed in a single VHDL model Present briefly VHDL simulation mechanism Point out when VHDL code is executed and when time and signals are updated? What is a signal driver in VHDL simulator How is it used during simulation? How signals are updated by the simulator? What is delta delay in VHDL? How is it used during simulation? Give the values assigned to signals and variables by the part of the process code included below 10 P1: process 11 variable a, b : integer; 12 begin 13 : initial values of s1 = 0, s2 = 0, a = 0, b = 15 s1