Nghiên cứu tín hiệu ECG với giải pháp công nghệ ASIC sử dụng các linh kiện chủng loại FPGA cho các ứng dụng truyền thông

MUC LUC Miic luc Bang giai thich eac chu viet tat Danh sach nhung nguai tham gia de tai 4 Danh muc cac bieu bang so lieu Tom tat cac ket qua nghien euu chinh 6 BAO CAO TONG KET 6.1 Dat van de 6.2 Tong quan 6.3 Muc tieu va ngi dung nghien euu 6.4 Dia diem va thai gian nghien euu 6.5 Ket qua 6.6 Thao luan 6.7 Ket luan kien ngbi 6.8 Tai lieu tham khao PHU LUC 7.1 7.2 7.1 7.2 7.3 7.4 7.5 7.6 T6m tat de tai nghien ctru khoa hoc (T.Viet) Tom tat de tai nghien euu khoa hoe { l.Anh) Fhiet ke tren FPGA de loai on eho tin hieu ECG nha bien doi song eon Bia luan van tot nghiep bac dai hoc ve FPGA De cuang da duge phe duvet Hop dong duge thuc hien Tom tat ket qua nghien euu Phieu dang ki ket qua nghien euu OAI HOC QUOC GIA HA NOI TRUNG TAM THONG TIN THIJ VIEN I) q^^ 7 15 15 16 16 17 17 !8 20 28 41 43 44 BANG GIAI THIGH CAC TlT VIET TAT Ky hieu TiengAnh Tieng Viet AWGN Additive White Gaussian Noise Nhieu Gauss, trang cgng tinh BER Bit Error Rate Ty le bit loi CBl Cross Band Interference Nhieu giua cac bang CSA Carrier Serving Area Vung phue vu song mang DC Direct Current Dong dien mot chieu DC! Discrete Cosine Transform Bien doi Cosin roi rac DDS Digital Data Service Dich \ u dCr lieu so DFE Decision Feed-back Equalizer Bg can bang phan hoi qu>'et dinh DFT Discrete Fourier Transform Phep bien doi Fourier rai rac DMB Discrete Multi-Band Da bang rai rac DMT Discrete Multi'Fone Da am rai rac DMS Discrete MultiScale Da phan giai roi rac DSP Digital Signal Processing Xu ly tin hieu so DVVMT Discrete Wavelet Multitone Transform Bien doi da song rai rae DVVr Discrete Wavelet Transform Phep bien dot song roi rac FDM l-requencN Division Multiplexing Hop kenh phan chia thco tan so YVi Fast Fourier Transform Phep bien doi fourier nlianh FIR Finite Impulse Response Bg Igc dap ung xung hirti ban FPGA Field Programable Gate Array Ma tran cong kha lap trmh FWT i-ast Wavelet Transform Phep bien doi song nhanh HPF High-pass Filter Mach Igc thong cao IBI Inter-Band Interference Nhieu bang ICI Inter-CaiTier Interference Nhieu giu'a cac song mang IDFT Inverse Discrete Fourier Transform Phep bien doi Fourier rai rac ngirge IDWMT Inverse Discrete Wavelet Muhitone Phep bien doi da song roi rac Transform ngugc IDWF Inverse Discrete Wavelet Transform Phep bien doi ngugc song roi rac IEEE Institute of Electrical and Electronics Vien Ky thuat Dicn va Dien tu Engineers IFFT Inverse Fast Fourier Transform Phep bien doi ngugc eua phep bien doi Fourier nhanli ISl InterSymbol Interference Nhieu giua cac ki hieu LMSE Least Mean Squared Error Sai so binh phirang trung binh toi thieu LPF Low-Pass Filter Mach Igc thong tbap MCM Multi-Carrier Modulation Dieu che da song mang MFB Matched-Filter Bound Bien bg Igc hoa hgp MRA Multi-Resolution Approximated Gan dicing da phan giai MRSE Mean Redundacy Squared Error Loi binh phuang dir trung binli MMSE Minimum Mean Squared Error Loi binh phuang trung binh toi thieu MSSNR Maximum Shortening Signal-toNoise Ratio Lam ngan lai toi da t\ so tin hieu v:cn on PDF Probability Densitv Function Ham mat xac xucit PSD Power Spectrum Density Mat ce^ng suat SDE Scale Domain Equalizer Bg can bang mien phan giai SNR Signal to Noise Ratio T\ so cong biuii tin hicu U'cn iihicu STFT Space Time Frequency Transform Bien doi viine iho'i eian tan so DANH SACH N H L T N G NGlTOI THAiM GIA THL C HIEN DE TAI a Chu tri de tai : Ths Nguyen Quoc Tuan Bg mon He thong Vien thong Khoa Dien tir Vien thong Trirane Dai hoc Cone nehe - Dai hoc Quoc eta I ia no\ b Cac can bo tham gia Tran Quang Dat Mau van Phuo'ng Biii Trung Ninh Iran Thanh I lai Ths FIgc vien Cao bgc FIgc vien Cao hgc Cu nhan Truang Truang Fruang Truane Dai Dai Dai Dai bgc hgc bgc hoc Cong Cong Cong Cone nghe nghe nghe nehe DANH MUC CAC BANG SO LIEU, HINH VE Hinh 1: Tom tat luu thiet ke VHDL Hinh 2: Sa ngiiyen ly mach tin hieu ECG Hinh 3: So mach tin hieu ECG Trang 10 Trang 11 Trang 12 Hinh 4: Sa Ichoi he xu li tin hieu ECG Hinli 5: Mach chi tiet loai on tren DWT Trang 13 Trang 14 TOM TAT CAC KET QUA NGHIEN CUU CHINH C I A DE TAI Ten de tai: Nghien eim tin hieu ECG vai giai phap cong nghe ASIC sir dung cac linh kien chiing loai FPGA Chu tri de tai: ThS Nguyen Quoc Tuan - Khoa DTVT Ma so de tai: QC.07.12 Muc tieu nghien euu: - Nghien ciru tai lieu, thu thap tim hieu bo sung ve FPGA Tao san pham mau cong nghe Xilinx su dung FPGA Noi dung nghien ciiu: Nghien euu ngon ngir thiet ke VHDL: -H Lam chu ve phan mem thiet ke FPGA + Xay dung cac mach bien doi s6ng Phuong phap nghien ciiu - Nghien euu pham mem thiet ke ISE Foundation 8.0 cua hang Xilinx Nghien euu ung dung xu ly thong tin (dien tu xu ly so ) Ni^hien ciai cons neibe FPGA Ket qua nghien ciiu: San pham khoa hgc: T 01 bai bao dang tai tap chi Khoa hgc va Cong nghe DHQGHN San pham cong nghe: + 01 san pham cong nghe su dung cong nghe Xilinx San pham dao tao: + 01 kJioa luan tot nghiep dai hgc Hieu qua kinh te \a kha nang ap dung thuc te: ^ Cho cac dac \ a thu thap cac tin hieu y sinh -1- Cho cac thiet bi dien tu chu\en duns BAO CAO TONG KET 6.1 Dat van de : u nira cuoi the ky 20 eho den nay, tat ca cac cong nghe da phat trien manh nie lam tang cuang sue manh cua xa hoi Hau bet cac phat trien quan trgng ngoai cac dac trung cua tung Imh vuc deu dua vao nhirng phat tnen cua Cong nghe Thong tin v a dien tir truyen thong, gom ca phan cimg, phan mem va cac thuat toan lien quan Soi chi noi ket cac phan chinh la khai niem tich hgp thong minh: cac du lieu duge sap dat phan tich va bai toan duge giai quyet vai nhung phuang phap su' dune tri tue nhan tao Ve phan mem chung ta co cac khai niem quan trgng nhu xir ly ttr thicli nehi thong minh nhan tao phan mem nhung Ve phan cung, tich hgp cac vi mach cane cang cao, cac bg xu ly cang cang manh \'a nhat la cong nghe san xuat bg nha nga)' cang tra nen tinh vi Hien chung ta c6 the sir dung may tinh ca nhan cac bg vi xu ly tin hicti so (DSP) va cac bg phat trien phan cirng sir dung cong nghe FPGA de giai quyet mot \'an de Neu cbi su dung may tinh de giai quyet thi thiet bi rat cong kenh va gia cao Co nhCrng ap dung bai bue}c phai xu dung cac bg vi xu ly DSP de eo gia ihanh thap \a ggn nhe ho'n Tu}' nhien truang hgp chung ta can thiet ke cac giao dien de lien ket \'ai cac thiet bi khac nham hgp mot he thong thich hgp Cuoi cting ncu muon mot thiet ke dac biet de kiem chirng chat lugng va tinh kha thi cua mgi giai phap, chung ta c6 the dimg cong nghe FPGA cho phep chung ta thiel ke va \a\ dirne cac mach xu ly c6 chue nang nhu mong muon Dau tu cho phan ctrng va phan mem FPGA khong qua dat cac chip FPGA lap trinh lai duge sir dung duge nhieu Ian, \'i va\v cong cu FPGA rat thich hgp voi biroe dau tien chucmg trinh dao tao thicl kc vi dien tir Mot cac ung dimg khuon kho de tai SIS la xa\- dung he thone \ u li dua tren FPGA tich hgp DSP Doi tugng xu li lua chgn de tai na\' la cac tin hieu y sinh (tin hieu dien tam - ECG) 6.2 Tong quan cac van de nghien ciiu a) FPGA Field-programmable gate array (FPGA) la vi mach dung cau true mang phan tu logic ma nguai diing eo the lap trinh duge (ChuJ^eld a day muon chi den klrci nang tai lap trinli "ben ngoai'' ciia nguai su dung, Idiong phu thugc vao da} chu\cn ^an xuai phue tap ciia nha may ban dan) Vi mach FPGA duge cau tu cac bg phan: • • • Cac khoi logic ca ban lap trinh duge (logic block) Fie thong mach lien ket lap trinh duge Khoi vao/ra [10 Pads) Phan tu thiet ke san khac nhu DSP slice, RAM ROM nhan vi xu ly FPGA eung duge xem nhir mot loai vi mach ban dan chu\en dung -\SIC nhu'ne neu so sanh FPGA vai nhung ASIC dac che hoan toan hay ASIC thiel ke tren thir v ien logic thi FPGA khong dat duge muc toi uu nhu nhCrng loai na_\ va han che uvuig kha nang thuc bien nJiung lac vu dac biet phue tap tu)' \ay FPGA iru viet hon a cho CO the tai cau true lai kbi dang sir dung, cong doan thiet ke don gian va\ chi phi giam, rut ngan thai gian dua san pham vao sir dung Con neu so sanh \'ai cac dang vi mach ban dan lap trinh duge dung cau trhc mang phan tir logic nhu PAL CPLD thi FPGA uu \ iet ban cac diem: tac vu tai lap Irinh cua fPGA thuc hien don gian ban: kha nang lap trinh linh dgng ban: khac biel quan tri^ng nhat la kien true cua FPG.V cho phep no eo kha nang chira khoi lugng leVn cone logic (logic gate), so voi cac vi mach ban dan lap trinJi duge eo truac no Thiet ke hay lap trinh cho FPGA duge thuc hien chu yeu bang cac ngon wdu mo ta phan ctrng HDL nhu VHDL, Verilog .AHDL cac hang san xuat IPCiA Ion nhu' Xilinx Altera thuo'ng cung cap cac goi phan mem va thiel hi phu ira cho vjua tnnh thiet ke: cung c6 mot so cac hang thu ba cung cap cac goi phan mem kieu na\ niur S\nops>s, S\nplif\ Cac goi phan mem na\ c6 kha nang thuc hien tat ca cac btioe cua loan bg quy trinh thiet ke IC chuan \'ai dau vao la ma thiet ke tren HDL (con ggi la ma RTL) Kien true mai cua FPGA cho phep tinh hgp so krgng tiroug doi Ian cac phan tu ban dan vao vi mach so vo'i kien true truac la CPLD FPG.A co kha nane chua Un tu' 100.000 dSn hang vai ty cong logic, CPLD chi chua tir 10.000 den lOU.Oou cone loeic; so nav doi vai PAL PEA thap ban nira chi dat vai nehin de^n 10.000 • CPLD duge cau true tu so lugng nhat dinh cac Ichoi SPED [Simple programcible devices, thuat ngir chung chi PAL PEA) SPLD thuang la mot mang logic AND/OR lap trinh duge co kich thirae xac dinh va chua mot so lugng han che cac phan tir nha dong bg (clocked register) Cau true na\ han che kha nang thuc hien nhu'ng ham phtre tap va thong thtrang hieu suai lam viee cua vi mach phu thugc vao cau true cu the cua vi mach ban la vao \'eu cau bai toan • Kien true cua FPGA la kien true mang cac khoi logic kJioi logic, nho ban nhieu neu dem so sanh vai mot khoi SPLD, uu diem giup FPGA co the chua nhieu ban cac phan tir logic va phat huy toi da kha nang lap trinh cua cac phan tu logic va he thong mach ket noi de dat duge muc dich thi kien true cua FPGA phue tap ban nJiieu so vai CPLD Mot diem khac biel vai CPLD la nhCrng FPGA hien dai duge tich hgp nhieu nliCrng bg logic so bgc da so' bg toi uu boa ho trg I^-\M ROM toe cao bay cac bg nhan cong (mullication and acciimiikttion MAC), thuat ngCr tieng Anh la DSP slice dung cho nhirng ung dung xu ly tin hieu so DSP Ngoai kha nang tai cau true \ i mach toan cue mot so FPGA hien dai eon ho trg tai cau true cue bo arc la kha nane lai cau true mot bg phan rieng le Irong van dam bao boat eigng bmh thuang cho cae ho phan khac Lfng dung cua FPGA bao gom: xu ly tin hieu so DSP, cac he thong hang khong vu Iru quoc phong tien thiet ke mau ASIC (ASIC prototvping) cac he llione elieu khicn true quan, phan tich nhan dang anh, nhan dang tieng noi, mat ma hgc, mo hinh phan cij'ng may tiiili Do tinh linh dgng cao qua trinh thiet ke cho phep FPGA giai qu\ et lo'p nhCrne bai toan phiie tap ma truoe ebi thirc hien nho phan mem ma\" tmb ngoai nho' mat cong logic Ion FPGA duge ung dung eho nhCrng bai loan doi hoi khui luoive tinh toan Ian \'a dune trone cac he thone lam \aec theo tho'i eian ihirc b) VHDL VHDL la ngon ngir mieu ta phan cirng (VHSIC HardM-are Description Language) VHDL mieu ta boat dgng cua mach hay he thong dien tu de eo diroe mach hay he thong dien tu thuc VHDL duge ung dung cho bai thiet bi logic lap trinh dtrge la CPLD (Thiet bj logic lap trinh duge) va FPGA (cau true mang phan tu logic nta nguai dimg co the lap trinh duge) Mot cac tien ich chinh cua VFIDL la no cho phep to hgp mot mach dicn hay mot he thong vao mot thiet bi lap trinh duge Moi mgi v iei code \ 1IDL no CO the duge dung hoac de tao "mach dien^' cho ben Irong mot thiel bi co the lap trinli duge (cua Xillinx hay Altera Atmel ) hoac eo the duge e1e trinh de cung cap cho nha ma}' che tao chip ASIC Khac vai cac chuong trinli eho may tinh chi co the van hanh mot each trinh tu VFIDL duge coi la '"ma-code'" vi no cho phep van hanh song song Chi cae trang thai cua VHDL duge dai ben mot PROCESS, FbrN'CTlOX PRnLFDLRb la diroe van hanh trinli ttr Cnnipiliinoii 0;uL- ll.'^^ O i H K i u / i[|,in NMillK O j H l l t l i / i ' d (K'llisl