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Arithmetic Logic Unit(ALU) Arithmetic Logic Unit(ALU) Bởi: Wiki Pedia Trong CPU, số học logic (ALU - Arithmetic logic unit) mạch điện tử thực phép tính số học logic ALU phần tử CPU máy tính.Bộ vi xử lý chứa nhiều phức tạp ALU Nhà toán học John von Neumann phát minh lý thuyết ALU vào năm 1945, viết báo cáo cho EDVAC Ký hiệu Giản đồ ALU Giai đoạn sơ khai Bit ALU Texas Instruments SN74AS888 Năm 1946, von Neumann nghiên cứu sinh viên để thiết kế máy tính cho Viện nghiên cứu cao cấp Princeton (IAS) Princeton, New Jersey máy tính IAS trở thành tiền thân cho nhiều máy tính hệ sau Trong đề xuất, von Neumann phác thảo thứ quan trọng cần máy tính, bao gồm ALU 1/3 Arithmetic Logic Unit(ALU) von Neumann tin ALU cần thiết cho máy tính máy tính tính phép toán bao gồm cộng, trừ, nhân chia Hệ thống số Một ALU phải xử lí số sử dụng form với mạch điện tử Đó hệ nhị phân Việc biểu diễn số hệ thập phân cần đến mười ống bán dẫn Mỗi ALU có thiết kế khác nhau, theo qui tắc mã bù hai Từ đó, ALU dễ dàng tính toán phép cộng trừ Hệ thống mã bù hai cho phép phép trừ thực cách cộng thêm số đối số trừ vào số bị trừ Tổng quan Đa phần, phép toán thực hay nhiều ALU Một ALU load liệu từ ghi, điều khiển ALU tính toán lưu kết vào ghi kết Một hệ thống khác di chuyển liệu ghi nhớ Các phép toán đơn giản Một ví dụ ALU (2-bit ALU) thực AND, OR, XOR cộng Đa số ALU thực phép toán sau: • số nguyên (cộng, trừ, nhân and chia) • Bit logic (AND, NOT, OR, XOR) • Dịch bit 2/3 Arithmetic Logic Unit(ALU) Các phép toán phức tạp Một kỹ sư thiết kế ALU để tính toán, Tuy nhiên, vấn đề chỗ phép toán phức tạp, ALU đắt, xử lí lớn tốn nhiều lượng, vân vân Bởi vậy, Các kỹ sư thường xuyên phải tính toán cho cân bằng, cung cấp cho xử lí ALU mạnh đủ để chạy nhanh, không phức tạp Đó gọi software emulation Vào Ra Dữ liệu vào ALU thực operand mã lệnh từ điều khiển phép toán thực Dữ liệu kết xuất sau thực phép toán Có nhiều thiết kế ALU tự tạo sinh mã lệnh điều kiện cho liệu vào vào ghi trạng thái Những mã lệnh dùng để thị carry, tràn số, chia cho 0, vân vân ALU FPU Một dấu phẩy động (Số thực dấu phẩy động)(FPU - Floating point unit) thực phép toán hai giá trị, Nhưng chúng thực dựa dạng dấu phẩy động, phức tạp dạng mã bù hai ALU thông thường FPU chứa nhiều mạch điện tử phức tạp, bao gồm số ALU Thường, ALU thực phép toán số học với dạng số nguyên (như mã bù hai BCD), FPU tính toán dạng phức tạp dấu phẩy động, số phức, Xem thêm • • • • Vi mạch 7400 Vi mạch 74181 Mạch điện tử Control Unit 3/3 Algorithms Department of Computer Science University of Illinois at Urbana-Champaign Instructor: Jeff Erickson Teaching Assistants: • Spring 1999: Mitch Harris and Shripad Thite • Summer 1999 (IMCS): Mitch Harris • Summer 2000 (IMCS): Mitch Harris • Fall 2000: Chris Neihengen, Ekta Manaktala, and Nick Hurlburt • Spring 2001: Brian Ensink, Chris Neihengen, and Nick Hurlburt • Summer 2001 (I2CS): Asha Seetharam and Dan Bullok • Fall 2002: Erin Wolf, Gio Kao, Kevin Small, Michael Bond, Rishi Talreja, Rob McCann, and Yasutaka Furakawa • Spring 2004: Dan Cranston, Johnathon Fischer, Kevin Milans, and Lan Chen • Fall 2005: Erin Chambers, Igor Gammer, and Aditya Ramani • Fall 2006: Dan Cranston, Nitish Korula, and Kevin Milans • Spring 2007: Kevin Milans • Fall 2008: Reza Zamani-Nasab • Spring 2009: Alina Ene, Ben Moseley, and Amir Nayyeri • Spring 2010: David Morrison, Kyle Fox, and Rachit Agarwal • Fall 2010: Alina Ene c Copyright 1999–2011 Jeff Erickson. Last update July 8, 2011. This work may be freely copied and distributed, either electronically or on paper. It may not be sold for more than the actual cost of reproduction, storage, or transmittal. This work is licensed under a Creative Commons Attribution-NonCommercial-Share Alike 3.0 United States License. For license details, see http://creativecommons.org/licenses/by-nc-sa/3.0/us/. For the most recent edition of this work, see http://www.cs.illinois.edu/~jeffe/teaching/algorithms/. [...]... in 1971 The O(n log n) running time requires the standard assumption that O(log n)-bit integer arithmetic can be performed in constant time; the number of bit operations is O(n log n log log n) 8 A multiplicative group (G, ⊗) is a set G and a function ⊗ : G × G → G, satisfying three axioms: 1 There is a unit element 1 ∈ G such that 1 ⊗ g = g ⊗ 1 for any element g ∈ G 2 Any element g ∈ G has a inverse... categories imposed by their languages According to an extreme formulation of this principle, some concepts in one language simply cannot be understood by speakers of other languages, not just because of technological advancement—How would you translate ‘jump the shark’ or ‘blog’ into Aramaic?—but because of inherent structural differences between languages and cultures For a more skeptical view, see Steven... same techniques to analyze those resources as we use to analyze running time 0.5 A Longer Example: Stable Matching Every year, thousands of new doctors must obtain internships at hospitals around the United States During the first half of the 20th century, competition among hospitals for the best doctors led to earlier and earlier offers of internships, sometimes as early as the second year of medical... hospitals would regularly call doctors, offer them internships, and demand immediate responses Interns were forced to gamble if their third-choice hospital called first—accept and risk losing a better opportunity later, or reject and risk having no position at all.11 Finally, a central clearinghouse for internship assignments, now called the National Resident Matching Program, was established in the early... product of experience, not its replacement We can’t teach you how to do well in this class All we can do (and what we will do) is lay out some fundamental tools, show you how to use them, create opportunities for you to practice with them, and give you honest feedback, based on our own hard-won experience and intuition The rest is up to you Good algorithms are extremely useful, elegant, surprising,... anker, firkin, half-barrel, barrel, hogshead, pipe, well, river, and ocean (Every container in this list is twice as big as its predecessor, except that a firkin is actually 2.25 ankers, and the last three units are just silly.) BARLEYMOW(n): “Here’s a health to the barley-mow, my brave boys,” “Here’s a health to the barley-mow!” “We’ll drink it out of the jolly brown bowl,” “Here’s a health to the barley-mow!”... each one-digit addition Similarly, multiplying an [...]... performance in the future This book can be used as a text of an introductory course for graduate students or senior undergraduate students in electrical engineering, and computer and mathematical sciences It can also be used as a reference book for practicing engineers and computer scientists involved in the design, application and development of computer arithmetic units For the number systems covered in Sections... Lu received the M.S and Ph.D degrees in electrical engineering from Rice University, Houston, in 1984 and 1987, respectively She joined the Department of Electrical Engineering at Texas A&M University in 1987, where she is currently a professor Lu’s research interests include computer arithmetic, parallel computing, computer architectures, VLSI algorithms and computer networks, and she has published... conventional computer arithmetic methods, but also the unconventional ones are worth investigation in new designs Numbers play an important role in computer systems Numbers are the basis and object of computer operations The main task of computers is computing, which deals with numbers all the time Humans have been familiar with numbers for thousands of years, whereas representing numbers in computer systems. .. DifSerent Number Systems 12 1.2 Finding Signed Digits 14 1.3 Resewed Representation in IEEE Standard 21 2.1 f Delay Time and Area o Logic Gates 30 2.2 Logic Function o a Half-Adder f 32 2.3 f Logic Function o a Full-Adder 33 2.4 Single-Bit Subtractor 35 2.5 Negation in One’s Complement System 36 3.1 Maximum Inputs o CSA Trees f 71 4.1 Recoding the Triplets 92 5.1 Combination and Delay of k-input Wallace... technical papers in these areas In addition, Professor Lu has served as associate editor of the Journal of Computing and Information and the Information Sciences Journal, and was conference chairman of the Fifth, Sixth and Seventh International Conferences on Computer Science and Informatics She served on the panel of the National Science Foundation and the panel of the IEEE Workshop on Imprecise and Approximate... advisory committees for Ph.D and Masters students, is a registered professional engineer, and is a senior member of the Institute of Electrical and Electronics Engineers She is recognized in Who’s Who in the World (2001, 2003), Who‘s Who in America (2002-2003) and Who’s Who of American Women (2002-2003) xxi This Page Intentionally Left Blank 1 Computer Number Systems As the A LOW POWER DESIGN FOR ARITHMETIC AND LOGIC UNIT NG KAR SIN (B.Tech. (Hons.), NUS) A THESIS SUBMITTED FOR THE DEGREE OF MASTER OF ENGINEERING DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING NATIONAL UNIVERSITY OF SINGAPORE 2004 ACKNOWLEDGEMENTS I would like to express my deepest gratitude to all those who have directly or indirectly provided advice and assistance during the course of my research in the NUS. Assoc. Prof. Tay Teng Tiow (NUS), who has led me to the proposal of this project. He has provided invaluable guidance, suggestions and support throughout the course of research. During times of difficulties, he has also shown much understanding and patience, which makes this course a memorable part of my life. Mr Zhu Xiao Ping and Mr Pan Yan, for their times in several constructive discussions over technical and academic problems. These discussions often helped to clarify questions that are related to the research interest. Miss Rose Seah and Mr Teo King Hock, for their prompt logistic support in the lab, which provided me a conducive environment to work in the lab. i TABLE OF CONTENTS ACKNOWLEDGEMENTS i TABLE OF CONTENTS ii SUMMARY v LIST OF TABLES vii LIST OF FIGURES viii LIST OF SYMBOLS x CHAPTER INTRODUCTION 1.1 Background 1.2 Related Work 1.3 Project Proposal 1.4 Project Overview 1.5 Scope of Project 1.6 Thesis Organization 10 CHAPTER THE ARITHMETIC AND LOGIC UNIT DESIGN 2.1 ALU Design 12 2.2 Hardware Components 15 2.2.1 Decode and Control Unit 15 2.2.2 Functional Units 16 2.2.3 Register File 17 2.3 Software Instruction Scheduler 20 ii 2.3.1 2.4 Avoiding Hazards with Wait States Chapter Summary 21 22 CHAPTER THE ARITHMETIC AND LOGIC UNIT HARDWARE 3.1 CMOS Circuits 24 3.1.1 Circuit Design 24 3.1.1.1 CMOS Logics 24 3.1.1.2 Circuit Size 26 3.1.1.3 Simulation 26 Power Consumption 26 3.1.2.1 Dynamic Switching Power 28 3.1.2.2 Short Circuit Current Power 29 3.1.2.3 Leakage Current Power 31 3.1.2 3.2 3.3 Functional Units 33 3.2.1 Circuit Models 33 3.2.2 Circuit Synthesis 34 3.2.3 Logic and Bit Operation Circuits 37 3.2.4 Addition Circuits 38 3.2.5 Subtraction Circuits 42 3.2.6 Multiplication Circuits 44 3.2.7 Division Circuits 47 Analysis 51 3.3.1 Power Saving 51 3.3.2 Optimal Clock Period 52 3.3.3 Area Penalty 55 iii 3.4 Chapter Summary 55 CHAPTER THE SOFTWARE INSTRUCTION SCHEDULER 4.1 4.2 4.3 4.4 Instruction Scheduling 57 4.1.1 Background 57 4.1.2 Scheduling Algorithms 58 4.1.3 Performance Optimality 59 Software Instruction Scheduler 61 4.2.1 Introduction 61 4.2.2 Scheduling Process 62 4.2.2.1 Initialization Phase 63 4.2.2.2 Scheduling Phase 66 Analysis 75 4.3.1 Good and Bad cases 75 4.3.2 Statistics and Power Savings 78 Chapter Summary 80 CHAPTER CONCLUSIONS 5.1 Conclusions 81 5.2 Future Work 84 APPENDIX 87 BIBLIOGRAPHY 97 iv SUMMARY The rise of portable devices with wireless network connections has lead to demands on microprocessors to deliver high performance and yet consume low power. This project works on a design for a single-issue 32-bit integer pipelined ALU that comprises two kinds of functional units: one with fast performance and high power consumption and another with slow performance and low power consumption. Both are used to execute instructions, but slow functional units are used whenever possible, for the reason of reducing power consumption. The ALU architecture comprises a Control Unit, Register File and the mentioned functional units. To make use of this architecture effectively, an offline software instruction scheduler is used to identify and create specific situations for the slow functional unit to be used. The specific situations occur when: 1. there are no subsequent instructions depending on the current instruction; 2. the current instruction has been scheduled for advanced execution; 3. the dependent subsequent instructions ... ALU thực phép toán sau: • số nguyên (cộng, trừ, nhân and chia) • Bit logic (AND, NOT, OR, XOR) • Dịch bit 2/3 Arithmetic Logic Unit(ALU) Các phép toán phức tạp Một kỹ sư thiết kế ALU để tính toán,.. .Arithmetic Logic Unit(ALU) von Neumann tin ALU cần thiết cho máy tính máy tính tính phép toán bao gồm cộng,

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