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Digital Frequency Synthesis Demystified

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Digital Frequency Synthesis Demystified DDS and Fractional-N PLLs Bar-Giora Goldberg a volume in the Demystified series Eagle Rock, VA www.LLH-Publishing.com Library of Congress Cataloging-in-Publication Data Goldberg, Bar-Giora Digital frequency synthesis demystified / Bar-Giora Goldberg p cm “A volume in the Demystified series.” Includes bibliographical reference and index ISBN 1-878707-47-7 (pbk : alk paper) Frequency synthesizers Design and construction Phase -locked loops Digital electronics I Title TK7872.F73G55 1999 621.3815 486 dc21 99-34856 CIP Copyright © 1999 by LLH Technology Publishing All rights reserved No part of the book may be reproduced, in any form or means whatsoever, without written permission from the publisher While every precaution has been taken in the preparation of this book, the publisher and author assume no responsibility for errors or omissions Neither is any liability assumed for damages resulting from the use of the information contained herein Printed in the United States of America 10 Cover design: Sergio Villareal Developmental Editing: Carol Lewis Production: Kelly Johnson Eagle Rock, VA www.LLH-Publishing.com To Moshe, Shoshana, Pnina, Amit, and Dror This is a blank page Contents Prefaces Symbols xi xv Chapter Introduction to Frequency Synthesis 1-1 Introduction and Definitions 1-2 Synthesizer Parameters 1-2-1 Frequency Range 1-2-2 Frequency Resolution 1-2-3 Output Level 1-2-4 Control and Interface 1-2-5 Output Flatness 1-2-6 Output Impedance 1-2-7 Switching Speed 1-2-8 Phase Transient 1-2-9 Harmonics 1-2-10 Spurious Output 1-2-11 Phase Noise 1-2-12 Standard Reference 1-3 Auxiliary Specifications 1-4 Review of Synthesis Techniques 1-4-1 Phase-Locked Loop 1-4-2 Direct Analog Synthesis 1-4-3 Direct Digital Synthesis 1-5 Comparative Analysis 1-6 Conclusion References Chapter Frequency Synthesizer System Analysis 2-1 2-2 2-3 2-4 Multiplying and Dividing Phase Noise Spurious and Phase Noise in PLL Phase Noise Mechanism 2-4-1 Noise in Dividers 2-4-2 Noise in Oscillators 2-4-3 Noise in Phase Detectors 2-5 Mixing and Filtering 2-6 Frequency Planning References 1 6 7 7 10 10 13 13 13 14 21 26 35 37 38 39 39 42 49 51 51 51 52 53 55 56 v vi Contents Chapter Measurement Techniques 3-1 Switching Speed 3-2 Phase Noise 3-2-1 FM Noise 3-2-2 Delay Line Discriminator 3-2-3 Integrated Phase Noise 3-2-4 Noise Density 3-3 Phase Continuity 3-4 Spurious Signals (Especially DDS) 3-5 Phase Memory 3-6 Step Size 3-7 Linear FM 3-8 Conclusion References Chapter DDS General Architecture 4-1 4-2 4-3 4-4 Digital Modulators and Signal Reconstruction Pulse Output DDS of the First Order Pulse Output DDS of the Second Order Standard DDS 4-4-1 Binary-Coded Decimal DDS 4-5 Randomization 4-5-1 Wheatley Procedure 4-5-2 Randomizing Sine Output 4-6 Quantization Errors 4-6-1 Digitized Model 4-7 Logic Speed Considerations 4-8 Modulation 4-9 State-of-the-Art Components and Systems 4-9-1 Very High-Speed Direct Digital Synthesizer 4-9-2 Medium-Speed Direct Digital Synthesizer 4-10 Performance Evaluation 4-10-1 Switching Speed 4-10-2 Phase Noise 4-10-3 Spurious Signals 4-10-4 Phase Continuity 4-10-5 Resolution 4-11 Sample-and-Hold Devices 4-12 Single-Bit DDS Revisited 4-13 Arbitrary Waveform Generators 4-14 Digital Chirp DDS 4-15 Conclusion Appendix 4A DDS Applications Appendix 4B DDS—Spectra and the Time Domain Appendix 4C Sampling Theorem Appendix 4D The Effect of Phase Noise on Data Conversion Devices References 57 57 61 62 63 66 66 66 67 69 69 70 70 71 73 75 82 87 89 100 105 106 108 109 109 120 120 128 128 129 133 133 133 134 134 134 134 135 138 140 140 141 143 157 159 160 Contents Chapter Phase-Locked Loop Synthesizers 5-1 Main Components of PLL Synthesis 5-1-1 Voltage Controlled Oscillators 5-1-2 Analog Phase Detector 5-1-3 Digital Phase Detector 5-1-4 Digital Phase Detector 5-1-5 Digital Phase Detector 5-1-6 Digital/Analog Phase Detector 5-1-7 Dividers 5-2 Performance Evaluation 5-2-1 Wireless PLL ASIC Configuration 5-3 Fractional-N Synthesizers 5-3-1 Fractional-N Synthesis of the First Order 5-3-2 Fractional-N Synthesis of the Second Order 5-4 Fractional-N Synthesis of the Third Order 5-5 DDS-Based PLL 5-5-1 Speed Up 5-6 Single-Chip PLL Synthesis 5-7 Conclusion References Chapter Accumulators 6-1 Binary Accumulators 6-2 Decimal Accumulators 6-3 Interface to ROM 6-4 Accumulator DDS 6-5 Phase Adder and Accumulator Segmentation 6-6 Conclusion References Chapter Lookup Table and Sine ROM Compression 7-1 7-2 7-3 7-4 7-5 7-6 7-7 7-8 ROM Algorithm Quadrant Compression Compression Principles Direct Taylor Approximation Hutchison Algorithm Sunderland Algorithm Variations and Randomization Auxiliary Function ROM Approximation 7-8-1 Spurious Signal Analysis 7-9 Coordinate Transformation (CORDIC) 7-10 Other Methods 7-11 Conclusion References vii 163 164 165 168 172 175 176 177 180 184 198 201 204 216 220 224 226 227 230 235 237 237 245 246 248 248 250 250 251 252 256 259 260 262 266 269 271 274 275 278 279 280 viii Contents Chapter Digital-to-Analog Converters 281 8-1 DAC Performance Evaluation 8-2 DAC Principles of Operation 8-3 DAC Parameters 8-3-1 Update Rate 8-3-2 Resolution 8-3-3 Logic Format 8-3-4 Setup-and-Hold Time 8-3-5 Rise, Fall, and Settling Times 8-3-6 Propagation Delay Time 8-3-7 Differential Linearity 8-3-8 Integral Nonlinearity 8-3-9 Monotonicity 8-3-10 Multiplying Bandwidth 8-3-11 Glitch Energy 8-3-12 Symmetry 8-4 State-of-the-Art DACs 8-4-1 Low-Speed Operation 8-4-2 Medium-Speed Operation 8-4-3 Very High-Speed Operation 8-4-4 Other Recommended DACs 8-5 Sine-Wave DAC 8-6 Multiplexing References 282 285 292 292 292 293 293 293 294 294 294 295 295 295 296 296 296 298 298 299 299 299 303 Chapter Synthesizers in Use and Reference Generators 9-1 Synthesizers in Use 9-1-1 Hewlett-Packard 3325B 9-1-2 Hewlett-Packard 8662A 9-1-3 Program Test Sources 310 9-1-4 Comstron/Aeroflex FS-2000 9-1-5 Schomandl Models ND500 and ND1000 9-1-6 Stanford Research DS345 9-2 Reference Generators 9-2-1 General Review 9-2-2 Crystal Oscillators 9-3 Conclusion References Chapter 10 Original Paper and Software 10-1 Tierney, Rader, and Gold Article 10-2 Software Description Index 333 305 305 306 307 307 309 309 309 313 314 316 319 319 321 321 322 ABOUT THIS BOOK AND CDROM This book—the latest volume in our popular Demystified series of technical references—is an updated version of an earlier text, Digital Techniques in Frequency Synthesis, published by McGrawHill In addition to the updated text, a CDROM has been added that contains an assortment of design tools, including an informative new reference in pdf format from Analog Devices called A Technical Tutorial on Digital Signal Synthesis The CDROM also includes a fully searchable pdf file of the entire book contents For a full list of the CDROM contents, see Chapter 10 ABOUT THE AUTHOR Bar-Giora Goldberg received his education at the TechnionIsrael Institute of Technology in Haifa, and he worked there for 10 years in communication and spread-spectrum systems In 1984 he cofounded Sciteq Electronics, a world leader in the field of digital frequency synthesis, and he now heads Vitacomm, a company dedicated to frequency and time engineering products for wireless and high-speed telecommunications Giora has written extensively, has been awarded several patents, and has been a major contributor to the introduction and development of DDS and fractional-N technologies He is also associated with Besser Associates in the US and Continuous Education International (CEI) in Europe, companies dedicated to continuous education via seminars and on-line courses ix ... transformation digital- to-analog converter decibel dB referred to carrier dB over mW direct digital frequency synthesizer direct digital synthesis error input frequency modulating frequency output frequency. .. Bar-Giora Digital frequency synthesis demystified / Bar-Giora Goldberg p cm “A volume in the Demystified series.” Includes bibliographical reference and index ISBN 1-878707-47-7 (pbk : alk paper) Frequency. .. the advance of traditional PLL synthesis, there emerged other synthesis techniques, mainly digital in nature, direct digital synthesis (DDS) and fractional-N PLL synthesis Thus, the classical

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