Tiểu luận môn Giải thuật nâng cao chủ đề Virtual Memory Run multiple processes, each with its own address space main memory can’t contain all. Many processes use only a small part of space Small parts : main memory Other parts : disk Virtual memory : technique of sharing main memory among many processes. Main mem ~ cache for the disk
LOGO Virtual Memory Nhóm 5 11070459 - Thái Tiểu Minh 11070460 - Nguyễn Kim Ngân 13070249 - Lê Minh Nam 13070250 - Trần Đức Nghĩa 13070251 - Phạm Ích Trí Nhân 13070247 - Trần Thị Mi 1 Contents A Introduction B Replacement C Segmentation D Protection E Examples 2 A Introduction Reasons for using virtual memory Share main memory Simplify memory management Provide protection What is a virtual memory? Memory Hierarchy Virtual memory vs Cache 3 1 Reason 1 Run multiple processes, each with its own address space main memory can’t contain all Many processes use only a small part of space Small parts : main memory Other parts : disk Virtual memory : technique of sharing main memory among many processes Main mem ~ cache for the disk 4 1 Reason 2 A program is too large for main mem programmers have to make it fit (*) Program is devided into pieces mem/disk Only “active” code, data : main mem Virtual memory : Relieves progammer’s job Automatically manages memory accesses between main memory and disk (secondary storage) Simplify memory management 5 1 Reason 3 Virtual memory : One process can’t interfere with another • Because they operate in different address spaces User process cannot access privileged information • Different sections of address spaces have different permissions Provide protection 6 2 Memory Hierarchy Cache CPU CPU regs regs 8B Virtual memory 32 B Cache Register Cache 4 KB Memory Memory Memory Disk Disk Disk Memory size: 32 B 32 KB-4MB 4096 MB 1 TB speed: 0.3 ns 2 ns? 7.5 ns 8 ms $75/MB $0.014/MB $0.00012/MB 32 B 4 KB $/Mbyte: line size: 4B larger, slower, cheaper 7 2 Virtual Memory 8 2 Virtual Memory Virtual memory = memory on disk Virtual memory : logical address (virtual address) Main mem : physical address Contains blocks from main mem and disk Controlled by operation system Auto overlay (+) Virtual continuous address space (+) Size ~ disk size, speed ~ main mem speed (+) Programmers don’t care about mem size run more larger processes 9 3 Virtual Memory vs Cache 10 Address Translation Addressing 8 14-bit virtual addresses (virtual mem size = 2 ) 6 12-bit physical addresses (phy mem size = 2 ) 6 Page size = 64 bytes = 2 Offset = 6bit (Virtual Page Offset) (Virtual Page Number) V# 13 12 11 10 VO 9 8 7 P# (Physical Page Number) 51 6 5 4 3 2 1 PO (Physical Page Offset) 0 TLB (Translation Look-aside Buffer) 4-way Associative TLB 2 TLBIndex = 2bit (do 2 set) 8 2 TLBTag = lg(virtual size/sets) = lg(2 / 2 ) = 6bit TLBTag 13 12 11 10 I 9 8 7 6 5 4 3 V# 2 1 0 VO Set Tag P# Valid Tag P# Valid Tag P# Valid Tag P# Valid 0 03 – 0 09 0D 1 00 – 0 07 02 1 1 03 2D 1 02 – 0 04 – 0 0A – 0 2 02 – 0 08 – 0 06 – 0 03 – 0 3 07 – 0 03 0D 1 0A 34 1 02 – 0 52 Page Table Only show first 16 entries (max 28 = 64 entries) VPN : 0000.1000 08; … PPN : 10.1000 28; 11.0011 33 V# (8) P# (6) Valid(1) V# P# Valid 00 28 1 08 13 1 01 – 0 09 17 1 02 33 1 0A 09 1 03 02 1 0B – 0 04 – 0 0C – 0 05 16 1 0D 2D 1 06 – 0 0E 11 1 07 – 0 0F 0D 1 53 Cache Cache 16 lines, 4-byte line size, Direct mapped CTag 11 10 9 CIndex 8 7 6 5 4 CO 3 P# 2 1 0 PO Idx Tag Valid B0 B1 B2 B3 Idx Tag Valid B0 B1 B2 B3 0 19 1 99 11 23 11 8 24 1 3A 00 51 89 1 15 0 – – – – 9 2D 0 – – – – 2 1B 1 00 02 04 08 A 2D 1 93 15 DA 3B 3 36 0 – – – – B 0B 0 – – – – 4 32 1 43 6D 8F 09 C 12 0 – – – – 5 0D 1 36 72 F0 1D D 16 1 04 96 34 15 6 31 0 – – – – E 13 1 83 77 1B D3 7 16 1 11 C2 DF 03 F 14 0 – – – – 54 Example 1 – TLB hit & Page hit Virtual Address 0x03D4 4 D 3 0 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 1 1 1 0 1 0 1 0 0 0 1 F 8 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 1 1 1 0 1 0 1 0 0 V#=0F VO=18 TLBT=03 0 TLBI=3 3 3 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 1 1 1 0 1 0 1 0 0 Example 1 – TLB hit & Page hit TLBT=03 Virtual Address 0x03D4 TLBI=3 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 1 1 1 0 1 0 1 0 0 Looking in TLB : TLB Index check TLB Tag check Valid bit TLB Index = 3 Tag 03 exists & Valid = 1 TLB hit ( Page hit) P# = 0D Set Tag P# Valid Tag P# Valid Tag P# Valid Tag P# Valid 3 07 – 0 03 0D 1 0A 34 1 02 – 0 56 Example 1 – TLB hit & Page hit Virtual Address 0x03D4 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 1 1 1 0 1 0 1 0 0 VO=18 Physical Address D 0 11 10 9 8 7 6 5 4 3 2 1 0 0 0 1 1 0 1 0 1 0 1 0 0 P#=0D PO=18 CT=0D CI=5 0 D CO=0 5 0 11 10 9 8 7 6 5 4 3 2 1 0 0 0 1 1 0 1 0 1 0 1 0 0 57 Example 1 – TLB hit & Page hit Physical Address CT=0D CI=5 CO=0 11 10 9 8 7 6 5 4 3 2 1 0 0 0 1 1 0 1 0 1 0 1 0 0 Looking in Cache Cache Index check Cache Tag check valid bit Index = 5 Tag 0D exists & valid = 1 Cache hit Offset = 0 take B0 : byte 36 Idx Tag Valid B0 B1 B2 B3 5 0D 1 36 72 F0 1D 58 Example 1 – TLB hit & Page hit TLBT=03 Virtual Address 0x03D4 TLBI=3 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 1 1 1 0 1 0 1 0 0 V#=0F VO=18 CPU TLB : TLB Hit (Index,Tag), Page Hit P# = 0D Physical Address CT=0D CI=5 CO=0 11 10 9 8 7 6 5 4 3 2 1 0 0 0 1 1 0 1 0 1 0 1 0 0 P#=0D Cache : Cache Hit Byte : 36 59 PO=18 Example 1 - TLB hit & Cache hit data data virtual physical addr addr hit Processor hit TLB miss Cache Main Memory miss Page hit Page OS Fault Table Handler page fault/ protection violation 60 Disk Memory Example 2 – TLB miss & Page hit data data virtual physical addr addr hit Processor hit TLB miss Cache Main Memory miss Page hit Page OS Fault Table Handler page fault/ protection violation 61 Disk Memory Example 2 – TLB miss & Page hit TLBT=02 Virtual Address 0x028F TLBI=2 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 0 1 0 0 0 1 1 1 1 V#=0A VO=0F TLB : TLB Miss (Index,Tag), Page Hit(V#) P# = 09 Physical Address CT=09 CI=3 CO=3 11 10 9 8 7 6 5 4 3 2 1 0 0 0 1 0 0 1 0 0 1 1 1 1 P#=09 Cache : Cache Miss Byte : ?? (main mem) 62 PO=0F Example 3 – TLB miss & Page fault data data virtual physical addr addr hit Processor hit TLB miss Cache Main Memory miss Page hit Page OS Fault Table Handler page fault/ protection violation 63 Disk Memory Example 3 – TLB miss & Page fault TLBT=00 Virtual Address 0x0040 TLBI=1 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 V#=01 VO=00 TLB : TLB Miss (Index,Tag), Page Fault(V#) P#=… Physical Address CT 11 10 9 CI 8 7 P# Byte : ?? (disk or nonexistent) 64 6 5 4 CO 3 2 PO 1 0 LOGO Thank You ! 65 ... $/Mbyte: line size: 4B larger, slower, cheaper Virtual Memory Virtual Memory Virtual memory = memory on disk Virtual memory : logical address (virtual address) Main mem : physical address... Introduction Reasons for using virtual memory Share main memory Simplify memory management Provide protection What is a virtual memory? Memory Hierarchy Virtual memory vs Cache Reason ... permissions Provide protection Memory Hierarchy Cache CPU CPU regs regs 8B Virtual memory 32 B Cache Register Cache KB Memory Memory Memory Disk Disk Disk Memory size: 32 B 32 KB-4MB 4096 MB