TỔNG HỢP CÁC BÁO CÁO KHOA HỌC VỀ BẢO VỆ VÀ TỰ ĐỘNG HÓA TRONG HỆ THỐNG ĐIỆN CỦA BỘ MÔN HỆ THỐNG ĐIỆN (ĐẠI HỌC BÁCH KHOA HÀ NỘI)

CÁC BÁO CÁO BAO GỒM: 1. An Improved Control Strategy for Hybrid Series Active Filter dealing with Unbalanced Load (Thầy Nguyễn Xuân Tùng). 2. Xác định vị trí và dung lượng bù tối ưu trong lưới phân phối hình tia (Optimal Capacitor Placement and Sizing for Radial Distribution Networks). (Thầy Nguyễn Đức Huy). 3. Impacts of Inverterbased Distributed Generation Control Modes on Shortcircuit Currents in Distribution Systems. (Thầy Đào Văn Tú)

BỘ MÔN HỆ THỐNG ĐIỆN

An Improved Control Strategy for Hybrid Series Active Filter

dealing with Unbalanced Load

This paper presents an improved control strategy for hybrid series active power filter (HSAF) working

with nonlinear and unbalance three-phase three-wire loads An algorithm based on the Instantaneous Power

Theory is introduced to precisely extract only harmonic component from supply current, even this current is

contaminated with negative sequence component due to the imbalance of load An improved control strategy

based on that sequence extraction algorithm is proposed and investigated in detail by numerical simulation

The proposed control method has shown a better performance in mitigating harmonics, especially for the

nonlinear and unbalanced loads

Keywords: Series active filter, Instantaneous power theory, Unbalanced load, Harmonic isolation.

The increasing use of power electronics-based loads

(adjustable speed drives, switch mode power supplies,

etc.) is responsible for the rise in harmonic distortion

levels These nonlinear loads appear to be prime sources

of harmonic distortion in a power distribution system

Harmonics have a number of undesirable effects on the

distribution system such as the excessive voltage

distor-tion, increasing resistive losses or voltage stresses In

addition, the harmonic currents can interact adversely

with a wide range of power system equipment such as

capacitors, transformers, and motors, causing additional

losses, overheating, and overloading Because of the

ad-verse effects that harmonics have on equipments, many

solutions have been developed to deal with harmonic

control(1)∼(3)

Besides conventional solutions such as passive filters,

the hybrid series active power filters have proven to be

an interesting alternative to compensate harmonics in

power distribution systems Compared to passive

fil-ters, active filters provide superior filtering performance,

more flexible operation and more compact There are

various series hybrid active power filter topologies

re-ported in literature(4)∼(6), but the most common one is

shown in Fig 1

Figure 1 shows the system configuration of series

hy-brid active power filter (APF), in which the shunt

pas-sive filter consists of one or more single-tuned LC

fil-ters and/or a high pass filter (HPF) The hybrid

se-ries APF is controlled to act as a harmonic isolator

be-tween the source and nonlinear load by injection of a

∗Shibaura Institute of Technology

3-7-5, Toyosu, Koto-ku, Tokyo 135-8548

∗∗Tohoku Electric Power Co.,Inc.

7-2-1, Nakayama, Aoba-ku, Sendai, Miyagi 981-0952

Fig 1 Typical system configuration of hybrid ries active power filter

se-controlled harmonic voltage source It is se-controlled tooffer zero impedance at the fundamental frequency andhigh impedance (ideally open circuit) at all undesiredharmonic frequencies This forces all harmonic load cur-rents to flow into the passive filter and decoupling thesource and nonlinear load at all frequencies, except atthe fundamental

Control algorithm of the series active power filter

is mostly based on the Instantaneous Power Theory

dq transform) (11)∼(15) Basically, all those existing trol schemes calculate the harmonic current referencesignal based on the separation of fundamental positivesequence component and other “harmonic” components

con-In detail, the harmonic contents (i h) are determined byexcluding the fundamental component from measuredsupply current as presented in Eq 1:

[i h ] = [i s]− [i f p] · · · (1)

here

• i s: measured supply current

• i f p: fundamental positive sequence component ofcorresponding supply current

The high impedance imposed by the series active powerfilter is achieved by generating an appropriate voltage of

the same frequency with that of the harmonic current

component as shown below:

[v F ] = K × [i h] · · · (2)

with K is the amplification factor.

The performance of the active power filter depends

mainly on the selected reference generation scheme The

reference current must reflex the desired compensation

current, however, since the Eq 1 is used, certainly the

“harmonic” component here comprises all other current

components those differ from fundamental positive

se-quence current Therefore this extraction method gives

the true harmonic component if the load is assumed to

be perfectly balanced

In a quite common situation, the load current is usually

unbalanced with the existence of fundamental negative

sequence current Consequently, that negative sequence

current will present in the extracted harmonic

compo-nent i hif Eq 1 is still utilized although it is not a real

“harmonic” component In this case, the series active

filter would have to handle not only the real harmonic

current but also the undesirable fundamental negative

sequence current As a result, the controller would force

the series active filter to generate the compensating

volt-age at fundamental frequency and this could increase

significantly the power rating of the PWM converter and

also induce high voltage oscillations at double the

sys-tem frequency in dc link(16)

Literature on series active filter shows that so far no

attempt has been made to deal with unbalanced load

and that is a disadvantageous point of the existing

con-trol strategies In this paper, an improved concon-trol

strat-egy based on Instantaneous Power Theory is proposed

which will ensure that the series active power filter work

with only the harmonic components even the load is

un-balanced

This paper firstly introduces the Instantaneous Power

Theory, and then discusses the basic principle and

scheme used to extract positive and negative sequence

components Next, control strategy is presented in

de-tails Finally, the numerical simulations are carried out

to validate the feasibility and effectiveness of this

pro-posal

ap-plication

2.1 Brief review of Instantaneous Power

The-ory The Instantaneous Power Theory(16)is well

uti-lized for control system of active filter Control strategy

based on this method provides fast response to changes

in power system, good compensating performance and

imposes a little computational burden(17) (18)

Figure 2 shows the calculation block of this theory:

Firstly, three-phase voltages and load currents are

trans-formed into the stationary α-β reference frame (Clarke

According to Instantaneous Power Theory, p and q can

be decomposed into average parts ¯p, ¯ q (dc parts) and

oscillating parts ˜p, ˜ q as shown in Eq 6:

p = p + ˜¯ p

q = q + ˜¯ q · · · (6)

Where the ¯p, ¯ q are the dc components corresponding to

the product of fundamental positive sequence quantities,and ˜p, ˜ q are the ac components corresponding to prod-

uct of other components those differ from fundamentalpositive sequence components

By using a high-pass filter, the oscillating components

˜

p, ˜ q can be extracted from p, q and then the reference

harmonic current can be obtained as follow:

Next, those reference currents go through an inverse α-β

transform to generate the reference current in

conven-tional three-phase abc frame.

2.2 Consideration in case voltage and current

cur-rent are distorted (due to the presence of high orderfrequency harmonic components) and unbalanced (withthe existence of the fundamental negative sequence com-ponent) then the resulted oscillating power components

˜

p, ˜ q will be the cross products of not only the harmonic

components but also the fundamental negative sequencecomponents(16) In other words, the oscillating powercomponents ˜p, ˜ q contain the fundamental negative se-

quence components

Consequently, if the reference current signals are ated based on those power components then they wouldcontain both negative sequence and harmonic compo-nents rather than only harmonic components as ex-pected This fact raises a need to develop a methodwhich can precisely extract only harmonic currents de-spite of the presence of the fundamental negative se-quence component

An Improved Control Strategy for Hybrid Series Active Filter dealing with Unbalanced Load

current

the existing control strategies for the series active power

filter determine the reference currents i hby simply

sub-tracting the fundamental positive sequence current from

the supply current as below:

[i h ] = [i s]− [i f p] · · · (8)

This approach has shown many disadvantages as already

mentioned in Sec 1 since the reference current i h will

contain the fundamental negative sequence current

com-ponent if load is unbalanced In order to overcome

this drawback, the improved reference current

extrac-tion method is proposed as follow:

[i h ] = [i s]− [i f p]− [i f n] · · · (9)

where i s , i f p , i f nare the measured supply current,

fun-damental positive and negative sequence current

com-ponents of corresponding supply current respectively

The improved reference current extraction method

dif-fers from previous proposals since it eliminates not only

the fundamental positive sequence current but also the

fundamental negative sequence current from the supply

current to form the harmonic reference current

Because i s is already measured, the remaining task of

determining the harmonic reference current based on

new proposal is to extract the positive and negative

se-quence components (two last components at right side

of Eq 9) In this paper, the sequence current

compo-nent extraction implementation is completely based on

the Instantaneous Power Theory Basically, it includes

following steps:

• Generate an auxiliary voltage which contains only

a pure fundamental positive or negative sequence

voltage

• This auxiliary voltage will be used together with

ori-gin supply current to create the instantaneous power

components

• Implement filtering processes to achieve the desired

power portions from those power components then

applying inverse transformation to generate the

cor-responding current

The role of the auxiliary voltage will be fully described

in next section

Con-sidering an auxiliary voltage that contains only

funda-mental positive sequence componentV+1with phase

an-gle φ+1 assumed to be zero then the α-β transform of

this voltage results in:

v +1α = √

3V+1sin (ω1t)

v +1β = − √ 3V+1cos (ω1t) · · · (10)

Next step, this pure fundamental positive sequence

volt-age is used together with the supply current to calculate

the instantaneous power quantities p, q following Eq 5.

The supply current may contain fundamental negative

sequence and high order harmonic components, however,

the resulted dc components ¯ p  , ¯ q of those power ties in this case are the cross product of only fundamen-tal positive components as shown below:

• δ+1: phase angle between the auxiliary positive

se-quence voltage V+1 and the fundamental positive

sequence current component I+1

It is clear to see that only fundamental positive sequence

voltage V+1 and current I+1 components contribute toaverage value ¯p  and ¯q , the negative sequence compo-nents does not appear in those power quantities Next,the low-pass filter is utilized to extract only those dcpower components ¯p  , ¯ q  Once those power components

in Eq 11 is extracted then it is easy to obtain the tive sequence current using the same definition as shown

posi-in Eq 7

For extracting fundamental positive sequence

compo-nent, the amplitude of v +1α and v +1βare not importantand can be chosen arbitrarily due to the fact that theyappear in both “direct” and “inverse”calculations(16).For simplicity, they are set to unity hence Eq 10 be-comes:

v +1α = + sin (ω1t)

v +1β = − cos (ω1t) · · · (12)

3.3 Negative sequence current extraction

Similar procedure is employed to extract negative quence current, however, an auxiliary negative sequencevoltage is considered instead of the auxiliary positive se-quence voltage

se-The results of α-β transform of this auxiliary pure

fun-damental negative sequence voltage is shown in Eq 13

v −1α = + sin (ω1t)

v −1β = + cos (ω1t) · · · (13) Here the amplitude of negative sequence voltage v −1α

and v −1β are again selected to be unity and

correspond-ing phase angles are assumed to be zero for tion

simplifica-The dc power components ¯p  , ¯ q  resulted from theproduct of those auxiliary negative sequence voltages

{v −1α , v −1β } and the supply current are shown in Eq 14

• δ −1: phase angle between the auxiliary negative

se-quence voltage V −1 and the fundamental negative

sequence current component I −1.

Again, only fundamental negative sequence voltage V −1

and current I −1 components show up in the averagevalue ¯p , ¯q even the supply current is distorted and un-balanced Therefore, if those dc power components are

Fig 3 Positive sequence current detection circuit

extracted through a filtering process then the negative

sequence current can be calculated using same definition

as shown in Eq 7

3.4 Generation of auxiliary voltages and

fundamental positive and negative sequence components

is necessary for determining the harmonic reference

cur-rent An important part of generating auxiliary

ref-erence voltage is the phase locked loop (PLL) circuit

The PLL circuit tracks continuously the fundamental

frequency ω1of the measured system voltage

The PLL is designed to operate properly under distorted

and unbalanced voltage wave forms The frequency ω1

is used in a sine wave generator to produce two

quan-tities sin(ω1t) and − cos(ω1t) those correspond to the

auxiliary fundamental positive sequence voltages v +1α

& v +1β (mentioned in Eq 12) The PLL circuit is

al-ready well introduced in literature and it has good

per-formance in handling this task(19) (20)(see Appendix for

operation principle)

Figure 3 shows the positive sequence detection circuit

based on principle stated in Sec 3.2 Similar circuit can

be implemented for the negative sequence extraction if

the output of PLL circuit are − sin(ω1t) and cos(ω1t)

following the Eq 13

4.1 Operation principle of series active filter

that series active filters correct current system

distor-tion caused by non-linear load by synthesizing an active

impedance presenting a zero impedance at

fundamen-tal frequency and a high resistance K between load and

source at all harmonics frequencies By inserting a high

resistance K, the series active filter forces the high

fre-quency current flow mainly through LC passive filter

connected in parallel to load(2) (21)

The equivalent single phase circuit for harmonic

com-pensation is shown in Fig 4 In this figure, non-linear

load is represented by a harmonic current source I hand

source voltage is represented by harmonic voltage source

V sh The series active filter is equivalent to a controlled

voltage source V c and shunt passive filter becomes an

equivalent impedance Z F If the series active filter is

controlled as V c = K × I sh (equivalent to a resistor of K

ohm) then the I shcan be calculated as:

I sh= V sh

Z S + Z F + K +

Z F

Z S + Z F + K × I h · · (15)

Fig 4 Equivalent circuit for harmonic compensation

Fig 5 Proposed control circuit for series active filter

If the gain factor K is set sufficiently large as

K  (Z S + Z F) then neither harmonic current flowfrom load to ac source nor from ac source to load side

cir-cuit is shown in Fig 5, where the three-phase load

cur-rent is measured and transformed into stationary α-β

frame The PLL circuit generates the auxiliary tive and negative sequence voltages (corresponding to

posi-Eq 12 & 13) Those currents and auxiliary voltages in

stationary α-β frame are supplied to positive and

neg-ative sequence extraction blocks (extraction principle isdetailed in Sec 3.2 & 3.3) The output positive and neg-

ative sequence currents in α-β frame are passed through the inverse α-β transform to give the positive and neg- ative sequence currents in conventional three-phase abc

frame

Harmonic current is extracted from measured supplycurrent after subtracting the fundamental positive andnegative sequence components as stated in Eq 9 Next,each extracted harmonic current is passed through a

gain block with the amplification factor of K to form reference voltage v F (Eq 2) Finally, this reference

voltage v F is applied to the gate control circuit for eachPWM converter

Simulation is setup as following:

• The investigated system is three-phase, three-wire

system then zero sequence component does not ist

ex-• Source’s line to line voltage is 200V (50Hz) Source impedance is Z s = 0.02∠80 pu (with the system base of U base = 200V and S base = 20kV A).

• Active filter rating capacity is 700V A and it is

ac-tivated at 0.5 [s] during simulation

• PWM converter’s switching frequency is set at

An Improved Control Strategy for Hybrid Series Active Filter dealing with Unbalanced Load

Fig 6 Representative diagram for simulation

Table 1 Parameter of shunt passive filter

Inductance [mH] Capacitance [μF]

5thfilter 1.2 340 Q=14

7thfilter 1.2 170 Q=14

High-pass 0.26 300 R=3Ω

15 kHz The dc source’s voltage is V dc = 200V

• Coupling transformer’s turn ratio n = 1 : 20 The

ripple filter connected at the output of PWM

con-verter consists of a series inductor L r = 1mH and

a shunt capacitor C r = 0.33μF

• Passive filters are tuned to the most dominant 5 th,

7th harmonics and a high pass filter with total

ca-pacity of 10kVA (parameters are given in Table 1)

• The unbalanced and nonlinear load is represented

by a combination of a 20 kVA three-phase thyristor

rectifier and a linear single phase load (17.5Ω) as

shown in Fig 6 This setup gives a total load

cur-rent of about 60 [A] RMS with the unbalance factor

I2/I1∼ 10%.

• Current is measured in ampere [A].

6.1 Effectiveness of series active filter equipped

gen-erally shows the effect of active power filter equipped

with improved control strategy on the nonlinear and

un-balanced load For detail:

• Figure 7a shows that: Once active filter is

acti-vated at 0.5 [s] then it almost immediately takes

ef-fect to reduce the harmonic contents injecting into

the source, the source current almost becomes

si-nusoidal Moreover, the active filter not only

suc-cessfully mitigates the harmonic contents but also

preserves perfectly the imbalance characteristic of

load as expected

• Figure 7b & 7c present the spectra of source current

before and after active filter is activated Evidently,

the harmonic contents significantly drops at all

har-monic frequencies Thus, this is again to

numer-ically confirm the effectiveness of the series active

filter

The fundamental positive and negative sequence

cur-rents extracted from measured source current are also

shown in Fig 8 & Fig 9 Noticeably, the positive and

negative sequence current remain constant, even while

active filter is operating These results confirm the

ad-vantage of improved control strategy: the active filter

does not alter the load imbalance characteristic In other

words, the active filter does work with only harmonic

0.460 0.470 0.480 0.490 0.500 0.510 0.520 0.530 0.540 0.550 0.560 -150

-100 -50

0

50

100

(a) Harmonic mitigation effect with improved control strategy for unbalanced load

(c) Current spectra: After activation of active filter

Fig 7 Waveshapes and spectra of source current before and after active filter is activated

0.460 0.470 0.480 0.490 0.500 0.510 0.520 0.530 0.540 0.550 0.560 -150

-100 -50

0

50

100

Fig 8 Extracted positive sequence current

0.460 0.480 0.500 0.520 0.540 0.560 -15.0

-10.0 -5.0 0.0 5.0 10.0

Fig 9 Extracted negative sequence current

current components as designed

For nonlinear and balanced load, the active filterequipped with new control strategy still works very well

as it can be seen in Fig 10, the harmonic contents aremostly eliminated and the inherent load characteristicremains untouched

6.2 Effectiveness comparison over series active filters equipped with improved and previous con-

Fig 10 Harmonic mitigation with improved

con-trol strategy for balanced load

(a) Result with improved control strategy

(b) Result with previous control strategy

Fig 11 Waveshape comparison in cases with

im-proved and previous control strategies

filter which is equipped with the previous control

strat-egy is also simulated Simulation studies for comparison

are setup based on follow assumptions:

• In previous control strategy, the negative sequence

component is not excluded from the reference

har-monic current

• On the contrary, for the improved control strategy,

the negative sequence component is excluded from

the reference harmonic current

• Comparisons are carried out with unbalanced loads

since the improved control strategy is proposed to

help the series active filter performs better under

unbalanced loading conditions

• All other conditions remains the same for both

cases

Figure 11 & 12 compare the current waveshapes and

spectra in cases the active filters utilize the improved

and previous control strategies Under the same

test-ing conditions, the active filter with improved control

strategy shows a better performance This conclusion

can be clarified in below discussion:

• The active filter equipped with previous control

strategy will have to handle both harmonic and the

fundamental negative sequence current components,

consequently the load will be forced to be balanced

as shown in Fig 11b and the PWM converter might

be easily overloaded Besides exposing the active

(b) With previous control strategy

Fig 12 Current spectrum comparison in cases with improved and previous control strategies

filter to overload condition, degrading the harmonicmitigation effect, that balancing the inherent unbal-anced load does not bring any benefit for customerwho invested money for that active filter

• In contrast, the active filter employing the improved

control method does not need to handle the negativesequence current then it can devote all of it capacityfor harmonic mitigation function As a result, theharmonic mitigation efficiency in this case is higher

This higher efficiency is illustrated in Fig.12a as theharmonic contents shown there are much more lowerthan those in Fig.12b In other words, the active fil-ter with the improve control algorithm has a betterperformance

Figure 13 shows the compensating voltages generated

by the series active filters (the blue and red lines showinstantaneous and RMS values respectively), those fig-ures are for the output volt-ampere comparison purpose

Figure 13b presents the output voltage of series activefilter which is equipped with previous control algorithm

Apparently, looking at voltage waveform, one may seethe presence of the 50Hz component That is reasonwhy the output voltage in RMS value is almost double

of that in Fig 13a This phenomenon is due to all theprevious control algorithms do not exclude the negativesequence component which may occur if load is unbal-anced

For numerical detail comparison:

• In case the active filter employs improved control

al-gorithm, the compensating voltage presents a RMS

value of only about 3.4V This means that the

volt-ampere rating of the series active filter is only

3.4V × 60A × 3 = 612V A Assuming that the active filter rating capacity is chosen as 700V A, then this figure presents only a small portion as about 3.5%

of the load rating 20kV A.

• On the contrary, if the previous control algorithm

is utilized, then the output compensating voltage in

An Improved Control Strategy for Hybrid Series Active Filter dealing with Unbalanced Load

(b) With previous control strategy

Fig 13 Voltage generated by series active filters

2.01309

(b) Z s = 0.1pu

Zs = 0.2pu THDv (%)

this case is about 8V as shown in Fig 13b

Numer-ically, the required volt-ampere output of the active

filter now is up to 8V × 60A × 3 = 1440V A In this

case, the active filter is about 1440V A/700V A =

2.05 times overloaded As a result, this will seriously

damage the converter Apparently, the percentage

of overload depends on the load unbalance factor

6.3 Influence of source side impedance on

see that the harmonics generated by nonlinear load are

injecting into source As consequence, the source

volt-age will be distorted depending on the value of source

impedance If the source impedance is low, then the

voltage distortion is low and vice versa Since this

con-trol algorithm utilizes the quantities calculated from

both voltage and current, then it is necessary to examine

the influence of voltage distortion (or source impedance)

on the compensation effect

All above simulations run with source impedance set at

0.02pu, then now two more worse scenarios are

exam-ined: source impedances are set higher at 0.1pu and

0.2pu Consequently, the results in Fig 14 show that

total harmonic distortion (THD) factors of source

volt-ages are 1.06%, 2.01% and 2.3% respectively Thus, the

higher the source impedance, the worse the voltage

dis-tortion

Figure 15 show the corresponding THDs of source

cur-rents after compensation Noticeably, after series active

filter was started, the remain amounts of harmonic

con-Zs = 0.02pu THDi (%)

0.869893

(a) Z s = 0.02pu

Zs = 0.1pu THDi (%)

0.631617

(b) Z s = 0.1pu

Zs = 0.2pu THDi (%)

con-That is reason why the harmonic contents after pensation is reduced correspondingly for three cases

com-• Despite the distortion of voltage, the series active

fil-ter still work effectively This point proves that theInstantaneous Power Theory used in the sequenceextraction algorithm can work well under the volt-age distortion conditions

The improved control strategy for hybrid series activefilter is already proposed and investigated in detail Thiscontrol method bases on sequence component elimina-tion algorithm to obtain only the harmonic content from

a distorted and unbalanced current set Consequently,this control strategy does help the series active filter toimprove its performance, especially when load is unbal-anced Main conclusions can be recognized as follow:

• Only harmonic component is precisely extracted to

form the reference current for the series active filter,therefore, the active filter work with only harmoniccomponent as expected, even when load is unbal-anced

• The proposed control strategy enhances the

stabil-ity of control process since the imbalance of load willnot have any affect on the reference signal

• Especially, the active filter is protected away from

severer overload conditions because it does not have

to deal with the fundamental negative sequencecomponent which may occur if load is unbalanced

• The proposed control strategy is well tailored to suit

with all operating conditions such as serving anced or unbalanced loads In other words, it canapply for the series active filter working with anygeneric loads

bal-Finally, all the simulation results have successfully dated the effectiveness and feasibility of this proposal

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Appendix

Phase locked loop (PLL) circuit

The PLL is one of components of the sequence

cur-rent detection circuit It detects fundamental angular

frequency (ω1) and generates synchronous sinusoidal nals those correspond to auxiliary positive sequence volt-ages under sinusoidal as well as highly distorted and un-balanced source voltages The PLL circuit introduced

sig-app Fig 1 Phase locked loop circuit

here is based on the instantaneous active power sion:

expres-p 3Φ = v a i  a + v b i  b + v c i  c = v ab i  a + v cb i  c

= p¯3Φ+ ˜p 3Φ

(A1)

The current feedback signals i a (ωt) = sin(ωt) and

i c (ωt) = sin(ωt + 1200) are generated by sine

genera-tor circuits through the time integral of the output ω

of the PI controller The PLL can reach stable point

of operation only if the input p 3Φ of PI controller has,

in steady state, a zero average value, that is, ¯p 3Φ = 0

Moreover, the low frequency oscillations ˜p 3Φ should beminimized

Because i a (ωt) and i c (ωt) contain only positive-sequence

components and have unity magnitudes, therefore, the

average three phase power p 3Φ= ¯p 3Φis given by:

¯

p 3Φ= 3V+1I+1 cos(φ++ δ+)· · · (A2) where φ+and δ+are the initial phase angles of the fun-

damental positive sequence voltage and current i a (ωt)

respectively Now the PLL can reach stable point of

op-eration only if the input p 3Φof PI controller has a zeroaverage value, that is equivalent to:

¯

p 3Φ= 3V+1I+1 cos(φ++ δ+) = 0· · · (A3) The above condition is satisfied since φ++ δ+ = 900

This means that the auxiliary currents i a (ωt) and i c (ωt)

become orthogonal to the fundamental positive sequence

component V+1 of the measured voltages v a and v c spectively Therefore, the generated auxiliary voltage

re-v +1a = sin(ωt − 900) is in phase with fundamental

pos-itive sequence voltage V+1 Similar relations hold for

v +1b and v +1c

Nguyen Xuan Tung (Non-member) received the B.E

de-gree in electrical engineering from Hanoi versity of Technology, VietNam in 1999 and the M.E degree from Curtin University of Technology, Australia in 2005 He has been pursuing PhD degree in Shibaura Institute of

are about protective relay system and power quality issue in power distribution system.

An Improved Control Strategy for Hybrid Series Active Filter dealing with Unbalanced Load

Goro Fujita (Member) received the B.E., M.E and Ph.D

degrees in electrical engineering from Hosei University, Tokyo, Japan in 1992, 1994 and

1997 respectively In 1997, he was a research student of Tokyo Metropolitan University He

is an Associate Professor of Shibaura tute of Technology, Tokyo, Japan His inter- est is in power system control including AGC and FACTS He is a member of the Society of Instrument and Control Engineers (SICE) of Japan, the IEE of Japan, and IEEE.

Insti-Kazuhiro Horikoshi (Member) was born in Miyagi, Japan,

degree in electrical engineering from Tohoku University, Japan, in 1990 In the same year,

he joined Tohoku Electric Power Co., Sendai, Japan He is now an assistant research man- ager in Research & Development Center at To-

area is about distribution system and connection of distributed generations.

Fault Current Limiting Function of Dynamic Voltage Restorer Utilizing

Signals from Existing Protective Relays

Dynamic Voltage Restorer (DVR) is a series custom compensator utilized in power distribution network,

however, due to connected in series with distribution line then DVR would suffer from downstream faults

To limit the flow of large fault currents and protect DVR itself as well, a fault current limiting function is

proposed in the DVR control strategy Fault current limiting function of DVR will be activated by protection

system and then DVR will start injecting a series voltage to the line in such a way to limit fault current

to an appropriate level (in accordance with required sensitivity of protection systems) The contribution of

this proposal is the utilization of signals from existing feeder protection system to activate DVR This will

simplify the structure of DVR because the extra build-in fault detection module is not required Moreover,

it will ensure proper coordination between DVR and protection systems

Keywords: Dynamic Voltage Restorer, Fault Current Limiter, Protection System.

Distribution networks are usually expanded by adding

either extra transformers and/or feeders This fact may

raise the chances of increasing prospective fault currents

that might exceed circuit breaker’s interrupting

capac-ity Moreover, that adding dispersed power sources may

be convinced as other reason for increasing potential

fault current level Many solutions have been proposed

to deal with high fault duty level; one of these solutions

is utilizing fault current limiting (FCL) devices

Basi-cally, FCL can bring many benefits to utilities, such as:

• Avoid or delay upgrading existing CBs.

• Minimize voltage dip on upstream bus when fault

occurs at downstream feeder

• A larger transformer can be used to meet demand

without upgrading CBs

• Reduce thermal damage due to fault currents and

hence protecting and extending life time of

trans-formers and other equipments

In this study, a dynamic voltage restorer (DVR) is

proposed as a fault current limiter Dynamic voltage

restorer is a series custom power device used to protect

sensitive customers from impacts of all voltage

distur-bances Dynamic voltage restorer can be implemented

at both low voltage level and medium voltage level A

topology of typical medium voltage DVR is in Fig 1

The basic operation principle of DVR is simple DVR

will insert a series voltage with appropriate magnitude,

frequency and phase to compensate for any voltage

dis-turbances (especially voltage sags) that may affect the

proper operation of loads In order to handle that

oper-∗Shibaura Institute of Technology

3-7-5, Toyosu, Koto-ku, Tokyo 135-8548, Japan

Fig 1 Typical topology of DVR

ation, DVR is equipped with a Voltage Source Inverter(VSI) and energy storage However, when fault occurs

at down stream location, DVR would suffer from a largefault current and that such large current will damage thepower switching devices within the VSI In order to pro-tect DVR, a bypass circuit is added to DVR(1) (2) Thebypass circuit does protect DVR during fault at down-stream but it still allows the large fault current flowingthrough faulty part and circuit breaker In order to dealwith the above mentioned problems, a fault current lim-iting function is added to DVR’s control function Whenfault occurs, the DVR reverses its injecting voltage po-larity in such a way to pull down the current flow to anappropriate level as desired The advantages of addedfault current limiting function are:

• Additional protection circuits (such bypass circuit)

are not necessary for DVR

• Implementation is simple.

• Diminish damage caused by large fault current to

circuit breaker and other equipment

The fault current limiting function ensures that the vices are protected from excessive high current withoutadditional circuit complexity However, another concern

Fig 2 Equivalent diagram of investigated system

Fig 3 Relationship between fault current and

voltage drop on fault impedance

is that the fault current limiting function of DVR must

not interfere with the existing protection system of the

feeder Since the proposed function of DVR will force

the fault current to go down during the fault, in order

to avoid the interference it should be well coordinated

with the protection system

In next section, the implementation of fault current

limiting function with activating signal from existing

protection system is presented and the coordination with

existing protection system is investigated as well

current limiter

DVR is known as a multi-function device in

distribu-tion system, it mainly used to against voltage sag that

may occur To minimize the power losses through DVR

then the DVR is held in a null state in normal

condi-tion Once an overcurrent occurs then FCL function is

activated and it starts to react as fast as possible and

inject the required ac voltage to the grid

Figure 2 and 3 illustrate that operation principle:

When fault occurs, the relationship between voltage at

source and fault current can be expressed as (without

DVR):

U S=I f × R f+jI f × X f

= ΔU R f+ ΔU X f = ΔU · · · (1)

where

U S: source voltage (behind source’s impedance)

Z f: total fault impedance (Z f =Z S+Z Lfault)

I f: fault current

Z S: internal impedance of source

Z Lfault: impedance of faulty line section

ΔU: voltage drop on total fault impedance

If DVR is activated, it will inject a series voltage into

line in such a way to reduce amplitude of fault current

At this time, relationship as shown in Eq 1 has been

Fig 4 Relationship between compensated fault current and corresponding injected voltage

changed to Eq 2:

U S+U DV R=I f(c) × Z f = ΔU (c) · · · (2)

hereU DV Ris voltage injected by DVR.

Assuming that fault current will be compensated to propriate magnitude as represented by dotted circle inFig 3 Depending on the phase angle and magnitude

ap-of injected voltage then inherent phase angle ap-of sated fault current can vary, for instance it can be either

compen-I f1(c)orI f2(c)and so on

Based on vector diagram in Fig 4, it can be seen thatwhen compensated fault current (for instance I f1(c))

is kept in phase with pre-compensated fault current

I f then the amplitude of injected voltage is minimum

(U DV R1 < U DV R2 ; U DV R1 < U DV R3), therefore,this technique minimizes the voltage rating of couplingtransformer (mathematical expression can be found inref (3)), and hence, the voltage rating of DC capacitor

is minimized as well In this proposal, in-phase currentcompensation strategy is utilized

implemented for DVR

Technical literature is filled with documents and erences regarding that utilizing the DVR as fault cur-rent limiter , however, the coordination between DVRand existing protection system has not been well men-tioned(4) (5) (6) Apparently, DVR will alter fault currentsince it is activated, therefore, sensitivity of protectionsystem will be influenced In order to ensure proper op-eration of existing protection system, the coordinationmust therefore be considered In this section, the abovementioned issues will be analyzed and appropriate solu-tion will be proposed This section is divided into threesub-sections: setting threshold for compensated current,activation and termination mechanism of DVR serving

ref-as fault current limiter

setting level of compensated current, S S Choi et al.(5),

L Y Wei et al.(6) proposed setting level based on sumption that voltage at point of common couplingwould remain as that of pre-fault level while DVR isbeing activated In other word, amplitude of compen-sated current will remain constant as pre-fault normalload current This approach had some drawbacks sincethe fault current is very high in comparison with normalload current and DVR will act as a buffer between sourceand fault point, hence DVR will absorb energy from up-

Fault Current Limiting Function of Dynamic Voltage Restorer Utilizing Signals from Existing Protective Relays

stream source in order to reduce fault current level As

a result, DVR must have a high KVA rating to deal with

large fault currents Other concern is that some type of

protection system such as an overcurrent relay system

(non-directional type) will operate based on magnitude

of sensed current, hence if the fault current is

compen-sated to pre-fault level then overcurrent relay might no

longer have enough sensitivity to continue tracing the

presence of fault and it will reset to standby status

Based on that analysis, a new setting level will be

pro-posed to ensure that protection system still functions

properly since DVR operates

In order to deal with new setting level, the concept of

sensitivity of protection system will be referred(7) (8) (9)

Generally, the protection system must operate reliably

even with the smallest fault current which may occur in

protective zone However, what could happen in case

the smallest fault current is just about the setting level

(or pickup level) of protection system:

• If protection system still can operate in this case

that means it already senses the faulty condition or

it is sensitive enough

• If it can not operate, that means the protection does

not sense the faulty condition, in other word, it is

not sensitive enough

Based on that fact, the relationship between minimum

fault current and pickup level of any protection system

should be considered In case of overcurrent relay, the

ratio between minimum fault current and setting level

is referred as the sensitivity factor of protection system

as follow:

Sensitivity min= I fault min

I pickup level [pu]

Inherently, the sensitivity factor will vary depending on

fault current level, but the minimum sensitivity referring

to minimum fault current is considered when designing

the protection system As a rule of thumb, sensitivity to

minimum fault condition for a protection system should

not be less than 2 per unit (pu) in order to ensure the

reliable operation of protection system in any faulty

con-ditions

From that point of view, setting level for compensated

current should be kept at 2 times of pick up current

(2× I pickup) of existing relay system (pick up current

of existing relay system is already known when

design-ing protection system) This settdesign-ing level proposes some

advantages:

• Voltage rating of DC link capacitor is lower than

that in case of full compensation

• Proper operation of existing local protection system

will not be affected by action of DVR

• The coordination between relays is automatically

ensured

used as multi-function device dealing with improvement

of power quality, for example, DVR may be utilized to

compensate for voltage sags, unbalanced voltage

prob-lems and harmonic compensations However, when a

fault occurs somewhere downstream then a control

sig-Fig 5 Activation mechanism applying for DVR

nal will be fed to DVR’s control circuit and DVR startsworking as fault current limiter This control signal willoverride all other control signals referred to above powerquality improvement functions

I Axente et al proposed fault detection method byadding an extra fault detection block(4), this block tookresponsibility for impedance measurement such that im-plemented in commercial distance relays However,that adding extra impedance measurement block is verycostly solution (for reference, distance relay usually isone of the most expensive relay) and the implementa-tion of that block is not simple

Other authors suggested a solution by adding current detection block into DVR configuration(6), butbuilding an extra block means that more money isneeded

over-Besides those costly solutions, a simpler solution can

be implemented by extracting signal from existing tection system Generally, protection system is well de-signed for detecting any fault that may occur at pro-tected zone, therefore, any signal comes from protectionsystem can be trusted Based on that analysis, the sig-nal used to activate DVR can be extracted from outputcircuit of existing protection system In other word,when protection system picks up due to detection offault, it will concurrently send a signal to activate DVR(Fig 5) This proposal will ensure that fault currentlimiting function of DVR will only activate when faultoccurs at protected zone, moreover, no extra build-infault detection block is needed

pro-3.3 Termination of DVR after fault cleared

Termination of DVR action must be carefully sidered, otherwise DVR will keep functioning evenwhen fault has been cleared In the study done by

con-L Y Wei et al.(6) fault clearance was detected by ing voltage at load bus, but this solution is applied onlywhen distance between DVR and loads is short enough

sens-Other authors offered a solution by installing an extracommunication channel between DVR and protectionsystem, however, both studies did not clarify how fault

is eliminated(5) (6) Another drawback of the above lutions may occur in case of downstream fault and local

so-CB refuses to trip; in this case the fault will persistwithout any elimination

Alternative solution to terminate DVR’s action posed in this study is based on the fact that: if com-pensated fault current level is kept at 2× I pickup (asstated in Sect 3.1), consequently when fault occurs, re-lays will operate as normal even DVR is compensating

Fig 6 Termination mechanism applying for DVR

Fig 7 Fault at load side and corresponding

se-quence actions

the fault current Relay will count down setting time

and send tripping signal to open CB whenever setting

time is over At the moment when relay issues tripping

signal, DVR should be terminated

Based on that analysis, termination signal feeding to

DVR can be extracted from tripping circuit of relay

This principle is illustrated in Fig 6

In case of fault occur at load side as shown in Fig 7,

both protection systems of load and feeder pick up, but

only load’s protection system (LPS) trips and open CB

at load side Whenever fault is cleared by opening CB at

load side, feeder’s protection (FPS) will reset to standby

In this situation, DVR already is activated due to FPS

picked up, but there is no signal to terminate DVR’s

op-eration since FPS reset without issuing any tripping

sig-nal In order to deal with this situation, a back up signal

used to terminate DVR’s operation should be deployed

This paper proposes a solution to obtain the back up

ter-mination signal based on that monitoring DC-link

volt-age When DVR is operating as fault current limiter, it

can be seen that DVR will absorb energy from upstream

source through the coupling transformer, but the diode

rectifier can not feed the energy back to the source; it

will lead to DC-link voltage pumping-up(3) Since fault

is cleared, the flowing current will drop down below the

setting level of compensated current, at that moment,

DVR will reverse its action and try to increase current

level in order to keep input of its comparator at zero In

term of energy, now DVR will start injecting energy into

system, as a result, DC-link voltage will decrease This

principle can be clarified by the block diagram in Fig 8

Based on that analysis, the clearance of fault can be

de-tected by tracing the DC-link voltage Whenever the

DC-link voltage drops down after going up, it can be

assumed that fault has been cleared and DVR as fault

current limiter should stop operating

Energy absorbed by DVR during compensation

pro-cess can be express approximately by:

Fig 8 Relationship between DC-link voltage and operation of DVR

ΔE = P c × t prot · · · (3)

where:

P c: total active power flowing into DVR

t prot: operating time of protection system

Total active powerP c flowing into DVR is determined

by:

P c= 3× V injected × I compensated × cos(θ) · · · · (4)

withθ = angle(V injected , I compensated)Maximum voltage can occur across capacitor is:

U DCmax=

2ΔE

whereτ is time constant of circuit.

This principle will be clarified further more by tion result in Sect 5.3

simula-In summary, the current limiting function in DVR can

be terminated by signals from FPS and DC-link voltagemonitoring mechanism, at this point, one may questionwhether the termination mechanism can be achievedonly by monitoring DC-link voltage and external trip-ping signal from FPS is really needed or not The rea-son why both terminating signals are still utilized in thisproposal can be convinced as follow:

• To increase the reliability of terminating

mecha-nism: that using both signals (from DC-link voltagemonitoring mechanism and from FPS) will enhancethe reliability of terminating mechanism

• If only DC-link voltage monitoring mechanism

is utilized: basically, DC-link voltage monitoringmechanism takes time to process signal and it willnot respond as fast as FPS does in case of fault oc-curs at feeder In other word, DC-link voltage mon-itoring mechanism will give a bit longer fault clear-ance time in comparison with that done by FPS

serv-ing as fautl current limiter

Simulation was implemented by PSCAD software

The proposed DVR model is three phase inverter modelwith common DC energy storage as shown in Fig 9

Main components of DVR model include:

• Coupling transformer.

Fault Current Limiting Function of Dynamic Voltage Restorer Utilizing Signals from Existing Protective Relays

g11

g42 g52

g62

1 2 3

2 5

2

4 2

6 2 2

g22

g51

5 2

2

g61

3 2

6 2

g12

g41

1 2

4 2

Vs Vs Vsc

Vasend Vbsend Vcsend

Iasend Ibsend Icsend

1.0 A B C

V F Ph

FAULTS C B A Fault Type

C B A BK

Generate phase angle

for referece signal Sin

Sin

Sin

D + F -

D + F

Icref Ibref Iaref

120.0 120.0

*

*

*

* 1

D + F

Delta_b Delta_c

Ia Ib Ic

Mag of referece current

D + F -

D + F -

I P

I P

I P

Limiter

Fig 10 Control block of DVR

• Voltage Sourced Inverter (VSI).

• Control system.

The inverter consists of 6-leg inverter (three single phase

full bridge inverters) using a common DC link The

ba-sic function of the VSI is to convert the DC voltage

sup-plied by the energy storage device into an AC voltage

The VSI operating in PWM adds voltage harmonics to

the load To reduce harmonic, filters can be installed at

either low voltage or high voltage side of the coupling

transformer to block high frequency harmonics caused

by DC to AC conversion In the DVR power circuit,

step up voltage transformer (coupling transformer) is

used, thus a VSI with a low voltage rating is sufficient

A simple control block diagram of DVR is illustrated

in Fig 10 Details parameters of simulation model is

shown in appendix The desired reference current is

gen-erated from a phase locked loop synchronized to the

sup-ply side three-phase AC current The actual measured

current is compared with the reference currents, and

the difference is fed through PI controller to generate

a modulation index which is applied to the pulse width

modulated (PWM) carrier switching signal to generate

turn-on and turn-off pulses to the IGBTs The control is

single phase based to achieve best performance, in other

word; the DVR has independent phase control

For fast response and to maximize dynamic

perfor-mance, direct feed-forward type control architecture is

Fig 11 Control principle used to keep DVR in null state

applied in the control strategy of the DVR With thiscontrol, a fast response time (approximately half cycle)can be achieved to compensate fault currents

During normal condition, DVR is kept in null state

This state is implemented by removing the PWM firingfrom the IGBTs in the phases and instead, continuouslyfires the IGBTs in half of each single phase portion ofthe VSI as shown in Fig 11, so that the series wind-ings are short circuited When DVR is activated, PWMfiring is fed to all IGBTs in phases as normal

simula-tions were run with following parameters:

• Maximum load current: I Loadmax  75 [A]

• Maximum fault current: I F aultmax  700 [A]

In power distribution system, overcurrent relay is monly used due to its low cost, hence in this simulation,that type of relay will be simulated as protection system

com-• Pick up threshold of relay: I pickup = 115 [A] (RMS)

• Time setting of relay:

◦ t setting= 0.2 [s] for FPS relays.

◦ t setting= 0.1 [s] for LPS relays

These settings are intentionally used because the authorwould like to have the reader’s attention focused on thetransition process from pre-fault to post-fault in whichfault current limiting function of DVR shows its effect(in practice, time margin between FPS and LPS is nor-

CURRENT (in Ampere)

Fig 12 Three-phase fault without DVR

CURRENT (in Ampere)

As stated in Sect 3.1, minimum required sensitivity

of protection system should not be less than 2 pu,

there-fore, setting level of compensated current should be:

I compensated= 2× I pickup= 2× 115 = 230 [A].

In other word, when DVR operates as fault current

lim-iter it should reduce fault current magnitude to about

230 [A] All the faults are assumed to start at 0.03 [s]

car-ried out with various scenarios:

• Fault occurs at feeder side: this scenario used

to verify the effectiveness of mechanism to

acti-vate/terminate DVR by FPS

• Fault occurs at load side: This simulation is to

ver-ify the proposal used to terminate DVR action by

tracing DC link voltage and to verify the proper

co-ordination between FPS and LPS

and discussion are shown below

Figure 12 shows three-phase fault current (fault takes

place at feeder) with DVR is not activated, fault

cur-rent is about 700 [A] (about ten times of normal load

current) In case DVR is activated (Fig 13), DVR

takes full effect just after one cycle and fault current is

reduced to 230 [A] (rms) as expected In this case, DVR

is activated and terminated by FPS

Comparing Fig.12 with Fig 13, it can be seen that

the operation of FPS is not interfered even while DVR

is operating, FPS cleared fault after 0.2 [s] based on its

own setting Similarly, Fig 14 and Fig 15 show the

case of phase-phase fault

In Fig 15, it can be seen that, DVR performed

sin-gle phase control perfectly, only two faulty phases (a

and b) are compensated while healthy phase (c) remain

constant Moreover, fault clearance time of relay still

CURRENT (in Ampere)

0.000 0.050 0.100 0.150 0.200 0.250 0.300 -1.0k

-0.8k -0.5k -0.3k 0.0 0.3k 0.5k 0.8k 1.0k

Fig 14 Phase-phase fault without DVR

CURRENT (in Ampere)

0.000 0.050 0.100 0.150 0.200 0.250 0.300 -1.0k

-0.8k -0.5k -0.3k 0.0 0.3k 0.5k 0.8k 1.0k

Fig 15 Phase-phase fault with DVR activated

CURRENT (in Ampere)

0.000 0.050 0.100 0.150 0.200 0.250 0.300 -1.0k

-0.8k -0.5k -0.3k 0.0 0.3k 0.5k 0.8k 1.0k

Secondly, DVR is utilized In this case DVR is tivated by FPS because when fault occurs hence bothFPS and LPS pick up Figure 17 shows that DVR againfully perform its effect just after one cycle as shown inother cases

ac-When fault occurs, DC link voltage goes up (Fig 18)since DVR is absorbing energy from upper source Next,LPS eliminates the fault after 0.1 [s] (at the same timeFPS reset to standby), DVR immediately reverse its ac-tion this leads to DC link voltage goes down suddenly

Fault Current Limiting Function of Dynamic Voltage Restorer Utilizing Signals from Existing Protective Relays

CURRENT (in Ampere)

Fig 17 Three-phase fault at load side with DVR

activated by FPS and terminated by DC-link

volt-age tracing mechanism

Fig 18 DC-link voltage during fault at load side

At the time DC link voltage drops down then

conse-quently DVR is terminated and fault current get back

to normal level This simulation again validates the

the-oretical analysis shown in Sect 3.3

In this paper, the dynamic voltage restorer is proposed

to use as a fault current limiter A new method to

ac-tivate that fault current limiting function by the signals

from existing protection system is proposed and tested

Moreover, the coordination between existing protection

system and fault current limiting function of dynamic

voltage restorer is investigated and implemented This

proposal offers many advantages such as the reduction

in the cost of DVR device; the proper coordination

be-tween protection systems is ensured regardless of the

fault location and even when the fault current has been

altered Finally, all the simulation results have validated

the effectiveness of proposal

References

( 1 ) L Moran, R Oyarzun, I Pastorini, J Dixon, and R Wallace,

“A fault protection scheme for series active power filters”,

Power Electronics Specialists Conference, Vol 01, pp.489–

493 (1996)

( 2 ) N H Woodley, L Morgan, and A Sundaram,

“Experi-ence with an inverter-based dynamic voltage restorer”, IEEE

Transactions on Power Delivery, Vol 14, No.03, pp.1181–

1186

( 3 ) G Xiao, Z Hu, C Nan, and Z Wang, “DC-Link voltage

pumping-up analysis and phase shift control for a series active

voltage regulator”, Proceeding of 37th IEEE Power

Electron-ics Specialists Conference, pp.1–5 (2006)

( 4 ) I Axente, M Basu, M F Conlon,, and K Gaughan,

“Protec-tion of DVR against short circuit faults at the load side”,

Pro-ceeding of the 3rd IET International Conference on Power

Electronics, Machines and Drives, pp.627–631 (2006) ( 5 ) S S Choi, T X Wang, and D M Vilathgamuwa, “A se-

ries compensator with fault current limiting function”, IEEE

Transactions on Power Delivery, Vol 20, No.03, pp.2248–

2256 ( 6 ) L Y Wei, D M Vilathgamuwa, C L Poh, and F Blaab- jerg, “A dual-functional medium voltage level DVR to limit

downstream fault currents”, IEEE Transactions on Power

Electronics, Vol 22, No.04, pp.1330–1340

( 7 ) GET-6450 Distribution System Feeder Overcurrent

Protec-tion, GE Publication (1997)

( 8 ) IEEE Std 1596-1992,Guide for Protective Relay

Applica-tions to Transmission Lines, IEEE (1992) ( 9 ) A C Enriquez and E V Martinez, “Sensitivity improve-

ment of time overcurrent relays”, Electric Power Systems

Re-search, Vol 77, No.02, pp.119–124 (2007)

Appendix

Parameters in simulation

- Source & Load (Fig 9)Source voltage: 7.5 [kV] (L-L, RMS)Frequency: 50 Hz

Source impedance: 1 80 [Ω]

Total load impedance: 55 [Ω]

- Coupling transformerVoltage ratings: 7.5 [kV]

Transformer MVA: 0.6 [MVA]

Leakage reactance: 0.05 [pu]

- Fault resistanceThe value of fault current can be adjusted by chang-ing fault resistance

To simulate the fault at feeder: R fault= 5 [Ω]

To simulate the fault at load: R fault= 10 [Ω]

- Reference current in control system (Fig 10)

I aref = I bref = I cref = 325 [A](peak) or 230

[A](rms)

Nguyen Xuan Tung (Non-member) was born in Hai

Duong, VietNam, on April 15, 1975 He ceived the B.E from Hanoi University of Tech- nology, VietNam in 1999 and the M.E degree from Curtin University of Technology, Aus- tralia in 2005 Currently, he has been pursuing PhD degree in Shibaura Institute of Technol- ogy, Japan His interests are about relay pro- tection system and power quality issue.

Fujita Goro (Member) was born in January 1970 He

re-ceived the B.E., M.E and Ph.D degrees in electrical engineering from Hosei University, Tokyo, Japan in 1992, 1994 and 1997 respec- tively In 1997, he was a research student of Tokyo Metropolitan University Since 1998, he

is in Shibaura Institute of Technology, Tokyo, Japan as an associate professor His interest

is in power system opeartion and control He

is a member of the Society of Instrument and Control Engineers (SICE) of Japan, the IEE of Japan, and IEEE.

Phase Load Balancing In Distribution Power System

Using Discrete Passive Compensator

This paper describes a new proposal to deal with imbalance phase loading phenomenon in power

distribu-tion system Discrete switched passive shunt compensators such as reactors or capacitor banks are considered

as the means to compensate for that imbalance phenomenon Discrete switched passive compensator offers

advantages in term of installation cost and simplifies the maintenance process

A new algorithm is developed to calculate the size of discrete compensators, this algorithm incorporates

the unbalance power flow calculation module and optimal compensator sizing module In addition, the

algo-rithm is written in MATLAB language and tested on an actual three phase-three wires distribution feeder

Extensive tests have validated the effectiveness of the proposal and shown that this proposal can be a useful

tool for any electrical utilities

Keywords: Phase Loading Imbalance, Discrete Optimization, Passive Compensation, Distribution System.

In power system, voltages (and currents) are expected

to be sinusoidal and equal in magnitude, with the

in-dividual phases 1200 apart However, the utilities

usu-ally experience the imbalance phenomenon in both

volt-age and current The nature of imbalance phenomenon

includes unequal magnitude and phase angle deviation

among phases A major cause of voltage and current

im-balances is that loads are not uniformly spread among

the three phases and load peaks are non-coincident due

to diversity of load categories Additional causes of

power system imbalances can be asymmetrical

distribu-tion feeder impedances possibly caused by incomplete

transposition of feeder lines

The influence of imbalance voltage and current on

power system has been well investigated in literature

V J Annette et al.(1) and L F Ochoa et al.(2)

con-cluded that unbalanced voltages and currents can result

in adverse effects on equipment and on the power

sys-tem, for example a small unbalance in the phase

volt-ages can cause a disproportionately larger unbalance in

the phase currents Under unbalanced conditions, the

power system will incur more losses and heating effects

The effect of voltage unbalance can also be severe on

equipment such as induction motors, power electronic

converters and adjustable speed drives

Many mitigation techniques have been developed to

deal with imbalance phenomenon in distribution system,

generally those solutions can be divided into two

cate-∗Shibaura Institute of Technology

3-7-5, Toyosu, Koto-ku, Tokyo 135-8548

∗∗Tohoku Electric Power Co.,Inc.

7-2-1, Nakayama, Aoba-ku, Sendai, Miyagi 981-0952

gories:

• Rearrange feeders or redistribute the loads in such a

way the system becomes more balanced(3)∼(5) ever, the utilities usually cannot afford too manyload swapping due to the long time interruption ofcustomers and cost of labors to implement those op-erations

How-• Install compensators (power quality conditioners)

to compensate for any imbalance quantities(6)∼(9).They seem to be the most possible solutions but an-other concern raised by utilities is the capital cost

of these solutions

This paper focuses on the second mitigation techniqueand will establish an appropriate solution in term of cap-ital cost For imbalance compensation purpose, activecompensator such as Distribution Static Compensator(DSTATCOM) is widely introduced in literature, thepower electronic solutions are elegant, however, they in-clude a greater degree of cost Cost has been the ma-jor factor in limiting the application of power electronicsolution over power distribution level Based on thatfact, solutions those involve passive compensators such

as switched capacitor or switched reactor banks wouldseem to be the most cost effective solution and these will

be investigated in this paper

Moreover, a new algorithm is developed to calculatethe size of compensators This algorithm includes un-balance power flow calculation module and discrete op-timal compensator sizing module The objective of thisalgorithm is to find the optimal size of compensators sothat minimize the unbalanced power flow through themain feeder The algorithm allows the user to specificthe type and the maximum number of available tapsfor each compensator In addition, detailed model of

Fig 1 Diagram of unbalanced load and compensator

the feeder including mutual coupling effect, the type of

loads and time-varying load patterns are also considered

in the algorithm in order to suggest the compensator’s

switching patterns over time Finally, the algorithm is

written in MATLAB language and tested on the data

retrieved from an actual three-phase, three-wire

distri-bution feeder to verify its effectiveness

Figure 1 shows the general unbalanced three-phase

load fed from a three-phase, three-wire source Load

and compensator are connected in delta therefore zero

sequence component will equal to zero The

compen-sator currents (I . ac, I . bc, I . cc) is added to load currents

(I . al,

.

I bl,

.

I cl) and then the following equation is satisfied

(written for phase A, similarly for phase B and C):

= (I . a1l+I . a2l+I . a0l)+(I . a1c+I . a2c+I . a0c)

= (I . a1l+I . a1c)+(I . a2l+I . a2c)+(I . a0l+I . a0c) · (1)

Here subscripts “c” and “l” represent for the quantities

coming from compensator and load respectively:

• I . a: line current supplying to load after

compensa-tion

• I . a1, I . a2, I . a0: positive, negative and zero current

sequence components

The objective of load compensation is to eliminate or

limit any the negative and zero sequence components of

load currents Since zero components are zero therefore

in this case the line currents will become perfectly

bal-anced if the negative sequence component is eliminated

Mathematic expression of above statement is shown in

real( I . a2l) +real( I . a2c) = 0

imaginary( I . a2l) +imaginary( I . a2c) = 0 (3)

The Eq 3 mathematically depicts the overall conditions

for load balancing

3 Possibility of using only either

capaci-tive or induccapaci-tive element as a

compen-sator

One of the factors which electrical utility consider

Fig 2 Diagram of three-phase compensator

when installing the compensator is the capital cost,therefore the lossless compensator is a first top prior-ity and the simplicity of compensator bank is preferred

as well For those reasons, capacitive and inductive pensator banks would be the most prominent solutions

com-Furthermore, if a compensator consists of both inductiveand capacitive banks then the compensation system will

be obviously more complex than that if only either purecapacitive or pure inductive bank is used Moreover,the higher complexity degree of compensator will result

in more investment money and more time for nance In order to offer cost advantages to utilities, thepossibility of using only either capacitive or inductivecompensation bank as the phase loading compensatorwill be proven in this section

mainte-Considering the general case where the compensator

is full thee-phase and delta connection as shown in Fig 2(hereY ab,Y bc,Y caare compensator’s admittances)

Assume that phase voltages are perfectly balanced:

.

V A=V ∠00, V B=V ∠1200, V . C =V ∠2400Currents generated by compensator are calculated asshown in Eq 4:

com-• Case (a): Single-phase compensator is connected across phase A and phase B (Y bc = 0, Y ca = 0).

In order to generalize the results, the values used inthis section will be in per unit

Substitute (Y ab,Y bc= 0, Y ca = 0) into Eq 5, rent sequence components produced by this singlephase compensator are:

Phase Load Balancing In Distribution Power System Using Discrete Passive Compensator

Fig 3 Diagram of single-phase compensations

Table 1 Negative current components

con-tributed by various single phase compensator

Fig 4 Vector diagram of negative current

com-ponents generated by various single phase

Here subscript “AB” denotes current quantities

re-sulting from the single phase compensator

con-nected across phases A&B

◦ If the compensator is capacitive element with

• Case (b) & (c): Similar calculations are applied for

case (b) and case (c)

Table 1 and Fig 4 show the results of sequence

compo-nents contributed by various single phase compensator

configurations Assume that the compensator must

generate a required negative sequence current as shown

in Fig 5 This required vector will be decomposed into

two nearest available vectors:

• Case a: If the compensator is capacitive then the

re-quired vector can be decomposed into the two

near-est component vectors on CA and BC axes with

Fig 5 Decomposition of required negative rent vector into two nearest component vectors

cur-magnitudes of a (pu) and b (pu) respectively as

shown in (Fig.5-a)

In order to generate thea (pu) vectors on CA axis

then a single phase capacitive compensator nected across phases C&A must be used (accord-ing to Table 1) The value of CA capacitive singlephase compensator will be:

• Case b: Similarly, if compensator is inductive then

a pair of two single phase compensators connectedacross phases A&B and B&C must be used (Fig.5-b)

The final inductive compensator configuration willtake follow form: [Y ab;Y bc; 0]

In summary, the compensator which is formed from ther pure capacitive or pure inductive banks can gener-ate any desired negative current regardless of magnitudeand phase angle In other word, it is possible to useonly either capacitive or inductive elements to balancethe phase load currents

system

of load balancing or load compensation in distributionlevel may involve some of follow aspects:

Technical aspects:

• Compensation algorithm must be able to apply to

calculate for not only individual load but also forfeeder with several connected loads The problem

of unbalanced phase loading is not new in powersystems, however, the previous proposed solutionsare to deal with single individual unbalanced loadonly and they did not figure out how to deal withthe feeder which has several connected loads(6)∼(9).The contribution of this paper is to propose an al-gorithm which can apply to solve the unbalancedphase loading phenomenon for not only single loadbut also for the feeder accommodating several loads

Fig 6 Representative feeder

as seen in practice

• Algorithm must produce as more accurate results

as possible in comparison with other proposed

so-lutions: in literature, all the calculations were

based on assumption that voltages are perfectly

bal-anced(6) (7), but actually voltages at load terminal

may not be always balanced due to many reasons

In order to overcome this limit and to provide a more

accurate solution, this proposed algorithm will use

the actual node voltages (not assumed voltages) in

all calculations

Cost advantage aspects: The key contribution of this

paper is that proposing an economically justifiable

com-pensation solution

• In order to reduce investment cost and make it

ap-plicable to power distribution level then only either

pure capacitor bank or pure reactor bank is

consid-ered to form the compensator as stated in Sec 3,

mixed capacitive and reactive compensator bank is

not an option

• As stated in Sec 1, power electronic compensators

or active compensators are a perfect choice but these

solutions are far more expensive than that if the

pas-sive compensators are selected

For that consideration, the discrete switched

pas-sive compensator banks (such as discrete capacitor

or discrete reactor bank) will be utilized as the

com-pensator

im-balance phase loading phenomenon does not

immedi-ately show its influence over system and equipments due

to the fact that thermal inertias of equipments are quite

long Based on that analysis, it is not really imperative

to instantly correct the imbalance phase loading

situ-ation since it occurs and the balancing action can be

carried out on averaged data over a time interval In

other word, if daily loading curve is known then it can

be stripped into smaller intervals and the compensation

action will be calculated based on the unbalance factor

averaged over each that time interval

From above view point, load balancing algorithm is

pro-posed as follow: Considering the representative feeder

withm loads as shown in Fig 6.

Step 1 : Determine the first loading level ( n = 1) to

as-sess for imbalance compensation (heren stand for

load-ing level order)

Step 2 : Run three-phase, unbalance power flow

calcu-lation with the given loading level from step 1

This unbalance power flow module has ability to handle

for various types of loads such as the load with

con-stant power; load with concon-stant impedance or load with

constant current(11) Furthermore, mutual impedance of

distribution line is also taken into account

The outputs of this step will be all node voltages(V Ai , V Bi , V Ci) and all load currents (I ali , I bli , I cli) with

i = 1 ÷ m (here subscript “i” is used for numbering

the loads)

Step 3 : Calculate negative current I . a2li produced by

load

Start calculating with the last load (corresponding to

i = m) at ending section of the feeder as shown in Fig 6.

Load currents (I ali , I bli , I cli) resulting from step 2 will be

used in here Equation 9 shows the calculation:

withC iandD iare real and imaginary parts of negative

current produced by load numberi.

Step 4 : Calculate the compensator size This step

consists of the follow sub-steps:

* Establish load balancing equations to determine the compensator’s negative current which will cancel load negative current resulting from step 3 In this step, ac-

tual load voltages (V Ai , V Bi , V Ci) from step 2 will be used

in calculation to improve accuracy

Referring to Fig 2, current generated by compensatoris:

⎧

⎨

⎩

.

I . aci= (V . Ai − V . Bi)Y . abi − ( V . Ci − V . Ai)Y . cai

I . bci= (V . Bi − V . Ci)Y . bci − ( V . Ai − V . Bi)Y . abi

I cci= (V . Ci − V . Ai)Y . cai − ( V . Bi − V . Ci)Y . bci

(10)

Here Eq 10 looks different with Eq 4 due to the factthat actual voltages V . Ai, V . Bi,V . Ciof node i are used

instead of assumed balanced voltagesV In Eq 10, node

volatges. V . Ai,V . Bi,V . Ci are already known;Y . abi,Y . bci,

Y caiare compensator’s admittances and are all unknown

Y cai:



E i=E i(Y . abi , Y . bci , Y . cai)

F i=F i(Y . abi , Y . bci , Y . cai)

Load balancing process is to satisfy the balancing ditions as stated in Eq 3, in this context, substitute

con-E i , F i , C i , D iinto Eq 3 we come up with following loadbalancing equations:



E i(

.

Y abi , Y . bci , Y . cai) +C i= 0

F i(Y . abi , Y . bci , Y . cai) +D i= 0 · · · (12)

Or in general form



E i(Y ) + C i= 0

F i(Y ) + D i= 0

Phase Load Balancing In Distribution Power System Using Discrete Passive CompensatorwithY represents for compensator’s admittance.

* Solve load balancing equations by utilizing discrete

optimization technique.

Since load balancing conditions or equations have been

already established in Eq 12 then the target of this step

is to find out the values of variablesY abi, Y bci, Y cai to

fulfill those equations

Because Y abi, Y bci, Y cai can take only discrete values

(as mentioned in Sec 4.1) then the Eq 12 can not be

solved directly by conventional methods which apply to

only continuous variables That is the reason why the

discrete optimization technique needs to take part in

The objective of discrete optimization is to ultimately

fulfill the Eq 12 so that minimize the negative current

magnitude of load Mathematical expression of that

ob-jective function can be expressed as below:

[Y ] n d ≤ [0] (for reactor)

n d: maximum number of taps for each compensator.

Each element of [Y ] n d will be assigned to a value of

cor-responding tap in a discrete manner

In this proposal, brute-force search algorithm is

uti-lized to solve the discrete optimization The brute-force

search technique is simple to implement and will always

find a solution(10)

Outputs of this step is optimal values of compensator

“i” (Y abi,Y bci,Y cai) in a discrete manner.

Step 5 : Add up compensator “i” to the

correspond-ing load “i” and go back to step 2 Now run the power

flow again with updated load “i” and roll up to calculate

compensator size for the upstream adjacent load “i−1”.

Repeat the process from step 2 to step 5 until all loads

are processed and final results will be values of all

com-pensators for all loads: {Y abi;Y bci;Y cai } with i = 1 ÷ m.

Step 6 : Check for further compensation if is is

neces-sary

Since all compensators have been added to all

corre-sponding loads then it is necessary to check for any

fur-ther compensation correction This can be done by going

back to step 2 to run power flow again with all updated

loads and repeat all the above mentioned procedures

The iteration will terminate whenever no further

com-pensation correction is required

The condition to terminate calculation process is as

fol-low:

Whenever the conditionsY abi = Y bci = Y cai with all

i = 1 ÷ m are satisfied then the iteration will stop

be-cause those conditions mention that all compensators

now are three-phase balanced Since they are balanced

they will not produce any negative current to cancel for

load negative current In other word, at this stage the

compensator size is already an optimal value and no

fur-ther compensation is needed

Fig 7 Phase load balancing algorithm

Outputs of this step 6 will be the final values of allcompensators Those discrete optimal compensator’ssizes will be used to determine the corresponding tappositions Those tap positions are the first switchingpatterns of the compensators corresponding to the firstloading level

Since compensation strategy to deal with a certainlevel of unbalance has been already addressed, it is pos-sible to run multiple unbalance level configurations inorder to figure out the switching scheme for compen-sators over a day period Therefore, next step is to goback step 1 and begin to works with next loading level(loading level “n + 1”).

Figure 7 shows the entire flow chart of the algorithm

algo-rithm is written in MATLAB and the effectiveness ofalgorithm is tested with the data collecting from an ac-tual feeder which has 3 main lateral loads as shown in

Fg 8 Simulations are run with following conditions:

• All loads have leading power factors (this is based

on actual data provided by power utility company)

• The compensators are selected to be all inductive

due to existing leading power factors of loads; if

Fig 8 Case study of feeder with three loads

Fig 9 Negative currents before & after

compen-sation through Line 1

pacitive compensators are used then the power

fac-tor will become worse

• Compensators are switchable with maximum 10

steps and each step is 25kVAR; 15kVAR and 5

kVAR for compensator 1; compensator 2 and

com-pensator 3 respectively

In this paper, time interval for unbalance assessment is

selected as 2 hours, in other word, each compensator will

have 12 time-switching patterns over every 24 hours or

a day

The load balancing algorithm is written in MATLAB

This algorithm consists of two main modules

• The first is unbalance power flow module This

un-balance power flow module has ability to handle for

various types of loads such as the load with constant

power; load with constant impedance or load with

constant current Furthermore, mutual impedance

of distribution line is also taken into account(11)

• The second module is implementation of brute-force

search algorithm This search algorithm is

sim-ple(10), however, calculation time will grow

signifi-cantly when the size of problem increases In power

distribution level, the discrete switched capacitor

bank (or reactor bank) has only a few number of

taps so that if even brute-force search is applied then

the calculation time will not be a matter

5.2 Result and discussion

5.2.1 Effectiveness of compensation algorithm

The effectiveness of compensations are illustrated in

Fig 9, 10 and 11 Based on results of negative current

before and after compensation, it is clear that the

pro-posed compensation strategy shows a significant load

balancing effect, the magnitudes of negative currents

that represent the imbalance degree may reduce to less

than 1% in some cases However, the full

compensa-tion effect (resulting in zero negative current) cannot be

expected due to the discrete characteristic of

compen-sators

In addition, the node voltages become balanced as a

0 2 4 6 8 10 12 14 16

Figure 15, 16 and 17 show the absolute value of nodevoltages with respect to the source voltage of 6750 (V)

In this simulation, the downstream node voltages times are higher than the source voltage due to the lead-

Phase Load Balancing In Distribution Power System Using Discrete Passive Compensator

Fig 15 Absolute voltage value before & after

Fig 16 Absolute voltage value before & after

compensation at node 2

ing power factor condition After compensation, the

leading reactive powers are partially absorbed by

in-ductive compensators and as a consequence, the

down-stream node voltages become not only mostly balanced

but also its magnitudes are reduced to appropriate level

The maximum voltage deviation from the rated value is

about± 3 % and all node voltages are within allowable

level

The switching patterns of compensators are indicated

by their tap positions versus time The results are

pre-sented in Fig 18, 19 and 20 Moreover, the

compen-sation shows not only load balancing effect but it also

helps to reduce power losses through the investigated

system Figure 21 shows power loss improvement after

Time Interval

Fig 17 Absolute voltage value before & after compensation at node 3

0 50 100 150 200 250 300

Time Interval

Tap position vs Time for Compensator 1

Fig 18 Tap position vs Time for Compensator 1

0 20 40 60 80 100 120 140 160 180

Time Interval

Tap position vs Time for Compensator 2

Fig 19 Tap position vs Time for Compensator 2

0 10 20 30 40 50 60

Time Interval

Tap position vs Time for Compensator 3

Fig 20 Tap position vs Time for Compensator 3

P LI = P L bf − P L af

P L bf × 100 (%)whereP L bf andP L af are total power losses before andafter compensation

According to results of simulation, power losses provement can be more than 70% and in the the leastremarkable situation it is about 16% The possible rea-sons for power losses improvement can be convinced asfollow:

im-• As stated in Ref (2), under unbalance loading

Power Loss Improvement

Fig 21 Power loss improvement after compensation

tion the power system will incurs more losses Since

compensation takes part in, the loading situation

approaches to a near balanced status, as a result,

the power losses will be smaller

• All the loads of investigated feeder have leading poor

power factors and as a countermeasure,

compen-sators are selected to be all inductive elements and

these inductive compensators will help to improve

power factors through out the system Since power

factors are improved the power losses will reduce as

a consequence

al-gorithm used to calculate size of discrete compensator is

already described in Sec 4.2, in comparison with other

proposals(6) (7), this algorithm shows some advantages

in term of application range and accuracy The

pro-posed algorithm can apply not only for single individual

load but also for any feeder which has several connected

loads In addition, it actually incorporates the power

flow and compensation calculation processes by using

an iteration technique and this new feature does help to

improve the accuracy of compensation process

Figure 22 compares the results with and without the

incorporation technique and reveals the significant

ef-fectiveness of that new feature The incorporation

tech-nique shows significant effect, for instance, on line 1 and

line 2 In Fig 22, if incorporation technique is employed

then the average negative current after compensation

can minimize to about 1 % on line 1, in contrary to that

result, if that technique is not deployed then the

neg-ative current after compensation remains at high level

about 8 %

The reason why that technique can bring better results

for compensation process is possibly explained as follow:

If the incorporation technique is not used, the influence

of power flow changing will not be taken into account

and consequently the results are less accurate in

com-parison with that in case the incorporation techniques

it is utilized Referring to Fig 8, line 3 is the ending

sec-tion of the feeder and it is inherently less affected by the

changing of power flow caused by adding compensators

to loads after each iteration, however, line 2 and line

1 are upstream sections and they will be strongly and

accumulatively affected by power flow changing since

downstream loads are altered Those reason can explain

why the incorporation technique shows a significant

ef-fect on results for line 1 and line 2 but shows only a very

minor effect in case of line 3

0 2 4 6 8 10

Time Interval

Average negative current through line

With Incorporation Without Incorporation

Fig 22 Average negative currents after sation with & without iteration technique

compen-Moreover, another reason which accounts for the higheraccurate results is that using actual node voltages inall calculations instead of assumed balanced voltages asimplemented in Sec 4.2

This paper has introduced a cost effective solutions

to deal with the problem of phase load imbalance indistribution level The mechanism of using passive com-pensator to balance phase loading is developed and thealgorithm for determining the size of discrete compen-sator is presented as well The algorithm is main contri-bution of this paper and it already shows many advan-tages in comparison with other proposals A simplifiedcase study based on an actual distribution feeder is used

to verify the possibility of the proposed compensationstrategy Finally, all the results indicate a feasible, lowcost solution which is applicable to power distributionsystem

Appendix

1 Case study parameter

app Table 1 Parameter of case study feeder

Line 1 Line 2 Line 3 Impedance (Ω) 0.5557+j0.9982 0.3781+j0.4154 0.3803+j0.558

2 Brute-force search algorithm

Brute-force search algorithm is used to the solve lowing problem:

Phase Load Balancing In Distribution Power System Using Discrete Passive Compensator

g: set of m inequality constrains

Begin algorithm

First step: setf ∗=inf then

for For every allowable combination of:

( 1 ) V J Annette von Jouanne, and B Basudeb, “Assessment

of voltage unbalance”, IEEE Transaction on power delivery,

Volume 16, (2001)

( 2 ) L F Ochoa, R M Ciric, A P Feltrin, and G P Harrison,

“Evaluation of distribution system losses due to load

unbal-ance”, 15th Power Systems Computation Conference, (2005)

( 3 ) J Zhu, M Y Chow, and F Zhang, “Phase balancing using

mixed-integer programming”, IEEE Transaction on power

system, Volume 13, (1998)

( 4 ) H M Khodr, I J Zerpa, P M De Oliveira-De Jesus, and

M A Matos, “Optimal phase balancing in distribution

sys-tem using mixed-integer linear programming”, Transmission

& Distribution Conference and Exposition: Latin America

IEEE/PES, (2006)

( 5 ) M Dilek, R P Broadwater, J C Thompson, and R Sequin,

“Simultaneous phase balancing at substations and switches

with time-varying load patterns”, IEEE Transaction on

power system, Volume 16, (2001)

( 6 ) L Gyugyi, R A Otto & T H Putman, “Principles and

ap-plications of static, thyristor-controlled shunt compensators”,

IEEE Transactions on Power Apparatus and Systems, Vol.

PAS-97, (1978)

( 7 ) V G Nikolaenko, “Optimal balancing of large unbalanced

loads using shuntcompensators”, Harmonics And Quality of

Power Conference, The 8th Internation, (1998)

( 8 ) Z Yongqiang and L Wenhua, “Balancing compensation of

unbalanced load based on single phase STATCOM”, Power

Electronics and Motion Control Conference, The 4th

Inter-nation, (2004)

( 9 ) B Singh, S Anuradha, and D P Kothari, “Power factor rection and load balancing in three-phase distribution sys-

cor-tems”, IEEE region 10 international conference on global

connectivity in energy, computer, communication and trol, (1998)

con-(10) P Venkataranman: Applied optimization with MATLAB gramming, John Wiley & Sons, Inc (2002)

pro-(11) H K William: Distribution system modeling and analysis, CRC Press (2007)

Nguyen Xuan Tung (Non-member) was born in Hai

Duong, Vietnam, on April 15, 1975 He ceived the B.E degree in electrical enginer- ing from Hanoi University of Technology, Viet- Nam in 1999 and the M.E degree from Curtin University of Technology, Australia in 2005.

re-He has been pursuing PhD degree in Shibaura Institute of Technology, Japan since 2007 His interests are about relay protection system and power quality issue in power distribution system.

Goro Fujita (Member) received the B.E., M.E and Ph.D

degrees in electrical engineering from Hosei University, Tokyo, Japan in 1992, 1994 and

1997 respectively In 1997, he was a research student of Tokyo Metropolitan University He

is an Associate Professor of Shibaura tute of Technology, Tokyo, Japan His inter- est is in power system control including AGC and FACTS He is a member of the Society of Instrument and Control Engineers (SICE) of Japan,the IEE of Japan, and IEEE.

Insti-Kazuhiro Horikoshi (Member) was born in Miyagi, Japan,

degree in electrical engineering from Tohoku University, Japan, in 1990 In the same year,

he joined Tohoku Electric Power Co., Sendai, Japan He is now an assistant research man- ager in Research & Development Center at To-

area is about distribution system and connection of distributed generations.

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