SAPPORO M (BTW20) LA-1691 REV0.4 Schematic Document Intel Mobile P4 ufCBGA/ufCPGA Northwood Celeron MCH – M(845MZ) + ICH3 – M+M6 – C(16MB VRAM) A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of 401241 1A SCHEMATIC, M/B LA-1691 Custom 153, 星期二 一月 07, 2003 Compal Electronics, inc. LA-1691 REV0.4 Schematic Document MCH-M(845MZ)+ICH3-M+M6-C(16MB VRAM) Intel Mobile P4 uFCBGA/uFCPGA Northwood Celeron 2002-12-12 SAPPORO M (BTW20) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A A B B C C D D E E 4 4 3 3 2 2 1 1 Title Size Document Number Rev Date: Sheet of 401241 1A SCHEMATIC, M/B LA-1691 Custom 253, 星期二 一月 07, 2003 Compal Electronics, inc. PAGE 38 Embedded Controller PAGE 44 SO-DIMM x 2(DDR) PSB PAGE 7,8,9 PAGE 4,5,6 PAGE 14,15,16,17 PAGE 20,21,22 625 BGA ICS9508-10 ATA 66/100 LPC BUS 33MHz (3.3V) BATTERY NS PC87591L PAGE13 Charger PAGE 42 Brookdale-M Power Interface & TEMP. sensing circuit Mobile Thermal Sensor HUB Interface ICH3-M AGP Memory Bus BANK 0,1,2,3 PAGE 4 Clock Generator LPC47N227 (uFCBGA/uFCPGA) PAGE 46,47,48 DC/DC Interface RTC Battery PAGE 10,11,12 48MHz (3.3V) BTW20 LA-1691 BLOCK DIAGRAM 421 BGA PAGE 32 Super I/O AGP Bus PAGE 5 CPU VID PAGE 40 MCH-M 845MZ ATI-M6-C PAGE 18 CRT&LVDS Connector OZ168T Audio CD-DJ PAGE 29 PAGE 25 Slot 0/1 Northwood SD Reader Winbond 400MHz 200MHz (2.5V) 266MHz (1.8V) FANController PAGE 27 RJ-45 PAGE 34 Audio Hardware PAGE 35 AC97 CODEC PAGE 28 Mini PCI IEEE1394 TSB43AB21 PAGE 23 PAGE 33 PAGE 30 IDE HDD CD-ROM/DVD USB 1.1 Port *4 33MHz (3.3V) PCI BUS RTL8100-B(L) LAN PAGE 26 PAGE 24 OZ6933 CARDBUS EQ MDC PAGE 31 AC-LINK 24.576MHz (3.3V) Parallel PAGE 38 BIOS & I/O PORTScan KB PAGE 39 ALC 202 Connector PAGE 31 REV B REV B1 REV B1 RJ-11 PAGE 27 PAGE 30 ADM1032 PAGE 33 BlueTooth Connector Connector TV-OUT PAGE 19 W83L518D PAGE 37 2nd IDE TPA0232 PAGE 36 Audio Amplifier THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of 401241 1A SCHEMATIC, M/B LA-1691 Custom 353, 星期二 一月 07, 2003 Compal Electronics, inc. Voltage Rails VIN B+ +CPU_VCC +1.2VP Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU 1.2V switched power rail for CPU AGTL Bus External PCI Devices Device IDSEL# REQ#/GNT# Interrupts CardBus Mini-PCI LAN AD20 AD18 AD17 EC SM Bus1 address Device ADM1032 OZ168 Docking S1 S3 S5 ON OFF ON OFF N/A N/A N/A N/AN/AN/A Power Plane Description OFF OFF Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. EC SM Bus2 address Device Smart Battery 2 1/4 PIRQA/PIRQB(PIRQE/PIRQF) PIRQC/PIRQD(PIRQG/PIRQH) EEPROM(24C16/02) DOT Board 0011 0100 b 1001 110X b 0011 011X b XXXX XXXXb 0001 011X b 1010 000X b AGP 4X ON OFF OFF+1.5VS 3 PIRQB(PIRQD) (24C04) 1011 000Xb Smart Battery 0001 011X b ICH3 SM Bus address Device Clock Generator ( ICS-950810) Address Address Address 1101 001X +1.25VS 1.25V switched power rail ON OFF OFF 1394 AD16 0 PIRQA STATE SIGNAL Full ON S1(Power On Suspend) S3 (Suspend to RAM) S4 (Suspend to Disk) S5 (Soft OFF) SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock ON ON ON ON ON ON ON ON ON ON ON OFF OFF OFF OFF OFF OFF OFF OFF LOW LOW LOW LOW LOW LOWLOWLOW LOW LOW LOW HIGH HIGH HIGH HIGH HIGHHIGHHIGH HIGH HIGH HIGH +1.2VS 1.2V switched power rail for Montara core ON OFF OFF 1394 CardBus LAN MINIPCI Topology Mount R458 RP122 Unmount R474 RP125 R533 Trace: PIRQA#_1394 Use IRQA Trace:PIRQA#/E# PIRQB#/F#/D# Use IRQA IRQB Trace:PIRQB#/F#/D# Use IRQB Trace:PIRQC#/G# PIRQD#/H# Use IRQC IRQD Board ID Table for AD channel Vcc 3.3V +/- 5% 100K +/- 5%Ra Board ID Rb V min 0 1 2 3 0 8.2K +/- 5% 0 V 0.216 V 0.250 V 0.289 V 0.436 V 0.712 V 0.503 V 0.819 V 0.538 V 0.875 V AD_BID V typ AD_BID V AD_BID max 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% 3.300 V 0 V 0 V 4 5 6 7NC 1.036 V 1.453 V 1.650 V 1.759 V 1.935 V 2.500 V 2.200 V 3.300 V 2.341 V 1.185 V 1.264 V Board ID 0 1 2 3 4 5 6 7 PCB Revision 0.1 , 0.2 OFF ON +5V ON OFF OFF +3V 2.5V power rail ON ON ON ON OFF RTCVCC 3.3V power rail OFF ON 5V power rail ON* OFF 5V switched power rail +2.5V OFF RTC power 3.3V switched power rail ON OFF ON ON +12VALW +3VS ON +5VALW ON +5VS ON ON 2.5V switched power rail+2.5VS ON*ON ON* ON 12V always on power rail +3VALW OFF ON 5V always on power rail 3.3V always on power rail ON OFF1.8V switched power rail ON OFF 1.8V always power rail ON ON +1.8VS ON*+1.8VALW ** ** 0.3 NO DIRECT CD PLAY THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A A B B C C D D E E 1 1 2 2 3 3 4 4 HA#[3 31] H_THERMDA H_THERMDC HD#44 HD#39 HD#35 HD#2 HA#13 HA#7 HD#24 HD#15 HD#23 HD#12 HD#51 HD#49 HD#31 HD#17 HD#8 HREQ#2 HA#12 HD#57 HD#52 HD#40 HD#36 HD#25 HD#9 HD#4 HA#15 HD#33 HD#19 HD#14 HA#11 HD#32 HA#14 HA#5 HD#62 HD#53 HD#27 HD#20 HA#29 HA#27 HA#20 HD#38 HD#37 HD#7 HA#30 HA#28 HA#26 HA#17 HA#3 HD#45 HD#1 HA#19 HA#10 HA#4 HD#42 HA#9 HD#61 HD#54 HD#21 HD#10 HD#6 HA#31 HA#22 HA#18 CLK_CPU_BCLK HD#60 HD#47 HD#28 HD#16 HREQ#3 HREQ#0 HA#23 HD#59 HD#46 HD#34 HD#29 HD#18 HREQ#4 HA#25 HA#6 HD#56 HD#50 HD#41 HD#26 HD#5HA#8 CLK_CPU_BCLK# HD#63 HD#55 HD#43 HD#22 HD#3 HA#24 HA#21 HA#16 HREQ#[0 4] HD#[0 63] HD#58 HD#48 HD#30 HD#13 HD#11 HD#0 HREQ#1 HA#[3 31]7 HREQ#[0 4]7 HD#[0 63] 7 H_ADS#7 H_BPRI#7 H_LOCK#7 H_BNR#7 H_HIT#7 H_HITM#7 H_DEFER#7 H_BREQ0#7 CLK_CPU_BCLK#13 CLK_CPU_BCLK13 EC_SMC229,38 EC_SMD229,38 H_THERMDA5 H_THERMDC5 +CPU_CORE +CPU_CORE +3VS +CPU_CORE +3VS Title Size Document Number Rev Date: Sheet of 401241 1A SCHEMATIC, M/B LA-1691 Custom 453, 星期二 一月 07, 2003 Compal Electronics, inc. Thermal Sensor ADM1032AR W=15mil Address:1001_100X MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D R91 Close to U37 pinM23 ** NorthWood Mobile U37A NorthWood A#3 K2 A#4 K4 A#5 L6 A#6 K1 A#7 L3 A#8 M6 A#9 L2 A#10 M3 A#11 M4 A#12 N1 A#13 M1 A#14 N2 A#15 N4 A#16 N5 A#17 T1 A#18 R2 A#19 P3 A#20 P4 A#21 R3 A#22 T2 A#23 U1 A#24 P6 A#25 U3 A#26 T4 A#27 V2 A#28 R6 A#29 W1 A#30 T5 A#31 U4 A#32 V3 A#33 W2 A#34 Y1 A#35 AB1 REQ#0 J1 REQ#1 K5 REQ#2 J4 REQ#3 J3 REQ#4 H3 ADS# G1 AP#0 AC1 AP#1 V5 BINIT# AA3 IERR# AC3 BNR# G2 BPRI# D2 BR0# H6 LOCK# G4 DEFER# E2 HITM# E3 HIT# F3 D#0 B21 D#1 B22 D#2 A23 D#3 A25 D#4 C21 D#5 D22 D#6 B24 D#7 C23 D#8 C24 D#9 B25 D#10 G22 D#11 H21 D#12 C26 D#13 D23 D#14 J21 D#15 D25 D#16 H22 D#17 E24 D#18 G23 D#19 F23 D#20 F24 D#21 E25 D#22 F26 D#23 D26 D#24 L21 D#25 G26 D#26 H24 D#27 M21 D#28 L22 D#29 J24 D#30 K23 D#31 H25 D#32 M23 D#33 N22 D#34 P21 D#35 M24 D#36 N23 D#37 M26 D#38 N26 D#39 N25 D#40 R21 D#41 P24 D#42 R25 D#43 R24 D#44 T26 D#45 T25 D#46 T22 D#47 T23 D#48 U26 D#49 U24 D#50 U23 D#51 V25 D#52 U21 D#53 V22 D#54 V24 D#55 W26 D#56 Y26 D#57 W25 D#58 Y23 D#59 Y24 D#60 Y21 D#61 AA25 D#62 AA22 D#63 AA24 VCC_0 A10 VCC_1 A12 VCC_2 A14 VCC_3 A16 VCC_4 A18 VCC_5 A20 VCC_6 A8 VCC_7 AA10 VCC_8 AA12 VCC_9 AA14 VCC_10 AA16 VCC_11 AA18 VCC_12 AA8 VCC_13 AB11 VCC_14 AB13 VCC_15 AB15 VCC_16 AB17 VCC_17 AB19 VCC_18 AB7 VCC_19 AB9 VCC_20 AC10 VCC_21 AC12 VCC_22 AC14 VCC_23 AC16 VCC_24 AC18 VCC_25 AC8 VCC_26 AD11 VCC_27 AD13 VCC_28 AD15 VCC_29 AD17 VCC_30 AD19 VCC_31 AD7 VCC_32 AD9 VCC_33 AE10 VCC_34 AE12 VCC_35 AE14 VCC_36 AE16 VCC_37 AE18 VCC_38 AE20 VCC_39 AE6 VCC_40 AE8 VCC_41 AF11 VCC_42 AF13 VCC_43 AF15 VCC_44 AF17 VCC_45 AF19 VCC_46 AF2 VCC_47 AF21 VCC_48 AF5 VCC_49 AF7 VCC_50 AF9 VCC_51 B11 VCC_52 B13 VCC_53 B15 VCC_54 B17 VCC_55 B19 VCC_56 B7 VCC_57 B9 VCC_58 C10 VCC_59 C12 VCC_61 C14 VCC_62 C16 VCC_63 C18 VCC_64 C20 VCC_65 C8 VCC_66 D11 VCC_67 D13 VCC_68 D15 VCC_69 D17 VCC_70 D19 VCC_71 D7 VCC_72 D9 VCC_74 E12 VCC_75 E14 VCC_76 E16 VCC_77 E18 VCC_78 E20 VCC_79 E8 VCC_80 F11 VSS_0 H1 VSS_1 H4 VSS_2 H23 VSS_3 H26 VSS_4 A11 VSS_5 A13 VSS_6 A15 VSS_7 A17 VSS_8 A19 VSS_9 A21 VSS_10 A24 VSS_11 A26 VSS_12 A3 VSS_13 A9 VSS_14 AA1 VSS_15 AA11 VSS_16 AA13 VSS_17 AA15 VSS_18 AA17 VSS_19 AA19 VSS_20 AA23 VSS_21 AA26 VSS_22 AA4 VSS_23 AA7 VSS_24 AA9 VSS_25 AB10 VSS_26 AB12 VSS_27 AB14 VSS_28 AB16 VSS_29 AB18 VSS_30 AB20 VSS_31 AB21 VSS_32 AB24 VSS_33 AB3 VSS_34 AB6 VSS_35 AB8 VSS_36 AC11 VSS_37 AC13 VSS_38 AC15 VSS_39 AC17 VSS_40 AC19 VSS_41 AC2 VSS_42 AC22 VSS_43 AC25 VSS_44 AC5 VSS_45 AC7 VSS_46 AC9 VSS_47 AD1 VSS_48 AD10 VSS_49 AD12 VSS_50 AD14 VSS_51 AD16 VSS_52 AD18 VSS_53 AD21 VSS_54 AD23 VSS_55 AD4 VSS_56 AD8 BCLK0 AF22 BCLK1 AF23 VCC_81 F13 VCC_82 F15 VCC_83 F17 VCC_84 F19 VCC_85 F9 VCC_73 E10 C534 2200P_0402_25V7K R31 10K_0402_5% C537 0.1U_0402_16V4Z R74 220_0402_5% U34 ADM1032AR_SOP-8 VDD1 1 ALERT 6 THERM 4 GND 5 D+ 2 D- 3 SCLK 8 SDATA 7 R369 4.7K_0402_5% R370 4.7K_0402_5% A A B B C C D D E E 1 1 2 2 3 3 4 4 H_DSTBP#[0 3] H_VSSA TP2 H_THERMDA H_DSTBN#[0 3] COMP0 H_SMI# H_DSTBN#2 H_DSTBN#1 H_DPSLP# CLK_CPU_ITP# H_DBI#3 H_DSTBN#3 H_THERMDC H_IGNNE# H_THERMTRIP# CLK_CPU_ITP H_DBI#0 GHI# +H_VCCIOPLL H_DBI#2 H_DSTBN#0 H_FERR# H_VSSA TP1 H_DSTBP#1 TESTTHI0_1 H_RESET# H_A20M# TP1 ITP_TMS COMP1 +H_VCCA H_DSTBP#3 H_DSTBP#2 H_DSTBP#0 ITP_PREQ# ITP_TRST# H_PROCHOT# TESTTHI8_10 H_DBI#[0 3] TP2 H_INIT# +GTLREF H_DBI#1 ITP_PRDY# H_INTR H_STPCLK# H_NMI ITP_TCK ITP_TDI ITP_BPM0 ITP_BPM1 ITP_TDI ITP_TMS ITP_TRST# ITP_TCK ITP_PREQ# ITP_PRDY# ITP_BPM1 ITP_BPM0 H_PWRGD H_RESET# H_PWRGD H_SMI# H_IGNNE# H_STPCLK# H_DPSLP# H_NMI H_INTR H_FERR# H_A20M# H_INIT# H_CPUSLP# H_THERMTRIP# H_RS#07 H_RS#17 H_RS#27 H_TRDY#7 H_A20M#20 H_PWRGD20 H_FERR#20 H_CPURST#7 H_IGNNE#20 H_STPCLK#20 H_INTR20 H_DPSLP#20 H_DBSY#7 H_DRDY#7 H_BSEL013 H_BSEL113 H_DSTBP#[0 3] 7 H_ADSTB#0 7 H_ADSTB#1 7 H_DBI#[0 3] 7 H_CPUSLP# 20 H_DSTBN#[0 3] 7 CLK_CPU_ITP#13 CLK_CPU_ITP13 H_INIT#20 H_SMI#20 CPU_VID1 48 CPU_VID2 48 CPU_VID4 48 CPU_VID0 48 CPU_VID3 48 H_NMI20 PM_CPUPERF# 20 H_THERMDA4 H_THERMDC4 EC_CPUPD#38 +1.2VP +1.2VP +CPU_CORE +CPU_CORE +3VS +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +5V Title Size Document Number Rev Date: Sheet of 401241 1A SCHEMATIC, M/B LA-1691 Custom 553, 星期二 一月 07, 2003 Compal Electronics, inc. Murata LQG21F4R7N00 R84 R87 placed with in 0.5" of processor, and at least 25mils away from other signals Place pull up resistors near processor 2/3VCORE CPU Voltage ID 2. Place decoupling cap 220PF near CPU.(Within 500mils) 1. Place R381 and R382 within 0.5" of processor pin F20 Layout note : Place R65 near to U40 pinAB23 Place R420 near to U12 pinW20 TP1 and TP2 must have test points 3. GTLREF trace width 7 mils, and keep 10mils separated from other signals *** ** + C473 33UF_D2_16V 12 R62 51_0603 12 C24 0.1U_0402_16V4Z R164 200_0402_5% THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. R181 56_0402_5% R39 56_0402_5% R40 56_0402_5% R174 200_0402_5% R381 100_0402_1% R21 51.1_1%_0603 12 R378 49.9_0402_1% R324 1K_0402_5% L3 4.7UH_80mA_0805 1 2 R67 51.1_1%_0603 1 2 R48 300_0402_5% R49 56_0402_5% R551 10K 12 R85 56_0402_5% R546 200_0402_5% R79 300_0402_5% R350 56_0402_5% R162 200_0402_5% C544 220P_0402_25V8K R68 51_0603 12 R86 @0_0402_5% Q47 3904 2 3 1 R351 56_0402_5% R552 470 12 Mobile NorthWood U37B NorthWood RS#0 F1 RS#1 G5 RS#2 F4 RSP# AB2 TRDY# J6 A20M# C6 FERR# B6 IGNNE# B2 SMI# B5 PWRGOOD AB23 STPCLK# Y4 DPSLP# AD25 LINT0 D1 LINT1 E5 INIT# W5 RESET# AB25 DRDY# H2 DBSY# H5 THERMDC C4 THERMDA B3 TDI C1 TCK D4 TDO D5 TMS F7 TRST# E6 COMP1 P1 COMP0 L24 DP#0 J26 DP#1 K25 DP#2 K26 DP#3 L25 VSS_57 AE11 VSS_58 AE13 VSS_59 AE15 VSS_60 AE17 VSS_61 AE19 VSS_62 AE22 VSS_63 AE24 VSS_64 AE26 VSS_65 AE7 VSS_66 AE9 VSS_67 AF1 VSS_68 AF10 VSS_69 AF12 VSS_70 AF14 VSS_71 AF16 VSS_72 AF18 VSS_73 AF20 SKTOCC# AF26 VSS_75 AF6 VSS_76 AF8 VSS_77 B10 VSS_78 B12 VSS_79 B14 VSS_80 B16 VSS_81 B18 VSS_82 B20 VSS_83 B23 VSS_84 B26 VSS_85 B4 VSS_86 B8 VSS_87 C11 VSS_88 C13 VSS_89 C15 VSS_90 C17 VSS_91 C19 VSS_92 C2 VSS_93 C22 VSS_94 C25 VSS_95 C5 VSS_96 C7 VSS_97 C9 VSS_98 D10 VSS_99 D12 VSS_100 D14 VSS_101 D16 VSS_102 D18 VSS_103 D20 VSS_104 D21 VSS_105 D24 VSS_106 D3 VSS_107 D6 VSS_108 D8 VSS_109 E1 VSS_110 E11 VSS_111 E13 VSS_112 E15 VSS_113 E17 VSS_114 E19 VSS_115 E23 VSS_116 E26 VSS_117 E4 VSS_118 E7 VSS_119 E9 VSS_120 F10 VSS_121 F12 VSS_122 F14 VSS_123 F16 VSS_124 F18 VSS_125 F2 VSS_126 F22 VSS_127 F25 VSS_128 F5 VID0 AE5 VID1 AE4 VID2 AE3 VID3 AE2 VID4 AE1 GTLREF0 AA21 GTLREF1 AA6 GTLREF2 F20 GTLREF3 F6 NC1 A22 NC2 A7 TESTHI0 AD24 TESTHI1 AA2 TESTHI2 AC21 TESTHI3 AC20 TESTHI4 AC24 TESTHI5 AC23 TESTHI6 AA20 TESTHI7 AB22 TESTHI8 U6 TESTHI9 W4 TESTHI10 Y3 GHI# A6 VSS_129 F8 VSS_130 G21 VSS_131 G24 VSS_132 G3 VSS_133 G6 VSS_134 J2 VSS_135 J22 VSS_136 J25 VSS_137 J5 VSS_138 K21 VSS_139 K24 VSS_140 K3 VSS_141 K6 VSS_142 L1 VSS_143 L23 VSS_144 L26 VSS_145 L4 VSS_146 M2 VSS_147 M22 VSS_148 M25 VSS_149 M5 VSS_150 N21 VSS_151 N24 VSS_152 N3 VSS_153 N6 VSS_154 P2 VSS_155 P22 VSS_156 P25 VSS_157 P5 VSS_158 R1 VSS_159 R23 VSS_160 R26 VSS_161 R4 VSS_162 T21 VSS_163 T24 VSS_164 T3 VSS_165 T6 VSS_166 U2 VSS_167 U22 VSS_168 U25 VSS_169 U5 VSS_170 V1 VSS_171 V23 VSS_172 V26 VSS_173 V4 VSS_174 W21 VSS_175 W24 VSS_176 W3 VSS_177 W6 VSS_178 Y2 VSS_179 Y22 VSS_180 Y25 VSS_181 Y5 BSEL0 AD6 BSEL1 AD5 BPM#0 AC6 BPM#1 AB5 BPM#2 AC4 BPM#3 Y6 BPM#4 AA5 BPM#5 AB4 DSTBN#0 E22 DSTBN#1 K22 DSTBN#2 R22 DSTBN#3 W22 DSTBP#0 F21 DSTBP#1 J23 DSTBP#2 P23 DSTBP#3 W23 ITP_CLK0 AC26 ITP_CLK1 AD26 ADSTB#0 L5 ADSTB#1 R5 DBI#0 E21 DBI#1 G25 DBI#2 P26 DBI#3 V21 DBR# AE25 VCCA AD20 VCCSENSE A5 VCCIOPLL AE23 VCCVID AF4 THERMTRIP# A2 PROCHOT# C3 MCERR# V6 SLP# AB26 VSSA AD22 VSSSENSE A4 NC3 AD2 NC4 AD3 NC5 AE21 NC6 AF24 NC7 AF25 NC8 AF3 R349 56_0402_5% R83 @0_0402_5% R469 470 12 R177 200_0402_5% L2 4.7UH_80mA_0805 1 2 RP6 1.5K_8P4R_0804_5% 1 8 2 7 3 6 4 5 R359 56_0402_5% C149 1U_0603_10V6K R45 56_0402_5% R165 200_0402_5% R56 51_0603 12 RP118 1K_8P4R_0804_5% 1 8 2 7 3 6 4 5 R36 56_0402_5% + C3 33UF_D2_16V 12 R69 51.1_1%_0603 1 2 R66 51_0603 12 R171 200_0402_5% R167 200_0402_5% R352 56_0402_5% R169 200_0402_5% Q53 3904 2 3 1 R357 56_0402_5% R78 56_0402_5% A A B B C C D D E E 1 1 2 2 3 3 4 4 +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE +CPU_CORE Title Size Document Number Rev Date: Sheet of 401241 1A SCHEMATIC, M/B LA-1691 Custom 653, 星期二 一月 07, 2003 Compal Electronics, inc. Layout note : Place .22uF caps underneath balls on solder side. Use 2~3 vias per PAD. Place 10uF caps on the peripheral near balls. Place close to CPU, Use 2~3 vias per PAD. Please place these cap in the socket cavity area Please place these cap on the socket north side Please place these cap on the socket south side Used ESR 25m ohm cap total ESR=2.5m ohm Layout note : Place close to CPU power and ground pin as possible (<1inch) C16 10U_1206_6.3V6M + C54 220UF_D2_4V_25m 12 C75 0.22U_0603_16V7K_V1 + C80 220UF_D2_4V_25m 12 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C511 0.22U_0603_16V7K_V1 C148 10U_1206_6.3V6M + C53 220UF_D2_4V_25m 12 C26 10U_1206_6.3V6M + C103 220UF_D2_4V_25m 12 C509 0.22U_0603_16V7K_V1 C173 10U_1206_6.3V6M C25 10U_1206_6.3V6M C174 10U_1206_6.3V6M C36 10U_1206_6.3V6M C30 10U_1206_6.3V6M C191 10U_1206_6.3V6M C122 0.22U_0603_16V7K_V1 C6 10U_1206_6.3V6M C178 10U_1206_6.3V6M + C153 220UF_D2_4V_25m 12 C74 0.22U_0603_16V7K_V1 C70 10U_1206_6.3V6M C512 0.22U_0603_16V7K_V1 C68 10U_1206_6.3V6M + C84 220UF_D2_4V_25m 12 C147 10U_1206_6.3V6M C199 10U_1206_6.3V6M C66 10U_1206_6.3V6M C175 10U_1206_6.3V6M C540 10U_1206_6.3V6M + C128 220UF_D2_4V_25m 12 C179 10U_1206_6.3V6M C160 10U_1206_6.3V6M C31 10U_1206_6.3V6M C42 10U_1206_6.3V6M + C106 220UF_D2_4V_25m 12 C33 10U_1206_6.3V6M C13 10U_1206_6.3V6M C67 10U_1206_6.3V6M C150 10U_1206_6.3V6M C187 10U_1206_6.3V6M C69 10U_1206_6.3V6M C541 0.22U_0603_16V7K_V1 C32 10U_1206_6.3V6M C144 0.22U_0603_16V7K_V1 + C140 220UF_D2_4V_25m 12 C163 10U_1206_6.3V6M C170 10U_1206_6.3V6M C15 10U_1206_6.3V6M + C155 220UF_D2_4V_25m 12 C510 0.22U_0603_16V7K_V1 C151 10U_1206_6.3V6M C14 10U_1206_6.3V6M C34 10U_1206_6.3V6M C158 10U_1206_6.3V6M C183 10U_1206_6.3V6M C208 10U_1206_6.3V6M C530 0.22U_0603_16V7K_V1 A A B B C C D D E E 1 1 2 2 3 3 4 4 HREQ#[0 4] HA#[3 31] HD#[0 63] H_DBI#[0 3] AGP_AD[0 31] HUB_PD[0 10] HA#27 HA#14 HA#11 HA#22 HA#20 HA#12 HREQ#4 HA#23 HA#17 HA#30 HA#21 HA#9 HA#3 HA#16 HA#26 HA#24 HA#18 HA#31 HA#29 HREQ#3 HREQ#2 HREQ#1 HREQ#0 HA#28 HA#15 HA#7 HA#6 HA#4 HA#25 HA#10 HA#5 HA#13 HA#8 HA#19 HD#52 HD#43 HD#14 HD#41 HD#40 HD#39 HD#38 HD#9 HD#26 HD#25 HD#63 HD#19 HD#15 HD#10 HD#33 HD#16 HD#51 HD#50 HD#42 HD#32 HD#31 HD#30 HD#12 HD#62 HD#8 HD#6 HD#11 HD#5 HD#3 HD#57 HD#56 HD#55 HD#54 HD#53 HD#49 HD#48 HD#47 HD#46 HD#45 HD#44 HD#18 HD#29 HD#1 HD#0 HD#28 HD#27 HD#24 HD#23 HD#22 HD#21 HD#20 HD#17 HD#13 HD#2 HD#61 HD#60 HD#7 HD#4 HD#59 HD#58 HD#37 HD#36 HD#35 HD#34 CLK_GHT H_DSTBN#3 H_DSTBN#0 H_DSTBN#1 H_DSTBP#0 H_DSTBP#2 H_DSTBP#1 H_DSTBN#2 H_DSTBP#3 H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3 AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7 AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31 AGP_FRAME# AGP_DEVSEL# AGP_IRDY# AGP_TRDY# AGP_STOP# AGP_PAR AGP_REQ# AGP_GNT# AGP_C/BE#0 AGP_C/BE#1 AGP_C/BE#2 AGP_C/BE#3 AGP_PIPE# AGP_ST0 AGP_ADSTB0 AGP_ADSTB0# AGP_ADSTB1 AGP_ADSTB1# AGP_ST1 AGP_ST2 CLK_MCH_66M AGP_RBF# AGP_WBF# HUB_PD0 HUB_PD1 HUB_PD2 HUB_PD3 HUB_PD4 HUB_PD5 HUB_PD6 HUB_PD7 HUB_PD8 HUB_PD9 HUB_PD10 HLRCOMP H_DSTBP#[0 3] H_DSTBN#[0 3] H_SWNG0 H_SWNG1 AGP_FRAME# AGP_TRDY# AGP_PAR AGP_STOP# AGP_GNT# AGP_REQ# AGP_IRDY# AGP_DEVSEL# AGP_WBF# AGP_PIPE# AGP_RBF# AGP_ST2 AGP_ADSTB0 AGP_ADSTB1 AGP_SBSTB AGP_ADSTB0# AGP_ADSTB1# AGP_SBSTB# AGP_ST0 AGP_ST1 AGP_SBSTB# AGP_SBSTB AGP_SBA2 AGP_SBA7 AGP_SBA3 AGP_SBA[0 7] AGP_SBA4 AGP_SBA5 AGP_SBA0 AGP_SBA1 AGP_SBA6 CLK_GHT# CLK_MCH_66M HA#[3 31]4 HREQ#[0 4]4 HD#[0 63] 4 H_ADS#4 H_BPRI#4 H_LOCK#4 H_BNR#4 H_HIT#4 H_HITM#4 H_DEFER#4 H_RS#05 H_RS#15 H_RS#25 H_TRDY#5 PCIRST# 3 ,24,25,26,28,30,32,37,38 H_DBSY#5 H_DRDY#5 H_ADSTB#05 H_ADSTB#15 H_DBI#[0 3]5 H_BREQ0#4 AGP_AD[0 31]14 AGP_C/BE#[0 3]14 AGP_ST[0 2]14 AGP_ADSTB014 AGP_REQ#14 F_AGP_ADSTB0#14 AGP_ADSTB114 F_AGP_ADSTB1#14 AGP_FRAME#14 AGP_DEVSEL#14 AGP_IRDY#14 AGP_TRDY#14 AGP_STOP#14 AGP_PAR14 AGP_GNT#14 CLK_MCH_66M 13 AGP_RBF# 14 HUB_PD[0 10] 20 HUB_PSTRB 20 HUB_PSTRB# 20 CLK_MCH_BCLK13 H_DSTBP#[0 3] 5 H_DSTBN#[0 3] 5 AGP_SBSTB14 F_AGP_SBSTB#14 AGP_SBA[0 7] 14 CLK_MCH_BCLK#13 H_CPURST#5 +AGP_REF +VS_HUBREF +CPU_CORE +V_MCH_GTLREF +1.8VS +1.8VS +VS_HUBREF +CPU_CORE +CPU_CORE +1.5VS +1.5VS +1.5VS +AGP_REF Title Size Document Number Rev Date: Sheet of 401241 1A SCHEMATIC, M/B LA-1691 753, 星期二 一月 07, 2003 Compal Electronics, inc. Place this cap near MCH R_E R_F 1. Place R_E and R_F near MCH 2. Place decoupling cap 220PF near MCH pin.(Within 500mils) GTL Reference Voltage Layout note : HUB Interface Reference 1. Place R_C and R_D in middle of Bus. 2. Place capacitors near MCH. Layout note : R_C R_D Place closely pin P22 Place closely ball P26 Trace width>=7mila AGP_ST1 0=533Mhz 1=400Mhz AGP_ST0 0=System memory is DDR 1=System memory is SDR R18 150_1%_0603 12 R368 36.5_1%_0603 1 2 AGP HUB U33B BROOKDALE(MCH-M) G_AD0 R27 G_AD1 R28 G_AD2 T25 G_AD3 R25 G_AD4 T26 G_AD5 T27 G_AD6 U27 G_AD7 U28 G_AD8 V26 G_AD9 V27 G_AD10 T23 G_AD11 U23 G_AD12 T24 G_AD13 U24 G_AD14 U25 G_AD15 V24 G_AD16 Y27 G_AD17 Y26 G_AD18 AA28 G_AD19 AB25 G_AD20 AB27 G_AD21 AA27 G_AD22 AB26 G_AD23 Y23 G_AD24 AB23 G_AD25 AA24 G_AD26 AA25 G_AD27 AB24 G_AD28 AC25 G_AD29 AC24 G_AD30 AC22 G_AD31 AD24 G_C/BE#0 V25 G_C/BE#1 V23 G_C/BE#2 Y25 G_C/BE#3 AA23 G_FRAME# Y24 G_DEVSEL# W28 G_IRDY# W27 G_TRDY# W24 G_STOP# W23 G_PAR W25 G_REQ# AG24 G_GNT# AH25 PIPE# AF22 AD_STB0 R24 AD_STB#0 R23 AD_STB1 AC27 AD_STB#1 AC28 SB_STB AF27 SB_STB# AF26 ST0 AG25 ST1 AF24 ST2 AG26 HI_0 P25 HI_1 P24 HI_2 N27 HI_3 P23 HI_4 M26 HI_5 M25 HI_6 L28 HI_7 L27 HI_8 M27 HI_9 N28 HI_10 M24 HI_STB N25 HI_STB# N24 HLRCOMP P27 HI_REF P26 SBA0 AH28 SBA1 AH27 SBA2 AG28 SBA3 AG27 SBA4 AE28 SBA5 AE27 SBA6 AE24 SBA7 AE25 RBF# AE22 WBF# AE23 66IN P22 GRCOMP AD25 AGPREF AA21 VSS0 N22 VSS1 K27 VSS2 K5 VSS3 L24 VSS4 M23 VSS5 K7 VSS6 J26 VSS7 A3 VSS8 A7 VSS9 A11 VSS10 A15 VSS11 A19 VSS12 A23 VSS13 A27 VSS14 D5 VSS15 D9 VSS16 D13 VSS17 D17 VSS18 D21 VSS19 E1 VSS20 E4 VSS21 E26 VSS22 E29 VSS23 F8 VSS24 F12 VSS25 F16 VSS26 F20 VSS27 F24 VSS28 G26 VSS29 H9 VSS30 H11 VSS31 H13 VSS32 H15 VSS33 H17 VSS34 H19 VSS35 H21 VSS36 J1 VSS37 J4 VSS38 J6 VSS39 J22 VSS40 J29 C102 @10PF C94 .01UF 12 R33 8.2K 12 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. HOST U33A BROOKDALE(MCH-M) HD#0 AA2 HD#1 AB5 HD#2 AA5 HD#3 AB3 HD#4 AB4 HD#5 AC5 HD#6 AA3 HD#7 AA6 HD#8 AE3 HD#9 AB7 HD#10 AD7 HD#11 AC7 HD#12 AC6 HD#13 AC3 HD#14 AC8 HD#15 AE2 HD#16 AG5 HD#17 AG2 HD#18 AE8 HD#19 AF6 HD#20 AH2 HD#21 AF3 HD#22 AG3 HD#23 AE5 HD#24 AH7 HD#25 AH3 HD#26 AF4 HD#27 AG8 HD#28 AG7 HD#29 AG6 HD#30 AF8 HD#31 AH5 HD#32 AC11 HD#33 AC12 HD#34 AE9 HD#35 AC9 HD#36 AE10 HD#37 AD9 HD#38 AG9 HD#39 AC10 HD#40 AE12 HD#41 AF10 HD#42 AG11 HD#43 AG10 HD#44 AH11 HD#45 AG12 HD#46 AE13 HD#47 AF12 HD#48 AG13 HD#49 AH13 HD#50 AC14 HD#51 AF14 HD#52 AG14 HD#53 AE14 HD#54 AG15 HD#55 AG16 HD#56 AG17 HD#57 AH15 HD#58 AC17 HD#59 AF16 HD#60 AE15 HD#61 AH17 HD#62 AD17 HD#63 AE16 HA#3 T4 HA#4 T5 HA#5 T3 HA#6 U3 HA#7 R3 HA#8 P7 HA#9 R2 HA#10 P4 HA#11 R6 HA#12 P5 HA#13 P3 HA#14 N2 HA#15 N7 HA#16 N3 HA#17 K4 HA#18 M4 HA#19 M3 HA#20 L3 HA#21 L5 HA#22 K3 HA#23 J2 HA#24 M5 HA#25 J3 HA#26 L2 HA#27 H4 HA#28 N5 HA#29 G2 HA#30 M6 HA#31 L7 CPURST# AE17 HIT# Y5 HITM# Y3 RS#0 W2 RS#1 W7 RS#2 W6 HREQ#0 U6 HREQ#1 T7 HREQ#2 R7 HREQ#3 U5 HREQ#4 U2 HDSTBN#0 AD4 HDSTBN#1 AE6 HDSTBN#2 AE11 HDSTBN#3 AC15 HDSTBP#0 AD3 HDSTBP#1 AE7 HDSTBP#2 AD11 HDSTBP#3 AC16 HADSTB#0 R5 HADSTB#1 N6 HTRDY# U7 DEFER# Y4 BPRI# Y7 HLOCK# W5 RSTIN# J27 TESTIN# H26 DBSY# V5 DRDY# V4 ADS# V3 BNR# W3 BREQ#0 V7 BCLK J8 BCLK# K8 HSWNG0 AA7 HSWNG1 AD13 DBI#0 AD5 DBI#1 AG4 DBI#2 AH9 DBI#3 AD15 HVREF0 M7 HVREF1 R8 HVREF2 Y8 HVREF3 AB11 HVREF4 AB17 HRCOMP0 AC2 HRCOMP1 AC13 R44 301_1%_0603 12 R34 @8.2K 12 R35 24.9_0603_1% 12 R20 36.5_1%_0603 12 C533 @470PF_0603 12 R43 100_1%_0603 12 C50 .01UF 12 R17 301_1%_0603 12 R313 2K 12 R311 8.2K 12 RP120 @8P4R_8.2K 1 8 2 7 3 6 4 5 C504 .1UF 12 C19 .01UF 12 RP121 @8P4R_8.2K 1 8 2 7 3 6 4 5 C52 .1UF 12 R346 1K_1%_0603 12 R63 @33 1 2 C57 1UF_0603 R316 @8.2K 12 R340 1K_1%_0603 12 R376 @56.2_1%_0603 12 R59 8.2K 12 R429 301_1%_0603 12 R428 301_1%_0603 12 R54 @8.2K 12 R37 24.9_0603_1% 12 R317 8.2K 12 R318 @8.2K 12 C55 220PF R51 150_1%_0603 12 R42 49.9_1%_0603 12 R312 8.2K 12 R64 0 12 RP119 @8P4R_8.2K 1 8 2 7 3 6 4 5 C97 .01UF 12 A A B B C C D D E E 1 1 2 2 3 3 4 4 VSS_MCH_PLL0 DDR_SDQ[0 63] DDR_SMA[0 12] DDR_SDQ0 DDR_SDQ1 DDR_SDQ2 DDR_SDQ3 DDR_SDQ4 DDR_SDQ5 DDR_SDQ6 DDR_SDQ7 DDR_SDQ8 DDR_SDQ9 DDR_SDQ10 DDR_SDQ11 DDR_SDQ12 DDR_SDQ13 DDR_SDQ14 DDR_SDQ15 DDR_SDQ16 DDR_SDQ17 DDR_SDQ18 DDR_SDQ19 DDR_SDQ20 DDR_SDQ21 DDR_SDQ22 DDR_SDQ23 DDR_SDQ24 DDR_SDQ25 DDR_SDQ26 DDR_SDQ27 DDR_SDQ28 DDR_SDQ29 DDR_SDQ30 DDR_SDQ31 DDR_SDQ32 DDR_SDQ33 DDR_SDQ34 DDR_SDQ35 DDR_SDQ36 DDR_SDQ37 DDR_SDQ38 DDR_SDQ39 DDR_SDQ40 DDR_SDQ41 DDR_SDQ42 DDR_SDQ43 DDR_SDQ44 DDR_SDQ45 DDR_SDQ46 DDR_SDQ47 DDR_SDQ48 DDR_SDQ49 DDR_SDQ50 DDR_SDQ51 DDR_SDQ52 DDR_SDQ53 DDR_SDQ54 DDR_SDQ55 DDR_SDQ56 DDR_SDQ57 DDR_SDQ58 DDR_SDQ59 DDR_SDQ60 DDR_SDQ61 DDR_SDQ62 DDR_SDQ63 DDR_SCS#3 DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SDQS0 DDR_SDQS1 DDR_SDQS2 DDR_SDQS3 DDR_SDQS4 DDR_SDQS5 DDR_SDQS6 DDR_SDQS7 DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 DDR_SBS0 DDR_SBS1 DDR_CKE0 DDR_CKE1 DDR_CKE2 DDR_CKE3 DDR_SCAS# DDR_SRAS# DDR_SWE# DDR_SMA7 VSS_MCH_PLL1 VCC_MCH_PLL1 VCC_MCH_PLL0 +SM_RCOMP RCVOUT# RCVIN# DDR_SDQ[0 63]10 DDR_SDQS2 10 DDR_SDQS3 10 DDR_SDQS1 10 DDR_SDQS0 10 DDR_SDQS7 10 DDR_SDQS6 10 DDR_SDQS5 10 DDR_SDQS4 10 DDR_SMA[0 12] 10,11,12 DDR_SBS0 10,11,12 DDR_SBS1 10,11,12 DDR_CKE2 11,12 DDR_CKE3 11,12 DDR_CKE1 10,12 DDR_CKE0 10,12 DDR_SCS#1 10,12 DDR_SCS#3 11,12 DDR_SCS#0 10,12 DDR_SCS#2 11,12 DDR_SCAS# 10,11,12 DDR_SWE# 10,11,12 DDR_SRAS# 10,11,12 DDR_CLK0 10 DDR_CLK0# 10 DDR_CLK1 10 DDR_CLK1# 10 DDR_CLK3 11 DDR_CLK3# 11 DDR_CLK4 11 DDR_CLK4# 11 +CPU_CORE +2.5V +1.5VS +1.8VS +1.25VS +1.5VS +SDREF Title Size Document Number Rev Date: Sheet of 401241 1A SCHEMATIC, M/B LA-1691 853, 星期二 一月 07, 2003 Compal Electronics, inc. Layout note : Trace width 5mil ; Spacing 10mil Trace A to ball U7/T13 or U7/T7 =1.5" Max "Trace A" "Trace A" "Trace A" "Trace A" Layout note Please closely pinJ21 and J9 Murata LQG21N4R7K10 Layout note Place R_J closely Ball H3<40mil,Ball H3 to G3 trace must routing 1" R_J Layout note Place R563 closely pinJ28 POWER/GND U33D BROOKDALE(MCH-M) VTT_0 M8 VTT_1 U8 VTT_2 AA9 VTT_3 AB8 VTT_4 AB18 VTT_5 AB20 VTT_6 AC19 VTT_7 AD18 VTT_8 AD20 VTT_9 AE19 VTT_10 AE21 VTT_11 AF18 VTT_12 AF20 VTT_13 AG19 VTT_14 AG21 VTT_15 AG23 VTT_16 AJ19 VTT_17 AJ21 VTT_18 AJ23 VCCSM1 A5 VCCSM2 A9 VCCSM3 A13 VCCSM4 A17 VCCSM5 A21 VCCSM6 A25 VCCSM7 C1 VCCSM8 C29 VCCSM9 D7 VCCSM10 D11 VCCSM11 D15 VCCSM12 D19 VCCSM13 D23 VCCSM14 D25 VCCSM15 F6 VCCSM16 F10 VCCSM17 F14 VCCSM18 F18 VCCSM19 F22 VCCSM20 G1 VCCSM21 G4 VCCSM22 G29 VCCSM23 H8 VCCSM24 H10 VCCSM25 H12 VCCSM26 H14 VCCSM27 H16 VCCSM28 H18 VCCSM29 H20 VCCSM30 H22 VCCSM31 H24 VCCSM32 K22 VCCSM33 K24 VCCSM34 K26 VCCSM35 L23 VCCSM36 K6 VCCSM37 J5 VCCSM38 J7 VCC1_5_0 R22 VCC1_5_1 R29 VCC1_5_2 U22 VCC1_5_3 U26 VCC1_5_4 W22 VCC1_5_5 W29 VCC1_5_6 AA22 VCC1_5_7 AA26 VCC1_5_8 AB21 VCC1_5_9 AC29 VCC1_5_10 AD21 VCC1_5_11 AD23 VCC1_5_12 AE26 VCC1_5_13 AF23 VCC1_5_14 AG29 VCC1_5_15 AJ25 VCC1_5_16 N14 VCC1_5_17 N16 VCC1_5_18 P13 VCC1_5_19 P15 VCC1_5_20 P17 VCC1_5_21 R14 VCC1_5_22 R16 VCC1_5_23 T15 VCC1_5_24 U14 VCC1_5_25 U16 VCC1_8_0 L29 VCC1_8_1 N26 VCC1_8_2 L25 VCC1_8_3 M22 VCC1_8_4 N23 VCCGA1 T17 VCCHA1 T13 VSSGA2 U17 VSSHA2 U13 VSS41 L1 VSS42 L4 VSS43 L6 VSS44 L8 VSS45 L22 VSS46 L26 VSS47 N1 VSS48 N4 VSS49 N8 VSS50 N13 VSS51 N15 VSS52 N17 VSS53 N29 VSS54 P6 VSS55 P8 VSS56 P14 VSS57 P16 VSS58 R1 VSS59 R4 VSS60 R13 VSS61 R15 VSS62 R17 VSS63 R26 VSS64 T6 VSS65 T8 VSS66 T14 VSS67 T16 VSS68 T22 VSS69 U1 VSS70 U4 VSS71 U15 VSS72 U29 VSS73 V6 VSS74 V8 VSS75 V22 VSS76 W1 VSS77 W4 VSS78 W8 VSS79 W26 VSS80 Y6 VSS81 Y22 VSS82 AA1 VSS83 AA4 VSS84 AA8 VSS85 AA29 VSS86 AB6 VSS87 AB9 VSS88 AB10 VSS89 AB12 VSS90 AB13 VSS91 AB14 VSS92 AB15 VSS93 AB16 VSS94 AB19 VSS95 AB22 VSS96 AC1 VSS97 AC4 VSS98 AC18 VSS99 AC20 VSS100 AC21 VSS101 AC23 VSS102 AC26 VSS103 AD6 VSS104 AD8 VSS105 AD10 VSS106 AD12 VSS107 AD14 VSS108 AD16 VSS109 AD19 VSS110 AD22 VSS111 AE1 VSS112 AE4 VSS113 AE18 VSS114 AE20 VSS115 AE29 VSS116 AF5 VSS117 AF7 VSS118 AF9 VSS119 AF11 VSS120 AF13 VSS121 AF15 VSS122 AF17 VSS123 AF19 VSS124 AF21 VSS125 AF25 VSS126 AG1 VSS127 AG18 VSS128 AG20 VSS129 AG22 VSS130 AH19 VSS131 AH21 VSS132 AH23 VSS133 AJ3 VSS134 AJ5 VSS135 AJ7 VSS136 AJ9 VSS137 AJ11 VSS138 AJ13 VSS139 AJ15 VSS140 AJ17 VSS141 AJ27 R73 30.1_1% 12 R75 0_0402 12 + C95 33UF_D2_16V 12 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C117 .1UF_0402_X5R 12 C120 .1UF_0402_X5R C146 @47PF + C96 33UF_D2_16V 12 L10 4.7UH_30mA 12 MEMORY U33C BROOKDALE(MCH-M) SDQ0 G28 SDQ1 F27 SDQ2 C28 SDQ3 E28 SDQ4 H25 SDQ5 G27 SDQ6 F25 SDQ7 B28 SDQ8 E27 SDQ9 C27 SDQ10 B25 SDQ11 C25 SDQ12 B27 SDQ13 D27 SDQ14 D26 SDQ15 E25 SDQ16 D24 SDQ17 E23 SDQ18 C22 SDQ19 E21 SDQ20 C24 SDQ21 B23 SDQ22 D22 SDQ23 B21 SDQ24 C21 SDQ25 D20 SDQ26 C19 SDQ27 D18 SDQ28 C20 SDQ29 E19 SDQ30 C18 SDQ31 E17 SDQ32 E13 SDQ33 C12 SDQ34 B11 SDQ35 C10 SDQ36 B13 SDQ37 C13 SDQ38 C11 SDQ39 D10 SDQ40 E10 SDQ41 C9 SDQ42 D8 SDQ43 E8 SDQ44 E11 SDQ45 B9 SDQ46 B7 SDQ47 C7 SDQ48 C6 SDQ49 D6 SDQ50 D4 SDQ51 B3 SDQ52 E6 SDQ53 B5 SDQ54 C4 SDQ55 E5 SDQ56 C3 SDQ57 D3 SDQ58 F4 SDQ59 F3 SDQ60 B2 SDQ61 C2 SDQ62 E2 SDQ63 G5 SDQ64/CB0 C16 SDQ65/CB1 D16 SDQ66/CB2 B15 SDQ67/CB3 C14 SDQ68/CB4 B17 SDQ69/CB5 C17 SDQ70/CB6 C15 SDQ71/CB7 D14 SCK0 E14 SCK#0 F15 SCK1 J24 SCK#1 G25 SCK2 G6 SCK#2 G7 SCK3 G15 SCK#3 G14 SCK4 E24 SCK#4 G24 SCK5 H5 SCK#5 F5 SDQS0 F26 SDQS1 C26 SDQS2 C23 SDQS3 B19 SDQS4 D12 SDQS5 C8 SDQS6 C5 SDQS7 E3 SDQS8 E15 SMA0/CS#11 E12 SMA1/CS#10 F17 SMA3/CS#9 G18 SMA4/CS#5 G19 SMA5/CS#8 E18 SMA6/CS#7 F19 SMA7/CS#4 G21 SMA8/CS#3 G20 SMA9/CS#0 F21 SMA10 F13 SMA11/CS#2 E20 SMA12/CS#1 G22 SBS0 G12 SBS1 G13 SCKE0 G23 SCKE1 E22 SCKE2 H23 SCKE3 F23 SCKE4 J23 SCKE5 K23 SCK6 K25 SCK#6 J25 SCK7 G17 SCK#7 G16 SCK8 H7 SCK#8 H6 SCS#0 E9 SCS#1 F7 SCS#2 F9 SCS#3 E7 SCS#4 G9 SCS#5 G10 SMRCOMP J28 SMA2/CS#6 E16 RCVENIN# G3 RCVENOUT# H3 SSI_ST H27 SRAS# F11 SWE# G11 SCAS# G8 SDREF0 J21 SDREF1 J9 NC0 AD26 NC1 AD27 L7 4.7UH_30mA 12 5 5 4 4 3 3 2 2 1 1 D D C C B B A A +CPU_CORE +CPU_CORE +CPU_CORE +1.5VS +1.5VS +1.8VS +2.5V +2.5V +2.5V +2.5V Title Size Document Number R ev Date: Sheet of 401241 1A SCHEMATIC, M/B LA-1691 953¬P , 07, 2003 期二 一月 Compal Electronics, inc. Layout note : Distribute as close as possible to MCH Processor Quadrant.(between VTTFSB and VSS pin) Layout note : Distribute as close as possible to MCH Processor Quadrant.(between VCCAGP/VCCCORE and VSS pin) Layout note : Distribute as close as possible to MCH Processor Quadrant.(between VCCHL and VSS pin) Hub-Link AGP/CORE Processor system bus Layout note : Distribute as close as possible to MCH Processor Quadrant.(between VCCSM and VSS pin) DDR Memory interface C9 10UF_6.3V_1206_X5R 12 C145 .1UF_0402_X5R 12 C28 .1UF_0402_X5R 12 C156 .1UF_0402_X5R 12 C10 10UF_6.3V_1206_X5R 12 C109 .1UF_0402_X5R 12 C47 .1UF_0402_X5R 12 C123 22UF_10V_1206 12 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C130 .1UF_0402_X5R 12 C110 .1UF_0402_X5R 12 C51 .1UF_0402_X5R 12 C93 .1UF_0402_X5R 12 C12 10UF_6.3V_1206_X5R 12 C126 .1UF_0402_X5R 12 C121 .1UF_0402_X5R 12 C111 .1UF_0402_X5R 12 C45 .1UF_0402_X5R 12 C20 .1UF_0402_X5R 12 C142 .1UF_0402_X5R 12 C46 .1UF_0402_X5R 12 C11 10UF_6.3V_1206_X5R 12 C127 .1UF_0402_X5R 12 C8 10UF_6.3V_1206_X5R 12 C546 10UF_6.3V_1206_X5R 12 C161 .1UF_0402_X5R 12 C27 .1UF_0402_X5R 12 C162 .1UF_0402_X5R 12 C129 .1UF_0402_X5R 12 C101 .1UF_0402_X5R 12 C114 .1UF_0402_X5R 12 C108 .1UF_0402_X5R 12 C78 .1UF_0402_X5R 12 C116 .1UF_0402_X5R 12 + C181 150UF_D2_6.3V 12 C124 22UF_10V_1206 12 C131 .1UF_0402_X5R 12 C18 .1UF_0402_X5R 12 C49 .1UF_0402_X5R 12 + C23 150UF_D2_6.3V 12 C17 .1UF_0402_X5R 12 C113 .1UF_0402_X5R 12 C152 .1UF_0402_X5R 12 C71 .1UF_0402_X5R 12 C119 .1UF_0402_X5R 12 [...]... C9 VMA0 VMA1 VMA2 VMA3 VMA4 VMA5 VMA6 VMA7 VMA8 VMA9 VMA10 VMA11 VMA12 VMA13 DQM#0 DQM#1 DQM#2 DQM#3 DQM#4 DQM#5 DQM#6 DQM#7 A22 D21 A16 C15 F2 G1 N2 N3 VDQM0 VDQM1 VDQM2 VDQM3 QS0 QS1 QS2 QS3 QS4 QS5 QS6 QS7 A19 B19 D18 C18 J4 K1 K2 K3 VDQS0 RAS# A9 VMRAS# CAS# C8 VMCAS# VDQM[0:3] 16 NMA0 NMA1 NMA2 NMA3 NMA4 NMA5 NMA6 NMA7 NMA8 NMA9 NMA10 NMA11 NMA12 NMA13 RP7 16P8R-10 B VDQS0 16 RP30 8P4R_0 D8 VMWE#... NMD23 NMD22 NMD21 NMD20 NMD19 NMD18 NMD17 NMD16 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 9 10 11 12 13 14 15 16 9 10 11 12 13 14 15 16 9 10 11 12 13 14 15 16 9 10 11 12 13 14 15 16 RP122 16P8R-47 RP125 16P8R-47 RP124 16P8R-47 RP123 16P8R-47 VMD0 VMD2 VMD1 VMD3 VMD5 VMD4 VMD7 VMD6 VMD31 VMD30 VMD29 VMD28 VMD27 VMD26 VMD25 VMD24 VMD10 VMD9 VMD8 VMD14 VMD13 VMD12 VMD11 VMD15 VMD23... DM3 15 VDQS0 94 VREF MCL RFU NMRAS# NMCAS# NMWE# NMCS0# 27 26 25 28 RAS# CAS# WE# CS# 53 CKE 55 54 1UF_0402 2 NMCLK0 R134 CK CK# 87 88 89 90 91 NC NC NC NC NC NC NC NC NC NC NC NC 97 98 100 1 3 4 6 7 60 61 63 64 68 69 71 72 9 10 12 13 17 18 20 21 74 75 77 78 80 81 83 84 NMD0 NMD2 NMD1 NMD3 NMD5 NMD4 NMD7 NMD6 NMD31 NMD30 NMD29 NMD28 NMD27 NMD26 NMD25 NMD24 NMD10 NMD9 NMD8 NMD14 NMD13 NMD12 NMD11 NMD15... A NMA[0:13] 16 M6 -C MVREF 1 +2.5VS 2 +1.8VS 1 B A26 B25 A25 A24 B23 A23 C22 B22 C21 B21 A21 D20 C20 B20 A20 C19 B18 A18 C17 B17 A17 D16 C16 B16 B15 A15 D14 C14 B14 A14 D13 C13 B1 C1 C2 D1 D2 E1 E2 F1 G2 G3 H1 H2 H3 J1 J2 J3 L1 L2 L3 L4 M1 M2 M3 N1 N4 P1 P2 P3 P4 R1 R2 R3 MEMORY INTERFACE VMD0 VMD1 VMD2 VMD3 VMD4 VMD5 VMD6 VMD7 VMD8 VMD9 VMD10 VMD11 VMD12 VMD13 VMD14 VMD15 VMD16 VMD17 VMD18 VMD19 VMD20... VDQM[0:3] NMWE# NMCAS# NMRAS# NMCS0# +2.5VS R132 VDQM0 VDQM3 VDQM1 VDQM2 R388 R126 R137 R122 1 1 1 1 2 2 2 2 1K_1%_0603 VDQS0 R84 1 2 33_0603 2 15 NMWE# 15 NMCAS# 15 NMRAS# 15 NMCS0# NMCKE NMCLK0 NMCLK0# 15 NMCKE 15 NMCLK0 15 NMCLK0# 33_0603 33_0603 33_0603 33_0603 31 32 33 34 47 48 49 50 51 45 36 37 29 30 A0 A1 A2 A3 A4 A5 A6 A7 A8(AP) A9 A10 A11 BA0 BA1 NDQM0 NDQM3 NDQM1 NDQM2 23 56 24 57 DM0 DM1 DM2... closely to ICH3 U20 Y20 V19 U12A 23,24,26,28 PCI_AD[0 31] PM_GMUXSEL/GPIO23 PM_CPUPREF#/GPIO22 PM_VGATE/VRMPWRGD 2 @ 10K PM_AGPBUSY#/GPIO6 PM_AUXPWROK PM_BATLOW# PM_C3_STAT#/GPIO21 PM_CLKRUN#/GPIO24 PM_DPRSLPVR PM_PWRBTN# PM_PWROK PM_RI# PM_RSMRST# PM_SLP_S1#/GPIO19 PM_SLP_S3# PM_SLP_S5# PM_STPCPU#/GPIO20 PM_STPPCI#/GPIO18 PM_SUS_CLK PM_SUS_STAT# PM_THRM# 1 R441 V4 Y5 AB3 V5 AC2 AB21 AB1 AA6 AA1 AA7 W20 AA5... THIS SHEET NOR THE INFORMATION CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: 星期二, 一月 07, 2003 Rev 1A 401241 1 2 3 4 5 6 7 Sheet 14 of 8 53 1 2 3 4 5 6 7 8 MEMORY INTERFACE VMD[0:31] A NMA[0:13] VDQM[0:3] 1 2 3 4 5 6 7 8 8 7 6 5 4 3 2 1 U36B MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 B13 A13 C12 B12 A12... 16P8R-10 B VDQS0 16 RP30 8P4R_0 D8 VMWE# B9 NMRAS# NMCAS# NMWE# NMCS0# 16 16 16 16 VMCS0# CS#1 NMRAS# NMCAS# NMWE# NMCS0# 5 6 7 8 B8 VMCKE R135 1 2 0 A6 B6 VMCLK0 R130 1 VMCLK0# R133 1 2 2 22_0603 22_0603 CLK1 CLK1# A4 B4 NC NC A7 B7 NC NC VREF T2 T1 NMCLK0 16 NMCLK0# 16 C213 @15PF_0603 C C225 @15PF_0603 B3 MEMVMODE NMCKE 16 NMCLK0 NMCLK0# A5 B5 CLKFB NMCKE 1 A8 CLK0 CLK0# 1 CKE 2 WE# CS#0 4 3 2 1... SDRAM 4X32Mb A A +FBVDD L44 +2.5VS 2 C169 10UF_1206 1 CHB2012U121 C168 1UF_0402 C207 C214 1 C215 1 1 C564 1 +2.5VS C166 2 2 2 2 10UF_1206 1UF_0402 2200PF_0603 2200PF_0603 2200PF_0603 C210 C171 1UF_0402 10UF_1206 B VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDD VDD VDD VDD NMA0 NMA1 NMA2 NMA3 NMA4 NMA5 NMA6 NMA7 NMA8 NMA9 NMA10 NMA11 NMA13 NMA12 VMD[0:31] 15 VMD[0:31] NMA[0:13] 15 NMA[0:13] VDQM[0:3]... VMD16 VMD17 VMD18 VMD19 VMD20 VMD21 VMD22 VMD23 VMD24 VMD25 VMD26 VMD27 VMD28 VMD29 VMD30 VMD31 RP8 16P8R-10 16 15 14 13 12 11 10 9 9 10 11 12 13 14 15 16 VMD[0:31] 16 R82 4.7K_0603 R80 C159 R81 1UF_0402 1K_1%_0603 2 2 1 1 2 1K_1%_0603 (10 mil) D D Title Compal Electronics, inc SCHEMATIC, M/ B LA-1691 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS . D VMD[0:31] NMA[0:13] VDQM[0:3] NMA0 NMA1 NMA9 NMA11 NMA12 NMA2 NMA10 NMA8 NMA7 NMA13 NMCKE NMCLK0# NMA3 NMA6 NMA5 NMA4 VMA8 VMD16 VMD11 VDQM2 VMA6 VMA2 VMD30 VMD28 VMD4 VMA10 VMA9 VMD26 VMD19 VMD14 VMD3 VDQM1 VMA4 VMD20 VMD8 VMD5 VMA12 VMD24 VMCKE VMD29 VMD6 VDQM0 VMA0 VMD27 VMCLK0# VMA5 VMA3 VMD21 MVREF VMA1 VMD22 VMD13 VMD2 VMA11 VMD25 VMD18 VMD31 VMD15 VMD0 VMD12 VMD7 VMD23 VMD10 VMA13 VMD1 VDQM3 VMA7 VMD17 VMD9 VMCLK0 VDQS0 VMCS0# VMRAS# VMWE# VMCAS# NMCS0# NMWE# NMCAS# NMRAS# NMCLK0 VMD[0:31]. D NMCAS# VREF1 NMA8 NDQM0 NMA6 NMA4 NMA0 NMA7 NMA10 NMCS0# NMA1 NMWE# NMA5 NMA13 NMRAS# NDQM3 NMA3 NMA2 NMCKE NVREF0 NMA9 NMA11 NMA12 NMRAS# NMCAS# NMA[0:13] NMCLK0# VMD[0:31] NMCS0# VDQM[0:3] NMCLK0 NMWE# NMCKE NMCLK0 NMCLK0# VDQS0 NDQS0 NDQM2 NDQM1 VDQS0 VMD2 VMD5 VMD3 VMD1 VMD0 VMD6 VMD7 VMD4 VMD20 VMD16 VMD18 VMD21 VMD17 VMD23 VMD19 VMD22 VMD8 VMD11 VMD10 VMD14 VMD13 VMD15 VMD9 VMD12 VMD26 VMD25 VMD31 VMD29 VMD28 VMD24 VMD30 VMD27 VDQM0 VDQM3 VDQM1 VDQM2 NMD23 NMD22 NMD21 NMD20 NMD19 NMD18 NMD17 NMD16 NMD10 NMD9 NMD8 NMD14 NMD13 NMD12 NMD11 NMD15 NMD31 NMD30 NMD29 NMD28 NMD27 NMD26 NMD25 NMD24 NMD0 NMD2 NMD1 NMD3 NMD5 NMD4 NMD7 NMD6 NMRAS#15 NMA[0:13]15 NMCAS#15 VDQM[0:3]15 NMCLK0#15 VDQS015 NMCLK015 VMD[0:31]15 NMCKE15 NMCS0#15 NMWE#15 +2.5VS +2.5VS +FBVDD +FBVDD +2.5VS Title Size. D VMD[0:31] NMA[0:13] VDQM[0:3] NMA0 NMA1 NMA9 NMA11 NMA12 NMA2 NMA10 NMA8 NMA7 NMA13 NMCKE NMCLK0# NMA3 NMA6 NMA5 NMA4 VMA8 VMD16 VMD11 VDQM2 VMA6 VMA2 VMD30 VMD28 VMD4 VMA10 VMA9 VMD26 VMD19 VMD14 VMD3 VDQM1 VMA4 VMD20 VMD8 VMD5 VMA12 VMD24 VMCKE VMD29 VMD6 VDQM0 VMA0 VMD27 VMCLK0# VMA5 VMA3 VMD21 MVREF VMA1 VMD22 VMD13 VMD2 VMA11 VMD25 VMD18 VMD31 VMD15 VMD0 VMD12 VMD7 VMD23 VMD10 VMA13 VMD1 VDQM3 VMA7 VMD17 VMD9 VMCLK0 VDQS0 VMCS0# VMRAS# VMWE# VMCAS# NMCS0# NMWE# NMCAS# NMRAS# NMCLK0 VMD[0:31]