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SCHOOL OF ELECTRONICS AND TELECOMMUNICATIONS

PROJECT REPORT MID-TERM

Name of students: Name of instructor:

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Table of Contents

List of Figures 3

List of Tables 4

ABSTRACT 5

1.Introduction 6

1 1.Purpose 6

2.Specification 6

2 1.Executive

Summary 6

2.1.1.Project Overview 6

2.1.2.Purpose and Scope 6

2 2.Project Description 6

2.2 1.Project

Context 6 2.2.2.Assumptions 6

2.2.3 Parameters 7

2.2.4 Development Time 7

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2.2.5 Development Cost 7

3 Planning 7

3 1.Task Table 8

7-3.2 Human Resource Table 9

8-4 Designing 10

4.1 Requirements 10

4.1.1 Electrical Constraints 10

4.1.2 Functional Requirements 10

4.2 Circuit Components 10

4.2.1 Choose components on Spice 10

4.2.1.1 PNP BJT 25N401 11

10-4.2.1.2 Resistor 12

11-4.2.1.3 Voltage Source 12

4.2.1.4 Ground 13

12-4.2.2 Set up the testing circuit on Spice 14

13-5 Testing 14

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5.1 Input I-V characteristics simulation 15

5.1.1 DC sweep with 2 sources 17

15-5.1.2 Input I-V characteristics for the common Base configuration of the PNP BJT 2N5401 17-20

5.1 2.SPICE Netlist 20

5.2 Output I-V characteristics simulation 20

5.2.1 DC sweep with 2 sources 20

5.2.2 Output I-V characteristics for the common Base configuration of the PNP BJT 2N5401 21-22

5.1.2.1 SPICE Netlist 22

6 Calculation 23

22-CONCLUSION 24

List of Figures

Figure 4.2.1.1a: Component directory 11 Figure 4.1.1.1b: PNP BJT transistor 11 Figure 4.2.1.1c: Transistor properties and options 11

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Figure 4.2.1.1d: Pick New Transistor 11

Figure 4.2.1.1e: PNP BJT 2N5401 11

Figure 4.2.1.2: R1 Resistor 12

Figure 4.2.1.3: V1 Voltage source 13

Figure 4.2.1.4: Ground 13

Figure 4.2.2a: Component arrangements 14

Figure 4.2.2b: Overall circuit 14

Figure 5.1.1a: Edit Simulation Command 15

Figure 5.1.1b: DC sweep command 16

Figure 5.1.1c: “Edit text on the Schematic” 16

Figure 5.1.1d: Finished circuit for testing input I-V characteristics 17

Figure 5.1.2a: Linear graph with VEE horizontal axis 18

Figure 5.1.2b: Horizontal Axis 18

Figure 5.1.2c: Input or driving point characteristics for the common Base configuration 19

Figure 5.1.2d: Zoomed Fig 5.1.2 19

Figure 5.2.1: Finished circuit for testing output I-V characteristics 20

Figure 5.2.2: Output or collector characteristics for the common Base configuration 21

List of Tables Table 3.1 Task Table 8-9Table 3.2 Resources Assigning Table 9-10 Table 6.1 I & I values at V = 1V, 2V and V variesB CEECC 23

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ABSTRACT

LTSpice is a freeware computer software, implementing a SPICE simulator ofelectronic circuits, produced by semiconductor manufacturer Linear Technology(LTC) Bipolar Junction Transistor (BJT) is a single piece of silicon with twobackto-back P-N junctions It is constructed with three semiconductors pieces, twojunctions, and three terminals, emitter E, base B and collector C The goal of thisproject is to successfully design, simulate the circuit, and analyze the input andoutput I-V characteristics for a PNP BJT 2N5401 in a common Base configurationusing LTSpice In this report, the design and parameters specifications of the circuitare explained The circuit involves resistors, independent voltage and currentsources

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and V values are then applied at Run to produce input and output I-V characteristics.Results from the simulation are used to calculate the current gain values (α, β) of thePNP BJT 2N5401 Results might vary based on a different parameters’ values

2.1.2.Purpose and Scope

This report addresses all requirements, planning, and testing needed to simulate and analyze the electronic circuit, the input and output I-V characteristics of the common Base configuration of the PNP BJT 2N5401

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- It is assumed that the project should be simple

2.2.3 Parameters

Modified Gummel-Poon BJT Parameters

1 IS transport saturation current A 1.0E-16 1.0E-15

4 ISE B-E leakage saturation current A 0 1.0E-13 5 NE B-E leakage emission coefficient - 1.5 2

8 ISC B-C leakage saturation current A 0 1.0E-13 9 NC B-C leakage emission coefficient - 2 1.5

13 CJE B-E zero-bias depletion capacitance F 0 2PF

16 CJC B-C zero-bias depletion capacitance F 0 2PF

19 CJS zero-bias collector-substrate F 0 2PF capacitance

20 JS substrate junction built-in potential V 0.75

Our project consists of 8 tasks Each task has its own deliverables The project starts

on August 20, and ends on August 27

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No Task Name Duration Date Date iesFormat

#1

Create schematic design for thecircuit

2 days Aug 20, 2021

Aug 22, 2021

#1 Specification requirements documented in MS Word format

#2

Create resources table and tasks allocation

< 1 day Aug 21, 2021

Aug 21, 2021

1 day Aug 22, 2021

Aug 22 2021

#4 Simulate the circuit < 1 day

Aug 22 2021

Aug 23, 2021

#5

Test circuit and troubleshoot any errors

< 1 day Aug 23 2021

Aug 23 2021

#6

Test finished circuit and analyze the results

< 1 day Aug 24 2021

Aug 25 2021

#7 Calculation 1 day Aug 25 2021

Aug 26 2021

#5 Report in MS Word format

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#8 Report

2021 27, 2021

#5 Report in MS Word format

Table 3.1 Task Table

There are 3 people on our team Since each member has different strengths and weaknesses, we have created the following task allocations table according to personal competence and preferences

Task No.Task NameMember Name

#1 Create schematic design for the circuit

#2 Create resources table and tasks allocation

#3 Design and analyze functional requirements

#4 Simulate the circuit #5 Test circuit and

trouble-shoot any errors

#6 Test finished circuits and analyze the results

#7 Calculation

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4.1.2.Functional Requirements

- Produce input I-V characteristics of the common Base configuration - Produce output I-V characteristics of the common Base configuration.- Accurate PNP BJT 2N5401 circuit

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→ Search PNP choose PNP we have a new PNP BJT transistor is

present on the schematic (Fig 4.2.1.1b)

→ Right-click on the PNP BJT transistor, showing its properties and options

(Fig 4.2.1.1c)

→ Choose “Pick New Transistor” option Choose PNP BJT model 2N5401

(Fig 4.2.1.1d)

→ We have a PNP BJT 2N5401 transistor on the schematic (Fig 4.2.1.1e)

Figure 4.2.1.1d: Pick New Transistor Figure 4.2.1.1e: PNP BJT 2N5401

4.2.1.2 Resistor

On the same schematic:

→ Click on the Resistor symbol on the tool bar

→ We have a new resistor R1 is present on the schematic (Fig 4.2.1.2)

Figure 4.2.1.1a: Component directory Figure 4.2.1.1b: PNP BJT transistor Figure 4.2.1.1c: Transistor proper琀椀es and op琀椀ons

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Right-click on “R1” to change the name of the resistor ❖ Right-click on “R” or click the component directly to change the

resistance

Figure 4.2.1.2: R1 Resistor

4.2.1.3 Voltage Source

On the same schematic:

→ Click on the Component symbol on the tool bar to show the component directory (Fig 4.2.1.1a)

→ Search Voltage choose Voltage we have a new voltage source V1 on the  schematic (Fig 4.2.1.3a)

❖ To change the name and the value of the Voltage Source, similar to section 4.2.2.2 Resistor

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→ We have a new ground on the schematic (Fig 4.2.1.4)

Figure 4.2.1.4 Ground

Note:

• To move/rotate one component, right-click and choose Move To move/rotate one or more components, right-click and choose drag

• Press Ctrl-R to rotate component 90  clock-wise.

• Press Ctrl-E to mirror component.

4.2.2 Set up the testing circuit on Spice

→ Arrange, rename and assign values to the components as required: R = 1k , E RC = 5k , V1 = VEE & VCC (Fig 4.2.2a) 

→ Right-click on the VEE source to set the signal source by choosing “Advanced” option  choose (none) for Functions

→ Apply similar setting to VCC

→ Click on the Wire symbol on the tool bar to connect all components → Click on the Label Net symbol to assign Net Name as “C” or “E” or

“B” and arrange them correctly on the circuit → We have the overall testing circuit (Fig 4.2.2b)

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Figure 4.2.2b: Overall circuit

5 Testing

After completed desgning the testing circuit, we will simulate it on SPICE with DC sweep We then proceed with error checking and trouble-shooting when running Part 5 presents the simulation and its results

5.1 Input I-V characteristics simulation

Since the equation for the static input I-V characteristic curves plotting is , we plot V against I with V as the parameter (a set f-curves EBE, CBfor different values of VCB)

begin the simulation:

→ Click on the Run symbol on the tool bar which shows an “Edit Simulation Command” (on Fig 5.1.1a)

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➢ Name of 1 source to sweep: VEE st

➢ Type of sweep: Linear

➢ Start value and Stop value (optional): 0 & 1, respectively ➢ Increment: 0.001

Note:

• The smaller the horizontal axis increment, the smoother the graph

❖ For the 2 source nd

➢ Name of 2 source to sweep: VCC nd

➢ Type of sweep: Linear

➢ Start value and Stop value (optional): 5 & 30, respectively ➢ Increment: 5

→ Click on “OK” and we have finished setting DC sweep (Fig 5.1.1b)

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→ To add theorical equations to the schematic, click on SPICE Directive symbol on the tool bar

→ Choose “Edit text on the Schematic” and apply settings as shown on Fig 5.1.1c

Figure 5.1.1c: “Edit Text on the Schematic”

→ We have the finished testing circuit (Fig 5.1.1d)

Figure 5.1.1d: Finished testing circuit for input I-V characteristics

5.1.2 Input I-V characteristics for the common Base configuration of the PNP BJT

2N5401

To display the input/driving point characteristics for the common Base configurationof the PNP BJT 2N5401 in linear sweep:

→ Click on the Run symbol on the tool bar

→ Right-click AutoRange on the tool bar to set graph display option

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 Choose “Tile Windows Vertically”

→ We have the linear graph with the horizontal axis is VEE (Fig 5.1.2a)

Figure 5.1.2a: Linear graph with VEE horizontal axis

→ To change the voltage values of the graph, right-click the area below the horizontal axis of the graph to display a “Horizontal Axis” option (Fig 5.1.2b)

Figure 5.1.2b: Horizontal Axis

→ Change “Quantity Plotted” from “V ” to “V(E)” ee

→ We have the linear graph of the input characteristics for the common Base configuration of the PNP BJT 2N5401 (Fig 5.1.2c)

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Figure 5.1.2c: Input or driving point characteristics for the common Base configuration

Figure 5.1.2.d: Zoomed Fig 5.1.2.2c

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5.1.2.1 SPICE Netlist o PNP BJT 2N5401 Input I-V characteristics

VEE N001 0 RE E N001 1k Bjtpnp C 0 E 0 2N5401 RC N002 C 5k VCC 0 N002 model PNP PNP

.dc VEE 0 1 0.001 VCC 5 30 5

5.2 Output I-Vcharacteristic simulation

Since the static output characteristic curves plotting equation is , we plot I against VC CB, with IE as parameter (plot curves for different values of I ) E

begin the simulation:

→ Similar DC sweep setting to section 5.1 Input I-V characteristics simulation but VCC = 1 source & VEE = 2 source stnd

→ Add theoretical equations to the schematic, similar to section 5.1Input IVcharacteristics (on Fig 5.2.1)

Figure 5.2.1: Finished testing circuit for output I-V characteristic

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BJT 2N5401

To display the output/collector point characteristics for the common Base configuration of the PNP BJT 2N5401 in linear sweep:

→ Click on the Run symbol on the tool bar

→ Right-click on the graph to “Add Traces”  Choose “I (Bjtpnp)” C→ To change the voltage values of the graph, right-click the area below the

horizontal axis of the graph to display a “Horizontal Axis” → Change “Quantity Plotted” from “V ” to “V(C)” CC

→ We have the linear graph of the output characteristics for the common Base configuration of the PNP BJT 2N5401 (Fig 5.2.2)

Figure 5.2.2: Output or collector characteristics for the common-Base configuration

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o PNP BJT 2N5401 Output I-V characteristics VEE N001 0

RE E N001 1k Bjtpnp C 0 E 0 2N5401 RC N002 C 5k VCC 0 N002 model PNP PNP

( and are determined at a particular operating point on the graph) IC IB

• For practical devices, typically ranges from about 50 to over 400, with most in βthe midrange

❖ For each value of VEE and V (Table 6.1), we use Spice to find the CC

corresponding I and I values with the following steps: CB

→ Set V =1V EE

→ Let DC sweep with 1 source is VCC Start st

value & Stop value: -1 & 10 respectively Increment: 0.001

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For I value:

→ We apply similar syntax:

.meas DC Ib1 FIND Ib(bjtpnp) WHEN VCC = 1.3V meas DC Ib2 FIND Ib(bjtpnp) WHEN VCC = 1.4V meas DC Ib3 FIND Ib(bjtpnp) WHEN VCC = 3V meas DC Ib4 FIND Ib(bjtpnp) WHEN VCC = 4V meas DC Ib5 FIND Ib(bjtpnp) WHEN VCC = 6V meas DC Ib6 FIND Ib(bjtpnp) WHEN VCC = 8V meas DC Ib7 FIND Ib(bjtpnp) WHEN VCC = 10V  OK

→ Run

→ To view the values of I & I , click on “View” then choose “SPICE BC

Error Log” (Table 6.1)

→ Set V = 2V and carry out the same steps EE

Table 6.1: I & I values at V = 1V, 2V and V varies BCEECC

VCC (V)

IC (µA) I (µA) B β I (µA) C I (µA) B β 1.3 -370.72 -15.69 23.63 -394.86 -921.39 0.43 1.4 -382.48 -6.04 63.35 -414.70 -902.13 0.46 2 -385.69 -3.54 108.94 -533.71 -786.72 0.69 4 -386.23 -3.48 111.02 -929.32 -405.24 2.29 6 -386.75 -3.42 113.10 -1314.77 -39.72 33.10 8 -387.27 -3.36 106.87 -1345.36 -11.65 115.47 10 -387.77 -3.31 117.25 -1346.07 -11.44 117.68

From the table, we can see that

• At V = 1V: with the value of VCC is equal to approximately 1.4V or more , EE

we are able to calculate β

• At V = 2V: with the value of VCC is greater than 6, we can calculate β EE

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CONCLUSION

For this project, we have built the PNP BJT 2N5401 testing circuit with allspecification and functional requirements, and successfully simulated it on LTSpiceprogram to produce the linear graphs of the input and the output I-V characteristicsfor the common Base configuration of the PNP BJT 2N5401 We studied thecharacteristics, construction, and working condition of a PNP BJT as well asimplementing LTSpice features Above is the step-by-step of our circuit simulationon LTSpice However, our graph would have been improved if we had used asmaller increment for the horizontal axis values Overall, the objectives of theproject were met

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