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Source : Phase-Locked Loops: Design, Simulation, and Applications, Sixth Edition Ronald E Best Introduction to PLLs Operating Principles of the PLL The phase-locked loop (PLL) helps keep parts of our world orderly If we turn on a television set, a PLL keeps heads at the top of the screen and feet at the bottom In color television, another PLL makes sure green remains green and red remains red (even if politicians claim the reverse is true) A PLL is a circuit that causes a particular system to track with another one More precisely, a PLL is a circuit synchronizing an output signal (generated by an oscillator) with a reference or input signal in frequency as well as in phase In the synchronized— often called “locked”—state, the phase error between the oscillator’s output signal and the reference signal is zero, or it remains constant If a phase error builds up, a control mechanism acts on the oscillator in such a way that the phase error is again reduced to a minimum In such a control system, the phase of the output signal is actually locked to the phase of the reference signal This is why it is referred to as a phase-locked loop The operating principle of the PLL is explained by the example of the linear PLL (LPLL) As will be pointed out in Sec 1.3, other types of PLLs exist—for example, digital PLLs (DPLLs), all-digital PLLs (ADPLLs), and software PLLs (SPLLs) The PLL block diagram is shown in Fig 1.1a and consists of three basic functional blocks: ■ A voltage-controlled oscillator (VCO) ■ A phase detector (PD) ■ A loop filter (LF) In this simple example, there is no down scaler between the output of VCO [u2(t)] and the lower input of the phase detector [ω2] Systems using down scalers are discussed in the following chapters In some PLL circuits, a current-controlled oscillator (CCO) is used instead of the VCO In this case, the output signal of the phase detector is a controlled Printed from Digital Engineering Library @ McGraw-Hill (www.Digitalengineeringlibrary.com) Copyright ©2004 The McGraw-Hill Companies All rights reserved Any use is subject to the Terms of Use as given at the website INTRODUCTION TO PLLS Ronald E Best Figure 1.1 (a) Block diagram of the PLL (b) Transfer function of the VCO (uf = control voltage; ω2 = angular frequency of the output signal.) (c) Transfer function of the PD ( error.) = average value of the phase-detector output signal; θe = phase current source rather than a voltage source However, the operating principle remains the same The signals of interest within the PLL circuit are defined as follows: ■ The reference (or input) signal u1(t) ■ The angular frequency ω1 of the reference signal ■ The output signal u2(t) of the VCO ■ The angular frequency ω2 of the output signal ■ The output signal ud(t) of the phase detector ■ The output signal uf(t) of the loop filter ■ The phase error θe, defined as the phase difference between signals u1(t) and u2(t) INTRODUCTION TO PLLS Ronald E Best Let us now look at the operation of the three functional blocks in Fig 1.1a The VCO oscillates at an angular frequency ω2, which is determined by the output signal uf of the loop filter The angular frequency ω2 is given by (1.1) where ω0 is the center (angular) frequency of the VCO and K0 is the VCO gain in rad s−1 V−1 Equation (1.1) is plotted graphically in Fig 1.1b Because rad (radian) is a dimensionless quantity, we will drop it mostly in this text (Note, however, that any phase variables used in this book will have to be measured in radians and not in degrees!) Therefore, in the equations a phase shift of 180° must always be specified as a value of π The PD (also referred to as a phase comparator) compares the phase of the output signal with the phase of the reference signal and develops an output signal ud(t), which is approximately proportional to the phase error θe, at least within a limited range of the latter (1.2) Here, Kd represents the gain of the PD The physical unit of Kd is V/rad Figure 1.1c is a graphical representation of Eq (1.2) The output signal ud(t) of the PD consists of a DC component and a superimposed AC component The latter is undesired; hence, it is canceled by the loop filter In most cases, a first-order low-pass filter is used Let us now see how the three building blocks work together First, we assume the angular frequency of the input signal u1(t) is equal to the center frequency ω0 The VCO then operates at its center frequency ω0 As we see, the phase error θe is zero If θe is zero, the output signal ud of the PD must also be zero Consequently, the output signal of the loop filter uf will also be zero This is the condition that permits the VCO to operate at its center frequency If the phase error θe were not zero initially, the PD would develop a nonzero output signal ud After some delay, the loop filter would also produce a finite signal uf This would cause the VCO to change its operating frequency in such a way that the phase error finally vanishes Assume now that the frequency of the input signal is changed suddenly at time t0 by the amount Δω As shown in Fig 1.2, the phase of the input signal then starts leading the phase of the output signal A phase error is built up and increases with time The PD develops a signal ud(t), which also increases with time With a delay given by the loop filter, uf(t) will also rise This causes the VCO to increase its frequency The phase error becomes smaller now, and after some settling time the VCO will oscillate at a frequency that is exactly the frequency of the input signal Depending on the type of loop filter used, the final phase error will have been reduced to zero or to a finite value The VCO now operates at a frequency which is greater than its center frequency ω0 by an amount Δω This will force the signal uf(t) to settle at a final INTRODUCTION TO PLLS Ronald E Best Figure 1.2 Transient response of a PLL onto a step variation of the reference frequency (a) Reference signal u1(t) (b) Output signal u2(t) of the VCO (c) Signals and θe (t) as a function of time (d) Angular frequency ω2 of the VCO and loop filter output signal uf(t) as a function of time (e) Angular frequency ω1 of the reference signal u1(t) value of uf = Δω/K0 If the center frequency of the input signal is frequency-modulated by an arbitrary low-frequency signal, then the output signal of the loop filter is the demodulated signal The PLL can consequently be used as an FM detector As we shall see later, it can be further applied as an AM or PM detector One of the most intriguing capabilities of the PLL is its ability to suppress noise superimposed on its input signal Let us suppose that the input signal of the PLL is buried in noise The PD tries to measure the phase error between input and output signals The noise at the input causes the zero crossings of the input signal u1(t) to be advanced or delayed in a stochastic manner This causes the PD output signal ud(t) to jitter around an average value If the corner frequency of the loop filter is low enough, almost no noise will be noticeable in the signal uf(t), and the VCO will operate in such a way that the phase of the signal Printed from Digital Engineering Library @ McGraw-Hill (www.Digitalengineeringlibrary.com) Copyright ©2004 The McGraw-Hill Companies All rights reserved Any use is subject to the Terms of Use as given at the website INTRODUCTION TO PLLS Ronald E Best u2(t) is equal to the average phase of the input signal u1(t) Therefore, we can state that the PLL is able to detect a signal that is buried in noise These simplified considerations have shown that the PLL is nothing but a servo system that controls the phase of the output signal u2(t) As shown in Fig 1.2, the PLL was always able to track the phase of the output signal to the phase of the reference signal; this system was locked at all times This is not necessarily the case, however, because a larger frequency step applied to the input signal could cause the system to “unlock.” The control mechanism inherent in the PLL will then try to become locked again, but will the system indeed lock again? We shall deal with this problem in the following chapters Basically two kinds of problems must be considered: ■ The PLL is initially locked Under what conditions will the PLL remain locked? ■ The PLL is initially unlocked Under what conditions will the PLL become locked? If we try to answer these questions, we notice that different PLLs behave quite differently in this regard We find there are some fundamentally different types of PLLs We will identify these various types in Sec 1.3 Historical Background The French engineer Henri de Bellescize is considered to be the inventor of the PLL His very first implementation goes back to the year 1932 De Bellescize published his vacuum tube circuit in the French journal L’Onde Electrique.22 The actual schematic is given in Fig 1.3 and will probably look familiar only to a Figure 1.3 De Bellescize’s PLL circuit of the year 1932 INTRODUCTION TO PLLS Ronald E Best few veterans who started their career with building ham radios from electron tubes The tube on the right side of the figure in combination with the LC tank circuit forms an oscillator, and as we will recognize soon, it is even a voltage-controlled oscillator The output signal of the oscillator [labeled H and corresponding to u2(t) in Fig 1.1a] is capacitively coupled to the grid of the tube on the left The reference signal [labeled S and corresponding to u1(t) in Fig 1.1a] is also fed via another capacitor to that grid Because the grid voltage–anode current characteristic of electron tubes is nonlinear, the anode current contains a product term that is, a signal proportional to S · H or u1(t) · u2(t) As will be shown in Sec 2.4.1, the circuit around the left tube is a multiplier type phase detector When the circuit is locked, this product is a measure of phase error—in other words, of the phase difference between the signals S and H The parallel RC circuit in the anode is the loop filter The voltage drop across that filter is therefore proportional to the phase error That voltage applied to the anode of the right tube is now the difference of the battery voltage (e) and the voltage drop across resistor R—that is, the phase error modulates the anode voltage of the oscillator Because the frequency generated by the oscillator is an almost linear function of anode voltage, the oscillator is a VCO indeed! This brilliant invention was widely ignored by most engineers for about 20 years One of the first large-scale industrial applications of the PLL (back in the 1950s) was the color subcarrier recovery in color TV receivers PLL-like circuits were also used in TV for line and frame synchronization Somewhat later frequency synthesizers built from PLLs were used to generate a raster of frequencies in the local oscillator of FM receivers The real breakthrough of the PLL came with desktop computers and with the PC, where PLLs are used for many types of data synchronization—for instance, reading digital data to and from floppy disks, hard disks, modems, tape drives, and the like One of the largest applications today is probably the mobile phone, where the PLL is used again for frequency synthesis Classification of PLL Types The very first phase-locked loops (PLLs) were built from discrete components, including electron tubes and, later, discrete transistors All these circuits were linear circuits The first PLL ICs appeared around 1965 and were also purely analog devices An analog multiplier (four-quadrant multiplier) was used as the phase detector, the loop filter was built from a passive or active RC filter, and the well-known voltage-controlled oscillator (VCO) was used to generate the output signal of the PLL This type of PLL is referred to as the linear PLL (LPLL) today In the years that followed, the PLL drifted slowly but steadily into digital territory The very first digital PLL (DPLL), which appeared around 1970, was in effect a hybrid device: only the phase detector was built from a digital circuit (for instance, from an EXOR gate or a JK-flipflop), but the remaining blocks were still analog A few years later, the “all-digital” PLL (ADPLL) was invented The ADPLL is exclusively built from digital function blocks; hence, it doesn’t contain any passive components like resistors and capacitors Printed from Digital Engineering Library @ McGraw-Hill (www.Digitalengineeringlibrary.com) Copyright ©2004 The McGraw-Hill Companies All rights reserved Any use is subject to the Terms of Use as given at the website INTRODUCTION TO PLLS Ronald E Best In analogy to filters, PLLs can also be implemented “by software.” In this case, the function of the PLL is no longer performed by a piece of specialized hardware, but rather by a computer program This last type of PLL is referred to as SPLL Different types of PLLs behave differently, so there is no common theory which covers all kinds of PLLs The performance of LPLLs and DPLLs is similar, however; thus, we can develop a theory that is valid for both categories We will deal with LPLLs and DPLLs in Chaps and The term “mixed” indicates that these PLLs are mostly hybrids built from linear and digital circuits Strictly speaking, only the DPLL is a mixed-signal circuit; the LPLL is purely analog The ADPLL behaves very much different from mixed-signal PLLs; hence, it is discussed in a separate chapter (Chap 11) The software PLL is normally implemented by a hardware platform such as a microcontroller or a digital signal processor (DSP) The PLL function is realized by software This offers the greatest flexibility because a vast number of different algorithms can be developed For example, an SPLL can be programmed to behave like an LPLL, a DPLL, or an ADPLL We will deal with SPLLs in Chap 13 Printed from Digital Engineering Library @ McGraw-Hill (www.Digitalengineeringlibrary.com) Copyright ©2004 The McGraw-Hill Companies All rights reserved Any use is subject to the Terms of Use as given at the website Source : Phase-Locked Loops: Design, Simulation, and Applications, Sixth Edition Ronald E Best Mixed-Signal PLL Building Blocks Block Diagram of the Mixed-Signal PLL As mentioned in Sec 1.3, the mixed-signal PLL includes circuits that are hybrids of both linear and digital circuits To see which parts of the system are linear and which are digital, consider the general block diagram in Fig 2.1 As shown in Sec 1.1, every PLL consists of the three blocks phase detector, loop filter, and VCO (voltage-controlled oscillator) When the PLL is used as a frequency synthesizer, another block is added: a divide-by-N counter Assuming the counter divides by a factor N, the frequency of the VCO output signal is then forced to be N times the reference frequency (the frequency of the input signal u1) In most cases, the divider ratio N is made programmable We will deal extensively with frequency synthesizers in Chaps and By inserting a down scaler, the term center frequency becomes ambiguous: the center (radian) frequency ω0 can be related to the output of the VCO (as done in Sec 1.1), but it could also be related to the output of the down scaler, or in other words, to the input of the PLL To remove this dilemma, we introduce two different terms for center (radian) frequency: we will use the symbol ω0 to denote the center frequency at the output of the VCO, and the symbol ω0′ to denote the center radian frequency at the input of the PLL Obviously, ω0 and ω0′ are related by ω0′ = ω0/N As shown in Fig 2.1, the quantities related to the output signal of the down scaler are characterized by a prime (′symbol)— for example, u2′, ω2′ When the VCO does not operate at its center frequency (uf ≠ 0), its output radian frequency is denoted as ω2 For the down-scaled frequency, the symbol ω2′ is used, as shown in Fig 2.1 Again, we have ω2′ = ω2/N As will be demonstrated later in this chapter, the order (number of poles of the transfer function) of a PLL is equal to the order of the loop filter +1 In most practical PLLs, firstorder loop filters are applied These PLLs are therefore second-order systems In a few cases, the filter may be omitted (such a PLL is a first-order loop) In this chapter, we will deal exclusively with first- and Printed from Digital Engineering Library @ McGraw-Hill (www.Digitalengineeringlibrary.com) Copyright ©2004 The McGraw-Hill Companies All rights reserved Any use is subject to the Terms of Use as given at the website