FPGA prototyping by VHDL examples xilinx spartan 3
[...]... Development 15.1 Introduction 15.2 Useful code segments 15.2.1 KCPSM3 conventions 15.2.2 Bit manipulation 15.2 .3 Multiple-byte manipulation 15.2.4 Control structure 15 .3 Subroutine development 15.4 Program development 32 3 32 3 32 4 32 4 32 6 32 6 32 6 32 8 32 9 32 9 33 1 33 2 33 2 33 3 33 4 33 5 33 6 33 8 34 1 34 2 34 2 34 2 34 3 34 5 34 5 34 5 34 5 34 6 34 7 34 8 35 0 35 1 XVi CONTENTS 15.5 15.6 15.7 15.8 15.4.1 Demonstration example... interface 16.5 .3 Assembly code development 16.5.4 VHDL code development 16.6 Bibliographic notes 16.7 Suggested experiments 16.7.1 Low-frequency counter I 16.7.2 Low-frequency counter 11 35 2 35 6 35 8 35 8 35 9 36 2 36 2 36 3 36 4 36 5 36 5 36 5 36 5 36 5 36 5 36 5 36 5 36 6 36 6 36 7 36 7 36 8 36 8 36 9 37 1 37 1 37 1 37 3 37 4 37 5 37 6 38 4 38 6 38 7 38 7 38 9 39 8 402 402 402 402 CONTENTS 16.7 .3 Auto-scaled low-frequency counter 16.7.4... 13. 5 Bibliographic notes 13. 6 Suggested experiments 13. 6.1 Rotating banner 13. 6.2 Underline for the cursor 13. 6 .3 Dual-mode text display 266 267 268 269 2 73 275 282 282 287 287 287 287 288 288 288 289 289 289 289 290 290 290 291 29 1 29 1 29 1 292 294 295 297 298 30 2 30 2 30 9 31 0 31 2 31 7 31 7 31 7 31 7 31 7 CONTENTS 13. 6.4 13. 6.5 13. 6.6 13. 6.7 13. 6.8 13. 6.9 Keyboard text entry UART terminal Square wave display... circuit 13 VGA controller II: text 13. 1 Introduction 13. 2 Text generation 13. 2.1 Character as a tile 13. 2.2 Font ROM 13. 2 .3 Basic text generation circuit 13. 2.4 Font display circuit 13. 2.5 Font scaling 13. 3 Full-screen text display 13. 4 The complete pong game 13. 4.1 Text subsystem 13. 4.2 Modified graphic subsystem 13. 4 .3 Auxiliary counters 13. 4.4 Top-level system 13. 5 Bibliographic notes 13. 6 Suggested... 10.5.5 Advanced FPGA featuresxizinxspecific 10.6 Bibliographic notes 10.7 Suggested experiments 199 200 200 200 20 1 20 1 202 206 206 208 210 210 212 214 214 214 214 214 215 215 216 216 216 220 220 22 1 222 222 222 2 23 224 226 228 233 233 234 236 237 237 240 240 CONTENTS 10.7.1 10.7.2 10.7 .3 10.7.4 10.7.5 10.7.6 10.7.7 10.7.8 10.7.9 Memory with a 512K -by- 16 configuration Memory with a 1M -by- 8 configuration... book is prepared to be used with several entry-level FPGA prototyping boards manufactured by Digilent Inc., including the Spartan- 3 Starter, Nexys-2, and Basys boards, all of which contain a Spartan- 3/ 3E FPGA device and have PREFACE xxi similar I/O peripherals The design examples in the book are based on the Spartan- 3 Starter board (or simply the S3 board), but most of them can be used directly in other... 1 4 13 417 417 417 417 417 417 418 419 419 419 420 42 1 42 1 422 XViii A .3 A.4 AS A.6 A.7 CONTENTS A.2 .3 Routing with concurrent statements A.2.4 Routing with if and case statements A.2.5 Combinational circuit using process Memory Components A .3. 1 Register template A .3. 2 Register file Regular sequential circuits FSM FSMD S3 board constraint file (s3 c f ) u 422 4 23 424 425 425 426 427 428 430 433 References... introductory development boards use FPGA devices from the inexpensive Spartan- 3 family Since the Web version supports the Spartan- 3 device, it fits our need The simulation software used in the book is the starter version of Mentor Graphics’ ModelSim XE III package It is a customized edition of ModelSim Both software packages are free and can be downloaded from Xilinx s Web site FPGA prototyping board This book... the S3 board 12.1 .3 Video controller 12.2 VGA synchronization 12.2.1 Horizontal synchronization 12.2.2 Vertical synchronization 12.2 .3 Timing calculation of VGA synchronization signals 12.2.4 HDL implementation xiii 240 240 240 24 1 24 1 24 1 24 1 24 1 24 1 2 43 2 43 2 43 2 43 244 244 245 245 246 246 246 249 25 1 254 254 254 254 255 255 255 257 257 257 259 259 260 260 262 2 63 2 63 XiV CONTENTS 12 .3 12.4... Programmable timer 17.7 .3 Set-button interrupt service routine 17.7.4 Interrupt interface with two requests 17.7.5 Four-request interrupt controller Appendix A: Sample VHDL templates A 1 General VHDL constructs A 1.1 Overall code structure A 1.2 Component instantiation A.2 Combinational circuits A.2.1 Arithmetic operations A.2.2 Fixed-amount shift operations xvii 402 4 03 4 03 4 03 4 03 4 03 4 03 404 404 405 405 . FPGA PROTOTYPING BY VHDL EXAMPLES FPGA PROTOTYPING BY VHDL EXAMPLES Xilinx SpartanTM-3 Version Pong P. Chu Cleveland State University WILEY- INTERSCIENCE A JOHN WILEY &. Cataloging-in-Publication Data: Chu, Pong P. , 1959- p. cm. FPGA prototyping by VHDL examples / Pong P. Chu. Includes bibliographical references and index. ISBN 978-0-470-18531-5 (cloth : alk. paper). software packages are free and can be downloaded from Xilinx s Web site. FPGA prototyping board This book is prepared to be used with several entry-level FPGA prototyping boards manufactured by