[Khiem] improvement of matrix converter drive reliability by online fault detection and a fault tolerant switching strategy IEEE trans

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244 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO. 1, JANUARY 2012 Improvement of Matrix Converter Drive Reliability by Online Fault Detection and a Fault-Tolerant Switching Strategy Khiem Nguyen-Duy, Student Member, IEEE, Tian-Hua Liu, Senior Member, IEEE , Der-Fa Chen, Member, IEEE, and John Y. Hung, Fellow, IEEE Abstract—The matrix converter system is becoming a very promising candidate to replace the conventional two-stage ac/dc/ac converter, but system reliability remains an open issue. The most common reliability problem is that a bidirectional switch has an open-switch fault during operation. In this paper, a matrix con- verter driving a speed-controlled permanent-magnet synchronous motor is examined under a single open-switch fault. First, a new fault-detection method is proposed using only the motor currents. Second, a novel fault-tolerant switching strategy is presented. By treating the matrix converter as a two-stage rectifier/inverter, ex- isting modulation techniques for the inverter stage can be reused, whereas the rectifier stage is modified by control to counteract the fault. However, the proposed techniques require no additional hardware devices or circuit modifications to the matrix converter. Experimental results show that the proposed method can maintain the motor speed with a maximum ripple of 2%—a fivefold im- provement over the uncompensated system. The proposed method therefore offers a very economical and effective solution for the matrix converter fault tolerance problem. Index Terms—Fault diagnosis, fault tolerance, matrix converter, pulsewidth modulation, reliability. NOMENCLATURE V A ,V B ,V C Matrix converter input voltages. V a ,V b ,V c Matrix converter output voltages. S xY Switch connecting output x to input Y . V dc Virtual dc-link voltage. i a ,i b ,i c Output phase currents. i ∗ a ,i ∗ b ,i ∗ c Phase reference currents. Δi a Phase current error i ∗ a − i a . The modeling discussion makes references to a conventional two-stage converter, consisting of a three-phase ac/dc bridge rectifier and a three-phase dc/ac bridge inverter, but with no physical dc-link storage. Rectifier switches are denoted by C, Manuscript received September 24, 2010; revised January 22, 2011 and March 8, 2011; accepted April 6, 2011. Date of publication May 23, 2011; date of current version October 4, 2011. This work was supported by the National Science Council of Taiwan under Grants NSC-99-2221-E-011-151-MY3 and NSC 98-2811-E-011-022. K. Nguyen-Duy and T H. Liu are with National Taiwan University of Science and Technology, Taipei 106, Taiwan (e-mail: k.nguyen.duy@ieee.org; Liu@mail.ntust.edu.tw). D F. Chen is with the National Changhua University of Education, Changhua 500, Taiwan (e-mail: dfchen@cc.ncue.edu.tw). J. Y. Hung is with Auburn University, Auburn, AL 36849 USA (e-mail: j.y.hung@ieee.org). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TIE.2011.2151818 and inverter switches are labeled T . Upper and lower switches are distinguished by the s ubscripts U and L, respectively. For example, C UA denotes a rectifier upper switch connected to the source phase A, while T cL denotes an inverter lower switch connected to the output phase c. Note that a virtual dc-link voltage is denoted by plain text symbol, e.g., V AB ,to distinguish from matrix converter voltages. I. B AC KGROU N D R ESEARCH on matrix converter has received great at- tention since the inception of this kind of direct ac/ac converter [1]–[10]. Current commutation issues and modulation techniques have been vastly explored in the research literature, but the topic of r eliability improvement is relatively new and has received more isolated attention. Recovering from matrix converter system faults presents two challenges or problems that are reviewed next. A. Fault-Detection Methods The first problem is how to identify when the fault occurs and determine the exact location of the faulty device (isola- tion). Faults that can appear within the converter include an open-switch fault (including failure of a device driver circuit [11]) and a shorted-switch fault. An open-circuit fault might also occur in an output winding. For the fault detection and protection against faults of an insulated-gate bipolar transistor, there are two main approaches. The first approach is based on gate-drive detection working directly with the gate-drive circuit and usually relies on the measurement of the collector voltage [12], the gate voltage [13], or the induced voltage across the emitter stray inductance [14]. This kind of approach can be used for both short- and open-circuit fault detections. Because of its fast decision capability, gate-drive detection is particu- larly applicable for the protection against short-circuit fault. For protection of a matrix converter, however, this approach may become expensive and complicated since the number of switches is much larger than in a conventional voltage source inverter (VSI). The second fault-detection approach is algorithm-based de- tection, which relies on software computation. This approach may be applied to open-circuit fault detection so long as the system can endure the fault for the time period required to execute the algorithm. Abnormal behaviors of state variables 0278-0046/$26.00 © 2011 IEEE NGUYEN-DUY et al.: IMPROVEMENT OF MATRIX CONVERTER DRIVE RELIABILITY 245 like the current and voltage in the presence of a fault are analyzed to derive an algorithm to detect the fault location [15]–[19]. Most algorithm-based fault-detection methods have been devoted to VSI-based applications, and much fewer studies have been undertaken for matrix converters. Thus, further study should be carried out to discuss the detecting of the fault in the matrix converter. In addition, remedial action cannot be applied until the exact location of the faulty switch among a matrix of switches is determined. For safety concerns, it is recommended that, when a short- circuit fault occurs, an autoprotecting circuit should be trig- gered to immediately stop the system operation [20]. Another alternative is to employ a fast fuse in series with each of the bidirectional switches from the output phase points. Thus far in the literature, study of the open-switch fault far outweighs the case of the shorted-switch fault [17], [19], [21]–[26]. It can be stated that online fault-detection ability is an essential prerequisite for developing a solution to counteract the fault. B. Methods for Fault-Tolerant Operation The second challenge to improving matrix converter system reliability is to develop a postfault solution that maintains system operation as close as possible to normal. The solution for fault-tolerant operation may require modification of the con- verter topology or introduction of a different converter control strategy [21], [22], [24]. Researchers have proposed different solutions to create either a fault-tolerant topology or revised switching strategy in the matrix converter system. For example, Kwak and Toliyat [25], [26] proposed a topology with one to three additional triacs to connect the source neutral point to the load neutral point or to the output phase of a load. The remedial modulation technique relied on the indirect modulation principle [27]–[29]. Under that principle, a remedial modulation strategy in the rectifier stage creates two equal virtual dc-link voltages with respect to the source neutral. By restructuring the converter topology after the fault occurrence, the remaining healthy (3 × 2) matrix configuration, together with the remedial modulation algorithm, can deal with the loss of an output leg of the converter, the opened fault of a switch, or the loss of one output phase winding. C. Open Challenges The aforementioned methods appear to suffer several limita- tions. For example, the work of Kwak et al. might have greater impact if it took into account the implementation on a practical system such as an adjustable speed drive system instead of a passive R–L prototype load. Furthermore, the source neutral point and/or the load neutral point must be accessible; in general, these points may not be available. Finally, the need for additional triacs raises physical packaging issue and may not be a cost-effective solution. In terms of fault detection in matrix converter systems, recent published papers have used the concept of output error voltage [26], [30]–[33]. The principle of these methods is based on the observation that, when there i s an open-switch fault, the output error voltage signal (i.e., the difference between the output voltage of a switch and the associated input voltage) becomes abnormally high during the time when the faulty switch is triggered on. Again, approaches of this kind carry another drawback. To know the value of three-phase input and output voltages, it is mandatory to insert voltage-measurement circuits or to introduce soft-voltage observers, which may, in general, lead to the need of extra space, extra cost, or computation complexity. In [26], the author proposed both a fault-detection method and a postfault modulation strategy in an attempt to completely solve the fault tolerance issue. However, continuous operation from the instant of fault detection to the onset of fault-tolerant control was not ensured. Specifically, the fault- detection method was verified only by computer simulation, whereas the postfault modulation algorithm was carried out with a separate experiment. D. Scope of This Paper This paper seeks to address the aforementioned problems. A conventional 3 × 3 matrix converter driving a speed-controlled permanent-magnet synchronous motor (PMSM) is investigated both theoretically and experimentally. First, a system descrip- tion is briefly presented (Section II). Next, the authors propose an algorithmic fault-detection method for the open-switch fault, employing only the two current sensors that are the standard hardware elements in a conventional drive system (Section I II). This proposed method can quickly identify the exact location of the open-switch fault. Finally, the authors propose a postfault (or fault-tolerant) switching strategy that relies only on the remaining eight switches (Section IV). No extra devices are required t o maintain balanced and nearly sinusoidal three-phase output currents. The experimental results show the proposed method has satisfactory performance under the operating con- dition of a single open-switch fault (Section V). Compared to the known prior works [25], [26], [30]–[33], the proposed method has several key advantages. First, no extra hardware devices are needed. Second, the entire fault detection and postfault processing are executed by a digital signal proces- sor (DSP) within a very short time duration. To the authors’ best knowledge, the ideas demonstrated here are the first of their kind. II. S YSTEM DESCRIPTION A. Configuration of the Drive System The configuration of the proposed drive system is shown in Fig. 1. The drive system hardware consists of a wye-connected three-phase PMSM with mechanical load, a matrix converter (10-kW rating), a complex programmable logic device (CPLD) chip, and a DSP system. The parameters of the PMSM are listed in Table I. An encoder (2500 pulses per revolution) is mounted on the motor shaft. Two Hall-effect current sensors are used to detect the stator currents of the motor. The zero- voltage crossing detection circuit provides information of the input voltage source angle for modulation. The DSP reads the 246 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO. 1, JANUARY 2012 Fig. 1. Configuration of the tested motor drive system. TABLE I P ARAMETERS OF THE PMSM zero-voltage crossing detection signal, the shaft angle, and the stator currents of the motor and computes the control algorithms. Then, the DSP outputs the nine signals (Bus) to trigger the solid-state power switches that produce the switch- ing patterns of the matrix converter. Finally, depending on the sign of the motor current, a switch commutation strategy is executed by the CPLD to achieve safe commutation. The hardware prototype employs the minimal number of elements necessary to ensure proper operation of a drive system. The matrix converter is enclosed by the dashed box in Fig. 1. It consists of nine bidirectional or ac switches, where each of them possesses the capability of bidirectional energy flow. Each output phase of a 3 × 3 matrix converter is connected to three input phases by three ac switches. When one ac switch of an output phase is an opened fault, there are two remaining ac switches that can be used to connect to the two related input phases. The two remaining healthy output phases can still receive any of the possible voltage from the three input phases. This scenario is different from an open-circuit fault introduced by the load. In the latter case, all three ac switches connected to the faulty output phase become useless, reforming a 3 × 2 hardware matrix with floating load neutral point. Previously discussed approaches usually employ some supporting redun- dant devices to either perform the following: 1) connect the opened phase to some redundant leg or 2) connect the load neutral point to some rational reference point [22], [24], [26]. The issue of an open-circuit fault in the load, however, is not addressed in this paper, which focuses on a fault within the converter. B. Modulation Strategy Modulation strategy is typically selected based on the appli- cation and the underlying hardware configuration. The modu- lation mechanism in a drive system works at the closest level to the switching fashion of the switches. Furthermore, differ- ent modulation strategies create different abnormal behaviors when the hardware suffers a device failure. A detailed study comparing the abnormal behavior (in the presence of fault) against the normal behavior is a common approach to deriving either a fault-detection method or a postfault solution. Thus, it is necessary to choose a nominal modulation strategy for the development of a fault-tolerant solution. In this paper, the current-controlled drive is considered, leaving the voltage-controlled drive for subsequent study. The current-controlled drive is very common for ac servo applica- tions where a high-bandwidth current-control loop is often de- sirable so that a reference torque can be followed. The indirect modulation method [27]–[29] will be carried out throughout this paper, where later, it reveals a potential of determining the fault (Section III), as well as a remedial modulation solution (Section IV). A detailed description of the modulation strategy is presented next. The matrix converter can be modeled as a two-stage rectifier/ inverter converter with no dc-link storage, as shown in Fig. 2. The relationship of the switching patterns between matrix converter and the conventional two-stage converter can be expressed as S xY =  k=U,L T xk C kY = T xU C UY + T xL C LY (1) NGUYEN-DUY et al.: IMPROVEMENT OF MATRIX CONVERTER DRIVE RELIABILITY 247 Fig. 2. Equivalent two-stage converter topology. Fig. 3. Virtual dc-link voltages for a matrix converter. where x denotes the output phase (a, b, c), Y denotes the input phase (A, B, C), and U and L denote the upper and lower switches, respectively. By using the two-stage converter concept, the rectifier- and inverter-stage conversion signals are separately generated. In the rectifier stage, the virtual dc-link voltage is constructed by the available line-to-line source voltage. There are six com- binations of nonzero line-to-line voltage at any time instant, but just the three positives among these shall be adopted to be a virtual dc-link voltage to ensure a consistent logic for the inverter stage. These three positive voltages can be classified according to their relative value as the high, middle, and low voltages. Fig. 3 shows the three-type virtual dc-link voltage for a matrix converter. To aid in analysis, one voltage source period has been subdivided and labeled with 12 different sectors. The simplest way of choosing the virtual dc link is to choose the highest line-to-line voltage in each time instant or sector. This action is equivalent to the operation of an uncontrolled three- phase diode-bridge rectifier, where it provides the inverter with maximum output power. For example, if the source angle is lying within either sector 1 or 2, then the virtual dc-link voltage V CB is chosen (study Fig. 3). By closing switches C UC and C LB in the rectifier stage of Fig. 2, the input phase voltage V C is connected to the positive dc rail, and V B is connected to the negative dc rail. The merit of the selection of the highest available dc-link voltage is to take the full advantage of the input voltage capa- bility, particularly in the presence of a disturbance such as the induced voltage [back electromotive force (EMF)] of a servo drive system. If an adequately high switching frequency is used, the ripple of the dc-link voltage can be compensated [34]. A current-controlled drive system was successfully run under that type of modulation, as reported in [34]. Based on the principle of indirect modulation and the min- imal hardware system shown in Fig. 1, the block diagram of the drive control system used in this paper is shown in Fig. 4. The block diagram consists of two feedback loops: speed- and current-control loops. The speed-control loop uses a proportional–integral (PI) controller. The current-control loop is controlled in the abc frame. The matrix converter is treated as a t wo-stage ac/dc/ac converter or rectifier/inverter. In the inverter stage, basic hysteresis current controllers are used. Based on the deviation between the motor current and the reference current, the phase current can be independently con- trolled by manipulating either the upper or lower switch on each leg. Using the source angle signal, a reasonable virtual dc-link voltage in the rectifier stage is then chosen. In the normal operation, the highest virtual dc-link voltage is chosen in each sector, as described before. Finally, the switching states in the rectifier and inverter stages are combined to yield the switching logic for triggering the nine bidirectional switches. In summary, the indirect modulation strategy is carried through this work. In the next section, the fault-detection method is described. III. P ROPOSED FAULT-DETECTION METHOD On the basis of the modulation strategy described in Section II, the effect of a converter open-switch fault on system performance is first discussed by way of an example scenario and then generalized. Following that, a fault-detection method is proposed in this section. In this present case, an insight into the behavior of output currents is helpful. A. Effect of Open-Switch Fault on Converter Behavior To better understand the effect of an open-switch fault, an example will be discussed, and the results are then generalized. Assume the following example conditions. 1) Open-switch fault occurs in switch S aC , which connects the input phase C to the output phase a. 2) Source angle is presently at sector 4 but is entering the range of sectors 5–8. 3) A 100-μs sampling interval is used in the current-control loop. Notice that, during sectors 5–8 (Fig. 3), the virtual dc links V AC and V BC are chosen in the rectifier stage, as these are the highest available line-to-line voltages. First, consider the case where the phase-a reference current i ∗ a is negative. When Δi a = i ∗ a − i a is negative, the current- control algorithm attempts to reduce i a during the next sam- pling interval by connecting phase a to the negative dc rail through lower switch T aL (see Fig. 2). Normally, the available voltage in the negative dc rail is V C . Therefore, the controller attempts to connect input phase C to the output phase a by triggering switch S aC . Unfortunately, switch S aC is suffering an open-switch fault, so normal control action leads to an open circuit of phase a. The current i a discharges through 248 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO. 1, JANUARY 2012 Fig. 4. Block diagram of proposed control system. the clamp circuit and approaches zero as time increases. The aforementioned condition is in effect so long as i ∗ a is negative and the source angle is lying within sectors 5–8. Output phase a can remain open for a time duration equal to the overlap between i ∗ a remaining negative and the time of four consecutive sectors 5–8. In this analysis, these are called “affected sectors.” Similar behavior occurs when i ∗ a is positive and V C is used in the positive virtual dc rail. In the latter case, the affected sectors are four adjacent sectors 11, 12, 1, and 2. The aforementioned analysis can be applied to all devices in the matrix converter. Let x denote the output phase a, b,orc. Then, the affected sectors after fault occurrence are described as follows. 1) For S xC , the affected sectors are 5–8 for i x < 0 and 11, 12, 1, and 2 for i x > 0. 2) For S xB , the affected sectors are 1–4 for i x < 0 and (7–10) for i x > 0. 3) For S xA , the affected sectors are 9–12 for i x < 0 and 3–6 for i x > 0. The fault condition depends on the time duration of the output current fundamental period, denoted as T fund ,aswell as the duration of the affected sectors, denoted as T aff .The reference current i ∗ a should be a sine wave that changes sign every half of the fundamental period. The affected sector dura- tion T aff is fixed to the input source period; for a 60-Hz source, T aff =5.6 ms. The fault time duration is approximated by T fault = min{T fund /2,T aff }. (2) Consider an example analysis for an eight-pole PMSM being regulated at 200 r/min. The output current fundamental period is T fund =75ms. Thus, the fault time is approximately equal to 5.6 ms, which is equivalent to 56 consecutive sampling intervals. The smallest fault duration occurs at the highest oper- ating speed. A maximum operating s peed of 2000-r/min speed produces a 7.5-ms current fundamental period. According to (2), the fault duration is 3.75 ms, equivalent to approximately 38 consecutive sampling intervals. However, the time duration that the output current in the faulty phase remains zero is slightly different from the fault time. Let T zero denote the zero-current duration, which can be estimated by subtracting from T fault the time for the current to discharge from its initial value to zero through the clamp circuit T zero = T fault − discharge time. (3) The phenomenon of the affected output current remaining zero in the faulty condition due to the open-circuit switch can be easily distinguished from zero-current crossings of normal operation. Due to the high-bandwidth current-control loop operating at high switching frequency, the normal zero- current crossing occurs in a relatively short time, less than a few sampling intervals in the worst case. The faulty condition for the opening of an ac switch disap- pears when the s ource angle lies outside the affected sectors; in this paper, such sectors are called “nonaffected sectors.” Specifically, in the case of a single open fault occurring in switch S aC , S bC ,orS cC ,thenonaffected sectors are sectors 3, 4, 9, and 10. Within these s ectors, all of the three-phase output currents should be able to track their respective reference current signals. Define the current error in the faulty output phase as the difference between the current and its reference signal, i.e., Δi x = i ∗ x − i x . Note that |Δi x | should be smaller when operating under the nonaffected sectors and larger when operating under the affected sectors. This feature will be used later for fault diagnosis. Based on these observations, a new fault-detection method that relies only on the motor current signal is proposed and explained in the next sections. The mechanism goes through two stages. B. First Stage of Fault Detection In the first stage of fault detection, for each sampling interval, the DSP determines whether the output current i a , i b ,ori c is equal to zero. In implementation practice, the DSP determines whether the output phase current is inside a small dead band , because a practical system often contains noise in the current NGUYEN-DUY et al.: IMPROVEMENT OF MATRIX CONVERTER DRIVE RELIABILITY 249 TABLE II R ECOMMENDED THRESHOLD VALUES sensing circuit. If this condition is satisfied, the DSP continues to check if the condition is continuously satisfied for some dura- tion, i.e., a kind of threshold time. The threshold value is chosen based on the zero-current duration ( 3). The smallest thresh- old associated with the maximum operating speed (3.75 ms or 38 sampling intervals in the example case) should be ade- quate f or all smaller operating speeds. In addition, the discharge time of the affected current should be also considered from the knowledge of the load time constant. The nature of the load being considered in this work is given in Table I. The estimated discharge time is less than seven sampling intervals under full load. With this knowledge, a threshold of 30 sampling intervals is adopted for the whole speed range in this paper. Based on the zero-current duration (3), the recommended threshold values for different operating speeds of an eight-pole 2.1-kW PMSM are given in Table II. The threshold values for motors having different pole numbers or operating at different nominal speeds can be computed using the same principle. If one of the three-phase output currents satisfies the con- dition mentioned earlier, then the conclusion is that the open- fault switch should be one among the three switches associated with the faulty output. Thus, at the end of the first stage test, the number of possible answers has been reduced from nine to three. In the second stage of fault detection, the exact location of the open switch is chosen from these three possible answers. C. Second Stage of Fault Detection In the second stage of the fault detection, the exact location of the open switch among the three possible answers is iden- tified. The summation of absolute current error |Δi x | in the faulty phase during one voltage source period is computed and categorized into three groups. 1) Group I includes sectors 7, 8, 1, and 2. These sectors are the nonaffected sectors for the three switches S aA , S bA , and S cA connected to input phase A. 2) Group II includes sectors 5, 6, 11, and 12. These sectors are the nonaffected sectors for the three switches S aB , S bB , and S cB connected to input phase B. 3) Group III includes sectors 3, 4, 9, and 10. These sectors are the nonaffected sectors for the three switches S aC , S bC , and S cC connected to input phase C. Next, the DSP determines the smallest value among the three groups. If group I has the smallest value, then the switch that connects input phase A to the faulty output phase should be the bad switch. Likewise, if group II has the smallest value, then the switch that connects input phase B to the faulty output phase should be the bad switch. Lastly, if group III has the smallest TABLE III L OCATION OF A SINGLE OPEN-FAU LT AC SWITCH value, then the switch that connects to input phase C should be the faulty one. The exact faulty switch among the three possible answers derived from the first stage test has been identified in the second stage test. The results are summarized in Table III. Knowing the exact location of the open fault, further action in the control can take place to counteract the fault. The fault-detection algorithm executed within every sam- pling interval is shown in Fig. 5. At the beginning of the algorithm, the DSP reads the three-phase output currents f rom the analog-to-digital converter and computes the three-phase current commands. Next, hysteresis controllers are used to provide switching states for the inverter stage. Then, the DSP reads a fault-indicator J_faultvariable that is updated from the previous interrupt. This variable is assigned a value at the end of the fault-detection mechanism that it indicates the location of the single open-fault ac switch. Therefore, this variable can receive nine different values associated with the nine ac switches. If a fault is detected, the DSP branches to one of the nine subroutines of the proposed fault-tolerant switching. Otherwise, the DSP continues to check the first condition for three-phase output current (being inside a small dead band). If this first stage test is satisfied, the DSP performs the second stage test. If the second stage test fails, then normal rectifier switching states are chosen. Otherwise, the exact location of the bad switch is detected, where the DSP assigns a suitable value for the fault indicator J_fault and branches to one of the nine remedial switching strategies. IV. F AULT-TOLERANT MODULATION STRATEGY Under normal conditions, the virtual dc-link voltage is ad- justed as a function of motor speed error and output current errors to obtain satisfactory performance of the PMSM drive system. When an open-switch fault occurs, the high and middle voltages at some sectors cannot be used because the faulty switch is unable to turn on. For example, if switch S aC experiences an open-switch fault, then any attempt by the controller to trigger this switch is not feasible. Input phase C cannot feed the output phase a. There- fore, phase a must be modulated between input phases A and B. Closer examination of the indirect modulation principle leads to a solution to achieve such modulation. The two-stage ac/dc/ac model (Fig. 2) is again used to help explain the analysis; the case of open-switch fault at S aC is described next. The switching function of the open faulted switch is de- scribed by S aC = T aU C UC + T aL C LC =0. Since the fault is an open switch, the function value must equal zero, regardless of switching states in either the inverter stage or rectifier stage (study Fig. 2). So as to not to open the output phase a, 250 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO. 1, JANUARY 2012 Fig. 5. Current-control algorithm with online fault-detection mechanism. switches T aU and C UC must not be simultaneously turned on. This is also true for the pair T aL and. C LC . Suppose that the current error is negative (Δi a =(i ∗ a − i a ) < 0). Within the inverter stage, the lower switch T aL should be turned on so as to reduce the current i a . From the aforemen- tioned switching constraints, rectifier switch C LC must not be turned on. Either C LA or C LB may be chosen, which offers the negative virtual dc rail voltages V A or V B . The positive dc rail has no similar constraints, so any of C UA , C UB , and C UC can be turned on. Similar logic applies for the case of positive current error (Δi a > 0): Inverter switch T aU must be turned on to increase i a , but rectifier switch C UC must not be turned on. The alter- native is to turn on either C UA or C UB for the positive virtual dc rail. The negative virtual dc rail can freely adopt any one of C LA , C LB ,orC LC . Summarized in Table IV are the combinations of feasible positive and negative rail voltages that yield proper virtual dc-link voltage for the open-switch fault of switch S aC .The 12 columns of the table describe rail voltages for the 12 sectors. The upper half of the table covers the case of negative current error, while the lower half covers the positive current error case. The selections of maximum virtual dc-link voltage are highlighted in colors red, violet, and blue. Corre- sponding waveforms are shown in Fig. 6. In the implementation practice, feasible switching states in the inverter stage are first determined, followed by selection of switching states in the rectifier stage. Current error Δi a of the affected output phase gives information on how to choose a proper virtual dc-link voltage. Synthesis of the switching states from the two-stage ac/dc/ac converter yields the triggering signals for the matrix converter. The aforementioned process is directly extended to switches in the other output phases. For instance, when S bA , S bB ,or S bC has an open-switch fault, attention should be paid to phase-b current deviation Δi b =(i ∗ b − i b ) to choose a proper dc-link voltage for the rectifier stage. Detailed switching rules for all single open-switch faults are given in Table V, where x denotes the output phase a, b,orc. The shaded cells are for the example described earlier (fault in phase a). V. E XPERIMENTAL RESULTS The experimental studies examined motor currents, motor torque, steady-state speed error, current harmonics, load distur- bance rejection, speed step response, and speed trajectory track- ing. Performances were examined with and without remedial actions. A. Motor Currents, Torque, and Speed Error The system operation from normal condition to a single open-switch fault without any remedial action i s shown in Fig. 7. Prior to the fault, the system is in steady state, with the speed regulated at 200 r/min under a 2-N · m load. At time t =0.1 s, switch S aC is opened by the program to produce the phenomenon of an open-switch fault. The output currents i a , i b , and i c are shown in Fig. 7(a)–(c), respectively. It can be NGUYEN-DUY et al.: IMPROVEMENT OF MATRIX CONVERTER DRIVE RELIABILITY 251 TABLE IV F EASIBLE RAIL VOLTAGES FOR OPEN-SWITCH FAULT S aC Fig. 6. Virtual dc-link waveforms using the maximum available voltages for the case of open-switch faulted S aC . observed that the output current i a is distorted and equals zero repetitively after time t =0.1 s. The major reason is that, in some duration, output phase a was not connected to any input. Fig. 7(d) shows the switching logic of T aU , which is used in the two-stage converter model inverter stage to regulate i a .During the fault, T aU stays at either zero or one to connect phase a to the input phase C, leading to the open-circuit fault in phase a. This phenomenon agrees with the earlier analysis in Section III. Whenever phase a is opened, it introduces an unbalanced two-phase machine with floating load neutral point. As a result, i b and i c are strongly affected by the fault in phase a [see Fig. 7(b) and (c)]. In the presence of the machine back EMF, the system becomes more unbalanced and nonlinear. Thus, the electromagnetic torque contains repetitive dips and ripples, as shown in Fig. 7(f). Consequently, the speed ripple is quite high due to the bad torque [Fig. 7(e)]. To evaluate the speed-control performance of the system, three error measures are examined: maximum error E max , mean error E me , and root-mean-square (rms) error E rms .Inthe case of Fig. 7(e), E me =4.86 r/min, and E rms =8.08 r/min. The largest absolute speed error is E max =20r/min, which is 10% of the operating speed. Fig. 7(g) shows a partial zoom of i a for 75 ms after the fault, which is equal to one fundamental period of the current. The fault time is about 5.6 ms, which agrees with the analysis in Section III. The real zero-current duration is just slightly smaller than 5.6 ms, since the discharge time of current from its initial value to zero is very small for the motor under test. The system operation using the proposed fault detection and fault-tolerant switching strategy is shown in Fig. 8. After the fault occurs at 0.1 s, the system determines that current i a satisfies the first checking condition (i a =0for 30 consecutive sampling intervals). The proposed two-stage fault-detection mechanism is performed to identify the exact location of the open switch. This phenomenon can be seen more clearly from the partial zoom of i a in Fig. 8(g). Immediately after the successful fault detection, the proposed fault-tolerant switching strategy is engaged to counteract the fault, pulling the current i a back to its desired trajectory. It can be seen from Fig. 8(a)–(c) that the effect of open-circuit fault is eliminated with the proposed fault-tolerant switching technique. All of the three- phase output currents become more balanced and are very close to their desired sinusoidal waveforms after time t =0.1 s. As a result, the torque response becomes much better, as shown in Fig. 8(f). The speed response is shown in Fig. 8(e), with errors E me =0.28 r/min and E rms =2.28 r/min. The largest absolute speed error in steady state after the fault is E max =4r/min, which is 2% of the operating speed. Table VI summarizes the maximum, mean, and rms errors for the two experiments. Units in the table are percentage of nominal speed. B. Current Harmonics The harmonic analysis is introduced in addition to the torque and speed analyses to further reveal the impact of the fault, as well as the efficacy of the proposed solution. Fig. 9(a) shows the harmonic spectrum of i a after the fault occurs with no remedial solution. The fundamental frequency for an eight- pole PMSM operating at 200 r/min is 13.33 Hz. Since the fault happens in every source period, the 60-Hz harmonic is exceptionally large; its amplitude is about 50% of the fun- damental amplitude. In addition, the spectrum contains many other higher order harmonic components. The total harmonic distortion, therefore, is expected to be very high. Such phenom- enon contributes to the overheating of the motor winding, as well as electromagnetic interference. The current discharges to the clamp circuit every source period, imposing more stress on the clamp circuit capacitor, and thus requires more attention in clamp circuit design. The uncompensated speed ripple is not 252 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO. 1, JANUARY 2012 TABLE V S WITCHING RULES FOR ALL SINGLE OPEN-SWITCH FAULTS excessively large, but the sudden drop or high deviation within a period of the torque can be harmful for the mechanical load coupled to the motor. Therefore, some action should be engaged to stop the system as soon as possible for safety concerns. Fig. 9(b) shows the harmonic spectrum of i a after the fault occurs with the proposed solution. The fundamental component of 13.33 Hz becomes bigger, outweighing the impact of other harmonics. The 60-Hz harmonic i s considerably reduced to about 17% of the fundamental harmonic. Furthermore, other higher order harmonics are significantly attenuated. Thus, the quality of the current and the torque produced are much improved. C. Load Disturbance Rejection, Step Response, and Trajectory Tracking Fig. 10 shows the disturbance rejection response to an addi- tional 3-N · m load. It can be observed that the proposed fault- tolerant switching strategy can also maintain some disturbance rejection capability; the dip of speed and the recovery time were almost the same as in the normal operation. Fig. 11 shows the speed transient (step) response of the drive system, for (a) the case of normal operation and (b) faulty operation under the proposed fault-tolerant control method. This test was taken under a no-load condition. The results show that the proposed fault-tolerant solution can successfully start up the drive system. This feature is noteworthy if the system is stopped after fault detection, but has to be restarted. Without the proposed fault-tolerant switching strategy, the imbalance of the system might prevent the system from starting, and the abnormal behavior is predicted to be very serious, particularly when the torque command is large during the start-up period. For these reasons, an experiment of faulty step response without remedial action is not carried out in this work. Fig. 12(a) and (b) shows the triangular speed reference track- ing ability. The waveforms show that the drive system tracks a varying reference, even under a fault condition. The fault- tolerant switching strategy can still produce a proper dynamic torque when operating under transient conditions. In summary, all of the experimental results show that the proposed online fault-detection method and postfault switching strategy can operate correctly and effectively. The experimental results also validate the theoretical analysis. VI. D ISCUSSION This study has been primarily concerned on the open-circuit fault of a single ac switch within the matrix converter system, subject to the constraint of having neither redundant hard- ware devices nor any hardware reconfiguration action. How- ever, the merit of this work is recognizable. The experimental fault-detection method and fault-tolerant switching strategy NGUYEN-DUY et al.: IMPROVEMENT OF MATRIX CONVERTER DRIVE RELIABILITY 253 Fig. 7. Operation from normal mode to a fault without a remedial solution. Output currents (a) i a ,(b)i b ,and(c)i c ; (d) inverter-stage switching logic of output phase a; (e) motor speed response; (f) estimated electromagnetic torque; and (g) partial zoom of i a during a fault. Fig. 8. Operation from normal mode to a fault with online fault detection and the proposed switching strategy. Output currents (a) i a ,(b)i b ,and(c)i c ; (d) inverter-stage switching logic of output phase a; (e) motor speed response; (f) estimated electromagnetic torque; and (g) partial zoom of i a during a fault. [...]... in matrix converters,” in Proc IEEE IEMDC, Miami, FL, May 2009, pp 165–170 [32] S M A Cruz, M Ferreira, A M S Mendes, and A J M Cardoso, “Modulated error voltages for the diagnosis of faults in matrix converters,” in Proc IEEE ECCE, San Jose, CA, Sep 2009, pp 2263–2270 [33] S M A Cruz, M Ferreira, A M S Mendes, and A J M Cardoso, “Analysis and diagnosis of open-circuit faults in matrix converters,” IEEE. .. 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Chokhawala, J Catt, and L Kiraly, A discussion on IGBT shortcircuit behavior and fault protection schemes,” IEEE Trans Ind Appl., vol 31, no 2, pp 256–263, Mar./Apr 1995 [24] B A Welchko, T A Lipo, T M Jahns, and S E Schulz, Fault tolerant three-phase ac motor drive topologies: A comparison of features, cost, and limitations,” IEEE Trans Power Electron., vol 19, no 4, pp 1108–1116, Jul 2004 [25] S Kwak... threephase matrix converter with input power factor correction,” IEEE Trans Ind Appl., vol 31, no 6, pp 1234–1246, Nov./Dec 1995 [28] C Klumpner, F Blaabjerg, I Boldea, and P Nielsen, “New modulation method for matrix converters,” IEEE Trans Ind Appl., vol 42, no 3, pp 797–806, May/Jun 2006 [29] D Casadei, G Serra, A Tani, and L Zarri, Matrix converter modulation strategies: A new general approach based... been also presented In summary, a fully software-based fault- tolerant method requiring no redundant hardware devices has been proposed and demonstrated to provide an effective and economical solution for the case of an open-switch -fault issue in matrix converter drive systems This work can be complementary to other works in the research literature that address the short-circuit fault Fig 12 Triangular... and O Simon, Matrix converter commutation strategies with and without explicit input voltage sign measurement,” IEEE Trans Ind Electron., vol 49, no 2, pp 407–414, Apr 2002 [4] R Teichmann and J Oyama, “ARCP soft -switching technique in matrix converters,” IEEE Trans Ind Electron., vol 49, no 2, pp 353–361, Apr 2002 [5] F Bradaschia, M C Cavalcanti, F A S Neves, and H E P de Souza, A modulation technique... space-vector representation of the switch state,” IEEE Trans Ind Electron., vol 49, no 2, pp 370– 381, Apr 2002 [30] S M Cruz, M Ferreira, and A J M Cardoso, “Output error voltages A first method to detect and locate faults in matrix converters,” in Proc 34th IEEE IECON, Orlando, FL, Nov 2008, pp 1319–1325 [31] S M Cruz, M Ferreira, and A J M Cardoso, A new method for the detection and location of faults... fault- tolerant control problem in a matrix converter drive system without the help of any redundant devices Moreover, the experimental evaluation is on a practical adjustable speed drive system Experimental results prove the feasibility of the proposed fault- detection method and its related fault- tolerant switching strategy Discussion on how to improve the performance with the proposed switching strategy has... 1981, and the Ph.D degree in electrical engineering from the University of Illinois, Urbana, in 1989 He was a Visiting Professor at National Taiwan University of Science and Technology, Taipei, Taiwan, in 2009–2010 He is currently a Professor with the Department of Electrical and Computer Engineering, Auburn University, Auburn, AL Dr Hung has received several awards for his teaching and research activities,... motor drives, and the application of control theories to these fields, specifically in active power filters, matrix converters, and improvement of power quality Tian-Hua Liu (S’85–M’89–SM’99) was born in Tao Yuan, Taiwan, on November 26, 1953 He received the B.S., M.S., and Ph.D degrees in electrical engineering from National Taiwan University of Science and Technology, Taipei, Taiwan, in 1980, 1982, and . 244 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO. 1, JANUARY 2012 Improvement of Matrix Converter Drive Reliability by Online Fault Detection and a Fault- Tolerant Switching Strategy Khiem. shorted-switch fault. An open-circuit fault might also occur in an output winding. For the fault detection and protection against faults of an insulated-gate bipolar transistor, there are two main approaches IEEE NGUYEN-DUY et al.: IMPROVEMENT OF MATRIX CONVERTER DRIVE RELIABILITY 245 like the current and voltage in the presence of a fault are analyzed to derive an algorithm to detect the fault location [15]–[19]. Most