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Lecture – Timers Reading: Chapter 8: Timers Topics to Cover… MSP430 Timers in general Watchdog Timer Timer_A Lecture - Timers Objectives Upon the completion of this lecture, students will be able to: Program MSP430’s Watchdog Timer and Timer_A Lecture - I/O Ports MSP430 Timers in general Most modern microcontrollers provide a range of timers and the MSP430 is no exception All devices contain two types of timer and some have five Each type of timer module works in essentially the same way in all devices Timer_A is identical in almost all MSP430s, for instance, except that a few have a different number of capture/compare channels Lecture - Timers Types of Timers Watchdog timer: Included in all devices (newer ones have the enhanced watchdog timer+) Its main function is to protect the system against malfunctions but it can instead be used as an interval timer if this protection is not needed Basic timer1: Present in the MSP430x4xx family only It provides the clock for the LCD and acts as an interval timer Newer devices have the LCD_A controller, which contains its own clock generator and frees the basic timer from this task Real-time clock: In which the basic timer has been extended to provide a real-time clock in the most recent MSP430x4xx devices Lecture - Timers Timers Timer_A: Provided in all devices It typically has three channels Timer_A can handle external inputs and outputs directly to measure frequency, time-stamp inputs, and drive outputs at precisely specified times, either once or periodically There are internal connections to other modules so that it can measure the duration of a signal from the comparator, for instance It can also generate interrupts Timer_B: Included in larger devices of all families It is similar to Timer_A with some extensions that make it more suitable for driving outputs such as pulse-width modulation Against this, it lacks a feature of sampling inputs in Timer_A that is useful in communication Lecture - Timers Timers Applications of Timers System timing is fundamental for real-time applications The main applications of timers are to: generate events of fixed time-period allow periodic wakeup from sleep count transitional signal edges replace delay loops allowing the CPU to sleep between operations, consuming less power debounce mechanical devices real-time clocks control simulations measure rates Pulse Width Modulation Lecture - Timers Timers Timers Lecture - Timers MSP430: Watchdog Timer Watchdog Timer General The primary function of the watchdog-timer module (WDT) is to perform a controlled-system restart after a software problem occurs If the selected time interval expires, a system reset is generated If the watchdog function is not needed in an application, the module can work as an interval timer, to generate an interrupt after the selected time interval Features of the Watchdog Timer include: Eight software-selectable time intervals Two operating modes: as watchdog or interval timer Expiration of the time interval in watchdog mode, which generates a system reset; or in timer mode, which generates an interrupt request Safeguards which ensure that writing to the WDT control register is only possible using a password Support of ultralow-power using the hold mode Watchdog/Timer two functions: SW Watchdog Mode Interval Timer Mode Lecture - Timers 10 Watchdog Timer-Examples How to select timer mode /* WDT is clocked by fACLK (assumed 32Khz) */ WDTCL=WDT_ADLY_250; // WDT 250MS/4 INTERVAL TIMER IE1 |=WDTIE; // ENABLE WDT INTERRUPT How to stop watchdog timer WDTCTL=WDTPW + WDTHOLD ; // stop watchdog timer Assembly programming WDT_key WDTStop WDT250 equ mov mov 5A00h ; Key to access WDT #(WDT_Key+80h),&WDTCTL ; Hold Watchdog #(WDT_Key+1Dh),&WDTCTL ; WDT, 250ms Interval Lecture - Timers 17 Watchdog Example: Watchdog Clock ms (@1 MHz SMCLK) #include SMCLK WDT_CTL WDT_CPS "msp430.h" equ 1200000 equ WDT_MDLY_8 equ SMCLK/8000 ; 1.2 Mhz clock ; WDT SMCLK, ms (@1 Mhz) ; WD clocks / second count RESET: mov.w mov.w mov.w bis.b bis.b bis.w ; ; ; ; ; ; loop: ;> jmp loop #0x280,SP #WDT_CTL,&WDTCTL #WDT_CPS,&WDTSecCnt #WDTIE,&IE1 #0x01,&P1DIR #GIE,SR initialize stack pointer set WD timer interval initialize sec WD counter enable WDT interrupt P1.0 output enable interrupts ; loop indefinitely Enable WD Interrupts ; Watchdog ISR -WDT_ISR: dec.w &WDTSecCnt ; decrement counter, 0? jne WDT_02 ; n mov.w #WDT_CPS,&WDTSecCnt ; y, re-initialize counter xor.b #0x01,&P1OUT ; toggle P1.0 WDT_02: reti ; return from interrupt ; Interrupt Vectors - Watchdog ISR Lecture - Timers 18 MSP430: Timer_A Timer_A This is the most versatile, general-purpose timer in the MSP430 and is included in all devices There are two main parts to the hardware: Timer block: The core, based on the 16-bit register TAR There is a choice of sources for the clock, whose frequency can be divided down (prescaled) The timer block has no output but a flag TAIFG is raised when the counter returns to Capture/compare channels: In which most events occur, each of which is based on a register TACCRn They all work in the same way with the important exception of TACCR0 Lecture - Timers 20 Timers Timer_A Clock Source 16-bit Timer Timer_A is a 16-bit timer/counter with four operating modes and three/five Interrupt capture/compare registers: • Capture external signals • Compare PWM mode • SCCI latch for asynchronous communication Compare Register Lecture - Timers Compare Output 21 Timer_A MSP430 16-bit counter with operating modes Selectable and configurable clock source Three (or five) independently configurable capture/compare registers with configurable inputs Three (or five) individually configurable output modules with output modes multiple, simultaneous, timings; multiple capture/compares; multiple output waveforms such as PWM signals; and any combination of these Interrupt capabilities each capture/compare block individually configurable CPE 323 22 Timers Timer_A Registers Description Interrupt Vector Table Timer_B (Not available in F2013) Timer_A Watchdog Timer+ Program Code 0xFFFF 0xFFC0 0xFFBF 0x8000 Capture/compare register Capture/compare register Capture/compare register Timer_B register Capture/compare control Capture/compare control Capture/compare control Timer_B control Timer_B interrupt vector TBCCR2 TBCCR1 TBCCR0 TBR TBCCTL2 TBCCTL1 TBCCTL0 TBCTL TBIV 0x0196 0x0194 0x0192 0x0190 0x0186 0x0184 0x0182 0x0180 0x011E Capture/compare register Capture/compare register Capture/compare register Timer_A register Capture/compare control Capture/compare control Capture/compare control Timer_A control Timer_A interrupt vector TACCR2 TACCR1 TACCR0 TAR TACCTL2 TACCTL1 TACCTL0 TACTL TAIV 0x0176 0x0174 0x0172 0x0170 0x0166 0x0164 0x0162 0x0160 0x012E 16-bit Peripherals Modules 0x01FF 0x0100 8-bit Peripherals Modules 0x00FF 0x0010 WD Control WDTCTL 0x0120 8-bit Special Function Registers 0x000F 0x0000 Stack Lecture - Timers 0x05FF 0x0200 23 Timers TxCTL Control Register 15 14 13 12 11 10 (Used only by Timer_B) Bit TxSSELx IDx MCx - TxCLR TxIE TxIFG Description 9-8 TxSSELx Timer_x clock source: 0 0 ⇒ TxCLK 0 1 ⇒ ACLK 1 0 ⇒ SMCLK 1 1 ⇒ INCLK 7-6 IDx Clock signal divider: 0 0 ⇒ / 0 1 ⇒ / 1 0 ⇒ / 1 1 ⇒ / 5-4 MCx Clock timer operating mode: 0 0 ⇒ Stop mode 0 1 ⇒ Up mode 1 0 ⇒ Continuous mode 1 1 ⇒ Up/down mode TxCLR Timer_x clear when TxCLR = 1 TxIE Timer_x interrupt enable when TxIE = TxIFG Timer_x interrupt pending when TxIFG = Lecture - Timers 24 Timer_A Counting Modes UP/DOWN Mode Stop/Halt Mode Timer is halted with the next +CLK Timer counts between and TACCR0 and 0FFFFh UP/DOWN Mode CCR0 0h UP Mode Continuous Mode Timer counts between and TACCR0 Timer continuously counts up 0FFFFh Continuous Mode 0FFFFh TACCR0 0h 0h CPE 323 25 Blinky Example Example: Interrupts w/Timer_A TASSEL_2 = SMCLK #include TA_CTL TA_FREQ MC_1 = UP Mode "msp430.h“ ; MSP430 equ TASSEL_2+ID_3+MC_1+TAIE equ 0xffff ; 000000 10 11 01 000 = SMCLK,/8,UP,IE ; clocks Enable Interrupt ID_3 = /8 ; -; beginning of executable code RESET: mov.w #0x0280,SP ; init stack pointer mov.w #WDTPW+WDTHOLD,&WDTCTL ; stop WDT bis.b #0x01,&P1DIR ; set P1.0 as output Put the clr.w &TAR ; reset timerA processor to mov.w #TA_CTL,&TACTL ; set timerA control reg sleep! mov.w #TA_FREQ,&TACCR0 ; set interval (frequency) bis.w #LPM0+GIE,SR ; enter LPM0 w/interrupts jmp $ TA_isr: bic.w xor.b reti #TAIFG,&TACTL #0x01,&P1OUT ; timer A ISR ; acknowledge interrupt ; toggle P1.0 Put its hand down ; -; Interrupt Vectors … Timer A ISR Lecture - Timers 26 Blinky Example How to Speed Up the Blink? Change the processor speed ; MSP430 Clock - Set DCO to MHz: mov.b #CALBC1_8MHZ,&BCSCTL1 mov.b #CALDCO_8MHZ,&DCOCTL Change the Timer_A frequency TA_FREQ 0x7fff Change Timer_A clock signal divide ; TA_CTL equ equ SMCLK /1 UP IE TASSEL_2+ID_0+MC_1+TAIE What happens if the Timer_A ISR doesn’t acknowledge the interrupt? bic.w #TAIFG,&TACTL ; acknowledge interrupt Lecture - Timers 27 Pulse Width Modulation Pulse Width Modulation (PWM) Pulse width modulation (PWM) is used to control analog circuits with a processor's digital outputs PWM is a technique of digitally encoding analog signal levels The duty cycle of a square wave is modulated to encode a specific analog signal level The PWM signal is still digital because, at any given instant of time, the full DC supply is either fully on or fully off The voltage or current source is supplied to the analog load by means of a repeating series of on and off pulses Given a sufficient bandwidth, any analog value can be encoded with PWM Lecture - Timers 28 Pulse Width Modulation PWM Machines Lecture - Timers 29 Pulse Width Modulation PWM – Frequency/Duty Cycle Frequency Duty Cycle Time Lecture - Timers 30 LED Intensity Example : PWM w/Timer_A #include SMCLK TA_CTL TA_FREQ "msp430.h" equ 1200000 ; 1200000 clocks / second equ TASSEL_2+ID_0+MC_1+TAIE ; SMCLK, /1, UP, IE equ 120 ; FREQ / SMCLK = 0.0001 = 100 us Timer A Setup RESET: mov.w mov.w bis.b clr.w mov.w mov.w bis.w jmp TA_isr: bic.w #TAIFG,&TACTL inc.w &cnt cmp.w #10,&cnt jlo TA_isr2 clr.w &cnt bis.b #0x01,&P1OUT jmp TA_isr4 TA_isr2: bic.b TA_isr4: reti #0x0280,SP #WDTPW+WDTHOLD,&WDTCTL #0x01,&P1DIR &TAR #TA_CTL,&TACTL #TA_FREQ,&TACCR0 #LPM0+GIE,SR $ #0x01,&P1OUT ; ; ; ; ; ; ; ; init stack pointer stop watchdog set P1.0 as output reset timerA set timerA control reg set interval (frequency) enter LPM0 w/interrupts will never get here! ; acknowledge interrupt ; ; ; ; time to pulse? n y, reset counter turn on Enter Low-power Mode and enable interrupts ; turn off ; return from interrupt Timer A ISR Lecture - Timers 31