Kĩ thuật vi xử lý Digital Logic
Digital Logic Review B A Digital Logic The Transistor History of the Transistor Around 1945, Bell Labs scientists discovered that silicon was comprised of two distinct regions differentiated by the way in which they favored current flow The area that favored positive current flow they named "p" and the area that favored negative current flow they named "n" The transistor effect describes the change from a condition of conductivity (switched “on”, full current flow) to a condition of insulation (switched “off”, no current flow) Digital Logic The Transistor Digital Logic Circuits Computers = large number of simple structures Intel 4004 = 2,300 transistors Intel Pentium = 42 million transistors Intel Core Duo = 291 million transistors Intel i7 “Bloomfield” = 731 million transistors Digital Logic The Transistor Moore’s Law 2010’s 2000’s 1990’s 1980’s 1970’s 1960’s 1950’s 1947 Early 1900’s Moore’s Law: The number of transistors per area doubles every 1.5 - years Digital Logic The Transistor The MOS Transistor A transistor acts like a switch Conducts current when "ON" No current flow when "OFF" N-type Transistor gate Complementar y current flow current flow gate P-type Transistor Gate (input) FET (output) Gate (input) FET (output) GND (0) Open GND (0) Closed Vcc (3.3v) Closed Vcc (3.3v) Open MOS = metal-oxide semiconductor CMOS = complementary MOS with both N and P transistors Digital Logic The Transistor Field Effect Transistor N Type P Type C B E B E C C E B E B C Digital Logic The Transistor CMOS Gates Complementary pull-up / pull-down logic pull-down is " ON" when pull-up is "OFF " and vise versa Pull-up Structure (P-Type) Source Complementary Pull-down Structure (N-Type) The “C” in CMOS Even in the digital world, "EVERYTHING IS ANALOG"! Digital Logic Digital Logic Devices The Inverter 1 on off in out 1 on 0 In out 1 off This is a truth-table It tells what the output will be for all combinations of the inputs Symbols are abstractions! Digital Logic Inverter Symbols Digital Logic Devices The NOR Gate (NOT-OR) 1 a b a on b on NOR on off 0 a b NOR 0 1 0 1 off off on off 0 0 NOR Symbols Digital Logic Digital Logic Devices The OR Gate How you build an OR gate? a a b OR 0 OR b OR Symbol Digital Logic a b OR 0 0 1 1 1 10 Finite State Machine State Diagram Our lock example has four different states, labeled A-D: 30 25 A: The lock is not open, and no relevant operations have been performed B: The lock is not open, and the user has completed the R-13 operation C: The lock is not open, and the user has completed R-13, followed by L-22 D: The lock is open 20 15 10 Sequential - Success depends on the sequence of values (e.g, R-13, L-22, R-3) Open = State Diagram shows states and actions that cause a transition between states Open = Open = Digital Logic Open = 47 Finite State Machine Finite State Machine A description of a system with the following components: A finite number of states A finite number of external inputs A finite number of external outputs An explicit specification of all state transitions Often described by a state diagram Inputs trigger state transitions Outputs are associated with each state (or with each transition) Frequently, a clock circuit triggers transition from one state to the next "1" "0" time→ One Cycle At the beginning of each clock cycle, the state machine makes a transition, based on the current state and the external (or internal) inputs Digital Logic 48 Finite State Machine FSM Implementation Combinational logic Determine outputs and next state Storage elements Maintains state representation State Machine Inputs Clock Combinational Logic Circuit Storage Elements Digital Logic Outputs Finite State Machine Storage: Master-Slave Flipflop A pair of gated D-latches isolates next state from current state During 1st phase (clock=1), previously-computed state becomes current state and is sent to the logic circuit During 2nd phase (clock=0), next state, computed by logic circuit, is stored in Latch A Digital Logic Finite State Machine Storage: Master-Slave Flipflop “1” “0” time→ HOLD SET/RESET Digital Logic Finite State Machine Storage: Master-Slave Flipflop “1” “0” time→ HOLD SET/RESET Digital Logic Finite State Machine Simple FSM Example Combinational Logic “1” “0” time→ Digital Logic 53 Finite State Machine Simple FSM Example Combinational Logic Sequential Logic Digital Logic 54 Finite State Machine Storage Elements Each master-slave flip flop stores one state bit The number of storage elements (flip flops) needed is determined by the number of states (and the representation of each state) Examples: Sequential lock states – bits Basketball scoreboard bits for each score, bits for minutes, bits for seconds, bit for possession arrow, bit for half, … Blinking traffic sign states – bits Digital Logic Finite State Machine Finite State Machine Example A blinking traffic sign No lights on & on 1, 2, 3, & on 1, 2, 3, 4, & on DANGER MOVE RIGHT Repeat as long as switch is turned on Digital Logic Finite State Machine Traffic Sign State Diagram Switch ON Transition on each clock cycle State bit S1 Switch OFF State bit S0 Outputs Digital Logic Finite State Machine Traffic Sign Truth Tables Next State: S1'S0' (depend on state and input) Outputs (depend only on state: S1S0) Switch In S1 X 1 1 1 Lights and S0 S1' S0' X 1 0 1 Whenever In=0, next state is 00 1 Lights and Light S1 S0 Z 0 0 1 1 1 Digital Logic Y 0 1 X 0 58 Finite State Machine Traffic Sign Logic Digital Logic Finite State Machine From Logic to Data Path The data path of a computer uses logic to process information Combinational Logic Decoders convert instructions into control signals Multiplexers select inputs and outputs ALU (Arithmetic and Logic Unit) operations on data Sequential Logic State machine coordinate control signals and data movement Registers and latches storage elements Digital Logic Finite State Machine MSP430 Finite State Machine DECODE:NOCLK:MOV||EVSRC EVDST:CLK1:MOV,Rd|D,ROX=Rd|STORE EVSRC:CLK1:MOV,Rs|S,ROX=Rs|EVDST STORE:CLK1:MOV,Rd|ALU,RWE,RIX=Rd| FETCH Digital Logic ... AND b b a AND Symbol Digital Logic a b AND 0 0 1 0 1 12 Digital Logic Devices Complementary Logic Which of these examples is an +3.3 inverter? IN Digital Logic OUT 13 Digital Logic Devices Drivers... Symbol Digital Logic a b OR 0 0 1 1 1 10 Digital Logic Devices The NAND Gate (NOT-AND) 1 1 1 off off on off NAND b 1 on a a b NAND 0 1 1 1 on on off 0 NAND Symbols Digital Logic Digital Logic. .. abstractions! Digital Logic Inverter Symbols Digital Logic Devices The NOR Gate (NOT-OR) 1 a b a on b on NOR on off 0 a b NOR 0 1 0 1 off off on off 0 0 NOR Symbols Digital Logic Digital Logic Devices