Design Rules for Digital Circuits

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3 Layout Planning and Design

4.2 Design Rules for Digital Circuits

Until recently, the only task printed circuit boards were expected to perform was to provide electrical connectivity between various components and the conductors had to be of sufficient cross-sectional area to tolerate the necessary current without excessive over-heating. The conductor separation was so arranged that it should prevent voltage breakdown. The widespread use of digital integrated circuits has now resulted in devices with extremely fast switching speeds and rise times.

Electromagnetic wave propagation characteristics have become important and need to be considered carefully. Under these circumstances, the printed circuit boards may act as transmission lines if the rise or fall time of the driving device is less than twice the propagation delay.

It is essential to understand that it is the rise/fall time that is critical and not the operating frequency.

Design Considerations for Special Circuits 163

However, the frequency is dependent on rise/fall times, since the lower the value of the rise/fall time, the faster the operating frequency of the device. Under these situations, the transmission line effects become applicable and knowledge of the electrical characteristics associated with the conductors acting as transmission lines is essential. Then, the characteristic impedance must be matched to that of the receiving device to prevent reflection.

4.2.1 Transmission Lines

In order to understand the concept of transmission lines, consider a long straight wire or trace with its return wire or trace nearby. The wire has some inductance along its length. There is also some capacitive coupling between the wire and its return. Figure 4.10 shows what is commonly called a lumpedmodel of the wire pair, because the capacitors and inductors are shown as lumped components.

In reality, the inductance and capacitance are spread continuously along the wires. In concept, the wire is infinitely long and the figure only shows an infinitely small part of the total length.

C L/2

Fig. 4.10 Transmission line: made up of an infinitely long network of capacitors and inductors

If these wires are infinitely long, it is obvious that there will be no reflection at all from its far end. Also, if the wires are absolutely uniform, even then there will be no reflections. Therefore, one way to avoid reflections is to use an infinitely long, absolutely uniform wire or trace pair. Such a wire or trace pair has been given the special name Transmission Line (Brooks, 2002).

If we look into the front of this wire pair, there is input impedance which can be mathematically calculated. It is represented by a symbol Zo, and is called the intrinsic or characteristic impedance of the line. By calculating the lumped values of inductance (L) and capacitance (C), the impedance would be then calculated as:

Zo= L C/

Referring to Figure 4.11, let us take the infinitely long transmission line and break it into two parts. If we look at the second part, it also looks like an infinitely long transmission line with an impedance of Zo. It thus turns out that a transmission line of finite length, terminated in its characteristic impedance Zo looks like an infinitely long transmission line. Therefore, even though it has a finite length, it will still have no reflections as all the energy traveling down the line is exactly absorbed or dissipated in the termination and there is no energy left to reflect back and no reflection to worry about.

Z0

Fig. 4.11 Termination of an infinitely long transmission line to its characteristic impedance, oz

It is exactly this technique which is used to control reflections on PCB. It is required to make the traces look like transmission lines and to terminate them in their characteristic impedance Zo. Certain types of transmission lines are commonly encountered. The coaxial cable leading to the cable TV is a 70 ohm transmission line. The 10 base 2 coax cable for networking is a 50 ohm transmission line.

From the above, it is clear that PCB traces can take on the characteristic of transmission lines.

The point at which this happens (the critical length) is usually defined as when “the two-way delay of the line is more than the rise time of the pulse”. For example, the critical length is approximately 3" for a signal with a 1ns rise time in FR4.

The characteristic impedance of a transmission line is a function of its geometry. In PCB applications, it is a function of several variables, two of which are the width of the line and the height of the line above the plane. If the signal trace length is greater than the critical length, and if there is no claim for the trace to reference to, it is likely that there could be no control over Zo, no way to terminate the trace, and therefore, no way to control reflections. The reflections which are likely to occur in such cases can cause noise voltages and false signals that will cause the circuit to fail.

4.2.2 Problems in Design of PCBs for Digital Circuits

High frequency performance of printed circuit boards is becoming increasingly important in digital circuits and knowledge of electrical characteristics associated with conductors acting as transmission lines is essential (Jeffery, 1997). The main problems that can affect digital PCBs, if they are not properly designed; are:

a Reflections (causing signal delays and double pulsing, i.e. conversion of one pulse into two or more pulses);

a Cross-talk (interference between neighbouring signal lines);

a Ground and supply signal noise; and

a Electromagnetic interference from pulse type electromagnetic fields.

4.2.2.1 Reflections

Digital circuits are characterized by fast rise and fall times. Consequently, the conductors on the PCB cannot be considered as short-circuits, but as pieces of transmission lines. These transmission lines are normally mismatched with respect to source or load impedance, resulting in multiple reflections. These reflections have a deteriorating effect on the circuit performance which can be in the form of signal delays, and even double-pulsing, i.e. conversion of one pulse into two pulses.

Therefore, the important point to consider while designing a digital circuit PCB is that signal conductors should have the proper value of wave impedance Zo, so that its value gives the least reflection problems.

Design Considerations for Special Circuits 165

The desired value of the wave impedance can be obtained by properly choosing the width of the signal lines as well as the distance between signal lines and the ground line. A relatively large value of wave impedance is needed for designing TTL and CMOS logic circuits, which can be obtained from thin signal conductors. On the other hand, ECL circuits require broader signal conductors. It is important that reflections are kept small even if the digital circuit has a low operating frequency in order to avoid double-pulsing.

TTL Integrated Circuits A basic digital circuit in which two gates are connected over a signal line with a wave impedance Z is shown in Figure 4.12. The wave impedance values plotted for a typical PCB are shown in Figure 4.13.

To be avoided (do not fan out from sending end)

Sending gate Receiving gate

e (t)2

e (t)1

Z

Fig. 4.12 Sending gate driving a receiving gate over a transmission line in a TTL circuit

150

100

50

00 1 2 3 4 5 w

b Z[ ]W

w wb b Recommendation: Supply lines

Signal lines

≥ ê 0.4

5 w

b

Fig. 4.13 Wave impedance Z for PCB conductors

The wave impedance desirable for TTL integrated circuit conductors has been found to range from 100 W to 150 W. This value can be obtained by having conductor width of 0.5 to 1.0 mm. The

use of broad signal conductors which may result in a wave impedance of 50 W or less should be avoided in TTL circuits, as the IC may be damaged due to large negative voltage spikes.

Also, very high impedance lines ( ≥ 200 W) should also be avoided as they may cause trouble in the form of harmful over-voltages and double-pulsing. Although very high impedance lines are not common in PCB layouts, they could occur with loose-ended open wiring. Therefore, it should be ensured that loose wiring is avoided and signal line connections between PCBs should always run near the ground line and preferably be twisted with the latter.

CMOS Integrated Circuits The wave impedance required for CMOS integrated circuit conductors is 150-300 W. This large value of wave impedance can be obtained by keeping the signal conductor width as low as possible. Normally signal conductors with £0.5 mm width will have a wave impedance of 150 W to 300 W. So, avoid broad PCB conductors for the signal lines of CMOS circuits. Also, CMOS is not so critical with regards to cross-talk and ground and supply line noise and therefore does not require broad ground and supply conductors. In the wiring between PCBs, 50 W cables should be avoided. Also, for the wave impedance Zo to remain high, the ground should not run too near the signal lines.

ECL Integrated Circuits: The wave impedance required for ECL integrated circuit signal conductors is 50 W-100 W. The wave impedance required for ECL integrated circuits is less as compared to TTL and CMOS integrated circuits. This small value of wave impedance can be obtained from broad conductors. The conductor width recommended for ECL integrated circuits is 1-3 mm.

Even with such wave impedances, reflections are likely to occur, which affect their performance especially at the rising edge wherein a lot of additional delay is caused; which is generally not acceptable for ECL circuits. So external circuit elements in the form of line driver/line receiver integrated circuits are used in ECL systems, which, at least, provide partial matching of the impedance.

4.2.2.2 Cross-talk

Cross-talk is nothing but interference of two neighbouring signals. If two signal conductors run parallel to each other for a length that exceeds roughly 10 cm (for ECL), 20 cm (for TTL) and 50 cm (for CMOS), it will induce a short spike or even a train of pulses on the neighbouring conductor. It is obvious that in the case of CMOS, cross-talk is much less dangerous because of the higher noise immunity of the CMOS family. On the other hand, ECL has a lower noise immunity and will be more sensitive to cross-talk than TTL.

In order to understand the basics of cross-talk, consider the trace A-B shown in Figure 4.14. Let us assume that a pulse is travelling down the line from

A to B and is now at the point “X”. There is a nearby trace, C-D. A signal may couple between A-B and C-D traces at the point X. It is likely that some capacitive coupling, though small, develops between the two traces. Since parallel traces look like a transformer, there is probably some inductive coupling between the traces also. In most PCB

C D

A x B

S + SC L SC–SL

Victim Line

Driven Line

Fig. 4.14 A signal on the driven line, A-B, at point X couples a noise signal on the“ victim” line, C-D, at the same point

Design Considerations for Special Circuits 167

1 1 + ( / )DH2

H

H D

2 2+ 2

Trace 1 Trace 2

H H

D

Plane

applications, however, the material between the traces is probably a very good insulator, so there is probably no resistive coupling between the traces. Since capacitive and inductive effects are reduced with distance, any coupling reduces as the separation between the traces increases. Therefore, greater separation between traces is recommended to reduce cross-talk, (Scaminaci Jr., 1994).

It may be noted that the coupling between the traces A-B and C-D takes place only in the case of ac phenomenon and not with steady state dc signal. For an ac signal, the coupling will be greater for higher frequency or frequency components of the harmonics of the signal. So, to reduce cross-talk, lower frequency harmonics and slower rise times are recommended. The effects of coupling can be summarized as follows (Brooks 1997a):

a Mutual Capacity Coupling—a signal SC caused by capacity coupling between the two traces, which travels along the victim trace in both the forward and backward direction with the same polarity.

a Mutual Inductive Coupling—a signal SL caused by inductive coupling between the two traces, which travels along the victim trace in both the forward and backward direction with opposite polarity.

a Directionality—Cross-talk goes in both the forward and backward directions. Mutual capacitive and inductive forward cross-talk are approximately equal and opposite and tend to cancel. They are approximately equal and reinforcing in the reverse direction, and therefore tend to be additive.

a Magnitude—Forward cross-talk tends to look like the driven signal, and (at least in theory) continues to grow larger, the longer the coupled length A-B (and C-D). Reverse cross-talk tends to have a rectangular shape (in response to a step function) that reaches a maximum and then does not increase further regardless of the coupled length.

a Environment—If the two traces are contained within a homogeneous material, the inductive and capacitive forward cross-talk components are almost exactly equal and cancel. Therefore, we generally don’t worry about forward cross-talk in such environments. If the surrounding material is NOT homogeneous, the inductive component tends to be larger than the capacitive component. Therefore, to reduce cross-talk, the sensitive traces should be kept in the strip line environment (traces contained within a homogeneous material).

For keeping the cross-talk low, the wave impedance between the signal conductors and ground should be low. Obviously, a close-by ground plate will definitely cut down cross-talk significantly.

In more critical cases of TTL and ECL circuits, cross-talk problems can be solved by running a ground line between the two signal lines and maintaining proper wave impedance.

In high speed circuits, the cross-talk problem between parallel traces becomes

acute. In Figure 4.15, cross-talk is proportional Fig. 4.15 Typical cross-talk configuration

toH2/(H2 + D2), where H is the distance between the trace and the plane, and D is the separation between traces. Intuitively, cross-talk diminishes as the separation between traces increases. But, all other things being equal, cross-talk will decrease as the distance between the trace and the plane decreases. So, planes are helpful in reducing and controlling cross-talk (Brooks, 1997b).

If the parallel traces are at different heights, the term H2 really becomes the product of the two heights. As shown in Figure 4.16, the equation for cross-talk for this configuration becomes 1/1+(D2 / H1¥H2).

Estimating cross-talk can often be difficult. The approach given depends on several simplifying assumptions and can lead to results that are closed but not necessarily precise. A practical approach is to calibrate the technique by applying it to boards that have been designed in the past and are known to be either good or bad with respect to cross-talk performance. That will provide insight into how future boards will perform based on these calculations.

4.2.2.3 Ground and Supply Line Noise

The main effects of the supply and ground signal are current spikes in the ground line. These current spikes will create transmission problems when digital ICs start switching. Internal and external current spikes are superimposed and must be carried by the same VCC (supply) and ground lines. If many similar gates or flip-flops are connected to the same point, the current spikes will become excessive and the situation becomes worse.

This is a serious problem with TTL and in reduced form in ECL circuits; and in a highly reduced form in CMOS circuits. A designer should adhere to the following design rules while designing ground and supply line conductors in PCB design:

i. The wave impedance between supply and ground lines should be low, of the order of 20 W or lower. This will stabilize the voltage difference between Vcc and ground. This can be obtained by having broad supply and ground conductors sitting right across each other on opposite sides of a double-sided PCB. The ideal conductor width for supply and ground lines is 5 to 10 mm.

ii. An electro-magnetically highly stable ground conductor can be obtained by providing a large copper surface for ground. This is achieved by having a full ground board in case of multi- layer boards or leaving the copper in all unused parts of the PCB such as corners, etc., and connecting it to ground. The large copper area will make it difficult for ground to move up with a voltage spike. Alternatively, a closely knit grid of broad ground conductors is ideal for a digital PCB.

iii. Always avoid using the same ground lines for digital circuits and for sensitive analog circuits, because a digital ground line always has some ground noise, which may be in the range of millivolts.

1 1 + (D2/H1*H2) Plane

H1

H2 D

Trace 2 Trace 1

Fig. 4.16 Typical cross-talk configuration with different trace heights

Design Considerations for Special Circuits 169

iv. Use de-coupling capacitors in the power supply line: for every 2 to 3 TTL ICs, de-coupling capacitors of 10 nF are normally used whereas for C-MOS and ECL, 5 nF capacitors are usually employed. It is preferable to use ceramic chip capacitors and not electrolytic capacitors for de-coupling purposes.

The above rules must be followed strictly for TTL PCBs because the current spikes are very high in these digital circuits. Therefore, a large ground surface is absolutely essential in such cases.

However, in C-MOS circuits, narrower ground lines are acceptable.

4.2.2.4 Electromagnetic Interference from Pulsed Noise

Electromagnetic radiation that adversely affects circuit performance is generally termed EMI, or electromagnetic interference. Normally digital electronic equipments are well shielded to avoid electromagnetic interference. Shielding is the use of conductive materials to reduce radiated EMI by reflection and/or absorption. Shielding can be applied to different areas of the electronic package, from equipment enclosures to individual circuit boards or devices. However, some interference may still get into the digital system, for one reason or other. A very common effect is that the mains and supply cables are infected with very high frequency pulse type noise due to electromechanical switches, commutators, motors, etc. This pulse type noise is carried into the casing by the mains cable and disturbs the whole system, influencing both the power supply and signal conductors.

These problems can be solved by providing an EMI filter at the mains supply side. Robinson (1990) explains the types of shielding required to protect electronic equipment against electromagnetic and radio-frequency interference.

The use of polymer thick film for cost-effective EMC protection on PCBs for automotive applications, wherein EMC requirements are quite stringent, is described by Saltzberg et al. (1996).

Markstein (1995) explains the theory of shielding and the shielding products available in the market to implement EMI protection for devices, PCBs and systems.

However, in the case of TTL and any other faster logic family, it is often difficult to filter all disturbances by shielding and the mains filter. Therefore, if TTL is used in a high EMI noise environment, it is essential to keep the distance between the logical signal lines and the ground line small. This means that the signal lines and the ground should be run close to each other on the PCBs and also when interconnecting PCBs.

As CMOS is much less sensitive to disturbances than TTL, it is therefore not usually necessary to keep the signal lines so close to a ground line. However, CMOS ICs get easily destroyed by over- voltages, and special protection circuits or measures, especially against electrostatic voltages are called for.

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