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9 Adaptive Computing IC Technology for 3G Software- Defined Mobile Devices Paul Master and Bob Plunkett QuickSilver Technology Practical implementation of software defined radio (SDR) for mobile wireless devices will place significantly increased demands on design approaches and integrated circuit (IC) tech- nology. Next generation wireless terminals, third generation (3G) and beyond, are required to provide much higher levels of features, functions, and services than their second generation (2G) counterparts. Examples include such capabilities as higher throughput, multiband, multimode, multimedia, and location-based services. This demand for new capabilities is occurring simultaneously with the demand for portability driving key physical requirements of long battery life, small size, light weight, etc. Combined, all these issues add to the design challenge of next generation devices. Wireless terminals are quickly approaching a point in the product development roadmap that, without a paradigm shift in the basic IC design architecture, they will not be able to meet these demanding consumer requirements. The ideal design solution would be to take advantage of the processing efficiencies of an application specific integrated circuit (ASIC), i.e. high processing power, low power consumption, while retaining the flexibility of a digital signal processor (DSP). This is the very essence of a new class of IC based on adaptive computing technology, described in this chapter. A comparison of adaptive computing architecture to that of conventional, fixed- function IC technologies – ASICs, DSPs, microprocessors (mP), and field programmable gate arrays (FPGAs) – is presented, showing performance improvements of an order of magnitude to be easily achievable. 9.1 Software Defined Radio – A Solution for Mobile Devices The case for application of SDR for mobile devices has been well made in the literature [1,2]. Wireless, mobile devices present numerous opposing requirements including low power Software Defined Radio Edited by Walter Tuttlebee Copyright q 2002 John Wiley & Sons, Ltd ISBNs: 0-470-84318-7 (Hardback); 0-470-84600-3 (Electronic) consumption, low cost, high performance, small silicon area, and minimum weight that create significant challenges to the design engineering team. In addition, the design problem is further complicated by the multitude of radio frequency (RF) and wireless communications standards requirements. SDR has been proposed as an implementation solution that can effectively address these conflicting requirements. This chapter focuses on the computational requirements driven by the plethora of commu- nication standards and applications, leaving discussion of the RF challenges to other chapters of this book. 9.1.1 Evolution of Wireless Standards A summary of current worldwide wireless standards by region is derived from published reports [3,4] and appears together with projected standards in Figure 9.1. It is expected that the analog and early digital standards will eventually disappear as 2.5G and 3G digital standards grow in market share. As a result, it is clear that configurability of the baseband processing section of the radio will become a necessary design requirement for maintaining a common hardware implementation in order to reduce manufacturing and development costs. The wireless network infrastructure is also undergoing changes that directly affect wireless devices. At present, the 2G wireless standards include TIA/EIA-95, GSM, TIA/EIA-136, and PDC, all with very low data rate delivery of typically 14 kb/s or below. For each standard, there is a different set of infrastructure base stations and a different set of mobile terminals. In Europe, some older 1G legacy systems still exist but the predominant standard today is GSM. The carriers in Europe have plans to deploy 1 the higher data rate GSM-HSCSD, GSM- GPRS, GSM-EDGE standards, as well as WCDMA (UMTS-2000). In Japan, the older Software Defined Radio: Enabling Technologies258 Figure 9.1 Current wireless standards 1 Indeed, GSM-GPRS and GSM-HSCSD systems are already operational in Europe at the time of writing, late 2001. standards of Pacific digital cellular (PDC) and personal handyphone system (PHS) have been utilized for a number of years. More recently, TIA/EIA-95B has been deployed, providing data rates up to 64 kb/s. Recently, 64 kb/s operation is also being provided over PHS. Higher rate services based on cdma2000 and W-CDMA are currently being deployed. 2 The United States is evolving from TIA/EIA-136, GSM, and TIA/EIA-95 to TIA/EIA-136 EDGE, GSM/ GPRS, GSM/EDGE, UMTS-2000 W-CDMA, and cdma2000. However, the road from TIA/ EIA-136 appears unclear with both major operators of TIA/EIA-136 making commitments to a GSM/W-CDMA evolution path. Each of the new higher speed services is meant to deliver advanced applications, such as MPEG-4 streaming video, two-way video, advanced location services, and interactive gaming. Upgrades of these new network overlays are expensive but can be implemented over a relatively short time frame because they typically consist of additional equipment, as opposed to a network change out. In addition, the newer technologies such as W-CDMA and cdma2000 offer greater spectral efficiencies, providing incentive for operators to upgrade, in a capacity-limited environment. However, a problem arises with such network upgrades because of the varying life spans of mobile devices, typically running at 9–18 months, and with many handsets remaining active in the market for as long as 5–6 years. Clearly it is difficult to transition quickly and completely to new network technologies when millions of wireless customers already have devices that are not upgradeable and that are operating under earlier standards. Another issue is the computational intensity demanded by newer air interface standards. Figure 9.2 shows the development of current systems and predicts the processing require- ments for future wireless communications networks. Data rates in terms of kb/s and Mb/s are Adaptive Computing IC Technology for 3G SDRs 259 2 DoCoMo, for example, launched their commercial WCDMA service called ‘FOMA’ on October 1, 2001. Figure 9.2 Processing requirements of wireless systems shown along the bottom of the chart; overlaying the chart is a line showing the processing requirements in millions of operations per second (MOPS) associated with the various tech- nologies. 2G standards enable data capabilities from 9.6 to 14.4 kb/s. As demand for higher data rates emerged in the mid-1990s, 2.5G standards evolved that were enabled by multislot, multi- channel data, and enhanced modulation schemes. GSM, for example, is now being enhanced through GPRS and EDGE. GPRS allows data rates up to 170 kb/s and TIA/EIA-95B supports rates up to 64 kb/s, although both air interfaces do so at significant cost to network capacity. GSM-enhanced GPRS at 384 kb/s requires an extremely high 2500 millions of instructions per second (MIPS) of processing power, with some estimates approaching over 5800 MIPS [5]. This puts enormous burden on baseband processors. EDGE promises to allow GSM operators to use the existing GSM bands to offer wireless multimedia internet protocol (IP) based services and applications at a rate of 384 kb/s, with a bit rate of 48 kb/s per time slot, and up to 69.2 kb/s per time slot under good RF conditions. EDGE satisfies the IMT-2000 bit rates of 144 kb/s for high speed vehicular movement, 384 kb/s for pedestrian and low speed vehicular movement, and 2 Mb/s for indoor wideband. In addition to the current conventional communication standards, additional communica- tions capability is required in the latest mobile handsets in the form of GPS and Bluetooth support. GPS is key to not only meeting the E911 location regulatory requirements in the United States, but it is also the primary enabler of location services, expected to be a key source of revenue in the wireless Internet. It is also foreseeable that an operator would require a wireless phone capable of operating in a variety of standards, with additional capabilities such as compatibility with the IEEE 802.11 wireless LAN standard. Driven by the desire to increase competition in the marketplace and to meet operators’ demands for greater capacity, governments around the world have been allocating additional spectrum for mobile telecommunications applications. Despite half-hearted attempts to harmonize spectrum, the result is a patchwork of allocations between 400 MHz and 3.5 GHz. The result is that the ‘worldphone’ can potentially be required to operate over at least five different frequency bands, plus GPS and Bluetooth frequencies. Future wireless technologies will cause handsets to become extremely complex, placing even higher demands on the baseband processing section of the handset. Additionally, while communications represent a large part of the load placed on the signal processing elements of a mobile terminal, the application space, over time, will begin to dominate the total processing demands. Video processing, image compression, and other high-end applications will heavily burden current terminal processing elements because they will need to process highly compressed data delivered over the air interface. 9.1.2 Market Forces Driving SDR for Wireless Devices 3 The rapid and constant evolution of individual wireless standards is another issue that opera- tors and wireless device manufacturers have to manage. Examples of this evolution are evident in the history of the GSM standard. Within the 10-year period from 1990 to 2000, Software Defined Radio: Enabling Technologies260 3 For a more comprehensive treatment of this topic see Ralston, J., ‘A market perspective – SDR as the dominant design’ in Software Defined Radio: Origins, Drivers and International Perspectives, Tuttlebee, W., (Ed.), John Wiley & Sons, Chichester, 2002, Chapter 4. the GSM standard underwent several significant revisions, with much of this taking place during deployment [6]. As operators grapple with what features and services to offer their customers, they must also deal with support for the corresponding wireless standards. This presents the additional problem of deploying several versions of a standard simultaneously, because not all customers will desire an upgrade to the new services. It is also not economic- ally feasible to physically replace every handset in the field each time new services are offered. SDR-based wireless devices present the operator with a great many more options for managing the complex issues associated with evolving standards. For example, a handset with an SDR-enabled baseband implementation could potentially evolve from IS-95A to TIA/EIA-95B, and on to cdma2000 without the need to change hardware. SDR in the RF section could allow new bands to be added, enabling the operator to better manage congestion on the network. SDR in both the baseband and the RF could permit a mobile terminal to be agile across frequency bands as well as across air interface standards. This final element allows an operator to add a frequency band and/or a new air interface based on business needs, as opposed to being limited to a subset of options controlled by technology imple- mented in a rigid design in the wireless device. SDR enables the radio to configure to the needs of the operator, while presenting a seam- less upgrade path to their customers [7]. In addition, because there are so many unknowns during radio design and development, the manufacturers stand to reap significant benefits in economies of scale and reduced design ‘turns’ by adopting SDR as the fundamental approach for wireless device implementation. 9.2 The Mobile Application Space and the Need for Processing Power One metric that has long been used to measure computational power is MIPS. This metric has also been unflatteringly referred to as a ‘meaningless interpretation of processor speed’ because instructions associated with different types of computers perform operations with different levels of complexity. For example, one machine may execute its instructions faster but may take three instructions to perform the same operation as a single instruction on a slower machine. For this reason the term MOPS has emerged. Data rates for mobile wireless devices are increasing almost exponentially, as is the algorithmic complexity of the tasks to be performed. The result is more processing requirements, thus more operations per second being performed on the data. 9.2.1 Processing Needs of the 3G Air Interface 3G wireless devices are intended to support stationary data rates (e.g. an office environment) up to 2 Mbps. By comparison, moving wireless devices (e.g. walking or in an automobile) incur additional overhead due to the greater distances and the need to operate in a fading environment. In this case, the IMT-2000 requirement is 384 kbps. Furthermore, MOPS requirements are a function of the data rate and are affected by the speed of the user. If your wireless device is capable of performing more MOPS, it has the potential to perform complex tasks, such as adaptive modulation that can provide higher bandwidths while moving. The MOPS values shown in Figure 9.2 reflect a user in an automobile in which the IMT-2000 requirement is 144 kb/s. Adaptive Computing IC Technology for 3G SDRs 261 The high spectrum efficiency (number of bits/MHz) supported by the emerging mobile standards has severe implications on the computational power required in both the wireless device and the network infrastructure. For example, in W-CDMA, three algorithms used to gain higher spectrum utilization are matched filter, blind MMSE, and exact decorrelator. Each one of these has extremely high computational requirements. For instance, 124 multi- plications are required to perform matched filter using an 8-bit word length; 496 to perform blind MMSE using a 12-bit word length; and 230,000 multiplications for exact decorrelator using 16-bit word length. These higher computational power algorithms, as well as others in 3G, bring the total MOPS requirements for 3G to roughly 11,000 MOPS. This is more than 10 times as many computations as required by the 2G GSM standard. 9.2.2 Processing Needs of Mobile Vocoders Among the major issues facing wireless system designers is the variety of vocoder protocols and related algorithms. In the wireless domain, there are currently four types of vocoders: qualcomm code-excited linear predictive (QCELP), enhanced variable bit rate code (EVRC), CDMA selectable mode (SMV), and the adaptive multirate (a suite of codecs). In addition to the variety of vocoders traditionally used over the air interface, the transition to IP networks will encourage the use of the wide variety of voice over internet protocol (VoIP) vocoders. The International Telecommunications Union (ITU) recommendations for wireline voice encoding standards for VoIP usage include the 729, 729a, 729e, 728, 726, and 711. A summary of these standards, vocoders, and required bit rates is shown in Table 9.1. The computational intensity required by each of these codecs or vocoders is significantly increasing with each new version, and as a result, each wireline and wireless VoIP vocoder is expected to double and triple its computational requirements, respectively. Also, sophisti- cated techniques, such as active noise suppression, echo cancellation, and error recovery, are being added to these vocoders, requiring additional computational resources. Table 9.2 summarizes processing requirements for some currently available VoIP algorithm implemen- tations. Software Defined Radio: Enabling Technologies262 Table 9.1 Vocoding standards Speech codec Bit rate (kbps) Standard QCELP 8.0 IS-95 EVRC Variable IS-95 ACELP 13.0 IS-95 VSELP 8.0 IS-136 GSM FR 13.0 GSM GSM EFR 12.2 GSM AMR Variable 3G GSM HR 5.6 GSM JVSELP 8.0 PDC 9.2.3 Processing Needs of Mobile Video Two applications of keen interest for 3G are video streaming and two-way video, which also stress the capabilities of a mobile, wireless terminal to the limit. The MPEG-4 standard, with its high compression ratios and great flexibility, is currently the favored candidate for video services in the near term. It provides a good basis for discussion about how the spectrum efficiency demands of the air interface conflict with the requirement for low power consump- tion in the wireless terminal. MPEG-4 is an object-based standard with audio/visual scenes being composed from differ- ent scaleable objects. A major feature of MPEG-4 is profiles and levels that do not define the complexity per individual MPEG-4 object but rather provide bounds on the total of all objects in the scene. A profile defines the set of specific tools that can be used in a certain MPEG-4 terminal. There are audio, visual, graphics, scene description, and object descriptor profiles. A level is a specification of the constraints and performance criteria on these profiles and, thus, on the corresponding tools. In MPEG-4, profiles can contain more than one object, and each object can be of a different nature. Therefore, the concept of an object type is introduced as an intermediate level of definition between tools and profiles. Object types define the tools needed to create an object in a scene and how these tools can best be combined. Media profiles define the kinds of audio and visual objects that the MPEG-4 terminal needs to decode and, hence, give a list of admissible elementary stream types. Media profiles describe the object types used to create a scene and the tools. Visual profiles use visual object types, with five different object types used, to represent natural video information. These are simple, simple scalable, core, main, and N-bit. Adaptive Computing IC Technology for 3G SDRs 263 Table 9.2 VoIP algorithm processing requirements Algorithm Processor MIPS Company G.729 Motorola Encoder 21.00 Analogical DSP56000/56300 Decoder 3.00 Family Full Duplex 24.00 G.729A Hitachi SH-DSP Encoder 12.94 Analogical Family Decoder 3.03 Full Duplex 15.97 G.729A ADSP-2181 Encoder 8.70 Vocal Decoder 2.10 Full Duplex 10.80 G.723.1 Hitachi SH-DSP Family Full Duplex 27.10 Analogical G.723.1 ADSP-2100 Series Encoder 17.43 Analogical Decoder 2.01 Full Duplex 19.44 G.723.1 Motorola DSP56300 Encoder 19.70 Analogical Decoder 2.20 Full Duplex 21.90 G.723.1 TMS320C6201 Full Duplex 8MCPS Radisys The simple object type is an error resilient, rectangular natural video object of arbitrary height/width ratio developed for low bit rates. It uses simple and inexpensive coding tools based on intra (I) and predicted (P) video object planes (VOPs), the MPEG-4 terms for frames. The simple scalable object type is a scalable extension of simple which gives temporal and spatial scalability, using simple as the base layer. The core object type uses a tool superset of simple, giving better quality through the use of bi-directional interpolation (B-VOPs), and it has binary shape. It supports scalability based on sending extra P-VOPs. The binary shape can include a constant transparency but excludes the variable transparency offered by grayscale shape coding. The main object type is the video object, which gives the highest quality. Compared to core, it also supports scale-scale shape, sprites, and interlaced content in addition to progres- sive material. Finally, the N-bit object type is equal to the core object type, but it can vary the pixel depth from 4 to 12 bits for the luminance, as well as the chrominance planes. Figure 9.3 shows MPEG-4 video profiles with the simple profile being the least complex of all profiles, moving upward to main as the most complex and compute intensive. There are many more profiles and levels between simple and main. But for illustration purposes, the main profile at level 3 (L3) corresponds to standard definition TV. Main profile at L4 requires 21 times as much processing as the simple profile, 23 times as much memory, and 26 times as much bandwidth. As a baseline, a 160 £ 160 pixel, full color, 15 fps, encode and decode session (e.g. a mobile video teleconferencing application) requires over 1.3 billion operations per second (BOPS) of a conventional DSP. This figure was derived from the computational requirements for a 176 £ 144-size display [8]. As a reference point, a 160 £ 160-screen size is considered to be the low end range for PDAs because sizes of 320 £ 220 pixels are appearing in newer PDAs. Table 9.3 shows a breakdown of the computational complexity for a rectangular video stream of QCIF size. Software Defined Radio: Enabling Technologies264 Figure 9.3 MPEG-4 video profiles Table 9.3 Computational complexity for a rectangular video stream of QCIF size p Total for the arithmetic operations only The high computational power and design complexity dictates to the system engineer a choice of either placing a fixed-function silicon (FFS) IP core on the die or using a very high powered RISC/DSP array. The disadvantages, respectively, are that the FFS core is most often obsolete at design time, and the RISC/DSP array consumes large amounts of power and silicon real estate. Additionally, the approximate 13 MPEG-4 profiles are expanding to over 20 within the next 18–24 months. The majority of current generation MPEG-4 implementations use only one profile, with the latest announced IP cores now implementing only two. The decision about which to implement is critical, and the correct subset will not be known until mass deployments begin to occur. The high processing rates of MPEG4, combined with a rapidly changing environment and the uncertainty associated with future market demands, makes development of low power devices extremely challenging. 9.3 SDR Baseband Processing – The Implementation Dilemma It is apparent from the preceding discussion that the computational requirements needed in an SDR-based 3G wireless device are very significant. When these are added to the other requirements of multiple standards support and application processing, the resultant compu- tational power is staggering. Based on the MOPS that must be performed and the basic power dissipation equation, P a CfV 2 (where C ¼ capacitance, f ¼ frequency, and V ¼ voltage), system engineers are faced with difficult decisions about which IC technology to employ. Conventional IC tech- nologies, such as ASICs, DSPs, FPGAs, and microprocessors, all have trade-offs and limita- tions. For example, placing algorithms in a DSP provides flexibility but at the cost of higher power dissipation; placing algorithms in fixed function silicon (e.g. an ASIC) lowers the power dissipation but at the cost of flexibility. The following is a more detailed discussion of the trade-offs for conventional SDR hardware implementation approaches. 9.3.1 Limitations of Conventional IC Technologies The baseband processing in a wireless device today typically comprises three computational elements physically fabricated on one or more conventional semiconductor components, described as follows. Adaptive Computing IC Technology for 3G SDRs 265 9.3.1.1 General Purpose Processor This main control processor, typically a RISC chip, is responsible for supporting the user interface, running user applications, such as a web browser; managing external connectivity; and handling the protocol stacks of the air interface. This processor is designed to support only the most basic applications and is poor at digital signal processing and even worse at low level wireless functions, such as channel decoding. For example, a typical RISC processor in a wireless terminal runs at 10–70 MHz; however, for a more complicated OS such as Windows CE the RISC processor would need to run at 300 MHz or higher. For advanced applications, such as MPEG-4 decoding, the current generation RISC processors fall far short of the required processing power. 9.3.1.2 Digital Signal Processor (DSP) To supplement the main processor, one or more DSPs may be incorporated for handling the number crunching associated with both user applications and the air interfaces. A DSP provides flexibility in its ability to be reprogrammed, but it is power hungry and never has enough processing power to do all the things the wireless system designer would like to do in software such as Viterbi decoders, channel decoders, and fast Fourier transform. Typically the DSP processor runs at 40 MHz for 2G; 3G might require up to four DSP cores each running at 100 MHz. 9.3.1.3 Application Specific Integrated Circuit (ASIC) When a DSP is ill suited to a problem and/or the power budget is exceeded, the developer has little choice but to implement some components of the design in an ASIC. While the ASIC is very fast and consumes little power, it generally can only be fully tested as a finished IC. Moreover, it is effectively obsolete at design time because of the long design, build, and test cycle. By the time the product has reached the market, it can be expected that both the air interface and the application space will have evolved beyond what the designer was able to build in when first specifying the ASIC material. In addition, because each function that is implemented in ASIC material adds to the die size, a direct cost in the silicon is incurred. In this conventional design approach, DSPs and ASICs bear the brunt of the computational requirement. At a very early stage, the designer must consider the trade-offs in choosing what goes into the DSP and what goes into the ASIC. Typically the designer will allocate as many tasks to the DSP as possible, taking advantage of its cost effectiveness and flexibility. However, the processing power of a DSP is no match for that of an ASIC. Architecturally, a typical DSP is only capable of supporting a limited subset of the signal processing function space, giving the designer little choice but to implement certain functions, e.g. Viterbi decoding and CDMA despreading, in an ASIC. Because an ASIC has much lower power consumption than a DSP for a given function, allocating tasks to an ASIC has the potential to prolong battery life. However, implementing designs in an ASIC precludes changes later in the design cycle and any errors in the finished design cause significant delays for designing, testing, and processing of new silicon. Errors not corrected early in the design process will have significant impact on product performance, IC cost, the time it takes to correct defi- ciencies in the final product, and time to market. Software Defined Radio: Enabling Technologies266 [...]... satellite networks Bluetooth 3 Software defined radio 4 Ad hoc peer to peer networking The common factor in the above options is the concept of SDR A new air interface will utilize SDR techniques to manage the issue of backward compatibility and to facilitate transitions An IP-based core network, enabling seamless services across a variety of inter- 288 Software Defined Radio: Enabling Technologies faces, will... of SDR References [1] ‘SDR Forum Technical Report 2.0’, Software Defined Radio Forum (SDRF), p 2-16 [2] McMahan, M.L., ‘Evolving cellular handset architectures but a continuing insatiable desire for dsp mips’, Texas Instruments Technical Journal, Vol 17, No 1, January–March, 2000 [3] ‘ Forum Technical Report 2.0, Software Defined Radio Forum (SDRF), pp 2-13–2-16 [4] Ojanpera, T and Prasad, R (Eds.), WCDMA:... algorithm originally designed to function with 19bit words of data should be capable of evolving to 25-bit words without impacting the hardware design or modifying the program extensively 272 Software Defined Radio: Enabling Technologies Furthermore, remembering that only a few major algorithmic functions must be active at any particular time, each function should not need to be implemented independently on... set of resources on the matrix to solve a problem When a complex problem requires a series of different configurations to completely solve the problem, the binary file includes both the Software Defined Radio: Enabling Technologies 274 Figure 9.7 High level ACM architecture individual static configurations and the necessary information needed to sequence between the configurations Keeping the size of these... attributes Adaptive Computing IC Technology for 3G SDRs 275 necessary to satisfy the requirements of emerging 3G and future 4G technologies and to address the requirements of real time software defined radio: † † † † † † the ability to efficiently implement algorithms an extremely high level of flexibility high performance low power consumption reduced silicon area low cost The processing techniques needed... functionality and capability for all of the underlying computational elements that make up an adaptive computing platform These tools should be familiar to the largest base of embedded 276 Software Defined Radio: Enabling Technologies system developers – the DSP and RISC programmers – thus eliminating the need to learn how to use hardware development tools Adaptive computing uses a single design language,... more high speed processing The result is that more material needs to be added to the ASIC that tends to sit idle more often, because only subsets of the hardware are needed to enable specific features /radio channels The ideal processor therefore would instantiate only the hardware needed to solve a problem at that point in time and, when done, adapt the hardware to solve an entirely different problem... baseband function of an SDR-based wireless terminal The benchmarks compare the performance (power consumption and processing power) of the ACM against a state-of-the-art dual MAC DSP Software Defined Radio: Enabling Technologies 278 9.7.1 CDMA Rake Receiver A CDMA rake receiver is one of the most critical elements in the performance of a CDMA wireless device It is the computational element responsible... increase processing power by at least a factor of 4 for simpler algorithms (FIR, IIR) However, the code sizes are comparable or smaller for an ACM compared to the DSP Table 9.6 FIR filter code Software Defined Radio: Enabling Technologies 280 Figure 9.9 FIR dataflow graph 9.7.3 Vocoder In this example, the voice encoder portion of a cell phone operating in its traffic (transmit) mode, Figure 9.10, is examined... 5,147,059 7,411,765 3,911,765 5,970,588 5,558,824 28,000,000 DSP Cycles 496,000 1,324,440 1,126,400 432,000 748,250 4,127,050 ASIC 502,300 1,356,050 1,131,850 445,950 749,800 4,185,950 ACM 282 Software Defined Radio: Enabling Technologies Adaptive Computing IC Technology for 3G SDRs 283 Figure 9.11 Vocoder algorithm requirements accommodate our 36-bit data path However, this leaves 48 2 36 ¼ 12 bits that are . Plunkett QuickSilver Technology Practical implementation of software defined radio (SDR) for mobile wireless devices will place significantly increased demands. improvements of an order of magnitude to be easily achievable. 9.1 Software Defined Radio – A Solution for Mobile Devices The case for application of SDR for mobile