5 DDR II 400/533/667 MS-171B1-0A ICS951462 AMD S1 PROCESSOR 638-Pin uFCPGA 638 UNBUFFERED DDR2 FAR 8,9 SODIMM 200-PIN DDR2 SODIMM 4,5,6,7 15 HyperTransport LINK0 SIDE MEMORY DDR2 400MHz IN EXTERNAL CLOCK GENERATOR OUT D UNBUFFERED DDR2 NEAR 8,9 SODIMM 200-PIN DDR2 SODIMM 16x16 ATI NB - RX690T 14 R G B BOOTSTRAPS ROM(DNI) 13 D I2C I/F VGA CONN 16 HyperTransport LINK0 CPU I/F INTEGRATED GRAPHICS LVDS LVDS CONN 16 LVDS/TVOUT/TMDS X1 PCIE INTERFACE X16 PCIE VIDEO/SDVO I/F X4 PCIE I/F WITH SB X1 PCIE I/F 3G PCIE0 TV PCIE1 30 NEW CARD PCIE2 30 PCIE3 24 25 HDMI CONN 16 HDMI RTL8111B 10,11,12,13,14 C C A-LINK X4 NewCard USB#5 USBPORT USB#6 USBPORT USB#8 USBPORT USB#3 USBPORT USB#9 CAMERA BLUETOOTH ATI SB - SB600 USB 2.0 USB 2.0 (10 PORTS) SATA II (4 PORTS) MiniPCI USB#1 USB#2 USB#7 WIRELESS USBPORT USB#4 AZALIA HD AUDIO SPI I/F ATA 66/100/133 I/F SATA CONNECTOR 28 ATA 66/100/133 I/F IDE CONNECTOR LPC I/F ACPI 2.0 INT RTC B BOOTSTRAPS ROM (SB) 21 28 B HW MONITOR I2C I/F PCI/PCI BDGE PCI 17, 18, 19, 20, 21 PCIE0 CARDREADER 22 LPC BUS 30 31 BATTERY CHAGER OZ711 LPC DEBUG WIRELESS PCIE0 AMP & AUDIO 27 CONN AC97 2.3 ATA 66/100/133 USB#0 ALC883/888 AZALIA CODEC 26 HD AUDIO I/F CPU CORE POWER 40 36 SYSTEM MAIN POWER 37 CPU&RS690M HT VLDT POWER 35 CIR 31 CPU MEMORY POWER 38 KBC ENE3910 RS690M CORE POWER 39 CPU FAN 33 A A PS2 SB600 & PCIE POWER 39 DISCHARGE CIRCUIT 37 KBD MOUSE 31 ISA I/F MICRO-STAR INT'L CO.,LTD BIOS Title BLOCK DIAGRAM 31 Document Number Size Custom Rev A MS-171B1 Date: Wednesday, January 24, 2007 Sheet 1 of 50 +3VALW SYSTEM PWR +5VALW VCCFAN1 DTV_3G_PWRON +3VRUN_TV LDO CRT5V EN_MCARD_VCC3# WLAN_PWRON +3VRUN_WL RUND ADD5V RUND_DG OZ2211S-B CAVCC SPEAKER_MUTE# +3V_SPDIF CPPE# +5V_CAMERA PWR_SRC USB5V_A VDDA_EN D D QSOP24 +3VRUN_CARD RUND MAIN POWER +5VRUN +5VSUS BT_RADIO_ON# +5VRUN_BT RT9167/A +VDDA AVDDCK_3V +3.3V_AVDDC PWR SWITCH SUS_ON CLK_VDDA +3SUS ENABLE +3VRUN CLK_VDD AVDD_USB VDDR3 EN_MCARD_VCC3# MCARD_VCC3 CPPE# +2.5VRUN TPS51120RHBR QSOP24 +3VSUS_CARD XTLVDD_ATA AVDD33 +3VRUN VDD33 AVDD18 EVDD18 +1.27VRUN AME8804 DVDD15 SYSTEM PWR PLLVDD_ATA CPU_VTT_SUS LDO LVDS_DIGON +3V_LCD C C VTTEN PWR_SRC ENABLE CPU_M_VREF_SUS MEMORY CPU_VDDIO_SUS ADAPTER&BATTERY PWR SWITCH MEM_M_VREF_SUS VTTEN ENABLE SC486I PWR_SRC VID(0-5) Output Select PWR_SRC CPU CORE CPU_VDD_RUN C P U VDD_EN ENABLE CPPE# B B 1_5_VCC MAX8774GTL+ QSOP24 APL5912 +1_5VRUN_CARD +1_5VRUN AVDDQ PLLVDD +1.8VRUN PWR SWITCH HTPVDD +3VRUN ON/SKIP1 VDD18 PWR_SRC AVDDCK_1.2V NB SB VLDT_EN RUND PWR SWITCH +5VSUS A +1.2VSUS +1.2VRUN +VLDT ON/SKIP2 PLLVDD12 A VDDA12 OZ813LP_QFN24 VDDA18 MICRO-STAR INT'L CO.,LTD +1.2VRUN Title VCC_NB POWER DELIVERY CHART Size Document Number Custom PCIE_VDDR Date: MS-171B1 Wednesday, January 24, 2007 Rev A Sheet of 50 SRCCLKT0 CK1 OSCIN HTREFCLK GFX_CLKN SRCCLKC0 NBSRC_CLKP 100MHZ ATIGCLKC0 NBSRC_CLKN 100MHZ PCICLK0 MEM_MA0_CLK1_N 333MHZ MEM_MA0_CLK1_P 333MHZ MEM_MA0_CLK2_N 333MHZ MEM_MA0_CLK2_P 333MHZ MEM_MB0_CLK1_N 333MHZ MEM_MB0_CLK1_P 333MHZ MEM_MB0_CLK2_N 333MHZ MEM_MB0_CLK2_P 333MHZ MA0_CLK_L1 MA0_CLK_H1 MA0_CLK_L2 MA0_CLK_H2 MB0_CLK_L1 MB0_CLK_H1 MB0_CLK_L2 MB0_CLK_H2 HTTCLK0 C D CK1# CK0 CK0# CK1 ATIGCLKT0 FAR SODIMM CK1# CK0 CK0# NEAR SODIMM SB_CLKP SB_CLKN 100MHZ SBLINK_CLKN D RS690T 100MHZ SBLINK_CLKP GFX_CLKP FS2/REF2 HTREFCLK NB_OSC PCI_CLK0 OZ711 200MHZ 14.318MHZ C 24.576MHZ_SMD5X3.2 14.318MHZ FS1/REF1 SB_OSCIN SRCCLKT1 SBSRC_CLKP 100MHZ PCIE_RCLKP SRCCLKC1 SBSRC_CLKN 100MHZ PCIE_RCLKN 48MHz_0 CLK_48M_USB 14M_OSC AZ_BITCLK CLKIN_H 33MHZ PCI_CLK0 48MHZ 33MHZ AZ_BIT_CLK BIT_CLK ALC883 PIN12 MDC CONN USBCLK CLKIN_L CPUCLK8T0 CPUCLK 200MHZ SRCCLKT2 GPP_CLK0P 100MHZ SRCCLKC2 GPP_CLK0N 100MHZ CPUCLK# 200MHZ AMD CPU REFCLK+ CPUCLK8C0 PCICLK5 PCI_CLK5 33MHZ TP_CLK LCLK MINI-PCIE-CARD KBC PSCLK3 PIN4 TP REFCLK- B B GPP_CLK1P 100MHZ GPP_CLK1N 100MHZ SRCCLKT3 REFCLK+ SRCCLKC3 GPP_CLK2P 100MHZ GPP_CLK2N 100MHZ SRCCLKT4 32.768KHZ12.5P_S-2 NEW CARD 32.768KHZ12.5P_S-2 PIN18 GPP_CLK4P 100MHZ GPP_CLK4N 100MHZ SRCCLKT6 PEX_REFCLK# SRCCLKC6 ROBSON PEX_REFCLK GPP_CLK3P 100MHZ GPP_CLK3N 100MHZ SRCCLKT5 SRCCLKC5 SB600 PIN19 SRCCLKC4 A TV TUNER/3G CARD REFCLK- REFCLK_P RTL8111B A REFCLK_N MICRO-STAR INT'L CO.,LTD CLOCK GENERATOR Title 14.31818MHZ20P_S-2 25MHZ20P_S-2 CLOCK DISTRIBUTION Document Number Size Custom 14.31818MHZ20P_S-2 Date: Rev A MS-171B1 Wednesday, January 24, 2007 Sheet of 50 PROCESSOR HYPERTRANSPORT INTERFACE VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE D +VLDT 1A D U17A D4 D3 D2 D1 VLDT_A3 VLDT_A2 VLDT_A1 VLDT_A0 VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0 AE5 AE4 AE3 AE2 N5 P5 M3 M4 L5 M5 K3 K4 H3 H4 G5 H5 F3 F4 E5 F5 N3 N2 L1 M1 L3 L2 J1 K1 G1 H1 G3 G2 E1 F1 E3 E2 L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0 L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0 T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1 HT_CADOUT15_P 10 HT_CADOUT15_N 10 HT_CADOUT14_P 10 HT_CADOUT14_N 10 HT_CADOUT13_P 10 HT_CADOUT13_N 10 HT_CADOUT12_P 10 HT_CADOUT12_N 10 HT_CADOUT11_P 10 HT_CADOUT11_N 10 HT_CADOUT10_P 10 HT_CADOUT10_N 10 HT_CADOUT9_P 10 HT_CADOUT9_N 10 HT_CADOUT8_P 10 HT_CADOUT8_N 10 HT_CADOUT7_P 10 HT_CADOUT7_N 10 HT_CADOUT6_P 10 HT_CADOUT6_N 10 HT_CADOUT5_P 10 HT_CADOUT5_N 10 HT_CADOUT4_P 10 HT_CADOUT4_N 10 HT_CADOUT3_P 10 HT_CADOUT3_N 10 HT_CADOUT2_P 10 HT_CADOUT2_N 10 HT_CADOUT1_P 10 HT_CADOUT1_N 10 HT_CADOUT0_P 10 HT_CADOUT0_N 10 J5 K5 J3 J2 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 L0_CLKOUT_H0 L0_CLKOUT_L0 Y4 Y3 Y1 W1 HT_CLKOUT1_P HT_CLKOUT1_N HT_CLKOUT0_P HT_CLKOUT0_N 51_0402 HT_CTLIN1_P P3 51_0402 HT_CTLIN1_N P4 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLOUT_H1 L0_CTLOUT_L1 T5 R5 N1 P1 L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLOUT_H0 L0_CTLOUT_L0 R2 R3 C307 4.7u_6V_0603 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 C B +VLDT HT_CADIN15_P HT_CADIN15_N HT_CADIN14_P HT_CADIN14_N HT_CADIN13_P HT_CADIN13_N HT_CADIN12_P HT_CADIN12_N HT_CADIN11_P HT_CADIN11_N HT_CADIN10_P HT_CADIN10_N HT_CADIN9_P HT_CADIN9_N HT_CADIN8_P HT_CADIN8_N HT_CADIN7_P HT_CADIN7_N HT_CADIN6_P HT_CADIN6_N HT_CADIN5_P HT_CADIN5_N HT_CADIN4_P HT_CADIN4_N HT_CADIN3_P HT_CADIN3_N HT_CADIN2_P HT_CADIN2_N HT_CADIN1_P HT_CADIN1_N HT_CADIN0_P HT_CADIN0_N 10 10 10 10 HT_CLKIN1_P HT_CLKIN1_N HT_CLKIN0_P HT_CLKIN0_N R27 R28 A 10 HT_CTLIN0_P 10 HT_CTLIN0_N HT_CPU_CTLOUT1_P HT_CPU_CTLOUT1_N AMD check list 4-24~4-27 +VLDT 0.22u_10V_0402_NC C C378 4.7u_6V_0603 C374 C153 C151 C156 180pF_50v_0402 0.22u_10V_0402 LAYOUT: Place bypass cap on topside of board NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS B 10 10 10 10 HT_CTLOUT0_P 10 HT_CTLOUT0_N 10 MICRO-STAR INT'L CO.,LTD Title SOCKET S1 HT I/F Size Document Number Custom Rev A MS-171B1 Date: C157 4.7u_6v_0603 TP26 TP27 Athlon 64 S1 Processor Socket 180pF_50v_0402_NC Friday, March 30, 2007 Sheet of 50 A A B C D E Processor DDR2 Memory Interface VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE MEM_MB_DATA[63 0] CPU_M_VREF_SUS CPU_VDDIO_SUS CPU_VTT_SUS U17B 1A CPU_VTT_SUS R198 C59 39.2_0402 1% 1n_50v_0402 _NC M_ZN M_ZP R203 39.2_0402 1% PLACE THEM CLOSE TO CPU WITHIN 1" W17 SNS_+0.9VTT AE10 AF10 MEMVREF VTT_SENSE MEMZN MEMZP VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10 8,9 8,9 8,9 8,9 MEM_MA0_CS#3 MEM_MA0_CS#2 MEM_MA0_CS#1 MEM_MA0_CS#0 V19 J22 V22 T19 MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0 MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1 Y16 AA16 E16 F16 MEM_MA0_CLK2_P MEM_MA0_CLK2_N MEM_MA0_CLK1_P MEM_MA0_CLK1_N 8 8 8,9 8,9 8,9 8,9 MEM_MB0_CS#3 MEM_MB0_CS#2 MEM_MB0_CS#1 MEM_MB0_CS#0 Y26 J24 W24 U23 MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0 MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1 AF18 AF17 A17 A18 MEM_MB0_CLK2_P MEM_MB0_CLK2_N MEM_MB0_CLK1_P MEM_MB0_CLK1_N 8 8 H26 J23 J20 J21 MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0 MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0 W23 W26 V20 U19 K19 K20 V24 K24 L20 R19 L19 L22 L21 M19 M20 M24 M22 N22 N21 R21 MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0 MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10 MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0 J25 J26 W25 L23 L25 U25 L24 M26 L26 N23 N24 N25 N26 P24 P26 T24 MEM_MB0_ODT1 8,9 MEM_MB0_ODT0 8,9 MEM_MA0_ODT1 8,9 MEM_MA0_ODT0 8,9 MEM_MB_ADD[15 0] 8,9 K22 R20 T22 MA_BANK2 MA_BANK1 MA_BANK0 MB_BANK2 MB_BANK1 MB_BANK0 K26 T26 U26 MEM_MB_BANK2 8,9 MEM_MB_BANK1 8,9 MEM_MB_BANK0 8,9 T20 U20 U21 MA_RAS_L MA_CAS_L MA_WE_L MB_RAS_L MB_CAS_L MB_WE_L U24 V26 U22 MEM_MB_RAS# 8,9 MEM_MB_CAS# 8,9 MEM_MB_WE# 8,9 8,9 MEM_MB_CKE1 8,9 MEM_MB_CKE0 8,9 MEM_MA_CKE1 8,9 MEM_MA_CKE0 8,9 MEM_MA_ADD[15 0] MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0 Y10 8,9 MEM_MA_BANK2 8,9 MEM_MA_BANK1 8,9 MEM_MA_BANK0 8,9 MEM_MA_RAS# 8,9 MEM_MA_CAS# 8,9 MEM_MA_WE# MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0 DDR II: CMD/CTRL/CLK Athlon 64 S1 Processor Socket MEM_MB_DM[7 0] 8 8 8 8 8 8 8 8 VDD_VREF_SUS_CPU CPU_VDDIO_SUS CPU_M_VREF_SUS MEM_MB0_CLK2_P C309 1.5p_50v_0402 R24 1K_0402 1% MEM_MB0_CLK2_N MEM_MB0_CLK1_P PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH C375 1.5p_50v_0402 R23 C65 C64 U17C MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10 MEM_MB_DATA9 MEM_MB_DATA8 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA1 MEM_MB_DATA0 AD11 AF11 AF14 AE14 Y11 AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24 G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11 MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0 MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0 AD12 AC16 AE22 AB26 E25 A22 B16 A12 MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0 AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26 F26 E26 A24 A23 D16 C16 C12 B12 MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0 MEM_MB_DQS7_P MEM_MB_DQS7_N MEM_MB_DQS6_P MEM_MB_DQS6_N MEM_MB_DQS5_P MEM_MB_DQS5_N MEM_MB_DQS4_P MEM_MB_DQS4_N MEM_MB_DQS3_P MEM_MB_DQS3_N MEM_MB_DQS2_P MEM_MB_DQS2_N MEM_MB_DQS1_P MEM_MB_DQS1_N MEM_MB_DQS0_P MEM_MB_DQS0_N MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10 MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0 AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12 MEM_MA_DATA63 MEM_MA_DATA62 MEM_MA_DATA61 MEM_MA_DATA60 MEM_MA_DATA59 MEM_MA_DATA58 MEM_MA_DATA57 MEM_MA_DATA56 MEM_MA_DATA55 MEM_MA_DATA54 MEM_MA_DATA53 MEM_MA_DATA52 MEM_MA_DATA51 MEM_MA_DATA50 MEM_MA_DATA49 MEM_MA_DATA48 MEM_MA_DATA47 MEM_MA_DATA46 MEM_MA_DATA45 MEM_MA_DATA44 MEM_MA_DATA43 MEM_MA_DATA42 MEM_MA_DATA41 MEM_MA_DATA40 MEM_MA_DATA39 MEM_MA_DATA38 MEM_MA_DATA37 MEM_MA_DATA36 MEM_MA_DATA35 MEM_MA_DATA34 MEM_MA_DATA33 MEM_MA_DATA32 MEM_MA_DATA31 MEM_MA_DATA30 MEM_MA_DATA29 MEM_MA_DATA28 MEM_MA_DATA27 MEM_MA_DATA26 MEM_MA_DATA25 MEM_MA_DATA24 MEM_MA_DATA23 MEM_MA_DATA22 MEM_MA_DATA21 MEM_MA_DATA20 MEM_MA_DATA19 MEM_MA_DATA18 MEM_MA_DATA17 MEM_MA_DATA16 MEM_MA_DATA15 MEM_MA_DATA14 MEM_MA_DATA13 MEM_MA_DATA12 MEM_MA_DATA11 MEM_MA_DATA10 MEM_MA_DATA9 MEM_MA_DATA8 MEM_MA_DATA7 MEM_MA_DATA6 MEM_MA_DATA5 MEM_MA_DATA4 MEM_MA_DATA3 MEM_MA_DATA2 MEM_MA_DATA1 MEM_MA_DATA0 MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0 Y13 AB16 Y19 AC24 F24 E19 C15 E12 MEM_MA_DM7 MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0 MA_DQS_H7 MA_DQS_L7 MA_DQS_H6 MA_DQS_L6 MA_DQS_H5 MA_DQS_L5 MA_DQS_H4 MA_DQS_L4 MA_DQS_H3 MA_DQS_L3 MA_DQS_H2 MA_DQS_L2 MA_DQS_H1 MA_DQS_L1 MA_DQS_H0 MA_DQS_L0 W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13 MEM_MA_DATA[63 0] MEM_MA_DM[7 0] MEM_MA_DQS7_P MEM_MA_DQS7_N MEM_MA_DQS6_P MEM_MA_DQS6_N MEM_MA_DQS5_P MEM_MA_DQS5_N MEM_MA_DQS4_P MEM_MA_DQS4_N MEM_MA_DQS3_P MEM_MA_DQS3_N MEM_MA_DQS2_P MEM_MA_DQS2_N MEM_MA_DQS1_P MEM_MA_DQS1_N MEM_MA_DQS0_P MEM_MA_DQS0_N 8 8 8 8 8 8 8 8 MEM_MB0_CLK1_N DDR: DATA 1nf_50v_0402 1nF_50v_0402 _NC Athlon 64 S1 Processor Socket AMD check list 2-1 1K_0402 1% A1 A26 MEM_MA0_CLK2_P C57 1.5p_50v_0402 MEM_MA0_CLK2_N MEM_MA0_CLK1_P LAYOUT:PLACE CLOSE TO CPU Athlon 64 S1g1 PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH uPGA638 C144 1.5p_50v_0402 Top View MICRO-STAR INT'L CO.,LTD MEM_MA0_CLK1_N Title SOCKET S1 DDR2 MEMORY I/F AF1 Size Document Number Custom Rev A MS-171B1 Date: A B C D Friday, March 30, 2007 Sheet E of 50 +3VRUN +1.8VRUN LAYOUT: ROUTE VDDA TRACE APPROX 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG CPU_VDDIO_SUS 4.7K_0402_NC 0.1u_10v_0402 _NC C382 R250 D 17 SB_CPUPWRGD ATHLON Control and Debug CPU_VDDIO_SUS R191 +3VSUS 10K_0402 10L1000m_50_0402 C135 0.22u_10V_0402 C137 CPU_ALL_PWROK F8 F9 U22 NC7SZ08M5X _NC CPU_HT_RESET# CPU_ALL_PWROK CPU_LDTSTOP# 300_0402_NC CPU_VDDIO_SUS R192 0R_NC R21 21 CPU_SIC_R CPU_SID_R R29 R25 +VLDT 0.1u_10v_0402_NC 44.2_0603 1% 44.2_0603 1% TP24 TP18 U23 NC7SZ08M5X _NC 0R_NC 0R33 +1.8VRUN C386 15 CPUCLK R243 169_0402 1% 0R36 32,35 VDD_PG 21 0R_NC CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L 0R_0402_NC CPU_HT_RESET# R242 TP28 C387 3.9n_50V_0603 15 CPUCLK# 0.1u_10v_0402 _NC C384 CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L CPU_CLKIN_SC_P CPU_CLKIN_SC_N 3.9n_50V_0603 R244 680ohm_0402 CPU_VDDIO_SUS R247 300_0402_NC 35 CPU_VDD_RUN_FB_H 35 CPU_VDD_RUN_FB_L place them to CPU within 1" CPU_LDTSTOP# 21 U24 NC7SZ08M5X _NC 0R_0402 R381 TP31 TP32 TP30 TP33 TP11 CPU_VDDIO_SUS R0402_6 ==> SHORT PAD FOOTPRINT R246 680ohm_0402 8P4R-10K_RN0402 T_CRIT_CPU# CPU_THRM_ALERT6 SMB_THRMCPU_DATA SMB_THRMCPU_CLK CPU_TEST5_THERMDC CPU_TEST4_THERMDA R177 4.7K_0402 B +3VSUS CPU_PH_G R185 10K_0402 +3VRUN RN20 AF4 AF5 VDDA2 VDDA1 CPU_PROCHOT#_1.8 E C RESET_L PWROK LDTSTOP_L VID5 VID4 VID3 VID2 VID1 VID0 SIC SID HT_REF1 HT_REF0 CPU_PRESENT_L F6 E6 VDD_FB_H VDD_FB_L W9 Y9 VDDIO_FB_H VDDIO_FB_L A9 A8 CLKIN_H CLKIN_L G10 DBRDY AA9 AC9 AD9 AF9 TMS TCK TRST_L TDI PSI_L DBREQ_L JTAC CPU_TEST5_THERMDC C377 0.1u_10V_0402 SMB_THRMCPU_CLK D+ SMBDATA SMB_THRMCPU_DATA D- ALERT# GND VDD 32 T_CRIT_CPU# A SMBCLK T_CRIT_A# A5 C6 A6 A4 C5 B5 CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0 AC6 CPU_PRESENT# A3 CPU_PSI# R186 4.7K_0402 _NC D C CPU_THERMTRIP# 18 Q24 CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0 35 35 35 35 35 35 CPU_PSI# 35 E10 CPU_DBREQ# AE9 CPU_TDO C TP9 80.6_0402 1% C9 C8 CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12 TEST29_H TEST29_L TEST24 TEST23 TEST22 TEST21 TEST20 AE7 AD7 AE8 AB8 TEST21 AF7 C3 AA6 W7 W8 Y6 AB6 TEST7 TEST6 THERMDC THERMDA TEST3 TEST2 TEST28_H TEST28_L TEST27 TEST26 TEST10 TEST8 J7 H8 AF8 AE6 TEST26 K8 C4 P20 P19 N20 N19 RSVD0 RSVD1 RSVD2 RSVD3 R26 R25 P22 R22 U21 C379 2200p_50V_0402 TDO R39 ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1" Trace impedance 80ohm RSVD4 RSVD5 RSVD6 RSVD7 TP8 TP10 TP6 TP7 CPU_VDDIO_SUS TEST26 CPU_DBREQ# CPU_TMS CPU_TCK CPU_TRST# CPU_TDI R195 R38 R200 R199 R197 R178 300_0402 510_0402 _NC 510_0402 _NC 510_0402 _NC 510_0402_NC 510_0402_NC RSVD8 RSVD9 H16 B18 RSVD10 RSVD11 B3 C1 RSVD12 RSVD13 RSVD14 H6 G6 D5 CPU_PRESENT# CPU_TEST25_H_BYPASSCLK_H R196 R239 1K_0402 510_0402 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 R24 W18 R23 AA8 H18 H19 CPU_TEST25_L_BYPASSCLK_L TEST18 TEST19 TEST21 R238 R33 R34 R22 510_0402 300_0402 300_0402 300_0402 SB_TALERT# 19 +3VSUS 300_0402 E AF6 CPU_THERMTRIP#_R AC7 CPU_PROCHOT#_1.8 E9 E8 TEST19 G9 TEST18 H10 AA7 C2 D7 E7 F7 C7 AC8 SMBT3904 CPU_TEST4_THERMDA R181 R237 300_0402 SMBT3904 Q23 Cap close to thermal sensor 300_0402 THERMTRIP_L PROCHOT_L 0R_0402_NC R241 B B7 A7 F10 CPU_HTREF1 P6 CPU_HTREF0 R6 C383 12,17 LDT_STOP# 17 LDT_RST# 300_0402 17 CPU_SIC_R 17 CPU_SID_R R248 680ohm_0402 CPU_VDDIO_SUS 300_0402_NC R193 +1.8VRUN C R194 U17D 0R35 R245 300_0402_NC C145 3300p_50V_0402 4.7u_6V_0603 0R_0402 _NC R240 CPU_VDDIO_SUS AMD check list 4-22 L14 CPU_VDDA_2.5_RUN R249 300_0402 _NC maximun 40 ohm +VDDA 1A B B ERRATA#133 SMB_THRMCPU_CLK 31 MISC SMB_THRMCPU_DATA 31 AMD NPT S1 SOCKET Processor Socket CPU_THRM_ALERT- 31 A LM86CIMMXNOPB_MSOP8-RH Close to CPU socket MICRO-STAR INT'L CO.,LTD Title SOCKET S1 CTRL Size Document Number Custom Rev A MS-171B1 Date: Friday, March 30, 2007 Sheet of 50 U17F CPU_VDD_RUN D C AC4 AD2 G4 H2 J9 J11 J13 K6 K10 K12 K14 L4 L7 L9 L11 L13 M2 M6 M8 M10 N7 N9 N11 P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 V6 V8 V10 CPU_VDD_RUN 35A U17E VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25 CPU_VDDIO_SUS 8A POWER A1 Athlon 64 S1 Processor Socket B Athlon 64 S1g1 uPGA638 Top View A26 AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 GROUND BOTTOMSIDE DECOUPLING D CPU_VDD_RUN 22u_6V_0805 C87 C100 22u_6V_0805 C111 C122 22u_6V_0805 22u_6V_0805 C121 22u_6V_0805 C112 22u_6V_0805 C99 C86 22U*9pcs C71 22u_6V_0805 22u_6V_0805 CPU_VDD_RUN 0.22U*2pcs+0.01U*1pcs+190P*1pcs 0.22u_10V_0402 C115 C77 C66 C78 AMD check list 4-16~4-20 180pF_50v_0402 0.22u_10V_0402 0.01u_16V_0402 C DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE CPU_VDDIO_SUS CPU_VDDIO_SUS 22u_6V_0805 C114 22u_6V_0805 C126 C83 0.22u_10V_0402 4.7u_6V_0603 C120 C85 C109 4.7u_6V_0603 C110 C116 0.22u_10V_0402 C75 C94 0.22u_10V_0402 C102 C130 0.01u_16V_0402 C134 180pF_50v_0402 C117 C131 C84 0.22u_10V_0402 4.7u_6V_0603 22U*2pcs+ 0.22u*2pcs 4.7u_6V_0603 0.22u_10V_0402 0.22u_10V_0402 0.01u_16V_0402 180pF_50v_0402 4.7U*4pcs+0.22U*4pcs+0.01U*2pcs+180P*2pcs B AMD Check list 4-1~4-5 4.7U*4pcs+0.22U*4pcs+1N*4pcs+180P*4pcs CPU_VTT_SUS Athlon 64 S1 Processor Socket AF1 22u_6V_0805 C163 4.7u_6V_0603 4.7u_6V_0603 4.7u_6V_0603 0.22u_10V_0402 0.22u_10V_0402 1n_50V_0402 C26 C166 C159 C30 C158 C27 4.7u_6V_0603 C152 0.22u_10V_0402 C34 C161 0.22u_10V_0402 1n_50V_0402 C46 1n_50V_0402 C32 1n_50V_0402 C37 180pF_50v_0402 C150 180pF_50v_0402 C154 180pF_50v_0402 C52 180pF_50v_0402 AMD check list 4-6~4-8,4-11 A A PROCESSOR POWER AND GROUND MICRO-STAR INT'L CO.,LTD Title SOCKET S1 PWR & GND Size B Date: Document Number Rev A MS-171B1 Wednesday, January 24, 2007 Sheet of 50 81 82 87 88 95 96 103 104 111 112 117 118 CPU_VDDIO_SUS C 107 106 85 BA0 BA1 BA2 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 10 26 52 67 130 147 170 185 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 5 5 5 5 MEM_MA_DQS0_P MEM_MA_DQS1_P MEM_MA_DQS2_P MEM_MA_DQS3_P MEM_MA_DQS4_P MEM_MA_DQS5_P MEM_MA_DQS6_P MEM_MA_DQS7_P 13 31 51 70 131 148 169 188 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 5 5 5 5 MEM_MA_DQS0_N MEM_MA_DQS1_N MEM_MA_DQS2_N MEM_MA_DQS3_N MEM_MA_DQS4_N MEM_MA_DQS5_N MEM_MA_DQS6_N MEM_MA_DQS7_N 11 29 49 68 129 146 167 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 MEM_MA0_CLK1_P MEM_MA0_CLK1_N MEM_MA0_CLK2_P MEM_MA0_CLK2_N 30 32 164 166 CK0 CK0 CK1 CK1 5,9 MEM_MA_CKE0 5,9 MEM_MA_CKE1 79 80 CKE0 CKE1 5,9 MEM_MA_RAS# 5,9 MEM_MA_CAS# 5,9 MEM_MA_WE# 5,9 MEM_MA0_CS#0 5,9 MEM_MA0_CS#1 108 113 109 110 115 RAS CAS WE S0 S1 114 119 5,9 MEM_MA0_ODT0 5,9 MEM_MA0_ODT1 B +3VRUN R20 4.7K_0402 15,18 SDATA0 15,18 SCLK0 +3VRUN MEM_M_VREF_SUS CPU_VDDIO_SUS C244 47u_1210 C245 47u_1210 SA0 SA1 195 197 SDA SCL 199 VDDspd VREF 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 NC1 NC2 NC3 NC4 NC/TEST 50 69 83 120 163 GND_PAD1 GND_PAD2 201 202 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 59 60 65 66 71 72 77 78 121 122 127 128 132 A ODT0 ODT1 198 200 17 19 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 J1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63 MEM_MA_DATA[63 0] 5,9 MEM_MB_BANK[2 0] MEM_MB_DM[7 0] A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14/NC A15/NC MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2 107 106 85 BA0 BA1 BA2 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 10 26 52 67 130 147 170 185 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 5 5 5 5 MEM_MB_DQS0_P MEM_MB_DQS1_P MEM_MB_DQS2_P MEM_MB_DQS3_P MEM_MB_DQS4_P MEM_MB_DQS5_P MEM_MB_DQS6_P MEM_MB_DQS7_P 13 31 51 70 131 148 169 188 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 5 5 5 5 MEM_MB_DQS0_N MEM_MB_DQS1_N MEM_MB_DQS2_N MEM_MB_DQS3_N MEM_MB_DQS4_N MEM_MB_DQS5_N MEM_MB_DQS6_N MEM_MB_DQS7_N 11 29 49 68 129 146 167 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 30 32 164 166 CK0 CK0 CK1 CK1 MEM_MB0_CLK1_P MEM_MB0_CLK1_N MEM_MB0_CLK2_P MEM_MB0_CLK2_N 5,9 MEM_MB_CKE0 5,9 MEM_MB_CKE1 79 80 CKE0 CKE1 5,9 MEM_MB_RAS# 5,9 MEM_MB_CAS# 5,9 MEM_MB_WE# 5,9 MEM_MB0_CS#0 5,9 MEM_MB0_CS#1 108 113 109 110 115 RAS CAS WE S0 S1 114 119 ODT0 ODT1 198 200 SA0 SA1 195 197 SDA SCL 199 VDDspd 5,9 MEM_MB0_ODT0 5,9 MEM_MB0_ODT1 0R25 0R24 21 21 15,18 SDATA0 15,18 SCLK0 +3VRUN MEM_MA0_CS#2 5,9 MEM_MA0_CS#3 5,9 MEM_M_VREF_SUS MEM_VREF_SUS CPU_VDDIO_SUS MEM_M_VREF_SUS R48 1K_0402 1% R47 1K_0402 1% C171 0.1u_10V_0402 C170 1n_50v_0402 0R_NC 0R_NC VREF 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 SO-DIMM(RVS) MEM_MA_DM[7 0] A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14/NC A15/NC 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 J2 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 17 19 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 NC1 NC2 NC3 NC4 NC/TEST 50 69 83 120 163 GND_PAD1 GND_PAD2 203 204 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 5,9 MEM_MA_BANK[2 0] 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 SO-DIMM (RVS) D MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 5,9 MEM_MA_ADD[15 0] MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 59 60 65 66 71 72 77 78 121 122 127 128 132 81 82 87 88 95 96 103 104 111 112 117 118 5,9 MEM_MB_ADD[15 0] VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 CPU_VDDIO_SUS MEM_MB_DATA[63 0] MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63 D C MEM_MB0_CS#2 5,9 MEM_MB0_CS#3 5,9 B CPU_VDDIO_SUS C246 47u_1210 C247 47u_1210 DDR2_SODIMM_RVS_H=9.2mm A DDR2_SODIMM_RVS_H=5.2mm MICRO-STAR INT'L CO.,LTD Title LAYOUT: PLACE CLOSE TO DIMMs DDR2 SODIMMS A/B CHANNEL Size Document Number Custom Rev A MS-171B1 Date: Friday, March 30, 2007 Sheet of 50 MEM_MA_ADD[15 0] 5,8 MEM_MA_ADD[15 0] MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0 D MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0 5,8 MEM_MA_CAS# 5,8 MEM_MA_WE# 5,8 MEM_MA_RAS# 5,8 5,8 5,8 5,8 MEM_MA0_CS#0 MEM_MA0_CS#1 MEM_MA0_CS#2 MEM_MA0_CS#3 5,8 MEM_MA0_ODT0 5,8 MEM_MA0_ODT1 5,8 MEM_MA_CKE1 5,8 MEM_MA_CKE0 5,8 MEM_MB_ADD[15 0] MEM_MA0_CS#0 MEM_MA0_CS#1 MEM_MA0_CS#2 MEM_MA0_CS#3 MEM_MA0_ODT0 MEM_MA0_ODT1 MEM_MA_CKE1 MEM_MA_CKE0 5,8 MEM_MB_CAS# 5,8 MEM_MB_WE# 5,8 MEM_MB_RAS# 5,8 5,8 5,8 5,8 CPU_VTT_SUS 1A C79 0.1u_10V_0402 CPU_VDDIO_SUS C97 0.1u_10V_0402 C40 0.1u_10V_0402 CPU_VDDIO_SUS C68 0.1u_10V_0402 C53 0.1u_10V_0402 CPU_VDDIO_SUS C62 0.1u_10V_0402 C63 0.1u_10V_0402 CPU_VDDIO_SUS C82 0.1u_10V_0402 RN16 RN13 C104 0.1u_10V_0402 CPU_VDDIO_SUS 7 8 8 MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_CKE1 MEM_MA0_CS#2 MEM_MA_ADD6 MEM_MA_ADD4 MEM_MA_ADD11 MEM_MA_ADD7 8P4R-47_RN0402 8P4R-47_RN0402 7 MEM_MA_RAS# MEM_MA_BANK1 MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA0_ODT0 MEM_MA0_CS#1 MEM_MA0_CS#0 RN12 RN9 RN4 RN3 D C80 0.1u_10V_0402 C101 0.1u_10V_0402 CPU_VDDIO_SUS C33 0.1u_10V_0402 RN11 C90 0.1u_10V_0402 CPU_VDDIO_SUS C58 0.1u_10V_0402 RN7 C105 0.1u_10V_0402 CPU_VDDIO_SUS C49 0.1u_10V_0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 C CPU_VTT_SUS MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0 MEM_MB_CKE0 MEM_MB0_CS#2 MEM_MB_BANK2 MEM_MB_ADD12 MEM_MB_ADD9 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD3 MEM_MB_ADD5 MEM_MB_ADD1 MEM_MB_BANK0 MEM_MB_WE# MEM_MB0_CS#1 MEM_MB0_ODT1 MEM_MB_CAS# 7 7 8 8 MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0 MEM_MB_ADD11 MEM_MB_ADD14 MEM_MB_ADD15 MEM_MB_CKE1 MEM_MB_ADD0 MEM_MB_ADD2 MEM_MB_ADD6 MEM_MB_ADD4 7 RN15 RN8 MEM_MB_BANK[2 0] 5,8 MEM_MB_BANK[2 0] MEM_MB_ADD[15 0] B A MEM_MA_CAS# MEM_MA_WE# MEM_MA_RAS# 7 7 MEM_MA_BANK[2 0] 5,8 MEM_MA_BANK[2 0] C 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 8P4R-47_RN0402 MEM_MA_CKE0 MEM_MA_ADD12 MEM_MA_BANK2 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD3 MEM_MA_ADD5 MEM_MA_ADD2 MEM_MA_BANK0 MEM_MA_ADD10 MEM_MA_WE# MEM_MA_CAS# MEM_MA_ADD13 MEM_MA0_CS#3 MEM_MA0_ODT1 MEM_MB0_CS#0 MEM_MB0_CS#1 MEM_MB0_CS#2 MEM_MB0_CS#3 5,8 MEM_MB0_ODT0 5,8 MEM_MB0_ODT1 MEM_MB_CAS# MEM_MB_WE# MEM_MB_RAS# 8P4R-47_RN0402 8P4R-47_RN0402 MEM_MB0_CS#0 MEM_MB_RAS# MEM_MB_ADD10 MEM_MB_BANK1 MEM_MB0_CS#3 MEM_MB_ADD13 MEM_MB0_ODT0 MEM_MB0_CS#0 MEM_MB0_CS#1 MEM_MB0_CS#2 MEM_MB0_CS#3 MEM_MB0_ODT0 MEM_MB0_ODT1 RN14 RN10 RN6 RN1 RN5 RN2 C103 0.1u_10V_0402 CPU_VDDIO_SUS C98 0.1u_10V_0402 C69 0.1u_10V_0402 CPU_VDDIO_SUS C93 0.1u_10V_0402 C51 0.1u_10V_0402 CPU_VDDIO_SUS C48 0.1u_10V_0402 C70 0.1u_10V_0402 CPU_VDDIO_SUS C72 0.1u_10V_0402 C92 0.1u_10V_0402 CPU_VDDIO_SUS C61 0.1u_10V_0402 C50 0.1u_10V_0402 CPU_VDDIO_SUS C47 0.1u_10V_0402 C73 0.1u_10V_0402 CPU_VDDIO_SUS C113 0.1u_10V_0402 C81 0.1u_10V_0402 C74 0.1u_10V_0402 B A CPU_VDDIO_SUS MICRO-STAR INT'L CO.,LTD Title DDR2 SODIMMS TERMINATIONS 5,8 MEM_MB_CKE1 5,8 MEM_MB_CKE0 MEM_MB_CKE1 MEM_MB_CKE0 Document Number Size Custom Date: Rev A MS-171B1 Friday, March 30, 2007 Sheet of 50 A11 FOR DVT U18A C B 4 4 4 4 4 4 4 4 HT_CADOUT15_P HT_CADOUT15_N HT_CADOUT14_P HT_CADOUT14_N HT_CADOUT13_P HT_CADOUT13_N HT_CADOUT12_P HT_CADOUT12_N HT_CADOUT11_P HT_CADOUT11_N HT_CADOUT10_P HT_CADOUT10_N HT_CADOUT9_P HT_CADOUT9_N HT_CADOUT8_P HT_CADOUT8_N R19 R18 R21 R22 U22 U21 U18 U19 W19 W20 AC21 AB22 AB20 AA20 AA19 Y19 HT_RXCAD15P HT_RXCAD15N HT_RXCAD14P HT_RXCAD14N HT_RXCAD13P HT_RXCAD13N HT_RXCAD12P HT_RXCAD12N HT_RXCAD11P HT_RXCAD11N HT_RXCAD10P HT_RXCAD10N HT_RXCAD9P HT_RXCAD9N HT_RXCAD8P HT_RXCAD8N 4 4 4 4 4 4 4 4 HT_CADOUT7_P HT_CADOUT7_N HT_CADOUT6_P HT_CADOUT6_N HT_CADOUT5_P HT_CADOUT5_N HT_CADOUT4_P HT_CADOUT4_N HT_CADOUT3_P HT_CADOUT3_N HT_CADOUT2_P HT_CADOUT2_N HT_CADOUT1_P HT_CADOUT1_N HT_CADOUT0_P HT_CADOUT0_N T24 R25 U25 U24 V23 U23 V24 V25 AA25 AA24 AB23 AA23 AB24 AB25 AC24 AC25 HT_RXCAD7P HT_RXCAD7N HT_RXCAD6P HT_RXCAD6N HT_RXCAD5P HT_RXCAD5N HT_RXCAD4P HT_RXCAD4N HT_RXCAD3P HT_RXCAD3N HT_RXCAD2P HT_RXCAD2N HT_RXCAD1P HT_RXCAD1N HT_RXCAD0P HT_RXCAD0N HT_CLKOUT1_P HT_CLKOUT1_N W21 W22 HT_RXCLK1P HT_RXCLK1N HT_CLKOUT0_P HT_CLKOUT0_N Y24 W25 HT_RXCLK0P HT_RXCLK0N HT_CTLOUT0_P HT_CTLOUT0_N P24 P25 R226 R218 VDDHT_PKG 49.9_0402 49.9_0402 HT_RXCALP A24 HT_RXCALN C24 D HT_TXCAD15P HT_TXCAD15N HT_TXCAD14P HT_TXCAD14N HT_TXCAD13P HT_TXCAD13N HT_TXCAD12P HT_TXCAD12N HT_TXCAD11P HT_TXCAD11N HT_TXCAD10P HT_TXCAD10N HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N P21 P22 P18 P19 M22 M21 M18 M19 L18 L19 G22 G21 J20 J21 F21 F22 HT_CADIN15_P HT_CADIN15_N HT_CADIN14_P HT_CADIN14_N HT_CADIN13_P HT_CADIN13_N HT_CADIN12_P HT_CADIN12_N HT_CADIN11_P HT_CADIN11_N HT_CADIN10_P HT_CADIN10_N HT_CADIN9_P HT_CADIN9_N HT_CADIN8_P HT_CADIN8_N HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N N24 N25 L25 M24 K25 K24 J23 K23 G25 H24 F25 F24 E23 F23 E24 E25 HT_CADIN7_P HT_CADIN7_N HT_CADIN6_P HT_CADIN6_N HT_CADIN5_P HT_CADIN5_N HT_CADIN4_P HT_CADIN4_N HT_CADIN3_P HT_CADIN3_N HT_CADIN2_P HT_CADIN2_N HT_CADIN1_P HT_CADIN1_N HT_CADIN0_P HT_CADIN0_N 4 4 4 4 4 4 4 4 C HT_TXCLK1P HT_TXCLK1N L21 L22 HT_CLKIN1_P HT_CLKIN1_N B HT_TXCLK0P HT_TXCLK0N J24 J25 HT_CLKIN0_P HT_CLKIN0_N HT_RXCTLP HT_RXCTLN HT_TXCTLP HT_TXCTLN N23 P23 HT_CTLIN0_P HT_CTLIN0_N HT_RXCALP HT_RXCALN HT_TXCALP HT_TXCALN C25 D24 PART OF HYPER TRANSPORT CPU I/F D HT_TXCALP HT_TXCALN R217 100_0402 RS690T MICRO-STAR INT'L CO.,LTD A Title RS690T HT LINK I/F Size Document Number Custom Rev A MS-171B1 Date: Friday, March 30, 2007 Sheet of 10 50 A PWR_SRC +5VALW PR131 4.7R0603 PL1 80L6_30_0805 Place these CAPs close to FETs PD9 RB717F_SOT323 PC145 VIN PC142 1u_0603 2.2u_0805 PWR_SRC_SYS D PC35 PWR_SRC_SYS PC139 0.1u_0603 PC143 1u_0805 PC34 10u_121010u_1210 D PC141 PC36 PC146 0.1u_0603 2200P50X0402 PC37 2200p_0402 10u_1210 VREF2 PU9 TPS51120RHBR VO2 COMP2 VFB2 GND VREF2 VFB1 COMP1 VO1 delete Jump G5 PQ40 Current limit at 4A for +3.3V PL13 CH-10U4.4A_S 33 PC150 0.1u_0603 PR140 4.7R0603 LL2 EN5 EN3 PGOOD2 EN2 VBST2 DRVH2 LL2 DRVL2 SKIPSEL TONSEL PGOOD1 EN1 VBST1 DRVH1 LL1 DRVL1 32 31 30 29 28 27 26 25 SKIPSEL TONSEL Current limit at 4.5A for +5VSUS PQ37 PR132 4.7R0603 PC137 0.1u_0603 LL1 +5VSUS PL12 CH-10U4.4A_S delete Jump G6 + PC31 PC136 GNDA N-SP8K10S_SO8 C220U6.3POS-1 0.1u_0402 N-SP8K10S_SO8 PC135 PC134 0.1u_0402 1u_0603 + PC138 C220U6.3POS-1 C 17 18 19 20 21 22 23 24 C PGND2 CS2 VREG3 V5FILT VREG5 VIN CS1 PGND1 +3VSUS 10 11 12 13 14 15 16 P ->S PR137 PR138 14.3K0402 0R_0402 PR134 14.3K0402 0R48 0R_NC 12 P ->S PQ38 RUND PR136 4.7_0402 PC147 1u_0603 N-AO4422_SOIC8 +3VALW PQ39 N-AO4422_SOIC8 PC149 10u_0805 PC144 +3VSUS RUND 10u_0805 +5VRUN VIN PR139 100K_0402 VREF2 +3VRUN PR133 2K_0402 max voltage 5.5 31 SUS_ON J25 X B PC148 1n_0402 PR135 PR141 240K_0402 PC140 0.1u_0402 B 0R_0402 _NC PWR_SRC +1.2VSUS +3VSUS PWR_SRC +5VRUN +3VRUN PQ16 G S 12 TONSEL SKIPSEL 0R47 0R_NC PR35 470K_0603 _NC PC33 0.22u_25V_0603 D N-2N7002_SOT23 RUND_1.2 38 PR29 100K_0402 PR31 120R_0805 PR37 120R_0805_NC PR27 100K_0402 PR34 120R_0805 PR26 120R_0805 PR36 100K_0603 PWR_SRC PUMP N-2N7002_SOT23_NC G 100K_0402 N-2N7002_SOT23 G D D PR30 PR33 100K_0603 G N-2N7002_SOT23 R439 0R_NC A RUND PQ13 RUND 14,26,29,34 D 31,32 RUN_ON PQ12 S N-2N7002_SOT23 D D G PQ14 S N-2N7002_SOT23 G PQ10 S 100K_0402 S PR28 G N-2N7002_SOT23 PR32 G S S 31 SUS_ON S A PQ17 D PQ15 D PQ11 PC32 0.1u_25V_0603 N-2N7002_SOT23 MICRO-STAR INT'L CO.,LTD Title SYSTEM POWER 3/5V 2.5VSUS 470K_0603 _NC Size Document Number Custom Rev A MS-171B1 Date: Sheet Friday, March 30, 2007 36 of 50 +5VSUS D D PR123 10R_0603 VCCA_VDDQ PC113 PC101 1u_0603 4.7u_0805 PU6 PC116 PC103 10u_0805 10u_0805 1u_0603 Current limit at 3.8A for SMDDR_VTERM VDDP2 12 VDDP2 25 GND 17 PGND2 VDDP1 20 PC102 1u_0603 PGND1 18 EN/PSV PD7 S-RB751V-40 PWR_SRC_VDDQ C PC110 VCCA 13 A CPU_VDDIO_SUS VSSA PWR_SRC VTTEN 750K_0402 PR121 TON BST PC111 1n_0402 24 PR119 0_0603 PL6 PC120 PC119 10u_121010u_1210 PWR_SRC_VDDQ 80L6_30_0805 PR124 10_0402 0.1u_0603 DH PC118 VTTS LX LX_VDDQ 22 PC100 PC97 PC104 0.1u_0402 10u_0805 10u_0805 VTT VTT 32 VTT_VDDIO_PG 21 DL 19 PGND2 16 VDDQS +3VSUS PR125 100K_0402 B PGOOD 11 VTTEN FB PR114 100K_0402 PR12 220U2.5SP_NC B TP77 PC117 22p_0402 FB=1.5V Control H = 1.9V L = 1.8V D N-2N7002_SOT23 D PR14 13.3K_0402 G PR16 10K_0402 CPU_VDDIO_SUS_ADJ 18 S Q9 S D Vout=1.5(1+(R5/R9)) R5=10K, R9=49.9K Vout=1.8V Current limit at 6A for +1.8VSUS PR118 10K_0402 1% FB_VDDQ PQ5 N-2N7002_SOT23 Q7 G + 220U2.5SP 10_0402 VTTEN PR11 G PC8 + 1u_0603 PR13 36.5K_0402 1K_0402 4.7K_0402 PC122 0.1u_0402 DL_VDDQ PR122 PC106 5.9K_0402 PC112 VDDQ SC486IMLTRT_MLPQ24 +5VSUS 32 VTT_VDDIO_EN PQ25 N-AO4410_SO8 PR113 ILIM delete Jump G2 10_0402 15 14 VTERM CPU_VDDIO_SUS PL5 CH-1.5U10A PR117 0.1u_0603 N-AO4422_SOIC8 0.1u_0603 delete Jump G1 CPU_VTT_SUS 10 PC115 1u_0603 +5VSUS DH_VDDQ 23 0.1u_0603 TP75 PC123 1n_0402 PQ24 COMP PC114 C PC121 PC109 REF PR120 10_0402 REF_VDDQ TP76 C S N-2N7002_SOT23 PC17 PR15 0.1u_0402 100K_0402 A A MICRO-STAR INT'L CO.,LTD Title DDR2 1.8V VTT 0.9V Size Document Number Custom Rev A MS-171B1 Date: Friday, March 30, 2007 Sheet 37 of 50 +5VSUS PR105 10R_0603 813_VDDA PWR_SRC PC54 PL4 80L6_30_0805 PWR_SRC_VTT PC77 PC90 PC92 0.1u_0603 2200p_0402 1u_0603 PC89 2200p_0402 PC108 PC85 10u_1210 10u_1210 D 1u_0603 PC87 813_DL1 PC107 PC88 10u_1210 10u_1210 D PD5 RB717F_SOT323 PWR_SRC_VTT 813_DL2 0.1u_0603 18 813_VREF 22 CS2N 23 VSET2 24 + PR77 51R_0402 PR69 100K_0402 PC70 PC66 PQ35 N-AO4422_SOIC8 +5VRUN J24 X PC75 1n_0402 PR89 60.4K0402 1% 3300P_0402 VIN PR81 2.2K_0402 VIN PR92 1K_0402 1.2VSUS_PWRGD PR88 120K0402 1% 1.2VSUS_PWRGD 32 +5VSUS PC28 0.1u_0603 PR91 100K_0402 4.7u_6V_0603 VOUT VOUT EN FB PR87 1K_0402 PR96 20K_0402 PC78 POK PC91 1n_0402 PR101 100K_0402 B +1_5VRUN PC29 PR24 15.8K_0402 100u_6.3V_1210 2 GND 1_5_VCC PR108 1K_0402 +1.8VRUN VCNTL B RUND_1.2 PC71 36 RUND_1.2 813_VSET2 4.7u_0805 +5VRUN C 43.2KR1%_0402 +1.2VRUN PC74 1n_0402 1u_0603 PC27 0.1u_0402 813_VSET2 PWR_SRC_VTT PR23 10R_0603 1_5_VCC PC22 + PC83 PR104 95.3K0402 1% delete Jump G3 PR71 813_CS2P 813_CS2N 813_VDDA 813_VREF PC69 4700p_0402 ON/SKIP2 GNDA CS2P 25 813_CS1P 813_CS1N VDDA VSET1 TSET CS1N OZ813LP_QFN24 22p_0402 PR73 160K_0402 CS1P PQ27 AO4410 1.2VSUS_PWRGD PC20 PC21 220U2.5SP 220U2.5SP +1_2V_P PGD2 21 PL8 CH-1.5U10A 0.1u_0603 813_LX2 20 19 LX2 16 17 LDR2 BST2 HDR2 4700p_0402 C 4700p_0402 22p_0402 51R_0402 PGD1 VREF PC72 PC68 4 N-SP8K10S_SO8 VIN PR70 100K_0402 PR79 ON/SKIP1 + PC128 0.1u_0402 delete Jump G4 10 +1.2VSUS Current Limit at 10 Amp LX1 Power 02/06 PC58 HDR1 11 813_DH2 12 813_LX1 813_DH1 15 PL9 2.5U7.5A_S +VTT_P VDDP PC125 220U2.5SP PU4 PC60 0.1u_0603 GNDP 13 BST1 LDR1 The Limited Current = 4A +1.8VRUN 14 PQ26 AO4422 PQ28 PR25 18K0402 1% 1 PU1 APL5912 PC30 0.01u_0402 +3VRUN +1.2VRUN +3VSUS PR19 100K_0402 PR20 100K_0402 N-2N7002_SOT23 S PQ6 B PQ9 G C 1K_0603 A NB_VCC_PG 32 D PR22 PC26 2.2u_0805 A E SMBT3904 MICRO-STAR INT'L CO.,LTD Title VCC_NB 1.2VSUS 1.5VRUN 1.8VRUN Document Number Size Custom Rev A MS-171B1 Date: Friday, March 30, 2007 Sheet 38 of 50 +3VALW PR40 R338 2.2K_0402 +VBATA R322 2.2K_0402 100KR0402 D 0.1U25X PC41 Diode : Is=4.2A CON19 PFL1 For EMI 2007-04-02 PR39 100R0402 PD3 PD2 PC39 PR116 240KR0402 PC18 0.01U50X PC5 0.1U50Y PC19 10U25X1210 E For EMI 2007-04-02 PQ23 P-DTA114EKA_SOT23 PWR-1X8_black-NB N91-07M0031-A10 BAT_BD7DS_1 47KR0402 10P50N0402_NC D C A 10P50N0402_NC PR115 B PC38 0.1U25X_NC PC105 0.47U25Y0805 M_BATIN# PC40 A PC151 31 M_BATIN# BATDATA_M D CON17 ROHM ( UDZ3.3B ) PC9 DC_IN+ 100R0402 ROHM ( UDZ3.3B ) CI3 C0.1U50Y_NC P-AO4413_SOIC8 PC7 CB-4532ES-121W CI1 C0.1U50Y C0.1U50Y_NC N32-1040921-H06 sip4_2mm_0516 B10487-221220 C0.1U50Y_NC C2200P50X0402_NC 31 BATDATA_M PQ4 PR38 C I=15A DC_PWR BATCLK_M C 31 BATCLK_M PQ22 2N7002 C G I=8A +3VALW PR112 C289 100KR0402 PR41 100KR0402 1U10X SDC_IN+ C PQ2A PP-AO4805_SO8 Diode : Is=2.6A S 31 AC_CTL PR2 10KR0402_NC AC_OK AC_OK D D1 D2 PR1 PQ18 G PR3 10KR0402 100KR0402 PQ1 2N7002_NC 18,31,40 AC_OK# PR7 10KR0402 PC4 PR5 Diode : Is=3A PD1 A C0.1U25Y C Q1B PP-AO4805_SO8 +VBATA 100KR0402 CHG_BATT_N D B ES3BB_DO214AA V_CHG I=8A Diode :Q1A Is=2.6A PP-AO4805_SO8 PQ2B PP-AO4805_SO8 Diode : Is=2.6A PWR_SRC I=8A I=8A Diode : Is=2.6A B PWR_SRC G2 S2 G1 S1 S 2N7002DW PQ3 PR8 S 2KR0402 PR43 470KR0402 2N7002 G 31,40 ENCHG A A MICRO-STAR INT'L CO.,LTD Title Battery Select Size Document Number Custom Rev A MS-171B1 Date: Monday, April 02, 2007 Sheet 39 of 50 MAX1772_LDO PR46 10KR0402 Adapter= 90 W D SDC_IN+ Adapter input voltage set 17.4 Voltage D CELL PR4 DC_IN+ PC95 PC86 2200P50X0402 0.1U25Y 10U25X1206 0.02R1% PC99 PR107 PR48 10KR0402 PR94 MAX1772_ACIN A PR50 4.7R0402 MAX1772_LDO 1U16Y PC84 PC65 0.47U25Y0805 PC49 0.47U25Y0805 SDC_IN+ PC48 10u_1210 2N7002DW +3VALW PR9 PR49 MAX1772_ACIN 11 MAX1772_ICHG MAX1772_IINP PC61 0.1U25Y CSSN CSSP 80L6A0805 C 16 25 DLOV 22 ACOK 10 ICHG 28 IINP MAX1772_CCV CCV MAX1772_CCI CCI CCS PR58 12KR0402 DHI 24 LX 23 ACIN 12 B PU3 PL3 PC44 2200P50X0402 CELL PC45 0.1U25Y PD4 C A BAS40WS PQ19 PC50 PR10 18,31,39 AC_OK# PR110 12KR0402 REFIN VCTL ICTL PC55 10u_1210 33R PC51 0.1U25Y CELLS LDO BST 0.1U25Y PR95 10KR0402 PC81 0.1U25Y 13 15 14 DLO 21 PGND 20 V_CHG PL2 CH-10U5A_S PR42 0.033R1% CSIP CSIN 19 18 BATT 17 GND GND CSIP CSIN PR44 PR45 PC53 0.1U25Y MAX1772EEI PC46 PC3 0.1U25Y NN-SP8K10S_SO8_0 CLS 38.3KR1%0402 DCIN PR59 REF D1 100KR1%0402 1KR1%0402 13.3KR1%0402 PR82 MAX1772_REFIN MAX1772_VCTL MAX1772_ICTL 49.9KR1%0402 D2 PR83 24.3KR1%_402 PR47 47.5KR1%0402 PR97 34KR1%0402 PR6 26 27 MAX1772_REF G2 S2 G1 S1 31 ENCHG_2P PR78 4.7R0402 PC73 1U25X0805 3S2P: Charge current set Amp 3S3P: Charge current set 4.5 Amp Pre-charger: Charge current set PQ21 200mA 31 PRE_CHG 7.15KR1%0402 PD6 BAS40WS C Ichange=(Vref/RS2)(Victl/Vrefin)(1/20) Vref=4.096V Vrefin=4.096(100K/(100K+24.3K))=3.295V 3S3P : Victl=4.096(267K/(34K+267K))=3.6333V Ichange=4.5A 3S2P : Victl=4.096(49.9K/(34K+49.9K))=2.4361V Ichange=3A Pre-charge : Victl=4.096(1.54K/(34K+1.54K))=0.177486V Ichange=220mA C 53.6KR1% PC42 10U25X1206 PC43 10U25X1206 PC47 10U25X1206 10U25X1206_NC 1R1% 1R1% PC52 0.1U25Y B MAX1772_REF PR111 10KR0402 PC80 0.01U50X PC79 0.01U50X PC93 1000P50X0402 PC6 1U16Y +5VALW PR86 28.7KR1%0402 JT1 X_NC PR60 10KR0402 PR100 20KR1%0402 D2 D1 MAX1772_ICTL SET Iin MAX = 3.3A Isource_max=Vcls/(20xRS1) Vcls=4.096(20K/(20K+42.2K))=1.317V Ichange=3.29A PQ20 ENCHG-2P PRE_CHG ENCHG 1 Pre-charge 1 3S2P-Fast charge 0 3S3P-Fast charge 0 STOP CHARGE 2N7002DW 31,39 ENCHG A S1 G1 S2 G2 A MICRO-STAR INT'L CO.,LTD Title M_Battery Charger Size Document Number Custom Rev A MS-171B1 Date: Friday, March 30, 2007 Sheet 40 of 50 BAT1 M31-3904078-W03 PCB P30-171B10C-D05 H8 holes_p_r256d110 H19 holes_p_r256d110 BIOS LABEL H7 holes_p_r256d110 BIOS1_X1 WINBOND ( W39L040P-70Z ) RTC_BAT H2 holes_p_r256d110 MS171B PCB H1 holes_p_r256d110 UME12 PCB0 D D D06-0100601-K26 BIOS_LABEL _ H18 holes_p_r256d110 _ H3 holes_p_r256d110 _ H9 holes_p_r256d110 _ H17 holes_p_r256d110 _ H5 holes_p_r256d110 U107 PCIE MYLAR 1 H10 _ holes_p_r256d110 H20 _ holes_p_r256d110 307-7140111-Y28 DDR MYLAR PCIE MYLAR H11 _ holes_p_r256d110 CPU BARCKET MB MYLAR U108 H4 _ holes_p_r256d110 _ E2P-7182111-G40 E26-1004050-SA6 E26-1036180-G40 CRT mylar E26-1004050-SA6 E2P-71A0211-G40 E2P-7180511-Y42 _ _ _ _ Antenna Hole H14 STAND OFF_R268D142 C H30 HOLES_R252D142 H31 HOLES_R252D142 H35 HOLES_R252D142 wireless bluetooth E2B-171A020-L63 CRT SHEETHEX _ _ _ H12 holes_r256d91b97_pt E2B-1003010-A89 H28 holes_r276d185p H26 holes_r276d185p H27 holes_r276d185p PAD6 PAD7 PAD3 PAD8 ME_PAD_NC ME_PAD ME_PAD_NC ME_PAD PAD12 PAD16 PAD14 PAD2 PAD5 PAD4 ME_PAD_NC ME_PAD_NC ME_PAD ME_PAD_NC ME_PAD_NC ME_PAD 1 1 1 1 1 1 0330 ME added H13 holes_r256d91b97_pt E2B-1003010-A89 H29 holes_r276d185p E2B-171A020-L63 PAD17 ME_PAD E2B-1037020-L63 check CRT SHEET PN 0330 E42-A040535-H29 E21-1035080-Y28 E42-A040535-H29 E43-1204002-H29 E2M-6310711-SH4 TV E2B-171A020-L63 SKEW HEX C CRT SHEET SKEW H16 NPTH118 STAND OFF S2 PCIE SHEET MINI PCIE SHEET E43-1204002-H29 H15 NPTH118 1 S13 S14 S12 S6 S1 PCB Fix Hole H6 NPTH_200 U105 U104 U103 1 MDC Stand off B B CPU Thermal Module PAD11 ME_PAD_NC PAD18 ME_PAD_NC PAD15 ME_PAD PAD13 ME_PAD PAD10 ME_PAD 1 PAD1 ME_PAD_NC H32 holes_r177d91 PAD19 ME_PAD_NC S5 SKEW PCIE SHEET SKEW MINI PCIE SHEET E43-1204002-H29 H33 holes_r177d91 E43-1204002-H29 E23-1016020-T01 FOR NEWCARD SHEET S4 1 S3 A FM014 FM016 FM022 FM012 FM017 FM024 FM019 FM009 FM020 FM28 FM29 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M120 X_F_PAD_M120 FM004 FM005 FM015 FM018 FM026 FM011 FM008 FM007 FM002 FM30 FM31 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 FM013 FM021 FM023 FM027 FM006 FM025 FM010 FM003 FM001 FM32 FMA6 FMA7 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_PANEL_PAD X_PANEL_PAD A MICRO-STAR INT'L CO.,LTD Title ME Parts Size Document Number Custom Rev A MS-171B1 Date: Monday, April 02, 2007 Sheet 41 of 50 J14 J8 L3_4mil_60 L4_4mil_60 X_PIN1*2 Normal Signal 60 Ohm X_PIN1*2 DRAM DATA,DM.normal signal D D J3 J15 L3_6mil_50 Ohm L4_6mil_50 Ohm RGB Signal 50 Ohm X_PIN1*2 X_PIN1*2 J22 J20 L6_DIFF_5/7/5_100 Ohm+ L4_DIFF_5/7/5_100 Ohm+ X_PIN1*2 X_PIN1*2 J21 Differential Pair 100 Ohm J19 L6_DIFF_5/7/5_100 Ohm- L4_DIFF_5/7/5_100 Ohm- CPU CLK,LVDS/HDMI,PCIE,ALINK,LAN,SATA C X_PIN1*2 C X_PIN1*2 J5 J4 L3_DIFF_5/6/5_93 Ohm+ L4_DIFF_5/6/5_93 Ohm+ X_PIN1*2 X_PIN1*2 J16 J12 L3_DIFF_5/6/5_93 Ohm- L4_DIFF_5/6/5_93 Ohm- X_PIN1*2 J27 Differential Pair 93 Ohm X_PIN1*2 J26 L6_DIFF_5/6/5_93 Ohm+ L6_DIFF_5/6/5_93 Ohm- X_PIN1*2 HT DQS X_PIN1*2 B B J18 J17 L6_DIFF_5/5/5_90 Ohm+ L4_DIFF_5/5/5_90 Ohm+ Differential Pair 90 Ohm X_PIN1*2 X_PIN1*2 J13 USB PAIR J9 L6_DIFF_5/5/5_90 Ohm- L4_DIFF_5/5/5_90 Ohm- X_PIN1*2 X_PIN1*2 J7 J6 L3_DIFF_8/5/8_72 Ohm+ L4_DIFF_8/5/8_72 Ohm+ Differential Pair 72 Ohm X_PIN1*2 A X_PIN1*2 J11 DRAM CLK A J10 L3_DIFF_8/5/8_72 Ohm- MICRO-STAR INT'L CO.,LTD L4_DIFF_8/5/8_72 OhmTitle IMPEDANCE X_PIN1*2 X_PIN1*2 Size B Date: Document Number Rev A MS-171B1 Wednesday, January 24, 2007 REFERENCE DESIGN RESTRICTION NOTICE THESE SCHEMATICS ARE SUBJECT TO MODIFICATION AND DESIGN IMPROVEMENTS THESE SCHEMATICS CONTAIN INFORMATION WHICH IS PROPRIETARY TO AND IS THE PROPERTY OF ATI, AND Sheet 42 of 50 PWR_SRC CE129 0.1U25Y D CE125 CPU_VDDIO_SUS CE93 0.1U10X0402 CE45 0.1U10X0402 CE41 0.1U10X0402 CE32 0.1U10X0402 CE40 0.1U10X0402 CE18 0.1U10X0402 CE21 0.1U10X0402 CE25 0.1U10X0402 CE29 0.1U10X0402 CE28 0.1U10X0402 CE43 0.1U10X0402 CE34 0.1U10X0402 CE37 0.1U10X0402 CE23 0.1U10X0402 CE35 0.1U10X0402 CE20 0.1U10X0402 CE33 0.1U10X0402 CE24 0.1U10X0402 CE42 0.1U10X0402 CE94 0.1U10X0402 CE86 0.1U10X0402 CE38 0.1U10X0402 CE22 0.1U10X0402 CE26 0.1U10X0402 24 PCS for VDDIO_SUS to GND CE105 CE62 CE145 CE146 CE147 0.1U25Y CE124 PWR_SRC CPU_VTT_SUS +5VRUN 0.1U25Y CE96 CPU_VDDIO_SUS CPU_VDD_RUN CE4 0.1U25Y CE61 PWR_SRC +3VRUN 0.1U25Y CE30 0.1U10X0402 CE44 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 12_12_sunday CE79 0.1U25Y CE121 0.1U25Y CE71 0.1U25Y CE108 0.1U25Y CE170 0.1U25Y CE171 CE88 0.1U25Y CE2 CE15 CPU_VDDIO_SUS +5VRUN CE154 0.1U10X0402 CE153 0.1U10X0402 0.1U25Y CE5 0.1U25Y CPU_VTT_SUS 0.1U25Y CE1 SDC_IN+ CE148 CE149 CE150 CE151 0.1U25Y +3VRUN CE8 0.1U10X0402 CE6 0.1U10X0402 CE102 0.1U10X0402 0.1U25Y 0.1U25Y CE161 0.01UF_0402 CE162 0.01UF_0402 0.1U25Y CE168 0.1U10X0402 CE14 0.1U25Y D CE81 CE48 CE180 0.1U10X0402 0.1U25Y C328 0.1UF/25V C329 0.1UF/25V CPU_VDD_RUN +1.8VRUN C330 0.1UF/25V 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 12_12_sunday CE39 CE90 CE89 CE31 CE27 CE36 C333 0.1UF/25V C332 0.1UF/25V 14 PCS for PWR_SRC to GND 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 +1.8VRUN CE46 CE17 CE56 CE91 CE54 CE19 CE103 6PCS for CPU_VDD_RUN TO GND CE172 0.1U10X0402_NC CE155 0.01UF_0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 CE156 0.01UF_0402 CE104 0.1U10X0402 CE173 0.1U10X0402_NC CE174 0.1U10X0402_NC +5VSUS CE115 0.1U10X0402 CE127 0.1U10X0402 CE175 0.1U10X0402_NC +5VSUS PWR_SRC_VDDQ +3VSUS CE75 0.1U10X0402 CE76 0.1U10X0402 CE51 0.1U10X0402 CE120 0.1U10X0402 CE70 0.1U10X0402 CE113 0.1U10X0402 CE101 0.1U10X0402 CE47 CE63 CE119 CE78 CE109 CE53 CE176 0.1U10X0402_NC CE87 CE177 0.1U10X0402_NC PWR_SRC_SYS CE122 0.1U25Y 0.1U25Y CE178 0.1U10X0402_NC C CE126 0.1U25Y CE179 0.1U10X0402_NC 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 C CLK_VDD CE133 +1.2VRUN PWR_SRC_VTT 0.1U25Y CE83 0.1U25Y CE82 0.1U25Y CE137 0.1U10X0402 CE136 0.1U10X0402 R208 12-06_sunday 0R_0402 CE138 0.1U10X0402 AGND CE158 0.01U10X0402 R215 CE159 0.01U10X0402 0R_0402_NC R209 CE160 0.01U10X0402 +1.2VRUN CE533 +3VRUN B CE7 0.1U10X0402 CE72 0.1U10X0402 CE67 0.1U10X0402 CE80 0.1U10X0402 CE64 0.1U10X0402 CE123 0.1U10X0402 CE68 0.1U10X0402 CE118 0.1U10X0402 CE107 0.1U10X0402 CE59 0.1U10X0402 CE58 0.1U10X0402 CE50 0.1U10X0402 CE99 0.1U10X0402 CE65 0.1U10X0402 CE114 0.1U10X0402 CE112 0.1U10X0402 CE52 0.1U10X0402 CE98 0.1U10X0402 CE49 0.1U10X0402 CE16 0.1U10X0402 CE116 0.1U10X0402 CE128 0.1U10X0402 22 PCS for +3VRUN CE130 0.1U10X0402 CE131 0.1U10X0402 CE132 0.1U10X0402 0R_0402_NC +3VRUN CE534 CE139 0.1U10X0402 CE535 CE152 0.01U10X0402 1470P16X0402 1470P16X0402 470P16X0402 VCORE_GND 12_09 C331 0.1UF/25V CE157 0.01U10X0402 B +5VRUN +5VRUN +1.2VRUN CE167 0.01UF_0402 11-29_sunday CPU_VDD_RUN CE134 0.1U10X0402_NC CE135 0.1U10X0402_NC CE144 0.1U10X0402 CE10 CE11 CE3 CE13 CE74 CE12 CE55 CE100 CE97 CE57 CE106 CE77 CE92 CE95 CE69 CE73 CE66 CE9 CE169 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 0.1U10X0402 12-06_sunday 22 PCS for +5VRUN TO GND CE140 0.1U10X0402 CE141 0.1U10X0402 CE142 0.1U10X0402 12_09 CE143 0.1U10X0402 R214 CE163 0.01UF_0402 0R_0402_NC R211 0R_0402_NC CE164 0.01UF_0402 A CE165 0.01UF_0402 A CE166 0.01UF_0402 MICRO-STAR INT'L CO.,LTD Title EMI Size Document Number Custom Rev 2.0 MS-171B1 Date: Tuesday, February 06, 2007 Sheet 43 of 50 PWR_SRC PWR_SRC +3VALW+5VALW +3VALW+5VALW SUS_ON PWR_SW- +3VSUS+5VSUS SUS_ON T>170ms T>20ms 1.2VSUS +3VSUS+5VSUS T>20ms 1.2VSUS 1.2VSUS_PWRGD T15ms NB_VCC_PG NB_PWRGD NB_VCC_PG T>15ms -22ms500ms NB_PWRGD -22ms500ms +VDDA +VDDA VDDA_PG VDDA_PG CPU_VDD_RUN CPU_VDD_RUN VDD_PG VDD_PG +VLDT C T=10ms CPU_VDDIO_SUS +VLDT VLDT_PG VLDT_PG C T48ms SB_CPUPWRGD SB_CPUPWRGD A_RST# A_RST# PCI_RST# PCI_RST# LDT_RST# T>1ms NBSRC_CLKP_R LDT_RST# T>-31ms T>1ms NBSRC_CLKP_R T>-31ms AC MODE S5 >S0 DC MODE S5 >S0 SUS_0N timing need by EC programming 690T+600 timing SPEC SLP_S3# PWR_SRC SLP_S5# +3VALW+5VALW keep High keep High 1.3s S5_ON 10ms SUS_ON CPU_VDDIO_SUS +3VSUS+5VSUS CPU_VTT_SUS RUN_ON B 1.2VSUS 16ms 1.2VSUS_PWRGD B RUND SUSPWROK MEM_VDDQMEM_VTT+3VRUN+5VRUN+1.2VRUN SLP_S3# +1.8VRUN SLP_S5# +1_5VRUN S5_ON VCC_NB CPU_VDDIO_SUS NB_VCC_PG CPU_VTT_SUS NB_PWRGD RUN_ON +VDDA RUND VDDA_PG MEM_VDDQMEM_VTT+3VRUN+5VRUN+1.2VRUN CPU_VDD_RUN +1.8VRUN VDD_PG +1_5VRUN +VLDT 10ms 16ms VCC_NB NB_VCC_PG VLDT_PG 1us SB_PWRGD NB_PWRGD NBSRC_CLKP_R +VDDA VDDA_PG PWR_SRC keep High +3VALW+5VALW keep High SUS_ON keep High +3VSUS+5VSUS keep High 1.2VSUS keep High 1.2VSUS_PWRGD keep High SUSPWROK keep High CPU_VDD_RUN VDD_PG +VLDT A A VLDT_PG SB_PWRGD 1us NBSRC_CLKP_R AC MODE S0 >S5 DC MODE S0 >S5 MICRO-STAR INT'L CO.,LTD Title EMI Size C Date: Document Number Rev A MS-171B1 Wednesday, January 24, 2007 Sheet 44 of 50 D D C C B B MICRO-STAR INT'L CO.,LTD A Title RESERVE Size A Date: Document Number Rev A MS-171B1 Wednesday, January 24, 2007 Sheet 45 of 50 A DCJACK_5 AMP_1470811_DC - JACK CHECK LIB PJA001 PCA004 PCA001 PCA002 PCA003 0.1u_0603 2200p_0402X7R X_0.1u_0603 X_0.1u_0603 PCBA CNA001 PFLA001 120L6_15_4532 +DC_IN1-A D 1 +DC_IN-A D MS1718A PCB N32-1040471-M06 sip4_2mm_90 POWER_CONN_RIGHT ANGLE PCB P30-171BA0C-D05 CNA004 12 11 10 LA002 1000L100m_800 CNA003 BH1X2-1.25pitch-NB PH+-A PH A RJ11 13 14 WIRE C CN_RING-A CN_TS-A TRD3 A TRD3+-A TRD1 A TRD2 A 10 RJ45 TRD2+-A TRD1+-A TRD0 A TRD0+-A CNA002 LTK_RJ4511ROS_RJ4511 N55-12F0090-A10 TRD0+-A TRD0 A TRD1+-A TRD1 A TRD2+-A TRD2 A TRD3+-A TRD3 A 53261_08 B To be compatible with MS-1035 and MS-1036 MB LA003 1000L100m_800 0- 1 0+ 0+ 2 0- 1- 3 1+ 1+ 4 1- 2- 5 2+ 2+ 6 2- 3- 7 3+ 3+ 8 3- DB CN_TS-A CN_RING-A C RJ45 Pin define lan issue 0427 rechange + - TRD3TRD3+ TRD1TRD2TRD2+ TRD1+ TRD0TRD0+ 78 B FMA006 FMA004 X_F_PAD_M120 X_F_PAD_M120 FMA001 MHA001 PTH X_F_PAD_M120 MHA003 PTH X_3X5 FMA003 FMA008 X_F_PAD_M120 X_F_PAD_M120 X_3X5 LA001 X_1000L100m_800 FMA005 X_PANEL_PAD A MHA002 LA004 X_1000L100m_800 A FMA007 PTH MICRO-STAR INT'L CO.,LTD FMA002 X_F_PAD_M120 X_PANEL_PAD Title DC-IN Daughterboard X_2.8MM Size B Date: Document Number Rev 1.0 MS-171B-A Friday, March 30, 2007 Sheet 46 of 50 USB_PWR-B USB5V-B USB5V-B FB001 CB007 10u_0805_NC 1 PolySwitch_2.6A/6V CB010 1000p_0402X7R CB006 100UF/10V_PT-CAP D D 10 USB_PN0-B USB_PP0-B USB_PN2-B USB_PP2-B LID#-B +3VSUS-B CB011 USB_PN0-B 1-1775879-1 N53-04M0411-A10 10p_0402NPO_NC USB5V-B USB_CONN 1000PF_0402 CB009 10p_0402NPO_NC CB008 CNB002 LB002 CMC_180ohm 4 CNB003 USB_PWR-B USB_PP0-B CB012 C CB002 10u_0805_NC C CB001 1000p_0402X7R 1000PF_0402 CB003 USB_PN2-B CNB001 1-1775879-1 N53-04M0411-A10 +3VSUS-B CB005 10p_0402NPO_NC LB001 CMC_180ohm USB_PP2-B SWB001 10p_0402NPO_NC RB001 10K_0402 B LID#-B CASHTEC_FR3S1520_REED_SW LID SWITCH B CB004 USB5V-B 1000PF_0402 PTH FMB006 FMB001 FMB002 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 FMB004 FMB007 X_F_PAD_M120 X_F_PAD_M120 FMB008 FMB005 X_F_PAD_M120 X_F_PAD_M120 PTH X_2.8MM MHB001 USB_PN0-B USB_PN2-B USB_PP0-B USB_PP2-B MHB003 X_2.8MM DB001 IPC220CZ6 /SO6 PCBB FMB003 A MHB002 PTH A MS1718B PCB X_F_PAD_M120 MICRO-STAR INT'L CO.,LTD Title X_2.8MM Block diagram PCB P30-171BB0C-D05 Size B Date: Document Number Rev 1.0 MS-171BB Monday, February 05, 2007 Sheet 47 of 50 Add R172 For LCD backlight glitch issue while pwer on 2007-01-17 (HW Sundayyang) Q39 change PN For MOSFET GS voltage limit issue 2007-01-17 (HW Sundayyang) Add R338 and R322 For Battery SMBUS issue 2007-01-17 (HW Sundayyang) Pop PR137 For TPS5112 function 2007-01-17 (Power Shawn) Add R425 and 426 For IR function 2007-01-17 (HW Sundayyang) NC R382,R383,R384 and R385 Used USB bus WLAN model 2007-01-17 (HW Sundayyang) Remove WLAN power control For voltage drop issue 2007-01-17 (HW Sundayyang) NC 3G power control and add L58 For voltage drop issue 2007-01-17 (HW Sundayyang) NC TV power control and add L59 For voltage drop issue D D 2007-01-17 (HW Sundayyang) C C B B A A Title Size B Date: Document Number Wednesday, January 24, 2007 Rev