2352 MSI MS 7389 rev

1 L-A780 Ver:0.2 A (MS-7389L2 Ver:0B) Cover Sheet BLOCK DIAGRAM GPIO Configuration Clock Distribution Power Deliver Chart VRM Intersil 6323 Phase AMD Socket AM2 & AM2+ 7~9 DDR II DIMM 1and DIMM2 & & & 10 ~ 11 DDR Terminatior 12 AMD - RS780 13 ~ 16 AMD - SB700 17 ~ 21 DVI / VGA Connector 22 Clock Gen ICS9LPR471 23 SATA/LPT/KB/ FAN Control 24 LAN-Marvell 88E8039/8056/8071/8075/8070 25 LPC I/O ITE IT8718F 26 MS-6 ACPI Controller 27 IEEE-1394 VT6308P 28 Azalia CODEC ALC662/888 29 USB CONNECTORS 30 PCI EXPRESS X16 & X SLOT 31 PCI Slot & 32 TMP/Asset ID/HWM W83201G 33 ATX & Front Panel 34 Auto BOM Manual 35 CPU: AMD AM2+ AMD AMD Athlon 64 X2 AMD Athlon 64 FX AMD Athlon 64 AMD Sempron CPUs System Chipset: AMD - RS780 (North Bridge) - RX780 (North Bridge) AMD - SB700 (South Bridge) On Board Chipset: BIOS - SPI Azalia CODEC - Realtek ALC662(Default)/888 LPC Super I/O ITE IT8718F(GX) LAN - Marvell 8039/8056/8071/8075/8070(Default) IEEE1394 - VIA VT6308P TMP - WPCT200(Default)/ST19WP18 Asset ID - PCA24S08 HWM W83201G A Main Memory: DDR II * (Max 4GB) Expansion Slots: PCI Express X16 Slot * PCI Express X1 Slot * PCI 2.3 Slot * Intersil PWM: Controller - Intersil 6323 Phase MICRO-START INT'L CO.,LTD Title COVER SHEET Size Document Number Custom L-A780 Date: Friday, August 24, 2007 Rev 0B Sheet of 35 Project RS-780 BLOCK DIAGRAM DDRII 400,533,667,800 AMD AM2/AM2g2 D DDRII 400,533,667,800 AM2 SOCKET DVI CON 22 IN OUT 7,8,9 HyperTransport LINK UNBUFFERED DDRII DIMM1 128bit UNBUFFERED DDRII DIMM2 128bit 10 UNBUFFERED DDRII DIMM3 10 UNBUFFERED DDRII DIMM4 DDRII FIRST LOGICAL DIMM 16x16 2.6GHZ(HT3) 11 D 11 DDRII SECOND LOGICAL DIMM ATI NB - RS780 TMDS HyperTransport LINK0 CPU I/F 16X PCIE VIDEO I/F PCIE GFX x16 31 4X PCIE I/F WITH SB PCIE x16 1X PCIE I/F C C 4X1 PCIE INTERFACE 13,14,15,16 Gbit ETHERNET 8039/8056 /8071/8075 PCIE x1 SLOT1 25 31 A-LINK 4X PCIE USB-5 REAR 30 USB-4 REAR USB-3 REAR 30 USB-2 REAR 30 USB-1 REAR 30 30 USB-0 REAR HD AUDIO HDR ATI SB - SB700 USB 2.0 30 AZALIA USB2.0 (12) AZALIA CODEC SATA2 (4 PORTS) USB-11 HDR USB-10 HDR 30 30 USB-9 HDR USB-8 HDR 30 USB-7 HDR 30 30 USB-6 HDR 29 29 AC97 2.3 HD AUDIO 1.0 30 SERIAL ATA 2.0 ACPI 1.1 B SATA#0 SATA#1 SATA#2 SATA#3 24 24 24 24 SPI I/F B PCI/PCI BRIDGE PCI BUS SPI Bus SPI ROM 8M 19 CPU CORE POWER NB CORE POWER Intersil ISL6323 Intersil ISL6612A ACPI CONTROLLER MS6 PCI SLOT 30 PCI SLOT 17,18,19,20,21 30 27 LPC BUS CPU VLDT Power RS780 CORE POWER PCIE & SB POWER DDR2 DRAM POWER A 27 ITE SIO IT8718F (GX) TPM 26 Lenovo LEO CHIP 33 33 A 27 ATX CON & DUAL POWER 27 FLOPPY LPT 22 23 KBD MOUSE 22 MICRO-START INT'L CO.,LTD SERIAL PORT 23 Title BLOCK Diagram Size Document Number Custom L-A780 Date: Rev 0B Friday, August 03, 2007 Sheet of 35 D D C C B B PCI Config DEVICE PCI Slot PCI Slot IEEE-1394 MCP1 INT Pin PCI_INTA# PCI_INTB# PCI_INTC# PCI_INTD# PCI_INTB# PCI_INTC# PCI_INTD# PCI_INTA# PCI_INTC# REQ#/GNT# IDSEL CLOCK PREQ#0 PGNT#0 AD16 PCICLK0 PREQ#1 PGNT#1 AD17 PCICLK1 PREQ#2 PGNT#2 AD18 PCICLK2 A A MICRO-START INT'L CO.,LTD Title GPIO Configuration Size C Document Number Date: Friday, August 03, 2007 Rev L-A780 0B Sheet of 35 DIMM3 DIMM4 D D CPU_HT_CLK DIMM2 PAIR MEM CLK PAIR MEM CLK PAIR MEM CLK PAIR MEM CLK NB_HT_CLK 33MHZ PCI SLOT 33MHz PCI CLK1 HT REFCLK 100MHz DIFF(RX780/RS780) AM2/AM2g2 CPU PCI CLK0 AMD NB RX780/RS780 33MHZ AMD SB SB700 PCI CLK2 33MHZ IEEE1394 33MHz NB_DISP_CLK PCI CLK3 33MHZ SUPER IO IT8718F 33MHz PAIR CPU CLK 200MHZ PCI CLK4 AM2 SOCKET NB-OSCIN 14.318MHZ GPP_CLK3 PCIE_RCLK/ NB_LNK_CLK NB ALINK PCIE CLK 100MHZ C SB ALINK PCIE CLK 100MHZ 33MHZ PCI CLK5 33MHZ TPM 33MHz LEO CHIP 33MHz C LPC_CLK0 33MHZ EXTERNAL CLK GEN PCI SLOT 33MHz 25M_48M_66M_OSC NB GFX PCIE CLK 100MHZ NB GPP PCIE CLK 100MHZ (RX780) LPC CLK1 33MHZ PCIE GFX CLK 100MHZ PCIE GFX SLOT - 16 LANES PCIE GPP CLK 100MHZ PCIE GPP SLOT - LANE SLT_GFX_CLK SB_BITCLK GPP_CLK0 PCIE GPP CLK 100MHZ PCIE GPP SLOT - LANES PCIE GPP CLK 100MHZ PCIE GBE 25MHZ OSC INPUT 25MHz LAN 48MHZ GPP_CLK1 GPP_CLK2 B USB CLK 48MHZ HD AUDIO ALC 662/883 25MHz DIMM1 B USB_CLK SIO CLK 48MHZ 25MHz SATA 32.768KHz 14.31818MHz External clock mode Internal clock mode A A MICRO-START INT'L CO.,LTD Title Clock Distribution Chart Size Document Number Custom L-A780 Date: Rev 0B Friday, August 03, 2007 Sheet of 35 Power Deliver Chart AMD AM2r2 CPU VDDA25 (S0, S1) 2.5V Shunt Regulator ATX P/S WITH 1A STBY CURRENT D 5VSB +/-5% 5V +/-5% 3.3V +/-5% 12V +/-5% -12V +/-5% VRM SW REGUALTOR CPU PW 12V +/-5% VDDA 2.5V VDDCORE 0.8-1.55V VCCP (S0, S1) / VCC_NB (S0, S1) VTT_DDR (S0, S1, S3) 5VDIMM Linear REGULATOR DDRII DIMMX4 1.8V VDD SW REGULATOR 12A VTT_DDR 2A D 0.5A VLDT 1.2V NB_VCC1P1 (S0, S1) 1.1V VCC Linear REGULATOR 1.8V VCC Linear REGULATOR VDD MEM 110A DDR2 MEM I/F VDD MEM 1.8V 10A VTT MEM 0.9V 2A VCC_DDR (S0, S1, S3) 0.9V VTT_DDR REGULATOR 0.2A NB RS780 VCC_1V2 (S0, S1) 1.2V VCC Linear REGULATOR +1.8V_S0 (S0, S1) VDDHT/RX 1.1V 1.2A VDDHTTX 1.2V 0.5A VDDPCIE 1.1V 2A NB CORE VDDC 1.1V VDDA18PCIE 1.8V 0.9A PLLs 1.8V 0.1A 7A VDD18/VDD18_MEM 0.01A 1.8V VDD_MEM 1.8V/1.5V 0.5A AVDD 3.3V 0.135A C C SB700 X4 PCI-E VCC3_SB Linear REGULATOR 0.8A ATA I/O VCC3_SB (S0, S1, S3, S5) 0.5A ATA PLL 0.01A PCI-E PVDD 80mA SB CORE 0.6A CLOCK +1.2VSB (S0, S1) 1.2V_SB Linear REGULATOR 1.2V S5 PW 0.22A 3.3V S5 PW 0.01A USB CORE I/O 0.2A 3.3V I/O 0.45A VCC3_SB (S0, S1, S3, S5) VCC3 (S0, S1) +5VA Linear REGULATOR B B AUDIO CODEC 5VDUAL Linear REGULATOR +5VA (S0, S1) 3.3V CORE 0.1A 5V ANALOG 0.1A SUPER I/O VCC3_SB (S0, S1, S3, S5) +3.3VDUAL (S3) 0.01A PCI Slot (per slot) A X1 PCIE per X16 PCIE per 5V 5.0A 3.3V 3.0A 3.3V 3.0A 3.3V 7.6A 12V 0.5A 12V 5.5A 12V 0.5A 3.3Vaux 0.1A 3.3VDual -12V 3.3VDual 0.1A USB X6 FR USB X6 RL 2XPS/2 ENTHENET +3.3V (S0, S1) 0.01A +5V (S0, S1) 0.1A IEEE-1394 x1 VDD VDD 5VDual 3.3V (S3) 0.1A 3.3V (S0, S1) 0.1A 5VDual 5VDual 0.5A 3.3V (S0, S1) 0.5A 12V (S0, S1) 1.1A 3.0A 3.0A A 0.375A 0.1A MICRO-START INT'L CO.,LTD Title Power Deliver Chart Size C Document Number Date: Thursday, August 16, 2007 Rev L-A780 0B Sheet of 35 Intersil 6323 Phase +12VIN VIN VCC5 +12VIN R51 2.2R0805 PWM_EN C0.1U16Y0402 C20 R19 OFS 59KR1%0402 R28 X_10KR0402 2.2R1%0805 22 23 ISEN2+ ISEN2PHASE22 PWM3 35 PWM3 ISEN3+ ISEN3- 44 43 ISEN3+ ISEN3PHASE33 16 14 R47 X_100KR0402 PWM4 36 46 45 ISEN2 1R0805 C54 R64 4.32KR1%0402 BOOT_NB 40 39 38 41 RESET OFS ISEN_NB 47 FS R152 10KR0402 Q20 N-NTD4809NT4G_DPAK3-RH Q21 N-P0903BD_TO252 G L_G2 1 EC12 1+ G EC15 1+ CH-0.25u40A0.65m-RH CHOKE4 2 CP43 C207 C1000P50X0402 C X_CD1800U6.3EL20-2 VCCP EC16 1+ R153 2.2R1%0805 CD1800U6.3EL20-2 CP42 EC18 1+ CD1800U6.3EL20-2 VCC5 PHASE22 ISEN2 R70 2.2R1%0805 C1U25X0805 R68 C51 2.2R1%0805 UGATE_NB PHASE_NB LGATE_NB X_CD1800U6.3EL20-2 +12VIN C0.1U25X VIN EC24 1+ CD1800U6.3EL20-2 R191 2.2R0805 X_6.2KR1%0402 PHASE_NB_A U11 ISEN_NB_A R62 5.6KR1%0402 EC19 1+ +12VIN R75 ISL6323CRZ_QFN48-RH CD1800U6.3EL20-2 Disable PWM4 Use 3phase 42 UGATE_NB PHASE_NB LGATE_NB S C10u16Y1206 PHASE2 ISEN3 0R0402 C1U16X5 G D R65 R151 C149 S R30 4.32KR1%0402 U_G2 S 150R1%0402 C3 D R31 C140 RGND APA D D 1+ CD1800U6.3EL20-2 C0.1U16Y0402 R45 120KR1%0402 C53 C0.1U16Y0402 VCC PVCC C271 C1U25X0805 PWM3 BOTTOM PAD CONNECT TO GND Through VIAs UGATE BOOT PHASE U_G3 R186 2.2R1%0805 R176 Q28 N-P0903BD_TO252 G L_G3 LGATE C1U16X5 C10u16Y1206 EC26 1+ ISL6612ACBZT_SOIC8-RH X_CD1800U6.3EL20-2 G R175 10KR0402 C260 C0.1U25X C223 Q23 N-NTD4809NT4G_DPAK3-RH PHASE3 GND PWM 1R0805 C211 N-P0903BD_TO252 Q27 B EC9 ISEN2+ ISEN2- C27 VCCP VIN UGATE2 PHASE2 LGATE2 U_G2 PHASE2 L_G2 C0.1U16Y0402 C0.1U25X ISEN1 R46 C5 27 26 25 28 PVCC_NB 11 VCC5 BOOT2 ISEN4+ ISEN4- CP40 G CH-0.25u40A0.65m-RH CHOKE6 R180 2.2R1%0805 CP45 C264 C1000P50X0402 VCCP VCC5 R32 4.32KR1%0402 RCOMP VSEN CP41 C133 C1000P50X0402 ISEN1 200R1%0402 C52 VRM_SET G VCC5 FB C0.1U16Y0402 C22 56KR1%0402 VCCP PHASE11 R33 C0.1U16Y0402 R16 4.99KR1%0402 19 R37 ISEN1+ ISEN1PHASE11 C0.1U25X R138 2.2R1%0805 CP44 B 12 C30 X_C0.1U16Y0402 X_C0.1U16Y0402 CH-0.25u40A0.65m-RH CHOKE2 2 C24 R42 100R0402 20 21 C41 D COREFB- D S 13 COREFB- 2.2R1%0805 D 17 C0.01U16X0402 15 COREFB+ ISEN1+ ISEN1- COMP C33P50N0402 C19 C26 X_C0.1U16Y0402 18 R17 1.3KR1%0402 COREFB+ UGATE1 PHASE1 LGATE1 U_G1 PHASE1 L_G1 N-P0903BD_TO252 Q22 R5 100R0402 C7 C0.01U16X0402 C23 R52 C0.1U16Y0402 C55 X_470R1%0402 R18 C8 X_C1000P50X0402 560R1%0402-RH R4 31 32 33 30 S 1.2KR1%0402 R34 VCCP R50 100R0402 RGND_NB GND V_GND 29 BOOT1 C0.1U16Y0402 C4 VSEN_NB C38 X_C0.1U16Y0402 X_C0.1U16Y0402 FB_NB X_0R0402 PVCC1_2 COMP_NB 0R0402 C39 C EN VDDPWRGD PWROK VID5 VID4 VID3/SVC VID2/SVD VID1/SEL VID0/VFIXEN L_G1 D C10P50N0402 Q16 N-P0903BD_TO252 G S 24 37 34 C0.01U16X0402 C48 48 49 V_NB PHASE1 S C44 ISEN_NB_A C40 R53 X_C0.1U16Y0402 R54 Q14 N-NTD4809NT4G_DPAK3-RH C35 C0.1U16Y0402 C6 R69 1.2KR1%0402 C10u16Y1206 G D 0R0402 R57 X_470R1%0402 R59 360R1%0402 R58 100R0402 R49 1R0805 C96 C1U16X5 N-P0903BD_TO252 Q17 7X7 QFN U1 X_C680P50X0402 C42 R137 C101 C1U16X5 R63 10KR0402 27 VRM_GD 15,34 NB_PWRGD_NB VID5 VID4 VID3_SVC VID2_SVD VID1_SEL VID0 CPU_VDDNB U_G1 R136 10KR0402 C32 C4.7U10Y0805 10 R36 X_1KR0402 VCC 27 PWM_EN VCC5 D R39 2.2R0805 S R38 X_10KR0402 S D PHASE33 ISEN3 Q5 N-MMBT3904_NL_SOT23 LGATE_NB 2 Q7 N-P0903BD_TO252 1R0805 G EC4 1+ CH-0.5u40A0.93m-RH CHOKE1 2 X_CD1800U6.3EL20-2 CPU_VDDNB EC7 1+ R101 2.2R1%0805 CP39 C60 C1000P50X0402 C0.1U16Y0402 C270 X_CD1000U16EL20-2 EC6 + CD1000U16EL20-2 EC17 + CD1000U16EL20-2 EC28 + R77 1+ CD1800U6.3EL20-2 S CH-1.2U18A-LF CD1000U16EL20-2 EC10 + X_C0.01u25X0402 C284 A EC5 B VIN CHOKE7 C10u16Y1206 G R118 10KR0402 S 1KR0402 E R82 1R0805 C59 C1U16X5 PHASE_NB C Q4 N-2N7002_SOT23 G D PWR-2X2M_natural-RH R120 C56 UGATE_NB R100 10KR0402 CPU_CORE_TYPE +12VIN Q6 N-P0903BD_TO252 R78 27R0402 CD1800U6.3EL20-2 CP38 GND C283 X_C0.01u25X0402 CPU_VDDNB LOW FOR SVID VCC3_SB 12V VID1_SEL 300R0402 D R66 VCC_DDR S GND D 12V +12VIN VIN JPW1 PHASE_NB_A ISEN_NB_A A MICRO-START INT'L CO.,LTD Title Intersil 6323 Phase Size C Document Number Date: Friday, August 24, 2007 Rev L-A780 0B Sheet of 35 HT_CADIN_H[15 0] 13 HT_CADIN_H[15 0] HT_CADIN_L[15 0] 13 HT_CADIN_L[15 0] VCC_DDR VDDA25 HT_CADOUT_H[15 0] 13 HT_CADOUT_H[15 0] VDDA_25 VDDA25 HT_CADOUT_L[15 0] 13 HT_CADOUT_L[15 0] C84 C3900P50X D CPU1A C77 C69 C89 C74 R80 300R0402 47n300mA_0805-RH-2 VID3_SVC VID2_SVD R72 R71 1KR0402 1KR0402 D CPU1D 23 CPU_CLK MISC HYPERTRANSPORT C CPU_CORE_TYPE L5 13 13 13 13 HT_CLKIN_H1 HT_CLKIN_L1 HT_CLKIN_H0 HT_CLKIN_L0 N6 P6 N3 N2 L0_CLKIN_H(1) L0_CLKIN_L(1) L0_CLKIN_H(0) L0_CLKIN_L(0) L0_CLKOUT_H(1) L0_CLKOUT_L(1) L0_CLKOUT_H(0) L0_CLKOUT_L(0) AD5 AD4 AD1 AC1 HT_CLKOUT_H1 HT_CLKOUT_L1 HT_CLKOUT_H0 HT_CLKOUT_L0 13 13 13 13 13 13 13 13 HT_CTLIN_H1 HT_CTLIN_L1 HT_CTLIN_H0 HT_CTLIN_L0 V4 V5 U1 V1 L0_CTLIN_H(1) L0_CTLIN_L(1) L0_CTLIN_H(0) L0_CTLIN_L(0) L0_CTLOUT_H(1) L0_CTLOUT_L(1) L0_CTLOUT_H(0) L0_CTLOUT_L(0) Y6 W6 W2 W3 HT_CTLOUT_H1 HT_CTLOUT_L1 HT_CTLOUT_H0 HT_CTLOUT_L0 13 13 13 13 HT_CADIN_H15 HT_CADIN_L15 HT_CADIN_H14 HT_CADIN_L14 HT_CADIN_H13 HT_CADIN_L13 HT_CADIN_H12 HT_CADIN_L12 HT_CADIN_H11 HT_CADIN_L11 HT_CADIN_H10 HT_CADIN_L10 HT_CADIN_H9 HT_CADIN_L9 HT_CADIN_H8 HT_CADIN_L8 U6 V6 T4 T5 R6 T6 P4 P5 M4 M5 L6 M6 K4 K5 J6 K6 L0_CADIN_H(15) L0_CADIN_L(15) L0_CADIN_H(14) L0_CADIN_L(14) L0_CADIN_H(13) L0_CADIN_L(13) L0_CADIN_H(12) L0_CADIN_L(12) L0_CADIN_H(11) L0_CADIN_L(11) L0_CADIN_H(10) L0_CADIN_L(10) L0_CADIN_H(9) L0_CADIN_L(9) L0_CADIN_H(8) L0_CADIN_L(8) L0_CADOUT_H(15) L0_CADOUT_L(15) L0_CADOUT_H(14) L0_CADOUT_L(14) L0_CADOUT_H(13) L0_CADOUT_L(13) L0_CADOUT_H(12) L0_CADOUT_L(12) L0_CADOUT_H(11) L0_CADOUT_L(11) L0_CADOUT_H(10) L0_CADOUT_L(10) L0_CADOUT_H(9) L0_CADOUT_L(9) L0_CADOUT_H(8) L0_CADOUT_L(8) Y5 Y4 AB6 AA6 AB5 AB4 AD6 AC6 AF6 AE6 AF5 AF4 AH6 AG6 AH5 AH4 HT_CADOUT_H15 HT_CADOUT_L15 HT_CADOUT_H14 HT_CADOUT_L14 HT_CADOUT_H13 HT_CADOUT_L13 HT_CADOUT_H12 HT_CADOUT_L12 HT_CADOUT_H11 HT_CADOUT_L11 HT_CADOUT_H10 HT_CADOUT_L10 HT_CADOUT_H9 HT_CADOUT_L9 HT_CADOUT_H8 HT_CADOUT_L8 HT_CADIN_H7 HT_CADIN_L7 HT_CADIN_H6 HT_CADIN_L6 HT_CADIN_H5 HT_CADIN_L5 HT_CADIN_H4 HT_CADIN_L4 HT_CADIN_H3 HT_CADIN_L3 HT_CADIN_H2 HT_CADIN_L2 HT_CADIN_H1 HT_CADIN_L1 HT_CADIN_H0 HT_CADIN_L0 U3 U2 R1 T1 R3 R2 N1 P1 L1 M1 L3 L2 J1 K1 J3 J2 L0_CADIN_H(7) L0_CADIN_L(7) L0_CADIN_H(6) L0_CADIN_L(6) L0_CADIN_H(5) L0_CADIN_L(5) L0_CADIN_H(4) L0_CADIN_L(4) L0_CADIN_H(3) L0_CADIN_L(3) L0_CADIN_H(2) L0_CADIN_L(2) L0_CADIN_H(1) L0_CADIN_L(1) L0_CADIN_H(0) L0_CADIN_L(0) L0_CADOUT_H(7) L0_CADOUT_L(7) L0_CADOUT_H(6) L0_CADOUT_L(6) L0_CADOUT_H(5) L0_CADOUT_L(5) L0_CADOUT_H(4) L0_CADOUT_L(4) L0_CADOUT_H(3) L0_CADOUT_L(3) L0_CADOUT_H(2) L0_CADOUT_L(2) L0_CADOUT_H(1) L0_CADOUT_L(1) L0_CADOUT_H(0) L0_CADOUT_L(0) Y1 W1 AA2 AA3 AB1 AA1 AC2 AC3 AE2 AE3 AF1 AE1 AG2 AG3 AH1 AG1 HT_CADOUT_H7 HT_CADOUT_L7 HT_CADOUT_H6 HT_CADOUT_L6 HT_CADOUT_H5 HT_CADOUT_L5 HT_CADOUT_H4 HT_CADOUT_L4 HT_CADOUT_H3 HT_CADOUT_L3 HT_CADOUT_H2 HT_CADOUT_L2 HT_CADOUT_H1 HT_CADOUT_L1 HT_CADOUT_H0 HT_CADOUT_L0 C91 C3900P50X C10 C0.1U16Y0402 C1U10Y D10 C4.7U10Y0805 C3300P50X0402 CPUCLKIN A8 CPUCLKIN# B8 R121 169R1%0402 23 CPU_CLK# LDT_PWRGD LDT_STOP# LDT_RST# 17 LDT_PWRGD 15,17 LDT_STOP# 15,17 LDT_RST# C9 D8 C7 CPU_PRESENT_L CPU_SIC CPU_SID R146 AL6 AK6 AL4 X_0R0402 AK4 CPU_TDI CPU_TRST_L CPU_TCK CPU_TMS 6 VCC_DDR R162 39.2R1%0402 CPU_M_VREF COREFB+ COREFB- TP1 AL10 AJ10 AH10 AL9 KEY/VSS1 KEY/VSS2 F2 G5 CPU_PF_TYPE CPU_CORE_TYPE PWROK LDTSTOP_L RESET_L VID(5) VID(4) SVC/VID(3) SVD/VID(2) PVIEN/VID(1) CPU_PRESENT_L VID(0) D2 D1 C1 E3 E2 E1 VID5 VID4 VID3_SVC VID2_SVD VID1_SEL VID0 SIC SID ALERT_L SA0 AG9 AG8 AK7 AL7 CPU_THRIP_L# PROCHOT_L AK10 CPU_TDO B6 CPU_DBRDY THERMDC THERMDA THERMTRIP_L PROCHOT_L TDI TRST_L TCK TMS TDO A5 DBREQ_L COREFB+ COREFB- G2 G1 VDD_FB_H VDD_FB_L CPU_VTT_SENSE E12 CPU_TEST25_H CPU_TEST25_L F12 AH11 AJ11 H22 AE9 CLKIN_H PLATFORM_TYPE CLKIN_L CORE_TYPE CPU_DBREQ_L CPU_STRAP_HI_E11 CPU_STRAP_LO_F11 R160 39.2R1%0402 AL3 VDDA1 VDDA2 DBRDY VDDIO_FB_H VDDIO_FB_L VDDNB_FB_H VDDNB_FB_L VTT_SENSE M_VREF M_ZN M_ZP PSI_L TP22 TP21 A10 B10 F10 E9 AJ7 F6 TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TP19 TP20 TP23 TP18 TP25 D6 E7 F8 C5 AH9 TEST17 TEST16 TEST15 TEST14 TEST12 E5 AJ5 TEST7 TEST6 AH7 AJ6 TEST3 TEST2 CPU_CORE_TYPE THERMDC_CPU 26,33 THERMDA_CPU 26,33 R102 0R0402 R163 100R0402 TP4 F1 CPU_PSI_L HTREF1 HTREF2 TEST29_H TEST29_L C11 D11 R123 TEST24 TEST23 TEST22 TEST21 TEST20 AK8 AH8 AJ9 AL8 AJ8 TEST28_H TEST28_L TEST27 TEST26 TEST10 TEST8 J10 H9 AK9 AK5 G7 D4 VID5 VID4 VID3_SVC VID2_SVD VID1_SEL VID0 AK11 AL11 G4 G3 V8 V7 HTREF1 HTREF0 TP2 17 VCC_DDR V_NB V_GND VCC_1V2 TP3 R168 R171 CPU_PROCHOT# C 44.2R1% 44.2R1% 80.6R1%0402 Keep trace < 1" from CPU TP28 TP24 TP27 R531 300R0402 TP26 R165 300R0402 VCC_DDR B B AMD REQUEST SCLK VCC_DDR R177 R182 X_0R0402 Q29 D 1KR0402 Q30 N-2N7002_SOT23 X_SW-TACT4PS X_100R0402 R8 LDT_RST_L A 10,11,18,23,27,33 SDATA CPU_M_VREF R174 39.2KR1%0402 R184 20KR1%0402 C255 C0.1U16Y0402 R110 15R1% VCC3 R169 300R0402 R166 4.7KR0402 R109 G R178 X_0R0402 D CPU_SID S Q26 N-2N7002_SOT23 CPU_THRIP_L# E C Q24 N-MMBT3904_NL_SOT23 C86 C92 15R1% C0.1U16Y0402 CPU_THRIP# C1000P50X0402 27 CPU_FETGATE VCC_DDR J1 11 13 15 17 19 21 23 CPU_DBREQ_L CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST_L CPU_TDO LDT_RST# E C Q1 X_N-MMBT3904_NL_SOT23 X_0R0402 VCC_DDR KEY G SW1 R183 19 TALERT# G CPU_FETGATE D R21 X_4.7KR0402 B R22 X_1KR0402 VCC_DDR N-2N7002_SOT23 CPU_SIC S B 10,11,18,23,27,33 G VCC_DDR S VCC3 10 12 14 16 18 20 22 24 26 19,33 CPU_PRESENT# CPU_PRESENT# D Q25 CPU_PRESENT_L S N-2N7002_SOT23 For SIC/SID A VCC_DDR LDT_RST_L CPU_SIC CPU_PRESENT_L CPU_TEST25_H X_H2X13[25]_black CPU_TEST25_L R167 R170 R111 R119 1KR0402 1KR0402 510R0402 VCC_DDR LDT_STOP# LDT_RST# LDT_PWRGD PROCHOT_L 510R0402 R106 R105 R107 R103 300R0402 300R0402 300R0402 300R0402 HTREF1 C227 X_C1000P50X0402 HTREF2 C228 X_C1000P50X0402 LDT_RST# C67 MICRO-START INT'L CO.,LTD Title CPU AM2 HT I/F,CTRL&DEBUG X_C1000P50X0402 Size Document Number Custom L-A780 Date: Rev 0B Sheet Friday, August 24, 2007 of 35 10,11 MEM_MA_DQS_L[7 0] 10,11 MEM_MA_DQS_H[7 0] 10,11 MEM_MB_DQS_L[7 0] 10,11 MEM_MA_DM[7 0] 10,11 MEM_MB_DQS_H[7 0] 10,11 MEM_MB_DM[7 0] D D CPU1B 10,12 10,12 10,12 10,12 10,12 10,12 MEM_MA0_CLK_H2 MEM_MA0_CLK_L2 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1 MEM_MA0_CLK_H0 MEM_MA0_CLK_L0 10,12 MEM_MA0_CS_L1 10,12 MEM_MA0_CS_L0 10,12 MEM_MA0_ODT0 11,12 11,12 11,12 11,12 11,12 11,12 MEM_MA1_CLK_H2 MEM_MA1_CLK_L2 MEM_MA1_CLK_H1 MEM_MA1_CLK_L1 MEM_MA1_CLK_H0 MEM_MA1_CLK_L0 11,12 MEM_MA1_CS_L1 11,12 MEM_MA1_CS_L0 11,12 MEM_MA1_ODT0 C 10,11,12 MEM_MA_CAS_L 10,11,12 MEM_MA_WE_L 10,11,12 MEM_MA_RAS_L 10,11,12 MEM_MA_BANK2 10,11,12 MEM_MA_BANK1 10,11,12 MEM_MA_BANK0 AG21 AG20 G19 H19 U27 U26 MA0_CLK_H(2) MA0_CLK_L(2) MA0_CLK_H(1) MA0_CLK_L(1) MA0_CLK_H(0) MA0_CLK_L(0) MEM_MA0_CS_L1 MEM_MA0_CS_L0 AC25 AA24 MA0_CS_L(1) MA0_CS_L(0) MEM_MA0_ODT0 AC28 MA0_ODT(0) MEM_MA1_CLK_H2 MEM_MA1_CLK_L2 MEM_MA1_CLK_H1 MEM_MA1_CLK_L1 MEM_MA1_CLK_H0 MEM_MA1_CLK_L0 AE20 AE19 G20 G21 V27 W27 MA1_CLK_H(2) MA1_CLK_L(2) MA1_CLK_H(1) MA1_CLK_L(1) MA1_CLK_H(0) MA1_CLK_L(0) MEM_MA1_CS_L1 MEM_MA1_CS_L0 AD27 AA25 MA1_CS_L(1) MA1_CS_L(0) MEM_MA1_ODT0 AC27 MA1_ODT(0) MEM_MA_CAS_L MEM_MA_WE_L MEM_MA_RAS_L AB25 AB27 AA26 MA_CAS_L MA_WE_L MA_RAS_L MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0 N25 Y27 AA27 MA_BANK(2) MA_BANK(1) MA_BANK(0) MEM_MA_CKE1 MEM_MA_CKE0 11,12 MEM_MA_CKE1 10,12 MEM_MA_CKE0 10,11,12 MEM_MA_ADD[15 0] B CPU1C MEMORY INTERFACE A MEM_MA0_CLK_H2 MEM_MA0_CLK_L2 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1 MEM_MA0_CLK_H0 MEM_MA0_CLK_L0 L27 M25 MA_CKE(1) MA_CKE(0) MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0 M27 N24 AC26 N26 P25 Y25 N27 R24 P27 R25 R26 R27 T25 U25 T27 W24 MA_ADD(15) MA_ADD(14) MA_ADD(13) MA_ADD(12) MA_ADD(11) MA_ADD(10) MA_ADD(9) MA_ADD(8) MA_ADD(7) MA_ADD(6) MA_ADD(5) MA_ADD(4) MA_ADD(3) MA_ADD(2) MA_ADD(1) MA_ADD(0) MEM_MA_DQS_H7 MEM_MA_DQS_L7 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H0 MEM_MA_DQS_L0 AD15 AE15 AG18 AG19 AG24 AG25 AG27 AG28 D29 C29 C25 D25 E19 F19 F15 G15 MA_DQS_H(7) MA_DQS_L(7) MA_DQS_H(6) MA_DQS_L(6) MA_DQS_H(5) MA_DQS_L(5) MA_DQS_H(4) MA_DQS_L(4) MA_DQS_H(3) MA_DQS_L(3) MA_DQS_H(2) MA_DQS_L(2) MA_DQS_H(1) MA_DQS_L(1) MA_DQS_H(0) MA_DQS_L(0) MEM_MA_DM7 MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0 AF15 AF19 AJ25 AH29 B29 E24 E18 H15 MA_DM(7) MA_DM(6) MA_DM(5) MA_DM(4) MA_DM(3) MA_DM(2) MA_DM(1) MA_DM(0) MA_DATA(63) MA_DATA(62) MA_DATA(61) MA_DATA(60) MA_DATA(59) MA_DATA(58) MA_DATA(57) MA_DATA(56) MA_DATA(55) MA_DATA(54) MA_DATA(53) MA_DATA(52) MA_DATA(51) MA_DATA(50) MA_DATA(49) MA_DATA(48) MA_DATA(47) MA_DATA(46) MA_DATA(45) MA_DATA(44) MA_DATA(43) MA_DATA(42) MA_DATA(41) MA_DATA(40) MA_DATA(39) MA_DATA(38) MA_DATA(37) MA_DATA(36) MA_DATA(35) MA_DATA(34) MA_DATA(33) MA_DATA(32) MA_DATA(31) MA_DATA(30) MA_DATA(29) MA_DATA(28) MA_DATA(27) MA_DATA(26) MA_DATA(25) MA_DATA(24) MA_DATA(23) MA_DATA(22) MA_DATA(21) MA_DATA(20) MA_DATA(19) MA_DATA(18) MA_DATA(17) MA_DATA(16) MA_DATA(15) MA_DATA(14) MA_DATA(13) MA_DATA(12) MA_DATA(11) MA_DATA(10) MA_DATA(9) MA_DATA(8) MA_DATA(7) MA_DATA(6) MA_DATA(5) MA_DATA(4) MA_DATA(3) MA_DATA(2) MA_DATA(1) MA_DATA(0) AE14 AG14 AG16 AD17 AD13 AE13 AG15 AE16 AG17 AE18 AD21 AG22 AE17 AF17 AF21 AE21 AF23 AE23 AJ26 AG26 AE22 AG23 AH25 AF25 AJ28 AJ29 AF29 AE26 AJ27 AH27 AG29 AF27 E29 E28 D27 C27 G26 F27 C28 E27 F25 E25 E23 D23 E26 C26 G23 F23 E22 E21 F17 G17 G22 F21 G18 E17 G16 E15 G13 H13 H17 E16 E14 G14 MA_DQS_H(8) MA_DQS_L(8) J28 J27 MA_DM(8) J25 MA_CHECK(7) MA_CHECK(6) MA_CHECK(5) MA_CHECK(4) MA_CHECK(3) MA_CHECK(2) MA_CHECK(1) MA_CHECK(0) K25 J26 G28 G27 L24 K27 H29 H27 MEM_MA_DATA63 MEM_MA_DATA62 MEM_MA_DATA61 MEM_MA_DATA60 MEM_MA_DATA59 MEM_MA_DATA58 MEM_MA_DATA57 MEM_MA_DATA56 MEM_MA_DATA55 MEM_MA_DATA54 MEM_MA_DATA53 MEM_MA_DATA52 MEM_MA_DATA51 MEM_MA_DATA50 MEM_MA_DATA49 MEM_MA_DATA48 MEM_MA_DATA47 MEM_MA_DATA46 MEM_MA_DATA45 MEM_MA_DATA44 MEM_MA_DATA43 MEM_MA_DATA42 MEM_MA_DATA41 MEM_MA_DATA40 MEM_MA_DATA39 MEM_MA_DATA38 MEM_MA_DATA37 MEM_MA_DATA36 MEM_MA_DATA35 MEM_MA_DATA34 MEM_MA_DATA33 MEM_MA_DATA32 MEM_MA_DATA31 MEM_MA_DATA30 MEM_MA_DATA29 MEM_MA_DATA28 MEM_MA_DATA27 MEM_MA_DATA26 MEM_MA_DATA25 MEM_MA_DATA24 MEM_MA_DATA23 MEM_MA_DATA22 MEM_MA_DATA21 MEM_MA_DATA20 MEM_MA_DATA19 MEM_MA_DATA18 MEM_MA_DATA17 MEM_MA_DATA16 MEM_MA_DATA15 MEM_MA_DATA14 MEM_MA_DATA13 MEM_MA_DATA12 MEM_MA_DATA11 MEM_MA_DATA10 MEM_MA_DATA9 MEM_MA_DATA8 MEM_MA_DATA7 MEM_MA_DATA6 MEM_MA_DATA5 MEM_MA_DATA4 MEM_MA_DATA3 MEM_MA_DATA2 MEM_MA_DATA1 MEM_MA_DATA0 MEM_MA_DATA[63 0] 10,11 10,12 10,12 10,12 10,12 10,12 10,12 MEM_MB0_CLK_H2 MEM_MB0_CLK_L2 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1 MEM_MB0_CLK_H0 MEM_MB0_CLK_L0 10,12 MEM_MB0_CS_L1 10,12 MEM_MB0_CS_L0 10,12 MEM_MB0_ODT0 11,12 11,12 11,12 11,12 11,12 11,12 MEM_MB1_CLK_H2 MEM_MB1_CLK_L2 MEM_MB1_CLK_H1 MEM_MB1_CLK_L1 MEM_MB1_CLK_H0 MEM_MB1_CLK_L0 11,12 MEM_MB1_CS_L1 11,12 MEM_MB1_CS_L0 11,12 MEM_MB1_ODT0 10,11,12 MEM_MB_CAS_L 10,11,12 MEM_MB_WE_L 10,11,12 MEM_MB_RAS_L 10,11,12 MEM_MB_BANK2 10,11,12 MEM_MB_BANK1 10,11,12 MEM_MB_BANK0 11,12 MEM_MB_CKE1 10,12 MEM_MB_CKE0 10,11,12 MEM_MB_ADD[15 0] MEMORY INTERFACE B MEM_MB0_CLK_H2 MEM_MB0_CLK_L2 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1 MEM_MB0_CLK_H0 MEM_MB0_CLK_L0 AJ19 AK19 A18 A19 U31 U30 MB0_CLK_H(2) MB0_CLK_L(2) MB0_CLK_H(1) MB0_CLK_L(1) MB0_CLK_H(0) MB0_CLK_L(0) MEM_MB0_CS_L1 MEM_MB0_CS_L0 AE30 AC31 MB0_CS_L(1) MB0_CS_L(0) MEM_MB0_ODT0 AD29 MB0_ODT(0) MEM_MB1_CLK_H2 MEM_MB1_CLK_L2 MEM_MB1_CLK_H1 MEM_MB1_CLK_L1 MEM_MB1_CLK_H0 MEM_MB1_CLK_L0 AL19 AL18 C19 D19 W29 W28 MB1_CLK_H(2) MB1_CLK_L(2) MB1_CLK_H(1) MB1_CLK_L(1) MB1_CLK_H(0) MB1_CLK_L(0) MEM_MB1_CS_L1 MEM_MB1_CS_L0 AE29 AB31 MB1_CS_L(1) MB1_CS_L(0) MEM_MB1_ODT0 AD31 MB1_ODT(0) MEM_MB_CAS_L MEM_MB_WE_L MEM_MB_RAS_L AC29 AC30 AB29 MB_CAS_L MB_WE_L MB_RAS_L MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0 N31 AA31 AA28 MB_BANK(2) MB_BANK(1) MB_BANK(0) MEM_MB_CKE1 MEM_MB_CKE0 M31 M29 MB_CKE(1) MB_CKE(0) MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0 N28 N29 AE31 N30 P29 AA29 P31 R29 R28 R31 R30 T31 T29 U29 U28 AA30 MB_ADD(15) MB_ADD(14) MB_ADD(13) MB_ADD(12) MB_ADD(11) MB_ADD(10) MB_ADD(9) MB_ADD(8) MB_ADD(7) MB_ADD(6) MB_ADD(5) MB_ADD(4) MB_ADD(3) MB_ADD(2) MB_ADD(1) MB_ADD(0) MEM_MB_DQS_H7 MEM_MB_DQS_L7 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H0 MEM_MB_DQS_L0 AK13 AJ13 AK17 AJ17 AK23 AL23 AL28 AL29 D31 C31 C24 C23 D17 C17 C14 C13 MB_DQS_H(7) MB_DQS_L(7) MB_DQS_H(6) MB_DQS_L(6) MB_DQS_H(5) MB_DQS_L(5) MB_DQS_H(4) MB_DQS_L(4) MB_DQS_H(3) MB_DQS_L(3) MB_DQS_H(2) MB_DQS_L(2) MB_DQS_H(1) MB_DQS_L(1) MB_DQS_H(0) MB_DQS_L(0) MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0 AJ14 AH17 AJ23 AK29 C30 A23 B17 B13 MB_DM(7) MB_DM(6) MB_DM(5) MB_DM(4) MB_DM(3) MB_DM(2) MB_DM(1) MB_DM(0) MB_DATA(63) MB_DATA(62) MB_DATA(61) MB_DATA(60) MB_DATA(59) MB_DATA(58) MB_DATA(57) MB_DATA(56) MB_DATA(55) MB_DATA(54) MB_DATA(53) MB_DATA(52) MB_DATA(51) MB_DATA(50) MB_DATA(49) MB_DATA(48) MB_DATA(47) MB_DATA(46) MB_DATA(45) MB_DATA(44) MB_DATA(43) MB_DATA(42) MB_DATA(41) MB_DATA(40) MB_DATA(39) MB_DATA(38) MB_DATA(37) MB_DATA(36) MB_DATA(35) MB_DATA(34) MB_DATA(33) MB_DATA(32) MB_DATA(31) MB_DATA(30) MB_DATA(29) MB_DATA(28) MB_DATA(27) MB_DATA(26) MB_DATA(25) MB_DATA(24) MB_DATA(23) MB_DATA(22) MB_DATA(21) MB_DATA(20) MB_DATA(19) MB_DATA(18) MB_DATA(17) MB_DATA(16) MB_DATA(15) MB_DATA(14) MB_DATA(13) MB_DATA(12) MB_DATA(11) MB_DATA(10) MB_DATA(9) MB_DATA(8) MB_DATA(7) MB_DATA(6) MB_DATA(5) MB_DATA(4) MB_DATA(3) MB_DATA(2) MB_DATA(1) MB_DATA(0) AH13 AL13 AL15 AJ15 AF13 AG13 AL14 AK15 AL16 AL17 AK21 AL21 AH15 AJ16 AH19 AL20 AJ22 AL22 AL24 AK25 AJ21 AH21 AH23 AJ24 AL27 AK27 AH31 AG30 AL25 AL26 AJ30 AJ31 E31 E30 B27 A27 F29 F31 A29 A28 A25 A24 C22 D21 A26 B25 B23 A22 B21 A20 C16 D15 C21 A21 A17 A16 B15 A14 E13 F13 C15 A15 A13 D13 MB_DQS_H(8) MB_DQS_L(8) J31 J30 MB_DM(8) J29 MB_CHECK(7) MB_CHECK(6) MB_CHECK(5) MB_CHECK(4) MB_CHECK(3) MB_CHECK(2) MB_CHECK(1) MB_CHECK(0) K29 K31 G30 G29 L29 L28 H31 G31 MEM_MB_DATA[63 0] 10,11 MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10 MEM_MB_DATA9 MEM_MB_DATA8 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA1 MEM_MB_DATA0 C B A A MICRO-START INT'L CO.,LTD Title CPU AM2 DDR MEMORY I/F Size Document Number Custom L-A780 Date: Rev 0B Sheet Friday, August 24, 2007 of 35 CPU AM2 PWR & GND VCCP CPU_VDDNB VCCP VCCP CPU1F A4 A6 B5 B7 C6 C8 D7 D9 E8 E10 F9 F11 G10 G12 D AA8 AA10 AA12 AA14 AA16 AA18 AB7 AB9 AB11 AC4 AC5 AC8 AC10 AD2 AD3 AD7 AD9 AE10 AF7 AF9 AG4 AG5 AG7 AH2 AH3 B3 C2 C4 D3 D5 E4 E6 F5 F7 G6 G8 H7 H11 H23 J8 J12 J14 J16 J18 J20 J22 J24 K7 K9 K11 K13 K15 K17 K19 K21 K23 L4 L5 L8 L10 L12 Y17 Y19 C B VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD31 VDD32 VDD35 VDD36 VDD39 VDD40 VDD43 VDD44 VDD47 VDD48 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 VDD73 VDD74 VDD75 VDD150 VDD151 CPU1H VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 A3 A7 A9 A11 AA4 AA5 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AA23 AB2 AB3 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC7 AC9 AC11 AC13 AC15 AC17 AC19 AC21 AC23 AD8 AD10 AD12 AD14 AD16 AD20 AD22 AD24 AE4 AE5 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS240 VSS241 AE11 AF2 AF3 AF8 AF10 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28 AG10 AG11 AH14 AH16 AH18 AH20 AH22 AH24 AH26 AH28 AH30 AK2 AK14 AK16 AK18 Y14 Y16 L14 L16 L18 M2 M3 M7 M9 M11 M13 M15 M17 M19 N8 N10 N12 N14 N16 N18 P7 P9 P11 P13 P15 P17 P19 R4 R5 R8 R10 R12 R14 R16 R18 R20 T2 T3 T7 T9 T11 T13 T15 T17 T19 T21 U8 U10 U12 U14 U16 U18 U20 V9 V11 V13 V15 V17 V19 V21 W4 W5 W8 W10 W12 W14 W16 W18 W20 Y2 Y3 Y7 Y9 Y11 Y13 Y15 Y21 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 VDD73 VDD74 VDD75 VDDIO VDD3 VDD2 VDDNB1 VDDNB2 VDDNB3 VDDNB4 VDDNB5 VDDNB6 VDDNB7 VDDNB8 VDDNB9 VDDNB10 VDDNB11 VDDNB12 VDDNB13 VDDNB14 CPU1I VCC_1V2 CPU1G VDD1 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 AK20 AK22 AK24 AK26 AK28 AK30 AL5 B4 B9 B11 B14 B16 B18 B20 B22 B24 B26 B28 B30 C3 D14 D16 D18 D20 D22 D24 D26 D28 D30 E11 F4 F14 F16 F18 F20 F22 F24 F26 F28 F30 G9 G11 H8 H10 H12 H14 H16 H18 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 H24 H26 H28 H30 J4 J5 J7 J9 J11 J13 J15 J17 J19 J21 J23 K2 K3 K8 K10 K12 K14 K16 K18 K20 K22 Y18 AA20 AA22 AB13 AB15 AB17 AB19 AB21 AB23 AC12 AC14 AC16 AC18 AC20 AC22 AD11 AD23 AE12 AF11 L20 L22 M21 M23 N20 N22 P21 P23 R22 T23 U22 V23 W22 Y23 Change to Passive Pin VCCP VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 GND GND GND GND GND GND GND VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 N17 N19 N21 N23 P2 P3 P8 P10 P12 P14 P16 P18 P20 P22 R7 R9 R11 R13 R15 R17 R19 R21 R23 T8 T10 T12 T14 T16 T18 T20 T22 U4 U5 U7 U9 U11 U13 U15 U17 U19 U21 U23 V2 V3 V10 V12 V14 V16 V18 V20 V22 W9 W11 W13 W15 W17 W19 W21 W23 Y8 Y10 Y12 W7 Y20 Y22 VTT_DDR VCC_DDR AJ4 AJ3 AJ2 AJ1 VLDT_A1 VLDT_A2 VLDT_A3 VLDT_A4 D12 C12 B12 A12 VTT1 VTT2 VTT3 VTT4 AB24 AB26 AB28 AB30 AC24 AD26 AD28 AD30 AF30 M24 M26 M28 M30 P24 P26 P28 P30 T24 T26 T28 T30 V25 V26 V28 V30 Y24 Y26 Y28 Y29 VLDT_B1 VLDT_B2 VLDT_B3 VLDT_B4 VTT5 VTT6 VTT7 VTT8 VTT9 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 VDDIO28 VDDIO29 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 H6 H5 H2 H1 VLDT_RUN_B VTT_DDR C120 C4.7U10Y0805 C116 X_C0.01U25Y AK12 AJ12 AH12 AG12 AL12 K24 K26 K28 K30 L7 L9 L11 L13 L15 L17 L19 L21 L23 M8 M10 M12 M14 M16 M18 M20 M22 N4 N5 N7 N9 N11 N13 N15 D VCCP EMI_0B C788 C790 C791 C792 X_C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 near (1900,-4700)*3, near C116*2 C B VCC_DDR Bottom side VCCP Bottom side CPU_VDDNB C88 C685 C789 C713 C698 C706 C689 C688 C700 C704 C693 C701 C694 C681 C697 C702 C684 C712 C705 C687 C690 C714 C2.2u10Y-RH C768 Bottom side C22u6.3X1206 C22u6.3X1206 C22u6.3X1206 C22u6.3X1206 C22u6.3X1206 X_C22u6.3X1206 X_C22u6.3X1206 X_C22u6.3X1206 X_C22u6.3X1206 X_C22u6.3X1206 C22u6.3X1206 VCC_DDR Place along the VCC_DDR/VSS plane splite Bottom side C682 C709 C686 C680 C703 C691 C711 C715 C710 C695 C699 C707 C696 X_C0.22U16X C10u6.3X50805 X_C10u6.3X50805 X_C10u6.3X50805 C10u6.3X50805 C4.7U10Y0805 X_C4.7U10Y0805 C0.01u16X-1 C0.22U16X X_C10u6.3X50805 X_C10u6.3X50805 C10u6.3X50805 C0.01u16X-1 C4.7U10Y0805 C234 C210 C131 C220 C2.2u10Y-RH C692 C2.2u10Y-RH C774 C180P50N0402 C4.7U10Y0805 X_C4.7U10Y0805 X_C4.7U10Y0805 C4.7U10Y0805 C180P50N0402 VTT_DDR VCC_DDR VTT_DDR Bottom side Place behind the DIMM Slot + CPU_VDDNB Bottom side TOP side, place close to CPU socket C81 C108 C79 C80 C111 C107 C716 C287 C267 C65 C130 C224 EC20 CD1000U6.3EL11.5 C110 X_C22u6.3X1206 C0.01u16X-1 C0.22U16X C679 C683 C50 C72 C132 VCCP C708 VCCP C114 VCC_DDR C22u6.3X1206 X_C22u6.3X1206 X_C0.22U16X C0.01u16X-1 X_C10u6.3X50805 C22u6.3X1206 X_C22u6.3X1206 C0.01u16X-1 C180p50N X_C0.22U16X C22u6.3X1206 C10u6.3X50805 X_C0.22U16X C4.7U10Y0805 X_C0.01U16X0402 X_C22u6.3X1206 C0.01u16X-1 X_C10u6.3X50805 X_C0.22U16X C0.01U16X0402 A X_C4.7U10Y0805 X_C4.7U10Y0805 C4.7U10Y0805 C4.7U10Y0805 VTT_DDR A C90 C66 C76 C233 C252 C61 C57 C258 C331 C245 C240 C68 Place between the DIMM Slot VCC_1V2 C236 C229 C244 C242 C249 C0.22u10Y0402 C0.22u10Y0402 X_C4.7U10Y0805 X_C4.7U10Y0805 C10u6.3X50805 C0.1U16Y0402 C0.22u10Y0402 X_C0.22u10Y0402 C0.01U16X0402 C4.7U10Y0805 C4.7U10Y0805 X_C0.1U16Y0402 C237 MICRO-START INT'L CO.,LTD Title X_C4.7U10Y0805 X_C0.22u10Y0402 X_C180P50N0402 C4.7U10Y0805 C0.22u10Y0402 C180P50N0402 CPU AM2 PWR & GND Size C Document Number Date: Friday, August 24, 2007 Rev L-A780 0B Sheet of 35 VCC_DDR VCC_DDR VCC3 VCC3 8,11 MEM_MB_DQS_H[7 0] 8,11 MEM_MA_DQS_H[7 0] 8,11 MEM_MB_DQS_L[7 0] MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0 WE# CAS# RAS# 73 74 192 MEM_MA_WE_L MEM_MA_CAS_L MEM_MA_RAS_L DM0/DQS9 NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17# 125 126 134 135 146 147 155 156 202 203 211 212 223 224 232 233 164 165 MEM_MA_DM0 ODT0 ODT1 195 77 MEM_MA0_ODT0 CKE0 CKE1 52 171 MEM_MA_CKE0 CS0# CS1# 193 76 MEM_MA0_CS_L0 MEM_MA0_CS_L1 CK0(DU) CK0#(DU) CK1(CK0) CK1#(CK0#) CK2(DU) CK2#(DU) 185 186 137 138 220 221 MEM_MA0_CLK_H0 MEM_MA0_CLK_L0 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1 MEM_MA0_CLK_H2 MEM_MA0_CLK_L2 SCL SDA X1 VREF X2 120 119 X1 X2 SCLK SDATA SA0 SA1 SA2 239 240 101 100 103 106 109 112 115 118 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 169 198 201 204 207 210 213 216 219 222 225 228 231 234 237 A MEM_MA_BANK2 8,11,12 MEM_MA_BANK1 8,11,12 MEM_MA_BANK0 8,11,12 MEM_MA_WE_L 8,11,12 MEM_MA_CAS_L 8,11,12 MEM_MA_RAS_L 8,11,12 MEM_MA_DM[7 0] 8,11 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 VDDR_VREF MEM_MA0_ODT0 8,12 11 14 17 20 23 26 29 32 35 38 41 44 47 50 65 66 79 82 85 88 91 94 97 MEM_MA_CKE0 8,12 MEM_MA0_CS_L0 8,12 MEM_MA0_CS_L1 8,12 MEM_MA0_CLK_H0 MEM_MA0_CLK_L0 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1 MEM_MA0_CLK_H2 MEM_MA0_CLK_L2 8,12 8,12 8,12 8,12 8,12 8,12 SCLK 7,11,18,23,27,33 SDATA 7,11,18,23,27,33 VDDR_VREF DDRII-240_BLUE-15U-IN-RH VCC_DDR R44 15R1% DIMM ADDR=1010000B DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 238 42 43 48 49 161 162 167 168 51 56 62 72 75 78 191 194 181 175 170 53 59 64 197 69 172 187 184 178 189 67 55 18 19 102 68 VSS VSS#5 VSS#8 VSS#11 VSS#14 VSS#17 VSS#20 VSS#23 VSS#26 VSS#29 VSS#32 VSS#35 VSS#38 VSS#41 VSS#44 VSS#47 VSS#50 VSS#65 VSS#66 VSS#79 VSS#82 VSS#85 VSS#88 VSS#91 VSS#94 VSS#97 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 54 190 71 MEM_MA_ADD[15 0] 8,11,12 10 122 123 128 129 12 13 21 22 131 132 140 141 24 25 30 31 143 144 149 150 33 34 39 40 152 153 158 159 80 81 86 87 199 200 205 206 89 90 95 96 208 209 214 215 98 99 107 108 217 218 226 227 110 111 116 117 229 230 235 236 VDDSPD A16/BA2 BA1 BA0 MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63 8,11 MEM_MB_DATA[63 0] VDD0 VDD1 VDD2 VDD3 VDD3#75 VDD4 VDD5 VDD6 VDD7 VDD8 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ4#69 VDDQ5 VDDQ6 VDDQ7 VDDQ7#178 VDDQ8 VDDQ9 MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 RC0 RC1 NC#19 NC/TEST NC 42 43 48 49 161 162 167 168 238 VDDSPD CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 51 56 62 72 75 78 191 194 181 175 170 53 59 64 197 69 172 187 184 178 189 67 VSS VSS#5 VSS#8 VSS#11 VSS#14 VSS#17 VSS#20 VSS#23 VSS#26 VSS#29 VSS#32 VSS#35 VSS#38 VSS#41 VSS#44 VSS#47 VSS#50 VSS#65 VSS#66 VSS#79 VSS#82 VSS#85 VSS#88 VSS#91 VSS#94 VSS#97 16 15 28 27 37 36 84 83 93 92 105 104 114 113 46 45 X3 188 183 63 182 61 60 180 58 179 177 70 57 176 196 174 173 DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DQS4 DQS4# DQS5 DQS5# DQS6 DQS6# DQS7 DQS7# DQS8 DQS8# X3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10_AP A11 A12 A13 A14 A15 16 15 28 27 37 36 84 83 93 92 105 104 114 113 46 45 X3 188 183 63 182 61 60 180 58 179 177 70 57 176 196 174 173 MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7 A16/BA2 BA1 BA0 54 190 71 MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0 WE# CAS# RAS# 73 74 192 MEM_MB_WE_L MEM_MB_CAS_L MEM_MB_RAS_L DM0/DQS9 NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17# 125 126 134 135 146 147 155 156 202 203 211 212 223 224 232 233 164 165 MEM_MB_DM0 ODT0 ODT1 195 77 MEM_MB0_ODT0 CKE0 CKE1 52 171 MEM_MB_CKE0 CS0# CS1# 193 76 MEM_MB0_CS_L0 MEM_MB0_CS_L1 CK0(DU) CK0#(DU) CK1(CK0) CK1#(CK0#) CK2(DU) CK2#(DU) 185 186 137 138 220 221 MEM_MB0_CLK_H0 MEM_MB0_CLK_L0 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1 MEM_MB0_CLK_H2 MEM_MB0_CLK_L2 SCL SDA X1 VREF X2 120 119 X1 X2 SA0 SA1 SA2 239 240 101 VSS#100 VSS#103 VSS#106 VSS#109 VSS#112 VSS#115 VSS#118 VSS#121 VSS#124 VSS#127 VSS#130 VSS#133 VSS#136 VSS#139 VSS#142 VSS#145 VSS#148 VSS#151 VSS#154 VSS#157 VSS#160 VSS#163 VSS#166 VSS#169 VSS#198 VSS#201 VSS#204 VSS#207 VSS#210 VSS#213 VSS#216 VSS#219 VSS#222 VSS#225 VSS#228 VSS#231 VSS#234 VSS#237 11 14 17 20 23 26 29 32 35 38 41 44 47 50 65 66 79 82 85 88 91 94 97 B DIMM2 DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DQS4 DQS4# DQS5 DQS5# DQS6 DQS6# DQS7 DQS7# DQS8 DQS8# X3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10_AP A11 A12 A13 A14 A15 100 103 106 109 112 115 118 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 169 198 201 204 207 210 213 216 219 222 225 228 231 234 237 C DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 VDD0 VDD1 VDD2 VDD3 VDD3#75 VDD4 VDD5 VDD6 VDD7 VDD8 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ4#69 VDDQ5 VDDQ6 VDDQ7 VDDQ7#178 VDDQ8 VDDQ9 D 10 122 123 128 129 12 13 21 22 131 132 140 141 24 25 30 31 143 144 149 150 33 34 39 40 152 153 158 159 80 81 86 87 199 200 205 206 89 90 95 96 208 209 214 215 98 99 107 108 217 218 226 227 110 111 116 117 229 230 235 236 VSS#100 VSS#103 VSS#106 VSS#109 VSS#112 VSS#115 VSS#118 VSS#121 VSS#124 VSS#127 VSS#130 VSS#133 VSS#136 VSS#139 VSS#142 VSS#145 VSS#148 VSS#151 VSS#154 VSS#157 VSS#160 VSS#163 VSS#166 VSS#169 VSS#198 VSS#201 VSS#204 VSS#207 VSS#210 VSS#213 VSS#216 VSS#219 VSS#222 VSS#225 VSS#228 VSS#231 VSS#234 VSS#237 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63 RC0 RC1 NC#19 NC/TEST NC DIMM1 8,11 MEM_MA_DATA[63 0] 55 18 19 102 68 8,11 MEM_MA_DQS_L[7 0] MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 MEM_MB_ADD[15 0] 8,11,12 C MEM_MB_BANK2 8,11,12 MEM_MB_BANK1 8,11,12 MEM_MB_BANK0 8,11,12 MEM_MB_WE_L 8,11,12 MEM_MB_CAS_L 8,11,12 MEM_MB_RAS_L 8,11,12 MEM_MB_DM[7 0] 8,11 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 MEM_MB0_ODT0 8,12 B MEM_MB_CKE0 8,12 MEM_MB0_CS_L0 8,12 MEM_MB0_CS_L1 8,12 MEM_MB0_CLK_H0 MEM_MB0_CLK_L0 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1 MEM_MB0_CLK_H2 MEM_MB0_CLK_L2 8,12 8,12 8,12 8,12 8,12 8,12 SCLK SDATA VDDR_VREF VCC3 PLACE CLOSE TO DIMM PIN ADDRESS: 001 0xA4 DDRII-240_BLUE-15U-IN-RH VDDR_VREF C34 C0.1U16Y0402 A DIMM ADDR=1010001B VDDR_VREF C1000P50X0402 C772 C1000P50X0402 C785 C0.1U16Y0402 C36 R55 15R1% D MICRO-START INT'L CO.,LTD Title FIRST LOGICAL DDR DIMM Size Document Number Custom L-A780 Date: Rev 0B Friday, August 24, 2007 Sheet 10 of 35 REQUIRED STRAPS SB600 HAS 15K INTERNAL PD FOR AC_SDATA_OUT, 15K PU FOR RTC_CLK, EXTERNAL PU/PD IS NOT REQUIRED; FOR SB460, EXTERNAL PU/PD ARE REQUIRED D D VCC3_SB VCC3_SB R453 X_10KR0402 R530 10KR0402 17,28 CK_P_33M_1394 17,26 SIO_PCLK 17,33 PCI_CLK4 17 PCI_CLK5 17 LPC_CLK0 17 LPC_CLK1 18,29 AZ_RST# C C 18 SB_GP16 18 SB_GP17 R452 10KR0402 PCI_CLK2 PCI_CLK3 CK_P_33M_1394 SIO_PCLK R451 10KR0402 PCI_CLK4 R447 X_10KR0402 PCI_CLK5 R434 X_10KR0402 LPC_CLK0 R357 10KR0402 R454 10KR0402 LPC_CLK1 RTC_CLK R353 10KR0402 AZ_RST# B Watchdog timer on NB_PWGRD PULL HIGH PULL LOW ENABLED (VCC3) DISABLED DEFAULT Debug straps TPM CLOCK ENABLED (VCC3) DISABLED RESERVED Booting from PCI Memory Internal Clock Generator ENABLED (VCC3_SB) ENABLED (VCC3_SB) DISABLED DEFAULT DEFAULT INTERNAL RTC EC ENABLED DISABLED DEFAULT GP17 GP16 ROM TYPE: B NC, NC = Reserved NC, L = SPI ROM DEFAULT ENABLED NC IS EXT RTC DEFAULT R372 1KR0402 DISABLED DEFAULT L, NC = LPC ROM L, L = FWH ROM Note: NC represents internal 10-k? 5% pull-up A A MICRO-START INT'L CO.,LTD Title SB700 STRAPS Size B Document Number Date: Friday, August 24, 2007 Rev L-A780 0B Sheet 21 of 35 DVI CONNECTOR 15 TX1P 15 TX1N 15 TX2P TX1P VCC5 C95 X_C0.1U16Y0402 R128 15KR0402 G D I2C_CLK S D I2C_DATA S D TX0N TX2P 15 TXCN 15 TX2N R201 110R0402 TX0N 15 TX11P 15 TX10N R150 18R0402 TX10N_R TX1P TX1N R73 R67 18R0402 18R0402 TX1P_R TX1N_R TX11P TX11N R542 R543 18R0402 18R0402 I2C_DA I2C_CK TX11P_R TX11N_R TX2P TX2N R79 R76 18R0402 18R0402 TX2P_R TX2N_R TXCN R218 110R0402 TX2N Place close to DVI connector DVI1 12 11 10 TXCP TXCP 24 23 22 21 20 19 18 17 16 15 14 13 TX11P R538 110R0402 I2C_DA I2C_CK C786 C752 X_C0.1U16Y0402 X_C0.1U16Y0402 15 TX11N 18R0402 18R0402 TXCN TXCP R90 R83 18R0402 18R0402 TX12P TX12N TX0P_R TX0N_R R85 TX0P R60 18R0402 TX0N R56 18R0402 TMDS_HPD 20KR1%0402 VDD_DVI TX10P_R R541 18R0402 D TX10P 15 TX12P DVI24P_WHITE-RH R540 110R0402 TX11N 15 VDD_DVI VDD_VGA L4 TX10N TX10N 30L3A-15_0805-RH C195 C0.1U16Y0402 TX12P CP4 EMI_0B R539 110R0402 15 TX12N TX12N TMDS_HPD VDD_VGA VDD_VGA U38 ESD-IP4220 U4 ESD-IP4220 TX2P_R TX1P_R TX0P_R TX10P_R TX11P_R TXCN_R TX2N_R TX1N_R TX0N_R TX10N_R TX11N_R TXCP_R C TX12P_R C VDD_VGA U39 ESD-IP4220 TX12N_R 2 Z-LM385M3-2.5-NOPB_SOT23-3-RH-1 VDD_VGA U5 ESD-IP4220 R81 100KR0402 D2 VDD_VGA 33R0402 R88 R544 R545 TX12P_R TX12N_R TX10P TX10P 25 15 VCC5 15,31 HPD_DVI TXCN_R TXCP_R I2C_DA Q13 N-2N7002_SOT23 G 15 R215 110R0402 I2C_CK Q8 N-2N7002_SOT23 15 I2C_DATA TX1N Place close to DVI connector TX0P C49 X_C0.01U16X0402 C58 X_C0.01U16X0402 15 I2C_CLK TX0P R204 110R0402 VCC5 R104 15KR0402 15 26 Place close to North Bridge For EMI Placement close to ESD doide power pin VCC5 D11 BAV99-7-F_SOT23-LF C219 C1U10Y CLOSE TO VGA Connector CLOSE TO GMCH L9 15 NB_VGA_R RS780 R503 150R1%0402 D10 BAV99-7-F_SOT23-LF C214 X_C3.3P50N R157 150R1%0402 C204 X_C3.3P50N L8 15 NB_VGA_G RS780 R502 150R1%0402 D9 BAV99-7-F_SOT23-LF VGAGND 0.12U300m-1 R158 150R1%0402 C215 C10P50N0402 0.12U300m-1 C205 C10P50N0402 B B Empty For RX780 VCC5 D7 BAV99-7-F_SOT23-LF R147 33R0402 DDC_CLK R141 33R0402 R501 150R1%0402 R154 150R1%0402 0.12U300m-1 C196 X_C3.3P50N C197 C10P50N0402 5VDDCDA 5VDDCCL VCC5 FS2 DDC_DATA RS780 CLOSE TO MCH L7 15 NB_VGA_B VDD_VGA VGAGND C190 C0.1U16Y0402 F-MICROSMD110F-RH VCC5 VCC5 VCC5 VCC5 R122 6.8KR0402 CLOSE TO MCH VSYNC 33R0402 HSYNC_C 13 5VDDCDA 12 VSYNC_C VSYNC R234 15 14 U7 X_NC7WZ08 47R0402 D8 VCC3 VCC5 R142 15 DAC_SDA VCC5 R130 6.8KR0402 G R126 4.7KR0402 S BAV99-7-F_SOT23-LF VCC5 0R0402 D 15 HSYNC HSYNC 33R0402 RED VGA1 CONN-D-SUB15F_BLUE-RH A HSYNC_C R226 GREEN R149 DDC_DATA 11 BLUE A 10 R145 Q11 N-2N7002_SOT23 15 VSYNC_C C183 X_C100P50N0402 DDC_CLK D 5VDDCCL C174 C100P50N0402 G S 15 DAC_SCL D6 BAV99-7-F_SOT23-LF Empty For RX780 C171 C100P50N0402 R108 4.7KR0402 C179 X_C0.1U16Y0402 C167 X_C100P50N0402 VCC3 16 C191 C0.1U16Y0402 17 D5 BAV99-7-F_SOT23-LF Q12 N-2N7002_SOT23 U8 X_NC7WZ08 47R0402 MICRO-START INT'L CO.,LTD Title R148 0R0402 DVI CONNECTOR Size C Document Number Date: Friday, August 24, 2007 Rev L-A780 0B Sheet 22 of 35 Clock Gen ICS9LPR472 VCC3 CLK_VDD L21 X_200L400_350_0805 Place Close to PIN.39, 48, 56, 34, 11, 16, 25 2 CP11 C364 C371 C358 C354 C333 C324 C363 Place Rxxx/xxx less than 500 mils away from Uxxx route CPU clock as 100ohm differential pair C368 U15A CLK_VDDA 44 43 VDDA GNDA CLK_VDDREF 60 61 VDDREF GNDREF 39 42 VDDSATA GNDSATA D C22u6.3X1206 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 VCC3 L25 CP15 X_300L500mA-250 C348 CLK_VDDA C343 CLK_VDD C347 CLK_VDD48 C2.2u10Y-RH C22u6.3X1206 C0.1U16Y0402 VCC3 L20 CP10 X_300L500mA-250 C321 CLK_VDDREF Place Close to PIN.60 C319 C33P50N0402 CLK_VDD48 Place Close to PIN.64 Y1 14.318MHZ16P_D C2.2u10Y-RH C338 R216 1MR0402 X_300L500mA-250 C335 C33P50N0402 R210 CLK_VDD U15B 65 R207 OSC_14M_NB RX780 1.8V 75R/100R RS780 (Single-ended) 1.1V 150R/75R ICS9LPRS472BKLFT_MLF64-RH 38 37 36 35 32 31 30 29 SB_SRC0T_LPRS SB_SRC0C_LPRS SB_SRC1T_LPRS SB_SRC1C_LPRS 27 26 23 22 62 63 SRC0T_LPRS SRC0C_LPRS SRC1T_LPRS SRC1C_LPRS SRC2T_LPRS GNDATIG SRC2C_LPRS GNDATIG SRC3T_LPRS SRC3C_LPRS GNDSRC SRC4T_LPRS GNDSRC SRC4C_LPRS GNDSB_SRC SRC5T_LPRS SRC5C_LPRS X1 SRC6T/SATAT_LPRS X2 SRC6C/SATAC_LPRS 21 20 19 18 15 14 13 12 41 40 52 RESTORE# 55 54 64 VDD48 GND48 48 47 VDDCPU GNDCPU 56 53 VDDHTT GNDHTT 34 VDDATIG 10 17 24 CLK_VDD CLK_VDD 33 HWM_14M_R 15 NB_OSC_14M B 4.7KR0402 7,10,11,18,27,33 SCLK 7,10,11,18,27,33 SDATA THERMPAD ATIG0T_LPRS ATIG0C_LPRS ATIG1T_LPRS ATIG1C_LPRS ATIG2T_LPRS ATIG2C_LPRS ATIG3T_LPRS ATIG3C_LPRS 28 33 C L19 CP9 50 49 46 45 11 16 25 C2.2u10Y-RH VCC3 CPUKG0T_LPRS CPUKG0C_LPRS CPUKG1T_LPRS CPUKG1C_LPRS VDDSRC1 VDDSRC2 VDDSB_SRC HTT0T/66M_LPRS HTT0C/66M_LPRS SMBCLK SMBDAT 48MHz_0 48MHz_1 R211 R510 R205 1KR0402 X_8.2KR0402 8.2KR0402 51 PD# 59 REF0/SEL_HTT66 R206 8.2KR0402 58 150R0402 NB_OSC_14M_R R198 75R0402 CPU_CLK CPU_CLK# D To CPU To North Bridge GXF RS780: Not used R250 R267 0R0402 0R0402 PE16_GXF_CLK 31 PE16_GXF_CLK# 31 R261 R274 R269 R266 0R0402 0R0402 0R0402 0R0402 NB_SBREF_CLK 15 NB_SBREF_CLK# 15 To North Bridge SB SB_LINK_CLK 17 SB_LINK_CLK# 17 To South Bridge Link To PCI-E x16 Slot 100MHz Reference clock clock To North Bridge GPP RS780: Not used R264 R263 0R0402 0R0402 PE1_GPP_CLK1 31 PE1_GPP_CLK1# 31 PCIEx1 Slot-1 GPP R504 R505 0R0402 0R0402 LAN_CLK 25 LAN_CLK# 25 PCIE LAN 100MHz GPP NB_HTT_P NB_HTT_N R208 R209 0R0402 0R0402 NBHTT_CLK 15 NBHTT_CLK# 15 NB HTT 100M Clock(RX780/RS780) 48M_SIO_R 48M_USB_R R223 R222 33R0402 33R0402 SIO_48M_CLK 26 USB_48M_CLK 18 Super I/O 48MHz Clock USB 48MHz Clock REF1/SEL_SATA 57 3.3V REF2 C SIO_48M_CLK USB_48M_CLK C779 X_C22P50N0402 Place close to Clock GEN C780 X_C22P50N0402 Place close to Clock GEN B ICS9LPRS471AKLFT_MLF64-RH Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose NB CLOCK INPUT TABLE NB CLOCKS RS740 RX780 RS780 HT_REFCLKP 66M SE(SE) NC 100M DIFF 100M DIFF 100M DIFF 100M DIFF REFCLK_N 14M SE (3.3V) NC 14M SE (1.8V) NC 14M SE (1.1V) vref GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)* GPP_REFCLK NC HT_REFCLKN REFCLK_P 100M DIFF 100M DIFF GPPSB_REFCLK 100M DIFF REF0/SEL_HTT66 A HTT CLOCK REF1/SEL_SATA 100M DIFF 100M DIFF(OUT) 100M DIFF 100M DIFF * RS780 can be used as clock buffer to output two PCIE referecence clocks By deault, chip will configured as input mode, BIOS can program it to output mode SRC6/SATA 100.00 DIFFERENTIAL 100.00 DIFFERENTIAL SPREADING SRC CLCOK 66.66 SINGLE END 100.00 NON-SPREADING DIFFERENTIAL SATA CLCOK A MICRO-START INT'L CO.,LTD Title Clock Gen ICS9LPR472 Size B Document Number Date: Tuesday, August 28, 2007 Rev L-A780 0B Sheet 23 of 35 SERIAL ATA CONNECTOR BLOCK PS2 KEYBOARD & MOUSE CONNECTOR SATA_RX0- C571 SATA_RX0+ C565 C0.01U16X0402 C0.01U16X0402 ST_RX#0 ST_RX0 SATA_TX2+ SATA_TX2- 19 SATA_TX2+ 19 SATA_TX219 SATA_RX219 SATA_RX2+ C493 C488 C0.01U16X0402 C0.01U16X0402 ST_TX2 ST_TX#2 SATA_RX2- C482 SATA_RX2+ C479 C0.01U16X0402 C0.01U16X0402 ST_RX#2 ST_RX2 SATA7PM_ORANGE-P ST_TX1 ST_TX#1 SATA_RX1- C557 SATA_RX1+ C552 C0.01U16X0402 C0.01U16X0402 ST_RX#1 ST_RX1 SATA_TX3+ SATA_TX3- 19 SATA_TX3+ 19 SATA_TX319 SATA_RX319 SATA_RX3+ C514 C508 C0.01U16X0402 C0.01U16X0402 ST_TX3 ST_TX#3 SATA_RX3- C499 SATA_RX3+ C496 C0.01U16X0402 C0.01U16X0402 ST_RX#3 ST_RX3 SATA7PM_BLACK-P-RH D R20 X_C0.1U25Y X_1KR1%0402 RN1 8P4R-2.2KR TX+ RX+ GND TX- RXGND GND GND GND 19 SATA_RX119 SATA_RX1+ C0.01U16X0402 C0.01U16X0402 F-MINISMDC150 C9 SATA2 TX+ RX+ GND TX- RXGND GND GND GND 19 SATA_TX1+ 19 SATA_TX1- C577 C572 FS1 SATA7PM_ORANGE-P SATA4 SATA_TX1+ SATA_TX1- SVCC2 26 MSDATA MSDATA FB1 300L600m_150 26 MSCLK MSCLK FB2 300L600m_150 26 KBDATA KBDATA FB3 300L600m_150 26 KBCLK KBCLK FB4 300L600m_150 KBMS1 11 12 10 MS C33 C180P50N C31 C180P50N C25 C180P50N C21 C180P50N SATA7PM_ORANGE-P 16 17 ST_TX0 ST_TX#0 KB 13 14 15 C0.01U16X0402 C0.01U16X0402 C589 C586 TX+ RX+ GND TX- RXGND GND GND GND 19 SATA_RX019 SATA_RX0+ SATA_TX0+ SATA_TX0- SATA1 Default 10nF , Option ohm TX+ RX+ GND TX- RXGND GND GND GND 19 SATA_TX0+ 19 SATA_TX0- SATA3 Default 10nF , Option ohm D CONN-MiniDIN2X12P-RH C C PARALLAL PORT PWM FAN CONTROL 26 PRND[0 7] VCC5 BAS32L_LL34 LPT_VC D3 CPU FAN PRPE PRBUSY PRACK# RND7 RND6 RND5 RND4 RND3 PRSLIN# RND2 PRINIT# RND1 PRERR# RND0 PRAFD# PRSTB# C0.1U16Y0402 C109 U2 C45 FAN1_DRV FAN1_SEN FAN2_DRV FAN2_SEN FAN3_DRV FAN3_SEN FAN3_IN X_N-P3057LCG_SOT89-RH D1 FAN1_IN FAN2_IN VCC12 C1 C2 CHRPMP GND FAN1_DRV FAN1_SEN FAN2_DRV FAN2_SEN FAN3_DRV FAN3_SEN PWRFAN_PWM 14 13 12 11 10 FAN1_DRV PWRFAN_PWM R6 C2 CPUFAN_PWM R29 0R0805-1 X_C0.1U16Y0402 C28 X_C0.1U25Y + R40 X_10KR1%0402 X_C0.1U16Y0402 CPUFAN_TAC 26 R7 22KR0402 BH1X4B_brown-RH Default is 4-Pin FAN C0.1U16Y0402 B 27KR0402 EC3 FAN1_SEN VCC5 RN8 CPUFAN_PWM SYSFAN_PWM PWRFAN_PWM C100P50N0402 C100P50N0402 C100P50N0402 C100P50N0402 RND3 RND4 RND5 RND6 C128 C126 C124 C122 C100P50N0402 C100P50N0402 C100P50N0402 C100P50N0402 RND1 PRINIT# RND2 PRSLIN# C145 C141 C136 C135 C100P50N0402 C100P50N0402 C100P50N0402 C100P50N0402 PRSTB# PRAFD# RND0 PRERR# C159 C156 C152 C148 C100P50N0402 C100P50N0402 C100P50N0402 C100P50N0402 PRSLCT C106 C100P50N0402 RN12 8P4R-2.7KR0402 4.7KR0402-3 CPU_FAN1 26 X_W83391TG 1N4148W-F_SOD123-RH R9 Q2 CPUFAN_PWM SYSFAN_PWM C46 X_C0.1U16Y0402 C47 C119 C117 C115 C113 RN9 8P4R-2.7KR0402 +12V 26 CPUFAN_PWM 26 SYSFAN_PWM +12V RND7 PRACK# PRBUSY PRPE RN15 8P4R-2.7KR0402 RN19 8P4R-2.7KR0402 PRSLCT R41 X_3.48KR1% 2.7KR0402 PRND1 RINIT# PRND2 RSLIN# RN16 8P4R-33R0402 RND1 PRINIT# RND2 PRSLIN# PRND3 PRND4 PRND5 PRND6 RN13 8P4R-33R0402 RND3 RND4 RND5 RND6 RSTB# RAFD# PRND0 RERR# RN20 8P4R-33R0402 PRSTB# PRAFD# RND0 PRERR# PRND7 RACK# RBUSY RPE RN10 8P4R-33R0402 RND7 PRACK# PRBUSY PRPE 8P4R-4.7KR0402 R135 33R0402 SYSTEM FAN POWER FAN 4.7KR0402-3 R320 27KR0402 PWRFAN_TAC 26 X_N-P3057LCG_SOT89-RH PWRFAN_PWM R341 0R0805-1 C459 C0.1U16Y0402 FAN2_DRV R321 22KR0402 C359 X_C0.1U25Y R235 R228 0R0805-1 SYSFAN_PWM FAN2_SEN BH1X4B_brown-RH 3-PIN:N32-1030491-H06 Default is 4-Pin FAN SYSFAN_TAC R245 22KR0402 26 10 11 12 13 EC33 CD100u16EL11-RH R200 X_3.48KR1% RINIT# 26 RSLIN# LPT1 14 15 16 17 18 19 20 21 22 23 24 25 48 PRAFD# PRERR# PRINIT# LPT_SLIN# PRSLIN# L6 _120L1200m_90_0402-RH 26 26 RSTB# RAFD# 26 RERR# 26 26 26 RACK# RBUSY RPE 52 1 EC41 27KR0402 SYS_FAN1 PRSTB# RND0 RND1 RND2 RND3 RND4 RND5 RND6 RND7 PRACK# PRBUSY PRPE PRSLCT 26 PRSLCT 51 4.7KR0402-3 R199 X_10KR1%0402 RSLCT + R343 X_3.48KR1% 1N4148W-F_SOD123-RH R233 C0.1U16Y0402 + A D17 C314 BH1X3B-FR_WHITE-RH 4-PIN:N32-1040731-H06 R346 X_10KR1%0402 FAN3_SEN Q36 C476 X_C0.1U25Y 1N4148W-F_SOD123-RH R324 PWR_FAN1 FAN3_DRV D20 Q54 RSLCT +12V 2 X_N-P3057LCG_SOT89-RH 26 +12V B R134 CD100u16EL11-RH CD100u16EL11-RH DSUB-PRINTERF_BURGUNDY-RH A VCC5 C794 C795 C796 C797 EMI_0B MICRO-START INT'L CO.,LTD Title X_C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 SATA & COM1 & LPT Size C Document Number Date: Friday, August 24, 2007 Rev L-A780 0B Sheet 24 of 35 LAN-Marvell 88E8039/8056/8071/8075 Stuff For 8039 Stuff For 8056 FOR 8039 B06-080390C-M44 Ver:A0 VPD_DATA X_4.7KR R395 4.7KR R398 FOR 8071 U900 VDD33 LAN 10/100 88E8039 U25 SPI_CS SPI_DI 88E8039A0-NNC1 SPI_DO VCC3 VDD33 AVDD12 SPI_DI Empty For 8071 FOR 8070(Default) B06-080700C-M44 Ver:B1 VDD33 4.7KR VPD_CLK X_33R0402 SPI_CS R384 LAN_SPI_CLK SDATA1 18,31,32,33 SDATA1 FOR 8071 B06-080711C-M44 Ver:B0 D R393 VDD33 FOR 8056 B06-080562C-M44 Ver:B0 CS SO WP GND VCC HOLD SCK SI LAN_SPI_CLK SPI_DO C528 C1U10Y AT25F1024AN-10SU-2.7-RH 2M:M31-0204803-A26 D 14 TXLANP VDD SPI_DO 33 34 35 SPI_DI 36 SPI_CS 38 37 SPI_CLLK 39 VDD VPD_CLK VDDO_TTL 42 40 41 VPD_DATA 43 45 44 46 29 53 RX_N AVDDL 28 RX_P MDIN[2] 27 TR_D2- 55 REFCLKP MDIP[2] 26 TR_D2+ 23 LAN_CLK# LAN_CLK# 56 REFCLKN HSDACN 25 57 AVDDL HSDACP 24 58 VDD AVDD 23 ACT_LED 59 LED_ACTn 100_LED# 60 LED_10/100n 61 VDDO_TTL 62 LED_1000n 63 LED_LINKn XTALO AVDD12 C452 CTRL12 VDD33 22 MDIN[1] 21 TR_D1- MDIP[1] 20 TR_D1+ Keep 100ohm Differential Pair A0 A1 A2 GND VCC WP SCL SDA 19 18 TR_D0- MDIP[0] 17 TR_D0+ XTALO C18p50N Keep 100ohm Differential Pair C453 AVDDL C0.1U16Y0402 VPD_CLK VPD_DATA AT24C08AN-10SU-2.7-RH C454 MDIN[0] C532 C18p50N Y2 25MHZ18P_D-4 25MCLK Keep 100ohm Differential Pair C RSET 16 15 AVDDL Stuff for 8039 88E8071B0 FOR 8056 4.99Kohm For 8056 FOR 8039 2Kohm For 8039 25MCLK VDD33 PEX1_RST# XTALI XTALO 14 13 VDD VAUX_AVLBL 12 LOM_DISABLEn SWITCH_VAUX SWITCH_VCC 11 10 VDDO_TTL_MAIN EPAD Stuff For 8071 GND VDD_25 65 VDD 64 33R0402 WAKEn X_0R0402 R338 R337 C PERSTn 1G_LED# Stuff For 8039 Stuff For 8056 CTRL25 VDD33 88E8039/88E8071 18 SMBALERT# R365 X_0R0402 CTRL12 AVDD12 0R0402 Keep 100ohm Differential Pair U24 TSTPT 54 VDD33 SCLK1 TR_D3+ TP14 LAN_CLK R366 X_4.7KR0402 AVDD2_5 TR_D3- 23 LAN_CLK R361 18,31,32,33 SCLK1 30 AVDDL VDD Reserve MDIP[3] 52 VDDO_TTL 100M Hz PCIE CLOCK 32 31 TXLANN AVDDL MDIN[3] 14 SMCLK AVDDL SMDATA 51 VDD TX_N VDDO_TTL 50 AVDDL TESTMODE TX_P GPP_RX0N_C Keep 100ohm Differential Pair AVDD2_5 48 49 C0.1U10X0402 Keep 100ohm Differential Pair Stuff For 8039, 8056, 8071 VDD C0.1U10X0402 C498 AVDD2_5 VMAIN_AVAL C501 14 RX_LANP0 Keep 100ohm Differential Pair14 RX_LANN0 47 AVDD2_5 U21 GPP_RX0P_C R333 2KR1%0402 FOR 8071 4.99Kohm For 8071 R900 4.99KR1%0402 TR_D0+ TR_D0- R342 R349 X_49.9R1%0402 X_49.9R1%0402 C470 X_C0.1u16Y0402 TR_D1+ TR_D1- R354 R359 X_49.9R1%0402 X_49.9R1%0402 C477 X_C0.1u16Y0402 TR_D2+ TR_D2- R368 R370 X_49.9R1%0402 X_49.9R1%0402 C491 X_C0.1u16Y0402 TR_D3+ TR_D3- R376 R380 X_49.9R1%0402 X_49.9R1%0402 C503 X_C0.1u16Y0402 X_C100P50N0402 CTRL2_5 27,31 PEX1_RST# 18,31 WAKE# VDD33 PEX1_RST# R334 4.7KR0402 WAKE# R335 X_4.7KR0402 LAN_DISABLE All Stuff for 8056 All Empty for 8071(Default) 19 1G_LED# CP22 C469 X_C0.01U50X 100_LED# C478 X_C0.01U50X ACT_LED C272 X_C0.01U50X X_CP VCC3_SBLAN VCC3_SB FOR 8056 AVDD2_5 Output Voltage is 1.8V N900 FOR 8071 AVDD2_5 Output Voltage is 1.8V 10/100 LAN CONN AVDD2_5 Q47 P-BCP69_SOT223 VDD33 C269 C1000P50X0402 RJ45_USBX2_LEDX2_TX-100-RH-4 C386 B FOR 8039 AVDD2_5 Output Voltage is 2.5V C509 C485 C397 C455 C497 C495 C472 C507 C512 C1U10Y C1U10Y X_C0.1u16Y0402 R189 16 TD+ C504 C510 C505 EC42 CD100u16EL5-RH C406 C481 + + AVDD12 Orange Stuff for 8056/8071 0ohm to GND Empty for 8039 330R0402 VDD33 R194 14 C282 Green Yellow 11 1G_LED# EC43 CD100u16EL5-RH Yellow Blinking Orange Green None 13 C275 0R0402 Stuff for 8039 Empty for 8056/8071 Link Active 1000 100 10 Empty for 8039 100_LED# VCC3_SBLAN LAN_USB1B RJ45_USBX2_LEDX2_TX-Giga-RH-4 4+ 2+ 1- GND 3+ 1+ X_CP TR_D3+ TR_D2+ TR_D1+ TR_D0+ N58-22F0481-S42 N58-22F0451-U30 10 11 12 13 14 15 16 17 18 3- X_CP CP29 L12 X_600L200m_500-1 TR_D3TR_D2TR_D1TR_D0- TD2- PWR CP28 X_600L200m_500-1 L13 CP5 4- AVDD2_5 VDD33 VCC3_SB C405 Giga-Lan (Default) X_C0.01u16X0402 C285 C10u10Y0805 C1U10Y C0.1U16Y0402 X_C1U10Y C1U10Y X_C1U10Y C0.1u16Y0402 AVDD2_5 Q50 P-BCP69_SOT223 (Option) N58-22F0461-S42 N58-22F0431-U30 10/100 VDD33 19 20 CTRL2_5 4.7KR 21 R314 330R0402 ACT_LED 22 + VCC3_SBLAN CD470u16EL11.5-RH EC36 B C279 R193 330R0402 12 8KV: 10/100 LAN conn : RU5-141A5Y5F Giga LAN conn : RU5-171A5WGF C1000P50X0402 X_0R0402 A A R330 4.7KR CTRL12 C10u10Y0805 X_C10u10Y0805 C1U10Y C1U10Y C1U10Y X_C1U10Y MICRO-START INT'L CO.,LTD Title LAN-Marvell 88E8039/8056/8071 Size C Document Number Date: Tuesday, August 28, 2007 Rev L-A780 0B Sheet 25 of 35 LPC I/O IT8718F VCC5 CP1 30L3_15_0805 + PCIRST# LPC_DRQ#0 SERIRQ LPC_FRAME# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 17,21 SIO_PCLK 23 SIO_48M_CLK 18 LPC_PME# 18 18 24 24 24 24 45 46 80 81 82 83 67 99 VCCH Serial Port 1/2 SPI DENSEL# INDEX# MTRA# PECI/AMDSI_C/DRVB# DRVA# SST/AMDSI_D/MTRB# DIR# STEP# WDATA# WGATE# TRK0# WPT# RDATA# HDSEL# DSKCHG# LRESET# LDRQ# SERIRQ LFRAME# LAD0 LAD1 LAD2 LAD3 PCICLK VIDO7/GP50 CLKIN PME#/GP54 KRST#/GP62 GA20/JP7 KDAT/GP61 KCLK/GP60 MDAT/GP57 MCLK/GP56 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 PRND7 PRND6 PRND5 PRND4 PRND3 PRND2 PRND1 PRND0 78 77 76 75 72 71 R26 R27 RESETCON#/CIRTX/CE_N RSMRST#/CIRRX/GP55 IRTX/GP47/CE2_N/JP8 GP46/IRRX COPEN# 3VSBSW#/GP40 30 85 66 70 68 79 PCIRST4#/GP10 PCIRST3#/GP11 PCIRST2#/GP12 PWROK1/GP13 PCIRST1#/GP14/I_STPCLK 84 34 33 32 31 VIN0 VIN1 VIN2 VIN3/ATXPG VIN4 VIN5/VID7 VIN6/VID6 VIN7/PCIRSTIN# VREF TMPIN1 TMPIN2 TMPIN3 VIDO2/FAN_TAC5/GP24 VIDO3/FAN_TAC4/GP25 FAN_CTL3/GP36 FAN_TAC3/GP37 FAN_CTL2/GP51 FAN_TAC2/GP52 FAN_CTL1 FAN_TAC1 VID0/GP30 VID1/GP31 VID2/GP32 VID3/GP33 VID4/GP34 VID5/GP35 98 97 96 95 94 93 92 91 90 89 88 87 23 22 12 11 10 19 18 17 16 14 13 VBAT VIDVCC 69 36 86 15 50 74 117 GNDD GNDD GNDD GNDD B KBRST# A20GATE KBDATA KBCLK MSDATA MSCLK KBRST# A20GATE KBDATA KBCLK MSDATA MSCLK 37 38 39 40 41 42 43 44 47 48 49 73 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 STB# AFD# ERR# INIT# SLIN# ACK# BUSY PE SLCT Hardware Monitoring 17,28,32,33 PCIRST# 17 LPC_DRQ#0 17,33 SERIRQ 17,33 LPC_FRAME# 17,33 LPC_AD[3 0] 51 63 52 55 54 53 57 58 56 60 62 64 61 59 65 R25 10KR0402 LPC_PME# R24 10KR0402 VCC5_SB CP3 X_CP SUPER I/O STRAPPING RESISTOR 24 /N RN4 A LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 X_8P4R-10KR0402 RN3 D JTEMP EXT_SYS_TEMP SOUTB SOUTA DTRB# DTRA# RTSA# RIB# RTSB# R61 R74 10KR0402 10KR0402 10KR0402 X_0R0402 SLP_S3# S R91 680R0402-RH CHIP_SEL BUF_SEL For Lenovo FAN Speed Control IO30 IO91 R89 R84 X_10KR0402 X_10KR0402 FAN_CTL_SEL VID_ISEL BIOS Update Config HIGH LOW UN_ PROTECT WRITE PROTECT VCC5_SB LPC_SMI# 18 PS_ON# 27 PSIN 34 SB_PWRON# 18 SLP_S3# 18,27 C0.1U16Y0402 C645 EMI_0B VCC5 WP_# INDEX# TRACK0# RDDATA# U33 VCC5 VCC5 NRIB NCTSB# NDSRB# NSINB NDCDB# RTSB# DTRB# SOUTB VCC3 EMI_0B Placement close to C630 ASSID_GPIO0 33 ASSID_GPIO1 33 VCC5 20 VCC RA1 RA2 RA3 RA4 RA5 VDD RY1 RY2 RY3 RY4 RY5 19 18 17 14 12 +12COM_1 RIB# CTSB# DSRB# SINB DCDB# 16 15 13 11 DA1 DA2 DA3 GND DY1 DY2 DY3 VSS 10 NRTSB NDTRB NSOUTB -12COM_1 C678 GD75232_SSOP20 VCC5 8P4R-10KR0402 RN7 FUSB_G1 FUSB_G2 FUSB_G3 COM_GPIO2 C10 C1U10Y NRTSB NDSRB# NCTSB# NRIB C649 C650 C651 C652 C330p50X C330p50X C330p50X C330p50X NDCDB# NSOUTB NSINB NDTRB C674 C669 C665 C659 C330p50X C330p50X C330p50X C330p50X NDSRB# NRTSB NCTSB# NRIB COM_GPIO2 H2X6[11]M_GREEN-RH COM_GPIO2 C662 RN2 8P4R-1KR0402 R43 1KR0402 C DRVDEN0 11 13 15 17 19 21 23 25 27 29 31 33 10 12 14 16 18 20 22 24 26 28 30 32 34 INDEX# MOA# C0.1U16Y0402 10 12 FDD1 COM2 NDCDB# NSINB NSOUTB NDTRB DSKCHG# COM2 HEADER VIN0 VIN1 VIN2 VIN3 VIN4 VIN5 C0.1U16Y0402 DSA# DIR# STEP# WRDATA# WE# TRACK0# WP_# RDDATA# HEAD# DSKCHG# Close to COM PORT header PWRFAN_PWM R93 100R0402 SYSFAN_PWM R92 100R0402 CPUFAN_PWM MB_ID0 MB_ID1 COM_GPIO2 FUSB_G1 FUSB_G2 FUSB_G3 SPI_WP# 18,19 FLOPPY CONNECTOR CHASSIS IO91 HM_VREF SIO_THERMDA_CPU SYS_TEMP EXT_SYS_TEMP R95 X_0R0402 R96 X_0R0402 R94 100R0402 0R0402 R381 SERIAL PORT C793 X_C0.1U16Y0402 ASSID_GPIO0 ASSID_GPIO1 R97 10KR0402 CHASSIS N-2N7002_SOT23 C787 X_C0.1U16Y0402 IO30 BH2X17[4][5][6]_BLACK-RH PWRFAN_PWM 24 PWRFAN_TAC 24 SYSFAN_PWM 24 SYSFAN_TAC 24 CPUFAN_PWM 24 CPUFAN_TAC 24 FUSB_G1 30 FUSB_G2 30 FUSB_G3 30 D34 NRIB NRIA SERIAL PORT Giga10/100 0 0 N_RI 18 Thermal Resistor C0.1U16Y0402 C635 VCC5 VBAT_IN C633 C0.1U16Y0402 Place close to SIO side MB_ID0 U34 VBAT_IO R98 R86 S-BAT54C_SOT23 D19 S-BAT54C_SOT23 VCC3_SB value X_10KR0402 10KR0402 VCC5_SB MB_ID1 R523 R87 X_10KR0402 10KR0402 VCC5_SB MB_ID2 R546 R239 X_10KR0402 10KR0402 VCC5_SB NRIA NCTSA# NDSRA# NSINA NDCDA# RTSA# DTRA# SOUTA 20 VCC RA1 RA2 RA3 RA4 RA5 VDD RY1 RY2 RY3 RY4 RY5 19 18 17 14 12 +12COM_1 RIA# CTSA# DSRA# SINA DCDA# 16 15 13 11 DA1 DA2 DA3 GND DY1 DY2 DY3 VSS 10 NRTSA NDTRA NSOUTA -12COM_1 C677 GD75232_SSOP20 B BAS32L_LL34 D26 +12V BAS32L_LL34 D25 VCCP R13 10KR1%0402 VCC3 R10 10KR1%0402 C17 VCC_DDR Description NDCDA# NSOUTA NSINA NDTRA C638 C642 C632 C630 C672 C668 C664 C653 C330p50X C330p50X C330p50X C330p50X R1 C330p50X C330p50X C330p50X C330p50X 10 12 NDSRA# NRTSA NCTSA# NRIA COM_GPIO Disabled Flash I/F Address Segment (FFFE_0000h~FFFF_FFFFh, 000F_0000h~000F_FFFFh) is enabled Disable VIDOUT pins(except VIDO6 & VIDO7) COM_GPIO VIN0 C0.1U16Y0402 C18 C0.1U16Y0402 HW_AGND HW_AGND C0.1U16Y0402 HW_AGND VIN5 Enable VIDOUT pins Close to COM PORT header Chip selection in configuration The output buffers of PCIRST1#, PCIRST2#, PCIRST3#, PCIRST4# are open-drain The output buffers are push-pull The default value of EC Index 15h / 16h / 17h is 00h The default value of EC Index 15h / 16h / 17h is 40h The threshold voltage of VID is 2.0 / 0.8V C14 R11 VCC5_SB R2 VIN1 10KR1%0402 6.81KR1%0402 COM_GPIO 19 C15 H2X6[11]M_GREEN-RH C661 HW_AGND C13 6.81KR1%0402 COM1 HEADER COM1 NDCDA# NSINA NSOUTA NDTRA C0.1U16Y0402 47R0402 -12V VCC5 NRTSA NDSRA# NCTSA# NRIA R14 VIN4 C0.1U16Y0402 R12 VIN2 C0.1U16Y0402 HW_AGND 10KR1%0402 C0.1U16Y0402 +12V R3 30.1KR1%0402 C16 VIN3 C0.1U16Y0402 HW_AGND A R15 10KR1%0402 HM_VREF SIO_THERMDA_CPU R532 0R0402 R35 10KR1%0402 C1 C2200p50X0402 SYS_TEMP THERMDA_CPU 7,33 MICRO-START INT'L CO.,LTD Place close to SIO Title C11 The threshold voltage of VID is 0.8 / 0.4V X_C0.1u16Y0402 RT1 10KRT1% HW_AGND R533 0R0402 LPC I/O IT8718F THERMDC_CPU 7,33 Size Document Number Custom L-A780 CP2 X_CP Date: D VCC3 HW_AGND Default R23 10MR0402 N-2N7002_SOT23 C64 C0.1U16Y0402 MB_ID0 MB_ID1 MB_ID2 VBAT_IO BIOS PROTECT BLOCK S Q55 H2X2[4]M_BLACK-RH L53 X_120L600mA-250 CP51 X_CP 24 24 24 24 24 24 24 24 24 VCC3 VIDO_SEL BIOS_WP1 G HW_AGND IT8718F-S-GX-RH Flashseg1_EN X_JUMPER-1X2B_RED-RH R373 1KR0402 D G Power On Strapping Options VCC3 8P4R-10KR0402 R405 1KR0402 H1X2M_RED-RH C12 C1U10Y Symbol VCC3 RN5 X_8P4R-10KR0402 LPC_FRAME# SERIRQ LPC_DRQ#0 E Q57 RSTB# RAFD# RERR# RINIT# RSLIN# RACK# RBUSY RPE RSLCT L3 X_120L600mA-250 BIOS_WP1_X1 B R389 4.7KR0402 Option: Change to ohm, delete others Only BIOS_WP#2 active HW_AGND SLP_S3# R371 4.7KR0402 C 19 BIOS_WP#1 19 BIOS_WP#2 X_CD47u10EL7-1 PWROK2/GP41 SUSC#/GP53 PSON#/GP42 PANSWH#/GP43 PWRON#GP44 SUSB# GNDA(D-) Place close to SIO VIDO5/GP27 VIDO4/GP26 VIDO1/GP21/VGP0 VIDO0/GP20 VIDO6/GP17 Floppy I/F DIR# STEP# WRDATA# WE# TRACK0# WP_# RDDATA# HEAD# DSKCHG# C43 X_C22P50N0402 20 21 26 27 28 LPC I/F DSA# GP16/SO GP22/SCK/VGP1 GP23/SI/VGP2 KB/MS SIO_48M_CLK 29 25 24 EC2 MISC DRVDEN0 INDEX# MOA# DCD1# RI1# CTS1# DTR1#/JP1 RTS1#/JP2 DSR1# SOUT1/JP3 SIN1 DCD2#/GP67 RI2#/GP66 CTS2#/GP65 DTR2#/JP4 RTS2#/JP5 DSR2#/GP64 SOUT2/JP6 SIN2/GP63 18 LPC_SMI# Q56 N-MMBT3904_NL_SOT23 Power-on Control MB_ID2 118 119 120 121 122 123 124 125 126 127 128 VCC5_SB Super I/O Chasiss VCC3 X_30L3A-15_0805-RH PRND[0 7] Parallel Port DCDA# RIA# CTSA# DTRA# RTSA# DSRA# SOUTA SINA DCDB# RIB# CTSB# DTRB# RTSB# DSRB# SOUTB SINB AVCC 35 VCC D VCC C62 C63 X_C0.1U16Y0402 C0.1U16Y0402 U3 X_CP L1 L2 C BIOS WRITE PROTECT Rev 0B Friday, August 24, 2007 Sheet 26 of 35 C345 C1000P50X0402 VCC5_SB C87 X_C2200P50X0402 EC40 RAM_SBDRV Q9 N-APM2054NDC-TRL_SOT89-LF D 1 S 11 D D DS D 1 S C290 C0.1U16Y0402 C291 X_C1000P50X0402 Q32 N-APM2054NDC-TRL_SOT89-LF VCC5_SB B VCC5_SB 8P4R-1KR0402 R125 GND CSP CSN FB COMP C94 MS-11PQV[RT226A]_QFN16-RH R115 X_0R0402 C99 C4700p50X R129 22KR0402 D 1R0805 G R133 1R0805 0R0805 2KR1%0402 C1U25X0805 R114 2KR1%0402 R131 1KR1%0402 C102 VCC_DDR X_C0.01U25X0402 CLOSE TO DEVICE FB R132 1KR1%0402 G R140 2.2R0805 D VCC5_SB VCC_DDR N-NTD4809NT4G_DPAK3-RH Q15 CHOKE5 CH-1.2U18A-LF 1+ G C617 C0.1U16Y0402 VCC5 EC25 CD1000U6.3EL11.5 1+ EC22 CD1000U6.3EL11.5 1+ EC21 X_.CD1000U6.3EL11.5 C206 C1U10Y EC8 VCC5_SB VCC3 EC38 R127 Q64 N-APM2054NDC-TRL_SOT89-LF EC63 PVCC SS RT I_IND GND 15 14 13 12 C100 C1U25X0805 R139 EC11 CD1000U6.3EL11.5 EC64 CD1000U6.3EL11.5 EC14 CD470u6.3SO-RH C123 C10u10Y0805 11 10 17 BOOT UG PHASE LG X_56KR1%0402 R116 X_68KR0402 R192 1KR1%0402 C105 C0.22U16X C104 C1U25X0805 RR VCC12 5VSB PI S D S Q18 N-NTD4809NT4G_DPAK3-RH U6 16 C33P50N0402 C1U10Y 1+ 200KR0402 C98 C1U10Y C82 1+ C73 C0.1U16Y0402 1+ A CD1000U6.3EL11.5 CD1000U6.3EL11.5 CD1000U6.3EL11.5 C129 C0.01U16X0402 MICRO-START INT'L CO.,LTD CONNECT TO CHOKE OUTPUT Title MS-6 ACPI Controller R124 C93 5VUSB_DRV CH-1.2U18A-LF 5VDIMM_IN 5VDIMM S D Q19 X_N-NTD4809NT4G_DPAK3-RH USB_STR1 CHOKE3 D4 X_S-BAT54A_SOT23 R117 X_2.2KR0805 R113 R190 1KR1%0402 C274 C0.1U16Y0402 EC27 CD1000U6.3EL11.5 EC32 X_.CD1000U6.3EL11.5 C78 C1U10Y Size Document Number Custom L-A780 Date: USB_STR VCC5 C103 C0.1U16Y0402 RAM_VREF GND9 G Q31 N-IPD06N03LA_TO252 G Q66 N-IPD06N03LA_TO252 VTT_DDR + C277 C0.1U16Y0402 5V_DRV Q10 N-IPD06N03LA_TO252 5VDIMM CD1000U6.3EL11.5 WD_DET R112 2.2R0805 + W83310DG_SOP8-RH EC35 CD1000U6.3EL11.5 S D VCC3_SB G + VOUT D S S 5V_DRV VCC5_SB 5VUSB_DRV PS_ON# DDR_TYPE VCC5 + BOOT_SEL R203 1KR1%0402 + C 5V_DRV GND2 +1.8V_S0 200R1%0402 S D RN31 C339 C1000P50X0402 C268 X_C0.1U16Y0402 VREF1 G VCC18_SEN R202 5V DUAL Power VCC5 NN-P07D03LV_SO8-RH VCC_DDR VCTRL VCC18_DRV VCC3 VCC_DDR ENABLE 0R0402 R323 X_100R1%0402 +12V VCC3 Q53 N-IPD06N03LA_TO252 VCC_1V2 C376 C0.1U16Y0402 R322 Q46 5V_DRV DDR II VTT POWER - D C330 C2200P50X0402 5VDIMM VCC5_SB A For NB +1.8V Power Rail Q44 N-IPD06N03LA_TO252 G VCC3 VIN C325 X_C1000P50X0402 DDR II 1.8V POWER VREF2 + S C N-MMBT3904_NL_SOT23 R325 Q52 1KR0402 B D N-2N7002_SOT23 Q51 4.7KR0402 G C409 C0.1U16Y0402 VCC3_SB U12 S 10 E NB_VCC1P1 VDIMM 4.99KR1%0402 +1.8V_S0 R242 1KR0402 VCC3_SB D S S MS-6G-RBF-RH G DDR AND DDR II VOLT SELECT D Q49 N-2N7002_SOT23 G 11 R319 VCC5_SB CPU_THRIP# Q37 N-2N7002_SOT23 Q43 N-2N7002_SOT23 33R0402 1.8V 11 5VUSB_DRV 5V_DRV VCC18_DRV VCC18_SEN WD_DET VCCA_1P2_DRV S B 2.5V 1.2V R529 R221 PULL HIGH 2.4KR1%0402-1 C320 C1U16X5 RAM_VREF PULL LOW R528 +1.8V_S0 C327 C1U16X5 36 35 34 33 32 31 30 29 28 27 26 25 + DDR_TYPE NB_VCC1P1 - C356 C0.1U16Y0402 Q33 N-IPD06N03LA_TO252 G 9VSB U18C LM324DR2G_SOIC14 2.2R0805 Q45 N-2N7002_SOT23 G R313 4.7KR0402 SLP_S3# G VCC5_SB RAM_SBDRV LM324DR2G_SOIC14 R212 1KR0402 C334 C0.1U16Y0402 C361 C0.22U16X 4.7KR0402 R308 4.7KR0402 EC37 CD100u16EL11-RH PLED1/EXTRAM PLED0/3VDLDEC# CPU_PWGD CHIP_PWGD I2C_CLK I2C_DATA RSMRST# S5# S3# PWR_OK 5VSB GND RAM_SBDRV R229 R295 14 5V DIMM Power 26 PS_ON# 34 AGP_ART DDRTYPE C396 C0.1U16Y0402 + R306 750KR0402 X_C1000P50X0402 VCC5_SB For CPU, NB & SB +1.2V Power Rail C1 C2 CHRPMP AGND1 5VUSB_DRV 5V_DRV VAGP_DRV VAGP_SEN WD_DET 1.2VLDT_DRV 1.2VLDT_SEN TMP_FAULT# PS_ON# N-NDS351AN_SOT23 U18D C342 C0.1U16Y0402 48 47 46 45 44 43 42 41 40 39 38 37 CPU VLDT Power C385 G +1.2VSB 9VSB PSIN# PSOUT# MEMBT SS 5VSB DDRTYPE VDIMM_LSEN VDIMM_LDRV VDIMM_HSEN VDIMM_HDRV 3VSB_SEN 3VSB_DRV R278 300R0402 R272 300R0402 C374 C0.1U16Y0402 U16 13 14 15 16 17 18 19 20 21 22 23 24 CD100u16EL5-RH C369 X_C0.1U16Y0402 C373 C4.7U10Y0805 + EC30 11 E C E R271 4.7KR0402 R273 4.7KR0402 PEX1_RST# - VCCA_1P2_DRV Q42 + 1_25VREF + 13 + U18B LM324DR2G_SOIC14 + VRM_GD PWM_EN V1P_25 VCC5 25,31 PEX1_RST# VCC3 VDDA_25 FP_RST# PCIRST# HDD_RST# DEV_RST# VDD_GD VDD_EN 1.25VREF VCC5 SLOT_RST# VCC3 2.5VDDA AGND0 12 + 10 11 12 9VSB 3VDLDEC# EXTRAM 8P4R-4.7KR0402 VCC5_SB 18,34 FP_RST# 17 A_RST# R299 2.4KR1%0402-1 VCC5_SB VCC3_SBVCC5 VCC5 VCC3 C379 C22P50N0402 C388 X_C1000P50X0402 C V_1P2_REF SB_PWRGD 18,34 SCLK 7,10,11,18,23,33 SDATA 7,10,11,18,23,33 RSMRST# 18 SLP_S5# 18 SLP_S3# 18,26 PWR_OK 34 R302 68.1KR1%0402 + A_RST# U18A LM324DR2G_SOIC14 + B VCC5_SB RN32 VCC_DDR VCC3_SB R224 1KR0402 B Q41 N-MMBT3904_NL_SOT23 9VSB R296 100R1%0402 PULL LOW C355 X_C1000P50X0402 34 SUS_LED For NB +1.1V_SUS Power Rail 9VSB PULL HIGH PULL HIGH 34 PWR_LED Q38 N-MMBT3904_NL_SOT23 C PWM REGULATOR DUAL MOSFET For SB +1.2V_SUS Power Rail PULL LOW V1P_25 VCC3_SB SINGLE MOSFET D LINEAR REGULATOR 3VDLDEC# 3VSB MODE EXTRAM EC31 X_CD100u16EL5-RH 3VSB MODE SELECT NB RS780/SB700 CORE POWER VDIMM LINEAR OR PWM SELECT VDIMM MODE EC34 CD1000U6.3EL11.5 ACPI Controller EC39 CD1000U6.3EL11.5 Rev 0B Sheet Friday, August 24, 2007 27 of 35 IEEE-1394 VT6308P VCC3 VDD For 6308P VCC3 P3VA FS7 F-MINISMDC150 4.7KR0402 R415 +12V VCC5 PAR FRAME# IRDY# TRDY# STOP# 100R0402 DEVSEL# PREQ#2 PGNT#2 PERR# PCI_INTC# 123 124 126 128 108 127 96 95 91 PAR FRAME# IRDY# TRDY# STOP# IDSEL DEVSEL# REQ# GNT# PERR# INTA# CK_P_33M_1394 93 PCICLK 92 PCIRST# 37 PME# 39 49 24 62 65 76 75 90 89 88 87 86 85 84 94 103 111 121 16 26 34 66 NC/D6/CMC_JMP PHYRESET# 54 55 53 NC/LINKON NC/LREQ NC/D5 NC/D4 D3/CARDBUS D2/I2CEEN NC/D1 NC/D0 NC/MODE0 NC/MODE1 NC/SCLK NC/LPS NC#67 57 56 51 48 47 46 45 44 43 42 40 38 67 EECK/SCL EEDI/SDA EEDO EECS 32 31 30 29 D Placement close to ESD doide power pin PCIRST# TPA0+ TPA0TPB0+ TPB0- C609 C100P50N0402 R404 11KR1%0402 R407 CPWR_F TPA_0+ TPA_0TPB_0+ TPB_0- 8P4R-0R L12-1818017-CA8 1KR1%0402 R411 C537 C1U10Y 6.2KR1%0402 C545 C47P50N0402-RH C XI 60 XO 61 TPBIAS0 C537 please use 1uF to replace 0.1uF cap, >35ms C564 C0.33U0402-RH R443 R435 R431 4.99KR1%0402 R414 R430 C551 54.9R1%0402 54.9R1%0402 54.9R1%0402 54.9R1%0402 TPA0+ TPA0TPB0+ TPB0- C270P16X0402 P3VA R402 4.7KR0402 WIRE:R402=X > USE EEPROM WIRE:R402=_ > NO EEPROM VCC3 P3VA FB5 X_80L3_70_0805 P3VA R436 R397 1MR0402 VSS10 VSSC3 B XREST C676 C0.1U16Y0402 For EMI RN34 REG_OUT REG_FB 63 NC/CTL0/PC0JMP NC/CTL1/PC1JMP NC/D7/PC2JMP 41 50 17,26,32,33 PCIRST# VSSC1 VSS9 PCIRST# NC/REG_OUT NC/REG_fb NC#86 NC/REG_en NC/INTREG +/-100ppm 115 36 17,21 CK_P_33M_1394 VSSC2 R472 17,32 DEVSEL# 17 PREQ#2 17 PGNT#2 17,32 PERR# 17,32 PCI_INTC# 25 PAR FRAME# IRDY# TRDY# STOP# GNDATX0 GNDARX0 GNDARX1 GNDATX1 GNDARX2 GNDATX2 AD18 17,32 17,32 17,32 17,32 17,32 81 80 79 78 77 52 58 VT6308P C749 C0.01U16X0402 CBE3# CBE2# CBE1# CBE0# XTPBIAS1 XTPA1P XTPA1M XTPB1P XTPB1M TPBIAS0 TPA0+ TPA0TPB0+ TPB0- 107 122 15 C_BE#[3 0] 74 73 72 71 70 XCPS 59 64 68 69 82 83 17,32 C_BE#[3 0] XTPBIAS0 XTPA0P XTPA0M XTPB0P XTPB0M C_BE#3 C_BE#2 C_BE#1 C_BE#0 C U26 VDDATX0 VDDARX0 VDDATX1 VDDARX1 VDDATX2 VDDARX2 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 VDD6 VDDC3 97 98 99 100 101 104 105 106 109 110 112 116 117 118 119 120 10 11 12 13 14 17 18 19 21 22 23 27 28 CPWR_F C634 C0.1U16Y0402 VDDC2 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 RAMVSS 17,32 AD[31 0] VDD1 VDD2 VDD3 VDD4 VDD5 RAMVDD AD[31 0] VDDC1 PWRDET 102 113 125 20 33 D 114 35 EMI_0B CPWR A C D30 DIODE,40V,2A, CP37 4.7KR0402 X_CP J1394 CPWR_F TPB_0TPA_0- C535 C10P50N0402 Y4 TPB_0+ TPA_0+ H2X4[8]M_BLACK-RH 24.576MHZ16P_D-1 C534 C10P50N0402 B VT6308P-CD-RH IDSEL = AD18 MASTER = PREQ#2 PCI_INTC# PCICLK#2 VCC3 VDD VCC3 P3VA C538 C621 C576 C641 C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 C0.1U16Y0402 C620 C539 C611 C605 C606 C604 C583 C574 C549 U31 ESD-IP4220 TPB_0+ TPA_0+ TPB_0- TPA_0- C533 B Q59 X_2SB1197K REG_OUT R457 REG_FB 0R0402 240R1%0402 C587 X_C0.1U16Y0402 C554 C VCC5 VDD For VT6308 E For IEEE-1394 ESD C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 C0.1U16Y0402 X_C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 A A CD100u16EL11-RH MICRO-START INT'L CO.,LTD + EC45 P3VA Title IEEE-1394 VT6308P Size Document Number Custom L-A780 Date: Friday, August 24, 2007 Rev 0B Sheet 28 of 35 Audio Codec ALC662 (ALC888) Layout Follow Route PIN.36 LINE1-IN-R CD-R 20 CD-R LINE1-IN-L LINE1-IN-R AVDD1 AVSS1 25 26 C588 VREF MIC1-VREFO-L 27 28 C610 LINE1-VREFO 29 FRONT-L 30 MIC2-VREFO 31 32 LINE2-VREFO MIC1-VREFO-R SURR_OUT_L AZ_RST# C607 C22p50N0402 AZ_RST# 18,21 AZ_SYNC 18 AZ_SDIN 18 AZ_BIT_CLK 18 AZ_SDOUT 18 AZ_RST# C591 AZ_BIT_CLK C603 MIC2-VREFO LINE2-VREFO 120L600mA-250 L34 F_L_1 120L600mA-250 L35 F_R_2 FRONT-JD F_L_2 R258 75R0402 MIC1-VREFO-L R254 2.7KR0402 MIC1-VREFO-R R253 2.7KR0402 2 D29 S-BAT54A_SOT23 1/16W, 2.5V, max:25mA MIC1-IN-R CD10u16EL5 EC49 1+ MIC1-IN-L CD10u16EL5 EC48 1+ C100P50N0402 JACK-AUDIOX3F_PK/GR/BU-RH-4 Pin Assignment Location Re-tasking LINE1 (pin-23/24) FRONT(pin-35/36) MIC1 (pin-21/22) Rear Panel Rear Panel Rear Panel line input AMP output MIC input SURR (pin-39/41) Rear RCA Jack Line output CEN/LFE (pin-43/44) N/A SIDE-SURR (pin-45/46) N/A Line output Line output LINE2 (pin-14/15) FMIC (pin-16/17) AMP output Stereo MIC input M_INR_1 75R0402 R562 M_INR_0 120L600mA-250 L32 M_INL_1 75R0402 R563 M_INL_0 120L600mA-250 L33 M_INR_2 MIC1-JD M_INL_2 17 JACK-AUDIOX3F_PK/GR/BU-RH-4 CD IN MONO Amplifier Analog Area VCC5 AC_HP_SNS R280 LC_SENSE X_100KR0402 G C798 X_C2.2u10Y-RH CDR C640 C646 C636 C1U10Y C1U10Y C1U10Y R490 47KR0402 CD-L CD-GND CD-R R499 20KR1%0402 C655 U35 C667 8P4R-10KR0402 BH1X4_BLACK-RH Q71 X_N-2N7002_SOT23 X_C0.1u16Y0402 C670 R495 C1U10Y 20KR1%0402 18,34 SPKR R491 4.7KR0402 R486 100KR0402 CDL CDGND RN35 8P4R-47KR0402 C0.01U16X0402 SHUTDOWN VOUTB BYPASS VIN+ V+ INVOUTA MONO1 MONO_OUT_B MONO_OUT_A B BH1X2B_WHITE-RH SSM2211SZ_SOIC8-LF R500 33KR0402 C671 C0.1U16Y0402 HP_SNS MIC_SNS 10 12 H2X7[14]M_ORANGE-RH RN36 D F_AUDIO 11 13 Digital Area CD_IN N32-1020561-H06 N32-1020061-A10 N32-1020761-F02 LC_SENSE 18 3.3V Level GPIO from South bridge or Codec R497 R482 22KR0402 22KR0402 R493 R483 22KR0402 22KR0402 D28 ESD-SFI/SFI0603ML080C-LF D31 ESD-SFI/SFI0603ML080C-LF D27 ESD-SFI/SFI0603ML080C-LF D32 ESD-SFI/SFI0603ML080C-LF Analog Area SURR_OUT_L C619 C1U10Y SURR_OUT_R C618 C1U10Y MONO_OUT Digital Area Audio Power EMI Digital Area Analog Area VCC5_SB Sense_B MIC_R Trace Width 40mils U27 LT1087S_SOT89 C590 VIN VOUT LINE1-IN-R LINE1-IN-L AVDD5 HP_R HP_L C0.1U16Y0402 EC59 C615 CD100u16EL5-RH C0.1U16Y0402 C673 R462 200R1% C578 X_C100P50N0402 C579 X_C100P50N0402 MIC_L + + CD100u16EL5-RH +12V EC52 D22 S-1N5817_DO214AC R901 10R1%0805 ADJ D23 BAS32L_LL34 A C 18 D13 ESD-SFI/SFI0603ML080C-LF D12 ESD-SFI/SFI0603ML080C-LF S 1 1 R558 75R0402 R557 75R0402 R487 75R0402 R498 75R0402 ESD CAP Front Panel Front Panel JUMPER-1X2A_GREEN-RH-1 MIC_R MIC_L HP_R HP_L CD100u16EL5-RH CD100u16EL5-RH CD100u16EL5-RH HP_R_1 CD100u16EL5-RH HP_L_1 2 2 2 1+ 1+ 1+ 1+ CENTER-LEF or MIC INPUT ALC888/ALC662 Desktop Configuation(5.1 Channel solution) (3 Jacks at rear panel , jacks at front panel) MONO_OUT EC62 EC51 EC60 EC50 MIC IN(C) D AUDIO PANEL AUDIO1 D15 ESD-SFI/SFI0603ML080C-LF D14 ESD-SFI/SFI0603ML080C-LF X_C1000P50X0402 VCC3 RN37 8P4R-4.7KR0402 MIC_IN-R MIC_IN-L HP_OUT-R HP_OUT-L SURROUND or LINE_IN 6.0 D33 S-BAT54A_SOT23 B LINE OUT(B) 3 35mm AUDIO1B F_R_1 In order to meet the input/output performance of Vista Premium requirement, 10uF DIP caps and 22K pull-down resistors F_AUDIO_X1 2 R257 75R0402 R252 22KR0402 R255 22KR0402 Front Audio Jack LINE_OUT (front channel) AUDIO1C 22R0402 22R0402 AZ_BIT_CLK C0.1U16Y0402 F_L_0 1+ EC56 CD100u16EL5-RH D16 ESD-SFI/SFI0603ML080C-LF D18 ESD-SFI/SFI0603ML080C-LF R259 22KR0402 R256 22KR0402 ALC662-GR-B1-RH VCC3 C608 15 AVDD5 C0.1U16Y0402 MIC2-VREFO R459 R460 EC57 CD100u16EL5-RH F_R_0 1+ R260 22KR0402 R282 22KR0402 C10u10Y0805 MIC1-VREFO-L LINE2-VREFO MIC1-VREFO-R 1 43 44 CENTER LFE DVDD-IO SYNC 23 24 11 12 DVDD1 In order to meet the input/output performance of Vista Premium requirement, 10uF DIP caps and 22K pull-down resistors Digital Area R471 20KR1%0402 SURR_OUT_R ALC888 C 40 41 42 REALTEK MIC1-L MIC1-R LINE1-L LINE1-R 14 JACK-AUDIOX3F_PK/GR/BU-RH-4 Sense A LINE2-L LINE2-R MIC2-L MIC2-R CD-L CD-GND PIN.12 FRONT-R MIC1-IN-L MIC1-IN-R 16 LINE IN(A) Analog Area 21 22 L_INL_2 13 14 15 16 17 18 19 EC47 1+ 10 11 12 13 PIN.13 PIN.1 RESET# PCBEEP Sense_A HP_OUT-L HP_OUT-R MIC_IN-L MIC_IN-R CD-L CD-GND 10 20KR1%0402 BCLK DVSS2 SDATA-IN MIC1-JD DVSS1 SDATA-OUT 10KR1%0402 SIDE-L SIDE-R SPDIFI/EAPD SPDIFO LINE1-JD R450 45 46 47 48 5.1KR0402 GPOI0/DMIC-CLK GPIO1/DMIC-DATA FRONT-JD R449 NC Sense B FRONT-L FRONT-R PIN37-VREFO AVDD2 SURR-L U28 JD resistors should be placed as close as possible to the sense pin of CODEC 33 34 35 36 37 38 39 X_10KR0402 JDREF SURR-R AVSS2 Sense_B FRONT-L FRONT-R R463 AVDD5 LINE1-IN-L C0.1U16Y0402 C616 For Standby Mode/De-pop 120L600mA-250 L_INL_0 L36 X_39.2KR1%0402 CD10u16EL5 75R0402 L_INL_1 R561 L_INR_2 LINE1-JD 20KR1%0402 R559 120L600mA-250 L_INR_0 L37 39.2KR1%0402 R485 AC_HP_SNS 75R0402 L_INR_1 R560 R484 MIC_SNS CD10u16EL5 HP_SNS EC46 1+ PIN.24 PIN.47 PIN.48 Spilt by DGND AVDD5 D AUDIO1A PIN.25 Reference resistor PIN.37 for Jack Detection(close to the codec) PIN.46 Default is ALC662 R448 Rear Phone Jack R461 680R1% C657 C663 C660 C751 FRONT-R FRONT-L C614 X_C100P50N0402 C613 X_C100P50N0402 MIC1-IN-R MIC1-IN-L C580 X_C100P50N0402 C581 X_C100P50N0402 CP47 CP46 Tied at one point only under the codec or near the codec C658 C1000P50X0402 A For EMI Placement close to Codec chip C381 X_C1000P50X0402 MICRO-START INT'L CO.,LTD X_C1000P50X0402 X_C1000P50X0402 C0.1U16Y0402 X_C1000P50X0402 X_C1000P50X0402 Title ALC883 Analog Area Digital Area Size Document Number Custom L-A780 Date: Rev 0B Tuesday, August 28, 2007 Sheet 29 of 35 E D Rear POWER CIRCUIT FOR USB PORT 0,1 USB_STR NEAR USB CONNECTOR C POWER CIRCUIT FOR USB PORT 2,3,4,5 SVCC1 USB_STR B Rear POWER CIRCUIT FOR USB PORT 6,7,8,9 SVCC2 NEAR USB CONNECTOR USB_STR1 NEAR USB CONNECTOR A Front POWER CIRCUIT FOR USB PORT 10,11 SVCC11 Front SVCC12 USB_STR1 NEAR USB CONNECTOR EMI R481 C647 1KR0402 R494 4.7KR0402 C0.1U16Y0402 C666 C0.1U16Y0402 OC#4 C675 C0.1U16Y0402 18 EC61 CD1000U6.3EL11.5 R479 C637 F-MINISMDC150 R496 2.7KR0402 1KR0402 R477 4.7KR0402 C0.1U16Y0402 EMI C631 C0.1U16Y0402 1KR0402 OC#3 EC58 CD1000U6.3EL11.5 R161 C239 EC23 CD1000U6.3EL11.5 C0.1U16Y0402 R155 4.7KR0402 18 C639 C0.1U16Y0402 EMI C203 C0.1U16Y0402 OC#1 C513 C0.1U16Y0402 1KR0402 C0.1U16Y0402 C266 C0.1U16Y0402 C522 C0.1U16Y0402 R185 4.7KR0402 18 R480 2.7KR0402 FS5 + OC#1 F-SMD1812P260TF-RH + + 18 R156 2.7KR0402 FS6 + R181 2.7KR0402 F-SMD1812P260TF-RH R179 FS3 C261 F-MINISMDC150 EC29 CD1000U6.3EL11.5 FS4 EMI REAR PANEL USB CONNECTOR FOR USB PORT 0,1 FRONT PANEL USB CONNECTOR FOR USB PORT 6,7 SVCC2 SVCC2 L51 L10 U9 ESD-IP4220 SBD3+ SBD2- SBD3- USB3+ USB3USB2+ USB2- USB1B SBD3+ SBD3SBD2+ SBD2- 16 15 14 13 12 11 10 SBD2+ SBD2SBD3+ SBD3- 8P4R-0R SBD2+ 18 18 18 18 18 18 18 18 21 22 13 UP USB6USB6+ USB7USB7+ FUSB_G1 26 SBD6SBD6+ SBD7SBD7+ SVCC11 F_USB1 8P4R-0R SBD6SBD6+ SVCC11 SECOND USBAX4M_BLACK-RH-3 C625 10 12 U29 ESD-IP4220 NEAR USB CONNECTOR 22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22 SBD7SBD7+ C0.1U16Y0402 EMI H2X6[11]M_YELLOW-RH SBD7+ SBD6+ SBD7- SBD6- NEAR USB CONNECTOR SVCC2 22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22 SVCC2 U10 ESD-IP4220 USB1A L11 SBD4- SBD5+ SBD4+ 18 18 18 18 USB5+ USB5USB4+ USB4- SBD5- SBD5+ SBD5SBD4+ SBD4- SBD4+ SBD4SBD5+ SBD5- 8P4R-0R USB CARD READER + IR MODULE FOR USB PORT 8,9 17 18 19 20 THIRD L50 18 18 18 18 DOWN USBAX4M_BLACK-RH-3 NEAR USB CONNECTOR USB9USB9+ USB8USB8+ SBD9SBD9+ SBD8SBD8+ FUSB_G2 26 SVCC11 8P4R-0R F_USB2 22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22 SVCC11 SBD8SBD8+ REAR PANEL USB CONNECTOR FOR USB PORT 2,3 SBD8+ SBD9+ SBD8- SBD9- SVCC1 X_C0.1U16Y0402 C718 SBD1- U13 ESD-IP4220 L15 SBD1+ SBD0- SBD0+ 18 18 18 18 USB1+ USB1USB0+ USB0- SBD1+ SBD1SBD0+ SBD0- SBD0SBD0+ SBD1SBD1+ 8P4R-0R LAN_USB1A PWR USBUSB+ GND UP PWR USBUSB+ GNDDOWN H2X6[11]M_YELLOW-RH GND GND GND GND GND GND GND GND 23 24 25 26 27 28 29 30 USB CARD READER + IR MODULE FOR USB PORT 10, 11 FUSB_G3 26 SVCC12 L52 18 18 18 18 USB10USB10+ USB11USB11+ SBD10SBD10+ SBD11SBD11+ F_USB3 SBD10SBD10+ 8P4R-0R SVCC11 SVCC12 C748 C0.01U16X0402 10 12 SBD11SBD11+ H2X6[11]M_YELLOW-RH U32 ESD-IP4220 SBD11- SBD10- For EMI Placement close to ESD doide power pin SBD11+ SBD10+ NEAR USB CONNECTOR 22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22 MICRO-START INT'L CO.,LTD Title 2 C656 C0.01U16X0402 C654 C0.01U16X0402 2 C717 C0.01U16X0402 C251 C0.01U16X0402 SVCC12 NEAR USB CONNECTOR 22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22 SVCC2 SBD9SBD9+ 22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22 RJ45_USBX2_LEDX2_TX-Giga-RH-4 NEAR USB CONNECTOR 10 12 SVCC1 U30 ESD-IP4220 USB CONNECTORS Size Document Number Custom L-A780 Date: E D C B Rev 0B Sheet Tuesday, August 28, 2007 A 30 of 35 PCI Express Slot x16/x1 PCI EXPRESS x16 Slot PCI EXPRESS Slot-1 +12V SCLK1 SDATA1 18,25,32,33 SCLK1 18,25,32,33 SDATA1 VCC3 VCC3_SB 18,25 WAKE# 14 GFX_TXC_0P 14 GFX_TXC_0N GFX_TXC_0P C415 C0.1U10X0402 GFX_TXC_0N C414 C0.1U10X0402 14 GFX_TXC_2P 14 GFX_TXC_2N 14 GFX_TXC_3P 14 GFX_TXC_3N C 14 GFX_TXC_5P 14 GFX_TXC_5N 14 GFX_TXC_6P 14 GFX_TXC_6N EXP_A_TXP_1_C EXP_A_TXN_1_C GFX_TXC_2P C421 C0.1U10X0402 GFX_TXC_2N C425 C0.1U10X0402 EXP_A_TXP_2_C EXP_A_TXN_2_C GFX_TXC_3P C426 C0.1U10X0402 GFX_TXC_3N C422 C0.1U10X0402 R555 GFX_TXC_4P C427 C0.1U10X0402 GFX_TXC_4N C428 C0.1U10X0402 14 GFX_TXC_9P 14 GFX_TXC_9N B 14 GFX_TXC_10P 14 GFX_TXC_10N 14 GFX_TXC_11P 14 GFX_TXC_11N 14 GFX_TXC_12P 14 GFX_TXC_12N 14 GFX_TXC_13P 14 GFX_TXC_13N 14 GFX_TXC_14P 14 GFX_TXC_14N 14 GFX_TXC_15P 14 GFX_TXC_15N 0R0402 EXP_A_TXP_4_C EXP_A_TXN_4_C GFX_TXC_5P C429 C0.1U10X0402 GFX_TXC_5N C430 C0.1U10X0402 EXP_A_TXP_5_C EXP_A_TXN_5_C GFX_TXC_6P C423 C0.1U10X0402 GFX_TXC_6N C431 C0.1U10X0402 EXP_A_TXP_6_C EXP_A_TXN_6_C GFX_TXC_7P C432 C0.1U10X0402 GFX_TXC_7N C433 C0.1U10X0402 EXP_A_TXP_7_C EXP_A_TXN_7_C 15,22 HPD_DVI 14 GFX_TXC_8P 14 GFX_TXC_8N EXP_A_TXP_3_C EXP_A_TXN_3_C HPD_DVI R327 0R0402 GFX_TXC_8P C434 C0.1U10X0402 GFX_TXC_8N C435 C0.1U10X0402 EXP_A_TXP_8_C EXP_A_TXN_8_C GFX_TXC_9P C436 C0.1U10X0402 GFX_TXC_9N C437 C0.1U10X0402 EXP_A_TXP_9_C EXP_A_TXN_9_C GFX_TXC_10PC438 C0.1U10X0402 GFX_TXC_10NC439 C0.1U10X0402 GFX_TXC_11PC440 C0.1U10X0402 GFX_TXC_11NC441 C0.1U10X0402 EXP_A_TXP_10_C EXP_A_TXN_10_C EXP_A_TXP_11_C EXP_A_TXN_11_C GFX_TXC_12PC442 C0.1U10X0402 GFX_TXC_12NC443 C0.1U10X0402 EXP_A_TXP_12_C EXP_A_TXN_12_C GFX_TXC_13PC444 C0.1U10X0402 GFX_TXC_13NC445 C0.1U10X0402 EXP_A_TXP_13_C EXP_A_TXN_13_C GFX_TXC_14PC416 C0.1U10X0402 GFX_TXC_14NC417 C0.1U10X0402 GFX_TXC_15PC418 C0.1U10X0402 GFX_TXC_15NC419 C0.1U10X0402 HPD_DVI EXP_A_TXP_14_C EXP_A_TXN_14_C EXP_A_TXP_15_C EXP_A_TXN_15_C R554 X_0R0402 PRSNT1# 12V 12V#A3 GND JTAG2 JTAG3 JTAG4 JTAG5 3.3V 3.3V#A10 PWRGD A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 B12 B13 B14 B15 B16 B17 B18 RSVD#B12 GND#B13 HSOP0 HSON0 GND#B16 PRSNT2# GND#B18 GND#A12 REFCLK+ REFCLKGND#A15 HSIP0 HSIN0 GND#A18 A12 A13 A14 A15 A16 A17 A18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 HSOP1 HSON1 GND#B21 GND#B22 HSOP2 HSON2 GND#B25 GND#B26 HSOP3 HSON3 GND#B29 RSVD#B30 PRSNT2##B31 GND#B32 RSVD GND#A20 HSIP1 HSIN1 GND#A23 GND#A24 HSIP2 HSIN2 GND#A27 GND#A28 HSIP3 HSIN3 GND#A31 RSVD#A32 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 HSOP4 HSON4 GND#B35 GND#B36 HSOP5 HSON5 GND#B39 GND#B40 HSOP6 HSON6 GND#B43 GND#B44 HSOP7 HSON7 GND#B47 PRSNT2##B48 GND#B49 RSVD#A33 GND#A34 HSIP4 HSIN4 GND#A37 GND#A38 HSIP5 HSIN5 GND#A41 GND#A42 HSIP6 HSIN6 GND#A45 GND#A46 HSIP7 HSIN7 GND#A49 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 X1 HSOP8 HSON8 GND#B52 GND#B53 HSOP9 HSON9 GND#B56 GND#B57 HSOP10 HSON10 GND#B60 GND#B61 HSOP11 HSON11 GND#B64 GND#B65 HSOP12 HSON12 GND#B68 GND#B69 HSOP13 HSON13 GND#B72 GND#B73 HSOP14 HSON14 GND#B76 GND#B77 HSOP15 HSON15 GND#B80 PRSNT2##B81 RSVD#B82 X1 RSVD#A50 GND#A51 HSIP8 HSIN8 GND#A54 GND#A55 HSIP9 HSIN9 GND#A58 GND#A59 HSIP10 HSIN10 GND#A62 GND#A63 HSIP11 HSIN11 GND#A66 GND#A67 HSIP12 HSIN12 GND#A70 GND#A71 HSIP13 HSIN13 GND#A74 GND#A75 HSIP14 HSIN14 GND#A78 GND#A79 HSIP15 HSIN15 GND#A82 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 COMM_EN VCC3_SB PE_TCK DP_AUX1P_CON DP_AUX1N_CON PE_TMS SCLK1 SDATA1 VCC3 PEX1_RST# PCIE1_X1 +12V VCC3 COMM_EN 15 PEX1_RST# 25,27 WAKE# B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 12V 12V#B2 RSVD GND SMCLK SMDATA GND#B7 3.3V JTAG1 3.3VAUX WAKE_# B12 B13 B14 B15 B16 B17 B18 RSVD#B12 GND#B13 HSOP0+ HSOP0GND#B16 PRSNT2_# GND#B18 From Clock Gen PE16_GXF_CLK PE16_GXF_CLK# GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N PE16_GXF_CLK 23 PE16_GXF_CLK# 23 GFX_RX0P 14 GFX_RX0N 14 14 GPP_TX0P 14 GPP_TX0N C402 C0.1U10X0402 GPP_TX0P_C C404 C0.1U10X0402 GPP_TX0N_C GFX_RX1P 14 GFX_RX1N 14 PRSNT1_# 12V#A2 12V#A3 GND#A4 JTAG2 JTAG3 JTAG4 JTAG5 3.3V#A9 3.3V#A10 PWRGD X1 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 X1 GND#A12 REFCLK+ REFCLKGND#A15 HSIP0+ HSIP0GND#A18 X2 A12 A13 A14 A15 A16 A17 A18 X2 D VCC3 PEX1_RST# PE1_GPP_CLK1 23 PE1_GPP_CLK1# 23 GPP_RX0P 14 GPP_RX0N 14 SLOT-PCI36_WHITE-2PITCH-RH-4 GFX_RX2P 14 GFX_RX2N 14 VCC3 GFX_RX3P 14 GFX_RX3N 14 R332 X_4.7KR0402 DP_AUX1P_CON R328 X_4.7KR0402 PE_TMS R369 X_4.7KR0402 PE_TCK R329 X_4.7KR0402 TMDS_HPD1_CON C GFX_RX4P 14 GFX_RX4N 14 GFX_RX5P 14 GFX_RX5N 14 +12V GFX_RX6P 14 GFX_RX6N 14 VCC3 C521 GFX_RX7P 14 GFX_RX7N 14 C403 VCC3_SB C400 C523 +12V C401 VCC3 C448 C492 C0.1U16Y0402 GFX_RX8P 14 GFX_RX8N 14 + 14 GFX_TXC_7P 14 GFX_TXC_7N 0R0402 GFX_TXC_1P C424 C0.1U10X0402 GFX_TXC_1N C420 C0.1U10X0402 15 SCL0_AUX0N 14 GFX_TXC_4P 14 GFX_TXC_4N EXP_A_TXP_0_C EXP_A_TXN_0_C R556 15 SDA0_AUX0P 14 GFX_TXC_1P 14 GFX_TXC_1N TMDS_HPD1_CON WAKE# +12V X2 12V#B1 12V#B2 RSVD#B3 GND#B4 SMCLK SMDAT GND#B7 3.3V#B8 JTAG1 3.3VAUX WAKE# D PCIE16_X1 X2 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 EC44 C490 VCC3_SB C447 +12V C446 C0.1U16Y0402 X_C0.1u16Y0402 C0.1U16Y0402 C0.1U16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402 C0.1U16Y0402 C0.1U16Y0402 CD470u16EL11.5-RH X_C0.1u16Y0402 Placement Between at PCIE_X1 Placement Close To PCIE16_X1 GFX_RX9P 14 GFX_RX9N 14 B For Display Port GFX_RX10P 14 GFX_RX10N 14 15 DP_AUX1P GFX_RX11P 14 GFX_RX11N 14 15 DP_AUX1N GFX_RX12P 14 GFX_RX12N 14 G2 S2 G1 S1 R550 GFX_RX13P 14 GFX_RX13N 14 D2 D1 X_0R0402 D2 TMDS_HPD1_CON D1 R279 G2 S2 X_10KR0402COMM_EN G1 S1 D2 R553 X_4.7KR0402 D1 R551 10KR0402 VCC3 SLOT-PCI164P_YELLOW-2PITCH-RH 100KR0402 +12V Q74 NN-2N7002DW-7-F_SOT363-6-RH GFX_RX14P 14 GFX_RX14N 14 R552 DP_AUX1N_CON Q73 NN-2N7002DW-7-F_SOT363-6-RH G2 S2 G1 S1 15 TMDS_HPD1 GFX_RX15P 14 GFX_RX15N 14 DP_AUX1P_CON Q75 NN-2N7002DW-7-F_SOT363-6-RH A A MICRO-START INT'L CO.,LTD Title PCI EXPRESS X16 & X1 SLOT Size Document Number Custom L-A780 Date: Friday, August 24, 2007 Rev 0B Sheet 31 of 35 PCI SLOT (PCI VER: 2.3 COMPLY) -12V VCC5 D VCC3 17 PCI_CLK0 PREQ#0 AD31 AD29 AD27 AD25 C_BE#3 AD23 AD21 AD19 AD17 C_BE#2 IRDY# DEVSEL# LOCK# PERR# C SERR# C_BE#1 AD14 AD12 AD10 AD8 AD7 AD5 AD3 AD1 ACK#64 -12V +12V +12V PCI2 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 X1 -12V TRST# TCK +12V GND#B3 TMS TDO TDI +5V#B5 +5V +5V#B6 INTA# INTB# INTC# INTD# +5V#A8 PRSNT#1 RESERVED RESERVED#B10 +5V(I/O) PRSNT#2 RESERVED#A11 GND#B12 GND GND#B13 GND#A13 RESERVED#B14 3.3VAUX GND#B15 RST# CLK +5V(I/O)#A16 GND#B17 GNT# REQ# GND#A18 +5V(I/O)#B19 PME# AD31 AD30 AD29 +3.3V GND#B22 AD28 AD27 AD26 AD25 GND#A24 +3.3V#B25 AD24 C/BE#3 IDSEL AD23 +3.3 GND#B28 AD22 AD21 AD20 AD19 GND#A30 +3.3V#B31 AD18 AD17 AD16 C/BE#2 +3.3V#A33 GND#B34 FRAME# IRDY# GND#A35 +3.3V#B36 TRDY# DEVSEL# GND#A37 GND#B38 STOP# LOCK# +3.3V#A39 PERR# SMBCLK +3.3V#B41 SMBDAT SERR# GND#A42 +3.3V#B43 PAR C/BE#1 AD15 AD14 +3.3V#A45 GND#B46 AD13 AD12 AD11 AD10 GND#A48 GND#B49 AD9 X1 X2 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 X2 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 AD8 AD7 +3.3V#B54 AD5 AD3 GND#B57 AD1 +5V(I/O)#B59 ACK64# +5V#B61 +5V#B62 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C/BE#0 +3.3V#A53 AD6 AD4 GND#A56 AD2 AD0 +5V(I/O)#A59 REQ64# +5V#A61 +5V#A62 VCC5 VCC5 PCI_INTA# PCI_INTC# PCI_INTC# PCI_INTA# VCC3 VCC3 VCC3_SB PCIRST# PCIRST# 17,26,28,33 17 PCI_CLK1 PGNT#0 PCI_PME# AD30 17 PREQ#1 PCI_PME# 18 AD31 AD29 AD28 AD26 AD24 R458 AD27 AD25 100R0402 AD16 C_BE#3 AD23 AD22 AD20 AD21 AD19 AD18 AD16 AD17 C_BE#2 FRAME# IRDY# TRDY# DEVSEL# STOP# SCLK1 SDATA1 PAR AD15 LOCK# PERR# SCLK1 18,25,31,33 SDATA1 18,25,31,33 PAR SERR# 17,28 C_BE#1 AD14 AD13 AD11 AD12 AD10 AD9 C_BE#0 AD8 AD7 AD6 AD4 AD5 AD3 AD2 AD0 AD1 REQ#64 ACK#64 SLOT-PCI120_white-RH B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 X1 -12V TRST# TCK +12V GND#B3 TMS TDO TDI +5V#B5 +5V +5V#B6 INTA# INTB# INTC# INTD# +5V#A8 PRSNT#1 RESERVED RESERVED#B10 +5V(I/O) PRSNT#2 RESERVED#A11 GND#B12 GND GND#B13 GND#A13 RESERVED#B14 3.3VAUX GND#B15 RST# CLK +5V(I/O)#A16 GND#B17 GNT# REQ# GND#A18 +5V(I/O)#B19 PME# AD31 AD30 AD29 +3.3V GND#B22 AD28 AD27 AD26 AD25 GND#A24 +3.3V#B25 AD24 C/BE#3 IDSEL AD23 +3.3 GND#B28 AD22 AD21 AD20 AD19 GND#A30 +3.3V#B31 AD18 AD17 AD16 C/BE#2 +3.3V#A33 GND#B34 FRAME# IRDY# GND#A35 +3.3V#B36 TRDY# DEVSEL# GND#A37 GND#B38 STOP# LOCK# +3.3V#A39 PERR# SMBCLK +3.3V#B41 SMBDAT SERR# GND#A42 +3.3V#B43 PAR C/BE#1 AD15 AD14 +3.3V#A45 GND#B46 AD13 AD12 AD11 AD10 GND#A48 GND#B49 AD9 X1 X2 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 X2 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 AD8 AD7 +3.3V#B54 AD5 AD3 GND#B57 AD1 +5V(I/O)#B59 ACK64# +5V#B61 +5V#B62 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C/BE#0 +3.3V#A53 AD6 AD4 GND#A56 AD2 AD0 +5V(I/O)#A59 REQ64# +5V#A61 +5V#A62 PCI_INTB# PCI_INTD# D VCC5 VCC3 PCIRST# VCC3_SB PGNT#1 17 PCI_PME# AD30 AD28 AD26 AD24 R396 100R0402 AD17 AD22 AD20 AD18 AD16 FRAME# TRDY# STOP# C SCLK1 SDATA1 PAR AD15 AD13 AD11 AD9 C_BE#0 AD6 AD4 AD2 AD0 REQ#64 SLOT-PCI120_white-RH IDSEL = AD16 MASTER = PREQ#0 PCI_INT A, B, C, D B PCI SLOT (PCI VER: 2.3 COMPLY) PCI1 PCI_INTB# PCI_INTD# IDSEL = AD17 MASTER = PREQ#1 PCI_INT B, C, D, A AD[0 31] 17,28 AD[0 31] C_BE#[0 3] 17,28 C_BE#[0 3] PCI PULL-UP / DOWN RESISTORS B PCI SLOT DECOUPLING CAPACITORS VCC5 17,28 FRAME# 17,28 IRDY# 17,28 DEVSEL# 17,28 TRDY# 17 SERR# 17,28 PERR# 17 LOCK# 17,28 STOP# 17 17,28 17 17 PCI_INTD# PCI_INTC# PCI_INTA# PCI_INTB# FRAME# IRDY# DEVSEL# TRDY# 17 PREQ#3 17 PREQ#5 17 PREQ#4 SERR# PERR# LOCK# STOP# PREQ#3 PREQ#5 PREQ#4 R446 R456 R455 2.7KR0402 2.7KR0402 2.7KR0402 ACK#64 REQ#64 R445 R433 8.2KR0402 8.2KR0402 PREQ#0 PREQ#1 R512 R511 2.7KR0402 2.7KR0402 VCC5 C500 X_C0.1U16Y0402 C562 X_C0.1U16Y0402 VCC5 PCI_INTD# PCI_INTC# PCI_INTA# PCI_INTB# 17 PREQ#0 17 PREQ#1 VCC3 VCC5 1+ VCC3 EC54 CD1000U6.3EL11.5 C563 C0.1U16Y0402 C601 C0.1U16Y0402 C624 X_C0.1U16Y0402 C622 C0.1U16Y0402 C596 X_C0.1U16Y0402 1+ VCC3_SB EC55 X_.CD1000U6.3EL11.5 C600 C0.1U16Y0402 C595 C0.1U16Y0402 C598 X_C0.1U16Y0402 C597 X_C0.1U16Y0402 C594 X_C0.1U16Y0402 1+ +12V EC53 X_.CD1000U6.3EL11.5 C561 C0.1U16Y0402 C592 C0.1U16Y0402 C599 X_C0.1U16Y0402 -12V C560 C0.1U16Y0402 C602 X_C0.1U16Y0402 C593 X_C0.1U16Y0402 C623 C0.1U16Y0402 C559 X_C0.1U16Y0402 A A MICRO-START INT'L CO.,LTD Title PCI SLOT & Size Document Number Custom L-A780 Date: Friday, August 24, 2007 Rev 0B Sheet 32 of 35 TPM Chipset VCC3 U17 17,26 LPC_AD[3 0] 17,26 LPC_FRAME# 17,26,28,32 PCIRST# 17,26 SERIRQ 17,21 PCI_CLK4 PCI_CLKRUN# R312 R317 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# 26 23 20 17 22 LAD0 LAD1 LAD2 LAD3 LFRAME# PCIRST# LPCPD# 16 28 15 27 LRESET# LPCPD# CLKRUN/GPIO4 SERIRQ 21 LCLK W06 0R0402 X_0R0402 SERIRQ PCI_CLK4 R286 X_10KR0402 VCC3 R311 4.7KR0402 R315 10KR0402 ASSET ID Chipset D 17 PCI_CLKRUN# LPCPD# SERIRQ GPIO3/BADD TEST GPIO0/XOR_OUT GPIO1 0R0402 R318 W06 3V_1 3V_2 19 24 VBAT SB3V 12 R288 W06 0R0402 GND1 GND2 GND4 18 25 R316 W06 X_0R0402 NC1 NC2 NC3 NC4 NC5 10 11 13 14 PP GPIO2/GPX C399 C0.1U16Y0402 D VCC3 R289 W06 0R0402 VCC3_SB VCC3_SB R339 4.7KR0402 C378 C0.1U16Y0402 VCC3 R331 X_4.7KR0402 C475 C0.1U16Y0402 U19 R285 R284 X_0R0402 X_0R0402 26 ASSID_GPIO0 7,10,11,18,23,27 SDATA 7,10,11,18,23,27 SCLK VCC3 0R0402 0R0402 R351 R352 WP SDA SCL GND VDD PROT NC1 NC2 ASSID_GPIO1 26 R99 4.7KR0402 PCA24S08D-RH R287 X_10KR0402 VCC3 WPCT200WG-RH R310 10KR0402 PCI_CLKRUN# ST & WINBOND CO-LAY PCI_CLK4 C C C398 X_C22P50N0402 ASF2.0 Hard Ware Monitor CPU Thermo Sense VBAT_IN VCC5_SB A0 R535 47KR0402 A1 R536 47KR0402 U37 VCC5 B C783 VCC3 I2C Address Selete 13 48 24 A1=1 0x5C 0x5E 30 SCL SDA 21 22 SKTOCC 12 16 15 A0 A1 3.3V CLK 17 29 CASEOPEN 7,26 THERMDA_CPU R524 X_0R0402 7,26 THERMDC_CPU R525 X_0R0402 HWM_D/N X_1KR0402 TALERT2# VCC3 1uA VBAT W83201G A1=0 0x58 0x5A R527 HWM_D+ VCC SCL SCLK1 D+ SDA SDATA1 D- ALERT# TALERT1# THERM# GND SCLK1 18,25,31,32 SDATA1 18,25,31,32 0R0402 R526 /N X_1KR0402 VCC3 SNSR-F75383S-LF VBAT_IN R521 B CPU_PRESENT# 7,19 HWM_D+ HWM_14M R518 A0 A1 22R0402 Place close to C782 F75383 HWM_14M_R 23 /N C781 X_C10u6.3X50805 VCC3 C3300P50X0402 C778 HWM_D- HWM_14M X_C22P50N0402 HWM_CI R520 0R0402 Chasiss 17 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A0=0 A0=1 5VDD 20 25 26 27 31 32 33 34 35 36 38 39 40 44 46 5VSB 5VSB NC NC NC NC NC NC NC NC U36 47 45 43 42 41 37 28 23 X_C22P50N0402 1 10 11 14 18 19 A W83201G A MICRO-START INT'L CO.,LTD Title TMP/Asset ID/HWM W83201G Size B Document Number Date: Friday, August 24, 2007 Rev L-A780 0B Sheet 33 of 35 ATX CONNECTOR C0.1U16Y0402 C232 R188 10KR0402 D R187 27 AGP_ART VCC3 13 3.3V -12V 14 15 C253 C0.1U16Y0402 0R0402 C265 X_C1000P50X0402 VCC5 C273 C0.1U16Y0402 LENOVO Front Panel Connector F_PANEL1 R478 25 ATX1 3.3V -12V 3.3V GND GND 25 VCC5_SB VCC3 VCC5 SLED# C346 C0.1U16Y0402 16 P_ON 5V 17 GND GND 18 GND 5V 19 GND GND 20 -5V POK 21 5V 5VSB 22 5V +12V 10 23 5V +12V 11 C322 24 GND 3.3V 12 C0.1U16Y0402 C0.1U16Y0402 VCC5 C644 X_C0.1U16Y0402 VCC5 330R SLED# HDD+ HDD- YELLOW SUSLED GNDL SPEAKER Green PWRLED SLED2 LED_SB PLED1 PWRSW+ PWRSW- PWSW- RESET 13 GNDR 14 R473 SVCC11 330R C257 C0.1U16Y0402 R195 4.7KR0402 R474 300R PWR_OK 27 VCC5_SB BUZ+ 10 BUZ- 11 PWSW+ VCCSPK 12 NC H2X7[13]_black-2.6mm-RH 4.7KR0402 VCC3 SATA_LED# SATA_LED# 19 D SPK1 VCC5 FP_RST# FP_RST# 18,27 C629 C0.1U16Y0402 C289 C1000P50X0402 +12V C294 POWER LED POWER BUTTON VCC5_SB PWRCONN24P_WHITE-1 SUSLED R516 C VCC3 C231 C R492 C628 E C0.1U16Y0402 VCC5_SB 300R R514 4.7KR0402 SUS_LED B Q68 N-MMBT3904_NL_SOT23 R476 22R0402 C 300R R513 4.7KR0402 PWR_LED B Q67 N-MMBT3904_NL_SOT23 C627 C R475 8.2KR0402 PWRSW+ E X_C0.1U16Y0402 VCC5_SB PWRLED R515 SUS_LED 27 PSIN 26 C626 C0.1U16Y0402 PWR_LED 27 X_C0.1U16Y0402 3.3V Level 18,27 SB_PWRGD 18 WD_PWRGD R347 R356 X_0R0402 +1.8V_S0 U20 0R0402 C473 C1000P50X0402 B R348 X_120R0402 OE A VCC VCC3 GND Y R336 1.8V Level 33R0402 NB_PWRGD_NB 6,15 AUC1G126DCKR_SC-70-5-RH VCC5_SB VCC_DDR R307 R547 VCC5 D24 BAS32L_LL34 220R 220R SPK1 C R467 R465 18,29 SPKR R468 10KR0402 B X_1KR0402 X_C0.1U16Y0402 BZ1 BUZZER-RH G2 S2 G1 S1 7 RN38 X_8P4R-10R RN39 X_8P4R-10R VCC5_SB R549 X_1KR0402 VCC_DDR R548 X_1KR0402 D2 D1 Q69 C800 X_NN-2N7002DW-7-F_SOT363-6-RH X_C0.1U16Y0402 D02-0390479-D07 D02-0390479-O05 G2 S2 G1 S1 8 RN40 X_8P4R-10R RN41 X_8P4R-10R D2 D1 Q70 X_NN-2N7002DW-7-F_SOT363-6-RH D02-0390479-D07 D02-0390479-O06 A C612 C0.1U16Y0402 E A 8 X_1KR0402 C799 BUZZER VCC5 B 7 MICRO-START INT'L CO.,LTD Title Q62 N-MMBT3904_NL_SOT23 ATX & FRONT PANEL Size B Document Number Date: Friday, August 24, 2007 Rev L-A780 0B Sheet 34 of 35 HEAT SINK 9 MH4 6 6 MH7 MH8 6 6 X_MH001 X_MH001 X_MH001 MH6 D X_MH001 4 MH5 X_MH001 X_MH001 X_MH001 XX2 SB_HEATSINK MH3 NB_HEATSINK XX2 MH2 XX2 XX2 MH1 XX1 XX1 XX1 XX1 D U23_X1 U14_X1 X_MH001 Simulation MANUAL PART C C AVL: D06-0100161-F52 D06-0100101-P01 X_JS1 VCC5 SIM1 X_PIN1*2 BAT1_X1 BAT-BCR2032P-RH X_JS2 SIM2 PCB1 X_PIN1*2 P30-073890A-E48 P30-073890A-G37 P30-073890B-E48 P30-073890B-G37 P30-073890B-E48 B B Optics Orientation Holes FM16 FM2 FM4 FM8 FM5 FM14 X_FM120 X_FM120 X_FM100 X_FM100 X_FM100 X_FM100 FM1 FM15 FM9 FM7 FM6 FM10 X_FM120 X_FM120 X_FM100 X_FM100 X_FM100 X_FM100 FM18 FM17 FM13 FM11 FM3 FM12 A A X_FM120 X_FM120 X_FM100 X_FM100 X_FM100 X_FM100 MICRO-START INT'L CO.,LTD FM19 Title Auto BOM Mnaual X_FM120 Size B Document Number Date: Friday, August 24, 2007 Rev L-A780 0B Sheet 35 of 35 ... SATA_TX1+ SATA_TX1- SVCC2 26 MSDATA MSDATA FB1 300L600m_150 26 MSCLK MSCLK FB2 300L600m_150 26 KBDATA KBDATA FB3 300L600m_150 26 KBCLK KBCLK FB4 300L600m_150 KBMS1 11 12 10 MS C33 C180P50N C31 C180P50N... Jump VCC3 CLR_COMS1_X1 R403 R394 10KR0402 10KR0402 VCC3_SB TALERT# CLR_COMS BIOS_WP#1 26 BIOS_WP#2 26 CLR_COMS LAN_DISABLE 25 JUMPER-1X2B_RED-RH CLR_COMS1 CMOS CLEAR JUMPER CLR_COMS Clear CMOS... X_PIN1*2 BAT1_X1 BAT-BCR2032P-RH X_JS2 SIM2 PCB1 X_PIN1*2 P30- 073890 A-E48 P30- 073890 A-G37 P30- 073890 B-E48 P30- 073890 B-G37 P30- 073890 B-E48 B B Optics Orientation Holes FM16 FM2 FM4 FM8 FM5 FM14