Tài liệu Lessons In Electric Circuits, Volume IV { Digital) docx

Fourth Edition, last update June 29, 2002 Lessons In Electric Circuits, Volume IV – Digital By Tony R Kuphaldt Fourth Edition, last update June 29, 2002 i c 2000-2002, Tony R Kuphaldt This book is published under the terms and conditions of the Design Science License These terms and conditions allow for free copying, distribution, and/or modification of this document by the general public The full Design Science License text is included in the last chapter As an open and collaboratively developed text, this book is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE See the Design Science License for more details PRINTING HISTORY • First Edition: Printed in June of 2000 Plain-ASCII illustrations for universal computer readability • Second Edition: Printed in September of 2000 Illustrations reworked in standard graphic (eps and jpeg) format Source files translated to Texinfo format for easy online and printed publication • Third Edition: Printed in February 2001 Source files translated to SubML format SubML is A a simple markup language designed to easily convert to other markups like L TEX, HTML, or DocBook using nothing but search-and-replace substitutions • Fourth Edition: Printed in March 2002 Additions and improvements to 3rd edition ii Contents NUMERATION SYSTEMS 1.1 Numbers and symbols 1.2 Systems of numeration 1.3 Decimal versus binary numeration 1.4 Octal and hexadecimal numeration 1.5 Octal and hexadecimal to decimal conversion 1.6 Conversion from decimal numeration 1 11 12 BINARY ARITHMETIC 2.1 Numbers versus numeration 2.2 Binary addition 2.3 Negative binary numbers 2.4 Subtraction 2.5 Overflow 2.6 Bit groupings 19 19 19 20 23 24 26 LOGIC GATES 3.1 Digital signals and gates 3.2 The NOT gate 3.3 The ”buffer” gate 3.4 Multiple-input gates 3.4.1 The AND gate 3.4.2 The NAND gate 3.4.3 The OR gate 3.4.4 The NOR gate 3.4.5 The Negative-AND gate 3.4.6 The Negative-OR gate 3.4.7 The Exclusive-OR gate 3.4.8 The Exclusive-NOR gate 3.5 TTL NAND and AND gates 3.6 TTL NOR and OR gates 3.7 CMOS gate circuitry 3.8 Special-output gates 3.9 Gate universality 29 29 33 45 48 49 51 52 53 54 55 56 58 59 64 67 80 84 iii iv CONTENTS 3.9.1 Constructing the NOT function 3.9.2 Constructing the ”buffer” function 3.9.3 Constructing the AND function 3.9.4 Constructing the NAND function 3.9.5 Constructing the OR function 3.9.6 Constructing the NOR function 3.10 Logic signal voltage levels 3.11 DIP gate packaging 3.12 Contributors SWITCHES 4.1 Switch types 4.2 Switch contact design 4.3 Contact ”normal” state and 4.4 Contact ”bounce” make/break 84 85 85 86 87 88 89 99 101 sequence 103 103 107 111 115 ELECTROMECHANICAL RELAYS 5.1 Relay construction 5.2 Contactors 5.3 Time-delay relays 5.4 Protective relays 5.5 Solid-state relays 119 119 122 126 133 134 LADDER LOGIC 6.1 ”Ladder” diagrams 6.2 Digital logic functions 6.3 Permissive and interlock circuits 6.4 Motor control circuits 6.5 Fail-safe design 6.6 Programmable logic controllers 137 137 141 146 149 152 156 expressions 175 175 177 180 183 186 189 194 195 202 BOOLEAN ALGEBRA 7.1 Introduction 7.2 Boolean arithmetic 7.3 Boolean algebraic identities 7.4 Boolean algebraic properties 7.5 Boolean rules for simplification 7.6 Circuit simplification examples 7.7 The Exclusive-OR function 7.8 DeMorgan’s Theorems 7.9 Converting truth tables into Boolean KARNAUGH MAPPING 221 COMBINATIONAL LOGIC FUNCTIONS 223 CONTENTS v 10 MULTIVIBRATORS 10.1 Digital logic with feedback 10.2 The S-R latch 10.3 The gated S-R latch 10.4 The D latch 10.5 Edge-triggered latches: Flip-Flops 10.6 The J-K flip-flop 10.7 Asynchronous flip-flop inputs 10.8 Monostable multivibrators 225 225 228 232 233 235 240 242 244 11 COUNTERS 11.1 Binary count sequence 11.2 Asynchronous counters 11.3 Synchronous counters 11.4 Counter modulus 249 249 251 258 264 12 SHIFT REGISTERS 265 13 DIGITAL-ANALOG CONVERSION 13.1 Introduction 13.2 The R/2n R DAC 13.3 The R/2R DAC 13.4 Flash ADC 13.5 Digital ramp ADC 13.6 Successive approximation ADC 13.7 Tracking ADC 13.8 Slope (integrating) ADC 13.9 Delta-Sigma (∆Σ) ADC 13.10Practical considerations of ADC circuits 267 267 268 272 274 277 279 281 282 285 287 14 DIGITAL COMMUNICATION 14.1 Introduction 14.2 Networks and busses 14.2.1 Short-distance busses 14.2.2 Extended-distance networks 14.3 Data flow 14.4 Electrical signal types 14.5 Optical data communication 14.6 Network topology 14.6.1 Point-to-point 14.6.2 Bus 14.6.3 Star 14.6.4 Ring 14.7 Network protocols 14.8 Practical considerations 293 293 297 299 300 301 302 306 308 309 310 310 310 310 313 vi CONTENTS 15 DIGITAL STORAGE (MEMORY) 15.1 Why digital? 15.2 Digital memory terms and concepts 15.3 Modern nonmechanical memory 15.4 Historical, nonmechanical memory technologies 15.5 Read-only memory 15.6 Memory with moving parts: ”Drives” 315 315 316 317 320 326 326 16 PRINCIPLES OF DIGITAL COMPUTING 16.1 A binary adder 16.2 Look-up tables 16.3 Finite-state machines 16.4 Microprocessors 16.5 Microprocessor programming 329 329 330 334 339 341 17 ABOUT THIS BOOK 17.1 Purpose 17.2 The use of SPICE 17.3 Acknowledgements 345 345 346 347 18 CONTRIBUTOR LIST 18.1 How to contribute to this book 18.2 Credits 18.2.1 Tony R Kuphaldt 18.2.2 Your name here 18.2.3 Typo corrections and other “minor” contributions 349 349 350 350 350 351 19 DESIGN SCIENCE LICENSE 19.1 Preamble 19.2 Definitions 19.3 Rights and copyright 19.4 Copying and distribution 19.5 Modification 19.6 No restrictions 19.7 Acceptance 19.8 No warranty 19.9 Disclaimer of liability 353 353 353 354 354 355 355 355 355 356 Chapter NUMERATION SYSTEMS ”There are three types of people: those who can count, and those who can’t.” Anonymous 1.1 Numbers and symbols The expression of numerical quantities is something we tend to take for granted This is both a good and a bad thing in the study of electronics It is good, in that we’re accustomed to the use and manipulation of numbers for the many calculations used in analyzing electronic circuits On the other hand, the particular system of notation we’ve been taught from grade school onward is not the system used internally in modern electronic computing devices, and learning any different system of notation requires some re-examination of deeply ingrained assumptions First, we have to distinguish the difference between numbers and the symbols we use to represent numbers A number is a mathematical quantity, usually correlated in electronics to a physical quantity such as voltage, current, or resistance There are many different types of numbers Here are just a few types, for example: WHOLE NUMBERS: 1, 2, 3, 4, 5, 6, 7, 8, INTEGERS: -4, -3, -2, -1, 0, 1, 2, 3, IRRATIONAL NUMBERS: π (approx 3.1415927), e (approx 2.718281828), square root of any prime REAL NUMBERS: (All one-dimensional numerical values, negative and positive, including zero, whole, integer, and irrational numbers) COMPLEX NUMBERS: 348 CHAPTER 17 ABOUT THIS BOOK Appreciation is also extended to Robert L Boylestad, whose first edition of Introductory Circuit Analysis taught me more about electric circuits than any other book Other important texts in my electronics studies include the 1939 edition of The “Radio” Handbook, Bernard Grob’s second edition of Introduction to Electronics I, and Forrest Mims’ original Engineer’s Notebook Thanks to the staff of the Bellingham Antique Radio Museum, who were generous enough to let me terrorize their establishment with my camera and flash unit Thanks as well to David Randolph of the Arlington Water Treatment facility in Arlington, Washington, for allowing me to take photographs of the equipment during a technical tour I wish to specifically thank Jeffrey Elkner and all those at Yorktown High School for being willing to host my book as part of their Open Book Project, and to make the first effort in contributing to its form and content Thanks also to David Sweet (website: (http://www.andamooka.org)) and Ben Crowell (website: (http://www.lightandmatter.com)) for providing encouragement, constructive criticism, and a wider audience for the online version of this book Thanks to Michael Stutz for drafting his Design Science License, and to Richard Stallman for pioneering the concept of copyleft Last but certainly not least, many thanks to my parents and those teachers of mine who saw in me a desire to learn about electricity, and who kindled that flame into a passion for discovery and intellectual adventure I honor you by helping others as you have helped me Tony Kuphaldt, July 2001 ”A candle loses nothing of its light when lighting another” Kahlil Gibran Chapter 18 CONTRIBUTOR LIST 18.1 How to contribute to this book As a copylefted work, this book is open to revision and expansion by any interested parties The only ”catch” is that credit must be given where credit is due This is a copyrighted work: it is not in the public domain! If you wish to cite portions of this book in a work of your own, you must follow the same guidelines as for any other copyrighted work Here is a sample from the Design Science License: The Work is copyright the Author All rights to the Work are reserved by the Author, except as specifically described below This License describes the terms and conditions under which the Author permits you to copy, distribute and modify copies of the Work In addition, you may refer to the Work, talk about it, and (as dictated by "fair use") quote from it, just as you would any copyrighted material under copyright law Your right to operate, perform, read or otherwise interpret and/or execute the Work is unrestricted; however, you so at your own risk, because the Work comes WITHOUT ANY WARRANTY see Section ("NO WARRANTY") below If you wish to modify this book in any way, you must document the nature of those modifications in the ”Credits” section along with your name, and ideally, information concerning how you may be contacted Again, the Design Science License: Permission is granted to modify or sample from a copy of the Work, producing a derivative work, and to distribute the derivative work under the terms described in the section for distribution above, provided that the following terms are met: 349 350 CHAPTER 18 CONTRIBUTOR LIST (a) The new, derivative work is published under the terms of this License (b) The derivative work is given a new name, so that its name or title can not be confused with the Work, or with a version of the Work, in any way (c) Appropriate authorship credit is given: for the differences between the Work and the new derivative work, authorship is attributed to you, while the material sampled or used from the Work remains attributed to the original Author; appropriate notice must be included with the new work indicating the nature and the dates of any modifications of the Work made by you Given the complexities and security issues surrounding the maintenance of files comprising this book, it is recommended that you submit any revisions or expansions to the original author (Tony R Kuphaldt) You are, of course, welcome to modify this book directly by editing your own personal copy, but we would all stand to benefit from your contributions if your ideas were incorporated into the online “master copy” where all the world can see it 18.2 Credits All entries arranged in alphabetical order of surname Major contributions are listed by individual name with some detail on the nature of the contribution(s), date, contact info, etc Minor contributions (typo corrections, etc.) are listed by name only for reasons of brevity Please understand that when I classify a contribution as “minor,” it is in no way inferior to the effort or value of a “major” contribution, just smaller in the sense of less text changed Any and all contributions are gratefully accepted I am indebted to all those who have given freely of their own knowledge, time, and resources to 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with the law, and no other parts of the License shall be affected 19.8 No warranty THE WORK IS PROVIDED ”AS IS,” AND COMES WITH ABSOLUTELY NO WARRANTY, EXPRESS OR IMPLIED, TO THE EXTENT PERMITTED BY APPLICABLE LAW, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 356 CHAPTER 19 DESIGN SCIENCE LICENSE 19.9 Disclaimer of liability IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS WORK, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE END OF TERMS AND CONDITIONS [$Id: dsl.txt,v 1.25 2000/03/14 13:14:14 m Exp m $] Index Baud, unit, 303 Bilateral switch, 82 Binary numeration, Binary point, Bistable multivibrator, 226 Bit, 27 Bit bobble, 282 Bit, binary, Bit, least significant, Bit, most significant, Bluetooth bus, 300 Boolean Algebra, 142 Bounce, switch contact, 115, 245 Bps, unit, 303 Break-before-make, 113 Broadcast, digital network, 310 Bubble memory, 325 Bubble, gate symbol, 31 Buffer function, from a NAND gate, 85 Buffer function, from a NOR gate, 85 Buffer gate, 45 Buffer gate, open-collector TTL, 45 Buffer gate, totem pole TTL, 48 Bus, 297 Bus topology, 309 Byte, 27 ∆Σ ADC, 285 4-20 mA analog signal, 293 4PDT switch, 115 ADC, delta-sigma, 285 ADC, digital ramp, 277 ADC, flash, 274 ADC, integrating, 282 ADC, slope, 282 ADC, successive approximation, 279 ADC, tracking, 281 Address, memory, 316 Algebra, Boolean, 142 Aliasing, ADC, 290 ALU, 333 Amplitude modulation, 305 Analog signal, 4-20 mA, 293 AND function, from NAND gates, 85 AND function, from NOR gates, 85 AND gate, 49 AND gate, CMOS, 74 AND gate, TTL, 63 ANSI protective relay designations, 133 Arithmetic Logic Unit, 333 Armature, 119 Assembler, computer programming, 342 Assembly language, 342 Associative property, 184 Astable multivibrator, 226 Asynchronous counter, 251 C/C++ computer language, 343 CADET computer, 333 Carrier-Sense Multiple Access protocol, 311 Cathode Ray Tube, 321 CCD, 325 Central Processing Unit, 340 Centronics parallel bus, 300 Charge-Coupled Device, 325 Cipher, Clock signal, 236 B, symbol for magnetic flux density, 321 B-series CMOS gates, 77 Backward compatible, 343 Bandwidth, 303 Base, numeration system, BASIC computer language, 343 357 358 Closed switch, 103 CMOS, 69 CNC machine tool control, 339 Collision, data, 312 Communication, solicited vs unsolicited, 312 Communications gateway, 312 Commutative property, 183 CompactPCI bus, 299 Compatibility, backward, 343 Compilation, computer language, 342 Complement, one’s, 22 Complement, two’s, 22 Complementary output gate, 80 Complementation, numerical, 21 Condenser, 110 Contact bounce, 115 Contact debouncing, 117 Contact, seal-in, 150, 164 Contact, switch, 107 Contactor, 122 Conversion rate, ADC, 289 Counter, asynchronous, 251 Counter, ring, Counter, synchronous, 258 CPU, 340 Crumb, 27 CSMA protocol, 311 CSMA/BA protocol, 312 CSMA/CD protocol, 312 CT, 133 Current sink, 40, 69 Current source, 40, 69 Current transformer, 133 Current, relay drop-out, 121 Current, relay pull-in, 121 D latch, 233 Data collision, 312 Data, memory, 316 Debounce, switch contact, 117 Debouncing circuit, 245 Decimal point, Deckle, 27 Delay line memory, 320 Delay, propagation, 237 Delta-sigma ADC, 285 INDEX DeMorgan’s Theorem, 87, 142 Determinism, network, 313 Digit, Digit, decimal, Digital ramp ADC, 277 Diode, steering, 35, 60 DIP gate packaging, 99 Disk, floppy, 326 Distributive property, 185 DPDT switch, 114 DPST switch, 114 Drop-out current, 121 Dual Inline Package, 99 Dynamic RAM, 319 Dynner, 27 Edge triggering, 235 EDVAC computer, 320 EEPROM, 326 Electrostatic sensitivity, CMOS, 69 Encoder, rotary shaft, 262 Eniac computer, EPROM, 326 Ethernet, 300 Exclusive-NOR gate, 58 Exclusive-OR gate, 56 Fail-safe design, 154 Fanout, 76 FDDI, 300 Feedback, positive, 94 Fetch/execute cycle, 340 Field intensity, magnetic, 321 Fieldbus, 301 Finite state machine, 334 Firewire bus, 300 Flash ADC, 274 Flash memory, 319 Flip-flop vs latch, 236 Flip-flop, J-K, 240 Flip-flop, S-R, 238 Floating input, defined, 39 Floating inputs, CMOS vs TTL, 69 Floppy disk, 326 Flow switch, 106 Flux density, magnetic, 321 INDEX FORTH computer language, 343 FORTRAN computer language, 343 Forward voltage, PN junction, 36 Frequency modulation, 305 Frequency Shift Keying, 305 Frequency, Nyquist, 290 FSK, 305 FSK, phase-continuous, 305 FSM, 334 Fuzzy logic, 176 Gate, complementary output, 80 Gate, digital, 30 Gated S-R latch, 232 Gateway network device, 312 Glass fiber, 306 GPIB bus, 300 H, symbol for magnetic field intensity, 321 Hardware vs Software, 330 Heater, overload, 122 Hexadecimal numeration, High, logic level, 30 High-impedance output, tristate, 81 High-level programming language, 342 Holding current, thyristor, 134 HPIB bus, 300 IDE bus, 299 Illegal state, 228 Interlock, mechanical, 149 Interlocking, 148 Interpretation, computer language, 342 Invalid state, 228 Inverter gate, 31, 33 Inverter gate, CMOS, 67 Inverter gate, open-collector TTL, 43 Inverter gate, totem pole TTL, 33 ISO DIS7498 seven-layer model, 311 Iteration, 341 J-K flip-flop, 240 Jacquard loom, 326 Joystick switch, 104 L1, hot wire designation, 137 L2, neutral wire designation, 137 359 Ladder circuit / logic gate equivalents, 143 Latch vs flip-flop, 236 Latch, D, 233 Latch, gated S-R, 232 Latch, S-R, 228 LED, 49 Level switch, 105, 106 Light Emitting Diode, 49 Limit switch, 104 Logic gate / ladder circuit equivalents, 143 Logic level, 30 Logic, Aristotelian, 176 Logic, fuzzy, 176 Look-up table, 331 Loom, Jacquard, 326 Low, logic level, 30 LSB, Machine language, 341 Make-before-break, 113 Master/slave protocol, 312 MC6800 bus, 299 Memory access, random, 316 Memory access, sequential, 316 Mercury (tilt) switch, 108 Mercury-wetted contacts, 117 Microbending, 307 Microchannel bus, 299 Microcode, 341 Microprocessor, 340 Modbus, 300 Mode, optical, 307 Modulation, 305 Monostable multivibrator, 226 MOSFET, 69 MSB, Multibus, 299 Multimode fiber, 307 Multivibrator, 118, 226 NAND function, from NOR gates, 86 NAND gate, 51 NAND gate, CMOS, 72 NAND gate, TTL, 60 NC machine tool control, 339 Negative-AND gate, 54 360 Negative-OR gate, 55 Network determinism, 313 Network protocol, 310 Network, digital, 297 Nibble (or Nybble), 27 Nickle, 27 Node, digital network, 309 Noise margin, logic gate, 90 Nonlinearity, PN junction, 36 Nonvolatile memory, 317 NOR function, from NAND gates, 88 NOR gate, 53 NOR gate, CMOS, 74 NOR gate, TTL, 64 Normally-closed, 111 Normally-closed, timed-closed contact, 129 Normally-closed, timed-open contact, 128 Normally-open, 111 Normally-open, timed-closed contact, 126 Normally-open, timed-open contact, 127 NOT function, from a NAND gate, 84 NOT function, from a NOR gate, 84 NOT gate, 31, 33 NOT gate, CMOS, 67 NOT gate, open-collector TTL, 43 NOT gate, totem pole TTL, 33 Nuclear switch, 106 Number, 19 Numeration system, 19 Nyquist frequency, 290 Octal numeration, One’s complement, 22 One-shot, 118, 130 One-shot, nonretriggerable, 246 One-shot, retriggerable, 245 Open switch, 103 Open-collector output, TTL, 43 Optical fiber, 306 Optical switch, 105 OR function, from NAND gates, 87 OR function, from NOR gates, 87 OR gate, 52 OR gate, CMOS, 75 OR gate, TTL, 66 Overflow, 24 INDEX Overload heater, 122 Oversampling, ADC, 287 Paper tape storage, 326 Parallel data, 296 PASCAL computer language, 343 PC/AT bus, 299 PCI bus, 299 PCMCIA bus, 299 Permissive switch, 146 Phase-continuous FSK, 305 Photon, 307 Place value, Place value, numeration system, Platter, hard disk, 327 Playte, 27 PLC, 156 Point, binary, Point, decimal, Point-to-point topology, 308 Poles, switch, 113 POS expression, 213 Positive feedback, 94 Potential transformer, 133 Pressure switch, 105 Processor, computer, 340 Product-Of-Sums expression, 213 Profibus, 301 Program, self-modifying, 339 Programmable Logic Controller, 156 Programming language, high level, 342 PROM, 326 Propagation delay, 237 Property, associative, 184 Property, commutative, 183 Property, distributive, 185 Protective relay, 133 Protocol, network, 310 Proximity switch, 104 PT, 133 Pull-in current, 121 Pullup resistor, 70 Pulse stretching, 308 Pushbutton switch, 103 Q output, multivibrator, 228 INDEX Quadrature output encoder, 263 Race condition, 229, 239 RAM, 317 Random access memory, 316 Random access memory, misnomer, 317 Read, destructive, 324 Read-only memory, 316 Read-write memory, 316 Reading, memory, 316 Recycle timer, 130 Register, successive approximation, 279 Relay, 119 Relay, protective, 133 Reset, latch, 228 Resistor, pullup, 70 Resolution, ADC, 287 Ring counter, Ring topology, 309 Ripple effect, 255 ROM, 316 Rotary shaft encoder, 262 RS-232C, 300 RS-422A, 300 RS-485, 300 S-100 bus, 299 S-R flip-flop, 238 S-R latch, 228 Sample frequency, ADC, 289 Schmitt trigger, 94 SCSI bus, 299 Seal-in contact, 150, 164 Selector switch, 104 Self-modifying program, 339 Sequential access memory, 316 Serial data, 296 Set, latch, 228 Sign-magnitude, 21 Single mode fiber, 308 Single-phasing, electric motor operation, 125 Sink, current, 40, 69 Slope (integrating) ADC, 282 Software vs Hardware, 330 Solenoid, 119 Solicited network communication, 312 361 SOP expression, 206 Source, current, 40, 69 SPDT switch, 114 Speed switch, 105 SPST switch, 82, 114 Star topology, 309 Static RAM, 319 STD bus, 299 Steering diode, 35, 60 Step recovery, ADC, 291 Stored-program computer, 339 Strobing, 256 Successive approximation ADC, 279 Sum-Of-Products expression, 206 Switch contact, 107 Switch contact bounce, 245 Switch normal position, 111 Switch, closed, 103 Switch, flow, 106 Switch, generic contact symbol, 112 Switch, joystick, 104 Switch, level, 105, 106 Switch, limit, 104 Switch, mercury tilt, 108 Switch, nuclear radiation, 106 Switch, open, 103 Switch, optical, 105 Switch, permissive, 146 Switch, pressure, 105 Switch, proximity, 104 Switch, pushbutton, 103 Switch, selector, 104 Switch, speed, 105 Switch, temperature, 105 Switch, toggle, 103 Switched digital network, 310 Synchronous counter, 258 Table, look-up, 331 Table, truth, 32 Temperature switch, 105 Theorem, DeMorgan’s, 142 Throws, switch, 113 Time delay relay contact, NCTC, 129 Time delay relay contact, NCTO, 128 Time delay relay contact, NOTC, 126 362 Time delay relay contact, NOTO, 127 Toggle switch, 103 Token ring, 300 Token-passing protocol, 312 Total internal reflectance, 306 Totem pole output, TTL, 42 Tracking ADC, 281 Tristate output, 81 Truth table, 32 TTL, 40 Turing machine, 338 Two’s complement, 22 Unit, baud, 303 Unit, bps, 303 Unsolicited network communication, 312 USB, 300 UV/EPROM, 326 Vdd , versus Vcc , 68 VME bus, 299 Volatile memory, 317 Voltage, forward, PN junction, 36 VXI bus, 299 Watchdog timer, 130 Weight, numeration system, Wetting current, 110 Williams tube memory, 321 Word, 27 Writing, memory, 316 XNOR gate, 58 XOR gate, 56 Zero-crossover switching, 134 INDEX ... However, representing negative numbers is not quite as straightforward: zero positive one 0000 0001 negative one 1111 22 positive positive positive positive positive positive CHAPTER BINARY ARITHMETIC... bit, representing sign (0=positive, 1=negative) | 01012 = 510 (positive) Extra bit, representing sign (0=positive, 1=negative) 2.3 NEGATIVE BINARY NUMBERS | 11012 = -510 21 (negative) As you... either being magnetized for a binary ”1” or demagnetized for a binary ”0”), optical disks (a laser-burned pit in the aluminum foil representing a binary ”1” and an unburned spot representing a binary